‘Adama University Chapter 2: Op-Amp Basic Stages 2.1 Introduction An integrated circuit IC is a circuit where an entire circuit is constructed on a single piece of semiconductor material. One of the commonly used types of IC is the operational amplifier. The schematic diagram of the 741-type OP-Amp and its symbol is shown below. your Bias Network Differential Amp Gain Stage Level Shifter Output Stage ee Vow lnverting Input C——, $9 output Non Iveing C+ iam | Veo Operational Amplifier is a high gain de differential amplifier capable of performing a wide range of functions by using external feedback. It is the most flexible linear device. By controlling the feedback network properties, we can manipulate the overall forward transfer function of the device and its application ‘The majority of commercially available operational amplifiers employ the structure shown below. ENG2202‘Adama University utp Dever vo The differential amplifier is used as the input stage to provide the inverting and the non inverting inputs and the high input resistance as well as voltage gain. ‘The low output resistance of the op-amp is achieved by the emitter follower output stage. The level shifter adjusts the de voltages so that the output voltage signal is referenced to ground. The adjustment of de level is required because the gain stages ate direct coupled. The input and output stages are required to match the op-amp with the external world, 2.2 Differential Amplifiers Previously in Applied electronics I, we have discussed single stage amplifiers of one input and one output terminal with limited gain, input resistance and output resistance. Here, another basic transistor circuit configuration called differential amplifier is introduced, which can give us high gain and specified input and output resistance values. It is the input stage for most operational amplifiers and is widely used amplifier building block in analogue integrated circuit. Unlike the other amplifiers we have discussed so far, it has two input terminals and one output terminal, where the output signal is the difference of the two input signals as shown in the difference amplifier block diagram below. 40 Difference Amplifier y,o—4 Figure 2.1: Difference amplifier block diagram Where the output voltage Vo is given by: Vo = Aa(Vs ~ Vo) There are two different modes of operation of the differential pair: 1. The differential pair with a common-mode input signal CM: +, %, fon = 2. The differential pair with a differential (mode) input signal: Va =Vi-Ve Thus, the total output voltage is given by Vy +) Yo = Aas V2) + Ae (25 Where Ag and A, respectively are the differential gain and the common mode gain. eNG2202‘Adama University The above equations shows that if V; = V2, the differential mode input signal is zero and the common mode input signal is Vem = Vi = V2. The differential amplifier can be implemented with BJTs and FETs. We focus on differential amplifiers implemented using BIT transistors. 2.2.1. Response for differential inputs Differential mode: This mode of operation exists when the differential amplifier has one source connected to each input and the two sources are out of phase with each other and of the same amplitude. Common mode: This exists if the sources are equal in amplitude and in phase, the two opposing forces will balance each other, so that they cancel. Consider the following basic BIT differential pair configuration ®@ | Figure 2.2: Basic BIT differential pair configuration Following the polarity shown in figure 2.2, the ac output voltage can be expressed as: Vout = Ve2 — Ver The output voltage Vow is called a differential output since it combines the two ac collector voltages into one voltage. Common mode response First let us consider a circuit in which the two base terminals are connected together and a common mode voltage Ven is applied as shown in figure 2.3 below. The voltage at the common emitters is given by KVL in one of the transistor input circuit: eNG2202‘Adama University Voe(on) 24 If the transistors Q; and Q> are identical, the current Ip splits evenly between the two transistors and is given by: inn =i = 2 22 Ifbase currents are negligible then, icy © ig, and ice ¥ tga, Therefore, the collector voltages are given by Jo) Vee Figure 2.3: Basic diff-amp with applied common mode voltage From this we conclude that, for an applied common mode voltage, Ig splits equally between Qrand Q; and the difference between Vey and Vez is zero. By varying Vom in figure 2.3 above by a small amount and determining the circuit response, will not result any change in the above equations. Thus, suggesting that both the collector current and voltages of the transistor will remain unchanged. Hence, we say the circuit does not respond to changes in the input common mode level; or the circuit “rejects” input CM variations Differential response Let us now increase the base voltage Vay, in figure 2.2, by a small voltage V4/2 and decrease V2 by the same amount. Le. let Vex = 4/y and Vag = —"#/y 24 eNG2202‘Adama University This show the voltages at the bases of Q; and Q, are no longer equal. Since the emitters are common, the base to emitter voltages of Q; and Q2 are not the same. We have increased Va) and decreased Va2, giving us Vse1>Vas2, as a result ic; increases by A/ above its quiescent value and ics decreases by AI below its quiescent value. This is shown in figure 2.4 below. Vee Figure 2.4: Basic differential amplifier with applied differential mode Hence, there exists a potential difference between the two collector terminals which is given as ($a) toll = AIRe2 + AlRey, but if Rey = Rea Vea —Ver = 2MIR 28 This proves that a voltage difference is created between the two collector terminals (Vz and Vcr) by applying a differential mode input voltages. 2.2.2, Small signal analysis onsider the following small signal circuit configuration. eNG2202