Capital University of Science and Technology

Department of Electrical Engineering

EE4273: ASIC Design and FPGA, Fall 2021

Assignment No. 3
Instructor: Dr. Muhammad Tahir Date: 07/01/2022
Total Marks: 80 Due Date:17/01/2022 (05:00pm)

Instructions:

• Late submission is not allowed.

• This is an individual assignment.
• Submit Software Verilog Files for Programming Problems
• Submission Path : Google Classrooim
• Name of the Zip file should be ‘yourName_AssignmentNo_RollNo.zip’
• Copied assignments will get zero credit.

Q # 1. (20 Points)
(a). Design a Binary Code Detector using Moore type FSM that will detect 4-bit Binary
Sequence ‘1101’ and generate an ‘Un-lock’ Signal, if Sequence is correct and a ‘False-Code’
signal if the sequence is incorrect. Implement the state diagram of the Finite State Machine in
Verilog.
(b). Write Stimulus module for testing and verification of the Code Detector. Implement the
design as a ModelSim Project.
Q # 2. (20 Points)
(a). Design and implement a parameterized bit serial adder that can add two N-bit
numbers. Shift registers in the adder and Controller FSM should handle value of N-bits.

(b). Write Stimulus module for testing and verification of the bit serial adder. Implement the
design as a ModelSim Project.

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Q # 3. (20 Points)
(a). Design and implement a Vending Machine as a Finite state machine. Vending machine
can dispatch one of two cold-drinks if user enters the required amount in coins. Price for
Pepsi is Rs. 15 and for Coke is Rs. 20. User will first select the cold drink. Input to the
machine are selection of cold drink, Rs. 5 coin, Rs. 10 coin and bad coin. Output of the
Vending Machine can be Pepsi, Coke or remaining balance in coins.
(b). Write Stimulus module for testing and verification of the Vending Machine. Implement
the design as a ModelSim Project.
Q # 4. (20 Points)
(a). Implement a microprogrammed state machine using ROM that will implement the state
diagram shown below :

An example state diagram and correspond ROM based microprogrammed FSM is shown .

b). Write Stimulus module for testing and verification of microprogrammed FSM.
Impalement the design as a ModelSim Project.

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