FOUNDATIONS OF MECHATRONICS ASSIGNMENT

The table below gives the memory mapping table of an MC6809 microprocessor based system. Construct the
memory map. Write down the start address and end address of the memory space of each memory type and I/O
device. What is the size (in kilobytes) of each memory type and for each Input and Output device. From the table,
extract the Boolean functions for the selections of the selection of the different memory and Input and Output
devices.

A15 A14 A13 A12 A11 SELECTED DEVICE

0 X X X X RAM
1 0 0 0 0 ACIA_0
1 0 0 0 1 ACIA_1
1 0 0 1 0 PIA_0
1 0 0 1 1 PIA_1
1 0 1 X X EEPROM
1 1 X X X EPROM

Write down the primary addresses of each of the internal registers of the four I/O devices assuming that A0 is
connected to RS0 and A1 is connected to RS1 for all I/O devices.

In which space are the following addresses? In the case of the space being for an I/O device, state the selected
internal register. $7F39, $E745, $9801, $8743, $8F70, $9314, $2759, $B666, $D945.

Draw the internal circuit configuration (showing fuses which are still intact) of an FPGA (field programmable
gate array) which can be used for the memory address decoding using one low active chip select for each memory
and input and output device.

Using discrete and random logic and off the shelf memory address decoders, design an alternative but efficient
memory address decoder which uses the smallest number of SSI packages.

Show that this memory mapped I/O wastes a lot of memory space and show how the dedicated I/O system of the
Intel microprocessor based systems avoids this wastage.

Describe the operation of an Open Drain output and show how it is used with input and output devices for the
interrupt request outputs (IRQ), in such a way that several of them can share the same interrupt request input of a
microprocessor.

Distinguish, giving examples from the MC6809 microprocessor, the difference between a low level sensitive
interrupt input, and a negative edge sensitive interrupt input. Clearly explain why several I/O devices cannot share
a negative edge sensitive interrupt input.

Explain clearly what happens if an interrupt request was to be honoured, or a subroutine called, before the
hardware or system stack pointer register is initialized after a power on RESET. Explain the mechanisms within
the MC6809 microprocessor which prevent this from happening.

Describe the operation of a circular buffer assuming that it has been allocated RAM memory space to begin at
$1000 and ending at $1800 clearly stating how the circular buffer is initialised. How many bytes have been
reserved for the circular buffer? How does the control program determine if the buffer is completely empty?
Describe the method used the calculate the number of bytes in the buffer.
Describe the use of XON and XOFF is managing the flow of information across a serial link and compare it with
the use of hardware handshaking. What are the ASCII codes for the XON and XOFF characters?

Describe the operation of the receiver section of the ROCKWELL R6551 ACIA. When does a character overrun
occur, and how can the possibility of it occurring be minimised? Explain what a framing error is and what a parity
error is. Give the sequence of operations which results in the flag RDRF being cleared in the read only Status
Register.

Determine the ASCII characters (drawn to scale) which are received on a serial link (TTL side) with 7 bits per
character, 2 stops bits with the same parity setting below: Determine which type of parity is being used.

Draw timing diagrams for the same configuration when the ASCII characters ‘A’ and ‘z’ are transmitted.

An assembly language program consists of a sequence of assembly language statements. What are the four fields
of a statement? Describe what can be placed in each of the four fields. Describe the way the assembler knows the
base of an operand in one of the four fields.

What is the Location Counter (LC) which is used by an assembler when assembling an assembly language
program? Give the full names and describe the uses and effects of the following assembly language directives:
ORG, EQU, FCB, FDB and FCC.

Assemble the assembly language statements for the subroutine below by hand into machine code (for the
MC686809 microprocessor) and compile the Intel hex format record for the subroutine complete with the
checksum byte. Write down the EOF (End of File Record) used with Intel hex format.

ORG $BCD0
STRING_COPY PSHS A
COPY_AGAIN LDA $00,X
STA $00,Y
BEQ COPY_COMPLETE
LEAX 1,X
LEAY 1,Y
BRA COPY_AGAIN
COPY_COMPLETE PULS A
RTS

Show that pre-decrement and post-increment which is available with the four indexable registers on the MC6809
microprocessor allow two additional stacks to be implemented with X and Y as stack pointer registers in a way
consistent with the stack operation mechanisms of the microprocessor, i.e. the stack grows towards lower memory
addresses, and each stack pointer is always pointing at the top item on the stack, if it is not empty.

Write down the priorities of the different interrupt sources on the MC6809 and describe whether other interrupts
can interrupt an interrupt service routine of a lower priority interrupt. Describe the use of the Entire flag, E, and
hence write down the order in which the registers are pushed onto the Stack and pulled back from the Stack in the
case of the 6809 microprocessor during interrupt handling. Describe how the interrupt vector is used during
interrupt processing.