COMPUTER SYSTEM ORGANISATION LAB (CS 5407)

AIM: To simulate SISO shift registers using D-Flip Flops for the serial input
bit string “1010”.

OBJECTIVE: To study the behaviour of different modes of data input by

using SISO shift register.

DESCRIPTION: Shift registers hold the data in their memory which is

moved or “shifted” to their required positions on each clock pulse. The
data in SISO register is shifted serially “IN” and “OUT” of the register, one
bit at a time in either a left or right direction under clock control.

CIRCUIT:
AIM: To simulate SISO shift registers by realising D-Flip Flops using JK Flip
Flops for the serial input bit string “1010”.

OBJECTIVE: To study the behaviour of different modes of data input by

using SISO shift register.
DESCRIPTION: Shift registers hold the data in their memory which is
moved or “shifted” to their required positions on each clock pulse. The
data in SISO register is shifted serially “IN” and “OUT” of the register, one
bit at a time in either a left or right direction under clock control.

CIRCUIT:
AIM: To simulate SIPO shift registers using D-Flip Flops for the serial input
bit string “1010”.

OBJECTIVE: To study the behaviour of different modes of data input by

using SIPO shift register.

DESCRIPTION: Shift registers hold the data in their memory which is

moved or “shifted” to their required positions on each clock pulse. The
register is loaded with serial data, one bit at a time, with the stored data
being available at the output in parallel form.
CIRCUIT:
AIM: To simulate SIPO shift registers by realising D-Flip Flops using JK Flip
Flops for the serial input bit string “1010”.
OBJECTIVE: To study the behaviour of different modes of data input by
using SISO shift register.

DESCRIPTION: Shift registers hold the data in their memory which is

moved or “shifted” to their required positions on each clock pulse. The
register is loaded with serial data, one bit at a time, with the stored data
being available at the output in parallel form.

CIRCUIT: