335(S)

March 2021

DIGITAL LOGIC DESIGN (FOR CST)

Time Allowed: 3 Hours Full Marks: 70

Answer to Question No.1 is compulsory and Answer any five questions from the rest.

1. A. Choose the correct answer from the given alternatives (any ten): 1x10

i) Which of the following does not represent Boolean algebra operation? (a) AND (b) OR
(c) NOT (d) XOR.

ii) A five variable Karnaugh map contains (a) 8 cells (b) 16 cells (c) 32 cells (d) 64 cells.

iii) A 4 to 1 multiplexer requires ______ data select line. (a)1 (b) 2 (c) 3 (d) 4.

iv) In a JK flip flop, toggle means – (a) set Q=1 and Q’=0 (b) set Q=0 and Q’=1 (c) change
the output to the opposite state (d) no change in input.

v) A n-bit counter will count up to decimal (a) 2n (b) 2n-1 (c) 2n-1 (d) n.

vi) How many 4-bit words can be stored in a 512 bit ROM? (a) 512 (b) 128 (c) 256 (d) 64.

vii) A SRAM is fabricated using – (a) Bipolar technology (b) MOS technology (c) both
Bipolar and MOS technology (d) none of these.

viii) The flip flop circuit is (a) unstable (b) multistable (c) monostable (d) bistable.

ix) In binary code, shifting a register to left by one bit position is equivalent to –
(a) subtraction by 2 (b) addition by 2 (c) division by 2 (d) multiplication by 2.

x) (E5)16 =( ? )10 – (a) 227 (b) 329 (c) 226 (d) 229.

xi) Which of the following gate can be used as a controlled inverter? (a) AND (b) OR
(c) XOR (d) NAND.

xii) Laws of tautology states – (a) A.A=A and A= Ā=A (b) Ā.A=A and A+A= Ā (c) A.A=A
and A+A=A (d) all of these.

B. Answer the following questions (any five): 5x2

i) What is a decoder?
ii) What is Code convertor logic circuit?
iii) What is the characteristic equation of a T-flip flop?
iv) What is gray code equivalent of binary number 11010?
v) Make truth table for an EX-OR gate.
vi) What is canonical form?

2. a) Explain the operation of R-2R ladder type DAC in details.

b) Explain the operation of a dual slope ADC in details. 5+5

3. a) Design a 16:1 MUX by using 4:1 MUX’s only.

b) Implement the Boolean function Y= ∑m(3,5,6,7) by using 4:1 MUX. 5+5

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4. a) Design a 3:8 decoder by using logic gates.
b) Convert a SR flip-flop into JK flip-flop. 5+5

5. a) Design a 4-bit PISO register and explain its operation.

b) Design a 3 bit synchronous up counter. 5+5

6. a) Explain the operation of Johnson counter.

b) Design a mod-10 ripple counter. 5+5

7. a) Write down the 6 postulates of Boolean Algebra.

b) Write down the truth table of NAND, XOR, XNOR and NOR gates (all two inputs). 6+4

8. a) Design a full subtractor circuit by using NAND gates only.

b) How you should implement Full adder by using 2 Half adder and an OR gate? 6+4

9. a) Simplify the following by using K-map (any one):

i) f(A,B,C,D)=∑m(3,6,9) + d(10,11,12,13,14,15)
ii) f(A,B,C,D)=∏M(0,2,7,8,14,15) + d(3,6,9,12,13)
b) Explain with example: minterm, maxterm, Standard canonical form. 4+6

10. a) Design a 4 bit adder/subtractor by using 4 bit Binary Parallel Adder.

b) Design a 4 bit binary to Gray code converter. 7+3

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