S.B. Roll No...............................................

COMPUTER ARCHITECTURE
th
4 Exam/COMP/IT/CSc/3621/MAY’17
Duration: 3Hrs M. Marks: 75
SECTION- A
Q1 Do as directed: 1.5x10=15
a. (AF)16 =( )8.
b. 256 in binary is written as _______
c. 2’s complement of 0000 is_______.
d. ________ memory exists between CPU and dynamic RAM.
e. A Stack _____________bit register.
f. _________ register points to next instruction address.
g. CISC stands for _________.
h. During DMA transfer the _______ is idle.
i. 15 is written as (1111) in BCD format. (T/F)
j. BCD is a weighted code.(T/F).

SECTION- B
Q2 Attempt any FIVE questions. 6x5=30
i. Explain general register organization with suitable diagram?
ii. Write a short note on Stack organization.
iii.
iv.
v.
What do you mean by addressing mode? Explain any five.
What is an interrupt? Explain Daisy Chain priority interrupt.

o m
Explain the various instruction formats used in CPU with suitable examples?

.r c
vi. Write in brief about Cache memory.
vii. Give a short note on Memory connection to CPU.

m
viii. Write a short note on memory hierarchy?
ix.
e
What do you mean by FIFO buffer? Explain with the help of neat and clean diagram.

p o
.r c
SECTION- C
Q3 Attempt any three questions.
I.

p a 10x3=30
What is a DMA Controller? Describe along with its working using suitable diagrams.
II.
III.
IV.
r
Explain booth multiplication algorithm with an example?

b
What do you mean by pipelining? Explain with the help of example.
Describe the concept of virtual memory using paging and segmentation?
p e
V. Write a short note on :
a
rp
a) Input-Output Interface
b) Associative Memory