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 STD29NF03L

N-CHANNEL 30V - 0.018 Ω - 29A DPAK


LOW GATE CHARGE STripFET POWER MOSFET
PRELIMINARY DATA
T YPE V DSS R DS(on) ID
STD29NF03L 30 V < 0.023 Ω 29 A
■ TYPICAL RDS(on) = 0.018 Ω
■ TYPICAL Qg = 18 nC @ 10V
■ OPTIMAL RDS(on) x Qg TRADE-OFF
■ CONDUCTION LOSSES REDUCED 3
■ SWITCHING LOSSES REDUCED
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DESCRIPTION
This application specific Power Mosfet is the third DPAK
TO-252
generation of STMicroelectronics unique ”Single
(Suffix ”T4”)
Feature Size” strip-based process. The resul-
ting transistor shows the best trade-off between
on-resistance and gate charge. When used as ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL
high and low side in buck regulators, it gives the
best performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high effi- INTERNAL SCHEMATIC DIAGRAM
ciency are of paramount importance.

APPLICATIONS
■ SPECIFICALLY DESIGNED AND

OPTIMISED FOR HIGH EFFICIENCY CPU


CORE DC/DC CONVERTERS

ABSOLUTE MAXIMUM RATINGS


Symbol Parameter Value Un it
V DS Drain-source Voltage (VGS = 0) 30 V
V DGR Drain- gate Voltage (R GS = 20 kΩ) 30 V
V GS G ate-source Voltage ± 20 V
o
I D (•) Drain Current (continuous) at Tc = 25 C 20 A
o
I D (•) Drain Current (continuous) at Tc = 100 C 20 A
I DM (••) Drain Current (pulsed) 80 A
o
P tot T otal Dissipation at Tc = 25 C 45 W
Derating Factor 0.3 W /o C
o
Ts tg Storage Temperature -65 to 175 C
o
Tj Max. Operating Junction Temperature 175 C
(•) Current Limited By The Package
(••) Pulse width limited by safe operating area

May 2000 1/6


STD29NF03L

THERMAL DATA
o
R thj -case Thermal Resistance Junction-case Max 3.33 C/W
o
R thj -amb Thermal Resistance Junction-ambient Max 62.5 C/W
o
Tl Maximum Lead Temperature F or Soldering Purpose 300 C

ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)


OFF
Symbo l Parameter Test Con ditions Min. Typ. Max. Unit
V (BR)DSS Drain-source I D = 250 µA V GS = 0 30 V
Breakdown Voltage
I DSS Zero Gate Voltage V DS = Max Rating 1 µA
Drain Current (V GS = 0) V DS = Max Rating T c =125 oC 10 µA
IGSS Gate-body Leakage V GS = ± 20 V ± 100 nA
Current (VDS = 0)

ON (∗)
Symbo l Parameter Test Con ditions Min. Typ. Max. Unit
V GS(th) Gate Threshold Voltage V DS = V GS ID = 250 µA 1 V
R DS(on) Static Drain-source On V GS = 10V ID = 15 A 0.018 0.023 Ω
Resistance V GS = 5V ID = 9 A 0.029 0.038 Ω
I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x 29 A
V GS = 10 V

DYNAMIC
Symbo l Parameter Test Con ditions Min. Typ. Max. Unit
g f s (∗) Forward V DS > ID(o n) x R DS(on )ma x I D =15 A 20 S
Transconductance
C iss Input Capacitance V DS = 25 V f = 1 MHz V GS = 0 750 pF
C os s Output Capacitance 270 pF
C rss Reverse Transfer 60 pF
Capacitance

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STD29NF03L

ELECTRICAL CHARACTERISTICS (continued)


SWITCHING ON
Symbo l Parameter Test Con ditions Min. Typ. Max. Unit
t d(on) Turn-on Delay T ime V DD = 15 V I D = 15 A 15 ns
tr Rise Time R G = 4.7 Ω V GS = 4.5 V 206 ns
(Resistive Load, see fig. 3)
Qg Total G ate Charge V DD = 24 V ID = 20 A V GS = 10 V 18 21 nC
Q gs Gate-Source Charge 3 nC
Q gd Gate-Drain Charge 5 nC

SWITCHING OFF
Symbo l Parameter Test Con ditions Min. Typ. Max. Unit
t d(of f) Turn-off Delay T ime V DD = 15 V I D = 15 A 33 ns
tf Fall T ime R G = 4.7 Ω V GS = 4.5 V 36 ns
(Resistive Load, see fig. 3)

SOURCE DRAIN DIODE


Symbo l Parameter Test Con ditions Min. Typ. Max. Unit
ISD Source-drain Current 20 A
I SDM (•) Source-drain Current 80 A
(pulsed)
V SD (∗) Forward On Voltage I SD =20 A V GS = 0 1.2 V
t rr Reverse Recovery I SD = 20 A di/dt = 100 A/µs 38 ns
Time V DD = 15 V T j = 150 o C
Q rr Reverse Recovery (see test circuit, fig. 5) 30 nC
Charge
I RRM Reverse Recovery 1.6 A
Current

(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %


(•) Pulse width limited by safe operating area

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STD29NF03L

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuits For Fig. 4: Gate Charge test Circuit
Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching


And Diode Recovery Times

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STD29NF03L

TO-252 (DPAK) MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

A 2.2 2.4 0.086 0.094

A1 0.9 1.1 0.035 0.043

A2 0.03 0.23 0.001 0.009

B 0.64 0.9 0.025 0.035

B2 5.2 5.4 0.204 0.212

C 0.45 0.6 0.017 0.023

C2 0.48 0.6 0.019 0.023

D 6 6.2 0.236 0.244

E 6.4 6.6 0.252 0.260

G 4.4 4.6 0.173 0.181

H 9.35 10.1 0.368 0.397

L2 0.8 0.031

L4 0.6 1 0.023 0.039

H
A

C2

A1

DETAIL ”A”
C

A2

L2 D
DETAIL ”A”
B
3
=

=
B2

G
E

2
=

=
1

L4
0068772-B

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STD29NF03L

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 2000 STMicroelectronics – Printed in Italy – All Rights Reserved


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