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  • 2 KBD

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    Tisho Lekov
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    The document describes the schematic and operation of a keyboard interface circuit. Key presses are encoded on a 4-bit data bus. When a key is pressed, a 4-bit code representing the key will be output on the data bus. The circuit uses a multiplexer to sequentially output the 4 bits that encode the pressed key over multiple clock cycles. It uses registers, decoders, and buffers to sequentially detect, decode, and output the key press codes.

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    2_KBD

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    The document describes the schematic and operation of a keyboard interface circuit. Key presses are encoded on a 4-bit data bus. When a key is pressed, a 4-bit code representing the key will be output on the data bus. The circuit uses a multiplexer to sequentially output the 4 bits that encode the pressed key over multiple clock cycles. It uses registers, decoders, and buffers to sequentially detect, decode, and output the key press codes.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    9 views10 pages

    2 KBD

    Uploaded by

    Tisho Lekov
    The document describes the schematic and operation of a keyboard interface circuit. Key presses are encoded on a 4-bit data bus. When a key is pressed, a 4-bit code representing the key will be output on the data bus. The circuit uses a multiplexer to sequentially output the 4 bits that encode the pressed key over multiple clock cycles. It uses registers, decoders, and buffers to sequentially detect, decode, and output the key press codes.

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    © All Rights Reserved
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    of 10

    +VCC

    Vout X Y D[0] X OE Y

    <100 000 OE_KBD 0 0 0


    100 000 -1000000
    >1 000000
    0 1 Z
    Push Pull 1 0 1
    1 1 Z

    Vout

    80-250ms 80-250ms

    >100 pressed
    Data Bus

    CS_KBD
    . BUF
    . CS_4
    .
    .

    OE
    CS_KBD
    ОЕ
    OE_KBD От къде
    OR
    CS_KBD ОЕ

    кога
    BUF
    data
    ОЕ CS_KBD AND OE_KBD = OR
    Valid data
    какво
    0 0 0 0 Чете се, от нас active OE_KBD
    0 1 0 1 Чете се, но не от нас z
    1 0 0 1 Не се чете, но от нас z
    1 1 1 1 Не се чете, не от нас z
    Data Bus
    +VCC
    0 0 B B10 B20 B30
    00
    Data from KBD
    1 1 B01 B11
    BUF
    2 B02 B12
    OE_KBD
    3 B03 B13

    1 Pull-UP
    0 +VCC
    1 1
    0
    1 1- passive
    REG 0 - active
    DEC Data from KBD
    1
    F – no pressed
    CLK_KBD E - 1110 – B00
    Zero HOT
    D - 1101– B01
    B - 1011– B02
    7 - 0111– B03
    X – else error
    Data Bus
    +VCC
    0
    B00 B10 B20 B30

    1 B01 B11
    BUF
    2
    B02 B12
    OE_KBD
    3
    B03 B13

    1
    1 +VCC
    0 0
    1 1- passive
    REG 0 - active
    DEC
    1
    CL:K_KBD F – no pressed – else error
    E - 1110 – B10
    D - 1101– B11
    B - 1011– B12
    7 - 0111– B13
    Data Bus
    +VCC
    0
    B00 B10 B20 B30

    1 B01 B11 B21


    BUF
    2
    B02 B12 B22
    OE_KBD
    3
    B03 B13 B23

    1
    1 +VCC
    1 0
    0 1- passive
    REG 0 - active
    DEC
    1
    CL:K_KBD F – no pressed – else error
    E - 1110 – B20
    D - 1101– B21
    B - 1011– B22
    7 - 0111– B23
    Data Bus
    +VCC
    0
    B00 B10 B20 B30

    1 B01 B11 B21


    BUF
    2
    B02 B12 B22 B32
    OE_KBD
    3
    B03 B13 B23

    1
    1 +VCC
    1 0
    1 1- passive
    REG 0 - active
    DEC
    0
    CL:K_KBD F – no pressed – else error
    E - 1110 – B30
    D - 1101– B31
    B - 1011– B32
    7 - 0111– B33
    Data Bus
    +VCC
    0
    B00 B10 B20 B30

    1 B01 B11 B2D


    21
    BUF
    2
    B02 B1B
    12
    B22 B32
    OE_KBD
    3
    B03 B13 B23

    1
    1 +VCC
    1 0
    1 1- passive
    REG 0 - active
    DEC
    0
    CLK_KBD F – no pressed – else error
    E - 1110 – B30
    B32-> 3B – позиционен код
    D - 1101– B31
    3 – Write in DEC
    B – Read from BUF B - 1011– B32
    7 - 0111– B33
    Data Bus
    +VCC
    0
    B00 B10 B20 B30

    1 B01 B11 B21


    BUF
    2
    B02 B12 B22 B32
    OE_KBD
    3
    B03 B13 B23

    1
    1 +VCC
    0 0
    1 1- passive
    REG 0 - active
    DEC
    1
    CL:K_KBD F – no pressed – else error
    E - 1110 – B30
    B12-> 1B
    D - 1101– B31
    1 – Write in DEC
    B – Read from BUF B - 1011– B32
    7 - 0111– B33
    Data Bus
    +VCC
    0
    B00 B10 B20 B30

    1 B01 B11 B21


    BUF
    2
    B02 B12 B22 B32
    OE_KBD
    3
    B03 B13 B23

    1
    1 +VCC
    0 0 0
    1 0 1- passive
    REG 0 - active
    DEC
    1
    CL:K_KBD F – no pressed – else error
    E - 1110 – B30
    B12-> 1B
    D - 1101– B31
    1 – Write in DEC
    B – Read from BUF B - 1011– B32
    7 - 0111– B33
    Измерване на капацитет:
    1. Резонансен – еталонна L, измерва се честота на повторение – до GHz( pF, nF)
    2. Заряд през източник на ток (еталонен ток) – измерва се продължителност на
    импулс, получен при достигане на две прагови нива- 100pF до 100uF
    3. Необходима еталонна честота – 10-6.

    VCC

    uc(t) = Iet*t/C->

    T=(Up2-Up1)/Iet*C

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