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DIGITAL ELECTRONICS

LAB REPORT

By

20L153 - VISHNUPRIYA S A S
20L154 - VISHWAJEETH M
20L155 - YOGADHARSHINI S

Ex No : 2
Date : 07.09.2021

IMPLEMENTATION OF BOOLEAN FUNCTIONS USING DATAFLOW MODELLING

AIM:

1. To implement the boolean functions with logic gates like AND, OR, NOR, NAND, NOT,
Ex-OR, Ex-NOR using dataflow modelling.

SOFTWARE USED:

The software used is EDA PLAYGROUND


1. BASIC GATES:

LOGIC DIAGRAM:
TRUTH TABLE:

AND GATE:

INPUT-1 INPUT-2 OUTPUT

0 0 0

0 1 0

1 0 0

1 1 1

OR GATE :

INPUT-1 INPUT-2 OUTPUT

0 0 0

0 1 1

1 0 1

1 1 1

NOT GATE:

INPUT OUTPUT

1 0

0 1

XOR GATE:

INPUT-1 INPUT-2 OUTPUT

0 0 0

0 1 1

1 0 1

1 1 0
NAND GATE:

INPUT-1 INPUT-2 OUTPUT

0 0 1

0 1 1

1 0 1

1 1 0

NOR GATE:

INPUT-1 INPUT-2 OUTPUT

0 0 1

0 1 0

1 0 0

1 1 0

Ex-NOR:

INPUT-1 INPUT-2 OUTPUT

0 0 1

0 1 0

1 0 0

1 1 1
PROGRAM:

Code for gates like AND, OR, XOR, NOR, NAND, XNOR,NOT.

DESIGN WINDOW:
TESTBENCH WINDOW:
SIMULATION WINDOW:

WAVEFORM:
2. SOME EXAMPLES OF BOOLEAN FUNCTIONS

1. F = abc + a’b’c’

LOGIC DIAGRAM:

TRUTH TABLE:

a b c a’ b’ c’ abc a’b’c’ F
0 0 0 1 1 1 0 1 1

0 0 1 1 1 0 0 0 0

0 1 0 1 0 1 0 0 0

0 1 1 1 0 0 0 0 0

1 0 0 0 1 1 0 0 0

1 0 1 0 1 0 0 0 0

1 1 0 0 0 1 0 0 0

1 1 1 0 0 0 1 0 1
PROGRAM:

Code for the function F = abc + a’b’c’

DESIGN WINDOW:
TESTBENCH WINDOW:
SIMULATION WINDOW:
WAVEFORM:

2. F = a^b + abc

LOGIC DIAGRAM:
TRUTH TABLE:

a b c abc a^b F
0 0 0 0 0 0

0 0 1 0 0 0

0 1 0 0 1 1

0 1 1 0 1 1

1 0 0 0 1 1

1 0 1 0 1 1

1 1 0 0 0 0

1 1 1 1 0 1

PROGRAM:

Code fo the function F = a^b +abc

DESIGN WINDOW:
TESTBENCH WINDOW:
SIMULATION WINDOW:
WAVEFORM:

RESULT:

Thus the boolean functions with logic gates using dataflow model are implemented and verified
using verilog code.

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