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Data Sheet: HCPL-0370, HCPL-3700, HCPL-3760
Data Sheet: HCPL-0370, HCPL-3700, HCPL-3760
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description Features
The HCPL-0370/3700 and HCPL-3760 are voltage/cur- • Standard (HCPL-0370/3700) and low input current
rent threshold detection optocouplers. The HCPL-3760 is (HCPL‑3760) versions
a low-current version of the HCPL-0370/3700. To obtain • AC or DC input
lower current operation, the HCPL-3760 uses a high-effi-
ciency AlGaAs LED which provides higher light output at • Programmable sense voltage
lower drive currents. The devices utilize threshold sens- • Hysteresis
ing input buffer ICs which permit control of threshold • Logic compatible output
levels over a wide range of input voltages with a single
external resistor. • Thresholds guaranteed over temperature
• Thresholds independent of LED optical parameters
The input buffer incorporates several features: hysteresis
for extra noise immunity and switching immunity, a di- • Recognized under UL 1577 and CSA approved for
ode bridge for easy use with ac input signals, and inter- dielectric withstand proof test voltage of 3750 Vac, 1
nal clamping diodes to protect the buffer and LED from minute
a wide range of over-voltage and over-current transients.
Because threshold sensing is done prior to driving the
Applications
LED, variations in optical coupling from the LED to the • Limit switch sensing
detector will have no effect on the threshold levels. • Low voltage detector
Functional Diagram • AC mains and DC link voltage detection
• Relay contact monitor
AC 1 8 VCC • Relay coil voltage monitor
• Current sensing
DC+ 2 7 NC • Microprocessor interfacing
DC- 3 6 VO
AC 4 5 GND
TRUTH TABLE
(POSITIVE LOGIC)
INPUT OUTPUT
H L
L H
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
The HCPL-0370/3700’s input buffer IC has a nominal turn on threshold of 2.5 mA (ITH +) and 3.7 volts (VTH +).
The buffer IC for the HCPL-3760 was redesigned to permit a lower input current. The nominal turn on threshold for the
HCPL-3760 is 1.2 mA (ITH +) and 3.7 volts (V TH +).
The high gain output stage features an open collector output providing both TTL compatible saturation voltages and
CMOS compatible breakdown voltages.
By combining several unique functions in a single package, the user is provided with an ideal component for indus-
trial control computer input boards and other applications where a predetermined input threshold level is desirable.
Ordering Information
HCPL-0370/HCPL-3700/HCPL-3760 is UL Recognized with 3750 Vrms for 1 minute per UL1577 unless otherwise
specified.
Option UL 5000
Part RoHS Non-RoHS Surface Gull Tape Vrms/1 IEC/EN/DIN
number Compliant Compliant Package Mount Wing & Reel Minute EN 60747-5-5 Quantity
HCPL- -000E No option SO-8 X 100 per tube
0370 -500E -500 X X 1500 per reel
-060E NA X X 100 per tube
-560E NA X X X 1500 per reel
HCPL- -000E No option 300 mil 50 per tube
3700 -300E #300 DIP-8 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E -020 X 50 per tube
-320E -320 X X X 50 per tube
-520E -520 X X X X 1000 per reel
-060E NA X 50 per tube
-360E NA X X X 50 per tube
-560E NA X X X X 1000 per reel
HCPL- -000E No option 300 mil 50 per tube
3760 -300E #300 DIP-8 X X 50 per tube
-500E #500 X X X 1000 per reel
-060E NA X 50 per tube
-360E NA X X X 50 per tube
-560E NA X X X X 1000 per reel
Note:
NA = Not available.
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1: HCPL-3760-500E to order product of Gull Wing Surface Mount package in Tape and Reel packaging with
and RoHS compliant.
Example 2: HCPL-3700 to order product of 300 mil DIP package in Tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July 15, 2001 and
RoHS compliant will use ‘–XXXE.’
2
Schematic
8 7 6 5
TYPE NUMBER 0.20 (0.008)
DATE CODE 6.10 (0.240) 0.33 (0.013)
A XXXX
6.60 (0.260)
YYWW RU 7.36 (0.290)
7.88 (0.310) 5° TYP.
UL
PIN ONE 1 2 3 4 RECOGNITION
3
Package Outline Drawings, continued
Gull Wing Surface Mount Option 300 (HCPL-3700/3760)
LAND PATTERN RECOMMENDATION
9.65 ± 0.25
(0.380 ± 0.010) 1.016 (0.040)
8 7 6 5
TYPE NUMBER
DATE CODE
A XXXX 6.350 ± 0.25
10.9 (0.430)
YYWW RU (0.250 ± 0.010)
1 2 3 4
MOLDED
UL 2.0 (0.080)
RECOGNITION 1.27 (0.050)
8 7 6 5
5.994 ± 0.203
(0.236 ± 0.008)
XXX
3.937 ± 0.127 YWW TYPE NUMBER 7.49 (0.295)
(0.155 ± 0.005) (LAST 3 DIGITS)
DATE CODE
PIN ONE 1 2 3 4
1.9 (0.075)
0.406 ± 0.076
(0.016 ± 0.003) 1.270 BSC
(0.050) 0.64 (0.025)
3.175 ± 0.127
(0.125 ± 0.005) 0 ~ 7° 0.228 ± 0.025
1.524
(0.009 ± 0.001)
(0.060)
0.203 ± 0.102
(0.008 ± 0.004)
* TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 0.305 MIN.
5.207 ± 0.254 (0.205 ± 0.010) (0.012)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
4
Solder Reflow Thermal Profile
300
PREHEATING RATE 3¡C + 1¡C/Ð0.5¡C/SEC.
REFLOW HEATING RATE 2.5¡C ± 0.5¡C/SEC. PEAK
PEAK
TEMP.
TEMP.
245¡C
240¡C
PEAK
TEMP.
230¡C
200
TEMPERATURE (¡C)
2.5¡C ± 0.5¡C/SEC.
SOLDERING
30 TIME
160¡C
150¡C SEC. 200¡C
140¡C
30
3¡C + 1¡C/Ð0.5¡C SEC.
100
PREHEATING TIME
150¡C, 90 + 30 SEC. 50 SEC.
TIGHT
ROOM TYPICAL
TEMPERATURE LOOSE
0
0 50 100 150 200 250
TIME (SECONDS)
25
t 25 °C to PEAK
TIME
NOTES:
THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 °C, Tsmin = 150 °C
Regulatory Information
The HCPL-0370/3700/3760 has been approved by the following organizations:
5
Insulation and Safety Related Specifications
8-Pin DIP
(300 mil) SO-8
Parameter Symbol Value Value Units Conditions
Min.. External Air Gap L(IO1) 7.1 4.9 mm Measured from input terminals to output
(External Clearance) terminals, hortest distance through air
Min.. External Tracking L(IO2) 7.4 4.8 mm Measured from input terminals to output
Path (External Creepage) terminals, shortest distance path along body
Min.. Internal Plastic 0.08 0.08 mm Through insulation distance, conductor to
Gap (Internal Clearance) conductor, usually the direct distance between
the photoemitter and photodetector inside the
optocoupler cavity
Tracking Resistance CTI 200 200 V DIN IEC 112/VDE 0303 PART 1
(Comparative
Tracking Index)
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
6
Absolute Maximum Ratings (No derating required up to 70°C)
Parameter Symbol Min. Max. Units Note
Storage Temperature TS -55 125 °C
Operating Temperature TA -40 85 °C
Lead Soldering Cycle Temperature 260 °C 1
Time 10 s
Input Current Average 50 2
Surge IIN 140 mA 2, 3
Transient 500
Input Voltage (Pins 2-3) VIN -0.5 V
Input Power Dissipation HCPL-3700/3760 PIN 230 mW 4
HCPL-0370 172
Total Package Power Dissipation HCPL-3700/3760 PT 305 mW 5
HCPL-0370 275
Output Power Dissipation HCPL-3700/3760 PO 210 mW 6
HCPL-0370 103
Output Current Average IO 30 mA 7
Supply Voltage (Pins 8-5) VCC -0.5 20 V
Output Voltage (Pins 6-5) VO -0.5 20 V
Solder Reflow Temperature Profile See Package Outline Drawings section
7
Electrical Specifications
Over Recommended Temperature TA = 0°C to 70°C, Unless Otherwise Specified.
Parameter Sym. Device Min. Typ.[9] Max. Units Conditions Fig. Note
Input ITH+ HCPL-0370/3700 1.96 2.5 3.11 mA VIN = V TH+; VCC = 4.5 V; 2, 3 14
Threshold HCPL-3760 0.87 1.2 1.56 VO = 0.4 V; IO ≥ 4.2 mA
Current
ITH- HCPL-0370/3700 1.00 1.3 1.62 VIN = V TH-; VCC = 4.5 V;
HCPL-3760 0.43 0.6 0.80 VO = 2.4 V; IOH ≤ 100 µA
Input DC VTH+ 3.35 3.7 4.05 V VIN = V2 - V3; Pins 1 & 4 Open
Threshold (Pins VCC = 4.5 V; VO = 0.4 V;
Voltage 2, 3) IO ≥ 4.2 mA
VTH- 2.01 2.6 2.86 V VIN = V2 - V3; Pins 1 & 4 Open
VCC = 4.5 V; VO = 2.4 V;
IO ≤ 100 µA
AC VTH+ 4.23 4.9 5.50 V VIN = |V1 - V4|; 14, 15
(Pins Pins 2 & 3 Open
1, 4) VCC = 4.5 V; VO = 0.4 V;
IO ≥ 4.2 mA
VTH- 2.87 3.7 4.20 V VIN = |V1 - V4|;
Pins 2 & 3 Open
VCC = 4.5 V; VO = 2.4 V;
IO ≤ 100 µA
Hysteresis IHYS HCPL-0370/3700 1.2 mA IHYS = ITH+ – ITH- 2
HCPL-3760 0.6
VHYS 1.2 V VHYS = V TH+ – V TH-
Input Clamp VIHC1 5.4 6.0 6.6 V VIHC1 = V2 - V3; V3 = GND; 1
Voltage IIN = 10 mA; Pins 1 & 4
Connected to Pin 3
VIHC2 6.1 6.7 7.3 V VIHC2 = |V1 - V4|;
|IIN| = 10 mA;
Pins 2 & 3 Open
VIHC3 12.0 13.4 V VIHC3 = V2 - V3; V3 = GND;
IIN = 15 mA; Pins 1 & 4 Open
VILC -0.76 V VILC = V2 - V3; V3 = GND;
IIN = -10 mA
Input Current IIN HCPL-0370/3700 3.0 3.7 4.4 mA VIN = V2 – V3 = 5.0 V 5
HCPL-3760 1.5 1.8 2.2 Pins 1 & 4 Open
8
Switching Specifications
TA = 25°C, VCC = 5.0 V, Unless Otherwise Specified.
Parameter Sym. Device Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay HCPL-0370/3700 4.0
Time to Logic Low tPHL 15.0 µs RL = 4.7 kW, CL = 30 pF 10
at Output HCPL-3760 4.5
7, 10
Propagation Delay HCPL-0370/3700 10.0
Time to Logic High tPLH 40.0 µs RL = 4.7 kW, CL = 30 pF 11
at Output HCPL-3760 8.0
HCPL-0370/3700 20
Output Rise Time tr µs RL = 4.7 kW, CL = 30 pF
(10-90%) HCPL-3760 14
8
HCPL-0370/3700 0.3
Output Fall Time tf µs RL = 4.7 kW, CL = 30 pF
(90-10%) HCPL-3760 0.4
Common Mode IIN = 0 mA, RL = 4.7 kW,
Transient Immunity |CMH| 4000 V/µs VO min = 2.0 V, VCM = 1400 V
at Logic High Output
9, 11 12, 13
Common Mode HCPL-0370/3700 IIN = 3.11 mA RL = 4.7 kW,
Transient Immunity |CML| 600 V/µs VO max = 0.8 V,
at Logic Low Output HCPL-3760 IIN = 1.56 mA VCM = 140 V
Package Characteristics
Over Recommended Temperature TA = 0°C to 70°C, Unless Otherwise Specified.
Parameter Sym. Min. Typ.[9] Max. Units Conditions Fig. Note
Input-Output Momentary VISO 3750 V rms RH 50%, t = 1 min; 16,
Withstand Voltage* TA = 25°C 17
Option 020 5000 18
Input-Output Resistance RI-O 1012 W VI-O = 500 Vdc 16
Input-Output Capacitance CI-O 0.6 pF f = 1 MHz; VI-O = 0 Vdc
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous volt-
age rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable), your equipment
level safety specification, or Avago Application Note 1074, “Optocoupler Input-Output Endurance Voltage.”
9
Notes:
1. Measured at a point 1.6 mm below seating plane.
2. Current into/out of any single lead.
3. Surge input current duration is 3 ms at 120 Hz pulse repetition rate. Transient input current duration is 10 µs at 120 Hz pulse repetition rate.
Note that maximum input power, PIN, must be observed.
4. Derate linearly above 70°C free-air temperature at a rate of 4.1 mW/°C (HCPL-3700/3760) and 3.1 mW/°C (HCPL-0370). Maximum input power
dissipation of 230 mW (HCPL-3700/3760) and 172 mW (HCPL-0370) allows an input IC junction temperature of 125°C at an ambient tempera-
ture of TA = 70°C. Excessive PIN and TJ may result in IC chip degradation.
5. Derate linearly above 70°C free-air temperature at a rate of 5.4 mW/°C (HCPL-3700/3760) and 5 mW/°C (HCPL-0370).
6. Derate linearly above 70°C free-air temperature at a rate of 3.9 mW/°C (HCPL-3700/3760) and 1.9 mW/°C (HCPL-0370). Maximum output
power dissipation of 210 mW (HCPL-3700/3760) and 103 mW (HCPL-0370) allows an output IC junction temperature of 125°C at an ambient
temperature of TA = 70°C.
7. Derate linearly above 70°C free-air temperature at a rate of 0.6 mA/°C.
8. Maximum operating frequency is defined when output waveform Pin 6 obtains only 90% of VCC with RL = 4.7 kΩ, CL = 30 pF using a 5 V square
wave input signal.
9. All typical values are at TA = 25°C, VCC = 5.0 V unless otherwise stated.
10. The tPHL propagation delay is measured from the 2.5 V level of the leading edge of a 5.0 V input pulse (1 µs rise time) to the 1.5 V level on the
leading edge of the output pulse (see Figure 10).
11. The tPLH propagation delay is measured from the 2.5 V level of the trailing edge of a 5.0 V input pulse (1 µs fall time) to the 1.5 V level on the
trailing edge of the output pulse (see Figure 10).
12. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common
mode pulse, VCM, to insure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in Logic Low
level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to insure that the output will
remain in a Logic Low state (i.e., VO < 0.8 V). See Figure 11.
13. In applications where dVCM/dt may exceed 50,000 V/µs (such as static discharge), a series resistor, RCC, should be included to protect the de-
tector IC from destructively high surge currents. The recommended value for RCC is 240 ý per volt of allowable drop in VCC (between Pin 8 and
VCC) with a minimum value of 240 ý.
14. Logic low output level at Pin 6 occurs under the conditions of VIN ž V TH+ as well as the range of VIN > V TH– once VIN has exceeded V TH+. Logic high
output level at Pin 6 occurs under the conditions of VIN V TH- as well as the range of VIN < V TH+ once VIN has decreased below V TH-.
15. AC voltage is instantaneous voltage.
16. Device considered a two terminal device: Pins 1, 2, 3, 4 connected together, and Pins 5, 6, 7, 8 connected together.
17. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage
detection current limit, Ii-o ≤
5 µA).
18. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage
detection current limit, Ii-o ≤
5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/
EN/DIN EN 60747-5-5 Insulation Characteristics Table.
10
HCPL-0370/3700 HCPL-3760 100
4.2 3.2
3.8 1.4
Figure 3. Typical DC threshold levels vs. temperature. HCPL-3700 fig 3b Figure 4. Typical high level supply current, ICCH vs.
HCPL-3700 fig 4
temperature.
HCPL-0370/3700 HCPL-3760
4.2 240 2.1 240
VOL – LOW LEVEL OUTPUT VOLTAGE – mV
TA – TEMPERATURE – °C TA – TEMPERATURE – °C
Figure 5. Typical input current, IIN, and low level output voltage, VOL, vs. temperature.
HCPL-3700 fig 5b
HCPL-0370/3700 HCPL-3760
4.00 3.00
ICCL – LOGIC LOW SUPPLY CURRENT – mA
3.50
2.50
3.00
2.00
2.50
2.00 1.50
1.50
1.00
1.00
0.50
0.50
0 0
4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0
11
HCPL-0370/3700 HCPL-3760
24 24
RL = 4.7 kΩ RL = 4.7 kΩ
22 CL = 30 pF 22 CL = 30 pF
VCC = 5.0 V VCC = 5.0 V
20 20
tp – PROPAGATION DELAY – µs
tp – PROPAGATION DELAY – µs
5.0 V 5.0 V
18 VIN = 1 ms PULSE WIDTH 18
VIN = 1 ms PULSE WIDTH
f = 100 Hz f = 100 Hz
16 tr, tf = 1 µs (10-90%) 16
tPLH tr, tf = 1 µs (10-90%)
14 14 tPLH
12 12
10 10
8 8
6 6
4 tPHL 4 tPHL
2 2
0 0
-40 -20 0 20 40 60 80 -40 -25 0 25 50 75 85
TA – TEMPERATURE – °C TA – TEMPERATURE – °C
HCPL-0370/3700 HCPL-3760
60 600 30 700
RL = 4.7 kΩ
CL = 30 pF
VCC = 5.0 V
50 500 25 600
5.0 V
VIN = 1 ms PULSE WIDTH
f = 100 Hz
tf – FALL TIME – ns
tf – FALL TIME – ns
tr – RISE TIME – µs
tr – RISE TIME – µs
30 300 15 tf 400
RL = 4.7 kΩ
tr CL = 30 pF
20 200 10 VCC = 5.0 V 300
5.0 V
tr 1 ms PULSE WIDTH
VIN =
10 tf 100 5 f = 100 Hz 200
tr, tf = 1 µs (10-90%)
0 0 0 100
-40 -20 0 20 40 60 80 -40 -25 0 25 50 75 85
TA – TEMPERATURE – °C TA – TEMPERATURE – °C
5000
VCC = 5.0 V
IIN = 3.11 mA (0370/3700)
IIN = 1.53 mA (3760)
4000 VOL = 0.8 V
RL = 4.7 kΩ
TA = 25 °C
3000
500
0
0 400 800 1200 1600 2000
12
Figure 10. Switching test circuit.
Figure 11. Test circuit for common mode transient immunity and typical waveforms.
13
For interfacing ac signals to TTL systems, output low
pass filtering can be performed with a pullup resistor of
1.5 kW and 20 µF capacitor. This application requires a
Schmitt trigger gate to avoid slow rise time chatter prob-
lems. For ac input applications, a filter capacitor can be
placed across the dc input terminals for either signal or
transient filtering.
Either ac (Pins 1, 4) or dc (Pins 2, 3) input can be used to
Figure 13. External threshold voltage level selection. determine external threshold levels.
For one specifically selected external threshold voltage
Electrical Considerations level V+ or V-, RX can be determined without use of RP via
The HCPL-0370/3700/3760 optocouplers have internal
temperature compensated, predictable voltage and cur- V+ - V TH+
rent threshold points which allow selection of an exter- (-) (-)
nal resistor, RX, to determine larger external threshold RX = (1)
voltage levels. For a desired external threshold voltage, ITH+
V±, a corresponding typical value of RX can be obtained (-)
from Figure 12. Specific calculation of RX can be obtained
from Equation (1). Specification of both V+ and V- voltage For two specifically selected external threshold voltage
threshold levels simultaneously can be obtained by the levels, V+ and V-, the use of RX and RP will permit this selec-
use of RX and RP as shown in Figure 13 and determined by tion via equations (2), (3) provided the following condi-
Equations (2) and (3). tions are met. If the denominator of equation (2) is posi-
RX can provide over-current transient protection by tive, then
limiting input current during a transient condition.
For monitoring contacts of a relay or switch, the HCPL- V+ V TH+ V+ - V TH+ ITH+
0370/3700/3760 in combination with RX and RP can be
≥ and <
used to allow a specific current to be conducted through V- V TH- V- - V TH- ITH-
the contacts for cleaning purposes (wetting current).
The choice of which input voltage clamp level to choose Conversely, if the denominator of
depends upon the application of this device (see Figure equation (2) is negative, then
1). It is recommended that the low clamp condition be
used when possible. V+ V TH+ V+ - V TH+ ITH+
≤ and >
The low clamp condition in conjunction with the low V- V TH- V- - V TH- ITH-
input current feature will ensure extremely low input
power dissipation.
V TH- (V+) - V TH+ (V-)
In applications where dVCM/dt may be extremely large RX = (2)
(such as static discharge), a series resistor, RCC, should ITH+ (V TH-) - ITH- (V TH+)
be connected in series with VCC and Pin 8 to protect the
detector IC from destructively high surge currents. See V TH- (V+) - V TH+ (V-)
Note 13 for determination of RCC. In addition, it is recom RP = (3)
mended that a ceramic disc bypass capacitor of 0.01 µF ITH+(V--V TH-)+ITH-(V TH+-V+)
be placed between Pins 8 and 5 to reduce the effect of
power supply noise.
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes AV01-0542EN
AV02-2107EN - September 2, 2009