Pst 5 Combinational Logic Design SOLVED PROBLEMS Given the opel equation (480) (B+C4) 60 Design a cit using gate to rate thi urction. Spey the umber of gle required. Ba. (St, here are three it logical variables 4, B, and Cand Yin the outst ‘Acti ting aster can snply be designed by looking at se ex pression and finding out the bai ater whic aa Beutel to realie the various ers and then connect these ates appropri (The fa term (A) has only one literal A and the seco0d term (Be) bas two Heals Bao C. The socnd tr i ecogaizat fen AND operation and oun be realised by using 2 Dasput ‘sb gate. The combination of thee to tera reed by thing. 2inpot OR gue The comple relation of the int two term it shown in Fig 5. (0. (G) The ei teem B) i agai single tera tem and he Fourth term (CA) ba tm Irs, The combieation of tebe to terns ‘similar oth combination of he iat wo terms and real 22d in a snilar way, This resization i showin Fig 81 () i) Now the complete realization is ebained by using & 2oput ‘xo gate. With and Ya asthe ints and the ouput of is {at Wl be the eequred outpat Y (Fig. 51 (@). The complet ‘eallztion i gives in Fg 52. Psa ‘The numberof gies required are: 3°" "Sinpat ax sues, 2 Diapat on rates 1 Nor inert ante Convert Ea. (5:1) 0 sum-oF products (SOP) form and design the ‘Grout esng nly (4) 280 and O® eles (0) SAND gates Asse that he variables ar avaliable complemented as wll as uscomple: rented forms, Ses the numberof gates reqied is each case soLuTion ‘Using Boolean slesbrae theorems Eq, (1) ca be writen Ved (B+C4+(0C)(B+CA) (Theorem 89) AB ACA+BCBYBCEA (Theorem BS) (3.2) naBtAC+EC 63)4¢ Di crt ree Pre nd Son Eauation (5) abun tom E (82) nh atoning MAA Ona i a hrm sean p cone Chern KCNC OAno4 Geen Therm 3) Tht ett pein (3) (Th pecan of By (5)6 be eae ne Sabot ange bute of Theorem Bt comin! age Dn 117 Cconvest Ea (5:1) t9 prodact.sums (POS) form and. design ‘Groat ssing ony (a) Om and AND gates () 80K ete. Use the ‘Suumion given in P52. Spec the amber of gates cequced in cache souwrion (a) Using Boolean stgebrac theorems Eq, (1) ca be ween as Sicily cde aoa, mm Parteners args fas afns esas Tia prep ini re cis eh ae tate. This aliaion requis ts noel Slaps zon equi te Bapt mppae cay of (©) Using De-Morgen's theres it es eorem (Theorem B22) we can wre PadaraCpRe iy ae Be rena where Ye read Yomi 64 aun (54) can be 2a. regia feed by sing only 490 gin Fie $30). Thaw tho wt *¢ 2 input and one 3-input MAND gatos a Te eretaton Eg. (5) aoa a OS orm Tuscra evened wing Om00 coufguraon a ove in Fir 34 () heh tho tooled emton trees fie Hinge Om ps ad one Spo 0 (Ving DeMongenterem Phone BEE, 3) an Be TeatDUO TO =O HFOH EO or YaYutYovte Wine 12-758 ree rendre ein (5) cn reli by ng YOR pts oly. Ti fltaion gwen a Pp 54 () shoh iaio stwoie ‘alentoe segues he apt nd one pu pe 69Ps pss iat Herne a Meet: robin Sao (a) Simply aq, (53) and rele wang only nan gates (©) Simply Eq. (S) and reabze wing ony Wom pte ‘Specify the nasber of aes ead (4) Using Theorem B 19, Ba (53) cam be ween a aceat en 1s elation using xaxo-van configuration it shown ia Fig. 3.3 a). Tears three ingot nan ites ony (Using Theorem B20 Eq, (5) canbe writen at (Ato) (B42) is realization usieg Nom-N0R configuration is shown in Fig, 55 (1 equi three input om ges ony, [eer & Fess Y Compare the vations crate obtained in PS to PSA for a, (1) {om the pont of view of numberof gates, number of put for the eis, (es of gts, and propagation delay. ‘The reization of Fig. 52 node maximem aumber of ge Also it sa threedeel retaton(assumiag © is avalale) wich Increases the propagation delay tine which i same as decrease in ‘speed of operation. The ure of two types of gales AND and 08) vil in aeeca increas the number of 1Cs becaie they ar valle ‘lin diferent 1C packages. Realization of Figs. 53, 5, abd 53 te only one ype of ges ( Pes () ts Kemp i given in Fig. .25(4) fom which we obtain mia ‘mio expression for fat fd (BBO)+4 (CD) Ie relation wing #808 gates ie sven in Fg. 5:25 (0) which reste to 2npst AND ges and one Piapu O ate in adi tion to eon pxee 1p, =] Aeon woe re 28 {yt Kea i given in Fig. 5:26 (a) whic leads to fir iC (BOD) AC (BED) (4s) (88D) rennin wing 00 pte i shown in Fg, $26 (0) which ts ae apt an gate io addision to SCOR ENS ae Obes ey MER eo b “GE el LGan i me 6 2 party bit for 950 eveatr to geterate az 94d parity Bit sas Designs pacsy Ot ea. trond Us 08 and souvnion to Ais nnd 10 ma ne uh blo dog pu v0 mae ae ting word eto od ena TA 56“The Komap for Po ie siven in Fig. 5.27 (a, rom which P isobain- PyadC (BQD)+-AC(B@D)+ ACIBOD)+ACHOD) (480)1B+D) is reliation wing B4-08 and OR gate igen n Fig, 527 (8). ges) p> 28 oo] ape. or Ce ro [SOLAR S24 Repeat P23 fr an even party bit Comet Lae Deen 138 soLuTion “Te uth tbl for this je gven Table 36. 1s Kemp i given fm Fe Sas (o) trom which Pr obtained Pe-A@BBCOD ‘us realization wing #X-08 guts sven in Fig. 528 ooo or 11 10, SALA “ADL Aa} as ign one tain es (MA, BC, DEP) =D (6.9513 (fA, B.C.D.EF) AM (567 8 12513, 16,17, 18, 19,2122 25,28 32 55.31, 38,39, 40. 19,25, 27,241, 4557 61) sownos (w TheKemap ing (is Given in Fg, $29. The minimized ex presi for fi focKBODE+ABCDE-+CEF+ABCDEF ‘The cat for can be realized using NAND ates Fe arc con minimize using Cs which wil lea toa ire realabe by 60% Bs (oy Toe ap sing 1 ives i$ preton fo fis folds BC+ DEES P) U+B+D+ BFP) EBL CHELAAYCHDT ETP) (AbBHCSESA (AF B+CHE+E) (BECHESA)AYB+ C+D) (4b B+ D4E)(B+CHD+B) (HCE DA (A+B+C+D) 30, The minimied exFoo on a Comin Le Dien 12 ‘esse f canbe mplemeated with WOR snes. Sinai minimising weg 1 wil ead to an exprenionreaiable by SUPPLEMENTARY PROBLEMS Reale the following loge! Fnctions wing basic ges. Don't si ily the expressions. @ F=aaeo+4c ©) BAUD (BOA @ nota Realize the ollomig og! fnctios without simplication, Use 80, 08, SOF gates () aac achae ac (>) Fey (ara4ey (Bre) A ‘Using Boolean algehraic theorems express he fog functions of 526 in SOP form and realize in (a) AND-OK configuration () asb-tano codguaton. Dow’ simpiy te expresion Using Boolean algshri tones expres he logical fncton of S349) in FOS for an salina) oF-AND contgratio () ‘oK-v0R configuration Dont imply the exrenion Reais the logal function of 5.27) without smplileaon sig nly MND gate Reale the logical fnction of PS 21() without simplifeaton wing only No gate Mate the fut abe forthe logel fection JmABb ACh CAD +ABCH ABC Torte ope ccat shown in Fig. 3314 YU prepares tat abe 4) determine expresion for repens [)- es3t18 Dig Rect Meroe: Pes Shs Contin Lage Deen 19 PSM Deen ne expres forthe apa and the ta ‘ireuits of Figs. 5.32 through 5. ena oe write the loi fnction of 532 ia (a) standard SOP form (9) suandacd POS form Write logit frst o P53 in dard form. ininze the logical uncon of P526 wing I's and eae the Mintgring miriam mse of SAND pte 1s. Spey te IC packages ears 1 nme the logal actions of 526 wing Os aad eae. he Mini dog, minimum numberof SOR gate IC. Specify the 1C packages rire. ssa Minnie he gel ection of P51) and ee wing mi Miniter of wax gate IC, Specify te IC packs required | pss Minis the lage fncton of P5270) and eae sng. i isimyumber of 1k gat IC. Spey he IC packages requ psd Miiaie the logic! exresin of P32 and rai using mininn Mier of (@) MAND ate TCE (0) NOK gte IC. Specify the IC packages regoired in each ease ‘pss Obtain misinized SOP expesion for the circuit of P33 and realize ing NAM gates ‘pss Make the ruth able ofa flladder ciruit and reaie i osng Uninimum number of MAND HIS. sar A common anode ‘-tgment LED display is shown in Fig. 535. eign # BCD-o-Panpmeat decoder cei fo hs, r sel DIO TD PAIS Cones te expen o azn th sein al In 52 Hadar SO am P36. Comer he si csoreion ohn P59 stan letter pu w obin i exgrcon eely ie standard SOP expression obtained in PS.35. a PSI7 Conver the exreston gi 7 one te xeon ven a P27 tna frm, Ue Book 0° ress REVIEW QUESTIONS (WITH ANSWERS), [RSA What are te advantages of minimizing login expresions? ihn ead savings in cot, space, and power requirements.14 ig arse an Mireracr Problem a Soe ‘R52 What is meant bys combinatoaal etait ‘Ams Alone circuit in whieh the output) a ay insant of time ean cca a pete als ‘AL isa prion otl-to-bnay encode. If more than one inputs are given inthe same chi, the bigheroumbered input Wl appest in he bia form a the ont ‘Iftwo inputs are gies smutascoualy, one of which in ICL and {he other ane in C2, then £0 of TC2 wil e HIGH, whi wi is bl the ICI chip. This shows thatthe cuit na priority encoder, P628_Design the following cst (a) 742 BoD-todecimal decoder ving ten LEDs. (6) Midt BCD-todecimaldesoder driving a Nine tbe (@) The ctu i shown in Fig. 6.28. The LED cocesponding to ‘he BCD input wl glow (@) The sii shown ia Fg. 626 10¥ combat Lge Ds Ce MSCs 16 ~ rune tone = BCD not 629 Consider the four dig Pement diolay 6627 Design the complete play nse. system showe in FigContes agi Dien Ung MSCs 1 ‘The fessigicat bits of te BCD agave applied the data Inputs of aad selrlybigerordr bis ate applied £0 Ma Ms Ana Me The. select inp are fed rom the mods counter, which . Giver « BCD-to-ceimaldvodee. "The muller outputs are decoded by the BCD-o-7aepmeat éetoder wih active low outputs. When the counter ostput 0, flip ais seed and ath ame time anode 4s gos HIOH, there ty dilaying the digit 4 the leftmost Tsgment pay. Sin levy when thecounter outputs are 1, and 1 8, C, and D digs a dislayed respectively second, third and forth pays in sot ti way eth dpay wil be ON for one Fourth ofthe ‘SOLUTION Me gay Aone ‘time, Ifthe clock frequency is sufficiently high, the display ete fur BCD sigs be 4c, oud appara cota EeBeinc BCD it be 40, wih « a MS Hues 1 1630 commonly ned day tem Anon as 7 det maine shows par opus as sho a Fp ep thr 629) Tiedt dap lphnanerie charset ooo Sone spel mile Ire oe opty fine ty eh ‘prunes pm flowing ofthe dos shown io F623 & UB Decpn soa Sa or op sy 5 eile eas (em toms esac pti 4 ao oat P eneilienteraen | ® of joy sete . . Beh sys, ee mows [ODL D | tee Sell | Lemar SPST cr cathodes] se ee ee mead Po eb OI jofecetse] se pee oe ES TE 7 qT] ! “) ® { me 6 Ty seven Fer Rolo, the np eid at the row for eh clan ae Modee coun Bivciatbe 6 a “The circuit to be designed in a way similar to that of P6.29. ne Bitarman plow aati in agence Seen 3: mule ia maak Ses aol a mod counter val be required fr his cloen172 Dg cn ad ere Peat Pasa Poss oe Peas P36 Pear Pat SUPPLEMENTARY PROBLEMS Design a4 | multplener with stvetow enable opt using NAND pee Irplement te expesion M114, B,C, Dl=3Sm (02 3.68.8, 12,18) wing 416: | mal plese. Reale the ogc fmcion of P62, wing an 8: amlpene and lepiement a one-out.of 2 dat ler asing wo 16: | muileer 1CL74150, one iver and one AND pt. Ts he out of thi Inpleent a one-out of 3 ta lotr aing wo 16: mailer C3 74150 and oe 21 moepexer IC 74137 Design s BCD0-Gray code converter wing 1:16 demliplener (active tw outpte) and WAND ges. Design Grayto-BCD cde converte tng 16; 1 moles IC and compar the IC package egured with tht in PS sign an Fine 40256 in snd with activelow outputs wing ‘Hine 16 in decoders having atvelow cable aad outpus. Inplemcn! a Ssneto2spe decode with Stve-ow outpats wing (0 sineo- tine deceders wth actvelow enable and outpte plain the operation ofthe ret of Fig. 69 if FEDCBA™ 100104 Explain the opsation ofthe cuit of Fig 63036 YsXANG¥E¥.X f@) t0t000 ©) 100000 © on110 Design a 4bi 10s complementer wing a ic ade. Pt Poss 6.46 Pat Pas P69 R62 Res Rea Res Comin! ag rn inet Ces 17 Design its compementer using a it adder Desi a single it BCD ar. Desi singe digit BCD subratr. Dignan Bit adderfubractor aig two Abit ALU ICs 748 Designs Sit comparator ung ingle 7485 and one ate. Desig a Ait od parity checker ong single 7180 and ap nvr Design a 10-bit even pity generator sing single 74180 and an Design a 16 even party checker using two 74180 REVIEW QUESTIONS (WITH ANSWERS) What a tilenr? late Tena logic iui that ges one out of several inputs 8 single ontpet Cana mupiener be wt ete opicanction? 1 ye in what (sive reateaion is eter than the realization wing ate. Ihae Ye.) Siifention of ogi fonction ot reauired, (i) 1C package count i rucel Ai) Relabiy. ofthe sytem is improved because of {he reduction io the sumber of external wied ‘What isthe winimum nomberof'slection ine equi for selet= oe ou Fiat ie Ans." nmlopillog2 What isa demulupener? iass_ viva logic cei that asp one data input and ditbates i over seve outputs ‘Wat is a devotee? 5 [Ane Tc ilo vu hat codes fom binary to otal desimal tenadecinalo any ther ede soch as Taepsea compte ene ih ee aor titrant np att if pot tines, A decoder on the otherand does not have the ete trae ed in en iy wat cana deni teva ste eemen 136, Stange on teion na et174 gta nea an Merce: Prensa Sos Reo Renn Res Rats Res Rear Ame Yeu () Simplieation of lope function snot equiea Gi XC package count redueed expel In mst: output (Gi) Rebaity of he system is improved Why soot IC are not ssilable? ‘Awe, Sobzaction is performed using adders by making use of 's ‘nd 7s complementation methods. “aha way BCD adder iret from a binary ner? ‘Aus. While adding. BCD numbers, tbe output is eqired to be ‘eorected whe snot eqaed inthe ease of inry adders, ‘Compare the hardvarereauicements of « BCD and sight binary svithmetie unit Ans. Because ofthe need for correction circuit, the BCD ah ‘etic unitrqultes moe ards than the nralaht binary ‘Why dein 6 required tobe added in BCD adder ifthe sum nots wal BCD namber? ‘Ans 16 poste combinations ae there with it numbers. tn BCD only ten ofthese are wed and the other sic are skips. ‘Thats why 6 is equred to Be added What fea0 ALU? Give an expe where ALU fused ‘Avs. Am ALU! performs asthmatic and logs functions. 1s the heart of amiroproceoe What in mean by dg comparator? ‘Ans A ogi cil wed 0 compar bieary sumbersis known sa ig comparator ‘What is pasty gneratorichecker ‘Ans. A lic circuit used to generate pany bitor to check the Pasty of gal word fe known ar panty generator oF ‘hecker respectively ‘What is meant by ative-ow npufourp? ‘Ans the inputfoupat inate when LOW le known as active tow inputioatpt ‘Waar ismeant by active high inpuoutpt? ‘Ase Inactvehigh the inpatoutpt i active whenit is HIGH. ‘What is code converter? ‘Ans. Alopic cirut that converts formation fom one coe “nother eode i gon a the code converte. 69 reas Ro26 Rat omni Lg Den ing MSE Ge 18 ‘What is meant by priory eneode? ‘Ane An encoder jn mhich the protic are asslgned 0 various {oputes known a piety encode. ‘Whats the function of LT pia ina 7847 ICP ‘Ans Ts used to tt al the Segments ofa Tsegment LED. ‘What i scan by leading 20 blanking? ‘ame While sinpliying motile mombet, the leading eos ge banked ot Wy tine maining i sed in play system? ‘ans. used mail) to conserve pore. ‘What ic Nin abe? ‘Aes Teisa gy tube with eahoges formed i the shape of name: fab. 2y-s 09: Bis used aba diplay device in gta What the tye of pay device wed in your saleuator? ‘Ans. Tsepnent LEDILCD. Inthe eiplay device usd in a dglal wristwatch LED or LCD? why? Uane Usually LCD it wed because it egies significantly ess power than LED. How do you give inputs to your calculator, ie, how do you fed Informatio, such at numbers to Be manipulated, operations tobe performed, ee Kaw The iapats are given throeh wishes. When a uch pres elit greats aaa code corresponding to that sich, What isthe sgsieance of bubble in a loge eet) ‘AoA bubble at the isput ering odicates that he inputs ‘sive: Sinvaly a bubbleat the outpat indicates that he ‘utp i acne ow Give the sy aos wed to inion activow input and ont. lars Active tow inp is ndeated by x bubble or a right-ingle 4 Similarly sctvelow outpat is indicted by babe oravighetiangle De