50PQ30 MAIN PWB (Front Side) COMPONENT LAYOUT

For component voltages, see the 50PQ30 Interconnect Section page 3.

P1006 to SMPS IC302 P1003 LVDS

IC203
C
P1001 IC804
USB

B E
IC503 USB Power
Q301 L318 LVDS Driver
5V MST +1.2V_VDDC
Switch Ctl regulator

9V Reg
Reset Route
IC1 IC204 D502
L1012 D303
Memory
P1005 C A
A IC504
Q1002 X501
B C X501 Tuner Ctrl
Only runs when tuned 25Mhz
E

SPK
Microprocessor to a Digital Channel.
Video Processor
HDMI4

IC1001 SW301 X100

L1013 Audio Resets IC1 12Mhz
19 Video
MAIN (Digital) Board
Optical RGB Audio
HDMI CEC 16 SIF
Y Pr/Pb 2 15 (5V) IC805
Video
Q801 13 DIF - C
D805 12 DIF +
C
RS232 RGB In AA
A
A Audio
HDMI2 Y Pr/Pb 1 D806 Aud L
TUNER
TU501
TDVW-H103F
D804
Remote AV In Audio
C A 4 (5V) JK603 Aud R
A HDMI1

C A
ZD601 S-Video 1

110 Published November 2009 50PQ30 Plasma