Atmel - SMART SAMA5D2 Series

Atmel | SMART SAMA5D2 Series
SAMA5D2 Xplained Ultra Evaluation Kit
USER GUIDE
Introduction
This user guide introduces the Atmel® SAMA5D2 Xplained Ultra evaluation kit
(SAMA5D2-XULT) and describes the development and debugging capabilities for
applications running on the Atmel | SMART SAMA5D2 ARM® Cortex®-A5-based
embedded microprocessor unit (eMPU).
Scope
This guide provides details on the SAMA5D2-XULT. It is made up of five main

sections:
 Section 1. describes the evaluation kit content and its main features.
 Section 2. provides instructions to power up the SAMA5D2-XULT board.
 Section 3. provides information on obtaining sample code and technical
support.
 Section 4. provides an overview of the SAMA5D2-XULT board.
 Section 5. describes the SAMA5D2-XULT board components.
SMART
Atmel-44028C-ATARM-SAMA5D2-Xplained-Ultra-User Guide_13-Oct-16
Kit Contents
The SAMA5D2-XULT includes:

 Board
̶ One SAMA5D2-XULT board
 Cables
̶ One Micro-AB type USB cable
 Welcome letter
2 SAMA5D2 Xplained Ultra [USER GUIDE]

Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Kit Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1. Evaluation Kit Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Electrostatic Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Power Supply Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Power up the Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4. Hardware Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 Equipment List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3 Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5. Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1 Board Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.2 Connectors on board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.3 Function Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.4 PIO Usage and Interface Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.5 PIO Usage on Expansion Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
5.6 SAMA5D2-XULT Board Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
6. Errata . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
6.1 Pins swapped on schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
7. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
SAMA5D2 Xplained Ultra [USER GUIDE] 3

1. Evaluation Kit Specifications
Table 1-1. Evaluation Kit Specifications

Characteristic Specifications
Board SAMA5D2-XULT
Board supply voltage USB and/or Battery powered
Operating 0°C to +70°C
Temperature
Storage -40°C to +85°C
Relative Humidity 0 to 90% (non-condensing)
Dimensions: Main board 135 × 88 × 20 mm
RoHS status Compliant
Board Identification SAMA5D2 XPLAINED ULTRA
1.1 Electrostatic Warning
ESD-Sensitive Electronic Equipment!

WARNING The evaluation kit is shipped in a protective anti-static package. The board system
must not be subject to high electrostatic potentials.
Electrostatic We recommend using a grounding strap or similar ESD protective device when
sensitive
device handling the board in hostile ESD environments (offices with synthetic carpet, for
example). Avoid touching the component pins or any other metallic element on
the board.
1.2 Power Supply Warning
Hardware Power Supply Limitation

WARNING Powering the board with voltages higher than 5 VCC (e.g., the 12 VCC power
adapters from other kits such as Arduino kits) may damage the board.
Hardware Power Budget

WARNING Using the USB as the main power source (max. 500 mA) is acceptable only with the
use of the on-board peripherals and low-power LCD extension.
When external peripheral or add-on boards need to be powered, we recommend
the use of an external power adapter connected to the USB Micro-AB connectors
(can provide up to 1.2A on the 3.3V node).

2. Power Source
Several options are available to power up the SAMA5D2-XULT board:
 USB-powered through the USB Micro-AB connector (J23 - default configuration)
 Powered through a rechargeable battery Li-polymer 3.7V connected to J3 or J4
 Powered through the USB Micro-AB connector on the Atmel Embedded Debugger (EDBG) interface (J14)
Unlike Arduino Uno boards, the SAMA5D2-XULT board runs at 3.3V. The maximum
WARNING voltage that the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g., 5V) to
an I/O pin could damage the board.
2.1 Power up the Board

Unpack the board, taking care to avoid electrostatic discharge. Connect the USB Micro-AB cable to the connector
(J23). Then connect the other end of the cable to a free USB port of your PC.
Table 2-1. Electrical Characteristics

Electrical Parameter Value
Input voltage 5 VCC
Maximum Input voltage (limits) 6 VCC
Maximum DC 3.3V current available 1.2A
I/O voltage 3.3V only

3. Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can download
sample code and get technical support from www.atmel.com.
Linux software and demos can be found on http://www.at91.com/linux4sam/bin/view/Linux4SAM/.
Please make sure to load the latest software version before starting your
WARNING evaluation. For more information, please go to
http://www.at91.com/linux4sam/bin/view/Linux4SAM/.

4. Hardware Overview
4.1 Introduction
The Atmel SAMA5D2XULT is a full-featured evaluation platform for the Atmel SAMA5D2 series ARM-based
embedded microprocessor units (eMPU). It allows users to extensively evaluate, prototype and create application-
specific designs.
4.2 Equipment List

The SAMA5D2-XULT board is based on the integration of an ARM Cortex-A5-based microprocessor with external
memory, one Ethernet physical layer transceiver, one SD/MMC interface, one host USB port and one device USB
port, one 24-bit RGB LCD and debug interfaces.
Seven headers, compatible with Arduino R3 (Uno, Due) and two Xplained headers are available for various shield
connections.
4.3 Board Features
Table 4-1. Board Specifications

Characteristics Specifications
Dimensions (L x W x H) 135 x 88 x 20 mm
Processor SAMA5D27 (289-ball BGA package), 14x14 mm body, 0.8 mm ball pitch
MPU, EDBG: 12 MHz crystal
Oscillators RTC: 32.768 kHz
PHY: 25 MHz
2 x DDR3L SDRAM 2 Gbit - 16 Mbit x 16 x 8 banks (total 4 Gbit = 512 Mbyte)
Main Memory
1 x eMMC NAND Flash 4 Gbit
One Serial EEPROM SPI
Accessory memories One optional QSPI Serial Flash
One EEPROM with MAC Address and Serial Number
SD/MMC One 4-bit SD card connector
One USB Host with power switch
USB
One Micro-AB USB device
One LCD interface connector, LCD TFT Controller with overlay, alpha-blending, rotation, scaling and color
Display
space conversion
Image Sensor One ISC interface and connector
Ethernet One Ethernet PHY (RMII 10/100 MHz)
One JTAG interface connector
Debug port One EDBG interface with CDC
One serial debug console interface (3v3 level)
Arduino R3 compatible set of connectors
Expansion connector
XPRO set of connectors
5V from USB
Board supply voltage On-board power regulation by PMIC
External Battery powered capability
Battery On-board PowerCap
Reset, Wake-up and free user push button
User interface
One tri-color user LED (red, green, blue)

5. Board Components
5.1 Board Overview

The fully-featured SAMA5D2-XULT board integrates multiple peripherals and interface connectors as shown in
Figure 5-1.
Figure 5-1. SAMA5D2-XULT Board Overview
XPRO POWER
XPRO EXT1
17 XPRO EXT2
WWW.ATMEL.COM
VDD_5V_IN
15 F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
C60
2
7
6
5
4
3
1
0
C59
14
16
18
19
20
21
R183
C57
J21
A5-USB-A
J23
5V 5V
GND
F4_RXD
AREF
SDA0
F4_TXD
SDA1
F0_RXD
F3_RXD
SCL0
SCL1
F0_TXD
F3_TXD
R176
9
12
11
10
8
13
D22 D23
J20
R174
J22
JP7 R172
C56 R170 D24 D25
L14
R178
R179
R180
R181
R168
R182
BP3
C54
C55
R166
R177 D26 D27
RESET
VDDIODDR R175
3
R173
D28 D29
SDMMC0U11
U10
R171
2 4
R162 R164
R169
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
WAKE UP
R161 R155
C52
R160 R159
J16
3 R157 R156
D34 D35
R154
U6
R151
D37
U8
2 4 R153 R149 R150 J15 D36

HSIC
U7
R147 R148
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143

R127 R128 R152
DIGITAL
L13 R140 R141
C51 D40 D41
B
R125 R126
J19
R138
C49 C48 R146
ISC
R106 R107
EDBG-USB
R139
VDDBU D43
Y4
C47 JP6 D42
R132
R133
R134
R135
R136
R137
R101 R102 C46
J14
U5
TP8
R97 R98
A5-USB-B
J18
D44 D45
C44
C45
D46 D47
L11
C43 R129
PIOBU
R131 L12 R130
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
D48 D49
J12
R124
EDBG-JTAG A5-JTAG R104

R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
CANRX1
CANTX1
J10
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
C40
JP5
R100 GND GND

R76
R77
R78
R79
R80
R81
L10
L7
J7 L8
L9
TM
R74
Y3
J17
VDD_3V3
J11
R66 R73
R65 R72
CLASS D R71
J8
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
ETH
CANRX0
CANTX0
C32
VBAT
3V3
RST
3V3
5V
GND
GND
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
R62
C38
R67
R68
R69
R70
C39
POWER
C27
C28
C29
C30
C31
Q5
C36
JP4
R63
STAT
C34
C35
C37
VDD_3V3_LP
C23
C33
TP7
C26
C24
C25
L5
L6
RGB LED
R64
J6
R61
VDDCORE
TP6
U3
R59 R60
JP3
4
C22
R44 1
D2
C19 R49
U2
C21
Q4
R41 R48
2 3
Q3 TP5 C20
D3
D4
R30 JP2 C18

R47
Y1
TP4
R28 R42
R43 R46 C17 R45 C16

R40
D1
C15
J4
C13 C12
R36
R37
R38
R39
L4
Pin1
LCD
R31
R32
R33
R34
R35
J2 DEBUG_DIS
R19
R20
L3 PB_USER BP1
R13
R26 L2
L1
VBAT
J3
C10
R29
R2
R3
R4
J5
C14
R12
C11
3.3V LEVELS
J1 DEBUG
C4
3
R21
R22
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
TP3
R8
R1
R9
C8
R14
R15
R5
R16
R17
Q2
C5
C6
C9 R18
EDBG_DIS
Q1
C1
TP1 TP2 R10 C2 C3 R11 CTS TXD RXD VCC RTS GND
5.1.1 Default Jumper Settings

Figure 5-1 shows the default jumper settings. Blue jumpers are configuration items. Red jumpers are current
measurement points. Table 5-2 describes the functionality of the jumpers.
Table 5-1. SAMA5D2-XULT Jumper Settings

Jumper Default Function
JP1 OPEN Disable EDBG
JP2 OPEN Disable Debug
JP3 CLOSE VDD_3V3_LP current measurement
JP4 CLOSE VDDCORE current measurement
JP5 CLOSE VDDISC + VDDIOP0/1/2 current measurement
JP6 CLOSE VDDBU current measurement
JP7 CLOSE VDDIODDR_MPU current measurement
JP8 CLOSE VDD_5V_IN current measurement
JP9 OPEN Disable CS of SPI&QSPI&eMMC memories

5.2 Connectors on board
Table 5-2 describes the interface connectors on the SAMA5D2-XULT.
Table 5-2. SAMA5D2-XULT Board Interface Connectors

Connector Interfaces to
J23 USB A Device. Supports USB device using a type Micro-AB connector
J13 USB Host B. Supports USB host using a type A connector
J1 Serial DBGU (3.3V level)
J11 JTAG, 10 pin IDC connector
J14 EDBG USB connector
J15 USB C (not populated)
J6 Ethernet
Expansion connector with all LCD controller signals for display module connection (QTouch®, TFT LCD
J2
display with touchscreen and backlight)
J19 SDHCI SD/MMC connector
J3, J4 Battery connectors
J12 Tamper connector (not populated)
J7, J8, J9,
J16, J17, Expansion connectors with Arduino R3 compatible PIO signals
J20, J21, J22
J24, J25, J26 Xplained Pro Expansion connectors
J10 EDBG JTAG (not populated)
J18 ISC interface
J5 Class-D amplifier output
5.3 Function Blocks
5.3.1 Processor
The Atmel® | SMART SAMA5D2 Series is a high-performance, power-efficient embedded MPU based on the
ARM® Cortex®-A5 processor. Please refer to the SAMA5D2 Series datasheet for more information.
5.3.2 Power Supply Topology and Power Distribution
5.3.2.1 Power Supplies

Detailed information on the device power supplies is provided in the tables “SAMA5D2 Power Supplies” and
“Power Supply Connections” in the SAMA5D2 Series datasheet.

Figure 5-2. Processor Power Lines Supplies
VDDCORE
(1V2)
VDDCORE U6G
C28 C27 C143 C31 C108 C119 C29 C132 C30 C122 C137 VDDCORE (1V2) D7 E7
D9 VDDCORE_1 GNDCORE_1 E9
10uF 10uF 100nF 100nF 100nF 100nF 100nF 100nF 1nF 1nF 1nF VDDCORE_2 GNDCORE_2
H3 H4
K13 VDDCORE_3 GNDCORE_3 K12
N5 VDDCORE_4 GNDCORE_4 M5
VDDCORE_6 GNDCORE_6
VDDIODDR
(1V35)
VDDIODDR VDDIODDR (1V35)D11 D14
D12 VDDDDR_1 GNDDDR_1 E11
C70 C71 C80 C104 C88 C102 C101 C114 C105 C84 C97 E15 VDDDDR_3 GNDDDR_3 E14
10uF 10uF 100nF 100nF 100nF 100nF 100nF 100nF 1nF 1nF 1nF H15 VDDDDR_4 GNDDDR_4 H14
J15 VDDDDR_5 GNDDDR_5 J14
L15 VDDDDR_6 GNDDDR_6 L14
VDDDDR_7 GNDDDR_7
VDDBU VDDANA VDDBU (3V3) N7 N6

VDDBU GNDBU
(3V3) VDDBU (3V3) VDDANA
VDDANA (3V3) K3 L3
L5 VDDANA_1 GNDANA_1 K5
C134 C144 C136
100nF 100nF 100nF VDDANA_2 GNDANA_2
VDDIOP0 (3V3) E6 F6
F7 VDDIOP0_1 GNDIOP0_1 G7
VDDIOP0_2 GNDIOP0_2
VDDIOP1 (3V3) N13 M13
R14 VDDIOP1_1 GNDIOP1_1 P14
VDDIOP0 VDDIOP1 VDDIOP2 VDDIOP1_2 GNDIOP1_2
(3V3) VDDIOP0 (3V3) VDDIOP1 (3V3) VDDIOP2
VDDIOP2 (3V3) F10 F9
VDDIOP2 GNDIOP2
C135 C131 C107 C103 C120
100nF 100nF 100nF 100nF 100nF VDDHSIC (1V2) R9
VDDHSIC
VDDFUSE (2V5) M12 T5
VDDFUSE GNDDPLL
VDDAUDIOPLL (3V3) T3 T4
VDDAUDIOPLL GNDAUDIOPLL
VDDHSIC VDDFUSE VDDAUDIOPLL

VDDUTMIC (1V2) P7 R7
(1V2) VDDHSIC (2V5) VDDFUSE (3V3) VDDAUDIOPLL VDDUTMIC GNDUTMIC
VDDUTMII (3V3) P8 P9
VDDUTMII GNDUTMII
C118 C111 C148 C140
100nF 100nF 4.7uF 100nF VDDSDHC (3V3 or 1V8) P11 R11
VDDSDMMC GNDSDMMC GNDUTMII
VDDPLLA (1V2) U4 U5
VDDPLLA GNDPLLA
VDDOSC (3V3) T7 T6
VDDOSC GNDOSC
VDDUTMIC VDDUTMII VDDSDHC VDDISC (3V3) F4 G4
VDDISC GNDISC
(1V2) VDDUTMIC (3V3) VDDUTMII (3V3 or 1V8) VDDSDHC
C147 C133 C125 C110

4.7uF 100nF 100nF 100nF SAMA5D27-CN
R264 0R
VDDPLLA VDDOSC VDDISC
(1V2) VDDPLLA (3V3) VDDOSC (3V3) VDDISC
GNDUTMII
R131 R269 C138
100nF
1R 1% 1R 1%
C45 C128
100nF 100nF
C43 C142
4.7uF 4.7uF
5.3.2.2 Power-up and Power-down Considerations

Power-up and power-down considerations are described in section “Power Considerations” of the SAMA5D2
Series datasheet.
The power-up sequence provided in the SAMA5D2 Series datasheet must be

WARNING respected for reliable operation.
5.3.2.3 ACT8945A Power Management IC

The ACT8945A is a complete, cost-effective and highly-efficient ActivePMU™ power management solution,
optimized to provide a single-chip power solution and voltage sequencing for Atmel
SAMA5D2/SAMA5D3/SAMA5D4 and SAM9 series MPUs. It also meets the control requirements of these devices.
The ACT8945A features three step-down DC-DC converters and four low-noise, low-dropout linear regulators
along with a complete battery charging solution featuring the advanced ActivePath™ system-power selection
function.
WARNING Refer to the ACT8945A datasheet at www.active-semi.com for more details.

The three DC-DC converters utilize a high efficiency, fixed-frequency (2 MHz), current-mode PWM control
architecture that requires a minimum number of external components. Two DC-DC converters are capable of
supplying up to 1100 mA of output current, while the third supports up to 1200 mA. All four low-dropout linear
regulators are high performance, low-noise regulators that supply up to 320 mA of output current.
Figure 5-3. Board Power Management

JPR6 JP6
VSYS_5V VDDB_5V VDD_3V3 Jumper Header 1X2
JP8 JPR8 U22
D6
Header 1X2 Jumper VDD_5V_IN VDDBU
A3 A1 BAT54C
U12 VIN VOUT1 A2 1
8 1 VOUT2 3
1
2
[14] EDBG_USB_VBUS_5V IN1 STAT
R345
R187 10K R280 100R 1% 2
1
2
3 7 C181
R186 10K VSNS OUT C180 L27 22uF
R139
2 4 R185 390R 1% 10uF 0.47uH D5 C44 C46
10K
C1 + C42 DNP(2.2K)
EN ILIM C59 C58 PGND1 RB160M-60TR DNP(1uF) 100nF
C60 C2 0.2F/3.3V
6 5 10uF 10uF 100nF B1 PGND2
[10] USBA_VBUS_5V IN2 GND
B2 SW1 C3
TPS2113 SW2 AGND
B3 (Super)-Capacitor Populate R if
EN energy storage no Super Cap
FAN48610
(See note 1) JPR4

D9 U2 ACT8945AQJ405-T JP4
VDD_5V_IN (replaced with 0R-1206 VSYS_5V Header 1X2 Jumper
- see User Guide) VDDCORE
VIN_5V 33 31
CHGIN VSYS1 32
VSYS2
1
2
2 3 C165 39
VP1 C163 C164 C176 C167
4.7uF 35 VDDPLLA
VP2 10uF 10uF 10uF 100nF
16 L12 10uH_150mA
[15] 5V_EXT_INP VP3
21 6
Q7 ACIN INL VDD_1V2 R129 2R2
40
DNP
1
NC1 VSYS_5V
(IRLML6402) VBAT VDDUTMIC
28 R44 100R 1% D1 RED
R11 R18 nSTAT
R21 2.2M 1% L18
VBAT 1 J4 1 2
20 29
DNP(11K 1%) 11K 1% LBI BAT1 2
R22 1.5M 1% 30 VBAT 1 DNP(Header 1X2 2.00MM) VDDHSIC
BAT2 C19 JP7 JPR7 180ohm at 100MHz
2 J3
4.7uF Header 1X2 Jumper
24 3 1X3Pin L16
R24 VDD_3V3 TH 1 2
23
DNP 1 ISET VDD_1V35 VDD_1V35 VDDIODDR
(3.9K 1%) REFBP 180ohm at 100MHz
R6
R7
R27
1
2
C166 38 L5 2.2uH
47nF SW1 2
2.43K 1% OUT1 For DDR3 For MPU VDDIOP2
10K
10K
C20 C23 C24

10uF 10uF 100nF L7
22 JPR5 1 2
[7] PMIC_CHGLEV_PA12 CHGLEV VDD_1V2 JP5
R16 100R 1% 11 Header 1X2 Jumper
[9,10,12,14,15] NRST 12 nRSTO 180ohm at 100MHz VDDIOP1
R17 100R 1%
[7] PMIC_IRQ_PB13 nIRQ
nPBSTAT 13 36 L6 2.2uH L8
19 nPBSTAT SW2 34 VDD_3V3 1 2
R20 100R 1%
[8,15] PMIC_LBO/EXP_PC8 nLBO OUT2
1
2
27 C22 C37 C38
[8] PMIC_TWD0_PD21 SDA 180ohm at 100MHz VDDIOP0
26 10uF 10uF 100nF
[8] PMIC_TWCK0_PD22 SCL
L9
R26 VSYS_5V VDD_3V3 1 2
VSYS_5V C7
DNP(1nF) 180ohm at 100MHz VDDISC
DNP(8.2K 1%) R30 0R 15 L1 2.2uH
25 SW3 17
VSEL OUT3 L10
C3 C2 C1 1 2
R15 R41 DNP(0R) 10uF 10uF 100nF
R8 180ohm at 100MHz
68K 100K VDDFUSE
10
3 3
PWRHLD 4 VDD_2V5 R327 0R VDD_3V3_LP VDDOSC
VSYS_5V OUT4
5 VDD_3V3 VDD_LED R293 2R2
R14 49.9K 1% 9 OUT5 JP3 JPR3
nPBIN VDD_3V3 VDDSDHC1V8 L20 10uH_150mA
1 1 C8 8 R330 0R Header 1X2 Jumper VDDUTMII
OUT6
GNDP12
PWREN
100nF TP14 TP11

GNDP3
EXPAD
Q2 Q1 VDD_1V8 L3 L19
GNDA
SMD SMD 7 1 2 VDD_3V3_LP R284 0R 1 2

BSS138 2 BSS138 2 OUT7
3
1
2
R13 180ohm at 100MHz 180ohm at 100MHz VDDANA
Tact Switch BP2
BP3
49.9K 1% C169 C17 C173 C13

18
37
14
41
L23
4.7uF 4.7uF 4.7uF 4.7uF R303 0R 1 2
R9 1K C10 100nF 1
[9] SHDN
Tact Switch
Q3 180ohm at 100MHz
VDDAUDIOPLL
R12 BSS138 2 R19
100K 0R
R300 2R2
L22 10uH_150mA
WAKE UP RESET
Note: 1. Occasional board startup problems occurred when powered from a USB source having a weak VBUS level below 4.8V. To
avoid the voltage drop and consequential startup problems, production boards were assembled with a 0 Ω resistor in place
of the Schottky diode D9 shown here.
Supply Group Configuration

The ACT8945A provides:
 All power supplies required by the SAMA5D2 device:
̶ 1.2V VDDCORE, VDDPLLA, VDDUTMIC, VDDHSIC
̶ 1.35V VDDIODDR
̶ 2.0V VDDBU
̶ 3.3V VDDIOP, VDDISC, VDDEDBG
̶ 2.5V VDDFUSE
̶ 3.3V VDDOSC, VDDUTMI, VDDANA, VDDAUDIOPLL
 Power supplies to external chips on the main board:
̶ 1.8V VDDSDHC1V8
̶ 2.5V VDDLED
̶ 4.8V VSYS_5V

5.3.2.4 Power Boost 5V
To generate a true 5V voltage from the PMIC output (4.8V typical), a FAN48610 low-power boost regulator is
integrated into the design. This feeds the 5V USB host and the 5V LCD.
Figure 5-4. Power Boost 5V

VSYS_5V VDDB_5V
U22
A3 A1
VIN VOUT1 A2
VOUT2
R345
C181
C180 L27 22uF
10uF 0.47uH
10K
C1
PGND1 C2
B1 PGND2
B2 SW1 C3
SW2 AGND
B3
EN
FAN48610
5.3.2.5 Input Power Options

There are several power options for the SAMA5D2-XULT board.
The USB-powered operation is the default configuration. It comes from the USB device port connected to a PC or
a 5V DC supply. The USB supply is sufficient to power the board in most applications. It is important to note that
when the USB supply is used, the USB-B Host port has limited power. If USB Host port is required for the
application, it is recommended that an external DC supply be used.
Figure 5-5 provides the schematics of power options.
Figure 5-5. Input Powering Scheme

JP8 JPR8
Header 1X2 Jumper VDD_5V_IN
U12
8 1
[14] EDBG_USB_VBUS_5V IN1 STAT
R187 10K 1
2
3 7
R186 10K VSNS OUT
2 4 R185 390R 1%
EN ILIM C59 C58
C60
6 5 10uF 10uF 100nF
[10] USBA_VBUS_5V IN2 GND
TPS2113
Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for
any project that requires only a 5V source at up to 500 mA.
5.3.2.6 Battery Supply Source
The ACT8945A features an advanced battery charger that incorporates the ActivePath architecture for system
power selection. This combination of circuits provides a complete, advanced battery-management system that
automatically selects the best available input supply, manages charge current to ensure system power availability,
and provides a complete, high accuracy (±0.5%), thermally regulated, full-featured single-cell linear Li+ charger.
The ActivePath circuitry monitors the state of the input supply, the battery, and the system, and automatically
reconfigures itself to optimize the power system. If a valid input supply is present, ActivePath powers the system
from the input while charging the battery in parallel. This allows the battery to charge as quickly as possible, while
supplying the system. If a valid input supply is not present, ActivePath powers the system from the battery. Finally,
if the input is present and the system current requirement exceeds the capability of the input supply, ActivePath
allows system power to be drawn from both the battery and the input supply.

Figure 5-6. Battery Powering Scheme
U2 ACT8945AQJ405-T
VSYS_5V
33 31
CHGIN VSYS1 32
VSYS2 39
VP1 C163 C164 C176 C167
35
16
21 VP3 6
ACIN INL 40
NC1 VSYS_5V
28 R44 100R 1% D1 RED
nSTAT
VBAT 1 J4
20 29
LBI BAT1 2
30 VBAT 1 DNP(Header 1X2 2.00MM)
BAT2 C19
2 J3
4.7uF
24 3 1X3Pin
VDD_3V3 23 TH
1 ISET
REFBP
R6
R7
R27
C166 38
47nF SW1 2
2.43K 1% OUT1
10K
10K
22
[7] PMIC_CHGLEV_PA12 CHGLEV
R16 100R 1% 11
[9,10,12,14,15] NRST R17 100R 1% 12 nRSTO
[7] PMIC_IRQ_PB13 nIRQ
nPBSTAT 13 36
R20 100R 1% 19 nPBSTAT SW2 34
27
[8] PMIC_TWD0_PD21 SDA
26
R26 VSYS_5V
C7
DNP(1nF)
DNP(8.2K 1%) R30 0R 15
25 SW3 17
VSEL OUT3
R41 DNP(0R)
Charger Input Interrupts

In order to ease input supply detection and eliminate the size and cost of external detection circuitry, the charger
has the ability to generate interrupts based upon the status of the input supply. This function is capable of
generating an interrupt when the input is connected, disconnected, or both, when the charger state machine
transitions.
Charge Status Indicator
The charger provides a charge-status indicator output, nSTAT. nSTAT is an open-drain output which sinks current
when the charger is in an active-charging state, and is high-Z otherwise. nSTAT features an internal 8 mA current
limit, and is capable of directly driving a LED (D1).
Precision Voltage Detector
The LBI input connects to one input of a precision voltage comparator, which can be used to monitor a system
voltage such as the battery voltage. An external resistive-divider network can be used to set voltage monitoring
thresholds. The output of the comparator is present at the nLBO open-drain output and connected to the led red
D1.
Table 5-3. PIOs Used to Control the Battery Charger

PIO Function
PA12 CHGLEV: Charge Current Selection Input
nIRQ: Open-Drain Interrupt Output. nIRQ is asserted any time an unmasked fault condition exists or a charger
PB13
interrupt occurs.
nLBO: Low Battery Indicator Output. nLBO is asserted low whenever the voltage at LBI is lower than1.2V; it is high-
PC8
Z otherwise.

Figure 5-7. Battery Connector J3 and Optional J4
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
15 F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
C47 JP6 VDDBU D42 D43
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
R109 D48 D49
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49

D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-4. Battery J3 Signal Descriptions

Pin Mnemonic Signal Description
1 VBAT Battery I/O (exploitation and charging). Connect this pin directly to the battery anode (+ terminal)
2 GND Common ground
Temperature Sensing Input. Connect to battery thermistor. TH is pulled up with a 102 μA (typical)
3 TH
current internally.
5.3.2.7 Backup Power Supply

The SAMA5D2-XULT board requires a power source in order to permanently power the backup part of the
SAMA5D2 device (refer to SAMA5D2 Series datasheet). A super capacitor sustains such permanent power to
VDDBU when all system power sources are off.
Figure 5-8. VDDBU Powering Scheme Option

JPR6 JP6
VDD_3V3 Jumper Header 1X2
D6
BAT54C VDDBU
1
3
1
2
R280 100R 1% 2
R139
D5 + C42 C44 C46 DNP(2.2K)
RB160M-60TR DNP(1uF) 100nF
0.2F/3.3V
(Super)-Capacitor Populate R if
energy storage no Super Cap
5.3.2.8 Power Supply Control

In the ACT8945A, three DC-DC converters (1.8V, 1.2V, 3.3V) and two LDO outputs are available.
All ACT8945A outputs can be controlled by the TWI interface through software.

The three DC-DC outputs can be enabled or disabled by the SAMA5D2 SHDN output:
 SHDN = 0: The DC-DC output is disabled.
 SHDN = 1: The DC-DC output is enabled.
Two push buttons are also available:
 Wakeup push button: When pressed, the ACT8945A power outputs are restarted if the ACT8945A is in
shutdown mode.
 Reset push button: When pressed, the ACT8945A transfers the reset signal to the MPU.
5.3.3 Reset Circuitry

The reset sources for SAMA5D2-XULT board are:
 Power-on reset from the power management unit (PMIC)
 Push button reset BP3
 External reset from Arduino connectors
 JTAG or EDBG reset from an in-circuit emulator
Figure 5-9. Reset/Wakeup and Shutdown Control
R20 100R 1% 19 nPBSTAT SW2 34

27 nLBO OUT2
26 SDA
SCL
VSYS_5V
VSYS_5V
R30 0R 15
25 SW3 17
VSEL OUT3
R15 R41 DNP(0R)

R8
68K 100K
10
PWRHLD 4
3 3 OUT4
VSYS_5V
5
R14 49.9K 1% 9 OUT5
1 1 C8 nPBIN 8
OUT6
GNDP12
PWREN
100nF TP14 TP11
GNDP3
EXPAD
Q2 Q1
GNDA
SMD SMD 7
3
R13
Tact Switch BP2
Tact Switch BP3
49.9K 1%
18
37
14
41
R9 1K C10 100nF 1
[9] SHDN
Q3
R12 BSS138 2 R19
100K 0R
WAKE UP RESET
5.3.4 Clock Circuitry

The SAMA5D2-XULT board includes four clock sources:
 Two clocks are alternatives for the SAMA5D2 processor (12 MHz, 32 kHz)
 One crystal oscillator used for the Ethernet RMII chip (25 MHz)
 One crystal oscillator used for the EDBG (12 MHz)
Figure 5-10. Clock Circuitry

XIN XOUT32 C34 22pF ETH_XI
R146 DNP(1M) XOUT R109 DNP(1M) XIN32
2
Y4 32.768KHz CL=12.5pF Y2 R68

1 4 4 1 DNP(1M)
3
2 3 C41 C40
22pF 3 2 25MHz CL=20pF
22pF C35
C47 C45 ETH_XO
27pF 12MHz CL=15pF 27pF Y3 22pF

5.3.5 Memory
5.3.5.1 Memory Organization

The SAMA5D2 features a DDR/SDR memory interface and an External Bus Interface (EBI) to permit interfacing to
a wide range of external memories and to almost any kind of parallel peripheral.
This section describes the memory devices that equip the SAMA5D2-XULT board.
5.3.5.2 DDR3/SDRAM
Two DDR3L/SDRAM (MT41H128M16JT-125-K - 2 Gbit = 16 Mbit x 16 x 8 banks) are used as main system
memory and totalling 4 Gbit of SDRAM on the board. The memory bus is 32 bits wide and operates with a
frequency of up to 166 MHz.
Figure 5-11. DDR3L

U8 U4
DDR_RESETN T2 DDR_RESETN T2
RESET# RESET#
DDR_CLK+ J7 N3 DDR_A0 DDR_CLK+ J7 N3 DDR_A0
DDR_CLK- K7 CK A0 P7 DDR_A1 DDR_CLK- K7 CK A0 P7 DDR_A1
DDR_CKE K9 CK# A1 P3 DDR_A2 DDR_CKE K9 CK# A1 P3 DDR_A2
DDR_CS L2 CKE A2 N2 DDR_A3 DDR_CS L2 CKE A2 N2 DDR_A3
DDR_RAS J3 CS# A3 P8 DDR_A4 DDR_RAS J3 CS# A3 P8 DDR_A4
DDR_CAS K3 RAS# A4 P2 DDR_A5 DDR_CAS K3 RAS# A4 P2 DDR_A5
DDR_WE L3 CAS# A5 R8 DDR_A6 DDR_WE L3 CAS# A5 R8 DDR_A6
WE# A6 R2 DDR_A7 WE# A6 R2 DDR_A7
DDR_D0 E3 A7 T8 DDR_A8 DDR_D16 E3 A7 T8 DDR_A8
DDR_D1 F7 DQ0 A8 R3 DDR_A9 DDR_D17 F7 DQ0 A8 R3 DDR_A9
DDR_D2 F2 DQ1 A9 L7 DDR_A10 DDR_D18 F2 DQ1 A9 L7 DDR_A10
DDR_D3 F8 DQ2 A10/AP R7 DDR_A11 DDR_D19 F8 DQ2 A10/AP R7 DDR_A11
DDR_D4 H3 DQ3 A11 N7 DDR_A12 DDR_D20 H3 DQ3 A11 N7 DDR_A12
DDR_D5 H8 DQ4 A12/BC# T3 DDR_A13 DDR_D21 H8 DQ4 A12/BC# T3 DDR_A13
DDR_D6 G2 DQ5 A13 T7 DDR_D22 G2 DQ5 A13 T7
DDR_D7 H7 DQ6 A14 M7 DDR_D23 H7 DQ6 A14 M7
DDR_D8 D7 DQ7 A15 M2 DDR_BA0 DDR_D24 D7 DQ7 A15 M2 DDR_BA0
DDR_D9 C3 DQ8 BA0 N8 DDR_BA1 VDD_1V35 DDR_D25 C3 DQ8 BA0 N8 DDR_BA1 VDD_1V35
DDR_D10 C8 DQ9 BA1 M3 DDR_BA2 DDR_D26 C8 DQ9 BA1 M3 DDR_BA2
DDR_D11 C2 DQ10 BA2 R179 DNP(1K) DDR_D27 C2 DQ10 BA2 R254 DNP(1K)
DDR_D12 A7 DQ11 K1 DDR_D28 A7 DQ11 K1
DDR_D13 A2 DQ12 ODT R178 0R DDR_D29 A2 DQ12 ODT R258 0R
DDR_D14 B8 DQ13 B2 DDR_D30 B8 DQ13 B2
DDR_D15 A3 DQ14 VDD1 G7 DDR_D31 A3 DQ14 VDD1 G7
DQ15 VDD2 R9 VDD_1V35 DQ15 VDD2 R9 VDD_1V35
DDR_DQS1+ C7 VDD3 K2 DDR_DQS3+ C7 VDD3 K2
DDR_DQS1- B7 UDQS VDD4 K8 DDR_DQS3- B7 UDQS VDD4 K8
UDQS# VDD5 N1 UDQS# VDD5 N1
DDR_DQS0+ F3 VDD6 N9 DDR_DQS2+ F3 VDD6 N9
DDR_DQS0- G3 LDQS VDD7 R1 DDR_DQS2- G3 LDQS VDD7 R1
LDQS# VDD8 D9 LDQS# VDD8 D9
DDR_DQM1 D3 VDD9 DDR_DQM3 D3 VDD9
DDR_DQM0 E7 UDM A9 DDR_DQM2 E7 UDM A9
LDM VSS1 B3 LDM VSS1 B3
VSS2 E1 VSS2 E1
A1 VSS3 G8 A1 VSS3 G8
A8 VDDQ1 VSS4 J2 VDD_1V35 A8 VDDQ1 VSS4 J2
VDD_1V35 C1 VDDQ2 VSS5 J8 C1 VDDQ2 VSS5 J8
C9 VDDQ3 VSS6 M1 C9 VDDQ3 VSS6 M1
D2 VDDQ4 VSS7 M9 D2 VDDQ4 VSS7 M9
E9 VDDQ5 VSS8 P1 E9 VDDQ5 VSS8 P1
F1 VDDQ6 VSS9 P9 F1 VDDQ6 VSS9 P9
H2 VDDQ7 VSS10 T1 H2 VDDQ7 VSS10 T1
H9 VDDQ8 VSS11 T9 H9 VDDQ8 VSS11 T9
VDDQ9 VSS12 VDDQ9 VSS12
J1 B1 J1 B1
J9 NC1 VSSQ1 B9 J9 NC1 VSSQ1 B9
L1 NC2 VSSQ2 D1 L1 NC2 VSSQ2 D1
L9 NC3 VSSQ3 D8 L9 NC3 VSSQ3 D8
NC4 VSSQ4 E2 NC4 VSSQ4 E2
VSSQ5 E8 VSSQ5 E8
VSSQ6 F9 VSSQ6 F9
DDR_VREF M8 VSSQ7 G1 DDR_VREF M8 VSSQ7 G1
VREFCA VSSQ8 G9 VREFCA VSSQ8 G9
VSSQ9 VSSQ9
C91 C72 C145 C121
H1 L8 H1 L8
100nF 100nF VREFDQ ZQ 100nF 100nF VREFDQ ZQ
R238 R124
MT41K128M16JT-125:K 240R 1% MT41K128M16JT-125:K 240R 1%
VDDIODDR
L14 10uH_150mA
C83 C55 R181

R182
4.7uF 100nF 6.8K 1%
1R 1%
DDR_VREF
C56 R180
C54
4.7uF 6.8K 1%
100nF

5.3.5.3 DDR_CAL Analog Input
One specific analog input, DDR_CAL, is used to calibrate all DDR I/Os.
Figure 5-12. DDR Signals and CAL Analog Input

U6E
DDR_A0 F12 B12 DDR_D0

DDR_A1 C17 DDR_A0 DDR_D0 A12 DDR_D1
DDR_A2 B17 DDR_A1 DDR_D1 C12 DDR_D2
DDR_A3 B16 DDR_A2 DDR_D2 A13 DDR_D3
DDR_A4 C16 DDR_A3 DDR_D3 A14 DDR_D4
DDR_A5 G14 DDR_A4 DDR_D4 C13 DDR_D5
DDR_A6 F14 DDR_A5 DDR_D5 A15 DDR_D6
DDR_A7 F11 DDR_A6 DDR_D6 B15 DDR_D7
DDR_A8 C14 DDR_A7 DDR_D7 G17 DDR_D8
DDR_A9 D13 DDR_A8 DDR_D8 G16 DDR_D9
DDR_A10 C15 DDR_A9 DDR_D9 H17 DDR_D10
DDR_A11 A16 DDR_A10 DDR_D10 K17 DDR_D11
DDR_A12 A17 DDR_A11 DDR_D11 K16 DDR_D12
DDR_A13 G11 DDR_A12 DDR_D12 J13 DDR_D13
DDR_A13 DDR_D13 K14 DDR_D14
DDR_D14 K15 DDR_D15
DDR_BA0 H12 DDR_D15 B8 DDR_D16
DDR_BA1 H13 DDR_BA0 DDR_D16 B9 DDR_D17
DDR_BA2 F17 DDR_BA1 DDR_D17 C9 DDR_D18
DDR_BA2 DDR_D18 A9 DDR_D19
DDR_D19 A10 DDR_D20
DDR_RAS F13 DDR_D20 D10 DDR_D21
DDR_CAS G12 DDR_RAS DDR_D21 B11 DDR_D22
DDR_CAS DDR_D22 A11 DDR_D23
DDR_CLK+ E17 DDR_D23 J12 DDR_D24
DDR_CLK- D17 DDR_CLK DDR_D24 H10 DDR_D25
DDR_CKE F16 DDR_CLKN DDR_D25 J11 DDR_D26
DDR_CKE DDR_D26 K11 DDR_D27
DDR_D27 L13 DDR_D28
R243 DDR_D28 L11 DDR_D29
100K DDR_D29 L12 DDR_D30
DDR_D30 M17 DDR_D31
DDR_D31
DDR_CS G13 C11 DDR_DQM0
DDR_WE F15 DDR_CS DDR_DQM0 G15 DDR_DQM1
DDR_WE DDR_DQM1 C8 DDR_DQM2
E13 DDR_DQM2 H11 DDR_DQM3
VDD_1V35 DDR_CAL DDR_DQM3
23.2K 1% 22pF B13 DDR_DQS0+
DDR_DQS0 B14 DDR_DQS0-
R250 C106 DDR_DQSN0
R242
100K J17 DDR_DQS1+
DDR_DQS1 J16 DDR_DQS1-
DDR_DQSN1
C10 DDR_DQS2+
DDR_RESETN E16 DDR_DQS2 B10 DDR_DQS2-
DDR_RESETN DDR_DQSN2
DDR_VREF H16 L17 DDR_DQS3+
D16 DDR_VREFB0 DDR_DQS3 L16 DDR_DQS3-
DDR_VREFCM DDR_DQSN3
C100 C99
100nF 100nF
SAMA5D27-CN

5.3.5.4 eMMC
The Secure Digital Multimedia Card (SDMMC) Controller supports the Embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is compliant with
the SD Host Controller Standard V3.0 specification
One MTFC4GLDEA 4 GB eMMC is connected to the processor through the SDMMC0 port.
Table 5-5. SDMMC Reference Documents

Name Link
SD Host Controller Simplified Specification V3.00 www.sdcard.org
SDIO Simplified Specification V3.00 www.sdcard.org
Physical Layer Simplified Specification V3.01 www.sdcard.org
Embedded MultiMedia Card (e.MMC) Electrical Standard 4.51 www.jedec.org
Figure 5-13. eMMC

VDDSDHC
VDD_3V3 VDDSDHC
R142
R237
R144
R147
R234
R151
R233
R232
R236
DNP(47K) R255
R149
(3V3 or 1V8)
C85 C79
47K
47K
47K
47K
47K
47K
47K
47K
47K
47K
H10
J10
M4
G5
N4
C6
N2
C4
N5
C2
1uF
K9
E6
P3
P5
P6
P4
E7
K8
F5
100nF
A3 E1
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS1
VSS2
VSS3
VSS4
VSS5
VCC0
VCC1
VCC2
VCC3
VCCQ1
VCCQ2
VCCQ3
VCCQ4
VCCQ5
VDDI
[7] SDHC0_DAT0_PA2 DAT0 NC1
A4 E2
A5 E3
B2 A2
B3 A6
B4 A7
B5 A8
B6 E8
M5 E9
[7] SDHC0_CMD_PA1 CMD NC9
R140 39R M6 E10
[7] SDHC0_CK_PA0 CLK NC10
K5 A1
[7] SDHC0_RSTN_PA10 RST NC11 E12
R235 K6 NC12 E13
N6 NC123 NC13 E14
47K pull down on SDHC0_CMD_PA1 close to MPU. NC122 NC14
E5 F1
DNP(47K) N9 NC121 NC15 F2
39R on SDHC0_CK_PA0 close to MPU. NC120 NC16
N8 F3
N7 NC119 NC17 A9
NC118 Impedance match of NC18
J12 B14
P14 NC117 CLK/CMD/DAT[7:0] 50R NC19 C14
N3 NC116 NC20 C13
P10 NC115 NC21 C12
VDDSDHC VDD_3V3 NC114 NC22
N1 C11
(3V3 or 1V8) (3V3) M14 NC113 NC23 F10
M13 NC112 NC24 C10
M12 NC111 NC25 F12
C61 C73 M11 NC110 NC26 F13
C81 C69
2.2uF 2.2uF M10 NC109 NC27 F14
100nF 100nF
M9 NC108 NC28 C9
M8 NC107 NC29 C8
M7 NC106 NC30 C7
P11 NC105 NC31 C5
P12 NC104 NC32 C3
P13 NC103 NC33 C1
M3 NC102 NC34 D14
M2 NC101 NC35 D13
VDD_3V3 VDDSDHC1V8 VDDSDHC M1 NC100 NC36 D12
L14 NC99 NC37 D4
L13 NC98 NC38 D3
R210 DNP(0R) NC97 NC39
L12 G12
R212 DNP(0R) A10 NC96 NC40 G13
A11 NC95 NC41 G14
VDD_3V3 A12 NC94 NC42 H1
A13 NC93 NC43 H2
A14 NC92 NC44 H3
B1 NC91 NC45 D2
C86 NC90 NC46
100nF B7 H5
NC89 NC47
2
G1 D1
L3 NC88 NC48 B13
NC87 NC49
VDD
L2 B12
L1 NC86 NC50 B11
K14 NC85 NC51 B10
6 NC84 NC52
S2 5 R211 0R K13 B9
D K12 NC83 NC53 H12
4 NC82 NC54
S1
NC81
NC80
NC79
NC78
NC77
NC76
NC75
NC74
NC73
NC72
NC71
NC70
NC69
NC68
NC67
NC66
NC65
NC64
NC63
NC62
NC61
NC60
NC59
NC58
NC57
NC56
NC55
[7] SDHC0_VDDSEL_PA11 1
IN
IN=0: S1 Closed
G2
K10
G3
G10
K7
N11
N10
B8
K3
K2
K1
J14
J13
N12
N13
N14
P1
P2
P7
P9
P8
J5
J3
J2
J1
H14
H13
GND
IN=1: S2 Closed
R225
10K
U13
3
ADG849 U11 MTFC4GLDEA-0M WT

5.3.5.5 CS Disable
The SAMA5D2 device boots according to the following sequence:
1. SD CARD connected on SDHC1
2. DataFlash connected on NPCS0 SPI0
3. Optional QSPI flash connected on QSPI0 QSPI_CS0
4. eMMC connected to SDHC0
In this sequence, the first device found with bootable contents is selected as the boot source. The others are
disregarded.
On-board jumper (JP9) controls the selection (CS#) of the on-board bootable memory components (eMMC and
Serial DataFlash) using a non-inverting 3-state buffer.
Figure 5-14. CS Disable

VDD_3V3
C63
100nF
R226 VDD_3V3
10K R218
U15 10K
1 5
VCC
R230
[7] QSPI0_CS_PA23 2 4 QSPI0_CS 10K
QSPI Flash CS
JP9 3 SDHC0_CD_PA13 [7]
GND 3
Header 1X2
JPR9 eMMC Flash CS
NL17SZ126DFT2G
Jumper
R227 100R 1% 1
1
2
Q6
BSS138
C62 2
BOOT_DIS 100nF
R217
U14 10K
1 5
VCC
[7] SPI0_NPCS0_PA17 2 4 SPI0_CS0_PA17

SPI Flash CS
3
GND
NL17SZ126DFT2G
The rule of operation is:

 JP9 = OFF (default) → enable normal boot from eMMC or serial Flash if mounted
 JP9 = ON → booting from optional serial DataFlash or eMMC is disabled
Refer to the SAMA5D2 Series datasheet for more information on standard boot strategies and sequencing.

5.3.6 Additional Memories
5.3.6.1 Serial Data Flash

The SAMA5D2 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used to interface
with the on-board serial DataFlash.
The four main signals used in the SPI are Clock, Data In, Data Out, and Chip Select. The SPI is a serial interface
similar to the I2C bus interface but with three main differences:
 It operates at a higher speed.
 Transmit and receive data lines are separate.
 Device access is chip select-based instead of address-based.
Figure 5-15. Serial DataFlash

VDD_3V3
U9
[7] SPI0_MOSI_PA15 5 8
2 SI VCC
[7] SPI0_MISO_PA16 SO
[7] SPI0_SPCK_PA14 6 3
SCK WP 7 C53
SPI0_CS0_PA17 1 HOLD 100nF
CS 4
GND
AT25DF321A
5.3.6.2 QSPI Serial Flash

The SAMA5D2 provides two Quad Serial Peripheral Interfaces (QSPI). One port is used to interface with the optional
on-board QSPI serial DataFlash.
The Quad SPI Interface (QSPI) is a synchronous serial data link that provides communication with external
devices in Master mode.
The QSPI can be used in SPI mode to interface to serial peripherals (such as ADCs, DACs, LCD controllers, CAN
controllers and sensors), or in Serial Memory mode to interface to serial Flash memories.
The QSPI allows the system to execute code directly from a serial Flash memory (XIP) without code shadowing to
RAM. The serial Flash memory mapping is seen in the system as other memories (ROM, SRAM, DRAM,
embedded Flash memory, etc.).
With the support of the Quad SPI protocol, the QSPI allows the system to use high-performance serial Flash
memories which are small and inexpensive, in place of larger and more expensive parallel Flash memories
Figure 5-16. Optional QSPI Serial DataFlash

VDD_3V3
U10
5 8 C52
[7] QSPI0_IO0_PA24 DQ0 VCC 100nF
[7] QSPI0_IO1_PA25 2 4
DQ1 Vss
[7] QSPI0_IO2_PA26 3 1 QSPI0_CS

W#/VPP/DQ2 S#
[7] QSPI0_IO3_PA27 7 6
HOLD#/DQ3 C QSPI0_SCK_PA22 [7]
DNP(N25Q128A13ESE40F)

5.3.6.3 Serial EEPROM with Unique MAC Address
The SAMA5D2-XULT board embeds one Atmel AT24MAC402/602 EEPROM using a TWI1 interface.
The AT24MAC402/602 provides 2048 bits of Serial Electrically-Erasable Programmable Read-Only Memory
(EEPROM) organized as 256 words of eight bits each and is accessed via an I2C-compatible (2-wire) serial
interface. In addition, the AT24MAC402/602 incorporates an easy and inexpensive method to obtain a globally
unique MAC or EUI address (EUI-48 or EUI-64).
The EUI-48/64 addresses can be assigned as the actual physical address of a system hardware device or node, or
it can be assigned to a software instance. These addresses are factory-programmed by Atmel and guaranteed
unique. They are permanently write-protected in an extended memory block located outside of the standard 2-Kbit
memory array.
In addition, the AT24MAC402/602 provides the value-added feature of a factory-programmed, also guaranteed
unique 128-bit serial number located in the extended memory block (same area as the EUI address values).
The EEPROM device is used as a “software label” to store board information such as
WARNING chip type, manufacture name and production date, using the last two 16-byte blocks in
memory. The information contained in these blocks should not be modified.
Figure 5-17. EEPROM

VDD_3V3 VDD_3V3
U18
DNP(10K) R320
R319
1 8 C161 100nF
A0 VCC
2 7 EEPROM_WP
A1 WP
10K
3 6
EEPROM_WP A2 SCL EEPROM_TWCK1_PD5 [8]
4 5
GND SDA EEPROM_TWD1_PD4 [8]
R316
0R AT24MAC402-MAHM-T

5.4 PIO Usage and Interface Connectors
5.4.1 Secure Digital Multimedia Card Interface (SDMMC)
5.4.1.1 Secure Digital Multimedia Card (SDMMC) Controller

The SAMA5D2-XULT board has two Secure Digital Multimedia Card (SDMMC) interfaces that support the
MultiMedia Card (e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0
specification. It is compliant with the SD Host Controller Standard V3.0 specification.
 SDMMC0 interface is connected to the eMMC.
 SDMMC1 Interface based on a 7-pin interface (clock, command, 4-bit data, power lines).
5.4.1.2 SDMMC1 Card Connector
A standard MMC/SD card connector, connected to SDMMC1, is mounted on the top side of the board. It includes
a card detection switch.
Figure 5-18. SDMMC1

VDD_3V3
VDD_3V3 R214
0R
R229
R245
R241
R209
R192
R189
C64 C75
10uF 100nF
10K
68K
68K
10K
68K
68K
(MCI1_CD)
[7] SDHC1_CD_PA30 J19
16
(MCI1_DA1) 8 15
[7] SDHC1_DAT1_PA19
(MCI1_DA0) 7 14 0R R249
[7] SDHC1_DAT0_PA18
6
(MCI1_CK) 5 (SDHC1_WP)
[7] SDHC1_CK_PA22 4
3 13
(MCI1_CDA) 2 12
[7] SDHC1_CMD_PA28
(MCI1_DA3) 1 11
[7] SDHC1_DAT3_PA21
(MCI1_DA2) 9 10
[7] SDHC1_DAT2_PA20
SD Card Connector

Figure 5-19. Standard SD Socket J19
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
15 F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150 HSIC
U7
J15
R147 R148
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
J7 L8
L9
TM
R74
Y3
VDD_3V3
J17
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
Q3 TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-6. Standard SD Socket J19 Signal Descriptions

Pin Mnemonic PIO Signal Description
1 DAT3 PA21 Data Bit 3
2 CDA PA28 Command Line
3 GND – Common ground
4 VCC – Supply Voltage 3.3V
5 CLK PA22 Clock / Command Line
6 CD PA30 Card Detect

5.4.2 Communication Interfaces
The SAMA5D2-XULT board is equipped with GMAC and USB Host/Device communication interfaces.
5.4.2.1 Ethernet 10/100 (GMAC) Port
The SAMA5D2-XULT board contains a MICREL PHY device (KSZ8081) operating at 10/100 Mb/s. The board
supports RMII interface modes. The Ethernet interface consists of two pairs of low-voltage differential pair signals
designated from GRX± and GTX± plus control signals for link activity indicators. These signals can be used to
connect to a 10/100 Base-T RJ45 connector integrated on SAMA5D2-XULT board.
Additionally, for monitoring and control purposes, LED functionality is carried on the RJ45 connectors to indicate
activity, link, and speed status information.
For more information about the Ethernet controller device, refer to the MICREL KSZ8081RN controller
manufacturer's datasheet.
Figure 5-20. Ethernet (GMAC)

VDD_3V3
Ethernet
R31
R68
R65
10Base-T/100Base-TX R45 R69
10K
10K
10K
U3 1K 1K
J6 RJ45 Connector
19
TD+ 1 RXC/B-CAST_OFF ETH_GTXCK_PB14 [7]
1 TX+ TX+ TX+ top/bot 7
TXP 25
CT 4 TXD1 ETH_GTX1_PB21 [7]
24
TXD0 ETH_GTX0_PB20 [7]
23
TD- 2 TXEN ETH_GTXEN_PB15 [7]
2 TX- TX- TX- top/bot 6 13
TXM RXD3/PHYAD0 14
RXD2/PHYAD1 15
RXD1/PHYAD2 ETH_GRX1_PB19 [7]
16
RD+ 3 RXD0/DUPLEX ETH_GRX0_PB18 [7]
3 RX+ RX+ RX+ top/bot 5 18
RXP RXDV/CONFIG2 ETH_GRXDV_PB16 [7]
20
CT 5 RXER/ISO ETH_GRXER_PB17 [7]
29
CRS/CONFIG1 28
6 RX- RD- 6 RX- RX- top/bot 4 COL/CONFIG0
RXM
C160 C162
100nF 100nF C16 2.2uF 2 12
75 75 VDD_1V2 MDC 11 ETH_GMDC_PB22 [7]
4 75 NC 7 MDIO 21 ETH_GMDIO_PB23 [7]
C18 100nF
INTRP/NAND ETH_INT_PC9 [8]
1
5 GND_ETH 33 GND L2 VDD_3V3
PADDLE VDDA_3V3
R32
R48
R60
R66
R67
1nF 22 180ohm at 100MHz
75 TXC
13 7 8 26 3 1 2
14 27 TXD2 VDDA_3V3
10K
10K
10K
10K
10K
8 6.49K 1% R70 10 TXD3
15 EARTH_ETH REXT C12 C21
EARTH_ETH 16 Right yellow LED Left Green LED 10uF 100nF
VDD_3V3
ETH_XO 8
XO
R33 R34 ETH_XI 9 17
XI VDDIO
10K 10K C36 C25
12
11
10
10uF 100nF
ETH_LED0 30
VDD_3V3 ACT ETH_LED1 ETH_LED1 31 LED0/NWAYEN
LED1/SPEED
R314 470R LINK ETH_LED0
R317 470R 32 R35 0R

RESET NRST [4,9,10,14,15]
KSZ8081RNB

Figure 5-21. ETH RJ45 Connector J6
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-7. ETH RJ45 Connector Signal Descriptions

1 TX+ Transmit
2 TX- Transmit
3 RX+ Receive
4 Decoupling capacitor –
5 Decoupling capacitor –
6 RX- Receive
7 NC –
8 EARTH / GND Common ground
9 ACT LED LED activity
10 ACT LED LED activity
11 LINK LED LED link connection
12 LINK LED LED link connection
15 NC –
16 NC –

5.4.2.2 USB Host/Device A, B
The SAMA5D2-XULT board features three USB communication ports:
 USB Host B High- and Full-speed Interface
̶ One USB host type A connector.
 USB A Device Interface
̶ One USB device standard micro-AB connector. This port has a VBUS detection function made
through the resistor ladder R183 and R184.
 UBC C high-speed host port
̶ One USB high-speed host port with a High-Speed Inter-Chip (HSIC) interface. This port is connected to a
single 2-pin jumper.
Figure 5-22. USB-B Host & USB-A Device Interface
USB A USBA_VBUS_5V [4] USB B

R183 100K
USBA_VBUS_5V_PA31 [7]
C57 R184
20pF 200K 5
8
SH1
9 VBUS 1
DM 2 1 USBB_VBUS_5V
USBA_DM [9] VBUS
DP 3 2
SHD
USBA_DP [9] DM USBB_DM [9]

ID 4 3
10 5 DP USBB_DP [9]
GND 4
GND
A
J23
11
SH2
MicroUSB AB Connector
J13
6 Single USB Type A
EARTH_USB_A
EARTH_USB_B
The USB B Host port is equipped with 500 mA high-side power switch for self-powered and bus-powered
applications.
Figure 5-23. USB power switch

L21
180ohm at 100MHz U16
EN: Active High
USBB_VBUS_5V 1 2 8 1
OUT_2 EN USBB_EN5V_PB10 [7]
6 2
C156 C157 OUT_1 FLG USBB_OVCUR_PA29 [7]
100nF 10uF VDDB_5V
7 3 R301
IN_2 GND
10K
5 4
C155 IN_1 NC
100nF
SP2525A-1EN-L

27
5.4.3
5.4.4
R27.
Figure 5-25.
Figure 5-24.
J10 J10
2
2
2
2
J5
J5
CLASS D
J14
CLASS D
J23 J14
BP2
BP3
J23
EDBG-JTAG
BP2
BP3
EDBG-JTAG
JP1
JP1
L4
Q4
R71
C15
C32
R62
R43
L4
R59
A5-USB-A Q4
4
3
4
3
R71
C15
C32
R62
R43
R59
A5-USB-A
4
3
4
3
R2
C57
R2
R183
R184
L11
C57
R3
R183
U5
R184
EDBG_DIS
L11
L13
C49
C50
C4 R3 U5
EDBG_DIS
L13
C49
C50
R4 TP4 C58 C4
WAKE UP RESET R4 TP4 C58
R1 EDBG-USB WAKE UP RESET
R50 R1
A5-JTAG
J11 R178 J20 R50
EDBG-USB
A5-JTAG
R51 J11 R178 J20
R179 C59 R51
R52 R179 C59
TP1 TP2
C54 SCL0 R52
TP1 TP2
R53 R74 C54
C26
C33
C39
R180 R74
SCL0
R99
C60 R53
C26
C33
C39
R5
R104
R75
R54 R180
R99
C55 R5 C60
R104
R75
C5 SDA0 R54
Q5 R55 JP5 R181 C55 SDA0
C5 Q5 R55 JP5 R181
C6 R56 U4 U8
AREF JP8 C6 R56 U4 U8
U1 R29 R63 R57 JP8
R124 U1 R29 R63 R57 AREF
R58 R124
VDD_3V3
C56
R10
R23
R25
R58
C9
R46
VDD_3V3
C56
GND VDD_5V_IN
R10
R23
R25
C9
R46
D3 STAT GND VDD_5V_IN
VBAT L7 D3 STAT
C11
C14
D4 L7
R153
Q2 VBAT
C11
C14
POWER J7 L8 13 D4
R153
USB-B Type B Connector J13

Y1 R182 Q2 POWER J7 L8 13
R12 3V3 J24 Y1 R182
L9 R12 3V3 J24
R8 VDD_3V3_LP 12 L9
L10 R8 VDD_3V3_LP 12
C8 R13 R108
RST C8 R13 L10 R108
USB-A Micro-AB Connector J23
R9 C10 JP3 L14 11 XPRO POWER RST

R82 R109 R9 C10 JP3 L14 11 XPRO POWER
USB B Connector J13

C24
USB-A Connector J23
R 97
3V3 R82 R109
R101
R106
R125
R127
TP6 R83 R110 C24
R 97
TP5 C20 10 3V3

R101
R106
R125
R127
Q1 Q3 R84 R111 TP6 R83 R110

Q1 Q3 TP5 C20
R84 R111
10
C23
R 98
5V R85 R112
R102
R126
R128
R107
A 9
JP7
C13
C17
L3
C7 U6 C23
R 98
5V R85 R112
R102
R126
R128
R107
R86 R113 A 9
JP7
C13
C17
L3
R6 U11 C7 U6
SDMMC0 R86 R113
VDDIODDR
R14 GND R87 R114 8 XPRO EXT1 R6 SDMMC0 U11
VDDIODDR
R15 L5 R14 R87 R114 8 XPRO EXT1

R88 R115 J25 L5 GND
R16 R89 R15 R88 R115 J25
U2 TP7 GND R116
R17 L1 R90 R16 R89 R116
R7 L6 U2 TP7 GND
R91 R117 R17 R7 L1 L6 R90
NC 7 R91 R117
C2
C37 R92
R118 NC 7
C2
R92
SAMA5D2 Xplained Ultra [USER GUIDE]

R93 C37 R118
R119
C3
J8 R94 6 R93 R119
R120
C3
R21 C38 J8 R94 6
R19 R95 R121 R120
C1 C22 5 R21 C38
R22 R20 A0 R122 R19 R95 R121
TP3 R96 C1 C22 5
R22 R20 A0 R96 R122
C40 TP3
C19
C41 4 C40
R103
R11
R18
R24
R27
A1
C19
C41 4
R103
R11
R18
R24
R27
A1
JP4
TP8
R157
R160
R162 R164
JP4
A2 3 TP8
R30
R41
R44
C45 R138
R157
R160
R162 R164
VDDCORE
A2 3
R30
R41
R44
D1 Y3 C45 R138
R166
R168
R170
R172
R174
R176
VDDCORE
R26
D2
C47
C48
A D1 Y3
2
1
A3 2
R166
R168
R131 L12
R170
R172
R174
R176
R26
C27 D2
C47
C48
2
1
A3 2
R131 L12
C27
C28 A4 B F4_TXD 1
R100
R105
R123
C28 B
VBAT
C29 Y4 A4 F4_TXD 1
R100
R105
R123
R171
R173
R175
R177
R156
R159
R161
R163
R165
R167
R169
VBAT
C43 R129 Y4
3
4
C30 A5 F4_RXD 0 C29
R171
R173
R175
R177
R156
R159
R161
R163
R165
R167
R169
J3 J4 C43 R129
3
4
C31 C30 A5 F4_RXD 0
J16
C46
RGB LED J3 J4
R139
J21 C31
A6 J16
C46
RGB LED
R139
Pin1 J21
A6
JP6
C44
J22 Pin1
JP6
A7 14
C44
R140
R142
R144
R147
R149
R151
R28 R42 B F1_TXD A7 J22 14
R140
R142
R144
R147
R149
R151
J9
C52 15 R28 R42 B F1_TXD
U10
R141
R143
R145
R150
R154
C42 J12
F1_RXD J9
C52 15
U10
VDDBU
R141
R143
R145
R150
R154
C42 F1_RXD
C53
J12
R148 J15
VDDBU
A8 R76 R132 F0_TXD 16

C53
R148 J15
R77
A8 R76 R132 F0_TXD 16
R133
A9 R78 F0_RXD 17 XPRO EXT2 R77 R133
R134 J26
HSIC
A9 F0_RXD 17 XPRO EXT2
LCD
R79 U9 R78
R135 R134 J26
HSIC
F3_TXD 18
LCD
A10 R80 R79

R135
U9
R136
J2
F3_TXD 18
C51
A10 R80
R146
R152
R155
R158
R136
J2
F3_RXD 19
C51
A11 R81 R137

R146
R152
R155
R158
A11 R81 R137 F3_RXD 19

CANRX1 U7 SDA1 20
PIOBU CANRX1 U7 SDA1 20
R36 CANTX1 DIGITAL SCL1 21 PIOBU
R37 R36 CANTX1 DIGITAL SCL1 21
R38 R37
CANRX0
D52
D50
D48
D46
D44
D42
D40
D38
D36
D34
D32
D30
D28
D26
D24
D22
R39 R38
GND
CANRX0
D52
D50
D48
D46
D44
D42
D40
D38
D36
D34
D32
D30
D28
D26
D24
D22
R39
GND
R40 CANTX0
R40 CANTX0
JP2
JP2
DEBUG_DIS
CTS
C25
R45
R47
R48
R60
R61
R49
C36 J17
DEBUG_DIS
J1
CTS
D53
D51
D49
D47
D45
D43
D41
D39
D37
D35
D33
D31
D29
D27
D25
D23
C25
R45
R47
R48
R60
R61
R49
GND
C36 J17
J1
5V 5V
D53
D51
D49
D47
D45
D43
D41
D39
D37
D35
D33
D31
D29
D27
D25
D23
GND
R65 R72
TXD
5V 5V
JP9
R31 R66 R73 R65 R72
R32 R67 JP9
R31 R66 R73
DEBUG
R68
TXD RXD VCC

R33 R32 R67
R69
DEBUG
R34 R68
RXD VCC
R70 Y2 R33
R35 R34 R69
BOOT_DIS
R70 Y2
U3 R35
BOOT_DIS
R64
U3
RTS GND
R64
C34
RTS GND
J18
L2
C35 ISC
C16
C18
C21
J6
C12
3.3V LEVELS ETH C34
J18
L2
C35 ISC
C16
C18
C21
J6
C12
J19
3.3V LEVELS ETH
R130
2
J19
R
R130
SDMMC1
2
R
TM
SDMMC1
PB_USER
J13 A5-USB-B
TM
PB_USER
J13 A5-USB-B
4
3
BP1
4
3
BP1
WWW.ATMEL.COM
WWW.ATMEL.COM
The USB-B host port A (J13) features a VBUS insert detection function through the ladder-type resistors R26 and
Table 5-8. USB A&B Connector Signal Descriptions
1 VBUS 5V power
2 DM Data minus
3 DP Data plus
4 ID On-the-go identification
5 GND Common ground
5.4.5 LCD TFT Interface
5.4.5.1 LCD
The SAMA5D2-XULT board provides 18 bits of data and control signals to the LCD interface. Other signals are
used to control the LCD and are available on connector J2: TWI, SPI, two GPIOs for interrupt, 1-Wire and power
supply lines.
5.4.5.2 LCD Expansion Header
J2 is a 1.27mm pitch 50-pin header. It gives access to the LCD signals.
Figure 5-26. LCD Expansion Header Interface Schematic

VDDB_5V VDD_3V3
R335 DNP(0R) LCD
R347 0R J2
R40 0R 50
[4,9,12,14,15] NRST 49
48
(LCDPWM) 47
[8] LCD_PWM_PC28 46
[7] LCD_IRQ2_PB8 (IRQ2)
(IRQ1) 45
[7] LCD_IRQ1_PB7 44
R39 DNP(0R) [8] LCD_TWCK1_PD5 (TWI_SCL)
[8] LCD_AD3_YM_PD22 43
R231 22R [8] LCD_TWD1_PD4 (TWI_SDA)
[8,10,15] ISC_PCK/SPI1_NPCS0_PC4 42
[8] LCD_DISP_PC29 (LCDDISP)
R38 DNP(0R) 41
[8] LCD_AD2_YP_PD21 40
R213 22R
[8,10,15] ISC_D9/SPI1_MISO_PC3 39
R37 DNP(0R) 38
[8] LCD_AD1_XM_PD20 37
R219 22R [8] LCD_DEN_PD1 (LCDDEN)
[8,10,15] ISC_D8/SPI1_MOSI_PC2 36
[8] LCD_HSYNC_PC31 (LCDHSYNC)
R36 DNP(0R) (LCDVSYNC) 35
[8] LCD_AD0_XP_PD19 [8] LCD_VSYNC_PC30 34
R222 39R [8] LCD_PCK_PD0 (LCDPCK)
[8,10,15] ISC_D7/SPI1_SPCK_PC1 33
(LCDDAT23) 32
[8] LCD_DAT23_PC27 31
[8] LCD_DAT22_PC26 (LCDDAT22)
(LCDDAT21) 30
[8] LCD_DAT21_PC25 29
28
(LCDDAT19) 27
[8] LCD_DAT19_PC23 26
25
(LCDDAT17) 24
(LCDDAT16) 23
(LCDDAT15) 22
[8] LCD_DAT15_PC21 21
(LCDDAT13) 20
[8] LCD_DAT13_PC19 19
18
(LCDDAT11) 17
[8] LCD_DAT11_PC17 16
15
(LCDDAT9) 14
(LCDDAT8) 13
(LCDDAT7) 12
[8] LCD_DAT7_PC15 11
(LCDDAT5) 10
[8] LCD_DAT5_PC13 9
8
(LCDDAT3) 7
[8] LCD_DAT3_PC11 6
5
(LCDDAT1) 4
(LCDDAT0) 3 52
R42 0R (ID_SYS) 2 51
[7] LCD_ID_PB0 1
R28 DNP(330R)
[14] EDBG_ID_01
50 Pin FPC Connector

5.4.5.3 LCD Power
In order to operate correctly out of the processor with various LCD modules, two voltage lines are available: 3.3V
and 5 VCC (default), both selected by 0R resistors R335 and R347.
Figure 5-27. LCD Power

VDDB_5V VDD_3V3
R335 DNP(0R) LCD
R347 0R J2
R40 0R 50
[4,9,12,14,15] NRST 49
48
47
46
45
5.4.5.4 LCD Connector J2
Figure 5-28. LCD Connector J2
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31

R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150

HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143

R127 R128 R152
L13 R140 R141
R125 R126 C51
DIGITAL D40 D41
B
J19
R146
R138
C49 R106 R107 C48

R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46

EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130

PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12

R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53

J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
C32 Y2
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49

D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16

R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-9. LCD Connector J2 Signal Descriptions

Pin Signal PIO Signal RGB Interface Function Alternate
1 ID_SYS PB0/ ID00 ID Extension module identification EDBG_ID_01
2 – GND GND GND –
3 – – – – –
4 – – – – –
5 LCDDAT2 PC10 D2 Data line –

Table 5-9. LCD Connector J2 Signal Descriptions (Continued)
13 – – – – –
14 – – – – –
23 – – – – –
24 – – – – –
30 LCDDAT22 PE26 D22 Data line –
31 LCDDAT23 PE27 D23 Data line –
33 LCDPCK PD0 PCLK Pixel clock –
34 LCDVSYNC PC30 VSYNC/CS Vertical sync –
35 LCDHSYNC PC31 HSYNC/WE Horizontal sync –
36 LCDDEN PD1 DATA_ENABLE/RE Data enable –
37 SPI1_SPCK PC1 SPI_SCK – AD3/YM PD22
38 SPI1_MOSI PC2 SPI_MOSI – AD2/YP PD21
39 SPI1_MISO PC3 SPI_MISO – AD1/XM PD20
40 SPI1_NPCS0 PC4 SPI_CS – AD0/XP PD19
41 LCDDISP PA29 ENABLE Display enable signal –
42 TWD1 PD4 TWI_SDA I2C data line (maXTouch) –
43 TWCK1 PD5 TWI_SCL I2C clock line (maXTouch) –
44 GPIO PB7 IRQ1 maXTouch interrupt line –
45 GPIO PB8 IRQ2 Interrupt line for other I2C devices –
46 LCDPWM PC28 PWM Backlight control –

Table 5-9. LCD Connector J2 Signal Descriptions (Continued)
47 RESET – RESET Reset for both display and maXTouch –
48 Main_5V/3V3 VCC VCC 3.3V or 5V supply (0R) –
49 Main_5V/3V3 VCC VCC 3.3V or 5V supply (0R) –
50 GND GND GND GND –

5.4.6 ISC
The Image Sensor Controller (ISC) system manages incoming data from a parallel or serial csi-2 based
CMOS/CCD sensor. It supports a single active interface. It supports the ITU-R BT 656/1120 422 protocol with a
data width of 8 bits or 10 bits and raw Bayer format. The internal image processor includes adjustable white
balance, color filter array interpolation, color correction, gamma correction, 12 bits to 10 bits compression,
programmable color space conversion, horizontal and vertical chrominance subsampling module.
Figure 5-29. ISC J18
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XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
SDMMC0 U11 D28 D29
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150

HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143

R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R138 R146
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49

D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16

R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-10. ISC J18 Signal Descriptions

1 3V3 – ISC Power Supply
2 GND – Ground
3 3V3 – ISC Power Supply
4 GND – Ground
5 ISC_RST PB11 Reset ISC module
6 ISI_PWD PB12 Power Down module
7 TWCK1 PD5 TWI Clock
8 TWD1 PD4 TWI Data
9 GND – Ground
10 ISC_MCK PC7 ISC Master Clock
11 GND – Ground
12 ISC_VSYNC PC5 ISC Vertical Synchronization
13 GND – Ground
14 ISI_HSYNC PC6 ISC Horizontal Synchronization

Table 5-10. ISC J18 Signal Descriptions (Continued)
15 GND – Ground
16 ISC_PCK PC4 Clock
17 GND – Ground
18 ISC_D4 PB30 Image data D0
19 ISI_D5 PB31 Data D1
20 ISC_D6 PC0 Data D2
24 ISC_D10 PB24 Data D6
25 ISC_D11 PB25 Data D7
26 ISC_D0 PB26 RFU
27 ISC_D1 PB27 RFU
28 ISC_D2 PB28 RFU
29 ISC_D3 PB29 RFU
30 GND – Ground
The connector ISC J18 has been laid out to be compatible with former evaluation
WARNING kits and existing extensions in 8-bit modes. Hence, the 8-bit image data [7:0] are
aligned with ISC_D[11:4] in the table above. Refer to the SAMA5D2 Series
datasheet for an in-depth description of the ISC bussing scheme. A summary is
also provided below.
Table 5-11 shows how ISC_DATA[11:0] is routed to image data D[11:0] in relation to the bit mode.
Table 5-11. ISC Interface - ISC_DATA to Image Data

Interface 12-bit 11-bit 10-bit 9-bit 8-bit
isc_data[11](MSB) D[11] D[10] D[9] D[8] D[7]
isc_data[10] D[10] D[9] D[8] D[7] D[6]
isc_data[9] D[9] D[8] D[7] D[6] D[5]
isc_data[8] D[8] D[7] D[6] D[5] D[4]
isc_data[7] D[7] D[6] D[5] D[4] D[3]
isc_data[6] D[6] D[5] D[4] D[3] D[2]
isc_data[5] D[5] D[4] D[3] D[2] D[1]
isc_data[4] D[4] D[3] D[2] D[1] D[0]
isc_data[3] D[3] D[2] D[1] D[0] Not Used
isc_data[2] D[2] D[1] D[0] Not Used Not Used
isc_data[1] D[1] D[0] Not Used Not Used Not Used
isc_data[0] D[0] Not Used Not Used Not Used Not Used

Figure 5-30. ISC J18 Header
VDD_3V3
ISC
R130 0R J18
1 2
3 4
5 6
[7,15] ISC_RST/EXP_PB11 7 8 ISC_PWD/EXP_PB12 [7,15]
[8] ISC_TWCK1_PD5 9 10 R259 39R ISC_TWD1_PD4 [8]
11 12 R251 39R ISC_MCK/EXP_PC7 [8,15]
13 14 R246 39R ISC_VSYNC/EXP_PC5 [8,15]
15 16 R239 39R ISC_HSYNC/EXP_PC6 [8,15]
17 18 R228 22R ISC_PCK/SPI1_NPCS0_PC4 [8,10,15]
R224 22R 19 20 R223 22R ISC_D4/EXP_PB30 [7,15]
[7,15] ISC_D5/EXP/XPRO_PB31 R220 22R 21 22 R221 22R ISC_D6/EXP/XPRO_PC0 [8,15]
[8,10,15] ISC_D7/SPI1_SPCK_PC1 R216 22R 23 24 R215 22R ISC_D8/SPI1_MOSI_PC2 [8,10,15]
[8,10,15] ISC_D9/SPI1_MISO_PC3 R208 22R 25 26 R207 22R ISC_D10/EXP_PB24 [7,15]
[7,15] ISC_D11/EXP_PB25 R191 22R 27 28 R190 22R ISC_D0/EXP_PB26 [7,15]
[7,15] ISC_D1/EXP_PB27 R188 22R 29 30 ISC_D2/EXP/XPRO_PB28 [7,15]
[7,15] ISC_D3/EXP/XPRO_PB29
Header 2X15
5.4.7 Audio Class D Amplifier

The Audio Class D Amplifier (CLASSD) is a digital input, Pulse Width Modulated (PWM) output stereo Class D
amplifier. It features a high quality interpolation filter embedding a digitally controlled gain, an equalizer and a de-
emphasis filter.
On its input side, the CLASSD is compatible with most common audio data rates. On the output side, its PWM
output can drive either:
 high-impedance single-ended or differential output loads (Audio DAC application) or,
 external MOSFETs through an integrated non-overlapping circuit (Class D power amplifier application).
Figure 5-31. Audio PWM Class D MOSFET Mono Amplifier

VSYS_5V
R62
0R
R71 0R
R312
C26 10uF
C33 10uF
C39 10uF
C32 10uF
2
D7
1N4148W
10K
PMOS 4
1
[7] CLASSD_R0_PB1 R311 22R C158 10nF 5 G2 S2
[7] CLASSD_R1_PB2
D2 3
6
D1
R315 22R 2 G1
R313
S1 1
NMOS J5
1
U17 DMC2400UV
2
10K
180ohm at 100MHz
L25
1 2 Right P 3
R318
L26
1 2 Right N 4
2
D8
180ohm at 100MHz
1N4148W
10K
PMOS 4
1
[7] CLASSD_R3_PB4
D2 3
6
D1
R324 22R 2 G1
R323
S1 1
NMOS
U19 DMC2400UV
10K

Figure 5-32. CLASSD Output Connector J5
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108 D51
R99 R103 D50
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-12. CLASSD Output Connector J5 Signal Descriptions

1 VSYS_5V Power
2 GND GND
3 OUTPUT RIGHT P Positive Level
4 OUTPUT RIGHT N Negative Level

5.4.8 Tamper Interface
The SAMA5D2-XULT board features eight tamper pins for static or dynamic intrusion detections, UART reception,
and two analog pins for comparison.
Intrusion detection is described in the document “Security Module”, Atmel literature No. 44036. This document is
available under Non-Disclosure Agreement (NDA).
Contact an Atmel Sales Representative for further details.
Figure 5-33. Tamper Pin Connector J12
J12
PIOBU0 R76 330R 1 2 R132 330R PIOBU1
PIOBU2 R77 330R 3 4 R133 330R PIOBU3
PIOBU4 R78 330R 5 6 R134 330R PIOBU5
PIOBU6 R79 330R 7 8 R135 330R PIOBU7
RXD R80 0R 9 10 R136 0R
11 12
ACP R81 0R 13 14 0R R137 ACN
DNP(Header 2X7)
VDD_5V_IN VDD_5V_IN
R152 1K (1.24V) R146 100R 1% ACN
R100
10K
R155
2
R123 100R 1% ACP 0R

C51 1
100nF
R105 R158
U7
47K DNP(0R)
3
TLV431A

5.4.9 Tamper Connector
Figure 5-34. Tamper Connector J12
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150

HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143

R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49

D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16

R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-13. Tamper Connector J12 Signal Descriptions

Signal Pin No. Signal
PIOBU0 1 2 PIOBU1
PIOBU2 3 4 PIOBU3
PIOBU4 5 6 PIOBU5
PIOBU6 7 8 PIOBU7
RXD 9 10 NC
GND 11 12 GND
ACP 13 14 ACN

5.4.10 RGB LED
There is one RGB LED on the SAMA5D2-XULT board; it can be controlled by the user. The three LED cathodes
are controlled via GPIO PWM pins.
Figure 5-35. RGB LED Indicators

D2
R326 470R 1 VDD_LED

[7] LED_RED_PB6 Red
R325 470R 4 2
[7] LED_GREEN_PB5 Green Anode
R328 470R 3
[7] LED_BLUE_PB0 Blue
RGB LED
5.4.11 Push Button Switches

The SAMA5D2-XULT features three push buttons:
 One board Reset button (BP3) connected to the PMIC ACT8945A. When pressed and released, it causes a
power-on reset of the board.
 One Wakeup push button connected to the PMIC ACT8945A, used to exit the processor from low-power
mode (BP2).
 One User momentary push button (BP1).
Figure 5-36. User Push Buttons (BP1)

BP1 Tact Switch
[7] USER_PB_PB9
5.4.12 Debug Interfaces

The SAMA5D2-XULT board includes a JTAG, a Debug serial COM port and an EDBG interface port, to provide
debug level access to the SAMA5D2.
5.4.12.1 Debug JTAG
A 10-pin JTAG header is provided on the SAMA5D2-XULT board to facilitate the software development and
debugging by using various JTAG emulators. The interface signals have a voltage level of 3.3V.
Figure 5-37. JTAG Interface

VDD_3V3
R104 R75 R74

100K 100K 100K
VDD_3V3
J11
1 2 JTAG_TMS_PD17 [8]
3 4 JTAG_TCK_PD14 [8]
5 6 JTAG_TDO_PD16 [8]
JTAG_TCK_PD14 R99 DNP(0R) 7 8 JTAG_TDI_PD15 [8]
9 10 NRST [4,9,10,12,14,15]
Header 2X5

Figure 5-38. JTAG J11
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R99 R108 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-14. JTAG/ICE Connector J11 Signal Descriptions

1 VTref. 3.3V power This is the target reference voltage (main 3.3V).
2 TMS TEST MODE SELECT JTAG mode set input into target CPU
3 GND Common ground
TCK TEST CLOCK - Output timing signal, for
4 JTAG clock signal into target CPU
synchronizing test logic and control register access
5 GND Common ground
TDO JTAG TEST DATA OUTPUT - Serial data
6 JTAG data output from target CPU
input from the target
Some targets having too slow system clock must synchronize the JTAG
RTCK - Input Return test clock signal from the
7 inputs to internal clocks. In present case such synchronization is
target
unneeded and TCK merely looped back into RTCK.
TDI TEST DATA INPUT - Serial data output line,
8 JTAG data input into target CPU
sampled on the rising edge of the TCK signal
9 GND Common ground
10 nSRST RESET Active-low reset signal. Target CPU reset signal.

5.4.12.2 Serial Console Port
The SAMA5D2-XULT board has a dedicated serial port for debugging, which is accessible through the 6-pin male
header J1. Various interfaces can be used as USB/Serial DBGU port bridge, such as FTDI TTL-232R USB to TTL
serial cable or basic breakout board for the RS232/USB converter.
Figure 5-39. Debug Com Port for Console

VDD_3V3
VDD_3V3 VSYS_5V
R337
R338
R339
R343
C177
DNP(0R) R341
DNP(0R) R342
U21 100nF
DBGU_OE 1 5
VCC
DNP(68K)
DNP(68K)
[8,14] DBGU_UTXD1_PD3 2 4 DBGU_TXD
68K
68K
3 J1
GND
DBGU_CTS 1
DBGU_TXD 2
NL17SZ126DFT2G
DBGU_RXD 3
VDD_3V3 4
DBGU_RTS 5
6
C170
100nF Header 1X6
U20
5 1 DBGU_OE
VCC
VDD_3V3
4 2 DBGU_RXD
[8,14] DBGU_URXD1_PD2
3 R340 JP2 JPR2
GND Header 1X2 Jumper
NL17SZ126DFT2G 10K
1
2
DBGU_OE
DBGU_DIS
R336 DNP(0R) DBGU_CTS
TP27 SMD
R344 DNP(0R) DBGU_RTS
TP28 SMD
A jumper (JP2) is available to disable the Debug communication interface.

R341 and R342 are optional (not implemented) resistors that can be used for power selection. Power can be
delivered either by the SAMA5D2-XULT board or by the debug interface tool. To avoid malfunction between the
debug interface (e.g., FTDI) and the on-board power system, ensure that the voltage level selected corresponds to
application requirements.
With SAMA5D2-XULT (ES) ROM code, the default baud rate on the Serial Console
WARNING port is 57600.

Figure 5-40. DEBUG Connector J1
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-15. DEBUG Connector J1 Signal Descriptions

1 CTS RFU Handshake input
2 TXD1 (Transmitted Data) PD3 RS232 serial data output signal
3 RXD1 (Received Data) PD2 RS232 serial data input signal
4 Power – 5V/3.3V (selected by resistors)
5 RTS RFU Handshake output
When using a console connected to the DEBUG interface J1, the jumper JP2
WARNING DEBUG_DIS should be OFF.
5.4.13 Embedded Debugger (EDBG) Interface

The Atmel Embedded Debugger (EDBG) (1) is an intuitive plug-and-play solution which adds full programming and
debugging support to embedded hardware kits containing Atmel microcontrollers. It enables seamless integration
between the target hardware and the Atmel Studio front end.
In addition to the Virtual COM port which provides a UART bridge to the target device, the EDBG provides a Data
Gateway Interface, through which the target device and host PC can communicate, facilitating high-level
application debugging, monitoring, graphing and logging of system information in real-time.
1. Device and Ordering Information—The EDBG is a factory-programmed AT32UC3A4256J-C1UR standard

microcontroller with ordering code AT32UC3A4256HHB-C1UR. For further information please contact
edbg@atmel.com.

The EDBG is based on the Atmel AT32UC3A4256J high-performance low-power 32-bit AVR microcontroller
running at up to 60 MHz. The device includes an on-chip USB 2.0 high-speed hardware module with dedicated
DMA channels, making it ideal for data communications.
By default, the EDBG is in Reset state and not usable. To use the EDBG interface, remove the jumper JP1. To
avoid any conflicts with the debug signals, do not use the JTAG and EDBG at the same time.
Figure 5-41. EDBG Interface

VDD_3V3
EDBG_XIN
R29 DNP(1M) EDBG_XOUT
2.2K
2.2K
1K
1K
1K
1K
1K
1K
1K
Y1
1 4
R57
R56
R58
R54
R55
R51
R52
R334
R331
2 3 [15] EDBG_ID_03 EDBG_JTAG_TCK_PD14 [8]
EDBG_ID_01
[15] EDBG_ID_02 EDBG_JTAG_TDO_PD16 [8]
EDBG_ID_02 C14 C11
EDBG_JTAG_TMS_PD17 [8]
EDBG_ID_03 20pF 12MHz CL=15pF 20pF VDD_3V3
EDBG_JTAG_TDI_PD15 [8]
EDBG_ID_04
EDBG_XOUT
EDBG_ID_05
EDBG_XIN
EDBG_ID_06
TP4
EDBG_ID_07
SMD
ERASE
EDBG_DGI_TWD
D4 D3
EDBG_DGI_TWCK
EDBG_TWI EDBG RED BLUE
C4
D7
D6
C6
C5
D5
C1
K5
K6
A5
A6
B7
A7
B1
B2
B3
A3
R43
R59
R63
PC00 / PX14
PB00
PB01
PB02
PB03
PB04
PB06
PB07
PB08
PB09
PB10
PB11
PC01
PC02
PC03
PC04
PC05
G8 G4
PA00 / PA18 PX00 EDBG_ID_06 [15]
G10 G2
PA01 / PA17 PX01
100K
470R
470R
E1 G3
R4 330R EDBG_CDC_UART_RX F9 PA02 / PX47 PX02 J1
[8,9] DBGU_UTXD1_PD3 PA03 PX03
[8,9] DBGU_URXD1_PD2 R5 330R EDBG_CDC_UART_TX E9 H1
G9 PA04 PX04 G1 3 3
PA05 PX05 EDBG_ID_07 [15]
E8 F3
H10 PA06 / PA13 PX06 F4
PA07 / PA19 PX07 Q4 Q5
F8 E3
[15] EDBG_DGI_GPIO0 PA08 PX08 1 BSS138 1 BSS138
D8 E4
[15] EDBG_DGI_GPIO1 PA09 PX09
C10 D2
[15] EDBG_DGI_GPIO2 PA10 PX10 EDBG_ID_05 [15]
VSYS_5V C9 D1 2 2
[15] EDBG_DGI_GPIO3 PA11 PX12 R53
EDBG_DGI_SDA G7 D3
PA12 / PA25 PX13 EDBG_ID_04 [15]
K7 K4
PA14 / PX11 PX15 / PX32 100K
J7 D4
R3 TP1 TP2 PA15 / PX45 PX16 / PX53
E7 F1 STATUS_LED_CTRL
100K SMD SMD PA16 U1 PX19 / PX59
EDBG_FORCE_BOOT H9 H2 TARGET_RESET_SENSE R50 0R
PA20 / PX18 PX21 NRST [4,9,10,12,14,15]
EDBG_ADC0 K10 K1
PA21 / PX22 AT32UC3A4256HHB-C1UR ( AT32UC3A4256J-C1UR, Factory Programmed ) PX23
Force s/n H6 J2
R329 0R G6 PA22 / PX20 PX24 H4
R2 PA23 / PX46 PX25
J10 J3
200K [15] EDBG_DGI_TWD PA24 / PX17 PX26
EDBG_DGI_SCL F7 K2
[15] EDBG_DGI_TWCK PA26 / PB05 PX27 EDBG_SPI_MISO [15]
A2 K3
PA27 PX28 EDBG_SPI_MOSI [15]
A1 J4
[10] EDBG_ID_01 PA28 PX29 EDBG_SPI_SCK [15]
R46 330R B4 G5
[4,9,10,12,14,15] NRST PA29 PX30 EDBG_SPI_NCS [15]
A4 H5
C2 PA30 PX31
PA31
EDBG_USB_VBUS_5V A10 K9 EDBG_JTAG_TCK

EDBG_USB_DM EDBG_USB_HS_DM A9 USB_VBUS TCK K8 EDBG_JTAG_TDI
EDBG_USB_DP EDBG_USB_HS_DP A8 DMHS TDI J8 EDBG_JTAG_TDO
DPHS TDO H7 EDBG_JTAG_TMS
R23 39R EDBG_USB_FS_DM B9 TMS
DMFS
GNDCORE
VDDCORE
R25 39R EDBG_USB_FS_DP B8 J9 EDBG_RESET_N
GNDIO_1
GNDIO_2
GNDIO_3
GNDIO_4
GNDIO_5
GNDIO_6
GNDANA
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIN_1
VDDIN_2
VDDANA
DPFS RESET_N
GNDPLL
VDD_3V3
C7
USB_VBIAS
JPR1 JP1
R10 C9 Jumper Header 1X2 R1
E10
J6
H8
F10
D10
B10
E5
B5
D9
J5
B6
F2
F6
F5
E2
E6
C3
H3
C8
10pF 10K
L13 6.8K 1%
180ohm at 100MHz VDD_3V3 EDBG_RESET_N
1
2
1 2 L4
180ohm at 100MHz VDD_3V3 EDBG_DIS
1 2 VDD_3V3 C4
C49 C50
1nF 1nF 100nF
8
C6 C5 C168
C15 C175
1nF
EDBG_USB_VBUS_5V [4] 100nF 100nF
9 VBUS 1 2.2uF 2.2uF
2 EDBG_USB_DM
DM
3 EDBG_USB_DP
DP
SHD
ID 4
10 GND 5
4
U5
VDD_3V3 JTAG
VCC
IO2
VDD_3V3
(3V3) J10
11
J14 EDBG_JTAG_TCK 1 2
MicroUSB AB Connector EDBG_JTAG_TDO 3 4
C179 C171 C178 C172 C174
EDBG_JTAG_TMS 5 6 EDBG_RESET_N
EARTH_USB_EDBG
7 8
L11 2.2uF 2.2uF 100nF 100nF 100nF
EDBG_JTAG_TDI 9 10
GND
IO1
180ohm at 100MHz
1 2
PRTR5V0U2X DNP(Header 2X5)
1
EARTH_USB_EDBG
5.4.14 CDC Debug Interface

This feature is enabled only if pin J9 (RESET_N) of the microcontroller is not tied to ground. The pin is normally
pulled high and controlled by jumper JP1.
 Jumper JP1 not installed: The CDC device is enabled.
 Jumper JP1 installed: The CDC device is disabled.
WARNING The default baud rate CDC is 57600 (57600/N/8/1).
When using a console with the EDBG-CDC, the jumper JP2 DEBUG_DIS should be
WARNING ON.

5.4.15 EDBG USB Type Micro-AB
Figure 5-42. EDBG USB Type Micro-AB Connector J14

WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
2 4 U8 R153 R149 R150 D36 D37
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143

R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49

D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-16. USB Connector J14 Signal Descriptions

1 VBUS 5V power
2 DM Data minus
3 DP Data plus
4 ID On-the-go identification
5 GND Common ground

5.5 PIO Usage on Expansion Connectors
5.5.1 Arduino Connectors

Five 8-pin, one 6-pin, one 10-pin and one 36-pin headers (J7, J8, J9, J16, J17, J20, J21, J22) are provided on the
SAMA5D2-XULT board to enable the PIO connection of various expansion cards. These headers’ physical and
electrical implementation match the Arduino R3 extension (“shields”) system.
Due to I/O multiplexing, different signals can be provided on each pin.
Figure 5-43. Expansion Boards Connectors

R194 0R ISC_D6/EXP/XPRO_PC0 [8,10,15]
R193 DNP(330R) EDBG_DGI_TWCK [14]
J20 R196 0R ISC_D5/EXP/XPRO_PB31 [7,10,15]

J7 10 R195 DNP(330R) EDBG_DGI_TWD [14]
VDD_3V3 9
1
8 AREF [9]
2
7
R310 100R 1% 3
[4,9,10,12,14] NRST 6 EXP/XPRO_PD25 [8,15]
4
5 EXP/XPRO_PD27 [8,15]
5
[4] 5V_EXT_INP 4 EXP/XPRO_PD26 [8,15]
6
3
7 R198 0R EXP/XPRO_PD28 [8,15]
2
8 R197 DNP(330R) EDBG_SPI_NCS [14]
1
EXP/XPRO_PB5 [7,15]
Socket 1X8 EXP/XPRO_PB6 [7,15]
Socket 1X10
EXP/XPRO_PB9 [7,15]
R200 0R EXP_PA19 [7,15]
J8 J21 R199 DNP(330R) EDBG_DGI_GPIO0 [14]
1 1
[7] EXP_PA16 R202 0R EXP_PA20 [7]
2 2
[8] EXP_PD19 R201 DNP(330R) EDBG_DGI_GPIO1 [14]
3 3
[8] EXP_PD20
4 4 EXP/XPRO_PD29 [8,15]
[8] EXP_PD23
5 5
[8] EXP_PD21
6 6
[8] EXP_PD22 R203 0R EXP/XPRO_PB10 [7,15]
7 7
8 8
[8] EXP_PD30
R206 0R EXP/XPRO_PA21 [7,15]
R205 DNP(330R) EDBG_DGI_GPIO3 [14]
Socket 1X8 Socket 1X8
EXP/XPRO_PD12 [8,15]
EXP/XPRO_PD13 [8,15]
J9 J22
1 1 EXP/XPRO_PA24 [7,15]
[7,15] EXP_PA19
2 2 EXP/XPRO_PA23 [7,15]
[7] EXP_PA17
3 3 ISC_D2/EXP/XPRO_PB28 [7,10,15]
[7] EXP_PA18
4 4 ISC_D3/EXP/XPRO_PB29 [7,10,15]
[4,8,15] PMIC_LBO/EXP_PC8
5 5 EXP_PB23 [7]
[8] EXP_PC27
6 6 EXP_PB22 [7]
[8,15] EXP_PC26
7 7 EXP_TWD1_PD4 [8]
[8] EXP_PC11
8 8 EXP_TWCK1_PD5 [8]
[8] EXP_PC10
5V_EXT_INP
J17
1 2
3 4 EXP_PA14 [7]
[8] EXP_PD6
5 6 ISC_D4/EXP_PB30 [7,10,15]
[7] EXP_PA15
7 8 ISC_D6/EXP/XPRO_PC0 [8,10,15]
[7,10,15] ISC_D5/EXP/XPRO_PB31
9 10 EXP_PB21 [7]
[7] EXP_PB20
11 12 ISC_D0/EXP_PB26 [7,10]
[7,10] ISC_D1/EXP_PB27
13 14 ISC_D2/EXP/XPRO_PB28 [7,10,15]
15 16 ISC_D4/EXP_PB30 [7,10,15]
17 18 ISC_D6/EXP/XPRO_PC0 [8,10,15]
[8,10] ISC_D7/SPI1_SPCK_PC1
19 20 EXP_PA25 [7]
[7] EXP_PA22
[7] EXP_PA26 21 22 ISC_D9/SPI1_MISO_PC3 [8,10]
R266 22R 23 24 ISC_HSYNC/EXP_PC6 [8,10]
[8,10] ISC_D8/SPI1_MOSI_PC2
R262 DNP(22R) 25 26 ISC_PCK/SPI1_NPCS0_PC4 [8,10]
[9] CLK_AUDIO 27 28 ISC_PWD/EXP_PB12 [7,10]
[8,10] ISC_VSYNC/EXP_PC5 29 30
R294 0R ISC_D11/EXP_PB25 [7,10]
31 32
[7,10] ISC_RST/EXP_PB11 R292 DNP(0R) EDBG_ID_05 [14]
33 34
R271 0R
[8,10] ISC_MCK/EXP_PC7 35 36 R302 0R PMIC_LBO/EXP_PC8 [4,8,15]
[14] EDBG_ID_04 R273 DNP(0R)
R299 DNP(0R) EDBG_ID_07 [14]
R290 0R
[7,10] ISC_D10/EXP_PB24 Socket 2X18 EXP_PC26 [8,15]
[14] EDBG_ID_06 R283 DNP(0R)
[8] EXP_PD31
VDD_3V3 5V_EXT_INP
DNP(0R) R244
DNP(0R) R240
SPI1_MISO 0R R247 J16

[8,15] EXP/XPRO_PD27
DNP(330R) R248
[14] EDBG_SPI_MISO 1 2
SPI1_SPCK 0R R260 3 4 R252 0R SPI1_MOSI
[8,15] EXP/XPRO_PD25 EXP/XPRO_PD26 [8,15]
DNP(330R) R257 5 6 R253 DNP(330R) EDBG_SPI_MOSI [14]
[14] EDBG_SPI_SCK
NRST 100R 1% R261
Header 2X3

5.5.1.1 Functions Available Through the Arduino Headers
The multiplexing of the SAMA5D27 I/Os (standard parallel I/O and up to three peripheral functions per pin) makes
it possible to route alternate signals via Arduino extension headers. To enable these signals, SAMA5D27 PIO
multiplexing must be properly configured. For more details, refer to Section 5.6 “SAMA5D2-XULT Board
Schematics” and the section PIO Controller (PIO) in the SAMA5D2 Series datasheet.
Table 5-17 to Table 5-23, together with the connector schematics, provide the alternate signals available for use
with Arduino connectors.
Figure 5-44. J7 Connector

WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 J24 BOOT_DIS

JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150

HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143

R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
C47 Y4 JP6 VDDBU D42 D43
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53

J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
3V3
3V3
NC
GND
GND
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
VBAT
CANRX0
CANTX0
A10
A11
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49

D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16

R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-17. J7 Connector Signals

Pin No. Signal Function
1 VBAT –
2 3V3 (IOREF)
3 RST –
4 3V3 –
5 5V –
6 GND –
7 GND –
8 VIN NC

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XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R99 R108 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
5V
3V3
3V3
CANTX0
A10
A11
NC
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1

Pin
No. Type SAMA5D27 PIO Muxing Alternates
1 PA19 SPI0_NPCS2 RF1 QSPI0_IO3 TIOA0 SDHC1_DAT1 D14
2 PA17 SPI0_NPCS0 RD1 QSPI0_IO1 I2SDI1 FLEXCOM3_O1 D12
3 PA18 SPI0_NPCS1 RK1 QSPI0_IO2 I2SDO1 SDHC1_DAT0 D13
4 PC8 LCDDEN NANDRDY FIQ PCK0 UTXD1 ISI_FIELD
5 PC27 LCDDAT23 GTX3 PCK1 CANRX1 TWD0 A16
6 PC26 LCDDAT22 – GTX2 CANTX1 – A15
7 PC11 LCDDAT1 GTXEN ISI_D2 TCLK4 CANRX0 A0/NBS0
8 PC10 LCDDAT0 GTXCK ISI_D1 TIOB4 CANTX0 –

WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R99 R108 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
5V
3V3
3V3
CANTX0
A10
A11
NC
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1

Pin
2 PA17 SPI0_NPCS0 RD1 QSPI0_IO1 I2SDI1 FLEXCOM3_O1 D12
3 PA18 SPI0_NPCS1 RK1 QSPI0_IO2 I2SDO1 SDHC1_DAT0 D13
5 PC27 LCDDAT23 GTX3 PCK1 CANRX1 TWD0 A16
6 PC26 LCDDAT22 – GTX2 CANTX1 – A15
7 PC11 LCDDAT3 GTXEN ISI_D2 TCLK4 CANRX0 A0/NBS0
8 PC10 LCDDAT2 GTXCK ISI_D1 TIOB4 CANTX0 –

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XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R99 R108 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1

Pin
10 PC0 LCDDAT21 A23 FLEXCOM0_O1 TWCK0 – ISI_D6
9 PB31 LCDDAT20 A20 FLEXCOM0_IO4 TWD0 – ISI_D5
8 AREF – – – – – –
7 GND – – – – – –
6 PD25 SPI1_SPCK FLEXCOM4_O1 – – AD6
5 PD27 SPI1_MISO TCK FLEXCOM2_IO2 – – AD8
4 PD26 SPI1_MOSI – FLEXCOM2_IO1 – – AD7
3 PD28 SPI1_NPCS0 TDI FLEXCOM2_IO3 – – AD9
2 PB5 TCLK2 D10 PWMH2 QSPI1_SCK PTCPORT5 GTSUCOMP
1 PB6 TIOA2 D11 PWML2 QSPI1_CS PTCPORT6 GTXER

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XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108 D51
R99 R103 D50
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1

Pin
1 PB9 TIOA3 D14 PWMFI1 QSPI1_IO2 – GCOL
3 PA20 SPI0_NPCS3 – – TIOB0 SDHC1_DAT2 D15
4 PD29 SPI1_NPCS1 TDO FLEXCOM2_IO4 TIOA3 TWD0 AD10
5 PB10 TIOB3 D15 PWMEXTRG1 QSPI1_IO3 – GRX2
6 PA21 IRQ PCK2 TCLK0 SDHC1_DAT3 NANDRDY
7 PD12 TIOB1 FLEXCOM4_IO1 UTMI_LS1 GRXER ISI_D5 ISI_D0
8 PD13 TCLK1 FLEXCOM4_IO2 UTMI_CRDCPSEL0 GRX0 ISI_D6 ISI_D1

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XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
5V
CANTX0
A10
A11
3V3
3V3
NC
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1

Pin
1 PA24 FLEXCOM1_IO1 D2 TDO SPI1_MISO – QSPI0_IO0
2 PA23 FLEXCOM1_IO2 D1 TDI SPI1_MOSI – QSPI0_CS
3 PB28 LCDDAT17 A17 FLEXCOM0_IO1 TIOA5 – ISI_D2
4 PB29 LCDDAT18 A18 FLEXCOM0_IO2 TIOB5 – ISI_D3
5 PB23 LCDDAT12 A12 RD0 TIOB2 FLEXCOM3_IO1 GMDIO
6 PB22 LCDDAT11 A11 TD0 TIOA2 FLEXCOM3_IO2 GMDC
7 PD4 TWD1 URXD2 – GCOL ISI_D10 NCS0
8 PD5 TWCK1 UTXD2 – GRX2 ISI_D9 NCS1

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XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1

Pin
1 5V – – – – – –
2 5V – – – – – –
3 PD6 TCK PCK1 – GRX3 ISI_D8 NCS2
4 PA14 SPI0_SPCK TK1 QSPI0_SCK I2SMCK1 FLEXCOM3_IO3 D9
5 PA15 SPI0_MOSI TF1 QSPI0_CS I2SCK1 FLEXCOM3_IO1 D10
6 PB30 LCDDAT19 A19 FLEXCOM0_IO3 TCLK5 – ISI_D4
9 PB20 LCDDAT9 A9 TK0 TIOB3 PCK1 GTX0
10 PB21 LCDDAT10 A10 TF0 TCLK3 FLEXCOM3_IO3 GTX1
11 PB27 LCDDAT16 A16 UTXD0 PDMCLK0 – ISI_D1
12 PB26 LCDDAT15 A15 URXD0 PDMDAT0 – ISI_D0
13 PB29 LCDDAT18 A18 FLEXCOM0_IO2 TIOB5 – ISI_D3
14 PB28 LCDDAT17 A17 FLEXCOM0_IO1 TIOA5 – ISI_D2
16 PB30 LCDDAT19 A19 FLEXCOM0_IO3 TCLK5 – ISI_D4
17 PC1 LCDDAT22 A24 CANTX0 SPI1_SPCK I2SCK0 ISI_D7
19 PA22 FLEXCOM1_IO3 D0 TCK SPI1_SPCK SDHC1_CK QSPI0_SCK

Table 5-23. J17 Connector Signals (Continued)
Pin
20 PA25 FLEXCOM1_IO4 D3 TMS SPI1_NPCS0 – QSPI0_IO1
21 PA26 FLEXCOM1_O1 D4 NTRST SPI1_NPCS1 – QSPI0_IO2
22 PC3 LCDPWM NWAIT TIOA1 SPI1_MISO I2SWS0 ISI_D9
23 PC2 LCDDAT23 A25 CANRX0 SPI1_MOSI I2SMCK0 ISI_D8
24 PC6 LCDHSYNC NCS1 TWD1 SPI1_NPCS2 ISI_HSYNC
25 PC5 LCDVSYNC NCS0 TCLK1 SPI1_NPCS1 I2SDO0 ISI_VSYNC
26 PC4 LCDDISP NWR1/NBS1 TIOB1 SPI1_NPCS0 I2SDI0 ISI_PCK
27 PB11 LCDDAT0 A0/NBS0 URXD3 PDMDAT0 – GRX3
28 PB12 LCDDAT1 A1 UTXD3 PDMCLK0 – GTX2
29 PC7 LCDPCK NCS2 TWCK1 SPI1_NPCS3 URXD1 ISI_MCK
30 PB25 LCDDAT14 A14 RF0 – FLEXCOM3_O1 ISI_D11
31 PB24 LCDDAT13 A13 RK0 TCLK2 FLEXCOM3_IO4 ISI_D10
33 PD31 ADTRG NTRST IRQ TCLK3 PCK0 –
34 PC26 LCDDAT22 – GTX2 CANTX1 A15
35 GND – – – – – –
36 GND – – – – – –

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XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
PB_USER
R19
R20
L3 R26 L2 BP1
VBAT
L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1

Pin
1 PD27 SPI1_MISO TCK FLEXCOM2_IO2 – – AD8
2 5V – – – – – –
3 PD25 SPI1_SPCK – FLEXCOM4_O1 – – AD6
4 PD26 SPI1_MOSI – FLEXCOM2_IO1 – – AD7
5 nRST – – – – – –
6 GND – – – – – –

5.5.2 XPRO
The SAMA5D2-XULT board can host three connectors to interface with standard Xplained PRO extensions. These
are not populated by default.
Figure 5-52. XPRO Connectors Schematics
5V_EXT_INP
XPRO Power
J24
1 2
3 4
VSYS_5V VDD_3V3
DNP(Header 2X2)
XPRO EXT1
J25
ID 1 2
[14] EDBG_ID_02
ADC(+) 3 4 ADC(-)
[8] XPRO_PD11 EXP/XPRO_PD12 [8,15]
GPIO 5 6 GPIO
[8,15] EXP/XPRO_PD13 XPRO_PD18 [8]
PWM(+) 7 8 PWM(-)
[7,15] EXP/XPRO_PB9 EXP/XPRO_PB10 [7,15]
IRQ/GPIO 9 10 SPI_SS_B/GPIO
TWI_SDA 11 12 TWI_SCL
[7,10,15] ISC_D5/EXP/XPRO_PB31 ISC_D6/EXP/XPRO_PC0 [8,10,15]
UART_RX 13 14 UART_TX
[7,15] EXP/XPRO_PA23 EXP/XPRO_PA24 [7,15]
SPI_SS_A 15 16 SPI_MOSI
SPI_MISO 17 18 SPI_SCK
19 20
VDD_3V3
DNP(Header 2X10)
XPRO EXT2
J26
ID 1 2
[14] EDBG_ID_03
ADC(+) 3 4 ADC(-)
[8] XPRO_PD7 XPRO_PD8 [8]
GPIO 5 6 GPIO
[8] XPRO_PD9 XPRO_PD10 [8]
PWM(+) 7 8 PWM(-)
[7,15] EXP/XPRO_PB5 EXP/XPRO_PB6 [7,15]
IRQ/GPIO 9 10 SPI_SS_B/GPIO
[7,15] EXP/XPRO_PA21 EXP/XPRO_PD28 [8,15]
TWI_SDA 11 12 TWI_SCL
[7,10,15] ISC_D2/EXP/XPRO_PB28 ISC_D3/EXP/XPRO_PB29 [7,10,15]
UART_RX 13 14 UART_TX
[7,10,15] ISC_D3/EXP/XPRO_PB29 ISC_D2/EXP/XPRO_PB28 [7,10,15]
SPI_SS_A 15 16 SPI_MOSI
19 20
VDD_3V3
DNP(Header 2X10)
The standard extension headers include common signals.

Figure 5-53. XPRO Connectors
WWW.ATMEL.COM
XPRO EXT1
XPRO POWER
17 XPRO EXT2
VDD_5V_IN
F1_RXD
F1_TXD
J25
J26
JP9
C58
R184 BOOT_DIS
J24
JP8
2
7
6
5
4
3
1
0
C60
14
15
16
18
19
20
21
C59
R183
C57
J21
5V 5V
J23
A5-USB-A
GND
SDA0
R176
SDA1
9
AREF
F4_RXD
12
11
10
F4_TXD
SCL0
13
SCL1
F0_RXD
F3_RXD
D23
F0_TXD
F3_TXD
R174 D22
J20
J22
JP7 R172
C56 R170 D24 D25
L14
R168
R178
R179
R180
R181
BP3
R182
C54
C55
R166
R177 D26 D27
VDDIODDR R175
RESET
3
R173
D28 D29
SDMMC0 U11
U10
R171
2 4
R169
R162 R164
R167 D30 D31
R165 C53
U9
BP2 R163 R158 D32 D33
R161 R155
WAKE UP
C52
R160 R159
D34 D35
J16
3 R157 R156
R154
R151
U6
D36 D37
U8
2 4 R153 R149 R150
HSIC
U7
R147 R148 J15
A
R144 R145 D38 D39
SDMMC1
U4
C50 R142 R143
R127 R128 R152
L13 R140 R141
C51 D40 D41
DIGITAL
R125 R126
J19
R146
R138
B
C49 R106 R107 C48
R139
ISC
Y4
R132
R133
R134
R135
R136
R137
R101 R102 C46
EDBG-USB
R 97 R 98
J14
U5
TP8
D44 D45
J18
A5-USB-B
C44
C45
D46 D47
L11
C43 R129
R131 L12 R130
PIOBU
D48 D49
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
J12
R124
R108
R99 R103 D50 D51
J13
R
C42
R123 D52 D53
J10
CANRX1
CANTX1
R75 R105
A
C41
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
R100
C40
GND
JP5
GND
R76
R77
R78
R79
R80
R81
L10
L7
L8
L9
TM
R74
Y3
VDD_3V3
J17
J7
J11
R66 R73
R65 R72
CLASS D
J8
R71
J9
R50
R51
R52
R53
R54
R55
R56
R57
R58
Y2
C32
ETH
5V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CANRX0
3V3
3V3
NC
CANTX0
A10
A11
GND
GND
VBAT
RST
R62
C38
R67
R68
R69
R70
C39
C27
C28
POWER
Q5
C29
C30
C31
JP4
C36
R63
C34
C35
C37
C23
STAT
C33
TP7
VDD_3V3_LP
C26 C25
C24
L5
L6
R64
R61
J6
VDDCORE
RGB LED
TP6
R60
U3
R59 4
JP3
1
C22
C19 R44 R49
D2
U2
R41 C21
Q4
2 3 R48
R30
TP5 C20
D3
D4
JP2 R47 C18

Y1
TP4
R43 R46 C17 R45 C16
R28 R42
D1
R40
C15
J4
C13 C12
L4
R36
R37
R38
R39
LCD
Pin1
J2 DEBUG_DIS
Q3
R31
R32
R33
R34
R35
R19
R20
L3 R26 VBAT L2 PB_USER BP1

L1
J3
R13
C10
R29
R2
R3
R4
J5
C14
R12
C11
J1 DEBUG
C4
3
R21
R22
3.3V LEVELS
U1
JP1
R6
C7
R7
R25 R27 2 4
R23 R24
R8
R1
TP3
R9
C8
Q2
R5
R14
R15
R16
R17
C5
C6
C9 R18
EDBG_DIS
Q1
C1
Table 5-25. XPRO Power Connector J21 Signal Descriptions

Signal Pin No. Signal
EXP_5V 1 2 GND
VCC_5V 3 4 VCC_3V3
Table 5-26. XPRO EXT1 Connector J22 Signal Descriptions

SAMA5D27 SAMA5D27
Function Pin XPRO Signal Pin No. XPRO Signal Pin Function
ID02 EDBG ID 1 2 GND – –
– PD11 ADC(+) 3 4 ADC(-) PD12 –
– PD13 GPIO 5 6 GPIO PD18 –
– PB9 PWM(+) 7 8 PWM(-) PB10 –
– PD13 IRQ/GPIO 9 10 SPI_SS_B/GPIO PD29 –
– PB31 TWI_SDA 11 12 TWI_SCL PC0 –
– PA23 UART_RX 13 14 UART_TX PA24 –
– PD28 SPI_SS_A 15 16 SPI_MOSI PD26 –
– PD27 SPI_MISO 17 18 SPI_SCK PD25 –
– – GND 19 20 VCC 3V3 – –

Table 5-27. XPRO EXT2 Connector J23 Signal Descriptions
SAMA5D27 SAMA5D27
Function Pin XPRO Signal Pin No. XPRO Signal Pin Function
ID03 EDBG ID 1 2 GND – –
– PD7 ADC(+) 3 4 ADC(-) PD8 –
– PD9 GPIO 5 6 GPIO PD10 –
– PB5 PWM(+) 7 8 PWM(-) PB6 –
– PA21 IRQ/GPIO 9 10 SPI_SS_B/GPIO PD28 NPCS0
– PB28 TWI_SDA 11 12 TWI_SCL PB29 –
– PB29 UART_RX 13 14 UART_TX PB28 –
NPCS1 PD29 SPI_SS_A 15 16 SPI_MOSI PD26 –
– PD27 SPI_MISO 17 18 SPI_SCK PD25 –
– – GND 19 20 VCC 3V3 – –

5.6 SAMA5D2-XULT Board Schematics
This section contains the following schematics:
 Block Diagram
 PIO Muxing Table
 Power Supply
 SAMA5D27 - Power
 SAMA5D27 - DDR3L
 SAMA5D27 - PIOA and PIOB
 SAMA5D27 - PIOC and PIOD
 SAMA5D27 - SYS, Tamper, and Debug
 JTAG, USB, ISC, and LCD
 Serial Flash, LEDS, Push Button and ClassD
 Ethernet_ETH0_10/100M
 eMMC
 EDBG
 Expansion and XPRO Connectors

58 Figure 5-54. Block Diagram
5 4 3 2 1
Push Reset 5V INPUT

Buttons Force PwrOn Single
PMU Sheet 10
D
Solution USB A
D
Sheet 4 5V INPUT
OTG
5V & 3V3 Sheet 4
USB B USB
Host DEVICE
USB A,B,C
Power rails USB C
Atmel HSIC
Sheet 11 SAMA5D27
Cortex(R)-A5 Processor Sheet 14
User LEDs JTAG EDBG
PIO
Push Buttons
C
Sheet 6 JTAG C
Sheet 5: Power Part Connector
Sheet 4
Expansion & XPRO Connectors
Sheet 6: DDR3 CTL 4Gb

Sheet 7: PIOA & PIOB EBI DDR3 Sheet 9
PMU or Sheet 8: PIOC & PIOD SDRAM
Super Cap VBAT
Sheet 9: SYS & JTAG & DBUG
32Gb
PIO A eMMC
ANALOG Reference Flash
Sheet 13
B B
PIO A,B,C,D PIO A,B,C,D
MAC QSPI SPI Audio Ethernet SD

ISC LCD Serial Data Data
Connector Connector Class D 10/100M bps Card
EEPROM Flash Flash
Sheet 15 Sheet 10 Sheet 10 Sheet 11 Sheet 11 Sheet 11 Sheet 11 Sheet 12 Sheet 13
A A
A RevA XinJQ 22-Sep-15 XXX XX-XX-XX

A INIT EDIT XinJQ 21-May-15 XXX XX-XX-XX
REV MODIF. DES. DATE VER. DATE
SAMA5D2-XULT SCALE REV. SHEET
1/1
Block Diagram A 2
15
5 4 3 2 1
Figure 5-55. PIO Muxing Table
5 4 3 2 1
PIO Muxing & Jumper setting

PIOA USAGE PIOA USAGE PIOB USAGE PIOB USAGE PIOC USAGE
LCD PA0 SDHC0_CK PA16 SPI0_MISO/EXP PB0 LED_BLUE/LCD_ID PB16 ETH_GRXDV PC0 ISC_D6/EXP/XPRO
ID_SYS 1 PA1 SDHC0_CMD PA17 SPI0_CS0/EXP PB1 CLASSD_R0 PB17 ETH_GRXER PC1 ISC_D7/SPI1_SPCK/EXP
D GND 2 PA2 SDHC0_DAT0 PA18 SDHC1_DAT0/EXP PB2 CLASSD_R1 PB18 ETH_GRX0 PC2 ISC_D8/SPI1_MOSI/EXP D
NC 3 PA3 SDHC0_DAT1 PA19 SDHC1_DAT1/EXP PB3 CLASSD_R2 PB19 ETH_GRX1 PC3 ISC_D9/SPI1_MISO/EXP
NC 4 PA4 SDHC0_DAT2 PA20 SDHC1_DAT2/EXP PB4 CLASSD_R3 PB20 ETH_GTX0/EXP PC4 ISC_PCK/SPI1_NPCS0/EXP
LCDDAT2 5 PA5 SDHC0_DAT3 PA21 SDHC1_DAT3/EXP/XPRO PB5 LED_GREEN/EXP/XPRO PB21 ETH_GTX1/EXP PC5 ISC_VSYNC/EXP
LCDDAT3 6 PA6 SDHC0_DAT4 PA22 SDHC1_CK/QSPI0_SCK/EXP PB6 LED_RED/EXP/XPRO PB22 ETH_GMDC/EXP PC6 ISC_HSYNC/EXP
GND 7 PA7 SDHC0_DAT5 PA23 QSPI0_CS/EXP/XPRO PB7 LCD_IRQ1 PB23 ETH_GMDIO/EXP PC7 ISC_MCK/EXP
LCDDAT4 8 PA8 SDHC0_DAT6 PA24 QSPI0_IO0/EXP/XPRO PB8 LCD_IRQ2 PB24 ISC_D10/EXP PC8 PMIC_LBO/EXP
LCDDAT5 9 PA9 SDHC0_DAT7 PA25 QSPI0_IO1/EXP PB9 USER_PB/EXP/XPRO PB25 ISC_D11/EXP PC9 ETH_INT
LCDDAT6 10 PA10 SDHC0_RSTN PA26 QSPI0_IO2/EXP PB10 USBB_EN5V/EXP/XPRO PB26 ISC_D0/EXP PC10 LCD_DAT2/EXP
LCDDAT7 11 PA11 SDHC0_VDDSEL PA27 QSPI0_IO3 PB11 ISC_RST/EXP PB27 ISC_D1/EXP PC11 LCD_DAT3/EXP
GND 12 PA12 PMIC_CHGLEV PA28 SDHC1_CMD PB12 ISC_PWD/EXP PB28 ISC_D2/EXP/XPRO PC12 LCD_DAT4
NC 13 PA13 SDHC0_CD PA29 USBB_OVCUR PB13 PMIC_IRQ PB29 ISC_D3/EXP/XPRO PC13 LCD_DAT5
NC 14 PA14 SPI0_SPCK/EXP PA30 SDHC1_CD PB14 ETH_GTXCK PB30 ISC_D4/EXP PC14 LCD_DAT6
LCDDAT10 15 PA15 SPI0_MOSI/EXP PA31 USBA_VBUS Detection PB15 ETH_GTXEN PB31 ISC_D5/EXP/XPRO PC15 LCD_DAT7
LCDDAT11 16
C C
GND 17
LCDDAT12 18 PIOC USAGE PIOD USAGE PIOD USAGE
JUMPER DESCRIPTION
LCDDAT13 19 PC16 LCD_DAT10 PD0 LCD_PCK PD16 JTAG_TDO
PART DEFAULT FUNCTION
LCDDAT14 20 PC17 LCD_DAT11 PD1 LCD_DEN PD17 JTAG_TMS
JP1 OPEN Disable EDBG
LCDDAT15 21 PC18 LCD_DAT12 PD2 DBGU_URXD1 PD18 XPRO
JP2 OPEN Disable Debug
GND 22 PC19 LCD_DAT13 PD3 DBGU_UTXD1 PD19 LCD_XP/EXP
JP3 CLOSE I VDD_3V3_LP Measurement
NC 23 PC20 LCD_DAT14 PD4 LCD/EEP/ISC/EXP_TWD1 PD20 LCD_XM/EXP
JP4 CLOSE I VDDCORE Measurement
NC 24 PC21 LCD_DAT15 PD5 LCD/EEP/ISC/EXP_TWCK1 PD21 LCD_YP/PMIC_TWD0/EXP
JP5 CLOSE I VDDISC+VDDIOP0/1/2 Measurement
LCDDAT18 25 PC22 LCD_DAT18 PD6 EXP PD22 LCD_YM/PMIC_TWCK0/EXP
JP6 CLOSE I VDDBU Measurement
LCDDAT19 26 PC23 LCD_DAT19 PD7 XPRO PD23 EXP
JP7 CLOSE I VDDIODDR_MPU Measurement
GND 27 PC24 LCD_DAT20 PD8 XPRO PD24 EXP
JP8 CLOSE I VDD_5V_IN Measurement
PC25 LCD_DAT21 PD9 XPRO PD25 EXP/XPRO
LCDDAT20 28 JP9 OPEN Disable CS of SPI&QSPI&eMMC Memory

LCDDAT21 29 PC26 LCD_DAT22/EXP PD10 XPRO PD26 EXP/XPRO
LCDDAT22 30 PC27 LCD_DAT23/EXP PD11 XPRO PD27 EXP/XPRO

B LCDDAT23 31 PC28 LCD_PWM PD12 EXP/XPRO PD28 EXP/XPRO B
GND 32 PC29 LCD_DISP PD13 EXP/XPRO PD29 EXP/XPRO

LCDPCK 33 PC30 LCD_VSYNC PD14 JTAG_TCK PD30 EXP
LCDVSYNC 34 PC31 LCD_HSYNC PD15 JTAG_TDI PD31 EXP
LCDHSYNC 35
LCDDEN 36
SPI1_SPCK/AD0_XP 37
SPI1_MOSI/AD1_XM 38
SPI1_MISO/AD2_YP 39
SPI1_NPCS0/AD3_YM 40
LCDDISP 41
TWD1 42
TWCK1 43
IRQ1 44
A
IRQ2 45 A
LCDPWM 46
NRST 47
VCC 48
VCC 49 A INIT EDIT XinJQ 21-May-15 XXX XX-XX-XX
GND 50 SAMA5D2-XULT SCALE REV. SHEET
1/1
PIO Muxing A 3
15
5 4 3 2 1
59
60 Figure 5-56. Power Supply
5 4 3 2 1
JP8 JPR8
Header 1X2 Jumper VDD_5V_IN JPR6 JP6
U12 VDD_3V3 Jumper Header 1X2
8 1 PCB1 D6
[14] EDBG_USB_VBUS_5V IN1 STAT VDDBU
BAT54C
R187 10K
1
2
3 7 1
R186 10K VSNS OUT 3
1
2
2 4 R185 390R 1% R280 100R 1% 2
EN ILIM C59 C58
C60
6 5 10uF 10uF 100nF R139
[10] USBA_VBUS_5V IN2 GND D5 + C42 C44 C46
D DNP(2.2K) D
SAMA5D2-XULT PCB RB160M-60TR DNP(1uF) 100nF
TPS2113 0.2F/3.3V
(Super)-Capacitor Populate R if
energy storage no Super Cap
VDDBU VSYS_5V VSYS_5V VSYS_5V VDDB_5V

U22
A3 A1 JP7 JPR7
VIN VOUT1 A2 Header 1X2 Jumper
R346 R332 R333 VOUT2
R345
100K 100K 100K VDD_1V35 VDDIODDR
C181
[9] WKUP C180 L27 22uF
1
2
3 3 10uF 0.47uH
10K
C1
PGND1 For DDR3 For MPU
C2
B1 PGND2
1 1 nPBSTAT B2 SW1 C3
SW2 AGND
Q9 Q8
B3
2 BSS138 2 BSS138 EN JP4 JPR4
Header 1X2 Jumper
FAN48610
VDDCORE
1
2
VDDPLLA
C C
L12 10uH_150mA
VDD_1V2 R129 2R2
U2 ACT8945AQJ405-T
VDD_5V_IN D9 VSYS_5V
VDDUTMIC
(replaced with 0R-1206 -see User Guide)
VIN_5V 33 31 L18
CHGIN VSYS1 1 2
32
2 3 VSYS2 39
C165 VP1 C163 C164 C176 C167 180ohm at 100MHz VDDHSIC
4.7uF 35
16 L16
[15] 5V_EXT_INP VP3 1 2
21 6
Q7 ACIN INL 40
DNP(IRLML6402) 180ohm at 100MHz
1
NC1 VSYS_5V
VBAT 28 R44 100R 1% D1 RED
R11 R18 nSTAT
R21 2.2M 1%
VBAT 1 J4
20 29
DNP(11K 1%) 11K 1% LBI BAT1 2 VDDIOP2
R22 1.5M 1% 30 VBAT 1 DNP(Header 1X2 2.00MM)
BAT2 C19
2 J3
4.7uF L7
24 3 1X3Pin JP5 JPR5 1 2
R24 VDD_3V3 TH
23 Header 1X2 Jumper
1 ISET VDD_1V35 180ohm at 100MHz VDDIOP1
DNP(3.9K 1%) REFBP
R6
R7
R27
VDD_3V3 L8
C166 38 L5 2.2uH 1 2
47nF SW1 2
1
2
2.43K 1% OUT1 VDDIOP0
10K
10K
C20 C23 C24 180ohm at 100MHz

10uF 10uF 100nF
L9
22 1 2
[7] PMIC_CHGLEV_PA12 CHGLEV VDD_1V2
R16 100R 1% 11
[9,10,12,14,15] NRST R17 100R 1% 12 nRSTO 180ohm at 100MHz VDDISC
B [7] PMIC_IRQ_PB13 nIRQ B
nPBSTAT 13 36 L6 2.2uH
nPBSTAT SW2 L10
R20 100R 1% 19 34 1 2
27 C22 C37 C38
[8] PMIC_TWD0_PD21 SDA
26 10uF 10uF 100nF 180ohm at 100MHz
R26 VSYS_5V VDD_3V3
VSYS_5V C7
DNP(1nF)
DNP(8.2K 1%) R30 0R 15 L1 2.2uH
25 SW3 17
VSEL OUT3 C3 C2 C1
R41 DNP(0R) 10uF 10uF 100nF VDDOSC
R8 R15
68K 100K VDDFUSE R293 2R2
10 JP3 JPR3 L20 10uH_150mA
3 3
PWRHLD 4 VDD_2V5 R327 0R VDD_3V3_LP Header 1X2 Jumper VDDUTMII
VSYS_5V OUT4
VDD_3V3 VDD_LED VDD_3V3_LP L19
5 R284 0R 1 2
R14 49.9K 1% 9 OUT5
1
2
1 1 C8 nPBIN 8 VDD_3V3 R330 0R VDDSDHC1V8 180ohm at 100MHz VDDANA
OUT6
GNDP12
PWREN
100nF TP14 TP11

GNDP3
EXPAD
Q2 Q1 VDD_1V8 L3 L23
GNDA
SMD SMD 7 1 2 R303 0R 1 2

3
R13 180ohm at 100MHz 180ohm at 100MHz
VDDAUDIOPLL
Tact Switch BP2
BP3
49.9K 1% C169 C17 C173 C13

18
37
14
41
4.7uF 4.7uF 4.7uF 4.7uF

R9 1K C10 100nF 1 R300 2R2
[9] SHDN
Tact Switch
Q3 L22 10uH_150mA
R12 BSS138 2 R19
A 100K 0R A
WAKE UP RESET
Place TP11 and TP14 to Bottom. A RevA XinJQ 22-Sep-15 XXX XX-XX-XX
1/1
Power Supply A 4
15
5 4 3 2 1
Figure 5-57. SAMA5D27 - Power
5 4 3 2 1
VDDCORE
(1V2)
VDDCORE
C28 C27 C143 C31 C108 C119 C29 C132 C30 C122 C137
10uF 10uF 100nF 100nF 100nF 100nF 100nF 100nF 1nF 1nF 1nF
D D
U6G
VDDIODDR
(1V35)
VDDIODDR VDDCORE (1V2) D7 E7
POWER TEST POINTS C70 C71 C80 C104 C88 C102 C101 C114 C105 C84 C97
D9
H3
VDDCORE_1
VDDCORE_2
VDDCORE_3
GNDCORE_1
GNDCORE_2
GNDCORE_3
E9
H4
K13 K12
10uF 10uF 100nF 100nF 100nF 100nF 100nF 100nF 1nF 1nF 1nF N5 VDDCORE_4 GNDCORE_4 M5
VDDB_5V TP30 SMD VDDCORE_6 GNDCORE_6
VSYS_5V TP24 SMD

VDDIODDR (1V35)D11 D14
VDD_1V35 TP6 SMD VDDDDR_2 GNDDDR_2
D15 E12
E15 VDDDDR_3 GNDDDR_3 E14
VDD_1V2 TP7 SMD VDDBU VDDANA VDDDDR_4 GNDDDR_4
H15 H14
(3V3) VDDBU (3V3) VDDANA J15 VDDDDR_5 GNDDDR_5 J14
VDD_3V3 TP3 SMD VDDDDR_6 GNDDDR_6
L15 L14
VDDDDR_7 GNDDDR_7
VDDFUSE TP15 SMD C134 C144 C136
100nF 100nF 100nF VDDBU (3V3) N7 N6
VDD_3V3_LP TP5 SMD VDDBU GNDBU
VDD_LED TP25 SMD

VDDANA (3V3) K3 L3
C L5 VDDANA_1 GNDANA_1 K5 C
VDDSDHC1V8 TP10 SMD VDDANA_2 GNDANA_2
VDDIOP0 (3V3) E6 F6
VDDIOP0 VDDIOP1 VDDIOP2 F7 VDDIOP0_1 GNDIOP0_1 G7
(3V3) VDDIOP0 (3V3) VDDIOP1 (3V3) VDDIOP2 VDDIOP0_2 GNDIOP0_2
VDDCORE VDDIOP1 (3V3) N13 M13

TP22 SMD VDDIOP1_1 GNDIOP1_1
R14 P14
C135 C131 C107 C103 C120 VDDIOP1_2 GNDIOP1_2
VDDIODDR TP12 SMD 100nF 100nF 100nF 100nF 100nF VDDIOP2 (3V3) F10 F9
VDDIOP2 GNDIOP2
VDDBU TP17 SMD
VDDHSIC VDDHSIC (1V2) R9

TP16 SMD VDDHSIC
VDDFUSE VDDFUSE (2V5) M12 T5

TP23 SMD VDDFUSE GNDDPLL
VDDUTMIC VDDAUDIOPLL (3V3) T3 T4

TP18 SMD VDDHSIC VDDFUSE VDDAUDIOPLL VDDAUDIOPLL GNDAUDIOPLL
VDDUTMII (1V2) VDDHSIC (2V5) VDDFUSE (3V3) VDDAUDIOPLL

TP20 SMD
VDDUTMIC (1V2) P7 R7
VDDUTMIC GNDUTMIC
VDDSDHC TP9 SMD C118 C111 C148 C140
VDDUTMII (3V3) P8 P9
100nF 100nF 4.7uF 100nF VDDUTMII GNDUTMII
VDDOSC TP21 SMD
VDDSDHC (3V3 or 1V8) P11 R11

VDDSDMMC GNDSDMMC GNDUTMII
VDDPLLA TP8 SMD
VDDPLLA (1V2) U4 U5
VDDPLLA GNDPLLA
VDDOSC (3V3) T7 T6
TP26 SMD VDDOSC GNDOSC
B F4 G4 B
VDDISC (3V3)
TP13 SMD VDDISC GNDISC
TP19 SMD VDDUTMIC VDDUTMII VDDSDHC

(1V2) VDDUTMIC (3V3) VDDUTMII (3V3 or 1V8) VDDSDHC
SAMA5D27-CN
C147 C133 C125 C110
4.7uF 100nF 100nF 100nF
R264 0R A copper plan

for GNDUTMII cover
all USB compoments
GNDUTMII
VDDPLLA VDDOSC VDDISC

(1V2) VDDPLLA (3V3) VDDOSC (3V3) VDDISC
R131 R269 C138

100nF
1R 1% 1R 1%
C45 C128
100nF 100nF
C43 C142
4.7uF 4.7uF
A All 100nF 0402 capacitors close to the the Pin of VDD***. A

1/1
SAMA5D27- Power A 5
15
5 4 3 2 1
61
62 Figure 5-58. SAMA5D27 - DDR3L
5 4 3 2 1
100 ohms differential trace 100 ohms differential trace

impedance impedance
Routing top or bottom Routing top or bottom
U6E U8 U4
DDR_RESETN T2 DDR_RESETN T2
DDR_A0 F12 B12 DDR_D0 RESET# RESET#
DDR_A1 C17 DDR_A0 DDR_D0 A12 DDR_D1 DDR_CLK+ J7 N3 DDR_A0 DDR_CLK+ J7 N3 DDR_A0
D DDR_A2 B17 DDR_A1 DDR_D1 C12 DDR_D2 DDR_CLK- K7 CK A0 P7 DDR_A1 DDR_CLK- K7 CK A0 P7 DDR_A1 D
DDR_A3 B16 DDR_A2 DDR_D2 A13 DDR_D3 DDR_CKE K9 CK# A1 P3 DDR_A2 DDR_CKE K9 CK# A1 P3 DDR_A2
DDR_A4 C16 DDR_A3 DDR_D3 A14 DDR_D4 DDR_CS L2 CKE A2 N2 DDR_A3 DDR_CS L2 CKE A2 N2 DDR_A3
DDR_A5 G14 DDR_A4 DDR_D4 C13 DDR_D5 DDR_RAS J3 CS# A3 P8 DDR_A4 DDR_RAS J3 CS# A3 P8 DDR_A4
DDR_A6 F14 DDR_A5 DDR_D5 A15 DDR_D6 DDR_CAS K3 RAS# A4 P2 DDR_A5 DDR_CAS K3 RAS# A4 P2 DDR_A5
DDR_A7 F11 DDR_A6 DDR_D6 B15 DDR_D7 DDR_WE L3 CAS# A5 R8 DDR_A6 DDR_WE L3 CAS# A5 R8 DDR_A6
DDR_A8 C14 DDR_A7 DDR_D7 G17 DDR_D8 WE# A6 R2 DDR_A7 WE# A6 R2 DDR_A7
DDR_A9 D13 DDR_A8 DDR_D8 G16 DDR_D9 DDR_D0 E3 A7 T8 DDR_A8 DDR_D16 E3 A7 T8 DDR_A8
DDR_A10 C15 DDR_A9 DDR_D9 H17 DDR_D10 DDR_D1 F7 DQ0 A8 R3 DDR_A9 DDR_D17 F7 DQ0 A8 R3 DDR_A9
DDR_A11 A16 DDR_A10 DDR_D10 K17 DDR_D11 DDR_D2 F2 DQ1 A9 L7 DDR_A10 DDR_D18 F2 DQ1 A9 L7 DDR_A10
DDR_A12 A17 DDR_A11 DDR_D11 K16 DDR_D12 DDR_D3 F8 DQ2 A10/AP R7 DDR_A11 DDR_D19 F8 DQ2 A10/AP R7 DDR_A11
DDR_A13 G11 DDR_A12 DDR_D12 J13 DDR_D13 DDR_D4 H3 DQ3 A11 N7 DDR_A12 DDR_D20 H3 DQ3 A11 N7 DDR_A12
DDR_A13 DDR_D13 K14 DDR_D14 DDR_D5 H8 DQ4 A12/BC# T3 DDR_A13 DDR_D21 H8 DQ4 A12/BC# T3 DDR_A13
DDR_D14 K15 DDR_D15 DDR_D6 G2 DQ5 A13 T7 DDR_D22 G2 DQ5 A13 T7
DDR_BA0 H12 DDR_D15 B8 DDR_D16 DDR_D7 H7 DQ6 A14 M7 DDR_D23 H7 DQ6 A14 M7
DDR_BA1 H13 DDR_BA0 DDR_D16 B9 DDR_D17 DDR_D8 D7 DQ7 A15 M2 DDR_BA0 DDR_D24 D7 DQ7 A15 M2 DDR_BA0
DDR_BA2 F17 DDR_BA1 DDR_D17 C9 DDR_D18 DDR_D9 C3 DQ8 BA0 N8 DDR_BA1 VDD_1V35 DDR_D25 C3 DQ8 BA0 N8 DDR_BA1 VDD_1V35
DDR_BA2 DDR_D18 A9 DDR_D19 DDR_D10 C8 DQ9 BA1 M3 DDR_BA2 DDR_D26 C8 DQ9 BA1 M3 DDR_BA2
DDR_D19 A10 DDR_D20 DDR_D11 C2 DQ10 BA2 R179 DNP(1K) DDR_D27 C2 DQ10 BA2 R254 DNP(1K)
DDR_RAS F13 DDR_D20 D10 DDR_D21 DDR_D12 A7 DQ11 K1 DDR_D28 A7 DQ11 K1
DDR_CAS G12 DDR_RAS DDR_D21 B11 DDR_D22 DDR_D13 A2 DQ12 ODT R178 0R DDR_D29 A2 DQ12 ODT R258 0R
DDR_CAS DDR_D22 A11 DDR_D23 DDR_D14 B8 DQ13 B2 DDR_D30 B8 DQ13 B2
DDR_CLK+ E17 DDR_D23 J12 DDR_D24 DDR_D15 A3 DQ14 VDD1 G7 DDR_D31 A3 DQ14 VDD1 G7
DDR_CLK- D17 DDR_CLK DDR_D24 H10 DDR_D25 DQ15 VDD2 R9 VDD_1V35 DQ15 VDD2 R9 VDD_1V35
DDR_CKE F16 DDR_CLKN DDR_D25 J11 DDR_D26 DDR_DQS1+ C7 VDD3 K2 DDR_DQS3+ C7 VDD3 K2
DDR_CKE DDR_D26 K11 DDR_D27 DDR_DQS1- B7 UDQS VDD4 K8 DDR_DQS3- B7 UDQS VDD4 K8
DDR_D27 L13 DDR_D28 UDQS# VDD5 N1 UDQS# VDD5 N1
R243 DDR_D28 VDD6 VDD6
L11 DDR_D29 DDR_DQS0+ F3 N9 DDR_DQS2+ F3 N9
100K DDR_D29 LDQS VDD7 LDQS VDD7
C
L12 DDR_D30 DDR_DQS0- G3 R1 DDR_DQS2- G3 R1 C
DDR_D30 M17 DDR_D31 LDQS# VDD8 D9 LDQS# VDD8 D9
DDR_D31 DDR_DQM1 D3 VDD9 DDR_DQM3 D3 VDD9
DDR_CS G13 C11 DDR_DQM0 DDR_DQM0 E7 UDM A9 DDR_DQM2 E7 UDM A9
DDR_WE F15 DDR_CS DDR_DQM0 G15 DDR_DQM1 LDM VSS1 B3 LDM VSS1 B3
DDR_WE DDR_DQM1 C8 DDR_DQM2 VSS2 E1 VSS2 E1
E13 DDR_DQM2 H11 DDR_DQM3 A1 VSS3 G8 A1 VSS3 G8
VDD_1V35 DDR_CAL DDR_DQM3 VDDQ1 VSS4 VDDQ1 VSS4
A8 J2 VDD_1V35 A8 J2
23.2K 1% 22pF B13 DDR_DQS0+ VDD_1V35 C1 VDDQ2 VSS5 J8 C1 VDDQ2 VSS5 J8
DDR_DQS0 B14 DDR_DQS0- C9 VDDQ3 VSS6 M1 C9 VDDQ3 VSS6 M1
R250 C106 DDR_DQSN0 VDDQ4 VSS7 VDDQ4 VSS7
R242 D2 M9 D2 M9
J17 DDR_DQS1+ E9 VDDQ5 VSS8 P1 E9 VDDQ5 VSS8 P1
100K DDR_DQS1 VDDQ6 VSS9 VDDQ6 VSS9
J16 DDR_DQS1- F1 P9 F1 P9
DDR_DQSN1 H2 VDDQ7 VSS10 T1 H2 VDDQ7 VSS10 T1
C10 DDR_DQS2+ H9 VDDQ8 VSS11 T9 H9 VDDQ8 VSS11 T9
DDR_RESETN E16 DDR_DQS2 B10 DDR_DQS2- VDDQ9 VSS12 VDDQ9 VSS12
DDR_RESETN DDR_DQSN2 J1 B1 J1 B1
DDR_VREF H16 L17 DDR_DQS3+ J9 NC1 VSSQ1 B9 J9 NC1 VSSQ1 B9
D16 DDR_VREFB0 DDR_DQS3 L16 DDR_DQS3- L1 NC2 VSSQ2 D1 L1 NC2 VSSQ2 D1
DDR_VREFCM DDR_DQSN3 L9 NC3 VSSQ3 D8 L9 NC3 VSSQ3 D8
C100 C99 NC4 VSSQ4 NC4 VSSQ4
E2 E2
100nF 100nF VSSQ5 VSSQ5
SAMA5D27-CN E8 E8
VSSQ6 F9 VSSQ6 F9
DDR_VREF M8 VSSQ7 G1 DDR_VREF M8 VSSQ7 G1
VREFCA VSSQ8 G9 VREFCA VSSQ8 G9
VSSQ9 VSSQ9
C91 C72 C145 C121
H1 L8 H1 L8
100nF 100nF VREFDQ ZQ 100nF 100nF VREFDQ ZQ
DDR_CLK+ R238 R124
B B
MT41K128M16JT-125:K 240R 1% MT41K128M16JT-125:K 240R 1%
R153
DNP(100R 1%)
DDR_CLK-
VDDIODDR
L14 10uH_150mA
VDD_1V35
C83 C55 R181 C154 C98 C92 C113 C93 C150 C95 C96 C89 C76 C129 C126 C123 C149 C66 C115 C74 C82
R182
4.7uF 100nF 6.8K 1% 2.2uF 2.2uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 1nF 1nF
1R 1%
DDR_VREF
C56 R180
C54
4.7uF 6.8K 1%
100nF
VDD_1V35
C152 C124 C94 C112 C117 C139 C153 C146 C151 C90 C116 C65 C78 C77 C87 C68 C67 C141
2.2uF 2.2uF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 1nF 1nF
Keep nets as short as possible, therefore, DDR devices have to be placed close as possible of SAMA5D27
The layout DDR should use controlled impedance traces of ZO= 50ohm characteristic impedance.
A Address, control and data traces may not exceed 1.3 inches (33.0 mm). A
Address, control and data traces must be length-matched to within 0.1 inch (2.54mm).
Address, control and data traces must match the data group trace lengths to within 0.25 inches (6.35mm).

1/1
SAMA5D27- DDR3 A 6
15
5 4 3 2 1
Figure 5-59. SAMA5D27 - PIOA and PIOB
5 4 3 2 1
R175 22R
SPI0_SPCK_PA14 [11]
PA14 R177 22R
EXP_PA14 [15]
R172 22R
SPI0_MOSI_PA15 [11]
PA15 R170 22R
U6A EXP_PA15 [15]
U11
PA00 SDHC0_CK_PA0 [13] R173 22R
P10 SPI0_MISO_PA16 [11]
PA01 SDHC0_CMD_PA1 [13] PA16 R171 22R
T11 EXP_PA16 [15]
PA02 SDHC0_DAT0_PA2 [13]
R10
PA03 SDHC0_DAT1_PA3 [13] R174 22R
D U12 SPI0_NPCS0_PA17 [11] D
PA04 SDHC0_DAT2_PA4 [13] PA17 R176 22R
T12 EXP_PA17 [15]
R12
T13 R154 22R
PA07 SDHC0_DAT5_PA7 [13] SDHC1_DAT0_PA18 [13]
N10 PA18 R150 22R
PA08 SDHC0_DAT6_PA8 [13] EXP_PA18 [15]
N11
U13 R159 22R
PA10 SDHC0_RSTN_PA10 [13] SDHC1_DAT1_PA19 [13]
P15 PA19 R156 22R
PA11 SDHC0_VDDSEL_PA11 [13] EXP_PA19 [15]
N15
PA12 PMIC_CHGLEV_PA12 [4]
P16 R143 22R
PA13 SDHC0_CD_PA13 [11] SDHC1_DAT2_PA20 [13]
M14 PA14 PA20 R141 22R
PA14 EXP_PA20 [15]
N16 PA15
PA15 M10 PA16 R145 22R
N17 PA17 PA21 R148 22R
PA17 EXP/XPRO_PA21 [15]
U14 PA18
PA18 T14 PA19 R163 39R
PA19 SDHC1_CK_PA22 [13]
P12 PA20 PA22 R165 39R
PA20 QSPI0_SCK_PA22 [11] 39R on PA22 close to MPU.
R13 PA21 R161 39R
PA21 EXP_PA22 [15]
U15 PA22
PA22 R164 22R
U16 PA23 QSPI0_CS_PA23 [11]
PA23 PA23 R162 22R
T15 PA24 EXP/XPRO_PA23 [15]
PA24 U17 PA25 R157 22R
PA25 QSPI0_IO0_PA24 [11]
P13 PA26 PA24 R160 22R
PA26 EXP/XPRO_PA24 [15]
T16
PA27 QSPI0_IO3_PA27 [11] R168 22R
R16 QSPI0_IO1_PA25 [11]
PA28 SDHC1_CMD_PA28 [13] PA25 R166 22R
T17 EXP_PA25 [15]
PA29 USBB_OVCUR_PA29 [10]
R15 R169 22R
PA30 SDHC1_CD_PA30 [13] QSPI0_IO2_PA26 [11]
R17 PA26 R167 22R
PA31 USBA_VBUS_5V_PA31 [10] EXP_PA26 [15]
C C
SAMA5D27-CN
R88 22R
LED_BLUE_PB0 [11]
PB0 R89 22R
LCD_ID_PB0 [10]
U6B
J8 PB0 R82 22R
PB00 LED_GREEN_PB5 [11]
A8 PB5 R109 22R
PB01 CLASSD_R0_PB1 [11] EXP/XPRO_PB5 [15]
A7
PB02 CLASSD_R1_PB2 [11]
A6 R275 1K
PB03 CLASSD_R2_PB3 [11] LED_RED_PB6 [11]
B6 PB6 R274 22R
PB04 CLASSD_R3_PB4 [11] EXP/XPRO_PB6 [15]
B7 PB5
PB05 C7 PB6 R83 22R

PB06 USER_PB_PB9 [11]
C6 PB9 R110 22R
PB07 LCD_IRQ1_PB7 [10] EXP/XPRO_PB9 [15]
A5
PB08 LCD_IRQ2_PB8 [10]

A4 PB9 R267 22R
PB09 USBB_EN5V_PB10 [10]
H8 PB10 PB10 R265 22R
PB10 EXP/XPRO_PB10 [15]
B5
B PB11 ISC_RST/EXP_PB11 [10,15] B
D6 PB14 R49 39R
PB12 ISC_PWD/EXP_PB12 [10,15] ETH_GTXCK_PB14 [12]
B4
PB13 PMIC_IRQ_PB13 [4]
C5 PB14 PB15 R108 22R
PB14 ETH_GTXEN_PB15 [12]
H7 PB15
PB15 D5 PB16 PB16 R61 22R
PB16 ETH_GRXDV_PB16 [12]
C4 PB17
PB17 A3 PB18 PB17 R47 22R
PB18 ETH_GRXER_PB17 [12]
D4 PB19
PB19 B3 PB20 PB18 R72 22R
PB20 ETH_GRX0_PB18 [12]
A2 PB21
PB21 C3 PB22 PB19 R73 22R
PB22 ETH_GRX1_PB19 [12]
A1 PB23
PB23 E5 R84 22R
PB24 ISC_D10/EXP_PB24 [10,15] ETH_GTX0_PB20 [12]
B2 PB20 R111 22R
PB25 ISC_D11/EXP_PB25 [10,15] EXP_PB20 [15]
E4
PB26 ISC_D0/EXP_PB26 [10,15]
B1 R85 22R
PB27 ISC_D1/EXP_PB27 [10,15] ETH_GTX1_PB21 [12]
C2 PB21 R112 22R
PB28 ISC_D2/EXP/XPRO_PB28 [10,15] EXP_PB21 [15]
D3
PB29 ISC_D3/EXP/XPRO_PB29 [10,15]
D2 R87 22R
PB30 ISC_D4/EXP_PB30 [10,15] ETH_GMDC_PB22 [12]
C1 PB22 R114 22R
PB31 ISC_D5/EXP/XPRO_PB31 [10,15] EXP_PB22 [15]
R86 22R
ETH_GMDIO_PB23 [12]
PB23 R113 22R
EXP_PB23 [15]
SAMA5D27-CN
A A

1/1
SAMA5D27- PIOA & PIOB A 7
15
5 4 3 2 1
63
64 Figure 5-60. SAMA5D27 - PIOC and PIOD
5 4 3 2 1
U6C
P17
PC00 ISC_D6/EXP/XPRO_PC0 [10,15]
N12
PC01 ISC_D7/SPI1_SPCK_PC1 [10,15]
N14
PC02 ISC_D8/SPI1_MOSI_PC2 [10,15]
D M15 PC9 R115 22R D
PC03 ISC_D9/SPI1_MISO_PC3 [10,15] ETH_INT_PC9 [12]
M11
PC04 ISC_PCK/SPI1_NPCS0_PC4 [10,15]
L10
PC05 ISC_VSYNC/EXP_PC5 [10,15] R304 22R
K10 LCD_DAT2_PC10 [10]
PC06 ISC_HSYNC/EXP_PC6 [10,15] PC10 R305 22R
M16 EXP_PC10 [15]
PC07 ISC_MCK/EXP_PC7 [10,15]
J10
PC08 PMIC_LBO/EXP_PC8 [4,15] R90 22R
D1 PC9 LCD_DAT3_PC11 [10]
PC09 PC11 R116 22R
E3 PC10 EXP_PC11 [15]
PC10 E2 PC11
PC11 R289 22R
E1 LCD_DAT22_PC26 [10]
PC12 LCD_DAT4_PC12 [10] PC26 R277 22R
F3 EXP_PC26 [15]
PC13 LCD_DAT5_PC13 [10]
F5
F2
PC15 LCD_DAT7_PC15 [10] R288 22R
G6 LCD_DAT23_PC27 [10]
PC16 LCD_DAT10_PC16 [10] PC27 R276 22R
F1 EXP_PC27 [15]
H6
PC18 LCD_DAT12_PC18 [10] PC30 R285 39R
G2 LCD_VSYNC_PC30 [10]
G3
PC20 LCD_DAT14_PC20 [10] PC31 R282 39R
G1 LCD_HSYNC_PC31 [10]
H2
G5
PC23 LCD_DAT19_PC23 [10] PC28 R279 39R
H1 LCD_PWM_PC28 [10]
H5
J9 PC26
PC26 H9 PC27 R272
PC27 E8 PC28
PC28 10K
G8
PC29 LCD_DISP_PC29 [10]
F8 PC30
PC30 D8 PC31
C PC31 C
SAMA5D27-CN
VDD_3V3
U6D
PD00
G10 PD0 TWI0
E10 PD1
PD01 R126 R125
G9
PD02 DBGU_URXD1_PD2 [9,14] 2.2K 2.2K
K1 PD0 R278 39R
PD03 DBGU_UTXD1_PD3 [9,14] LCD_PCK_PD0 [10]
J6 PD4 R102 22R
PD04 LCD_AD2_YP_PD21 [10]
J4 PD5 PD1 R291 22R R107 22R
PD05 LCD_DEN_PD1 [10] PMIC_TWD0_PD21 [4]
J2 PD21 R98 22R
PD06 EXP_PD6 [15] EXP_PD21 [15]
J7
PD07 XPRO_PD7 [15]
J1
PD08 XPRO_PD8 [15] R94 100R 1%
K9 JTAG_TCK_PD14 [9] R101 22R
PD09 XPRO_PD9 [15] PD14 R93 330R LCD_AD3_YM_PD22 [10]
J3 EDBG_JTAG_TCK_PD14 [14] R97 22R
PD10 XPRO_PD10 [15] PMIC_TWCK0_PD22 [4]
M1 PD22 R106 22R
PD11 XPRO_PD11 [15] R91 100R 1% EXP_PD22 [15]
K8 JTAG_TDI_PD15 [9]
B PD12 EXP/XPRO_PD12 [15] PD15 R92 330R B
L2 EDBG_JTAG_TDI_PD15 [14]
PD13 EXP/XPRO_PD13 [15]
K4 PD14
PD14 R119 100R 1%
K7 PD15 JTAG_TDO_PD16 [9]
PD15 PD16 R120 330R
L1 PD16 EDBG_JTAG_TDO_PD16 [14] VDD_3V3
PD16 K2 PD17
PD17 R117 100R 1%
J5 JTAG_TMS_PD17 [9]
PD18 XPRO_PD18 [15] PD17 R118 330R
K6 PD19 EDBG_JTAG_TMS_PD17 [14]
PD19 M2 PD20 TWI1
PD20 R306 R309
N1 PD21
PD21 2.2K 2.2K
L4 PD22
PD22 M3 R307 22R
PD23 EXP_PD23 [15] LCD_TWD1_PD4 [10]
L7 R296 22R
PD24 EXP_PD24 [15] EEPROM_TWD1_PD4 [11]
L6 R286 22R
PD25 EXP/XPRO_PD25 [15] R96 DNP(0R) EXP_TWD1_PD4 [15]
N2 LCD_AD0_XP_PD19 [10] PD4 R295 22R
PD26 EXP/XPRO_PD26 [15] PD19 R95 22R ISC_TWD1_PD4 [10]
L8 EXP_PD19 [15]
PD27 EXP/XPRO_PD27 [15]
M4
PD28 EXP/XPRO_PD28 [15] R121 DNP(0R) R308 22R
N3 LCD_AD1_XM_PD20 [10] LCD_TWCK1_PD5 [10]
PD29 EXP/XPRO_PD29 [15] PD20 R122 22R R297 22R
L9 EXP_PD20 [15] EEPROM_TWCK1_PD5 [11]
PD30 EXP_PD30 [15] R287 22R
M7 EXP_TWCK1_PD5 [15]
PD31 EXP_PD31 [15] PD5 R298 22R
ISC_TWCK1_PD5 [10]
SAMA5D27-CN
A A

1/1
SAMA5D27- PIOC & PIOD A 8
15
5 4 3 2 1
Figure 5-61. SAMA5D27 - SYS, Tamper, and Debug
5 4 3 2 1
XIN
Routing USB
D
R138 DNP(1M) XOUT
SYS Max trace-length mismatch
D
Y4 between USB signals pairs

1 4 should be no greater than 3.8mm
U6F
XIN U7 T8 Top/Bot
2 3 XIN HHSDPA USBA_DP [10]
XOUT U6 R8 Top/Bot 90 ohms differential trace
C48 C47 XOUT HHSDMA USBA_DM [10]
27pF
Routing top or bottom impedance
12MHz CL=15pF 27pF XIN32 P1 U8 Top/Bot
XIN32 HHSDPB USBB_DP [10]
XOUT32 P2 U9 Top/Bot
XOUT32 HHSDMB USBB_DM [10]
T9 Top/Bot
HSIC_DATA HSIC_DATA [10]
[4] SHDN R1 U10 Top/Bot
SHDN HSIC_STRB HSIC_STRB [10] Routing HSIC
[4] WKUP P4
XOUT32 WKUP R6
R128 DNP(10K) T2 VBG
R103 DNP(1M) XIN32 VDDBU JTAGSEL Routing HSIC Refers to Specif
[4,9,10,12,14,15] NRST R281 0R U2 R263
NRST C127
32.768KHz CL=12.5pF U1 ACP 5.62K 1%
ACP 10pF
R127 10K P3 T1 ACN
4 1 TST ACN
C41 C40
22pF 3 2
22pF R256 20K 1% T10 R3 PIOBU0
SDCAL PIOBU0 N8 PIOBU1 GNDUTMII
Y3 C109 22pF PIOBU1 R2 PIOBU2 R&C
RXD N4 PIOBU2 R5 PIOBU3 as close as possible
RXD PIOBU3 R4 PIOBU4
VDDANA U3 PIOBU4 P5 PIOBU5
[15] CLK_AUDIO CLK_AUDIO PIOBU5
J12 P6 PIOBU6
C R270 0R M6 PIOBU6 M8 PIOBU7 C
PIOBU0 R76 330R 1 2 R132 330R PIOBU1 ADVREFP PIOBU7
PIOBU2 R77 330R 3 4 R133 330R PIOBU3
PIOBU4 R78 330R 5 6 R134 330R PIOBU5 R268 DNP(0R) C130
[15] AREF 100nF
PIOBU6 R79 330R 7 8 R135 330R PIOBU7
SAMA5D27-CN
RXD R80 0R 9 10 R136 0R
11 12
ACP R81 0R 13 14 0R R137 ACN
DNP(Header 2X7)
VDD_5V_IN VDD_5V_IN
R152 1K (1.24V) R146 100R 1% ACN
VDD_3V3
R100
10K VDD_3V3 VSYS_5V
R155
2
R123 100R 1% ACP 0R C177
R337
R338
R339
R343
DEBUG
DNP(0R) R341
DNP(0R) R342
C51 1 U21 100nF
100nF DBGU_OE 1 5
VCC
B R105 R158 B
DNP(68K)
DNP(68K)
U7 [8,14] DBGU_UTXD1_PD3 2 4 DBGU_TXD
47K DNP(0R)
3
TLV431A
68K
68K
3
GND J1
DBGU_CTS 1
NL17SZ126DFT2G DBGU_TXD 2
DBGU_RXD 3
VDD_3V3 4
DBGU_RTS 5
6
C170
VDD_3V3 100nF Header 1X6
U20
5 1 DBGU_OE
JTAG [8,14] DBGU_URXD1_PD2
4
VCC
2 DBGU_RXD
VDD_3V3
R104 R75 R74 3
GND
100K 100K 100K R340 JP2 JPR2
VDD_3V3 NL17SZ126DFT2G Header 1X2 Jumper
J11 10K
1 2 JTAG_TMS_PD17 [8]
1
2
3 4 JTAG_TCK_PD14 [8] DBGU_OE
R336 DNP(0R) DBGU_CTS
5 6 JTAG_TDO_PD16 [8] TP27 SMD
DBGU_DIS
JTAG_TCK_PD14 R99 DNP(0R) 7 8 JTAG_TDI_PD15 [8] R344 DNP(0R) DBGU_RTS
9 10 NRST [4,9,10,12,14,15] TP28 SMD
A Header 2X5 A

1/1
SAMA5D27- SYS & JTAG & DBUG A 9
15
5 4 3 2 1
65
66 Figure 5-62. JTAG, USB, ISC, and LCD
5 4 3 2 1
VDDB_5V VDD_3V3
R335 DNP(0R) LCD
VDD_3V3
ISC R347 0R J2
D R40 0R 50 D
[4,9,12,14,15] NRST 49
R130 0R J18
1 2 48
3 4 (LCDPWM) 47
[8] LCD_PWM_PC28 46
5 6 [7] LCD_IRQ2_PB8 (IRQ2)
[7,15] ISC_RST/EXP_PB11 7 8 ISC_PWD/EXP_PB12 [7,15] (IRQ1) 45
[8] ISC_TWCK1_PD5 ISC_TWD1_PD4 [8] [7] LCD_IRQ1_PB7 44
9 10 R259 39R R39 DNP(0R) [8] LCD_TWCK1_PD5 (TWI_SCL)
ISC_MCK/EXP_PC7 [8,15] [8] LCD_AD3_YM_PD22 43
11 12 R251 39R R231 22R [8] LCD_TWD1_PD4 (TWI_SDA)
ISC_VSYNC/EXP_PC5 [8,15] [8,10,15] ISC_PCK/SPI1_NPCS0_PC4 42
13 14 R246 39R [8] LCD_DISP_PC29 (LCDDISP)
15 16 R239 39R ISC_HSYNC/EXP_PC6 [8,15] R38 DNP(0R) 41
ISC_PCK/SPI1_NPCS0_PC4 [8,10,15] [8] LCD_AD2_YP_PD21 40
17 18 R228 22R R213 22R
ISC_D4/EXP_PB30 [7,15] [8,10,15] ISC_D9/SPI1_MISO_PC3 39
R224 22R 19 20 R223 22R
[7,15] ISC_D5/EXP/XPRO_PB31 R220 22R 21 22 R221 22R ISC_D6/EXP/XPRO_PC0 [8,15] R37 DNP(0R) 38
[8,10,15] ISC_D7/SPI1_SPCK_PC1 ISC_D8/SPI1_MOSI_PC2 [8,10,15] [8] LCD_AD1_XM_PD20 37
R216 22R 23 24 R215 22R R219 22R [8] LCD_DEN_PD1 (LCDDEN)
[8,10,15] ISC_D9/SPI1_MISO_PC3 ISC_D10/EXP_PB24 [7,15] [8,10,15] ISC_D8/SPI1_MOSI_PC2 36
R208 22R 25 26 R207 22R [8] LCD_HSYNC_PC31 (LCDHSYNC)
[7,15] ISC_D11/EXP_PB25 R191 22R 27 28 R190 22R ISC_D0/EXP_PB26 [7,15] R36 DNP(0R) (LCDVSYNC) 35
[7,15] ISC_D1/EXP_PB27 ISC_D2/EXP/XPRO_PB28 [7,15] [8] LCD_AD0_XP_PD19 [8] LCD_VSYNC_PC30 34
R188 22R 29 30 R222 39R [8] LCD_PCK_PD0 (LCDPCK)
[7,15] ISC_D3/EXP/XPRO_PB29 [8,10,15] ISC_D7/SPI1_SPCK_PC1 33
(LCDDAT23) 32
[8] LCD_DAT23_PC27 31
Header 2X15 [8] LCD_DAT22_PC26 (LCDDAT22)
(LCDDAT21) 30
[8] LCD_DAT21_PC25 29
The signal ISC[D11-0], ISC_VSYNC, ISC_HSYNC, ISC_PCK, ISC_MCK 28
on connector J18 are connected trough serial resistor 22R from J17. (LCDDAT19) 27
[8] LCD_DAT19_PC23 26
Like: MPU (ISC) -> J17 -> 22R -> J18 (LCDDAT18)
[8] LCD_DAT18_PC22 25
(LCDDAT17) 24
(LCDDAT16) 23
(LCDDAT15) 22
C [8] LCD_DAT15_PC21 21 C
(LCDDAT13) 20
USB C [8]
[8]
LCD_DAT13_PC19
LCD_DAT12_PC18 (LCDDAT12) 19
18
17
J15 (LCDDAT10) 16
[8] LCD_DAT10_PC16 15
DNP(Header 1X2 2.54MM)
USB A R183 100K
USBA_VBUS_5V [4]
1
2
HSIC_DATA [9]
(LCDDAT9)
(LCDDAT8)
14
13
12
USBA_VBUS_5V_PA31 [7] HSIC_STRB [9] [8] LCD_DAT7_PC15 (LCDDAT7)
(LCDDAT6) 11
[8] LCD_DAT6_PC14 10
C57 R184 [8] LCD_DAT5_PC13 (LCDDAT5)
20pF (LCDDAT4) 9
200K [8] LCD_DAT4_PC12 8
8
(LCDDAT3) 7
[8] LCD_DAT3_PC11 6
9 VBUS 1 5
DM 2 (LCDDAT1) 4
USBA_DM [9]
DP 3 L15 (LCDDAT0) 3 52
SHD
USBA_DP [9]
ID 4 180ohm at 100MHz 2 51
R42 0R (ID_SYS)
10 GND 5 1 2 [7] LCD_ID_PB0 1
R28 DNP(330R)
[14] EDBG_ID_01
50 Pin FPC Connector
J23
11
EARTH_USB_A
MicroUSB AB Connector L17
180ohm at 100MHz
1 2
EARTH_USB_A
B B
EARTH_USB_B
USB B
MH1 MH2 MH3 MH4
5 PTH PTH PTH PTH
SH1
L21
180ohm at 100MHz U16
1
1 USBB_VBUS_5V EN: Active High
VBUS 2 USBB_VBUS_5V 1 2 8 1
DM USBB_DM [9] OUT_2 EN USBB_EN5V_PB10 [7]
3 Through Holes
DP USBB_DP [9]
4 6 2
GND C156 C157 OUT_1 FLG USBB_OVCUR_PA29 [7]
A 100nF 10uF VDDB_5V
7 3 R301
SH2 IN_2 GND
10K
J13 5 4
6 Single USB Type A C155 IN_1 NC
A A
100nF
SP2525A-1EN-L
EARTH_USB_B
1/1
ISC & USB & LCD A 10
15
5 4 3 2 1
Figure 5-63. Serial Flash, LEDS, Push Button and ClassD
5 4 3 2 1
VSYS_5V
VDD_3V3 EEPROM VDD_3V3

R62
0R
U18
DNP(10K) R320
R319
R71 0R
1 8 C161 100nF
D A0 VCC D
R312
C26 10uF
C33 10uF
C39 10uF
C32 10uF
2 7 EEPROM_WP
2
A1 WP
10K
D7
3 6
EEPROM_WP A2 SCL EEPROM_TWCK1_PD5 [8]
1N4148W
10K
4 5
GND SDA EEPROM_TWD1_PD4 [8]
R316 PMOS 4
1
0R AT24MAC402-MAHM-T
[7] CLASSD_R1_PB2
D2 3
6
D1
QSPI Flash R315 22R 2 G1
R313
S1 1
VDD_3V3 NMOS J5
1
U17 DMC2400UV
2
10K
180ohm at 100MHz
5
U10
8 C52
Class D 1
L25
2 Right P 3
R318
[7] QSPI0_IO0_PA24 DQ0 VCC 100nF L26
1 2 Right N 4
2
[7] QSPI0_IO1_PA25 2 4
DQ1 Vss D8
180ohm at 100MHz
3 1 QSPI0_CS 1N4148W
10K
[7] QSPI0_IO2_PA26 W#/VPP/DQ2 S#
PMOS 4
C 7 6
1
C
[7] QSPI0_IO3_PA27 HOLD#/DQ3 C QSPI0_SCK_PA22 [7] R322 22R C159 10nF 5 G2 S2
[7] CLASSD_R2_PB3
DNP(N25Q128A13ESE40F) [7] CLASSD_R3_PB4
D2 3
6
D1
R324 22R 2 G1
SPI Flash
R323
S1 1
VDD_3V3 NMOS
U19 DMC2400UV
U9
10K
[7] SPI0_MOSI_PA15 5 8
2 SI VCC
[7] SPI0_MISO_PA16 SO
[7] SPI0_SPCK_PA14 6 3
SCK WP 7 C53
SPI0_CS0_PA17 1 HOLD 100nF
CS 4
GND
AT25DF321A
LED
D2
R326 470R 1 VDD_LED

B [7] LED_RED_PB6 Red B
QSPI & eMMC & SPI Flash CS VDD_3V3

[7] LED_GREEN_PB5 R325 470R 4
Green Anode
2
C63 R328 470R 3

[7] LED_BLUE_PB0 Blue
100nF
R226 VDD_3V3
10K R218
U15 10K RGB LED
1 5
VCC
R230
[7] QSPI0_CS_PA23 2 4 QSPI0_CS 10K
QSPI Flash CS
JPR9 JP9 3 SDHC0_CD_PA13 [7]
GND 3
Jumper Header 1X2
eMMC Flash CS TP29
NL17SZ126DFT2G
SMD
BP1 Tact Switch
R227 100R 1% 1
1
2
Q6
BSS138 [7] USER_PB_PB9
C62 2
BOOT_DIS Place TP to Bottom
100nF
R217
1
U14
VCC
5
10K
USER BUTTON
[7] SPI0_NPCS0_PA17 2 4 SPI0_CS0_PA17
A A
SPI Flash CS
3
GND
NL17SZ126DFT2G

1/1
Flash & Audio & LED A 11
15
5 4 3 2 1
67
68 Figure 5-64. Ethernet_ETH0_10/100M
5 4 3 2 1
D D
VDD_3V3
100 ohms differential trace
impedance Ethernet
Routing top or bottom
R31
R68
R65
10Base-T/100Base-TX R45 R69
10K
10K
10K
U3 1K 1K
J6 RJ45 Connector
19
1 TX+ TD+ RXC/B-CAST_OFF ETH_GTXCK_PB14 [7]
1 TX+ TX+ top/bot 7
TXP 25
CT TXD1 ETH_GTX1_PB21 [7]
4 24
TXD0 ETH_GTX0_PB20 [7]
23
2 TX- TD- TXEN ETH_GTXEN_PB15 [7]
2 TX- TX- top/bot 6 13
TXM RXD3/PHYAD0 14
RXD2/PHYAD1 15
RXD1/PHYAD2 ETH_GRX1_PB19 [7]
16
3 RX+ RD+ RXD0/DUPLEX ETH_GRX0_PB18 [7]
3 RX+ RX+ top/bot 5 18
RXP RXDV/CONFIG2 ETH_GRXDV_PB16 [7]
20
RXER/ISO ETH_GRXER_PB17 [7]
CT 5 29
CRS/CONFIG1 28
6 RX- RD- 6 RX- RX- top/bot 4 COL/CONFIG0
C RXM C
C160 C162
100nF 100nF C16 2.2uF 2 12
75 75 VDD_1V2 MDC ETH_GMDC_PB22 [7]
11
4 75 NC MDIO ETH_GMDIO_PB23 [7]
7 C18 100nF 21
INTRP/NAND ETH_INT_PC9 [8]
1
5 GND_ETH 33 GND L2 VDD_3V3
PADDLE VDDA_3V3
R32
R48
R60
R66
R67
1nF 22 180ohm at 100MHz
75 TXC
13 7 8 26 3 1 2
14 27 TXD2 VDDA_3V3
10K
10K
10K
10K
10K
8 6.49K 1% R70 10 TXD3
15 EARTH_ETH REXT C12 C21
EARTH_ETH 16 Right yellow LED Left Green LED 10uF 100nF
VDD_3V3
ETH_XO 8
XO
R33 R34 ETH_XI 9 17
XI VDDIO
10K 10K C36 C25
12
11
10
10uF 100nF
ETH_LED0 30
VDD_3V3 ACT ETH_LED1 ETH_LED1 31 LED0/NWAYEN
LED1/SPEED
R314 470R LINK ETH_LED0
R317 470R 32 R35 0R

RESET NRST [4,9,10,14,15]
KSZ8081RNB
B B
At the De-Assertion of Reset:

C34 22pF ETH_XI PHY ADD[2:0]-pin15/14/13: 001 = 1
CONFIG[2:0]-pin18/29/28:001,RMII mode
L24 Duplex Mode-pin16: 1,Half Duplex
1
180ohm at 100MHz Isolate Mode-pin20: 0,Disable
1 2 R321 0R Speed Mode-pin31: 1,100Mbps
Y2 R64
Nway Auto-Negotiation-p30: 1,Enable
DNP(1M)
4
EARTH_ETH GND_ETH
25MHz CL=20pF
C35
ETH_XO
22pF
A A

1/1
Ethernet_10/100M A 12
15
5 4 3 2 1
Figure 5-65. eMMC
5 4 3 2 1
VDDSDHC
VDD_3V3 VDDSDHC
R142
R237
R144
R147
R234
R151
R233
R232
R236
DNP(47K) R255
R149
(3V3 or 1V8)
D D
C85 C79
47K
47K
47K
47K
47K
47K
47K
47K
47K
47K
H10
J10
M4
G5
N4
C6
N2
C4
N5
C2
1uF
K9
E6
P3
P5
P6
P4
E7
K8
F5
100nF
A3 E1
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS1
VSS2
VSS3
VSS4
VSS5
VCC0
VCC1
VCC2
VCC3
VCCQ1
VCCQ2
VCCQ3
VCCQ4
VCCQ5
VDDI
A4 E2
A5 E3
B2 A2
VDD_3V3 VDDSDHC1V8 VDDSDHC B3 A6
B4 A7
B5 A8
R210 DNP(0R) B6 E8
M5 E9
R212 DNP(0R) [7] SDHC0_CMD_PA1 CMD NC9
R140 39R M6 E10
[7] SDHC0_CK_PA0 CLK NC10
VDD_3V3 K5 A1
[7] SDHC0_RSTN_PA10 RST NC11 E12
R235 K6 NC12 E13
N6 NC123 NC13 E14
47K pull down on SDHC0_CMD_PA1 close to MPU. NC122 NC14
C86 E5 F1
100nF DNP(47K) N9 NC121 NC15 F2
39R on SDHC0_CK_PA0 close to MPU. NC120 NC16
2
N8 F3
N7 NC119 NC17 A9
Impedance match of
VDD
J12 NC118 NC18 B14
P14 NC117 CLK/CMD/DAT[7:0] 50R NC19 C14
6 N3 NC116 NC20 C13
S2 5 R211 0R P10 NC115 NC21 C12
D VDDSDHC VDD_3V3 NC114 NC22
4 N1 C11
S1 (3V3 or 1V8) (3V3) M14 NC113 NC23 F10
C 1 M13 NC112 NC24 C10 C
[7] SDHC0_VDDSEL_PA11 IN NC111 NC25
IN=0: S1 Closed M12 F12
C61 C73 M11 NC110 NC26 F13
C81 C69
GND
IN=1: S2 Closed 2.2uF 100nF 2.2uF 100nF M10 NC109 NC27 F14
R225 NC108 NC28
M9 C9
10K M8 NC107 NC29 C8
U13
3
M7 NC106 NC30 C7
ADG849 NC105 NC31
P11 C5
P12 NC104 NC32 C3
P13 NC103 NC33 C1
M3 NC102 NC34 D14
M2 NC101 NC35 D13
M1 NC100 NC36 D12
L14 NC99 NC37 D4
Placement and Routing: Refers to technical guide TN-FC-35: e·MMC PCB Design Guide NC98 NC38
L13 D3
L12 NC97 NC39 G12
A10 NC96 NC40 G13
A11 NC95 NC41 G14
A12 NC94 NC42 H1
A13 NC93 NC43 H2
A14 NC92 NC44 H3
B1 NC91 NC45 D2
B7 NC90 NC46 H5
G1 NC89 NC47 D1
L3 NC88 NC48 B13
L2 NC87 NC49 B12
L1 NC86 NC50 B11

K14 NC85 NC51 B10
K13 NC84 NC52 B9
B K12 NC83 NC53 H12 B
NC82 NC54
NC81
NC80
NC79
NC78
NC77
NC76
NC75
NC74
NC73
NC72
NC71
NC70
NC69
NC68
NC67
NC66
NC65
NC64
NC63
NC62
NC61
NC60
NC59
NC58
NC57
NC56
NC55
VDD_3V3
G2
K10
G3
G10
K7
N11
N10
B8
K3
K2
K1
J14
J13
N12
N13
N14
P1
P2
P7
P9
P8
J5
J3
J2
J1
H14
H13
VDD_3V3 R214
0R
U11 MTFC4GLDEA-0M WT
R229
R245
R241
R209
R192
R189
C64 C75
10uF 100nF eMMC - SDHC0
10K
68K
68K
10K
68K
68K
(MCI1_CD)
[7] SDHC1_CD_PA30 J19
16
(MCI1_DA1) 8 15
[7] SDHC1_DAT1_PA19
(MCI1_DA0) 7 14 0R R249
[7] SDHC1_DAT0_PA18
6
(MCI1_CK) 5 (SDHC1_WP)
[7] SDHC1_CK_PA22 4
3 13
(MCI1_CDA) 2 12
[7] SDHC1_CMD_PA28
(MCI1_DA3) 1 11
[7] SDHC1_DAT3_PA21
A (MCI1_DA2) 9 10 A
[7] SDHC1_DAT2_PA20
SD Card Connector
SD/MMCPlus CARD INTERFACE - SDHC1 A

A
RevA
INIT EDIT
XinJQ 22-Sep-15 XXX
XinJQ 21-May-15 XXX
XX-XX-XX
XX-XX-XX
1/1
SD & eMMC A 13
15
5 4 3 2 1
69
70 Figure 5-66. EDBG
5 4 3 2 1
VDD_3V3
EDBG_XIN
R29 DNP(1M) EDBG_XOUT
2.2K
2.2K
1K
1K
1K
1K
1K
1K
1K
Y1
D 1 4 D
R57
R56
R58
R54
R55
R51
R52
R334
R331
2 3 [15] EDBG_ID_03 EDBG_JTAG_TCK_PD14 [8]
EDBG_ID_01
[15] EDBG_ID_02 EDBG_JTAG_TDO_PD16 [8]
EDBG_ID_02 C14 C11
EDBG_JTAG_TMS_PD17 [8]
EDBG_ID_03 20pF 12MHz CL=15pF 20pF VDD_3V3
EDBG_JTAG_TDI_PD15 [8]
EDBG_ID_04
EDBG_XOUT
EDBG_ID_05
EDBG_XIN
EDBG_ID_06
TP4
EDBG_ID_07
SMD
ERASE
EDBG_DGI_TWD
D4 D3
EDBG_DGI_TWCK
EDBG_TWI EDBG RED BLUE
C4
D7
D6
C6
C5
D5
C1
K5
K6
A5
A6
B7
A7
B1
B2
B3
A3
R43
R59
R63
PC00 / PX14
PB00
PB01
PB02
PB03
PB04
PB06
PB07
PB08
PB09
PB10
PB11
PC01
PC02
PC03
PC04
PC05
G8 G4
PA00 / PA18 PX00 EDBG_ID_06 [15]
G10 G2
PA01 / PA17 PX01
100K
470R
470R
E1 G3
R4 330R EDBG_CDC_UART_RX F9 PA02 / PX47 PX02 J1
[8,9] DBGU_UTXD1_PD3 PA03 PX03
[8,9] DBGU_URXD1_PD2 R5 330R EDBG_CDC_UART_TX E9 H1
G9 PA04 PX04 G1 3 3
PA05 PX05 EDBG_ID_07 [15]
E8 F3
H10 PA06 / PA13 PX06 F4
PA07 / PA19 PX07 Q4 Q5
F8 E3
[15] EDBG_DGI_GPIO0 PA08 PX08 1 BSS138 1 BSS138
D8 E4
[15] EDBG_DGI_GPIO1 PA09 PX09
C10 D2
[15] EDBG_DGI_GPIO2 PA10 PX10 EDBG_ID_05 [15]
VSYS_5V C9 D1 2 2
[15] EDBG_DGI_GPIO3 PA11 PX12 R53
EDBG_DGI_SDA G7 D3
C PA12 / PA25 PX13 EDBG_ID_04 [15] C
K7 K4
PA14 / PX11 PX15 / PX32 100K
J7 D4
R3 TP1 TP2 PA15 / PX45 PX16 / PX53
E7 F1 STATUS_LED_CTRL
100K SMD SMD PA16 U1 PX19 / PX59
EDBG_FORCE_BOOT H9 H2 TARGET_RESET_SENSE R50 0R
PA20 / PX18 PX21 NRST [4,9,10,12,14,15]
EDBG_ADC0 K10 K1
PA21 / PX22 AT32UC3A4256HHB-C1UR ( AT32UC3A4256J-C1UR, Factory Programmed ) PX23
Force s/n H6 J2
R329 0R G6 PA22 / PX20 PX24 H4
R2 PA23 / PX46 PX25
J10 J3
200K [15] EDBG_DGI_TWD PA24 / PX17 PX26
EDBG_DGI_SCL F7 K2
[15] EDBG_DGI_TWCK PA26 / PB05 PX27 EDBG_SPI_MISO [15]
A2 K3
PA27 PX28 EDBG_SPI_MOSI [15]
A1 J4
[10] EDBG_ID_01 PA28 PX29 EDBG_SPI_SCK [15]
R46 330R B4 G5
[4,9,10,12,14,15] NRST PA29 PX30 EDBG_SPI_NCS [15]
A4 H5
C2 PA30 PX31
PA31
EDBG_USB_VBUS_5V A10 K9 EDBG_JTAG_TCK

EDBG_USB_DM EDBG_USB_HS_DM A9 USB_VBUS TCK K8 EDBG_JTAG_TDI
EDBG_USB_DP EDBG_USB_HS_DP A8 DMHS TDI J8 EDBG_JTAG_TDO
DPHS TDO H7 EDBG_JTAG_TMS
R23 39R EDBG_USB_FS_DM B9 TMS
DMFS
GNDCORE
VDDCORE
R25 39R EDBG_USB_FS_DP B8 J9 EDBG_RESET_N
GNDIO_1
GNDIO_2
GNDIO_3
GNDIO_4
GNDIO_5
GNDIO_6
GNDANA
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIN_1
VDDIN_2
VDDANA
DPFS RESET_N
GNDPLL
C7
USB_VBIAS
R10 C9
E10
J6
H8
D9
F10
D10
B10
E5
B5
J5
B6
E2
E6
F2
F6
F5
C3
H3
C8
10pF VDD_3V3
B L13 6.8K 1% B
180ohm at 100MHz
1 2
VDD_3V3
L4
JTAG VDD_3V3 JPR1 JP1
180ohm at 100MHz VDD_3V3 J10 Jumper Header 1X2 R1
1 2 VDD_3V3 EDBG_JTAG_TCK 1 2 10K
C49 C50
1nF 1nF EDBG_JTAG_TDO 3 4
8
C6 C5 C168 EDBG_JTAG_TMS 5 6 EDBG_RESET_N EDBG_RESET_N

C15 C175
1
2
1nF 7 8
EDBG_USB_VBUS_5V [4] 100nF 100nF EDBG_DIS
9 VBUS 1 2.2uF 2.2uF EDBG_JTAG_TDI 9 10
2 EDBG_USB_DM C4
DM
3 EDBG_USB_DP 100nF
DP
SHD
4 DNP(Header 2X5)
ID
10 GND 5
4
U5
VDD_3V3
VCC
IO2
(3V3)
11
J14
MicroUSB AB Connector
C179 C171 C178 C172 C174
EARTH_USB_EDBG
L11 2.2uF 2.2uF 100nF 100nF 100nF
GND
IO1
180ohm at 100MHz
1 2
PRTR5V0U2X
1
EARTH_USB_EDBG
A A

1/1
EDBG A 14
15
5 4 3 2 1
Figure 5-67. Expansion and XPRO Connectors
5 4 3 2 1
R194 0R ISC_D6/EXP/XPRO_PC0 [8,10,15]
J20
R193 DNP(330R) EDBG_DGI_TWCK [14]
Expansion
R196 0R
VDD_3V3 1
J7 10
9
R195 DNP(330R)
ISC_D5/EXP/XPRO_PB31
EDBG_DGI_TWD [14]
[7,10,15]
Boards
D VDD_3V3 5V_EXT_INP D
2
8
7
AREF [9]
Connectors
DNP(0R) R244
DNP(0R) R240
R310 100R 1% 3
[4,9,10,12,14] NRST 6 EXP/XPRO_PD25 [8,15]
4
5 EXP/XPRO_PD27 [8,15]
5
[4] 5V_EXT_INP 4 EXP/XPRO_PD26 [8,15]
6
3
7 R198 0R EXP/XPRO_PD28 [8,15]
2
8 R197 DNP(330R) EDBG_SPI_NCS [14]
1
SPI1_MISO 0R R247 J16
EXP/XPRO_PB5 [7,15] [8,15] EXP/XPRO_PD27
DNP(330R) R248
Socket 1X8 EXP/XPRO_PB6 [7,15] [14] EDBG_SPI_MISO 1 2
Socket 1X10
SPI1_SPCK 0R R260 3 4 R252 0R SPI1_MOSI
DNP(330R) R257 5 6 R253 DNP(330R) EDBG_SPI_MOSI [14]
[14] EDBG_SPI_SCK
NRST 100R 1% R261
Header 2X3
EXP/XPRO_PB9 [7,15]
R200 0R EXP_PA19 [7,15]
J8 J21 R199 DNP(330R) EDBG_DGI_GPIO0 [14]
1 1
[7] EXP_PA16 R202 0R EXP_PA20 [7]
2 2
3 3
[8] EXP_PD20
4 4 EXP/XPRO_PD29 [8,15]
[8] EXP_PD23
5 5
[8] EXP_PD21
6 6
[8] EXP_PD22 R203 0R
[8] EXP_PD24
7 7
R204 DNP(330R)
EXP/XPRO_PB10 [7,15]
EDBG_DGI_GPIO2 [14] 5V_EXT_INP
XPRO Power
C 8 8 C
[8] EXP_PD30 J24
R206 0R EXP/XPRO_PA21 [7,15]
R205 DNP(330R) EDBG_DGI_GPIO3 [14] 1 2
3 4
EXP/XPRO_PD12 [8,15] VSYS_5V VDD_3V3
EXP/XPRO_PD13 [8,15] DNP(Header 2X2)
XPRO EXT1
J9 J22
J25
1 1 EXP/XPRO_PA24 [7,15]
[7,15] EXP_PA19 ID 1 2
2 2 EXP/XPRO_PA23 [7,15] [14] EDBG_ID_02
[7] EXP_PA17 ADC(+) 3 4 ADC(-)
3 3 ISC_D2/EXP/XPRO_PB28 [7,10,15] [8] XPRO_PD11 EXP/XPRO_PD12 [8,15]
[7] EXP_PA18 GPIO 5 6 GPIO
4 4 ISC_D3/EXP/XPRO_PB29 [7,10,15] [8,15] EXP/XPRO_PD13 XPRO_PD18 [8]
[4,8,15] PMIC_LBO/EXP_PC8 PWM(+) 7 8 PWM(-)
5 5 EXP_PB23 [7] [7,15] EXP/XPRO_PB9 EXP/XPRO_PB10 [7,15]
[8] EXP_PC27 IRQ/GPIO 9 10 SPI_SS_B/GPIO
6 6 EXP_PB22 [7] [8,15] EXP/XPRO_PD13 EXP/XPRO_PD29 [8,15]
[8,15] EXP_PC26 TWI_SDA 11 12 TWI_SCL
7 7 EXP_TWD1_PD4 [8] [7,10,15] ISC_D5/EXP/XPRO_PB31 ISC_D6/EXP/XPRO_PC0 [8,10,15]
[8] EXP_PC11 UART_RX 13 14 UART_TX
8 8 EXP_TWCK1_PD5 [8] [7,15] EXP/XPRO_PA23 EXP/XPRO_PA24 [7,15]
[8] EXP_PC10 SPI_SS_A 15 16 SPI_MOSI
Socket 1X8 Socket 1X8 19 20
VDD_3V3
DNP(Header 2X10)
5V_EXT_INP
B B
XPRO EXT2
J17 J26
1 2 ID 1 2
[14] EDBG_ID_03
3 4 EXP_PA14 [7] ADC(+) 3 4 ADC(-)
[8] EXP_PD6 [8] XPRO_PD7 XPRO_PD8 [8]
5 6 ISC_D4/EXP_PB30 [7,10,15] GPIO 5 6 GPIO
[7] EXP_PA15 [8] XPRO_PD9 XPRO_PD10 [8]
7 8 ISC_D6/EXP/XPRO_PC0 [8,10,15] PWM(+) 7 8 PWM(-)
[7,10,15] ISC_D5/EXP/XPRO_PB31 [7,15] EXP/XPRO_PB5 EXP/XPRO_PB6 [7,15]
9 10 EXP_PB21 [7] IRQ/GPIO 9 10 SPI_SS_B/GPIO
[7] EXP_PB20 [7,15] EXP/XPRO_PA21 EXP/XPRO_PD28 [8,15]
11 12 ISC_D0/EXP_PB26 [7,10] TWI_SDA 11 12 TWI_SCL
[7,10] ISC_D1/EXP_PB27 [7,10,15] ISC_D2/EXP/XPRO_PB28 ISC_D3/EXP/XPRO_PB29 [7,10,15]
13 14 ISC_D2/EXP/XPRO_PB28 [7,10,15] UART_RX 13 14 UART_TX
[7,10,15] ISC_D3/EXP/XPRO_PB29 [7,10,15] ISC_D3/EXP/XPRO_PB29 ISC_D2/EXP/XPRO_PB28 [7,10,15]
15 16 ISC_D4/EXP_PB30 [7,10,15] SPI_SS_A 15 16 SPI_MOSI
[7,10,15] ISC_D5/EXP/XPRO_PB31 [8,15] EXP/XPRO_PD29 EXP/XPRO_PD26 [8,15]
17 18 ISC_D6/EXP/XPRO_PC0 [8,10,15] SPI_MISO 17 18 SPI_SCK
[8,10] ISC_D7/SPI1_SPCK_PC1 [8,15] EXP/XPRO_PD27 EXP/XPRO_PD25 [8,15]
19 20 EXP_PA25 [7] 19 20
[7] EXP_PA22 VDD_3V3
[7] EXP_PA26 21 22 ISC_D9/SPI1_MISO_PC3 [8,10]
R266 22R 23 24 ISC_HSYNC/EXP_PC6 [8,10]
[8,10] ISC_D8/SPI1_MOSI_PC2 DNP(Header 2X10)
R262 DNP(22R) 25 26 ISC_PCK/SPI1_NPCS0_PC4 [8,10]
[9] CLK_AUDIO 27 28 ISC_PWD/EXP_PB12 [7,10]
[8,10] ISC_VSYNC/EXP_PC5 29 30
R294 0R ISC_D11/EXP_PB25 [7,10]
31 32
[7,10] ISC_RST/EXP_PB11 R292 DNP(0R) EDBG_ID_05 [14]
33 34
[8,10] ISC_MCK/EXP_PC7
[14] EDBG_ID_04
R271
R273
0R
DNP(0R)
35 36 R302
R299
0R
DNP(0R)
PMIC_LBO/EXP_PC8
EDBG_ID_07 [14]
[4,8,15] XPRO Connectors
R290 0R
[7,10] ISC_D10/EXP_PB24 Socket 2X18 EXP_PC26 [8,15]
[14] EDBG_ID_06 R283 DNP(0R)
[8] EXP_PD31
A A

1/1
Expansion & XPRO Connectors A 15
15
5 4 3 2 1
71
6. Errata
6.1 Pins swapped on schematic
Issue: U1 and T1 pins swapped on SAMA5D27 schematic

The schematic symbol of the SAMA5D27 has pins U1 and T1 swapped:
The practical consequences for the SAMA5D2-XULT user are minor: the polarity of the internal comparator (ACC)
is inverted. This can be re-inverted by setting the bit INV in the ACC Mode register (ACC_MR).
The replacement symbol (recommended for new designs) can be found at either of the following URLs:
http://www.atmel.com/tools/atsama5d2-xult.aspx?tab=documents
http://www.atmel.com/Images/SAMA5D2-FIXED.zip
Workaround: None.

7. Revision History
Table 7-1. SAMA5D2 Xplained Ultra User Guide Revision History

Doc. Revision Changes
Table 5-19 “J9 Connector Signals”: corrected PC10 and PC11 muxing details.
C
Added Section 6. “Errata”: “U1 and T1 pins swapped on SAMA5D27 schematic”
Updated Figure 5-2 “Processor Power Lines Supplies”
B
Section 5.6 “SAMA5D2-XULT Board Schematics”: updated all drawings (Figure 5-54 to Figure 5-67)
A First issue.

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© 2016 Atmel Corporation. / Rev.: Atmel-44028C-ATARM-SAMA5D2-Xplained-Ultra-User Guide_13-Oct-16.
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U.S. and other countries. ARM®, ARM Connected® logo, and others are the registered trademarks or trademarks of ARM Ltd. Other terms and product names may be
trademarks of others.
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Atmel - SMART SAMA5D2 Series

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Atmel | SMART SAMA5D2 Series

SAMA5D2 Xplained Ultra Evaluation Kit

This guide provides details on the SAMA5D2-XULT. It is made up of five main

The SAMA5D2-XULT includes:

2 SAMA5D2 Xplained Ultra [USER GUIDE]

3. Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

SAMA5D2 Xplained Ultra [USER GUIDE] 3

Table 1-1. Evaluation Kit Specifications

1.1 Electrostatic Warning

ESD-Sensitive Electronic Equipment!

1.2 Power Supply Warning

Hardware Power Supply Limitation

Hardware Power Budget

4 SAMA5D2 Xplained Ultra [USER GUIDE]

2.1 Power up the Board

Table 2-1. Electrical Characteristics

SAMA5D2 Xplained Ultra [USER GUIDE] 5

SAMA5D2 Xplained Ultra [USER GUIDE] 6

4.2 Equipment List

4.3 Board Features

Table 4-1. Board Specifications

7 SAMA5D2 Xplained Ultra [USER GUIDE]

5.1 Board Overview

Figure 5-1. SAMA5D2-XULT Board Overview

2 4 R153 R149 R150 J15 D36

R144 R145 D38 D39

C50 R142 R143

C49 C48 R146

C47 JP6 D42

EDBG-JTAG A5-JTAG R104

R99 R103 D50 D51

R123 D52 D53

R100 GND GND

R30 JP2 C18

R43 R46 C17 R45 C16

5.1.1 Default Jumper Settings

Table 5-1. SAMA5D2-XULT Jumper Settings

SAMA5D2 Xplained Ultra [USER GUIDE] 8

Table 5-2. SAMA5D2-XULT Board Interface Connectors

5.3 Function Blocks

5.3.2 Power Supply Topology and Power Distribution

5.3.2.1 Power Supplies

9 SAMA5D2 Xplained Ultra [USER GUIDE]

VDDBU VDDANA VDDBU (3V3) N7 N6

VDDHSIC VDDFUSE VDDAUDIOPLL

C147 C133 C125 C110

5.3.2.2 Power-up and Power-down Considerations

The power-up sequence provided in the SAMA5D2 Series datasheet must be

5.3.2.3 ACT8945A Power Management IC

WARNING Refer to the ACT8945A datasheet at www.active-semi.com for more details.

SAMA5D2 Xplained Ultra [USER GUIDE] 10

Figure 5-3. Board Power Management

(See note 1) JPR4

C20 C23 C24

100nF TP14 TP11

SMD SMD 7 1 2 VDD_3V3_LP R284 0R 1 2

49.9K 1% C169 C17 C173 C13

Supply Group Configuration

11 SAMA5D2 Xplained Ultra [USER GUIDE]

Figure 5-4. Power Boost 5V

5.3.2.5 Input Power Options

Figure 5-5. Input Powering Scheme

SAMA5D2 Xplained Ultra [USER GUIDE] 12