96362 Design of an Input Filter for Power Factor Correction (PFC) AC to DC Converters Employing an Active Ripple Cancellation. D.Y. Lee and B.H. Cho Electrical Engineering Department ‘Seoul National University Seoul, Korea, TEL : 82-2-880-7260 ABSTRACT ‘An active input Gtr for power fictor corestion (PFC) circuit ‘employing ripple current cancellation is proposed to reduce the filter's size and cost. Switching ripple curent can be filtered by an active circuit from the line cusrent. A single stage passive filter with the active filter compensation circuit, a high filter can bbe synthesized to meet the electromagnetic interference (EMI) and power factor requirements ‘Analysis ofthe active iter and design procedure ae detailed ‘Simulation result is presented to verify the high order filter characteristics of proposed scheme. 1. INTRODUCTION Recently there have been ever increasing demands for high power factor and low hannonic distortion in the eurent drawn from the utility. Switch mode ae to de power factor corection @FC) cireuts ae widely used not oaly to comply the power cuality specification but also for maximum efficiency. However Sitching mode PFC converters. generale high frequency switching sipple and noise which must be suppressed by clecromagnti interference (EMD filter in order to comply EMI specifications such as FCC, VDEOBT1, Mil Std 461C. The input filter for PRC cireut has the ellowing requirements Fist, inorder that displacement power factor is close to nity at line frequency, the maximum value of total filter capacitance is Fimited. AC the same time to avoid the pase delay which causes power factor degradation, cut-off frequency of the input fier ‘must be well above the line fequeney. Second, the input iter 0-7803-3547-3-7/16 $4.00 © 1996 IEEE smust have enough ripple atenvation at switching frequency to satisfy the EMI specifications. To satisfy above requirements, high order passive filter, namely Cauer-Chebyshev filter was introduced (1), As showm in Figure, the numbers of canponeats in the Cauer-Chebyshev filter are too many, and its complex structure makes design difficult, The characteristics of filter is very sensitive due to parameter variation. A damping resistor is needed to suppress resonant oscillation. R-L parallel damper is generally used to avoid resistor los of line curent. In this paper, a single stage input filter employing an active compencation technique is proposed to meet both the EMI and power factor requirements. Proposed active input filter is divided into three stages, First stage is curent sensing stage. Second stage is signal processing (compensation circuit) stage. The last stage is current injection stage. The switching ripple curent tothe line is sensed using the secondary winding of the filter inductor. The sensed secondary inductor vollge is integrated to obtain a voltage proportional to the ripple current. In the signal processing stage, switching frequency ripple component is compensated through active circuit to generate 180" phase shifted waveform, A transconductance amplifier converts compenseted voltxge signal into injection current. In this paper, analysis of the proposed active filter scheme and design procedure for the single stage passive filter with the active ripple compensation circuit are presented. Performance of the ‘proposed scheme is verified through computer simulation and. experiments, Design results are compared with a high order passive filter 582oo ro) Line frequeney Resonnant fequncy Figure 1. 6th order Cauer-Chebyshev titer 2. PROPOSED SCHEME AND DESIGN PROCEDURE 2:4 DESCRIPTION OF THE PROPOSED SCHEME. Figure 2. A simpitied scheme of the active fiter Figure 2. shows a simplified scheme of the active ripple ‘cancellation. The inductor ripple current is sensed and ‘compensated to produce 1a out of phase switching ripple ‘current, The compensated curent is injected back to the line to cancel the ripple curent. To sense the high frequency switching ripple component of the inductor eurent, the induced voltage sctose L is sensed through the secondary windings, and sensed inductor voltage is integrated to obtain a voltage which is proportional tothe inductor current. This voltage is converted to ‘he injection curent using a transconductance amplifier. 583 96362 Isw ke Ltk in a if Figure 3. A simpltid block diagram of the system 3) In order to realize high order filter characteristic, compensation circuit is needed. Figure 3. shows a simplified block diagram of the system. The overall filter transfer function ‘becomes: Has (+e) = (1+ 8(s))-4(s) And output impedance of iter becomes as follow Z.(s) 2.66)+ 2.6) a ve Toe Z.(s) Zs) Z.5)+Z.6) z e =Z()12Z(8) (2) In order to reject low frequency component (Le. line frequency current) in the compensation circuit, B(s) must be designed to have high pass Glter characteristics with a suficient rejection ratio atthe line frequency. At the same time, 1 + B(s) must have low pass filter characteristics with a high-order attenuation slope to get sufficient switching ripple rejection. An optimum choice of [Bs is found tobe as follows B(s)= (3) (5) ‘where Rd is an equivalent damping resistance ofsctive damper.Figure 4, shows asymplotes of B(), 1+ BCs), H(s).and HS), (2/0) vy oa ‘* ais) 2 | Ho monte 0) He) Figure 4, Asymptotes of B(s), 1#B(s), H'(s) 2.2 DESIGN PROCEDURE Using the desired compensation transfer function, B(s) in Eq, ), a thidorder active filter ean be synthesized by properly selecting », and Q {A design procedure can be stated with the singe stage passive filter. In an input iter for a PEC circuit, total capacitance is limited to meet the input displacement factor requirement (2). °, (6) tan(cos“(/0F)) where DF =coe0: paceent power fcr fom on s(n] ts ale ofthe gt vag, Mf ms. a ofthe line eqn curent 584 96362 ln order to minimize the phase delay atthe ine frequency due to the filter, the cut-of frequency of the filter aust be suficently higher than the line frequency. For , design in B(s), lower q, provide more attenuation in HIG) and thus smaller L in the passive filter can be used, However this causes less rejection ratio of the line frequency component of the line curent in the compensation circuit. In ‘order to limit the line frequency component to be a specified limit, forthe compensation circuit, the minimum g, is as follows. @, 220 oof 2] ee] where /, :1ms value ofthe line current 1, specified limit Once ,and Q of B(s) are selected, ripple atenuation of 1 + B(s) at switching fequeney can be calculated. The resonet frequeney of single sage passive filter ean be selected to sais) the total ripple attenuation specification, The filter inductance is calculated from the resonant frequency of filter as in Eq, (8). For lanping ofthe fier poles, an active damper is used (2) By sing the active damper insted ofa pasive RAL damper, filter sie is reduced and the eficiency i improved (8) where, ith resonant frequency of filter. 3, DESIGN EXAMPLE AND SIMULATION RESULTS ‘An input filter for 3700W Boost + Buck PFC circuit is designed. 3700W Buck + Boost PFC system has 50 ktiz switching fiequency, and 4.2 A switching ripple current inthe worst case Tn order to comply the given EMI specification ( VDE 0871 ), the input filter must provide 88 dB ripple afenuation at switching fiequency. rom Ea, (6), total passive filter capacitance, Cmax is found 10 be 75 uF, Using Eq. (7), the minimum g, in B(s) is 41.7 «10' rad / sel, and Q is selected to be 1 to minimize the overshoot near ,. This provides a switching ripple attenuation of 47 4B, and ffom the 88 4B ftenuation requirement, the resonant frequency ofthe pasive filter is 2.510" fra / sec From Eg, (8), the filter inductance is calculated as 214 ul, which introduce @ negligible phase delay ofthe line current, The design values are surumarized as follows96362 Figure 5. Detailed circuit description ofthe active fter filter capacitance C= 75 LaF filter inductance L=214 [ui passive filter eutof| —q= 25x10" mad/ sec), frequency passive iter Q actor Q=r active filler eutott] —@, = 1.7 x10" lred/ sex), regu active filer Q factor Qt ‘Table 1. Design parameter of the active titer Figure 6. shows the frequency response and time domain simulation. From the simulation results, ripple attenuation is 9048 at switching frequency. Implementation of the active filter is divided into three stages First stage isthe curent sensing stage. Second stage isthe signal processing (compensation circuit) tage. The last stage is the ‘current injection sage. sp Figure 6. (b) Time domain simulation 1, anc, Figure 5. shows a detailed circuit description ofthe active filter. ‘The compensation circuit of B(s) i realized with Sallen and Key (positive feodback) high pass active filter. The compensation circuit uses 4 op amp LF 353 for signal processing. The current injection circuit uses one power op amp IM 675 for a transconductance amplifier. In this design a single inductor of 214 uH is used while in the high-order passive filter (6th order Cauer-Chebyshev iter) design [1], umber of inductor is six, and total inductance value is 494 uHL Figure 6. (8) Frequency response of the active fiter ‘Passive iter [Active filter Total capacitance TSuF 7.5uF ‘aumber of capacitor 3 1 Total inductance 4a Disa ‘umber of indvetor 6 1 ‘Table 2. Comparison between active and passive fiter4, EXPERIMENTAL RESULT A DC-DC boost converter is used as a ripple current source Figure 7. shows the ripple current is « $0 kHz triangular wave with a 4 A peak to peak value. Figure 8 shows filter inductor current and the compensated injection current. Figure 9, shows the resultant fine current ripple ‘As a result, single stage passive LC filter with high order low pass filter characteristics can be realized, Figure 7. Switching ripple current ( 1 Ald, § us/div) ‘wkne180Ns/e same (@) o) © * io ay eS aes te oo Figure 8. (2) Fiter inductor current /, ( 40 mAVdlv, 5 us/aiv) (©) Votage of secondary winding (2 Vidiv, 5 us/div) (c) Integrated votage signal ( 500 mV/dlv, § us/aiv) (4) Compensated vottage signal ( 500 mV/alv, 5 us/dv) 96362 3 Santee ete Ct wea Figure 8. Input current 1, (20 mA/div, 5 us/éiv) 5. CONCLUSION ‘The proposed filter scheme can reduce filter size and cost with possible improvement of overall efficiency. Especially in high power PFC circuit, it is shown in this paper that the proposed active input Ger scheme, in comparison with the high-order passive filter, not only reduces number of the passive power ‘components and the size but also design is much simpler. REFERENCES. [1] A.1 Zrerey, Handbook of Filter Synthesis, New York: John Willey & Sons, ine.,1967 2} ¥. Viatkovi, D. Borojevie, and F. C. Lee, “ Input Filter Design for Power Factor Correction Circuits,” Proceedings of the TECON’ 93, pp. 954-958, 1983. []B. 11 Cho and D. H. Lee, A Single PWM Section Solar ‘Amay Shunt Switching Unit with an Active Ripple Filter,” TECEC, August 1995,