256 ¢ Transistor Bias Cincurrs (umm Section 5-1 Section 5-2 Section 5-3 ‘© The purpose of biasing a circuit sto establish a proper stable de operating point (Q-point) Toe Q point ofa circuit is defined by specific values for fe and Ve. These values are called the coordinates ofthe Q point. ‘Ade toad line passes through the Q-point on a transistor’ collector curves intersecting the verti- cal axis at approximately Icy and the horizontal axis at Vegi ‘© ‘The linear (ative) operating region ofa transistor lis along the load line below saturation and above cutot, © Loading effets are neglected fora sti vollge divider. ‘The de input resistance at the base of @ BIT is approximately BocRe. © Voltage-ivider bias provides good Q-point stability with a single-polarity supply voltage. I is ‘the most common bias cicuit © ‘Emitter bias generally provides good Q-point stability but equires both positive and negative supply voltages. © The base bias circuit arrangement has poor stability because its Q-point varies widely with Boc. Emiter-feedback bias combines base bias with the addition of an emitter resistor, Collector-eedback bias provides good stability using negative feedback from collector to base. . . CKEY TERMS Keyterms and other bold terms in the chapter are defined in the end of book glossary. DC load line A straight line plot of fe and Ver fora transistor circu Feedback The process of returning & portion of a crext’s ouput back tothe input in such @ way as to oppose or aid & change in the output. Linear region The region of operation along the load line between saturation and eutof. Q-point The de operating (bias) point of an amplifier specified by voltage and curent values Sui voltage divider A voltage divider for which loading effects can be neglected. sRevpormuuas Voltage Divider Bias Re se (BE vee for aif otge divider 52 Ves Va ~ Van s3 eat emt 4 Ve = Veo ~ lee Bos 55 Roymasw = imasin = AOE Vin = Vs 56 p= tm Me + Rnu/Boc Vi + Var STI e+ Rin Boo ee ge Yu + Vin ~ Vox 1 = Rt Real Boe Emitter Bias Ven = Vs so p= te Re + Re/BocCincumt-Action Quiz * 257 Base Bias 5-10 Ver = Veo ~ eRe eit ten ti Emitter Feedback Bias S12 Te Ret Rel Boe Collector Feedback Bias 513 v = Re + Ral Boe S14 Vex = Voc ~ Fee _TRUE/FALSE QUIZ _ Answers can be found at www. pearsonhighered.com/oyd 1, DC bias establishes the de operating point for an amplifier. 2. Qpoint is the quadratic point in a bias circuit 13. The de loa line intersects the horizontal axis ofa transistor characteristic curve at Vow = Voc. 4, The de load line intersects the vertical axis ofa wansistor characteristic cutve at fe ‘5. The linear region of a transistor’ operation lies between saturation and cutof. 6 2 8 %. Voltage-divider bias is rarely used. Input resistance at the base ofthe transistor ean affect voltage-divider bias Stiff voltage-divider bias is essentially independent of base loading. [Emitter bias uses one de supply voltage. 10, Negative feedback is employed in collector feedback bias, AL. Base bias is less stable than voltage-divider bias. 12. A pnp tansistor requires bias voltage polarities opposite to an npn transistor _CIRCUIT-ACTION QUIZ Answers canbe found at wow pearonhighredcomioyt 1, If Vig in Figure 5-7 is inereased, the Q-point value of collector current will (a) increase (b) decrease (@) not change 2. 1 Vga in Figure 5-7 is increased, the Q-point value of Veg will (a) increase (B) decrease (@) not change 3. Ifthe value of Rin Figure 5-10 is reduced, the base voltage will (@) increase (b) decrease —_() not change 4 If the value of R in Figure 5-10 is increased, the emitter curseat will, () increase (b) decrease —_(@) not change 5. IPRgin Figure S-15 is decreased, the collector current will (a) increase (B) decrease (@) not change (6. IF Rin Figure 5-18 is reduced, the base-to-emitter voltage will () increase (B) decrease —_() not change 7. If Vec in Figure 5-20 is increased, the base-emitter voltage will (@) increase (b) decrease —_(@) not change 8. TPR, in Figure 5-24 opens, dhe collector voltage will () increase (B) decrease —_(@) not change 9. IF Ry in Figure 5-24 opens, the collector voltage will (a) increase (B) decrease (@) not change 10. If Ry in Figure 5-24 is increased, the emitter current will (@) increase (b) decrease —_() not change258 * Taansisron Bias Cincurrs Section 5-1 Section 5-2 Section 5-3 Section 5-4 Answers can be found at wwww.pearsonhighered.com/loyd. 1. The maximum value of collector current in a biased transistor is (a) Bocly —) Heya (€) greaterthan Ie (A) I~ Ip 2, Ideally, a de load line is a straight line drawn on the collector characteristic eurves between (a) the Q-point and cutoff () the Q-point and saturation (©) Vesiousm 20 leu) (@) Jy = Oand ly = IelBoe 43, Ife sinusoidal voltage is upplied tothe base of «biased npn transistor and the resulting sina soidal collector volage is clipped near zero vols, the transistor is (@) being driven into saturation (b) being driven into eutofT (6) operating nonlinearly (@ answers (a) and (© (6) answers (b) and (©) 4. The input resistance athe base of a biased transistor depends mainly on () Boo — @) Ry) Re (A) Bycand Ry 5. Ina voltage-dvider biased transistor circuit such asin Figure 5-13, Rpyaase Can generally he aeglevted in calculations when (8) Royaasey > Re) Ry > VOR ase — (©) Riyqaasey > HOR, @) Ry < Rp c Vy is 2.95 V. The de emitter voltage is ap- 6, Ina certain voltage divide biased npm transis proximately (@)225V @)295V (@36V_ OIV 7. Voliage-divider bias (a) cannot be independent of Bye (b) can be essentially independent of nc (6) isnot widely used (2) requires fewer components than ll the other methods 8, Emiter bias is (a) essentially independent of Bye (b) very dependent on Bpc (6) provides a stable bias point (@) answers (@) and (@) 9, In.an emitter bias circuit, Rp = 2.7 kOLand Vee = 15 V. The emitter current (a) isS:3mA —(b) is2.7 mA (©) is 180A (@) cannot be determined 10, ‘The disadvantage of base bias is that () itis very complex () it produces low gain (6) itis 00 beta dependent (@) it produces high leakage current Collector-feedack bias is (a) based on the principie of positive feedback _(b) based on beta multiplication (©) based on the principle of negative feedback (2) not very sable 12, In a voltage-divider biased npn transistor, if the upper voltage-divider resistor (the one con- nected to Vec) opens, nL (a) the transistor goes into cutoff (b) the transistor goes into saturation (6) the transistor burns out (@) the supply voltage is too high 13, In a voltage-divider biased npn transistor, if the lower voltage-dvider resistor (he one con- nected to ground) opens, (@) the wansistor is not affected (b) the transistor may be driven into cut () the transistor may be driven into saturation (@) the collector current will decrease 14, In a voltage-divier biased pnp transistor, there is no base current, but the base voltage is ap- proximately correct, The most likely problem(s) is (a) a bias resistor is open (b) the collector resistor is open () the base-emitter junction is open (@) the emitter resistor is open (6) answers (8) and (©) (8) answers (c) and (@)Prosuems * 259 1S. 1 Rin Figure $-25 is open, the base voltage is @ HOV MOV ©@3BV wo7V 16, IF Ris open, the collector curent in Figure 5-25 is (@) 5.17mA—(b) 10mA_— (©) 483mA_—_(@) OMA Answers to all odd-numbered problems ae a the end of the book. BASIC PROBLEMS Section 5-1 The DC Operating Point 1, The output (collector voltage) of a biased transistor amplifier is shown in Figure S-32. 1s the transistor biased too elose to cutoff or too clase to saturation? URE 2 -ov 2, What is the Q-point for biased transistor as in Figure 5-2 with In = 150A, Be Voc = 18 Vand Re = LOkQ? ‘3, What is the saturation value of collector curent in Problem 2? 4, What is the cutoff value of Vey, in Problem 2 ‘5, Determine the intercept points ofthe de load line on the vertical and horizontal axes of the collector-characteristic curves for the circuit in Figure 5-33, folder on the companion website. Filenames corespond to figure num- bers (ex, F05:33), 66. Assume that you wish to bias the transistor in Figure 5-33 with Jy = 20 4A. To what voltage ‘ust you change the Vag supply? What ae Zc and Veg atthe Q-point, given that nc = 50? 17, Design a biased-transistor circuit using Vay = Vec= 10 V fora Q-point of fe = $ mA and Vex, =4'V. Assume Bye = 100. The design involves finding Ry, Rc, and the minimum power rating of the transistor. (The actual power rating should be greater) Sketch the circuit, 8, Determine whether the transistor in Figure 5-34 is biased in cutoff, saturation, or the linear region. Remember that Jc = Bpcfa is valid only inthe linear region, > FiouRe 5-34 Yee L + Yin, 1s260 * Transistor Bias Cincurrs section 5-2 Re Sie AC) voc= 150 )m ta Zeon A FIGURE 5-36 > FIGURE 5-35 oma) 600 wn 0 500 4a “0 400 wn 3008 20 Cine 20 200 an 100 na Ver) Tiiaestasn 9, rom the collector characteristic eurves and the de load line in Figure S-35, determine the Tollowing: (@) Collector saturation current 0) Ve at cutoft (©) Qpoint values of Ipc, and Vex 10, From Figure 5-35 determine the following (a) Maximum collector curren for linear operation (@) Base current atthe maximum collector eurent (6) Vex st maximam collector current Voltage Divider Bias 11, Whats the minimum value of yc in Figure 5-36 that makes Riyast) 2 10R3? 12, The bias resistor Re in Figure 5-36 is replaced by a 15k potentiometer, What minimum re. sistance setting causes saturation? 13, Ihe potentiometer described in Problem 12 is set at 202, what are the values for Ip and Vog? 14, Determine ail transistor terminal voltages with respect to ground in Figure S-37 15, Show the connections required to replace the transistor in Figure 5-87 with a pnp device. 16, (a) Determine Vp in Figure 5-38, (b) How is Vg affcte ifthe transistor is replaced by one with a Bpc of 50? 17, Determine the following in Figure 5-38 (2) Q-point values (©) The minimum power rating ofthe transistor 18, Determine J, fy, and fy in Figure 5-38, | A FIGURE 5-37 | A FIGURE 5-38AFIGURE 5-39 Ska A FIGURE 5-42 Section 5-3 Vee wv 100 Prosuems * 261 Other Bias Methods 19, Analyze the cicuit in Figure S-39 to deve with respect to ground. Assume Boe = 100, 20. ‘To what value can Rin Figure S-39 be reduced without the transistor going into saturation? 21, Taking Vag into aceount in Figure S-39, how much will /g change with a temperature increase from 25°C wo 100°C? The Vag is 0.7 V at 25°C and decreases 2.5 mV per degree Celsius Neglect ay change in Bye. ‘When can the effect of a change in pc be neglected in the emitter bias circuit? the correct voltages atthe transistor terminals Determine Jc and Veg ia the pnp emiter bins circuit of Figure S-40. Assume Bye Determine Vp, Ve, and fc in Figure 5-41. BER Vox, he vex Eta oe fe Lut? toa Qu=m Voc + A FIGURE i AFIGURE 5-41 2S. What value of Re can be used to decrease Jc in Problem 24 by 25 percent? 26, What isthe minimam power rating forte transistor in Problems 25? 27. A collector feedback circuit uses an npn transistor with Voc = 12V, Re = 1.2K, and Ry ~ 470, Determine the collector current and the collector voltage if Boe = 200, 28. Determine fy, Ie, and Vey for a base-biased transistor circuit with the following values: Boc = 90, Voc 12 V, Ry = 22K0,and Re = 100.0. 29. If Boc in Problem 28 doubles over temperature, what are the Q-point values? 30. You have two base bias circuits connected for testing, They are identical except that one is biased witha separate Vi, source and the other i biased with the base resistor connected to Vcc. Ammeters are connected to measure collector cureal in each circuit. You vary the Voc supply voltage and observe that the collector current varies in one circuit, but not inthe othe. In whieh circuit does the collector curent change? Explain your observation. 31. The datashest for a particular transistor specifies a minimum inc of $0 and a maximum frye ‘of 125, What range of Q-point values can be expected if an attempt is made to mass-produce the circuit in Figure S~42? Is this range acceptable if the Q-point must remain inthe transs- tor’ linear region? 32, The base bias circuit in Figure 5-42 is subjected to a temperature variation from 0°Ct0 70°C. ‘The Binc decreases by 50 percent at 0°C and increases by 75 percent at 70°C from its nominal value of 110 at 25°C. What are the changes in fe and Vey over the temperature range of 0°Cw °C?262% Taansisron Bias Cincurrs Section 5-4 Troubleshooting 3, Determine the meter readings in Figure 5-43 if R is open, > FiguRe 5-43 34, Assume the emitter becomes shorted to ground in Figure 543 by a solder splash or stray wire clipping. What do the meters read? When you correc the problem, what do the meters ead? 3. Determine the most probable failures, if any in each eireuit of Figure S~44, based on the indi- cated measurements. 36. Determine if the DMM readings 2 through 4 in the breadboard circuit of Figure 5-45 are cor- rect, If they are not, isolate the problem(s), The transistor is « pnp device with a specified de beta ange of 35 to 100.Prosuems * 263 A FIGURE 437. Determine each meter reading in Figure 54S for each of the following faut: (a) the 680 0 resistor open () the 5.6K0 resistor open (6) the 10K0 resistor open (@) the 1OKA resistor open () ashort from emitterto ground (€) an open base-emitter junction APPLICATION ACTIVITY PROBLEMS. 38. Determine Vp, Ve, and Vc in the temperature-to-voltage conversion circuit in Figure S-29(a) if R; hails open. 39, What faults will cause the transistor in the temperature-to-voltage conversion citeuit to go into eutot? 440, A thermistor with the characteristic curve shown in Figure S~46 is used in the circuit of Figure '5-29(a). Calculate the output voltage for temperatures of 45°C, 48°C, and 53°C. Assume a still voltage divider 41, Explain how you would identify an open colleeor-base junction inthe transistor in Figure $-29(. > FIGURE 5-45 Ran) 26 24 2 20 1s| 1 14] reo, 4Sa6 47 aS A SO ST SE 53 St SS264 © Transistor Bias Cincurrs Partial datasheet forthe 23904 ‘transistor. Copyright Fairchild Semiconductor Corporation, Used by permission. DATASHEET PROBLEMS 42, Analyze the temperature-to-voltage conversion circuit in Figure S~47 atthe temperature ¢x- ‘remes indicated on the graph in Figure 5-46 for both minimum and maximum specified datasheet values of fy Refer tothe paral datasheet in Figure 5-48. 43, Verify that no maximum ratings are exceeded inthe temperature-to-voltage conversion circuit in Figore 5-47. Refer to the partial datasheet in Figure 5-48. > FIGURE 5-47 Vee. Absolute Maximum Ratings” Symbol Parameter Value Units Vas CaS oS Va = v Vans | CatecarSaneVaage a v ON CHARACTERISTICS" me | RST PES RR ES Tee ‘ 44, Refer to the partial datashoot in Figure 5-49, (@) What isthe maximum collector current for a 2N22224? (©) What is the maximum reverse base-emitter voltage for 8 2N2218A? 48. Determine the maximum power dissipation for a 2N2222A at 100°C, 46. When you increase the collector current in a 2N2219A from | mA to S00 mA, how much does ‘the minimum Sc (hrg) change? ADVANCED PROBLEMS. 47, Design a circuit using base bias that operates from a 15 V de voltage and draws a maximum ‘current from the de source (Icejnay) of 10 mA. The Q point values ate tobe Fe = S mA and Vo = 5 ¥, The transistors a 2N3904, Assume a midpoint value for ByProsuems + 265 A FIGURE 9 Partal datasheet for 2N2218A-2N2222A,266 ‘© Transistor Bias Cincurrs 40) 30 normalized de cure gin 48, Design a circuit using emitter bias that operates from de voltages of +12 V and —12 V. The ‘maximum Joc is to be 20 mA and the Q-point is at 10 mA and 4 V. The transistor is a 2N3904, 49, Design a circuit using vollage- divider bias forthe following specifications: Voc 9'V, Iccimss) = SmA,fo= LSmA, and Veg = 3 V. The transistor is a 2N3904, 50, Design a collector-feedback circuit using a 2N2222A with Vee 15V. S41. Can you replace the 2N3904 in Figure S47 with a2N2222A and maintain the same range of| ‘output voltage over temperature range from 45°C 10 55°C? '52, Refer to the datashect graph in Figure $-S0 andthe partial datasheet in Figure 5-49, Determine the minimum de curent gain for a2N2222A at ~$5°C, 25°C, and 175°C for Vee = 1 V. 10 mA, and Vex NG = TSC: 1s 20 3080 Ww 2» MSO IO a0 300500 1 ellestor cureat (A) AFiGuRE 5-50 '53. A design change is required inthe valve interface circuit ofthe temperature-control system shown in Figure 5-28. The new design will have a valve interface input resistance of 10k. Determine the effect this change has onthe temperatur-to-voltage conversion circuit, ‘4, Investigate the feasibility of redesigning the emperature-to-vollage conversion circuit in Figure 5-29 to operate from a de supply voltage of 5.1 V and produce the same range of output vot ‘ages determined inthe Application Activity over the required thermistor femperature range rom 60°C 10 80°C, MULTISIM TROUBLESHOOTING PROBLEMS ‘These file circuits are inthe Troubleshooting Problems folder on the companion website 158. Open file TSPOS-S5 and determine the fault. ‘56. Opes file TSPOS-56 and determine the Fault, '57, Open file TSPOS-S7 and determine the fault ‘58, Open file TSPOS-S8 and determine the fault. 159, Open file TSPOS-59 and determine the Fault 660. Open file TSPOS-60 and determine the fault.