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Begum Rokeya University, Rangpur

Department of Computer Science and Engineering


B.Sc.(Engg.) 2nd Year 1st Semester Final Examination-2020
Session: 2018 – 2019
Course Code: CSE 2101 Course Title: Digital Logic Design
Time : 1.5 Hours Full Marks : 20

Answer any Two (02) from the following questions. It is strongly


recommended to answer of a particular question in a sequential
manner.
Draw the following figure in the middle of each page of your answer
script, otherwise your page may not be considered.

Honesty

1. a) Design the logic circuit which will represent the following sensation- 5
There are four students in a class, and a teacher will conduct the class
when 75% students are present.

b) Explain the looping group of octets in K-map. Set your own example to 5
explain this settings of k-map. Your example should be unique (i.e.
example should not be taken from other sources- like books, your friends
or e-documents etc.)

2. a) Realize y=AB+BA using NAND gates only. 2


b) Perform binary subtraction using 2's complement for (62)10 and (99)10. 3
c) State Demorgans law. 2
d) Express the following function as sum of minterms : 3
F(A,B,C,D)= B’D+A’D+BD

3. a) Design 8 bit BCD adder. 4


b) Explain the working of R-2R ladder type DAC. 2
c) What is ripple counter? Explain the propagation delay in ripple counter. 4

4. a) Explain the working principle of Master-Slave Flip-flop. 3


b) Define setup and holding time in clocked flip-flop. 2
c) Simplify the following functions into SOP and POS forms- 5
i) F(A, B, C,D) = Ʃm(2,3,5,7,8,10,12,13)
ii) F(W,X, Y, Z) = π M(2,10,13)

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