Series: Programmable Controller

Programmable Controller
SERIES
OPERATION MANUAL
PC10G-CPU (TCC-6353)
Compatible with Ver 3.00
FOREWORD
Thank you very much for purchasing our Programmable Controller.
This is a operating manual of TOYOPUC-PC10G (TCC-6353).

For safety use of this product, read carefully this manual and other related individual
instruction manuals. Furthermore, keep these manuals at an easily accessible place so as
to be ready for reading any time as necessary.
Distributor or dealer of this product is kindly requested to hand over this manual to end user
without fail.
The product specification, etc. are subject to change without prior notice due to better
modification.
Where a product applicable to the weapons and strategic materials (or services) stipulated
in the Foreign Exchange and Foreign Trade Control Act is exported to overseas from Japan,
it is necessary to get the export license from the Japanese Government.
In the event any defect due to our manufacture is found in our products during the warranty
period, we will repair or replace them at our discretion. We shall not be responsible for any
direct or indirect damages related to our products except as herein stated.
After purchase this product, it is necessary to clear registers before use.
(Please refer to "3.1.3. About register clearing" for details.)
i
FOR SAFETY OPERATION
Before installing, operating, maintaining and checking, read carefully this Manual without
fail for proper and safety operation and work. Any operator and any maintenance man
who relate to this product (Programmable Controller) are requested to acquire the
knowledge on devices, safety information and cautions before being engaged in the
operation and maintenance. This Manual classifies the safety caution level into
"WARNING" and "CAUTION" using alert symbols as follows.
Failure to observe the instructions given in this Manual could

result in death or bodily injury of the operator.
Failure to observe the instructions given in this Manual could

result in risk of bodily injury or physical damage to equipment,
etc.
Don't overhaul the module and don't touch the module

internals, with the power switch kept ON.
Failure to observe this instruction could result in electric
shock.
Don't touch the terminals with the power switch kept ON.
Failure to observe this instruction could result in electric shock.
Execute write during PC run (write during run) only when

cyclic operation of main equipment/machine is in shutdown.
Failure to observe this instruction could result in
breakdown of its device(s) and bodily injury from
mis-operation, if any.
In handling the lithium battery, read and observe " Lithium

Battery Handling Cautions " given in this Manual.
Improper handling would cause liquid leak, overheat,
sparking, and fracture, which could then result in
breakdown of units and devices and bodily injury.
ii
Regarding safe-related signals and emergency stop circuit,
etc., handle those signals in external units without
through this system.
Use this product under an environment which meets the

environmental general specification specified in this
Manual.
Don't attach/detach each module to/from its base, with the

power switch kept ON.
Don't touch directly the electronic circuits inside the

module. Failure to observe this instruction could result in
breakdown of the module by static electricity.
The cautions on storage and transportation

1. Please keep this module according to "General
specification."
The memory part is in voltaic state by the internal battery
when an external power supply is not supplied.
However, ambient temperature is -20 - +60 °C.
2. Please remove a battery, when you cannot keep this
module for a long period of time (three months or more) or
you cannot perform storage according to "General
specification."
The ambient temperature in this case is -25 - +70°C.
3. Please do not place this module directly on the thing with
conductivity.
4. Since an electric device is weak to dew condensation,
please avoid dew condensation using a desiccant etc.
iii
The base units that can mount PC10G-CPU or SELECTOR
are as follows. PC10G-CPU and SELECTOR cannot be
mounted in a selector base.
The base units which can mount PC10G-CPU or SELECTOR
Name Type
8-slot base THR-2766
8-slot base2 THR-2872
The slot that can mount PC10G-CPU or SELECTOR is a

"CPU/SEL" slot (refer to the following figure).
PC10G-CPU, SELECTOR and the base unit will break down,
when PC10G-CPU or SELECTOR is mounted in other slots
and a power supply is switched on.
"CPU/SEL" slot
Ex.: 6-slot base
iv
POUR UN FONCTIONNEMENT EN TOUTE SÉCURITÉ
Avant d'installer ou d'utiliser ce produit, d'effectuer des opérations de maintenance ou de

vérification, lisez attentivement ce Manuel pour obtenir un fonctionnement sûr et correct.
Tout opérateur ou technicien concerné par ce produit (automate programmable) doit
prendre connaissance des informations et avertissements relatifs aux appareils et à la
sécurité avant d'utiliser l'appareil ou d'intervenir sur la machine. Les niveaux de sécurité
"AVERTISSEMENT" et "ATTENTION" ont été définis pour ce manuel et les symboles
d'alerte utilisés sont les suivants :
Le non-respect de l'une des consignes peut entraîner des

prudence
blessures ou la mort de l'opérateur.
Le non-respect de l'une de ces consignes peut entraîner

avertissement
des blessures, une détérioration de l'équipement, etc.
 Ne révisez pas le module et ses composants si le

prudence
prudence commutateur est sur marche (ON).
Le non-respect de cette règle peut entraîner un choc
électrique.
 Ne touchez pas aux bornes si le commutateur est placé en

position de marche (ON).
Le non-respect de cette règle peut entraîner un choc
électrique.
 L'écriture pendant le fonctionnement du PC n'est possible que si

le fonctionnement cyclique de la machine/équipement principal
est désactivé.
Le non-respect des consignes peut entraîner une panne du ou
des appareil(s) et des blessures dues à un mauvais
fonctionnement le cas échéant.
 Lorsque vous manipulez la batterie au lithium, lisez et respectez

les "Avertissements relatifs à la manipulation de la batterie"
indiqués dans ce manuel. Une mauvaise manipulation
risquerait de provoquer des fuites, une surchauffe, des
décharges et des fractures susceptibles d'entraîner des pannes
de composants ou d'appareils et des blessures.
v
 Les signaux de sécurité, les circuits d'arrêt d'urgence et autres
prudence
devront être gérés à partir des unités externes et non pas à
partir du système directement.
 Utilisez ce produit dans un environnement conforme aux

spécifications environnementales générales indiquées dans ce
manuel.
avertissement  N'attachez pas et ne détachez pas les modules à/de leur support
lorsque le commutateur est sur la position de marche (ON).
 Ne touchez pas aux circuits électroniques du module directement.

Le non-respect des consignes risquerait d'entraîner une panne
du module à cause de l'électricité statique.
 Précautions de magasinage et de manutention

1. Magasiner ce module conformément aux "Spécifications
générales."
Quand le module n'est pas raccordé à une alimentation
électrique extérieure, la mémoire est maintenue par
l'alimentation fournie par la pile interne.
Magasiner à une température entre -20 et +60 °C.
2. Enlevez la pile du module si celui-ci n'est pas utilisé pendant

une longue période de temps (trois mois ou plus) ou si les
conditions de magasinage ne sont pas celles indiquées dans
les "Spécifications générales".
Dans ce cas, magasiner à une température entre -25 et
+70°C.
3. Ne posez pas le module sur un appareil développant de la

conductivité.
4. Les appareils électriques sont vulnérables à l'humidité (la

condensation) et il est important de prévoir un absorbeur
d'humidité ou autre pour le magasinage.
vi
REVISION HISTORY OF OPERATION MANUAL
Operation manual revision No. is added as a part of Manual No. described on the cover sheet
of the manual.
Operation Manual No.
T-335 * E
N: Japanese E: English
Series No. Revision symbol
Equivalent
Revision Japanese
Date of revision Content of revision
symbol manual
version
1 April 23, 2007 The First edition printed
Error codes of HL and HU are added.
September 5, "RUN relay" explanation correction
2
2007 Correction of “Connector pins configuration” of OUT-28D and
OUT-29D
November 6,
3 “Table of system components” correction.
2007
October 10, Review overall.
4
2008 Compatible with Ver.3.00
November 7,
5 The explanation is added for directive 2006/66/EC
2008
Revision of notices when using the USB cables.
November 3
6 Review of the recommendable USB cables.
2011
Addition of the power source module, POWER2H.
7 May 2012 TOYODA brand logo added on the front cover
2.2.6 Recommended USB cable. Change of TYPE.
8 January 2013
( conventional or equivalent)
Review of the recommendable USB cables.
9.11 BUILT-IN standard MODBUS-RTU (slave) function is added.
9 April 2013 T-33516N
11 Tool is added.
“IN-22H” (THK-6831) module is added.
Addition of FOR SAFETY OPERATION in French.
1.3 Addition of the modules, I/O-328G, ML10, SC10 and CT10.
2.2.6 Addition of the recommendable USB cables.
10 April 2015 7.1 Pollution degree, Overvoltage category, Altitude and T-33517N
Installation are added.
Review of the Overseas corresponding standard
7.3.3 Addition of the module, I/O-328G.
11 October 2018 7.1 A note on power supply is added.
Added notice about slots to install PC10G-CPU and SELECTOR
(FOR SAFETY OPERATION, 2.1.3 Actual mounting of each
12 January 2019 module).
Added a notice label (1.4 Identification(name) and function,
7.6 Selector Module Specification ATTACHMENT 1-1, 1-3).
EtherCAT function is added.
13 January 2021 T-33520N
EtherNet/IP function is added.
21 March 2022 TOYODA brand logo removed
vi
COMPOSITION OF RELATED INSTRUCTION MANUAL
Instruction manual
Name Overview
number
Describes how to prepare sequence program
PC2J/3J series
T-307*N used by PC2J/3J series and how to use
Programming manual
application command.
Describes the handling, function, and
T-754*N PC2J/3J FL/ET-T-V2H
specification of FL/ET-T-V2H.
T-756*N 2PORT-EFR
specification of 2PORT-EFR
T-759*N FE-SWH05/08
specification of FE-SWH05/08
T-755*N FRMT
specification of FRMT
T-326*N EtherCAT function
specification of EtherCAT
viii
Contents
FOREWORD
FOR SAFETY OPERATION
REVISION HISTORY OF OPERATION MANUAL
COMPOSITION OF RELATED INSTRUCTION MANUAL
1. SYSTEM COMPONENTS ..................................................................................................................................1-1

1.1. Features ...................................................................................................................................................1-1
1.1.1. Principal new functions of PC10G-CPU ............................................................................................1-2
1.1.2. CPU version and trouble correspondence list ...................................................................................1-3
1.2. System components .................................................................................................................................1-4
1.3. Table of system components ....................................................................................................................1-5
1.4. Identification (name) and function ............................................................................................................1-8
2. INSTALLATION AND WIRING............................................................................................................................2-1
2.1. Installation ................................................................................................................................................2-1
2.1.1. Environment for installation ...............................................................................................................2-1
2.1.2. Cautions in installing ..........................................................................................................................2-2
2.1.3. Actual mounting of each module .......................................................................................................2-3
2.2. Wiring .......................................................................................................................................................2-4
2.2.1. Cautions in wiring TOYOPUC in general...........................................................................................2-4
2.2.2. Wiring of power module .....................................................................................................................2-6
2.2.3. Wiring for 5V power supply into additional I/O rack...........................................................................2-7
2.2.4. Wiring of SN-I/F, PC link and computer, MODBUS link .....................................................................2-7
2.2.5. Wiring of FL-net / Ethernet / FL-remote ...........................................................................................2-10
2.2.5.1. External Devices Needed for Wiring ........................................................................................2-10
2.2.5.2. When 1:1 Connection is to be Made with Another Node .........................................................2-10
2.2.5.3. When connecting through the relay of HUB ............................................................................ 2-11
2.2.5.4. Construction and laying of cable ..............................................................................................2-12
2.2.6. Notes on USB connection between personal computer and PLC...................................................2-15
2.2.6.1. Prior confirmation for USB connection .....................................................................................2-15
2.2.6.2. Procedure for USB connection between PC and PLC.............................................................2-17
2.2.6.3. Data backup from PC10G without USB communication..........................................................2-18
2.2.6.4. Cause of USB port failure on PLC ...........................................................................................2-20
3. INITIAL SETTING ...............................................................................................................................................3-1
3.1. CPU setting before shipping ....................................................................................................................3-1
3.1.1. Program and parameter ....................................................................................................................3-1
3.1.2. Battery ...............................................................................................................................................3-2
3.1.3. About register clearing .......................................................................................................................3-5
3.2. CPU Setting Procedure ............................................................................................................................3-7
3.2.1. CPU operation mode setting .............................................................................................................3-7
3.2.2. RACK No./SLOT No. when link parameter is set ..............................................................................3-8
3.2.3. Automatic setting of I/O modules and link parameters ......................................................................3-9
3.2.4. Program creating sequence ............................................................................................................ 3-11
3.2.5. Parameter setting ............................................................................................................................3-12
4. TEST RUN ..........................................................................................................................................................4-1
4.1. Check items before test run .....................................................................................................................4-1
5. ERRORS AND REMEDIES ................................................................................................................................5-1
5.1. Error report from CPU ..............................................................................................................................5-1
5.1.1. Error ranks .........................................................................................................................................5-1
5.1.2. Error display.......................................................................................................................................5-2
5.1.3. Displayed errors table ........................................................................................................................5-3
5.1.4. Special register for error information output ......................................................................................5-6
5.1.5. Error-related information (S1000-S11FF) ..........................................................................................5-7
5.1.6. Counteraction against CPU error ....................................................................................................5-10
5.1.7. Self-diagnosis items and presumed (possible) causes ...................................................................5-12
5.1.8. Error check flow chart ......................................................................................................................5-21
5.1.9. I/O module trouble analysis .............................................................................................................5-48
5.2. Error report from COMPUTER-LINK ......................................................................................................5-52
5.2.1. Case of non-response .....................................................................................................................5-52
5.2.2. Case of error response ....................................................................................................................5-53
5.2.3. Other cases .....................................................................................................................................5-56
5.3. Error report from PC-LINK .....................................................................................................................5-57
5.3.1. Error display.....................................................................................................................................5-57
5.3.2. Error check flow chart for PC-LINK .................................................................................................5-62
5.4. Error Codes Used by the FL-net ............................................................................................................5-66
5.4.1. Error Codes .....................................................................................................................................5-66
5.4.2. Error Messages Used by the CPU Module .....................................................................................5-69
5.4.2.1. Special Relays..........................................................................................................................5-69
5.4.2.2. Special Registers .....................................................................................................................5-70
5.5. Warning by the Ethernet.........................................................................................................................5-74
5.5.1. Classification of Errors .....................................................................................................................5-74
5.5.2. Hardware Errors ..............................................................................................................................5-76
5.5.3. Link Parameter Error .......................................................................................................................5-76
5.5.4. Communication Errors .....................................................................................................................5-77
5.5.5. Connection Errors ............................................................................................................................5-80
5.5.5.1. Connection Anomaly Error Code Table ....................................................................................5-81
5.5.5.2. Error Response Data Error Code Table ...................................................................................5-85
5.6. Error reports from FL-remote .................................................................................................................5-86
5.6.1. Error information by CPU ................................................................................................................5-87
5.6.2. Communication Status .....................................................................................................................5-92
5.6.3. Error Contents and Supposed Causes ............................................................................................5-95
6. MAINTENANCE .................................................................................................................................................6-1
6.1. Battery replacement .................................................................................................................................6-1
6.2. Maintenance and check ...........................................................................................................................6-5
7. SPECIFICATIONS ..............................................................................................................................................7-1
7.1. General specification ................................................................................................................................7-1
7.2. CPU module specification ........................................................................................................................7-2
7.2.1. Basic specification of CPU module....................................................................................................7-2
7.2.2. Performance specification .................................................................................................................7-2
7.2.3. Built-in communication ......................................................................................................................7-3
7.2.4. I/O bus ...............................................................................................................................................7-3
7.3. I/O module specification ...........................................................................................................................7-4
7.3.1. Input module specification .................................................................................................................7-4
(1) IN-11 Module (THK-2749)..................................................................................................................7-4
(2) IN-12 Module (THK-2750) .................................................................................................................7-5
(3) IN-22D module (THK-2871) ...............................................................................................................7-6
(4) IN-22H module (THK-6831) ...............................................................................................................7-7
(5) IN-SW module (THK-5977).............................................................................................................. 7-11
7.3.2 Output Module Specification .............................................................................................................7-12
(1) OUT-1 Module (THK-2751) .............................................................................................................7-12
(2) OUT-3 Module (THK-2931) .............................................................................................................7-13
(3) OUT-4 Module (THK-5040) .............................................................................................................7-14
(4) OUT-11 Module (THK-2795) ............................................................................................................7-15
(5) OUT-12 Module (THK-2752) ...........................................................................................................7-16
(6) OUT-15 Module (THK-2790) ...........................................................................................................7-17
(7) OUT-16 Module (THK-2791) ...........................................................................................................7-18
(8) OUT-18 Module (THK-2753) ...........................................................................................................7-19
(9) OUT-19 Module (THK-2754) ...........................................................................................................7-20
(10) OUT-28D Module (THK-2870) .......................................................................................................7-21
(11) OUT-29D Module (THK-5025) .......................................................................................................7-22
7.3.3. I/O module specification ..................................................................................................................7-23
7.3.4. Identification and function of each I/O module component .............................................................7-33
7.3.5. Fuse Specification ...........................................................................................................................7-35
7.4. Base Specification ..................................................................................................................................7-36
7.5. Power Module Specification ...................................................................................................................7-38
7.6. Selector Module Specification ................................................................................................................7-40
7.7. I/O Cable Specification ...........................................................................................................................7-42
7.8. I/O Branch Module Specification ............................................................................................................7-42
7.9. I/O Conversion Cable Specification........................................................................................................7-42
7.10. Selector base specification ..................................................................................................................7-43
7.10.1. Composition example of Selector Base ........................................................................................7-44
7.10.2. Name and function of each portion for Selector Base ...................................................................7-45
7.11. Communication specification ................................................................................................................7-47
7.11.1. COMPUTER-LINK specification (Communication port L3) ...........................................................7-47
7.11.2. PC-LINK specification (Communication port L3) ...........................................................................7-47
7.11.3. SN-I/F specification (Communication port L3) ...............................................................................7-48
7.11.4. FL-net / Ethernet / FL-remote specification ...................................................................................7-48
7.11.4.1. FL-net specification (Port L1, L2) ...........................................................................................7-48
7.11.4.2. Ethernet specification (Port L1, L2) ........................................................................................7-49
7.11.4.3. FL-remote specification ..........................................................................................................7-49
8. CPU FUNCTION ................................................................................................................................................8-1
8.1. CPU Setting Procedure ............................................................................................................................8-1
8.1.1. Separate patterns of program data ....................................................................................................8-2
8.1.2. Program Execution ..........................................................................................................................8-10
8.1.2.1. Arithmetic processing method ..................................................................................................8-10
8.1.2.2. Sub-routine...............................................................................................................................8-12
8.1.2.3. Interruption program (constant cycle interruption) ...................................................................8-13
8.1.2.4. Constant scan function.............................................................................................................8-16
8.1.3. Inter-program data utilization ...........................................................................................................8-17
8.2. User memory data ..................................................................................................................................8-20
8.2.1. Parameter ........................................................................................................................................8-20
8.2.2. Program capacity/data capacity ......................................................................................................8-20
8.2.3. I/O address table .............................................................................................................................8-21
8.2.3.1. PC3JG/PC10 standard mode(~Ver.2.04) .................................................................................8-21
8.2.3.2. PC10 mode(Ver.3.00~) ............................................................................................................8-22
8.2.4. Ex number .......................................................................................................................................8-24
8.2.5. Table of special relays .....................................................................................................................8-28
8.2.6. Table of special registers .................................................................................................................8-48
8.3. Index function and indirect address .......................................................................................................8-59
8.3.1. Index register ...................................................................................................................................8-59
8.3.1.1. Command for index register operation (newly added) .............................................................8-59
8.3.1.2. Example of substitute of indirect designation ..........................................................................8-59
8.3.1.3. Index register offset designation ..............................................................................................8-60
8.3.1.4. Use of index register on contact and coil .................................................................................8-60
8.3.1.5. Pre/Post increment/decrement function ...................................................................................8-60
8.3.1.6. Circuit monitor of circuit using index register ...........................................................................8-61
8.3.1.7. Specification in detail................................................................................................................8-61
8.3.1.8. List of address addition and subtraction value for pre/post increment and decrement ...........8-65
8.3.2. Indirect addressing ..........................................................................................................................8-80
8.3.2.1. Indirect addressing ...................................................................................................................8-80
8.3.2.2. Method of expressing byte address .........................................................................................8-82
8.4. Command words ....................................................................................................................................8-83
8.4.1. Conventional instruction word .........................................................................................................8-83
8.4.2. Application command dedicated to PC10G (Ver 3.00 and over) .....................................................8-94
8.4.2.1. Timer command (1ms 1s) ........................................................................................................8-94
8.4.2.2. Inversion coil ............................................................................................................................8-95
8.4.2.3. Signed calculation ....................................................................................................................8-95
8.4.2.4. PID command ..........................................................................................................................8-96
8.4.2.5. Floating point command ...........................................................................................................8-97
8.4.2.5.1. Floating point command list................................................................................................8-97
8.4.2.5.2. Internal Expression of Floating point number.....................................................................8-99
8.4.2.5.3. Data format detail of floating point number command .....................................................8-100
8.4.2.5.4. Four arithmetic operations specification of floating point number command ...................8-102
8.4.2.5.5. Lineup on data register of floating point number command .............................................8-103
8.4.2.5.6. How to use........................................................................................................................8-104
8.4.3. Application command for layered communication(Ver3.30~) ........................................................8-137
8.5. Equipment Information Memory ...........................................................................................................8-144
8.6. Backup function ....................................................................................................................................8-145
8.6.1. Backup function of data memory ...................................................................................................8-145
8.6.2. Flash register .................................................................................................................................8-146
8.6.2.1. Setting of communication with PCwin ....................................................................................8-146
8.6.2.2. About flash register ................................................................................................................8-146
8.6.2.3. Difference between flash register and some other register ...................................................8-147
8.6.2.4. Example of application ...........................................................................................................8-147
8.6.2.5. FR register address list ..........................................................................................................8-148
8.6.2.6. Command dedicated to FR register erasing and writing........................................................8-149
8.7. Writing while PLC is running ................................................................................................................8-151
8.8. Library function .....................................................................................................................................8-153
8.9. SFC ......................................................................................................................................................8-153
9. LINK FUNCTION ................................................................................................................................................9-1
9.1. Setting link parameters.............................................................................................................................9-1
9.2. Data link area ...........................................................................................................................................9-2
9.3. Commands ...............................................................................................................................................9-4
9.3.1. Computer Link commands .................................................................................................................9-4
9.4. Special Relays and Special Registers ......................................................................................................9-6
9.5. Built-in COMPUTER LINK function ..........................................................................................................9-9
9.5.1. Specification.......................................................................................................................................9-9
9.5.2. Setting link parameters ....................................................................................................................9-14
9.5.3. Newly added PC10G computer link command................................................................................9-15
9.6. Built-in PC-LINK Function ......................................................................................................................9-17
9.6.1. Specification.....................................................................................................................................9-17
9.6.2. Outline of PC-LINK operations ........................................................................................................9-20
9.6.3. PC operation timing .........................................................................................................................9-23
9.6.4. Separate Function ...........................................................................................................................9-24
9.6.5. PC-LINK communication reset ........................................................................................................9-26
9.6.6. PC-LINK status ................................................................................................................................9-29
9.6.7. Setting link parameters ....................................................................................................................9-32
9.7. Built-in FL-net Function ..........................................................................................................................9-38
9.7.1. Specifications for the FL-net ............................................................................................................9-38
9.7.2. Specifications for Data Link .............................................................................................................9-38
9.7.3. Data Link Method.............................................................................................................................9-39
9.7.4. Caution in Using I/O (X/Y) Area in Communication Area ................................................................9-40
9.7.5. Message Server Function................................................................................................................9-41
9.7.6. Message Client Function .................................................................................................................9-41
9.7.7. Node Status Loading Function ........................................................................................................9-41
9.7.8. Monitor Function ..............................................................................................................................9-42
9.7.9. Communication response time of FL-net ........................................................................................9-43
9.7.10. Initial Settings of the FL-net ...........................................................................................................9-44
9.7.10.1. Initial Setting Procedure .........................................................................................................9-44
9.8. Built-in Ethernet function ........................................................................................................................9-64
9.8.1. Specifications for the Ethernet .........................................................................................................9-64
9.8.2. Communication with Computer Link Method ...................................................................................9-64
9.8.3. Communication with File Memory Method ......................................................................................9-65
9.8.4. PING Test Function..........................................................................................................................9-66
9.8.5. PING Test Procedure .......................................................................................................................9-66
9.8.6. Status Monitor Function ...................................................................................................................9-67
9.8.7. Ethernet communication processing time .......................................................................................9-68
9.8.8. Initial Settings of the Ethernet..........................................................................................................9-70
9.8.8.1. Initial Setting Procedure ...........................................................................................................9-70
9.8.9. PC10G newly added ........................................................................................................................9-85
9.8.9.1. Ethernet command ...................................................................................................................9-85
9.8.9.2. Built-in Ethernet Simultaneous opening function of 32 ports ...................................................9-91
9.8.9.2.1. Built-in Ethernet Simultaneous opening function of 32 ports .............................................9-91
9.8.9.2.2. File memory address map (32-port expansion area) .........................................................9-92
9.9. SN-I/F Function ....................................................................................................................................9-104
9.10. Built-in FL-remote M function .............................................................................................................9-106
9.10.1. Order of Power on ....................................................................................................................... 9-110
9.10.2. Communication Reset ................................................................................................................. 9-111
9.10.3. Unlinking Function ....................................................................................................................... 9-112
9.10.4. Communication data response time ............................................................................................ 9-114
9.10.5. Parameter Setting ........................................................................................................................ 9-115
9.10.5.1. I/O Module Setting ............................................................................................................... 9-115
9.10.5.2. Link Parameter Setting ........................................................................................................ 9-116
9.10.6. COLLECTION OF DIAGNOSIS DATA ........................................................................................9-120
9.10.6.1. Collection of Diagnosis Data by Link Parameter .................................................................9-121
9.10.6.2. General-purpose Status .......................................................................................................9-122
9.10.6.3. Error Record Reset / Arbitrary Reading Switch Format .......................................................9-123
9.10.6.4. Diagnosis Data Map .............................................................................................................9-123
9.11. BUILT-IN standard MODBUS-RTU (slave) function ...........................................................................9-126
9.11.1. MODBUS-RTU specification ........................................................................................................9-126
9.11.2. Set link parameter ........................................................................................................................9-129
9.12. EtherCAT Function .............................................................................................................................9-130
9.13. EtherNet/IP Function ..........................................................................................................................9-131
9.13.1. Outline .........................................................................................................................................9-131
9.13.2. EtherNet/IP specification .............................................................................................................9-132
9.13.2.1. EtherNet/IP ...........................................................................................................................9-132
9.13.2.2. EtherNet/IP communication specification ............................................................................9-132
9.13.3. IO communication function ..........................................................................................................9-134
9.13.4. How to configure EtherNet/IP ......................................................................................................9-139
9.13.4.1. Link parameter setting..........................................................................................................9-139
9.13.5. Status ...........................................................................................................................................9-160
9.13.5.1. Special register for link .........................................................................................................9-160
9.13.5.2. Special relay .........................................................................................................................9-163
9.13.6. Communication reset ...................................................................................................................9-164
9.13.7. Disconnection function ................................................................................................................9-166
9.13.8. Input/Output setting at an error....................................................................................................9-168
9.13.9. Difference from earlier communication modules .........................................................................9-170
9.13.10. Connection examples ................................................................................................................9-171
9.13.10.1. Connection example 1 of instance ID communication .......................................................9-171
9.13.10.4. Connection example of cases where multiple connections are used ................................9-177
9.13.10.5. Connection example 1 of tag communication ....................................................................9-181
9.13.10.6. Connection example 2 of tag communication ....................................................................9-183
9.13.10.7. Connection example 1 of multicasting ...............................................................................9-184
9.13.10.8. Connection example 2 of multicasting ...............................................................................9-187
9.13.10.9. Connection example to a third-party's scanner..................................................................9-190
9.13.10.10. Connection example of third-party's adaptor ...................................................................9-192
10. Display ............................................................................................................................................................10-1
10.1. Operation status monitor ......................................................................................................................10-1
10.2. Error code monitor................................................................................................................................10-1
10.3. Link communication status monitor ......................................................................................................10-2
11. Tool ................................................................................................................................................................. 11-1
11.1. I/O Operation Panel ............................................................................................................................. 11-1
11.2. I/O Check (for Output) .......................................................................................................................... 11-2
ATTACHMENTS 1 DIMENSIONAL OUTLINE DRAWING............................................................................... At1-1
ATTACHMENT 1-1 CPU Module .............................................................................................................. At1-1
ATTACHMENT 1-2 Power modul ............................................................................................................. At1-2
ATTACHMENT 1-3 Selector modul .......................................................................................................... At1-3
ATTACHMENT 1-4 I/O modul ................................................................................................................... At1-4
ATTACHMENT 1-5 Base Exterior dimensions/Setting length .................................................................. At1-5
ATTACHMENTS 2 .............................................................................................................................................. At2-1
ATTACHMENT 2-1 Module type identification code ................................................................................ At2-1
ATTACHMENT 2-2 Current consumption of various modules (Typ.) ....................................................... At2-3
ATTACHMENT 2-3 Error in self-contained clock ..................................................................................... At2-4
ATTACHMENT 2-4 Hexadecimal system ................................................................................................. At2-5
1. SYSTEM COMPONENTS
1.1. Features
TOYOPUC-PC10G series is a programmable controller that has high-speed operated CPU function,
mass memory and variegated communication function.
(1) Efficient CPU function

1
Processing speed of basic commands at 0.015 µs/word (min) and that of applied commands at 0.05
µs/word (min) faster than those in PC3JG allow high speed processing of versatile sequence
programs such as "equipment control", "equipment diagnosis", “information processing", etc.
The following functions are added to PC10G, in addition to PC3JG series.
1) Sequence regular cycle interruption function
2) Constant scan function
The following function is added from Ver.3.00. *1
3) Expansion of calculation function
(index register, calculation with sign, floating point calculation, etc)
(2) Mass memory

The memory area of the register etc. has been expanded. *1
The equipment information memory is enhanced to 4MB.
(3) Variegated communication function

L1 and L2 incorporate FL/ET/FL-remote M of 2 ports capable of 100M communication.
L3 can choose either one port of CMP link (computer link) or PC link or SN-I/F MODBUS*2.
*1 Applies to PC10 mode.

PC10 mode can be used from version 3.00 of PC10G-CPU.
 PC10 mode : Mode to which Ver.3.00 of PC10G-CPU corresponds.
Upward compatible of PC10 standard mode
 PC10 standard mode : Mode to which Ver.2.** of PC10G-CPU corresponds.
Equivalent to PC3JG dividing mode.
PC10G-CPU
Addition of function
PC10
1. Memory area expansion
2. Program capacity selection mode Ver. 3.00
3. Calculation function expansion
4. Incorporated Ethernet compatible
with 32 ports PC10
standard Ver. 2.**
Equivalent to PC3JG mode
dividing mode
*2 MODBUS-RTU is the function added to PC10G Ver3.30.
1-1
1.1.1. Principal new functions of PC10G-CPU
Version
No. Function Description Reference
Ver2.** Ver3.**
PC3JG compatible sequence
1   Sequence of PC3JG can be used. 3.2.1
calculation function
Sequence constant cycle Constant cycle interruption settable in milliseconds can
2   8.1.2.3
interruption be set by 4 at the maximum.
Constant scan function Scanning time of program can be made constant.
3   8.1.2.4
(Setting range: 1 - 99ms)
4 Register clearing function   Register can be cleared easily by switch operation. 3.1.3
Addition of 0.1ms timer (S025) 0.1ms-timer asynchronous with scan (S025: special
register) was added.
5   8.2.6
Set to 0 when power is turned on, and operates in
0.1ms.
Equipment diagnosis (trouble) Direct monitor
Equipment trouble function of direct monitor can be
6 function   operation
used. manual
Program resetting function (test When the circuit is corrected in test mode of PCwin, it PCwin
7 mode)   is possible to reset to the original circuit operation
instantaneously. manual
Scan unit trace in high-speed Even if the scan time of CPU is high speed, it is PCwin
8 scanning   possible to monitor the time chart per scan by use of operation
(scanning unit time chart monitor) PCwin. manual
PCwin
It is possible to read the output signal data always
9 I/O recorder function   operation
sampled by PLC by use of PCwin. manual
Equipment information memory can save information
Equipment information
10   helpful for adjusting and maintenance of equipment 8.5
memory expansion (4 Mbytes)
such as comment, project, SFC, and IO drawing.
Expanding the basic area from each program 8KW to
Basic area expansion
32W (3JG dividing mode ratio)
11 Expands the extended data -  8.2
Expanding the extended data register U from 32KW to
register U.
128KW (3JG dividing mode ratio)
Memory area expansion
Expanding the extended buffer register from 128KW to

256KW (3JG dividing mode ratio). Also it is made
possible to specify directly to each operand of contact,
12 Extended buffer register (EB) -  8.2.3
coil, and application command. Access used to be
possible conventionally only by dedicated application
command.
Large capacity of extended flash register 2000KW can
be used. Direct designation is allowed the same as EB.
In addition, when dedicated application command is
used it is possible to transfer the content of flash
13 Flash register (FR) -  register to flash memory, and retain data without 8.6.2
battery.
Flash register has a specification different from some
other register.
Understand it well enough before use.
14 CPU trouble history expansion -  Expanding CPU trouble history from 8 to 64 items. 5.1.4, 5.1.5
Program capacity is variable as follows:
3.2.1,
P1: 60KW P2:60KW P3:60KW
15 Program capacity selection -  3.2.4(a),
P1:120KW P2:60KW P3: 0 KW
8.1.1, 8.2.2
P1:180KW P2: 0KW P3: 0KW
Indexing function is for indirectly designating an
Multi calculation function expansion
address by use of index register (IXO - IXF). It takes

16 Index register -  8.3.1
place of conventional indirect address, and allows
easier programming and improves visibility.
Calculation provided with a sign can be specified to
17 Calculation provided with sign -  8.4.2
four arithmetic operations and comparison of BIN type.
18 Timer command (1ms, 1s) -  1ms-timer and 1s-timer command are added. 8.4.2
Coil for inversing the output is added when condition is
19 Inversion coil -  8.4.2
satisfied.
Multi-function calculation
command (trigonometric
20 -  Multi-function calculation command is added. 8.4.2
function, Log, floating point,
PID, etc)
Incorporated Ethernet
Incorporated Ethernet allows simultaneous opening of
21 Simultaneous opening function of -  9.8.9.2
32 ports.
32 ports
1-2
1.1.2. CPU version and trouble correspondence list
CPU version*
No. Description
2.01 2.02 2.03 2.04 2.05 3.00
Response to hardware malfunction of Ethernet of
1 incorporated communication when reset and start are ×     
repeated.
Response to malfunction found when library call command
2
[SYS 432] is used.
×     
Response to byte number setting error by incorporated
3
FL-remote controller slave
×     
Response to communication error when power is turned on
4 in 10Mbps communication setting of incorporated FL-remote ×     
controller
Response to phenomenon that the input to slave provided
5 with no breakoff turns off in breakoff by incorporated ×     
FL-remote controller.
Response to application command error of JIS code
6
conversion command
× ×    
Response to phenomenon that the event monitor does not
7
start when power is turned on
× ×    
Response to phenomenon that comparison command
8
directly below FB is not calculated properly
× ×    
When read/write command of 1006 or more bytes is sent by
9
Ethernet of incorporated port, error 78/84 occurs.
× × ×   
For an opening request after resetting by the other party via
10 Ethernet, resetting is returned and opening is impossible × × ×   
sometimes.
When power for the mating parent station turns off on PC
11
link, hardware error 84 may occur.
× × ×   
When incorporated FL-net turns off or on, error 84 may
12
occur.
× × ×   
RES (reset) and JPI (jump initial) may not operate under
13
process control of SFC.
× × ×   
Year and month are exchanged when transferring the time B
14
on the event monitor.
× × × ×  
Update timing of V78 (clock per scan) is different between
15
PC3J series and PC10 series.
× × × ×  
*CPU version is affixed to the front of CPU module.
1-3
1.2. System components
Example of system
PCwin (Ver. 8.00~)

Direct Monitor etc.
Ethernet
10/100M USB（HS:480Mbps/FS:12Mbps)
FL-Remote
10/100M SN-I/F
TOYOPUC-PCS
FRMT
1-4
1.3. Table of system components
* Motion controller (AF1K-C and MA1K-C) cannot be used for basic rack of this CPU.
Use for additional rack.
Equipment,
Name Type Specification
device
Memory 180K word (60×3)
PC10G-CPU TCC-6353 PC / CMP / SN-I/F 1-port,
PC10G FL-net/Ethernet/FL-remote M 2 ports
Battery TIP-5426 Battery for PC10G backup
Connector for
external connection For 40 pin square shape connector soldering
Connector TIP-5867
for I/O-328G and 40pin resin case (Set of two connectors)
I/O-329G
Selector SELECTOR THU-2765
POWER1 THV-2747 AC85~264V input,DC5V 4A output
Power unit POWER2 THV-2748 DC24V input,DC5V 4A output
POWER2H THV-6374 DC24V input,DC5V 5A output
8-slot base2 THR-2872 I/O connector 2 pieces
Base 6-slot base THR-2813
Selector function internally stored dedicated base for 8
8 slot selector base THR-5643
slots increasing
Selector base 6 slot selector base THR-5644
slots increasing
4 slot selector base THR-5645
slots increasing
I/O cable 0.5m THY-2770
I/O cable
I/O cable 1m THY-2771
For additional base when other than 8-slot base 2 is
I/O branch module THU-2774
used.
IN-11 THK-2749 16 points AC100V input
IN-12 THK-2750 16 points DC24V input
Input IN-22D THK-2871 32 points DC24V input , D-sub connector

32 points DC24V high-speed input , screwless terminal
IN-22H THK-6831
block connector
IN-SW THK-5977 16 points input of switch
OUT- 1 THK-2751 8 points triac output, 1A/point, 4A/8 points
OUT- 3 THK-2931 8 points, relay independent contact output (AC240/DC24V) 2A/point
OUT- 4 THK-5040 8 points triac output, 1A/point, 4A/8 points, AC100/240V
OUT-11 THK-2795 16 points triac output, 0.5A/point, 2A/8 points
Output
OUT-12 THK-2752 16 points, relay contact output, 2A/point, 5A/8 points
OUT-15 THK-2790 16 points MOS-FET output (-) common , 1A/point, 4A/8 points
OUT-16 THK-2791 16 points MOS-FET output (+) common , 1A/point, 4A/8 points
OUT-18 THK-2753 16 points, transistor output (-) common, 0.5A/point, 2A/8points
1-5
OUT-19 THK-2754 16 points, transistor output (+) common, 0.5A/point, 2A/8points
OUT-28D THK-2870 32 points transistor output (-) common , 0.2A/point, 2A/16 points
Output
OUT-29D THK-5025 32 points transistor output (+) common , 0.2A/point, 2A/16 points
Input 32 points (5mA) Output 16 points(-) common (0.3A)
I/O-328G THK-6905
+Output 16 points (-) common (0.05A)
I/O
Input 32 points (5mA) Output 16 points(+) common (0.3A)
I/O-329G THK-6410 +Output 16 points (+) common (0.05A)
Select a function from PC LINK/Computer link/2 PORT
M-NET/MODBUS/SIO
Multi-Link ML10 TCU-6903
PC/CMP-LINK、2 PORT-LINK PC/CMP2-LINK、2 PORT
ML10 is a succeeding model of M-NET
RS-232C 0.3～115.2Kbps 2ch
SC10 TCU-6904
Serial I/O SC10 is a succeeding model of SIO
SIO THK-2782 RS-232C 0.3~19.2Kbps 2ch
PC1 bus
PC1-I/O-I/F THK-2783 For PC1 bus coupling
interface
PC10 mode：subject to DC Input 200kpps，subject to
differential Input 8Mpps 1 and 2 phase
High speed CT10 TCK-6856 Conventional mode：subject to DC Input 50kpps 1 and
counter 2 phase
CT10 is a succeeding model of COUNTER
COUNTER THK-2932 50kpps 1 and 2 phase
Pulse output PULSE OUTPUT THK-5109 245, 730pps forward pulse /reverse pulse
AD-1 THK-7936 1~5V,4~20mA,4 points
AD-2 THK-7937 1~10V,4 points
Analog input
AD-3 THK-7938 0～5V、0～20mA, 4point
-10~+10V,0~+10V,0~+5V,
AD10 TCK-6529
+1~+5V,0~20mA,4~20mA
DA-1 THK-7931 1~5V,4~20mA,2 points
Analog output
DA-2 THK-7932 1~10V,2 points
PC/CMP link PC/CMP-LINK THU-2755 PC link (19.2/57.6 Kbps,16 ST, 512 points) 2 ports
or computer link (selection of 0.3~19.2Kbps
2-port link 2 PORT-LINK THU-2927 32 stations) 2 ports
4-wire communication available , subject to same
PC/CMP2 link PC/CMP2-LINK THU-5139
specification as PC/CMP link.
2-port M-NET 2 PORT M-NET THU-5093 M-NET SPEC.(8 stations, 256 points) 2 ports
High speed PC
link
HPC-LINK THU-2758 625Kbps, 32 stations, 2048 points, 1792 bytes
High speed
remote I/O, host
RMT-I/O M THU-2756 HOST, 625Kbps, 2048 points, max. 31 stations
High speed
remote I/O, slave
RMT-I/O S THU-2757 Slave station
FL-net FL-net, I/F (interface) for Ethernet (Corresponding to
FL/ET-T-V2H THU-6289
Ethernet 100Mbps)
J-DLNK-M THK-5398
D link master Master module conforming to DEVICENET
J-DLNK-M2 THU-6099
Slave module conforming to DEVICENET
J-DLNK-S THU-5441
(It mounts in a CPU slot)
D link slave
Slave module conforming to DEVICENET
J-DLNK-S2 THU-5563
(It mounts in a I/O slot)
S-Link S-LINK THU-5291 I/F for SUNKS S-LINK
B7A-Interface B7A-I/F THU-5297 I/F for OMRON B7A 10 Input Points Type
1-6
Sub CPU SUB-CPU THC-5058 Memory 16K words, SIO function built in
Equipment, device Name Type Specification
2port
2 PORT-EFR TCK-6404 FL-net, Ethernet, FL-remote (2 ports)
FL/ET/RMT
FE-SWH05 TCU-6414 5 ports switching HUB
Switching HUB
FE-SWH08 TCU-6415 8 ports switching HUB
FL-Remote I/O FRMT-32/00P TCU-6405 FL-remote terminal Input 32 points

terminal with FRMT-00/32P TCU-6406 FL-remote terminal Output 32 points
diagnosis
FL-remote terminal
function FRMT-16/16P TCU-6407
Input 16 points Output 16 points
 For the details of special module and programmer, see the respective individual Instruction Manuals.
Equipment, device Name Type Specification

Software for
than Ver. 8
PC10G
greater
PCwin
Programming software (CD-ROM version) for

Programmer (for Windows2000/ TJA-2032
SFC : Japanese
XP/Vista/7)
*1
*1 The connecting cable between an Peripheral equipment connector and a personal computer and
between an EXT connector and PC10G should use the USB(type A, male)-USB(type B, male) based
on USB2.0.
Please refer to "Chapter 2 Installation and wiring" for the connection method.
Please refer to Section 2.2.6
1-7
1.4. Identification (name) and function
PC10G-CPU
POWER RUN E/A (1) Display
W
P2 P3
L1 L2
L3
(2) Display mode
(9) Battery replacement label BATTERY change-over switch
TIP-5426 MODE
1st./
2nd./ (3) Peripheral I/F
(11) Notice Label I/F
FL
L1 ET (4) L1/L2 communication
RMT
FL
status display LED
L2 ET
RMT
L1 Auto 10M
(5) L1/L2 communication
L2 Auto 10M selector switch
L1 SEL. DM
(10) Version label L3 T-ON T-OFF
*.** (6) RESET/START switch

START
RESET
L1
L3
(12) L1/L2 communication (7) L3 communication status
connector L3 display LED
0V
L2 L-
(8) Connector for L3
L+
SN/PC/CMP
No. Name Contents

(1) Display
Shows that 5V-power is supplied to the base unit
PC10G-CPU correctly.
POWER lamp
This lamp is turned off if the instantaneous power
POWER RUN E/A
shut-down is detected.
W
P2 P3 Shows that the sequence program (program 1) is
L1 L2 running.
RUN lamp
L3 This lamp is linked with the RUN relay output of the
power supply module.
Lit or flashes if a serious/minor error or alarm occurs.
E/A Lit: Serious/minor error or alarm, Flashing: Serious
error
W Lit while the data is being written into the flash memory.
P2 Lit while the program 2 is running.
P3 Lit while the program 3 is running.
L1 Lit while the L1 status is being shown on the display.
Status display
7-segment RUN: Segment rotates like “8”.
display Serious/minor error or alarm: Relevant code is shown.
(Refer to 5. Error report for descriptions of display)
(2) Display mode change-over When pressing this switch, the contents shown on the 7-segment
switch display are changed.
(3) Peripheral I/F Data is communicated with PCwin through USB 2.0 (High speed:
480Mbps/Full Speed: 12Mbps).
(4) L1/L2 communication FL: Lit when FL-NET is selected.
status display LED ET: Lit when Ethernet is selected.
RMT: Lit when FL-remote is selected. Flashing when EtherCAT-M
is selected.
1-8
No. Name Contents
(5) L1/L2 communication Built-in link settings
selector switch a. Switching of baud of port L1
When turned on, the data is communicated by auto negotiation.
a. L1 Auto 10M When turned off, the data is communicated at 10Mbps.
b. L2 Auto 10M
c. L1 SEL. DM b. Switching of baud of port L2
d. L3 T-ON T-OFF
When turned on, the data is communicated by auto negotiation.
ON OFF When turned off, the data is communicated at 10Mbps.
c. When the switch is OFF (DM), the port L1 starts communication
automatically with the direct monitor without the need of setting
parameter. *1
When the switch is on (L1 SEL), it is allowed to set any
parameter on L1.
d. When using SN-I/F, set T-ON.
For PC link and CMP link, set T-OFF.
(6) RESET/START switch When the switch is flipped to the “RESET” side, the CPU enters
the reset status, the external output and internal relay are turned
OFF, and the program operation is stopped. When the switch is
flipped to the “START” side in the program stop status, the
program starts running. When the CPU is stopped by the stop
signal sent from the peripheral device, the program does not start
running.
(7) L3 communication status Flashes while the link 3 is communicating.
display LED (Lit when the communication signal level is “High”.)
(8) Connector for L3 PCS-I/F, computer link, PC link, MODBUS.*2
Recommended crimping terminal: AI0.5-10WH (manufactured by
Phoenix contact.)
(9) Battery replacement label Write the date when the built-in lithium secondary battery is
replaced.
(10) Version label Shows the software versions.
(11) Notice Label This label describes notice on mounting on the base unit (Added
from shipment after February 2019).
It is prohibited to mount PC10G-CPU to other than the CPU/SEL
slot of the base unit.
1-9
(12) L1/L2 communication a. Hardware status is shown.
connector Lit in green: Hardware is correct.
a Lit in red.: Hardware error occurs.
Off: Program is not running.
b b. Communication status is shown.
 Ethernet/FL-net
Lit in green: 100Mbps-communication is being established.
Flashing in green. Communicating at 100Mbps.
Lit in orange: 10Mbps-communication is being established.
Flashing in orange. Communicating at 10Mbps.
Lit in red.: Link parameter error
Flashing in red.: Connection error/link communication error
Off: Cable is not connected.
 FL-remote
Lit in green. Remote operation is running.
Flashing in green. FL is entering.
Lit in red.: Link parameter error
Flashing in red.: Communication error
Flashing in green and red.: Setting error
Off.: Cable is not connected.
Flashing in red.: Communication error
Off.: Cable is not connected.
*1 When connecting with the direct monitor set the communication switch to "DM".
Can be connected to direct monitor even if link and parameter are not set. (See "9.1 Setting of link
parameter".)
*2 MODBUS-RTU is the function added to PC10G Ver3.30.
1-10
2. INSTALLATION AND WIRING
This Section describes the installing and wiring procedures and related cautions.
2.1. Installation
2.1.1. Environment for installation
Avoid installing the PC at the following environments.
(1) Place where ambient temperature exceeds the range of 0 to 55°C.
(2) Place where ambient humidity exceeds the range of 30 to 85% RH.
2
(3) Place where rapid temperature fluctuation results in dew condensation.
(4) Place where corrosive gas and combustible gas exist inevitably.
(5) Place where conductive powders such as dust, iron powder, etc., oil mist, salt content,
and organic solvent exist much.
(6) Place where strong electric field and strong magnetic field generate.
(7) Place where the product is exposed to direct sun ray.
(8) Place where vibration and impact are transferred to the product (PC).
When use environment is the above, please contain this equipment to the control box sealed in order
to maintain good installation environment. Please do not keep the door of a control box opened wide.
Moreover, when you use a fan etc. within a control box, please install so that a direct wind is not in
charge of this equipment.
Please be careful in order to cause an unexpected situation, when a coarse particulate adheres to the
portion equivalent to which a wind is directly so much.
2-1
2.1.2. Cautions in installing
(1) For smooth drafting or easy module replacement, keep a space of at least 50mm between upper
module/lower module and other structures and parts, as illustrated below.
(2) Absolutely avoid using modules in vertical position and horizontal position.
The use in such positions causes poor drafting in modules.
2-2
2.1.3. Actual mounting of each module
(1) How to mount onto the base
1. Insert module's fixing claw in the lock (receptacle) hole of the base.
Note) It is prohibited to mount PC10G-CPU and SELECTOR to other than the CPU/SEL slot of the
base unit.
2. For mounting, push-in the module in arrow direction until it clicks.

Check the claw and hook for exact insertion in the hole. Failure to fix exactly the module could
cause operation error. Caution it! Particularly when this PC is used at an environment where it
is exposed to significant vibration and shock, please screw each module to the base. (Screw size:
M3 × 8, with washer)
These screws are not included in each module. Prepare them at user side.
(2) How to remove module

1. Remove the screw of the module base.
2. Push down the upper hook of each module until it comes to end.
3. Draw the module frontward to remove it from the base, with its bottom supported, while pushing
down its hook.
2-3
2.2. Wiring
2.2.1. Cautions in wiring TOYOPUC in general
This paragraph describes the cautions to be observed in wiring of power cable or I/O cable, etc.
Please do not do wiring that it suffers stress to the terminal stand and the connector, etc. after it wires
for the power supply line or the I/O line and the communication line, etc. Wiring might cause the gap
and the damage of the equipment.
(1) In wiring, separate the power line to the PC body (power module) from the power line to I/O
devices and main circuit devices respectively.
Main power source
I/O
PC Power source Main circuit
Power source Power source
Additional rack
PC body Main circuit devices
(POWER1) I/O devices
(2) Select and use low-noise power cables between cables and between cable and ground.
When these lines are very noisy, connect an insulated transformer to these lines.
I/O
PC body devices
Insulated transformer
(3) Isolate the I/O signal line from main circuit line of high voltage and large current as far as possible.
(Keep a space of 100mm min between these two.) Avoid parallel wiring of these if possible.
2-4
(4) Isolate DC24V I/O cable from AC100V cable.
(5) The recommended cable for I/O signal is as follows.

Recommended The permissible current capacity of
Terminal block
cable size cable differs depending on ambient
2
19P 0.5mm temperature, insulator thickness, etc.
(6) Use of the following crimp terminals is recommended.

Manufacturer Type
JAPAN Eyelet terminal 0.5 - 3.7, 1.25 - M3, 2 - S3
SOLDERLESS Rectangular end-open terminal 1.25 - YS3A, 2 - YS3A
TERMINAL Vinyl-insulated
TRADING V0.5 -3.7, V1.25 - M3, V2 - S3
eyelet terminal
COMPANY LTD. Vinyl-insulated
V1.25 - YS3A, V2 - YS3A
rectangular end-open terminal
PHOENIX CONTACT For single insertion AI0.5-10GY
Electric wire size For double insertion AI-TWIN2X0.5-10GY
Terminal for 0.75sq Dedicated crimping tool CRIMPFOX ZA3 or CRIMPFOX UD63
(7) Wire the I/O signal cables using another duct separately from main circuit cable, whether inside
or outside the control panel. In the case of pipe wiring, install a pipe in Class-D grounding.
(8) When wiring by use of same duct is inevitable, use a batch-shielded cable and connect its shield
end to FG terminal of NC rack or an earth block of the control panel.
(9) Output short-circuit protection

The output module self-contains a fuse to protect itself from burning should a load be
short-circuited. But this fuse can not protect the output module from overload.
Therefore, use the output module within the ratings without fail.
(10) Parallel connection of loads

The number of loads which can be driven in parallel by the output module is determined by the
starting current and rated current of loads actuated simultaneously.
Therefore, connect the loads so that the starting current does not exceed the fuse rating and, in
addition, the rated current does not exceed the rated output current (per point) of the output
module. Table below shows the reference number of loads for which parallel drive by OUT-1 is
available.
Manufacturer Type Quantity

SRCa3631-0 4
FUJI
SRC3631-5-2 3
ELECTRIC
SRCa3631-2 2
CO., LTD.
SC-4 1
Note: Use auxiliary relay for a load which exceeds the ratings.
(11) Do not string a strong cable in 50mm zone from CPU module front.
Primary wiring
(Class-D grounding)
(12) FG connection
Control panel
FG terminal is provided on 5V terminal block of each base.
When additional base is installed, connect FG to one FG terminal. BASE
Perform wiring directly to the D-grounded earth block from each base with an electric wire
FG above
2mm2.
When additional base is installed, connect FG to one FG terminal. BASE
FG
Earth block
2-5
2.2.2. Wiring of power module
AC1 0.75 or 1.25 sq twist
or
DC+ AC85-264V(POWER1)
IN or
AC2 DC18-32v(POWER2 / POWER2H)
or
DC-
0.75 or 1.25 sq twist

RUN1
To sequence control circuit

RUN2
* For wiring to the terminal block, use crimp terminal (Eyelet or Y-shaped terminal for M3) without fail.
Ex. Proper connection AC100V(POWER1)

DC24V (POWER2)
AC100V(POWER1)
DC24V (POWER2H)
DC24V (POWER2)
DC24V (POWER2H)
CPU rack Additional

CPU rack Additional I/O rack
I/O rack
I/O cable
5V, 0V wiring
I/O cable (twist pair cable)
Ex. Improper connection
AC100V(POWER1) AC100V(POWER1) AC100V(POWER1)

DC24V (POWER2) DC24V (POWER2) DC24V (POWER2)
DC24V (POWER2H) DC24V (POWER2H) DC24V (POWER2H)
CPU rack Additional CPU rack Additional

I/O rack I/O rack
I/O cable I/O cable
Avoid wiring another power cable Avoid supplying the power into the power
separately from additional I/O rack. module of CPU rack, with I/O cable wired
between additional racks, without supplying the
power into the power module of additional
rack. When connecting I/O cable of additional
rack, exactly wire the power cable to the power
cable to the power module.
2-6
2.2.3. Wiring for 5V power supply into additional I/O rack
Where more than 8 additional I/O modules, etc. in total are used, it is possible to operate PC by
supplying 5V power into additional I/O racks from other power module, provided that the total current
consumption of all modules in additional I/O rack is not more than 4A. In supplying 5V power, wire
each cable of 5V, 0V and FG from the left end terminal on each base.
Furthermore, note the following in wiring.
(1) Be careful to avoid miss wiring of 5V, 0V and FG.
(2) Use 5V cable and 0V cable as twisted.

Isolate 5V cable from main circuit line of high voltage and large current as far as possible.
(Keep a space of 100mm min between these two.) Avoid parallel wiring of these if possible.
(3) Absolutely avoid 5V cable wiring of rack to rack to which power module is connected. Doing so
could result in damage of modules due to parallel run of the power modules.
(4) Recommended cable size and recommended crimp terminals for each wiring.
Recommended cable size 5.5mm2
JAPAN Eyelet
SOLDER-LESS terminals 5.5-S3, V5.5-S3 (vinyl-insulated)
Recommended
TERMINAL
crimp terminals Rectangular
TRADING
COMPANY LTD end-open 5.5-S3A,V5.5-S3A (vinyl-insulated)
terminal
2.2.4. Wiring of SN-I/F, PC link and computer, MODBUS link
(1) Wiring of SN-I/F

Connect wires to each terminal +, - and 0V as shown below:
Function Terminal name Content

0V Communication 0V (shield inner shell)
SN-I/F L1- Communication-
L1+ Communication +
Note 1) When you use as SN-I/F, please do not connect outside line to
PC10JG and TOYOPUC-PCS.
Note 2) Set the termination resistor switch on T-ON side.
a. L1 Auto 10M
b. L2 Auto 10M
POWER 2 I/O-329G c. L1 SEL. DM
d. L3 T-ON T-OFF
ON OFF
0V
L1- TOYOPUC-PCS
L1+
2-7
(2) Wiring of PC link, computer link
Connect wires to each terminal +, - , 0V and FG as shown below:
Function Terminal name Content

0V Communication 0V (shield inner shell)
PC link
L1- Communication-
Computer link
L1+ Communication +
MODBUS
FG Connect to a base (shield outer shell)
POWER 2 I/O-329G
FG
0V
L1-
L1+
2-8
 Method of wiring for SN-IF, PC link and computer link
After crimping with a special stick terminal, the stick terminal is automatically fixed by inserting the
stick terminal in the electric wire insertion hole.
When the stick terminal is pulled out, After pushing a release button (orange) on the electric wire
insertion hole side, the electric wire is pulled out.
Recommended terminal: AI0.5-10WH made by phoenix contact

Recommended crimping tool: CRIMPFOX ZA3 or CRIMPFOX UD63 made by phoenix contact
Exclusive driver: SZF1 made by phoenix contact
Note 1) Cover the bar terminal with a mark tube for preventing a short circuit.
Recommended cable
· Double shield O-VCTF-SS 2C×0.75mm2 CHUGOKU ELECTRIC WIRE & CABLE CO., LTD
· Double shield UL2464-DSS 2C×20AWG CHUGOKU ELECTRIC WIRE & CABLE CO., LTD
· Double shield UL2464-2SB 2×20AWG KURAMO ELECTRIC CO.,LTD.
Note 1) Be sure to connect each cable with the power source cut off.
Note 2) Cable shall be sequentially wired one by one from module to module. Do not wire them
in batch.
Note 3) To avoid operation error caused by external noise, do not make proximity wiring of
communication cables in parallel to main circuit cable, etc. of high tension and strong
current.
2-9
2.2.5. Wiring of FL-net / Ethernet / FL-remote
Wiring and external devices needed for wiring are described below.
2.2.5.1. External Devices Needed for Wiring

To construct an Ethernet system, the following external devices are required. The external devices
should be prepared by the customer. For communication devices, ones in compliance with IEEE802.3
should be used.
(a) Designated cable

Designated cable for FL-net/Ethernet/FL-remote controller is shown below. The cable is equivalent
to category 5e.
Classification Variety Model Length Manufacturer

FLG-S-***
Straight Shinwa,
(Ex. Model 0.1-100m
cable KOM,
Designated cable for FLH-S-800 for 80m)
NICHIGO
FL-net/Ethernet/FL-remote Cross
Communication
conversion FLG-X-002 0.2m
Wire Co.,ltd
cable
Note 1) Do not lay the communication cable in parallel with or proximate to high voltage strong
electricity wire such as power line.
Note 2) Do not process a cable at the terminal (reprocess modular plug) for preventing a poor
connection.
(b) Designated HUB

Number of
Classification Name Model
ports
5 ports FE-SWH05 TCU-6414
SW-HUB
8 ports FE-SWH08 TCU-6415
Note) Ground the HUB. See the HUB instruction manual for detail.
2.2.5.2. When 1:1 Connection is to be Made with Another Node
Connect the PC10G (FL-net / Ethernet/FL-remote controller) module and another node using a cross
cable.
Set the overall length (straight cable assembly + cross

conversion cable) as shown below:
Designated cross conversion cable
Designated straight cable
2-10
2.2.5.3. When connecting through the relay of HUB
Connect between PC10G (FL-net/Ethernet/FL-remote) and HUB with a straight cable.
Connect between HUB and HUB with a cross cable or straight cable. Do not mix FL-net, Ethernet,
and FL-remote controller in the same system of network.
(Configuration by FL-remote controller)

DC
24V
Between HUB-HUB:
Maximum 100m
Between HUB-Slave:
Maximum 100m
Power for
Unit DC24V
FRMT
Between Master-HUB:
Maximum 100m
FRMT
Power for I/O

DC24V
(Separate the power for IO and the power for

communication.)
(Configuration by FL-net/Ethernet)
DC
24V
Between HUB-HUB:
Maximum 100m
Between HUB-Node:
Maximum 100m
Between Node-HUB:
Maximum 100m
* Designated HUB and FRMT apply auto negotiation. When connected by auto negotiation with each
other, communication is at 100Mbps.
2-11
2.2.5.4. Construction and laying of cable
When constructing a cable, pay attention to the following point.
1. Do not apply excessive tension when pulling a cable.
× Elongated by too much tension.
2. Set the bending radius of fixed part above four times the cable outer diameter.
Four times the cable

outer diameter
×
Twice the cable
outer diameter
2-12
3. When fixing a cable, do not bundle tight with Cable Tie, etc.
Cable is crushed.
4. Do not twist the cable.
The cable is twisted.
5. Avoid excess length processing as far as possible.

When a loop of small diameter and excessive number of loops are applied, excessive crosstalk
between the same color of cable occurs, and may result in a trouble.
Crosstalk refers to leakage of transmission signal to some other transmission route.
×
×
2-13
6. Keep the routing of cable off the noise generation source.
The communication cable and HUB should be kept away from noise sources such as welding
machines, motor drive circuits and power cables with high currents as far as possible.
Noise Noise
source source
Connection cable
7. Shield the cable with metallic duct.
If the cable cannot be kept off noise sources as in (6), shield the communication cable and HUB
with a metallic duct or such.
HUB
Hub container (metallic)
Connection cable Duct (metallic)
2-14
2.2.6Notes on USB connection between personal computer and PLC
Please never insert and/ or remove the USB cable from the personal computer port while the AC
power supply of the personal computer is in use.
When you connect the PLC and the personal computer with a USB cable, please confirm chapter
2.2.6.1 beforehand and follow the procedure on chapter 2.2.6.2.
Otherwise, USB port of PLC may break down.
2.2.6.1 Prior confirmation for USB connection
Please confirm the following matters before USB connection.
(1) Please confirm the conduction status of USB cable shield line before using it. Do not use the
USBcable with a disconnected shield line.
Confirmation of shield line connection USB cable
The resistance between

the metal departments is
several ohms or less
*Please confirm the conduction while lightly winding the cable.
(2) Please check if the USB connector and port are firmly in contact, by slightly moving the connector
toall possible directions. Please do not use the USB port if a non-conduction status is observed
even momentarily.
Confirmation of the metal contact * Please confirm the conduction states
while moving all directions.
personal computer USB connector
USB cable
The resistance between the metal department and chassis

Shield of the personal computer is several ohms or less
(3) The following cables are recommended in order to protect the USB port from breaking due to a current
leakage from the personal computer.
USB cable
Profile
Manufacturer Type Length
U2C-BN07BK 0.7m A(male)-B(male) type
U2C-BN10BK 1.0m * RoHS Directive conformity
product
U2C-BN15BK 1.5m
U2C-BN20BK 2.0m
U2C-BN30BK 3.0m
Elecom U2C-BN50BK 5.0m
USB2-FS05 0.5m A(male)－B(male) type
USB2-FS15 1.5m
USB2-FS3 3.0m
2-15
(4) USB extension cable, please use the recommended products below. In addition, if you wish to use
the extension cable, please use the following precautions.
Cable Type Manufacturer Type Length Profile

B(female)-B(male)type
USB relay cable HARTING 09454521910 0.5m
(Note) The USB standard stipulates that the maximum length of a USB cable is up to 5 meters.
The total extended distance must be within 5 meters when using a device such as relay plug.
Correct sample Incorrect sample
Control box Control box
Relay plug Relay plug
DM DM
USB cable USB cable
3m 5m
PCwin PCwin
USB cable USB cable
0.5m 0.5m
Measures）adjust between Control box

and Personal computer to 3m.
2-16
2.2.6.2 Procedure for USB connection between PC and PLC
Please connect USB cable by either of the following procedures 1) to 4)
1) When AC power plug of PC is a 3 core cable with earth pole
(2) Connect USB cable to PLC
(1) Connect USB cable to PC

PLC
USB cable (3) Insert AC power plug into outlet
AC adaptor Outlet
(2) (1)
(3)
Personal computer AC plug(3 wicks)
* The earth pole must be grounded.
Earth
When you pull out the USB cable from PLC

(1) Pull out the USB cable from PLC -> (2) Pull out the AC power plug from outlet
2) When AC power is with a ground wire

PLC (4) Insert AC power plug into outlet
USB cable
AC adaptor AC plug(2 wicks) Outlet
(2) (1) (4)
Personal computer
Ground line (3)
Earth
(3) Connect ground wire

* Using the same ground for AC power supply
(1) Pull out the USB cable from PLC -> (2) Remove the ground wire
3)When AC power is 2 core cable without a ground wire

PLC (4) Insert AC power plug into outlet
USB cable
AC adaptor AC plug(2 wicks) Outlet
(2) (1) (4)
Personal computer
(3) Earth
Personal computer side
Connecting with (3) Ground shield wire of PC
fixed screw.
* Using the same ground for AC power supply
Serial port
Ground line

(1) Pull out the USB cable from PLC -> (2) Remove the shield wire.
4)When driving PC with its battery (without using AC power supply)No need to ground the PC.
2-17
2.2.6.3 Data backup from PC10G without USB communication
Please back up data by Ethernet when PC10G and PCwin cannot communicate with USB connection.
The built-in port L1 of PC10G must be either used for Ethernet or no-use without using P3 link No.1.
1) Set L1/L2 communication selection switch No.2(L1 SEL/ DM change) on PC10G to "OFF(DM)"
2) Connect Ethernet cable (10BASE-T) to L1 port and LAN port of PC.
When the Ethernet cable is

a cross cable
Personal computer
Cross cable
When the Ethernet cable is

a straight cable
Set to OFF(DM)
Personal computer
SW-HUB
L1 Communication
connector
Straight cable Straight cable
3) Restore power to PC10G

4) Change IP address on PC to the following address from the "Internet Protocol (TCP/IP) properties".
Make sure to note all former settings before changing.
192 168 1
2 (numerical values except 1)
2-18
5)Add Ethernet to the communication module of PCwin
(1)Select ”Communication module setting” and ”ADD”
(2)Select ”Ethernet” (3) Select ”Communication condition”
(4)Input comments
(3)Select "Communication condition" and set IP address to "192.168.1.1" and Port number to
"2000".
6) Backup data
(1) Confirm the comment displayed
(2)Select PC10 data back up
7)Restore the former IP address setting from the "Internet Protocol (TCP/IP) properties".
2-19
2.2.6.4 Cause of USB port failure on PLC
If AC power supply of the computer or the shield is not grounded, the USB port may break due to the
reasons below. If the USB port on PLC is broken, communication with PCwin will not be possible but
there will be no problem with operation or other functions of PLC.
(1) The USB port on PLC may break down when connecting with a USB cable due to the current leakage
from the AC adaptor or PC, which is occurred by a potential difference between the metal connectors
of USB cable and PLC.
Metal part of USB connector
Personal computer PLC
AC adaptor
AC plug(3 wicks) DC cable
FG
Outlet Potential
USB cable difference
current
Unearth in leakage FG
Possibility that
earth line Shield Shield
Potential Potential PLC breaks
Earth Earth
AC plug(2 wicks) difference difference down.
Unearth in
earth line
Unground
ed earth
Earth
(2) The USB port on PLC may break down due to the current leakage coming from AC power supply of
PC.Some PC models have shield wire connected to 0V (GND signal) of USB, which can cause
current leakage when there is a shield wire disconnection of USB cable, or a poor connection
between the metal connectors of USB cable and PC.
Personal computer PLC
Ｖbus Vbus
DC cable D+ D+
D- USB cable D-
0V 0V
FG FG
Disconnection of shield line
leakage
current
Possibility that
Loose connection of metal part PLC breaks down
including the turn
Shield Potential of the leakage of
Earth(FG) current.
difference
2-20
3. INITIAL SETTING
3.1. CPU setting before shipping
3.1.1. Program and parameter
The CPU is set as follows before shipping.
 Program
Before shipping, the CPU operation mode is initially set to "PC10 mode"
Further, the circuit as illustrated below is written in the sequence program before shipping.
 Parameters
The written parameters are set up per the table below.
Items Setup values
CPU operation mode PC10 Standard/PC3JG Separate mode
Scan time timer Initial program 10ms
value Overall 100ms
I/O table reference error Stop
Run status
Scan time over Stop
against error
Applied command error continue
Interrupt at periodic cycle All points 0 (no interrupt)
Interrupt
External interrupt mask All point mask*1
*1 No external interruption function is available. Hence, these parameter values are all
ineffective.
3-1
3.1.2. Battery
The PC10G is provided with a battery to back up data memory (data area for keep-relay, data register,
etc.) against power interruption and to back up the built-in clock.
The battery connector is removed before CPU is shipped. Hence, the data memory and built-in clock
are both not backed up. Before using the clock, preset it properly, install the battery, and clear the
register according to peripheral equipment (PCwin, etc.).
User program (sequence program and parameter) and equipment information memory content (such as
comment) are stored in flash memory which holds its content in blackout, and the content of memory is
retained when the battery is removed. It is recommended to take backup for the worst case.
(1) Battery connector fitting sequence
110 35
PC10G-CPU
POWER RUN E/A
W
P2 P3
L1 L2
L3
BATTERY
TIP-5426 MODE
1st./
2nd./
1.00 I/F
FL
L1 ET
RMT
130 FL
L2 ET
RMT
L1 Auto 10M
L2 Auto 10M
L1 SEL. DM
L3 T-ON T-OFF
START
RESET
L1
L3
L3
0V
L2 L-
L+
SN/PC/CMP
3-2
 Battery connector installation procedure
1. The stop screw is removed and the battery fixation board is detached.
2. The battery side connector is installed on the main body side connector.
Please install the connector as shown in the figure below so that becoming empty may come
right.
Be careful please not to push and be careful not to pull the battery lead wire of an impossible
spear strongly because causes the breakdown.
Red Black Blank
3. The battery is put up in the hole of a lower substrate, places with the battery board and the
screw is occupied.
(note) The battery lead wire must not overflow from the substrate to the outside.
4. Enter the date of replacement in "Battery replacement indication label".

The battery life is 5 years as a guideline, though depending on actual operating conditions.
In replacing, use the specific battery (Battery for PC3J-CPU: TIP-5426).
3-3
(2) Lithium rechargeable battery (TIP-5426)
The PC10G uses an exclusive lithium battery(*1).
This battery is always kept full charged by about 4 hours' current feed per day. If kept full
charged, this battery can back up (*2) for one year or more under normal temperature ( 25°C).
If "Battery voltage low" is detected, BATTERY ALARM (error code 0022) is output. (special
relays V03 and VF0 turn ON)
If BATTERY ALARM fails to turn OFF even after charged 8 hours or more or if it turns ON
immediately after charged, the possible cause is expiry of the battery life. In such a case,
replace with new battery. The battery replacement cycle is 5 years though depending on the
actual operating conditions. In replacing, use the specific battery (Charge type battery for
PC3J-CPU : TIP-5426) without fail.
*1 Appearance of lithium rechargeable battery (TIP-5426)
Lead wire, black (-)
(Upside..vacant)
Lead wire, red (+)

Connector (CPU side)
3-pin connector
*2 This lithium charge battery backs up the data memory (data area for keep relay, data register,
etc.) and the built-in clock. The guaranteed back-up period subject to full charge is 6 months
(environmental temperature: 25°C).
User programs (sequence program and parameters) and equipment information memory data
(comments, etc.) are never cancelled even after removal of the battery, because they are
stored in a flash memory wherein memory data are all held.
3-4
3.1.3. About register clearing
When shipping PC10G, the battery is removed for protection.

Therefore the register data after a customer has mounted the battery is not definite.(PC3J series
provided a backup function of register data, however, PC10G has increased the capacity of data
memory, and does not provide a backup function of register. Therefore, when the battery is removed,
the register data is an undefined value.)
If CPU should be started under this condition, the following malfunction may be found.
 Error of application command occurs.
 It is not possible to communicate because of ''unlinking function'' works.
When the battery of PC10G has been attached, clear the register.
● Clearing method
Contents Result
1 When Reset SW = ON as well as Mode SW = It becomes a display after the "--" display "CL"
ON, power turns on. (Do not turn OFF both
SWs.)
Mode SW=ON
Reset SW=ON
START
RESET
Power ON
2 As soon as "CL" is displayed on the display, "00" display

turn OFF (release) the MODE SW and RESET
SW. Next, turn ON (press) the MODE SW and PC10G-CPU
then turn it OFF (release it). POWER RUN E/A
W Clear Registers is
Node：Mode SW=OFF within 5 seconds P2 P3 being executed.
after "CL" is displayed.*1 L1 L2
L3
Register clearing mode
Clear Registers is completed.

Indication returns to that of prior to clearance.
(Clearance is finished in either indication.)
Switches OFF
Normal RUN(lighting in Error code display

figure of eight) (EX. 48:I/O table verifying
After that error)
PC10G-CPU PC10G-CPU
Mode SW is turned
POWER RUN E/A POWER RUN E/A
on and turned off.
W W
P2 P3 P2 P3
L1 L2 L1 L2
*1) If five seconds or more L3 L3
have elapsed, see the note
given on the next page. * The displayed error code is
different depending upon error.
3-5
Note: The register clearing mode is canceled if the predetermined operation is not made within five
seconds since the register clearing mode (in which "CL" is displayed on the display) has
started.
If the register clearing mode is canceled, repeat the procedure all from the start.
PC10G-CPU
POWER RUN E/A
W
P2 P3 Register clearing
L1 L2 mode
L3
When register clearing operation is not performed, display

returns to normal condition in 5 seconds.
Normal RUN Error code display (EX. 48:I/O table verifying error)
(lighting in figure of eight)
PC10G-CPU PC10G-CPU
POWER RUN E/A POWER RUN E/A * The displayed error code varies
W W according to the nature of the error.
P2 P3 P2 P3
L1 L2 L1 L2
L3 L3
3-6
3.2. CPU Setting Procedure
3.2.1. CPU operation mode setting
Initially set CPU mode by peripheral equipment.

" Data area separate mode", " Data area single mode", and "PC2 compatible mode" are available as
CPU operation mode. And program capacity and data capacity can be selected as necessary.
Data area separate mode : has independent data area every each program.
Data area single mode : data area in each program is common to other programs.
PC2 compatible mode : Use of PC2 Series peripheral devices is allowed. However, the number of
available programs is limited to one 32K words program (Program-1).
Any function extended in PC3J is unable to be used under this mode.
PC10 mode (including PC10 standard mode) is added to Ver.3.00 and thereafter.
Selection of program capacity and flash register are added to PC10 mode.
Flash register size: 0 - 4096 Kbytes (setting in 64Kbytes allowed.)
(Select "0" when it is not used.)
The peripheral equipment of PC10 Series (PCwin Ver10.* or later) are available for all modes.
Relationship of CPU operation mode to program capacity and data capacity :

Basic area data capacity Extended area data
Program capacity KW
KW capacity KW
Mode
Relay
PRG.1 PRG.2 PRG.3 PRG.1 PRG.2 PRG.3 Data Buffer
register
60 60 60
PC10 mode 32
120 60 0 32 32 16 128 256
(Ver3.00 -)
180 0 0
PC10
60 60 60 8 8 8 16 32 128
standard/PC3JG
Separate mode 1 16 16 16 8 8 8 8 －－
Separate mode 2 32 － 16 16 － 8 8 －－
PC10 Separate mode 3 16 32 － 8 16 － 8 －－
/PC3 Separate mode 4 16 16 － 8 16 － 8 16 －
Separate mode 5 16 － 16 16 － 8 8 16 －
1
Single mode 1 16 16 16 24* 8 －－
1
Single mode 2 32 － 16 24* 8 －－
1
Single mode 3 16 32 － 24* 8 －－
1
Single mode 4 32 －－ 24* 8 16 －
1
Single mode 5 16 －－ 24* 8 32 －
1
Single mode 6 16 16 － 24* 8 16 －
PC2 compatible 32 －－ 24 －－－－－
*1 The basic area data in single mode is common to each program.
Supplement:
Extended buffer register (EB) in PC10 mode allows direct designation to each operand of contact, coil,
and application command. (Command dedicated to EB access was required until PC10
standard/PC3JG mode.)
Flash register, when initializing the data stored in flash memory, transfers the data to flash register
area on RAM, and the data is used for flash register area on RAM thereafter. Here it is possible to
directly designate from each command the same as "EB area". However, when writing to flash
memory itself, dedicated command is necessary. When data is written to the flash register by normal
command, it returns to the original content of flash memory when power is turned off or CPU is reset.
Note : Change of operation mode would cause sequence programs and data hitherto to be canceled. In
addition, clear the register after changing the operation mode. (Please refer to “3.1.3.”.)
3-7
In addition to the above, as CPU operation mode parameter execution / non-execution of program-2, 3
and its link with RUN signal can be selected.
Item Selection value

Program1 Effective [EXECUTE] (fixed)
Program execution *1 Program2 Effective /ineffective ( Execute/non-execute)
Program3 Effective /ineffective ( Execute/non-execute)
Program1 Link (fixed)
*2
RUN signal link Program2 Link /Non-link
Program3 Link /Non-link
*1 Execution of Program-2 and-3 can be selected from the parameters.
If "INEFFECTIVE" is selected, the applicable program (program-2 or -3) is not executed.
*2 Link of program-2 and -3 with RUN signal is selected from the parameters. If "LINK" is
selected and the applicable program stops, RUN signal turns OFF, linked with the program ,
then allowing stop of all the programs.
3.2.2. RACK No./SLOT No. when link parameter is set
One port of CMP/PC/SN-I/F link and two ports of FL/ET/RMT are mounted as communication function
in PC10G.
Rack No. and slot No. when setting the link parameter are set as shown in the table below. Link No. can
freely be changed.
When a built-in link is not used, it is not necessary to set this item.
When you use it as SN - I/F, it is not necessary to set a link parameter.
Link Link No. Rack No. Slot No. Module Name

PC / CMP Arbitrariness Built-In Standard PC link
Computer link
FL / ET / RMT Arbitrariness Built-In L1 FL-net
(L1 side) Ethernet
FL-remote M
(L2 side) Ethernet
FL-remote M
(Note1) If the link parameter is not set by L3, SN-I/F is selected.
In the case of PC2 compatible mode, it can be used as computer link.
(Note2) Please turn on the terminal switch when using it as SN-I/F.
When you do not use it as SN-I/F, please turn OFF.
3-8
3.2.3. Automatic setting of I/O modules and link parameters
I/O modules and link parameters can be set automatically in CPU .

For setting, follow the sequence given below.
PC10G-CPU
POWER RUN E/A
STEP-1 With the power switch kept OFF, W
P2 P3
L1 L2
shift "RESET/START" switch to L3
BATTERY
" START" and press the same 1st./
MODE
switch with finger so as not to I/F
FL
return. L1 ET
RMT
FL
L2 ET
RMT
L1 Auto
L2 Auto 10M
L1 SEL.
L3 T-ON 10M
START ＊.＊＊
START
RESET
RESET L1
L3 Reset/start switch
L3
0V
L2
L-
STEP-2 Turn ON the power switch. SN/PC/CMP
This completes automatic setting of I/O modules and link parameters. If error is
STEP-3
detected at this stage, ERR lamp lights.
STEP-4 If no error, the sequence is put in RUN by RESET/START switch.
3-9
I/O module and link parameter set value (Automatic setting by CPU)
Items Setup values
Identification of I/O
Allocation of I/O module As actually installed
module
(Rack No.0~E，Slot
No.0~7) Allocation of I/O
As actually installed
point
Only such name setting as lack No., slot No. and link
module is implemented. For the name of the link
Link Parameter *
modules to be automatically configured, see the table
below.
* Lack No. and slot No. are allocated from link 1-2 in program 1 in the order of their smaller number. They are also
allocated to link 2- # in program 2 when actual installed link number exceeds 8.However they are allocated to
link 3- # in program 3 when CPU operation mode having no program 2 is selected.
No allocation is made for the link that is exceeded link number 8 when CPU operation mode having neither
program 2 nor program 3 is selected.
■ Name of automatically configured link module

mounted module Name of to-be mounted module Name of
Link automatically Link automatically
Link module name module configured link Link module name module configured link
code modules code module
AD10 0000 It is not set up HPC link(master) 4009
Pulse output module 0100 Pulse output module SUB-CPU(master) 4009
PC link slave 0002 HPC link(slave) **09
PC1-I/F input 0002 SUB-CPU(slave) **09 HPC link(slave),
PC link slave, SUB-CPU(slave)
2-port M-NET 0002 FL-net(8KB) 8009
PC1-I/F input
PC link master 0102 FL-net(16KB) 8109
PC1-I/F output 0102 FL-net(32KB) 8209
Computer link 0003 PROFI-S2 8309
Computer link
Ethernet 8203 AF1K (motion controller) 800E
ME-Net(slave) 0004 MA1K (motion controller) 810E Diagnostic module
ME-Net(slave)
ME-Net(master) 0104 MCML (motion controller) 820E
SIO module 0005 SIO module,
Memory card I/F 0005 Memory card I/F
High speed remote
0008
I/O
AS-i 0008
DLNK-M 8008 High speed remote
I/O, AS-i
DLNK-S2 8008
DLNK-M2 8208
FLRemote 8308
3-10
3.2.4. Program creating sequence
The creating sequence is mainly classified into two cases; one case that sequence program is not
pre-created and another case that it is already pre-created.
(1) Case that sequence program is not pre-created:
STEP-1 Set CPU operation mode by the peripheral equipment.
Set parameters by the peripheral equipment and execute PROGRAM CLEAR in the
STEP-2
peripheral equipment.
STEP-3 Start program creation.
STEP-4 Write the sequence program (program + parameters) in CPU.
STEP-5 Set the current time on the built-in clock by the peripheral equipment.
STEP-6 Set necessary data (data register, etc.) by the peripheral equipment.
STEP-7 Store the sequence program (program + parameters) in FDD, etc.
(2) Case that sequence program is already pre-created:
Read the sequence program (program + parameters) into the peripheral equipment
STEP-1
from FDD, etc.
STEP-2 Check the parameters on the peripheral equipment and set them as necessary.
STEP-3 Write the sequence program (program + parameters) in CPU.
STEP-4 Set the current time on the built-in clock by the peripheral equipment.
STEP-5 Set necessary data (data register, etc.) by the peripheral equipment.
STEP-6 Store the sequence program (program + parameters) in FDD, etc.
3-11
3.2.5. Parameter setting
PC10G has 2 port of FL/ET/FL-remote and a port of PC/CMP/SN-I/F as a built-in link, which is three
ports in total.
The following items are set on the parameter menu of the Project window.
Set CPU Mode (Please refer to (a))

Set CPU Status (Please refer to (b))
Set I/O Module (Please refer to (c))
Set RUN Status at the Error (Please refer to (d))
Set Scan Time Timer (Please refer to (e))
Set Program name (Please refer to (f))
Set Link Parameter (Please refer to (g))
Set Interrupt Menu (Please refer to (h))
3-12
(a) Set CPU Mode
This allows you to set the CPU program, data memory allocation pattern, and operation status of
each program.
(1) Selection of CPU operation mode

Select a CPU operation mode according to the system. (PCwin Ver.10 ** screen)
Operating procedure
1. Selection of CPU operation mode
In the case of PC10 mode (Ver.3.00 -), select program capacity and flash register capacity.
Default is "P1:60 P2:60 P3:60" and flash register (FR) "0".
(When flash register is not used, select flash register "0".)
Content of data area is displayed in detail display in any other mode. See and select one.
Each data area other than PC2 compatible mode is fixed.
When PC2 compatible mode is selected, data input is made valid.
Enter the program capacity, file register capacity, and comment capacity. (See (2).)
2 Exiting the setting

When the setting is completed, click the [OK] button.
Note: When setting mode is spilt, you can not change to single mode.
As well as in the case of single mode, you can not change to split mode.
If you are editing circuits in PC2 compatible mode, can change to split or single mode.
3-13
(2) Set CPU Mode (Capacity details setting)
This setting becomes active only when selecting the PC2 compatible mode.
You may set a program capacity, file register capacity, and comment capacity.
Each setting range is shown on the screen below. (PCwin Ver.8** screen)
Program capacity
The initial value is 32K words.
Set to 32K with PC10G.
File resister capacity

Comment capacity
3-14
(b) Set CPU Status
You may set whether or not each allocated program No. is executed.
(In the PC2 compatible mode, this setting cannot be made on programs 2 and 3.)
Operating procedure
1. Program execution mode
This shows the current setting status of programs 1 - 3. Program 1 is always executed.
For programs 2 and 3, it is possible to change "Valid/Invalid" if they are allocated by the
"Program capacity/Data memory capacity/Extended data capacity" settings.
2. Program RUN signal interlock

If a valid program is stopped, it is necessary to set ON/OFF of the RUN signal.
The current setting status of programs 1 - 3 is displayed. Program 1 is always interlocked
with the RUN signal. When capacities of programs 2 and 3 are already set, it is possible to
set "Interlock/Non-interlock."
3-15
(c) Set I/O Module
You must set all modules to be mounted in the rack.
There are two types of setting methods, [Automatic setting] and [Manual setting].
Operating procedure
1. Automatic setting
Reading the program from PC makes it possible to easily set the current status.
Normally, you should select [Automatic setting].
[1] Read the program from PC.

[2] After the I/O module setting screen (above screen) is displayed, click [Current value].
[3] The message will appear. Click [Yes].
[4] Click [OK] to exit the setting.
3-16
2. Manual setting
[1] Select a rack No. and click a slot No. you wish to set.
[2] Click [Setting] to set the number of allocated points and identification code (Please refer to
g - 1).
(1) Setting of layout point and identification code

This allows you to set up the number of allocated points and identification code for the
module in the slot you have selected.
There are two types of setting methods, [Automatic setting] and [Manual setting].
Operating procedure
1. Automatic setting
You may easily select an I/O module on the screen.
Select a desired module type, and then select a module you wish to set from the I/O module
name list. After selecting the module, click [OK] to automatically set the number of allocated
points and identification code.
2. Manual setting
You may input the number of allocated points and identification code directly.
3-17
(d) Set RUN Status at the Error
You may set the RUN state of PC if an error occurs in PC.
Check on desired items you wish to stop PC if an error occurs.
1. In the PC3 mode, the following initial screen will appear.
2. In the PC2 compatible mode, the following initial screen will appear.
3-18
(e) Set Scan Time Timer
This allows you to set up scan time for all programs and scan time for initial program and main
program of programs 1 - 3. If the value exceeds the set scan time during execution of the program,
an error occurs in CPU.
1. In the PC3 mode, the following initial screen will appear.
2. In the PC2 compatible mode, the following initial screen will appear.
(f) Set Program name

You can set a program name for the system and programs 1 - 3. Up to 64 alphanumeric characters
can be input.
3-19
(g) Set Link Parameter
This allows you to set up the link parameters for each program. When assembling the link module
into the system, you must set up the relevant parameters.
PC10G incorporates the link of FL/ET/RMT of two ports and PC/CMP/SN-I/F of one port, which is
three ports in total. Setting operation by peripheral equipment is shown by example of PCwin.
The following items are set from the parameter menu of the project window.
Link setting of incorporated FL/ET/RMT
1. <Link Setup> is chosen. Link No. can be freely set between from 1 to 8.
2. Rack No. [Built-in], Slot No. [L1] is chosen from . Link module name is chosen.
1.Ethernet
2.Ethernet (32 ports)
2.FL-net(8K/16K/32K)
3.FL-remote-M
can be selected.
3-20
3. [Detail] is chosen. (Please refer to FL/ET-T-V2H manual or 2PORT-EFR manual about a basic
matter of ethernet.)
[1] IP address of a built-in link is input.
[2] The protocol method that opens from is chosen, and node port No and table No of the
node besides the destination are input.
[3] [Initialization based on Link Parameter] is chosen. If this item is not selected, this setting should
not be effective.
[4] When the setting is completed, click [OK].
[1] [4]
[2]
[3]
* When C of the L1/L2 communication selection switch is turned off, L1 automatically begins
communicating with the Ethernet equipment that has opened the connection.
If the switch of L1 SEL is turning off even when setting it by the link parameter, the parameter set
with PCwin is disregarded.
Parameter setting of PC, CMP, SN-I/F
1. [Link setup] is chosen. Link NO can be freely set between from 1 to 8.
3-21
2. Rack No. [Built-in], Slot No. [Standard] is chosen from . Link module name [PC link master,
PC1-I/F output] is chosen.
(h) Set Interrupt Menu

1. Select "(1) Constant cycle interruption timer setting" and press "OK".
2. Select "interruption No." to be set and press "detail".

* Interruption No. 0 - 3 is the setting of interruption program of LABEL "I0" - "I3".
3. Set "timer value" in milliseconds, choose "use program" for constant cycle interruption, and press
"OK".
3-22
4. TEST RUN
4.1. Check items before test run
 Register setting
•Has the register been cleared?
 Parameters setting
•Each parameter set correctly?
 Battery
•Battery connector connected perfectly?
•Battery fully charged?
 Setting at time
•Is setting of the time of a built-in clock done?
 Module mounting
•Each module is securely mounted? 4
•Fixing screw is installed?
 Fuse
•Free from blown and damage?
 Wiring to terminal block

•Cables are connected correctly to each terminal?
•Cable size proper?
•Each terminal free from screw loose?
4-1
5. ERRORS AND REMEDIES
5.1. Error report from CPU
5.1.1. Error ranks
Error ranks are mainly classified as follows.
 WARNING ……………… Run further continued.

This error rank does not cause system down, but would lead to system down if the error state is
left as is.
RUN lamp and RUN display on status display LED remain unchanged as usual.
Special relay V003 is turned on.
 MINOR ERROR ………… Run further continued

Errors which are caused mainly by user program or incorrect setting by user and which are not
considered as cause of serious affect on the system even if the sequence program is not stopped 5
immediately. RUN lamp and RUN contact are remained unchanged as ON.
 MAJOR ERROR ………… Run stop

Errors which are caused mainly by system hardware and for which further continued operation of
the system is considered to be difficult.
Once error of this rank occurred, the sequence program run is stopped and RUN lamp and RUN
contact turn OFF simultaneously.
5-1
5.1.2. Error display
(1) The E/A lamp (red) lights when error occurs in the CPU.
(2) Message display

"Operation condition monitor" mode of message display provides display of error code.
(2-1) Alarm code display in RUN mode

Example: Application command is generated (error code 71)
7 displayed Cleared 1 Displayed Cleared

(0.7s) (0.1s) (0.7s) (2s)
(2-2) Display of extended function being executed (forcible ON/OFF, tracing per scan)
Forcible output Tracing per scan Forcible input (ON/OFF)
Note) Not displayed when alarm is on.
5-2
5.1.3. Displayed errors table
LED lamps Error reset
Special relay
Error items Error code POWE Power
RUN E/A POWER RUN
R re-throw IN
Power source POWER DOWN 0013 ● ● 〇〇〇 VC1 V01
Battery BATTER VOLTAGE LOW 0022 〇〇〇〇 - VF0 V03

PROGRAM MEMORY SUM
0*21 〇 ● 〇〇〇 VC2 V01
CHECK ERROR
Memory SUBSIDIARY INFM SUM
0*23 〇 ● 〇〇〇 VC2 V01
CHECK ERROR
UNDEFINED COMMAND 0*24 〇 ● 〇〇〇 VC9 V01
SYSTEM CONTROL
0035 〇 ● 〇〇〇 VC0 V01
PROCESSOR ERROR
SEQUENCE WORD
0036 〇 ● 〇〇〇 -
PROCESSOR ERROR
SYSTEM RAM ERROR (0032) 〇 ● 〇〇 - - -
SYSTEM INTERRUPT
0039 〇 ● 〇〇 - VC0 V01
ERROR
I/O PORT ERROR (003C) 〇 ● 〇 ○ - - -
SYSTEM MEMORY SHORT (00A0) 〇 ● 〇 - - VC0 V01
CPU
RTC ERROR 00A3 〇〇〇 - - VF5 V03
SYSTEM PROGRAM ERROR 00A6 〇 ● 〇〇〇 VC2 V01
SEQUENCE RAM ERROR 00A9 〇 ● 〇〇〇 VC0 V01

SYSTEM PARAMETER
00AA 〇〇〇 - - VC2 V03
ALARM
BACKUP MEMORY WRITE
00AB 〇 ● 〇〇〇 VCA V01
ERROR
DATA ERROR 00AD 〇 ●／〇〇〇〇 VC2 V01/02
DATA ERROR UNCHECK 00AE 〇〇〇 - - VCB V03
CLOCK UNSET 00AF 〇〇〇 - - VF5 V03
*: 0~3 〇: Lighting
0 = System related error ●: Turn out (OFF)
1 ~ 3 = Program related errors ●/〇 : Finally depending on parameter " running status
Displaying corresponding against occurred” But the left (RUN OFF) is set before
program Nos. This is 1 in the shipping.
case of PC2 interchange mode.
5-3
Error
Error items Power Special relay
code POWER RUN E/A Reset
re-throw IN
I/O RACK F USED 0041 〇 ● 〇〇 - VC8 V01
I/O RACK NO. OVERLAP 0045 〇 ● 〇〇 - VC8 V01
I/O ADDRESS OVERLAP 0046 〇 ● 〇〇 - VC8 V01
I/O POWER DOWN 0047 〇 ● 〇〇〇 VC1 V01
I/O TABLE VERIFICATION 0048

〇 ●/〇〇〇〇 VE0 V01/02
I/O ERROR 004A
I/O MODULE ERROR 0043 〇 ● 〇〇 - VC7 V01
I/O MODULE ALARM 004B 〇〇〇〇 - VC7 V03

I/O MODULE PARAMETER
0042 〇 ● 〇〇 - VC5 V01
ERROR
I/O ADDRESS SETTING
0049 〇 ● 〇〇 - VC8 V01
ERROR
I/O ADDRESS BUSPARITY
I/O bus 0044 〇 ● 〇〇 - VC3 V01
ERROR
EVENT MONITOR ERROR 0*29 〇 ● 〇〇〇 VC2 V01
〇〇〇〇
*1
SCAN TIME OVER 0*31 ●/〇 VE1 V01/02
APPLIED COMMAND ERROR 0*71 〇〇/● 〇〇〇 VE2
*2
V02/01
1
USER PROGRAM
〇 ● 〇〇〇
*3
0*72 VC9 V01
STACK-OVER
〇 ● 〇〇〇
*3
NO END COMMAND 0*73 VC9 V01
〇 ● 〇〇〇
*3
NO START COMMAND 0*74 VC9 V01
〇 ● 〇〇〇
*3
MASTER CONTROL ERROR 0*75 VC9 V01
User APPLIED COMMAND ERROR
〇〇/● 〇〇〇
*2
program 0*78 VE2 V02/01
2 (For special module )
〇 ● 〇〇〇
*3
FOR-NEXT ERROR 0*79 VC9 V01
〇 ● 〇〇〇
*3
RET ERROR 0*7A VC9 V01
〇 ● 〇〇〇
*3
RETI ERROR 0*7B VC9 V01
*2
LIBRARY CALL ERROR 0*7C VE2 V02/01
〇 ● 〇〇〇
*3
PRG , END EXECUTE 0*7D VC9 V01
〇 ● 〇〇〇
*4
LABEL TABLE ERROR 0*76 VC6 V01
*2
INDEX ERROR 0*7F VE2 V02/01
PARAMETER SETUP VALUE
〇 ● 〇〇〇
*4
User setting ERROR 0*77 VC6 V01
#:0~3 : Lighting
0= System related error ●: Turn out (OFF)
1 ~ 3= Program related errors
/ ● : Finally depending on parameter " running
Displaying corresponding program (● / ) status against occurred” But the left (RUN
Nos. This is 1 in the case of PC2
OFF) is set before shipping.
interchange mode.
*1 Program-1 ~ -3 : VE8 ~ VEA *2 Special relay every each program

*3 Program-1 ~ -3 : VD0 ~ VD2 *4 Program-1 ~ -3 : VD8 ~ VDA
5-4
Error items Error code Power Special relay
POWER RUN E/A Reset
re-throw IN
SPECIAL MODULE
0082 〇 ● 〇〇〇 VC5 V01
PARAMETER ERROR
SPECIAL MODULE NUMBER
0088 〇 ● 〇〇 - VC8 V01
OVER
SPECIAL MODULE ERROR 0*84 〇 ● 〇〇〇 VC4 V01

Special
module LINK PARAMETER ERROR 0*85 〇〇〇〇〇 - V03
LINK MODULE ALLOCATION

0089 〇〇〇〇〇 VF2 V03
ERROR
LINK COMMUNICATION
0*86 〇〇〇〇〇 - V03
ERROR
#:0~3 〇: Lighting
0= System related error ●: Turn out (OFF)
1 ~ 3= Program related errors 〇/● : Finally depending on parameter " running
Displaying corresponding program (● /〇 ) status against occurred” But the left (RUN
Nos. This is 1 in the case of PC2 OFF) is set before shipping.
interchange mode.
5-5
5.1.4. Special register for error information output
• Ver3.00 and over
When an error is detected, error code, error-related information, and error detection time are stored in the
special register for storing error information. This register has a shift register structure of 64 stages, and is
capable of storing errors up to 64 times. When the error occurs 65 times or more, error information is
erased in sequence from the information stored first. (See description below.)
Error information stored in this register can be read by peripheral system (such as PCwin).
In addition, the error message can be checked in "Error code monitor" mode of message display.
H L
S1000 Abnormal 0 S1000 Program No. Error code
Related Related
S1008 Abnormal1 S1001 information 2 information 1
Related Related
・・ S1002 information 4 information 3
Related Related
Related Related
・・ S1005 Time (minute) Time (sec.)
S11F0 Abnormal 62 S1006 Time (day) Time (hour)
S11F8 Abnormal 63 S1007 Time (year) Time (month)
(Note 1) Error-related information are stored with hexadecimal number.
(Note 2) The current time of the built-in clock is stored.
The data represents 1bit at 2 digits in BCD code.
Year data is represented by lower two digits of AD year.
(Note 3) In addition to register above, error information S200 - S24F used up to PC10G standard
mode is also stored. See the history by S1000 - S11FF.
• In the case up to Ver.2.05 and the case except PC10 mode
Error information storage special register is eight counts of S200 - S24F the same as PC3J series.
Address Upper Lower

Error 0 information S200 Error codes
New S200
Error-related Error-related
Error 1 information S201 information 2 information 1
S20A
Error-related Error-related
S214
Error 2 information S202 information 4 information 3
S21E Error 3 information S203 Error detection time (sec)
S228 Error 4 information S204 Error detection time (min)
S232 Error 5 information S205 Error detection time (hour)
S23C Error 6 information S206 Error detection time (day)
S246 Error 7 information S207 Error detection time (month)
Former S24F ↓ S208 Error detection time (year)

Error detection time
Cancel S209 -
(day of week)
(Note 1) Error-related information are stored with hexadecimal number.
The current time of the built-in clock is stored.
The data represents 1bit at 1 digit in BCD code. (EX. "0102"
represents "12.")
Year data is represented by lower two digits of AD year and the "day
of week" data is represented by 0 - 6, which then correspond to
Sunday - Saturday.
The information stored in this register are not cleared even after ERROR is reset.
Where ERROR clear is required, write "0000" in the register using the peripheral equipment
(PCwin).
5-6
5.1.5. Error-related information (S1000-S11FF)
The information effective to specify error causes and error-resulted units/devices are stored as
"Error-Related Information" covering error items forecast (stored with hexadecimal value).
* Information relating to program counter (step No.) is displayed in four columns. It was displayed in
two columns in conventional S200 - S24F.
Error Error-related information
Error content Remarks
code 1 2 3 4 5 6 7 8
0013 POWER DOWN - - - - - - - -
Area
PROGRAM MEMORY *1:Sequence
0*21
SUM CHECK ERROR
classifica - - - - - - -
tion *
BATTERY VOLTAGE
0022
LOW
- - - - - - - -
SUBSIDIARY Area
*1: Parameter
0*23 INFORMATION SUM classifica - - - - - - -
CHECK ERROR tion *
Program Program Program Program
UNDEFINED
0*24
COMMAND
counter counter counter counter - - - -
lower lower upper upper
Sum
EVENT MONITOR Sum
0029 2
data
Calculate - - - - -
ERROR d value
Classific *1: Initial 2: Main
0*31 SCAN TIME OVER
ation*
- - - - - - - 3: Overall
*1: System RAM
0032 SYSTEM RAM ERROR - - - - - - - -
SYSTEM CONTROL
0035
PROCESSOR ERROR
- - - - - - - -
SEQUENCE WORD
0036
PROCESSOR ERROR
- - - - - - - -
SYSTEM INTERRUPT Classific * 0 ~ 7:INT0 ~ 7 FF:
0039
ERROR ation*
- - - - - - - NMI
003C I/O PORT ERROR - - - - - - - -
0041 I/O RACK F USED - - - - - - - -

I/O MODULE
0042
PARAMETER ERROR
Rack No. Slot No. - - - - - -
Fuse blown, etc.
0043 I/O MODULE ERROR Rack No. Slot No. - - - - - -
I/O ADDRESS BUS
0044
PARITY ERROR
Rack No. - - - - - - -
I/O RACK NO.
0045
OVERLAP
- - - - - - - -
I/O ADDRESS Rack Rack
0046
OVERLAP No.(1) No.(2)
- - - - - -
0047 I/O POWER DOWN - - - - - - - -
I/O TABLE Register Mounted
0048
REFERENCE ERROR
Rack No. Slot No.
ed data module
- - - -
I/O ADDRESS
0049
SETTING ERROR
Rack No. - - - - - - -
004B I/O MODULE ALARM Rack No. Slot No. - - - - - -
5-7
code 1 2 3 4 5 6 7 8
Program Program Program Program Serial Serial
APPLIED COMMAND
0*71
ERROR 1
counter counter counter counter number number - -
lower lower upper upper lower upper
USER PROGRAM
0*72
STACK-OVER
- - - - - - - -
0*73 NO END COMMAND - - - - - - - -
0*74 NO START COMMAND - - - - - - - -

*1: Nest Over 2:
MASTER CONTROL Classific MC MCR
0*75
ERROR * - - - - - Number unmatching
ation number number 3: No MCR 4: No MC
*1-1: JUMP 2:CALL
3: INTERRUPT
Classific Classific Label Label 4: START
* * 5:EXTENDED LABEL
0*76 LABEL TABLE ERROR ation ation number number - - - - 2-1: NO LABEL
（１）（２） lower upper 2:UNMATCH
3: OUT OF NO.
RANGE
PARAMETER SETUP Parameter
0*77
VALUE ERROR number - - - - - - -
Program Program Program Program Serial Serial I/O error with special
APPLIED COMMAND
0*78
ERROR 2
counter counter counter counter number number - - module
lower lower upper upper lower upper
*l: NO NEXT 2: NO
Program Program Program Program FOR
Classific
0*79 FOR-NEXT ERROR * - counter counter counter counter - - 3:NEST OVER
ation lower upper upper lower 4: ADDRESS
ERROR
Classific *1: NO RET
0*7A RET ERROR * - counter counter counter counter - - 2: NO CALL
ation lower upper upper lower
*1 1:NO RETI
2:NO
Classific INTERRUPT
0*7B RETI ERROR *1 - counter counter counter counter - - *2 Interrupt level in
ation lower upper upper lower
case of no
RETI
*1
1. Library is not
enabled.
2. Library is already
being executed.
3. Label number is out
of range.
4. Label command is
unavailable.
Label Label 5. Label number is not
LIBRARY CALL ERROR
Classific Classific matched.
(Library cannot be *1 *2 number number - - - - 6. SYS415 is
called) ation ation
lower upper unavailable.
0*7C 7. Not usable program
number
8. Not usable
operation pattern
*2
A: FB library, B: User
library, C: Standard
library
Read Read Read Read

source source source source
ERROR IN LIBRARY Program Program Program Program - - - -
counter counter counter counter
Lower Lower upper upper
No END or RET, RETI
0*7D PRG. END EXECUTE - - - - - - - - commands

0*7F INDEX ERROR counter counter counter counter - - - -
lower lower upper upper
5-8
code 1 2 3 4 5 6 7 8
SPECIAL MODULE
0082 Rack No. Slot No. - - - - - -
PARAMETER ERROR
*1: ALM 2: CPU
SPECIAL MODULE Classific DETECT
0084 Rack No. Slot No. - - - - -
ERROR ation* 3: I/O MODULE
DETECT
LINK PARAMETER
0*85 Link No. - - - - - - -
ERROR
LINK COMMUNICATION
0086 Link No. - - - - - - -
ERROR
SPECIAL MODULE
0088 - - - - - - - -
OVER QUANTITY
LINK MODULE No link parameter
0089 Rack No. Slot No. - - - - - -
ALLOCATION ERROR setup
Classific
00A0 PROGRAM OVER
ation*
- - - - - - -
Classific
00A3 RTC ERROR
ation*
- - - - - - - * 1: I/F 2: Back-up
SYSTEM PROGRAM Classific
00A6
ERROR ation*
- - - - - - - *1: ROM 2: RAM
SEQUENCE RAM
00A9
ERROR
- - - - - - - -
SYSTEM PARAMETER Classific
00AA
ALARM ation*
- - - - - - - *1: ROM 2: RAM
BACK-UP MEMORY
00AB
WRITE ERROR
- - - - - - - -
00AD DATA ERROR - - - - - - - -
DATA ERROR
00AE - - - - - - - -
NON-CHECK
00AF CLOCK NON-SETUP - - - - - - - -
5-9
5.1.6. Counteraction against CPU error
This Chapter is to help maintenance men search true cause(s) and take proper counteraction/corrective
action against it, when an equipment using either TOYOPUC-PC10G fails to work normally due to
somewhat cause.
All maintenance men concerned are requested to read carefully the contents of other Chapters and
Sections in this manual and the Programming Manual, before reading this Chapter, in order to fully
know the functions of PC10G and the programming procedure.
 Kinds of error causes
Main causes which result in abnormal operation (generally operation stop) of the lines controlled can
be mainly classified as follows by each device.
(1) Trouble of input and output devices (limit switch, solenoid valve, etc.)
(2) Fault of control circuits (program)
(3) Trouble of TOYOPUC itself
(a) Trouble of I/O Module
(b) Trouble of CPU Module
This Chapter describes the troubles and causes in item-(2) and - (3).
 Trouble-shooting
(1) Items to be first checked

(a) Do two or more errors occur or not simultaneously?
If the error code display unit displays different error codes alternately at 2-sec interval, it shows
simultaneous occurrence of two or more errors. In such a case, check the time of error
occurrence from the register data wherein error information is stored, and perform
troubleshooting in the order from firstly occurred error.
New and former errors
(b) Check the error-related information. in Error History
Check the error-related information and the time of error
Error 0 New
occurrence using a peripheral device and use them as reference
 
information for trouble-shooting.
 
Error 63 Former
(2) How to proceed with "Trouble-Shooting"
Analyze causes in reference to Para. 5.1.7 "Self-Diagnosis Items and Presumed Causes" or Para.
5.1.8 "Error Check Flow Chart".
When not restoring after trouble-shooting, check the installation of CPU module and I/O module,
and check the connection of I/O cables.
If not restoring yet, exchange CPU modules, selector modules, power modules, I/O modules, I/O
cables or bases.
5-10
 Procedure of CPU module exchange
Please do the exchange work according to the following procedures when you exchange CPU module
as a result of the troubleshooting.
1) The backup of the program + parameter and register (other data if necessary) is taken from the
PC10G module.
2) The power supply is turned off.
3) The wiring for the PC10G module is removed, and the PC10G module is detached.
4) A new PC10G module is prepared, the battery is connected, and the switch is set.
5) The new PC10G module is mounted, and wiring is returned like being original it.
6) The power supply is turned on.
7) The program + parameter and register (other data if necessary) to backup by ℵ are written in a
new PC10G module.
8) Time is set.
5-11
5.1.7. Self-diagnosis items and presumed (possible) causes
Error
code
Error Description Presumed (possible) main causes Counteractions, corrective actions
13 POWER DOWN Drop of 5V power voltage (1) AC input voltage out of the rated (1) Input the rated voltage.
in CPU module range (2) Replace the power module.
(2) Trouble of power module (3) Turn ON the RESET - START switch
(3) Instantaneous interruption of AC or re-switch ON the power.
power
21 PROGRAM Unmatching of program (1) Program memory was rewritten due to (1) Rewrite program
MEMORY SUM area data to sum check affect by external over noise, etc. (2) Replace CPU module.
CHECK ERROR data (2) Trouble of memory element
22 BATTERY VOLTAGE Voltage of lithium battery (1) Lithium battery is dead. (1) Replace the lithium battery.
DROP for memory back-up is (2) Lithium battery is not connected. (2) Connect the lithium battery.
weak.
23 ATTENDANT Unmatching of parameter (1) Program memory was rewritten due to (1) Rewrite parameter
INFOR- MATION area data to check sum affect by external over-noise, etc. (2) Replace CPU module.
SUM CHECK data (2) Trouble of memory element
ERROR
24 UNDEFINED Undefined command was (1) Write-processing was interrupted due (1) Rewrite program
INSTRUCTION detected while sequence to disconnection of the connecting (2) Revise and rewrite program.
program is in run. cable while program is being written (3) Rewrite program.
by the programmer. (4) Replace CPU module.
(2) Undefined command existed in writing
program by CPU Link.
(3) Program memory was rewritten due to
affect by external over-noise, etc.
(4) Trouble of memory element
29 EVENT MONITOR Event monitor data is (1) Event monitor start instruction and (1) Delete the event monitor start
ERROR error. [SYS 400] is used for CPU in which command [SYS400] in the program,
event monitor data is not written. and write the program again to CPU.
(2) Event monitor with improper setting Alternatively, set the event monitor
data is used. setting data properly, and write the
event monitor data to CPU.
(2) Set the event monitor setting data
properly, and write the event monitor
data to CPU.
5-12
Error
code
31 SCAN TIME Sequence program (1) Scan time timer value of parameter is (1) Set an appropriate scan time timer
OVER execution time has inappropriate. value.
exceeded the scan time (2) Sequence program processing time is (2) Correct the sequence program.
timer value set by excessive. (3) Correct the sequence program.
parameter. (3) Limitless loop structure is found in the
middle of sequence program.
32 SYSTEM RAM Data written in system (1) The system RAM was written due to (1) Turn ON the RESET-START switch or
ERROR RAM cannot be read affect by external over-noise, etc. reswitch ON the power.
properly. (2) Trouble of CPU module. (2) Replace CPU module.
35 SYSTEM CPU Abnormally long (1) Overrun of System Control Processor (1) Turn ON the RESET - START switch
ERROR processing time in due to affect by external over-noise, or re-switch ON the power.
System Control etc. (2) Replace CPU module.
Processor (2) Trouble of CPU module
36 WORD CPU ERROR Abnormally long (1) Overrun of System Control Processor (1) Turn ON the RESET - START switch
processing time in Word due to affect by external over-noise, or re-switch ON the power.
Processor etc. (2) Replace CPU module.
(2) Trouble of CPU module
39 SYSTEM "Factor-unknown (1) External over-noise was input. (1) Turn ON the RESET - START switch
INTERRUPTION interrupt" was input in the (2) Improper installation of CPU module or reswitch ON the power.
ERROR system control processor. (2) Exactly install CPU module.
3C I/O PORT ERROR Improper I/O port data in (1) Trouble of CPU module (1) Replace CPU module.
the system control
processor
5-13
Error
code
41 I/O RACK F USED

Rack No. selector SW (1) Setup error (1) Re-set Rack No. selector switch to
on Selector Module other than "F".
is set to "F".
I/O MODULE Occupied point (1) Poor mounting of I/O module (1) Mount the I/O module securely.
42 PARAMETER parameter in I/O (2) Failure of I/O module (2) Replace the I/O module.
ERROR module is abnormal. (3) Failure of base module (3) Replace the base module.
43 I/O MODULE Error occurred on the (1) Fuse of output module was broken. (1) Replace the fuse.
ERROR output module or (2) Trouble occurred on high-function (2) Refer to the instruction manual of
high-function unit (such module. each module and reset the fault.
as high speed counter)
which occupies I/O
address.
44 I/O ADDRESS BUS Parity error of address (1) Faulty connection of I/O cable (1) Exactly connect I/O cable.
PARITY ERROR bus was detected in (2) Disconnection of I/O cable (2) Replace I/O cable.
selector module. (3) Address data changed due to affect (3) Turn ON the RESET- START SW or
by external over-noise, etc. re-switch ON the power.
45 I/O RACK NO. The rack No. selector (1) Wrong setting. (1) Clear the overlap in the settings of the
OVERLAP switch on the I/O power rack No. selector switch.
module is set at 0 or
overlapped with
another rack No.
46 I/O ADDRESS Interference exists (1) I/O ADDRESS selector switch on the (1) Set I/O ADDRESS selector switch
OVERLAP between address area selector module is mis-set. properly.
which is occupied by
one I/O rack and other
address area which is
occupied by other I/O
rack .
5-14
Error
code
47 I/O POWER Drop of 5V power voltage (1) AC input voltage out of rated voltage (1) Input the rated voltage.
SUPPLY POWER at additional I/O Rack range was input in the power module. (2) Keep the setup sum of power
DOWN side. (2) Over-current consumption of I/O consumption of I/O module on the
module installed on the base base within the rated output current
(3) Trouble of power module in additional range.
I/O rack unit (3) Replace power module.
(4) Additional I/O rack power is not (4) Unify the CPU power source and I/O
switched ON despite that the power of power source to same line.
CPU rack unit is switched. (5) Turn ON the RESET-START switch or
(5) Instantaneous interruption of AC input reswitch ON the power.
power was detected at additional I/O (6) Install a power module on additional
Rack side only. I/O Rack side and wire 5V cable.
(6) Power module is not installed on
additional I/O Rack side and, in
addition, 5V cable not wired.
48 I/O TABLE The actual-install (1) Parameter mis-setup (1) Set parameter correctly.
VERIFYING ERROR condition of I/O module (2) Faulty mounting of CPU or selector or (2) Exactly mount the module.
4A differs that set up as I/O module (3) Mount proper I/O module.
parameter. (3) Wrong I/O module mounted. (4) Set rack No. correctly.
(4) Rack No. of selector module was (5) Exactly wire I/O cable.
mis-set.
(5) I/O cable wired improperly.
49 I/O ADDRESS Setup I/O address (1) Allocated I/O address exceeds "1FF". (1) Change I/O address allocation.
SETUP ERROR exceeds the specified (2) Trouble of I/O ADDRESS selector SW (2) Replace the selector module.
value. on selector module.
4B I/O MODULE Error occurred on the (1) Fuse blown in Output module. (1) Replace fuse.
ALARM output module or (2) Trouble occurred on the high-function (2) Refer to the instruction manual of
high-function unit (such module. each module and reset the fault
as high speed counter)
which occupies I/O
address,
5-15
Error
code
71 APPLICATION Operand value of applied (1) Operand value of applied command (1) Revise sequence program.
INSTRUCTION command and operation and operation result are out of the (2) Revise sequence program or data.
ERROR 1 result are out of the respective specified ranges.
respective specified (2) Different form of operation data (BCD,
ranges. BIN)
72 USER PROGRAM Stack area for sequence (1) User program calls itself within (1) Revise sequence program.
STACK-OVER program is short. (Stack subroutine.
for subroutine and
interrupt)
73 END INSTRUCTION No END command was (1) No END command in sequence (1) Add END command.
NOT EXECUTED executed while START program (2) Unify START commands into one
command is executed (2) Two or more START commands are command.
twice. contained in sequence program. (3) Revise sequence program.
(3) Program is such a structure as jumps
END command.
5-16
Error
code
74 START END command was (1) No START command is contained in (1) Add START command.
INSTRUCTION NOT executed without sequence program. (2) Revise sequence program.
EXECUTED executing START (2) Program is such a structure as jumps
command. START command.
75 MASTER CONTROL How to use MC command (1) Nesting of master control exceeds 16 (1) Keep the nesting within 16 multiple.
ERROR and MCR command is multiple. (2) Use MC command and MCR
wrong. (2) MC command and MCR command commandin pair.
are not a pair.
76 LABEL TABLE No LABEL command at a (1) JMP command available, but no (1) Revise sequence program.
ERROR selected jump destination LABEL command available at the (2) Revise sequence program.
jump destination.
(2) CALL command available, but no
LABEL command at the jump
destination.
77 PARAMETER Parameter setup value (1) Parameter memory was rewritten due (1) Rewrite parameter.
SETUP- VALUE out of the specified range to affect by external over- noise. (2) Rewrite parameter.
ERROR (2) Data out of the specified range was
written in writing para-meters by CPU
Link.
78 APPLICATION Applied command can not (1) Applied command was executed for (1) Mount special I/O module.
INSTRUCTION be executed normally for the slot wherein applicable special I/O (2) Replace special I/O module.
ERROR 2 special I/O module. module is not mounted.
(2) Trouble of special I/O module
79 FOR-NEXT ERROR FOR - NEXT command or (1) FOR command or FORN command (1) Use FOR command or FORN
how to use FOR- NEXT are available, but no NEXT command command and NEXT command in
are wrong. is available. pair.
(2) NEXT command is available, but (2) Use FOR command or FORN
neither FOR command nor FORN command and NEXT command in
command available. pair.
(3) FOR-NEXT command or nesting of (3) Keep the nesting within 128 multiple.
FOR-NEXT command exceeds 128
multiple.
5-17
Error
code
7A RET ERROR How to use CALL (1) CALL command is available, but (1) Use CALL command and RET
command or RET corresponding RET command not command in pair.
command is wrong. available. (2) Use CALL command and RET
(2) RET command is available, but command in pair.
corresponding CALL command not
available.
7B RETI error The configuration of the (1) The RETI instruction is not found at (1) Add the RETI instruction.
sequence interrupt the end of the sequence interrupt (2) Delete the RETI instruction.
program is wrong. program.
(2) The RETI instruction is used in the
program other than the sequence
interrupt program.
7C LIBRARY CALL How to use FB (Library) is (1) It is not Library-enabled (1) Revise sequence program.
ERROR wrong. (2) Library is already under execution.
(Library was called from inside the
library)
(3) Label Number is outside the scope
(4) Label Life is over
(5) Label Number is not matching
(6) SYS415 is not there
(7) It is not useable program number
(8) It is not useable operation pattern
Error in FB (library) (1) Sequence circuit of FB (library) is
wrong.
7D PRG. END PEND command (1) No END command is contained in (1) Add END command.
EXECUTION executed. sequence program. (2) Add RET or RETI command.
(2) No RET or RETI command is
contained in subroutine.
5-18
Error
code
7F INDEX ERROR Index register cannot (1) Application instruction relating to index (1) Index register was used for timer
be performed normally. was executed or index register was command.
used although index register is not
set.
(2) Out of area: Identifier was crossed
over in offset mode, or the identifier
crossed over a discontinuous address
with the same identifier.
(3) Index resister was used for timer
command
82 SPECIAL MODULE Abnormal value of (1) Faulty mounting of special module (1) Exactly mount special module.
PARAMETER ERROR memory capacity (2) Trouble of special module (2) Replace special module.
parameter in special (3) Trouble of base (3) Replace the base.
module
84 SPECIAL MODULE Error occurred in special (1) Error occurred in special module. (1) Reset ERROR in reference to the
ERROR module. (2) Faulty mounting of CPU or selector individual instruction manual for
module or special module. special module.
(3) The switch setting of special module (2) Exactly mount.
with rack no. selection switch is (3) Set up the rack no. selection switch of
wrong. special module correctly.
85 LINK PARAMETER Error of Link Parameter (1) Error in Link Parameter setup (1) Revise Link parameter.
ERROR
86 LINK Error occurred in (1) Error occurred in communication by (1) Reset ERROR in reference to the
COMMUNICATION communication by link link module. individual instruction manual for each
ERROR module. link module.
88 EXCESSIVE NO. OF The quantity of special (1) The quantity of special modules in use (1) Decrease the quantity of special
SPECIAL MODULES modules exceeds 15. exceeds 15. modules in use.
89 LINK MODULE Error in the first 4 bytes, (1) Error in link module allocation (1) Revise link module allocation
ALLOCATION of link module allocation parameters. parameters.
ERROR parameters.
5-19
Error
code
PROGRAM System memory short (1) Shortage of system memory (1) Write the sequence program again to
A0
OVERFLOW (2) Failure of CPU module CPU. Then, reset and start, or turn on
power again.
(2) Replace the CPU module.
RTC ERROR Abnormality is (1) System program is broken due to (1) Reset and start or re-close power
A3
generated at RTC. excessive noise from outside. source.
(2) Failure of CPU module. (2) Replace CPU module.
SYSTEM PROGRAM (1) System program is broken due to (1) Reset and start or re-close power
A6 Abnormality is generated
ERROR excessive noise from outside. source.
at system program.
(2) Failure of CPU module. (2) Replace CPU module.
SEQUENCE RAM Abnormality is (1) Data in sequence RAM is broken due (1) Reset and start or re-close power
A9
ERROR generated at sequence to excessive noise from outside. source.
RAM. (2) Failure of CPU module. (2) Replace CPU module.
SYSTEM Parameter recovery is (1) Battery is not charged enough. (1) Reset and start or re-close power
AA
PARAMETER ALARM executed. (2) Malfunction is occurred due to source.
excessive noise from outside. (2) Replace CPU module.
(3) Failure of CPU module.
BACK-UP MEMORY Writing error is (1) Malfunction is occurred due to (1) Reset and start or re-close power
AB
WRITE ERROR generated at backup excessive noise from outside. source.
memory. (2) Failure of CPU module. (2) Replace CPU module.
DATA ERROR (1) Battery is not charged enough. (1) Make reset and start or re-close
AD Recovery of sequence
(2) Data is erased due to excessive noise power supply after confirmation of
program and data
from outside recovered data.
memory is executed.
DATA ERROR (1) Confirmation of abnormality is not (1) Confirm data using peripheral
AE Abnormality is not
NON-CHECK implemented. equipment.
confirmed at the time
(2) Turn special relay “V5E” for program 1
abnormality is occurred.
to ON.
CLOCK NON- (1) Set built-in clock at correct time using
AF Built-in clock is not set. (1) Setting operation is not executed.
SETUP peripheral equipment.
(2) Battery is not charged enough.
5-20
5.1.8. Error check flow chart
Check start
Y
POWER
lamp ON
N
Y RUN
Y
Error code 13 Lamp ON
RESET-START
A
N N
Check input power
voltage Y Y
REPAIRED? ERROR
displayed
N
N D
Rated input N
voltage END
Y STOP Y
Commanded while
Keep input voltage with program RUN
in the rated range
N
Check current consumption of Y Stopping

operation by
each module on the base. peripheral
device
N N
Rated output
current Y Stopping
operation by LINK
Y
Keep the current
consumption of CPU Replace N
module and all other power module.
modules, which were
installed on the base, Replace CPU
at the rated output Y module
current or less. REPAIRED?
N
END Re-switch ON Search the
START or reason why
POWER after STOP command
Replace CPU module. resetting STOP. was used, and
revise program.
Y
REPAIRED?
N END
Replace the base
5-21
A
Y
ALARM displayed
B
N
N Revise program position of
START/END command
Program position OK? START/END command.
Y
I/OI/Oaddresses
addressesare
are allocated correctly?
correctly? Check
Checkthe
thehead
head
address
addressswitches
switches
of of
PARAMETER
PARAMETER and
and
Selector
Selector
Module.
Module.
N Revise the parameter.

Parameter OK
N
Head address SW OK?
Revise SW setup.
Judge which is the error output, ON or OFF, from applicable

cycle chart and electric circuit diagram
ERROR OUTPUT N
Lamp and monitor result by Replace OUTPUT
peripheral device match with module
one another
ERROR OUTPUT Y
Lamp and above judge match
with one another N
OUTPUT lamp ON?
N
Y
Monitor whether the input conditions are met,
from applicable electric circuit diagram. N External devices ON when
output terminal and COM
are short-circuited?
External devices turns ON
Y Specific when cables are disconnected
Y
conditions met? Y from output terminal?
N
N
Faulty Replace Faulty
external OUTPUT external
E F device module device
5-22
E F
Check whether Compare Conditionally

programmed per Dissatisfaction Input" lamp
with the monitor result by
applicable electric
peripheral device.
circuit diagram.
N Y
Program OK? Matching
Y N
Replace OUTPUT Revise Replace INPUT Faulty
Revise
module program module external
program
device.
Y Y
REPAIRED? REPAIRED?
N N
END END
Replace SELECTOR
Check affect by double output. module
Y
Y REPAIRED?
Affected
N Revise N
program END
Replace I/O module

Trouble of wiring and others
1. Faulty contact or disconnection of
I/O cable Y
-> (Securely connect I/O cable.) REPAIRED?
(Replace I/O cable.)
2. Base fault N
-> (Replace the base.) END
3. Faulty CPU module
-> (Replace CPU module.) Replace the base.
Y N Replace
REPAIRED? CPU
module
END
5-23
B
Check the error code at the special

register for storing error information.
Y
Error code AD
Y
Error code 22 N
AD
N Y
22 Error code AA
Y N
Error code 31 AA
N Y
31 Error code AE
Y N
Error code 48 AE
N Y
48 Error code AF
Y N
Error code 71 AF
N
71 Replace CPU
Y module.
Error code 78
N
78
Y
Error code 85
N
85
Y
Error code 86
N
86
Y
Error code 89
N
89
Y
Error code A3
N
A3
5-24
D G
Y Y
Error code 21 Error code 43
N N
21 43
Y Y
N N
23 44
Y Y
N N
24 45
Y Y
N N
31 46
Y
Y Error code 47
Error code 32
N
N 47
32
Y
Y Error code 48
Error code 35
N
N 48
35 Y
Error code 49
Y
Error code 39 N
49
N
39 Y
Error code 4B
Y
Error code 3C
N
N 4B
3C
Y
Y Error code 71
Error code 41
N
N 71
41
Y Error code 72
Error code 42
N N
42 72
G H
5-25
H I
Y Y
Error code 73 Error code 7F
N N
73 7F
Y Y
N N
74 82
Y Y
N N
75 84
Y Y
N N
76 88
Y Y
Error code 77 Error code A0
N N
77 A0
Y Y
Error code 78 Error code A6
N N
78 A6
Y
Error code 79 Y
Error code A9
N
79 N
A9
Y Y
Error code 7A Error code AB
N N
7A AB
Y Y
Error code 7B Error code AD
N N
7B AD
Y
Error code 7D
N Replace CPU
7D
module.
N 1. Faulty selector
module
REPAIRED?
2. Faulty base
Y
3. Replace each
I faulty I/O cable
END
5-26
21 Program memory 24 Undefined
sum check error instruction
N Unsupported applied Attendant information

command is used. 23 sum check error
Read out pro

Y
gram by Read out
peripheral device. parameters by
peripheral device.
N Program is
rewritten. *1 Parameter
N
rewritten?
Y
RESET · START Y
RESET · START
N
REPAIRED?
N
REPAIRED?
Y
Y
End
End
Write correct
program by Write correct
peripheral parameter by
device. peripheral device.
RESET · START
RESET · START
Y REPAIRED? Y
REPAIRED?
End N
End
N
Replace CPU
module. Replace CPU
module.
* 1 Possible to know error address from

error-related information.
5-27
RTC error A3 32 System RAM error*
System program error A6 35 System CPU error*

Sequence RAM error A9 36 Sequence word processor error
Back-up memory write error AB 39 System interruption error
3C I/O port error
Y This error
frequent ?
N 22
RESET · START Y
Is the connection
of a battery good?
Y N
REPAIRED?
N Connect a
END lithium battery.
N Y
CPU, selector
module, I/O module and I/O cable REPAIRED?
installed
N
Y
Install them Replace a
exactly. lithium battery.
Replace CPU
module.
Y
REPAIRED?
Y
REPAIRED?
N END
N END
Replace CPU
module.
1. Faulty selector module
2. Faulty base
3. Faulty I/O cable
4. Faulty I/O module
5. Faulty link module
6. Faulty power module.
* Against error codes 35, 32, re-switch ON the POWER.
5-28
41 46
I/O address
I/O rack F used overlap
Rack No. Check addresses

N
"F" is set in some occupied by each rack.
Rack.
Y
Set Rack No. other N Addresses
than "F". occupied by each rack
are overlapped.
*1
Y Y
REPAIRED?
Revise the setup
N END addresses so that they
do not over-lap.
Replace CPU
module. Y
REPAIRED?
N END
Y
REPAIRED?
N Replace CPU
END module.
Replace selector
module. Y
REPAIRED?
N
Y END
REPAIRED?
N Replace selector
END module.
Replace I/O
cable. Y
REPAIRED?
N
Y END
REPAIRED?
N Replace I/O
END cable.
Replace the base.

Y
REPAIRED?
N
END
*1 Possible to know Rack No. from
Replace the base.
5-29
45
I/O rack No. overlap
N
Is rack No. overlapped?
Set rack No. so that

it is not overlapped.
REPAIRED?
Y
N
End
Replace CPU
module.
REPAIRED?
Y
N
End
Replace selector
modules
REPAIRED? Y
N
End
Replace I/O cables.
REPAIRED? Y
N
End
Replace the base.
*1 Possible to know Rack No. from

5-30
47 I/O power supply power down Note; When two or more additional
I/O racks are used, check the rack
wherein selector module POWER
LED is OFF.
Additional Y
I/O Rack power module
exists?
CPU rack power Y
N module is switched ON earlier than
additional I/O rack power
5V.0V module.
Y
N Unify CPU rack power module
wired properly?
and additional I/O rack power
RESET · START into same line.
N
Y
REPAIRED?
Exactly wire 5V and 0V
cables. N
END
Check the input power voltage in
power module at additional I/O
Y rack side.
REPAIRED?
N Rated input
N
END voltage
Check input power voltage

Y Keep input
of power module. Check the current consumption of voltage with in
I/O modules in additional the rated range.
I/O rack.
N
Rated input N
voltage Rated output
Keep input current
Y voltage with in the Y Keep the current sumption
rated range
of I/O modules, which are
Replace power installed additional I/O rack
module in additional base, at rated output current
Check the current
I/O rack. or less.
consumption of CPU rack
and additional I/O rack I/O
modules Y
REPAIRED?
Y N END
Rated output
current
Replace selector module.
N
Disconnect 5V and 0V REPAIRED?

Y
cables and add power
module to additional I/O N END
rack. Replace CPU module.
Y
REPAIRED?
N END
Replace I/O cable.
REPAIRED?
Y
N END
Replace the base.
5-31
48 I/O table verifying error Possible to know Rack No. and Slot
No. which resulted in error, from the
error related information.
Read out the parameters of I/O
module types by peripheral device.
Actual-install Y
condition different from setup
parameter
N Setup Rack No. Y

of selector module differs from the
N CPU parameter.
Module installed Set correct
exactly? N
Rack No.
Exactly install Y
CPU module. Improper Y
Selector module installed
N
module installed exactly?
N
Install exactly. Y
Revise parameter. Install proper
module.
N
I/O cable wired exactly?
Wire I/O cable exactly.

Y
Y
I/O cable wired exactly?
N Install I/O module exactly.
Replace the module where in error

was found from the error-related
information. Y
Y
REPAIRED?
N END
Replace CPU module.
Y
REPAIRED?
N
END
Replace selector module.
Y
Y
REPAIRED?
N END
Replace I/O cable.
Y
REPAIRED?
N END
Replace the base.
5-32
43 I/O module error 42 I/O module
parameter error
4B I/O module alarm
Check which module is error, from
the error-related information.
I/O Y
Module installed
Check which module is error, from imperfectly?
the error-related information or I/O
N Install I/O
module "ALM" lamps.
module
exactly.
Error N Foreign
module is OUTPUT materials included in the I/O Y
module? module to base connecting
connector.
Y
Y N Remove foreign
Fuse blown matter.
Replace I/O
N Error
Y module.
module is OUTPUT
Replace the module?
fuse. Y
N REPAIRED?
Replace applicable Check error existence or N

module. non-existence, in reference to END
the individual instruction
manual for applicable module.
Replace CPU
Y
module.
REPAIRED?
N N
END Error finding Y
REPAIRED?
Y
Replace CPU N
module. END
Replace the base.

Y Reset the ERROR in to
REPAIRED? the individual instruction
manual for applicable
END N module. Y
REPAIRED?
Replace the base. N

END
Replace I/O
Y cable.
REPAIRED?
END N
Replace I/O
cable.
5-33
44 I/O address bus parity error 31 Scan time over
Y
This error frequent ? Read out scan time timer
value parameter by
Y peripheral device.
RESET · START
Y
REPAIRED?
N Too small
scan timer value
N END
Y
Check which rack is error, from the error-related
information or selector module "ERR" lamps. Revise scan time timer
value.
Y I/O cable Y
is exactly connected to REPAIRED?
applicable rack?
N
N END
Connect I/O cable Read out program by

exactly. peripheral device.
Y
REPAIRED?
Y
N Program is in loop.
END
Replace I/O cable which is N

connected to applicable rack.
Many applied Y
commands are executed with
Y in same scan.
REPAIRED?
N
N
END
Replace the selector module
in applicable rack. Replace CPU Revise
module. program.
Y
REPAIRED?
N
END
Replace applicable
rack base.
Y
REPAIRED?
N
END
Replace CPU
module.
5-34
71 Application instruction error 1
Y
PC 10 mode?
Error-related information (S1000 - S11FF)

N
(Error-detected step No., hexadecimal notation)
1: (Step No. lower digits)
3: (Step No. upper digits)
Error-related information(S200 - S24F) 4: (Step No. upper digits)
(Error-detected step No., hexadecimal 5: (Serial No. lower digits)
notation) 6: (Serial No. lower digits)
1: (Step No. lower digits) 7: (Serial No. upper digits)
2: (Step No. upper digits) 8: (Serial No. upper digits)
3: (Serial No. lower digits)
4: (Serial No. upper digits)
Error-related data is converted into decimal

Error-related data is converted into notation
decimal notation 4 3 2 1
2: (Step no. upper digits) 1: (Step
No. lower digits)
(Hexa-
decimal)
(Decimal)
(Step No. is decimal.)
(Decimal)
Display the circuit specified by the step

No. of the peripheral device.
(1) The operand value (data range,

data number and so on) for the
application instruction specified by
the circuit display is beyond the
specified range)
(2) Operation data format

(BCD, BIN and so on) is wrong.
Prohibited items for the application

instruction are written in the
programming manual. While referring
to it, correct a wrong circuit.
5-35
72 User program AD Data error
stack-over
AE No check data error
Read out sequence program
by peripheral device.
Confirm
restoration data.
N Y
Subroutine in use
OK
Y N
Modify data.
N User program
calls itself within
subroutine.
Y Turn on “V5E”.
Revise the
program.
RESET-START
Y
REPAIRED?
END
N
END
Replace CPU
module.
AF Clock not set
Set the time in built-in clock

by the peripheraldevice.
END
5-36
START instruction
73 END instruction not executed 74 not executed
Read out sequence program by Read out sequence program by

peripheral device. peripheral device.
N No N No
END command START command
Y Y
Add END Add START

ommand command
Y Y
REPAIRED? REPAIRED?
N N
END END
N Two or N Program
more START commands Structure such as jumps START
exist. command.
Y Y
Reduce START commands

to one command.
Revise the
program.
Y Y
REPAIRED? REPAIRED?
N N
END END
Program Replace CPU

N
structure such as jumps END module.
command
Revise the
program.
Y
REPAIRED?
N
END
Replace CPU
module.
5-37
75 78 Application instruction error 2
Master control error
Possible to know applicable
applied command which
resulted in error, from the
Read out sequence program by error-related information.
peripheral device.
N Special module
corresponding applied command
not available.
N The nesting
of master control exceeds Y
16 multiple.
*1 Install applicable special
Y
module.
Keep the nesting
within 16 multiple. Y
REPAIRED?
Y N
REPAIRED?
END
N Error
END N
exists in applied command
operand and data.
N MC command
and MCR command are Y
not in pair.
*1 Replace applicable
Y
special module.
Revise the program so that
MC command and MCR
command become a pair. Error exists in applied
command operand and
data. Correct them.
Y
Replace CPU
module. REPAIRED?
N END
Replace CPU module.
Y
REPAIRED?
N END
Replace I/O cable
Y
REPAIRED?
N END
Replace the base.
5-38
79 FOR-NEXT error 7A RET error

N FOR command
N CALL
or FORN command and NEXT command and RET command
command are not in pair. not in pair.
*1 *1
Y Y
Correct the program so that FOR Correct the program so that CALL
command or FORN command and command and RET command
NEXT command become a pair. become a pair.
Y Y
REPAIRED? REPAIRED?
N N
END END
The nesting
N of FOR-NEXT or FORN-NEXT Replace CPU
exceeds 128 multiple module.
*1
Y
Keep the nesting at

*1 See the error-related information.
128 multiple or less.
Y
REPAIRED?
N
END
Replace CPU
module.
5-39
7B RETI error
Read out sequence program by

peripheral device.
Y Is there a RETI
instruction at the end of
interrupt program?
*1
N
Add a RETI
instruction.
Y
REPAIRED?
N
End
N Is there a RETI
instruction anywhere other than
at the end of interrupt
program?
*1
Y
Delete the RETI

instruction
Y
REPAIRED?
N
End
Replace CPU
module.
*1 See the error-related information.
5-40
7D PRG. END execution 76 Label Table error

N N LABEL
command corresponding to
No END command JMP command not
available.
*1
Y Y
Add END Correct the program so that JMP

command. command and LABEL command
correspond to one another.
Y
REPAIRED?
Y
REPAIRED?
N
END
N
END
N Program
structure such as jumps LABEL
END command
N
command corresponding to
CALL command not
Y available
*1
Y
Correct the
program. Correct the program so that CALL
command and LABEL command
correspond to one another.
Y
REPAIRED?
N Y
END REPAIRED?
N
END
N No RET
command exists in
subroutine. Rewrite program and
parameter.
Y
Add RET Y
command. REPAIRED?
N
Y END
REPAIRED?
N Replace CPU
END
module.
Replace CPU
module.
*1 see the error-related information.
5-41
77 Parameter setup-value error 49 I/O address setup error
Read out sequence program Check which module is error, from

by peripheral device. the error-related information.
N Parameter I/O Y
value out of the specified address allocation
range exceeds "1FF".
Y N
Set I/O address

Correct and write Replace selector
allocation so as not to
parameter value. module.
exceed "1FF".
Y Y
REPAIRED? REPAIRED?
N N
END END
Replace CPU
Replace CPU module.
module.
Y
REPAIRED?
N
END
Replace I/O cables

in sequence.
Y
REPAIRED?
N
END
Replace the base.
5-42
Excessive No. of
88
special modules
Check the quantity of

special modules in use.
N The quantity
of special modules in use
exceeds 24 modules.
Reduce the quantity

of special module in
use.
Y
REPAIRED?
N
END
Replace CPU
module.
Y
REPAIRED?
N
END
Replace selector
module.
Y
REPAIRED?
N END
Replace the base.
5-43
82 Special module parameter error 84 Special module error
Check which module is error, from Check which module is error, from
the error-related information. the error- related information or
special module ERROR
N Special Check error existence or non-existence,

module installed in reference to the instruction manual for
imperfectly. applicable module.
Y
Y Reset ERROR, in
Install special module Error exists.
reference to the instruction
exactly. manual for applicable
N module.
Y
REPAIRED? Check the respective installed condition of
CPU module, selector modules, I/O
N modules, special modules, and I/O
END cables.
Y
N Foreign matter Error exists. Install exactly.
is included in connector which
connects special module N
to the base.
Y
Replace CPU
module.
Remove foreign
matter.
Y
REPAIRED?
Y N
REPAIRED? END
Replace selector
N END modules in sequence.
Replace special Y
REPAIRED?
module.
N
END
N
REPAIRED? Replace the base.
Y
END REPAIRED?
N
END
Replace I/O cables
in sequence.
5-44
85 Link parameter error 89 Link module allocation error
Check which link module Check which link module

is error, from the is error, from the error-
error-related information. related information.
Correct the link Correct the link module

parameter of allocation parameter of
applicable module.
applicable module.
86 Link communication error

AA System parameter
alarm
Check which link module
is error, from the
Reset ERROR, in
reference to the individual Y Is this error
instruction manual for frequently occurred?
applicable link module.
N
Reset · start
Y
REPAIRED?
N
Replace battery. END
Y Is battery charged
Y
REPAIRED? adequately?
N N
END
Charge battery.
Replace CPU
module.
Y
REPAIRED?
N
END
5-45
29 Event monitor error
7C Library call error
Y Event monitor Check whether the

function is used. application command error 71
or 78 is present before the
N error 7C.
If it is present, it is "error in
Delete the event monitor start the circuit in library".
command [SYS 400] in the
program and write the program
again to CPU. Y
Error code 71
Alternatively, set the event
monitor setting data properly, N
and write the event monitor 71
data to CPU. Y
Error code 78
N
78
Set the event monitor
setting data properly, and
write the event monitor Check by error-relating information to which
data to CPU. classification below the error belongs. Also
check the type of library (FB library, user
library, and standard library).
(1) Library is not enabled.
(2) Library is already being executed. (Library
was called from inside the library.)
(3) Label number is out of range.
(4) No label command is available.
(5) Label number does not match.
(6) SYS415 is not available.
(7) Not a usable program number.
(8) Not a usable operation pattern.
Correct the sequence program so that the

target library does not correspond to 1 - 8.
It is also possible that some inappropriate
library is used. Check the library being written
to and write a correct library.
5-46
7F
Index error
Y
PC10 mode?
Error-relating information (S1000 – S11FF)

N
(Hexadecimal display of step number of
which failure is detected)
Error-related information (S200 - S24F) 3: (Step No. upper digits)
(Error-detected step No., hexadecimal 4: (Step No. upper digits)
notation) 5: (Serial No. lower digits)
1: (Step No. lower digits) 6: (Serial No. lower digits)
2: (Step No. upper digits) 7: (Serial No. upper digits)
3: (Serial No. lower digits) 8: (Serial No. upper digits)
4: (Serial No. upper digits)
Error-related data is converted into decimal notation

Error-related data is converted into decimal
notation 4 3 2 1
2: (Step No. upper digits) 1:(Step No. lower digits)
(Hexa-
decimal)
 (Decimal)
 (Decimal) (Step No. is decimal.)
Display the circuit specified by the step

No. of the peripheral device.
A0 Program over
(1) Application instruction relating to index

was executed or index register was Write the sequence program again to
used although index register is not set. CPU. Then reset and restart, or turn
(2) Out of area: Identifier was crossed on power again.
over in offset mode, or the identifier
crossed over a discontinuous address
with the same identifier. Y
(3) Index register was used for timer REPAIRED?
command.
N
END
How to use is described in "index register" of
this manual. Refer to it and correct the
circuit. Replace CPU
module.
5-47
5.1.9. I/O module trouble analysis
This paragraph describes trouble items in input circuits and output circuits, and the method of corrective
actions to be taken against them.
EX.) (LS1) (LS2) Y020
X000 X001
(1) How to search error content
Y020
When the output load of OUTPUT module fails to turn ON ;
Output load fails to turn ON.
OUTPUT N
module "RUN" LED is
lighting?
Y ON Output
Status monitor ON?
Y
Fuse is blown? OFF
Replace OUTPUT
N INPUT N
module fuse. Module "RUN" LED is
The external N lighting?
supply power of OUTPUT
What V is the
Fuse blown even module is
Y voltage between INPUT
OV
connected?
after replacement. module and COM
Y terminal?
Connect the external
Check input
supply power line.
signal for OFF
Check rush current
when loads turns ON Faulty INPUT
simultaneously under Power N module.
maximum condition. voltage for loads is
applied?
Check the
I/O address N
N Y power wiring allocation parameter
Rush current
is within the specification for loads correct?
range of OUTPUT and reset the
module? power line. Y
Y Correct the
parameter.
Check and reset the Power voltage OV
for loads is applied?
wiring to each load
and load itself.
Supply power
voltage voltage for
Change output load
relay No. and keep Check and reset
the simultaneous Faulty OUTPUT Check and reset
ON current of loads the wiring to loads Please contact external wirings and
module. and each load us. external input
under maximum devices.
condition at the Replace it. itself.
specified current
and less.
<Note 1> Against fuse blown in OUTPUT Module, CPU outputs error code "43".
<Note 2> "RUN" LED is lit by internal circuit after insulated by photo coupler. Therefore, it does not light even when
voltage is applied thereto from an external input terminal, unless DC5V power voltage is applied thereto.
Insulation by "RUN" LED

IN Input photo coupler Internal
Circuit circuit
COM DC5V
5-48
(2) Input circuit troubles and corrective actions
Phenomena Causes Corrective actions and measures

EX. 1 Input signal Leak current from two-wire sensors Insert a bleed resistor between
OFF fail (proximity switch, photo switch) and limit the terminals of input module to
switch with LED. divide leak current in external
device and to there by reduce
DC input input current to the input
Leak current Module module.
AC input
* Bleed resistor Module
~
Input current < Input module

OFF current
Or use a limit switch with less
leak current
EX. 2 Input signal Drive power cable is wired in parallel to Isolate the drive power cable.
OFF fail input signal cables and, as a result,
over-noise is continuously transferred into
the line. And the noise can not be
removed even by noise removal circuit in
the input module.
5-49
* On previous page: How to decide bleed resistance
Input device
Assuming input device current at OFF to be I,
IN terminal-COMMON voltage at this time is determined
as follows;
Current I
COM V = I x 3.4 [kΩ] (Input resistance).
The input device does not turn OFF unless this V
value meets OFF voltage 7.2 [V] and below.
For that, connect a bleed resistor to there by reduce
input impedance.
IN
I = Leak current of device [mA]
COM R = bleeder resistance value [kΩ]
W = W-number of bleeder resistor [W]
Bleeder resistance value is OK if it is such a value that terminal-COMMON voltage V comes to 7.2[V]
or less.
3.4 x R
From [kΩ] × I ≤ 7.2 [V]
3.4 + R
24.5
R≤ [kΩ]
3.4 x I - 7.2
Also, W-number of resistor is determined as follows.
(24 [V])2
From W≥ x 2 (margin)
R (kΩ)
1.15
W≥ [W]
R
EX.) At leak current 5 [mA].
24.5
From R≤
3.4 x I - 7.2
R ≤ 2.5 [kΩ]
R = 2.4 [kΩ ]assumed. W-number of bleeder resistor:
1.15
From W≥ [W]
R
W ≥ 0.48 [W]
W-number comes to
1
W= [W]
2
5-50
(3)Output circuit troubles and corrective actions
Phenomena Causes Corrective actions and measures

EX. 1 Output Rush current of incandescent bulbs To restrain rush current, flow the dark
transistor current equivalent to 1/3 –1/5 of the
breaks down. rated current of incandescent bulb.
(Transistor OUT L +
output) Output module (-)COM
-
COM OUT L
Dark current +
-
On occasion, 10X or more rush COM(-)
current flows across the bulb
momentarily at lighting.
EX. 2 When an When loads connected to same Take a proper measure not to allow
inductive load fuse are starte-simultaneously, the the total start in current of loads,
is connected, total starting current exceeds which are started simultaneously, to
output module significantly the fuse rating. exceed the fuse rating.
results in Fuse
blown.
EX.3 Output Voltage was compulsorily applied to Avoid how to check as described left.
Transistor a load from another power source Even when E1 input voltage is turned
Breaks down. to check the wiring of output signal OFF, current flows a diagrammed left
Transistor cables. though depending on power source.
output
module Another power source
+ E2
Load
+
E1
5-51
5.2. Error report from COMPUTER-LINK
This module counteracts by non-response or error response when being unable to response
normally to command from host COMPUTER.
(1) Non-response
In the following case this module does not send response respond.
•When start code "::" cannot detect in received data.
•When command code "?" cannot detect in received data.
•When end code "CR" cannot detect in received data.
•When station No. is different from own station No.
•When response time(RI) cannot detect correctly.
(2) Error response

This module sends response in the following format to host COMPUTER when it detects any of
error which are detailed in Appendix 1 [Error codes].
AD AD RI EC EC SC SC CR
: : (H) (L) % (H) (L) (H) (L)
Hexadecimal two-digits Error Codes
5.2.1. Case of non-response
No. Possible causes Actions
Match baud rate of this module with that of host

1 Baud rate setup error
COMPUTER.
Different communication data type of host Select proper communication data type of host
2
COMPUTER. COMPUTER.
Station number setting of built-in Adjust the station number setting of built-in
3 computer link is different from station computer link, or correct the channel number
number of host COMPUTER. designation in host COMPUTER command.
Connection error or disconnection of

4 Check the cable for polarity and disconnection.
communication cable.
No START code “:”, “:” in command data

5 Prefix “:”, “:” to command head.
of host COMPUTER.
No END code “CR” exits in command

6 Affix “CR” to last digit of command.
data of host COMPUTER.
Transmission – receiving switching of the

Switch host COMPUTER to RECEIVE READY
7 communication circuit is not executed by
after transmitting of command.
host COMPUTER.
5-52
5.2.2. Case of error response
(1) Error Code 01

Incorrect command data format of host
1 Correct the command format.
COMPUTER
(2) Error Code 03

Incorrect selection of address in command
1 Reselect correct address in the command.
data of host COMPUTER.
(3) Error Code 05

The number of transfer data in the
1 Correct the number of transfer bytes in the
command data of host COMPUTER is 0 or
command.
exceed 256 bytes.
(4) Error Code 0A

Communication data break by noise, etc. Check that communication cable is exactly
1
connected or the cable and strong power
cable are not close to one another.
(5) Error Code 0D

Error of sum check data that was created by
1 Correct sum check data.
host COMPUTER.
2
(6) Error Code 0E

Write or scanning restart permit were After executing WRITE PERMIT by “EWR”
1
attempted without setting up WRITE command or scanning restart permit,
PERMIT by “EWR” command or without perform write or scanning restart.
executing RESTART PERMIT setup.
5-53
(7) Error Code 13

TOYOPUC-CPU interface error. Check that CPU and computer link module
1
are exactly connected.
Execute RESET-START. If the display LED
2 Error of the built-in computer link.
displays same error even after this execution,
replace the built-in computer link.
3 Error of the link parameter. Check the link parameter setup.
(8) Error Code 20

Error of communication command in
1 Check communication command.
command data of host COMPUTER.
(9) Error Code 21

1 CPU reset under processing. Re-send the command.
(10) Error Code 22

“RDM” command was sent without setting Set up address by “RDA” command before
1
up address by “RDA” command. reading it by “RDM” command.
(11) Error Code 31

Program write was attempted while Write program after having stopped sequence
1
sequence program is in run. program run by “HLT” command, “PSC”
command, etc.
5-54
(12) Error Code 32

Scanning Stop Reset is not executed by Execute “STA” command after having
1
“RUN” command. executed Scanning Stop Reset by “RUN”
command.
Scanning Stop command (STOP) is output Execute “STA” command after having reset
2
from peripheral equipment such as Scanning Stop command (STOP) from
program, etc. peripheral equipment.
(13) Error Code 34

Read and write of sequence program and Sequence program and subsidiary
1
subsidiary information are prohibited. information read and write by peripheral
equipment, etc.
(14) Error Code 35

Reset the limit setup by device that has
1 No execution right.
limited execution right.
(15) Error Code 36

Reset the limit setup by device that has
1 Execution right limit is set up.
limited execution right.
(16) Error Code 38

2 2
E PROM write is interlocked. Reset E PROM write interlock.
1
(17) Error Code 39

I/O allocation parameter changed.
1 Operate CPU RESET-START switch.
5-55
(18) Error Code 3C

1 CPU hardware error. Check the operation of CPU.
(19) Error Code 3D

Sequence program and subsidiary
1 Rewrite them.
information were written simultaneously
from peripheral equipment or other link.
(20) Error Code 3F

Device address instructed by timer and
1 Check device address.
counter, etc. does not exist in sequence
program.
5.2.3. Other cases
(1) The format of response from this module to host COMPUTER is not proper.

Other station sent response while one Review the timing of command sending to
1
station is sending response. each station in host COMPUTER.
Host COMPUTER has become ready for Set up response time according to the
2
receiving after this module sent response. processing speed of host COMPUTER.
(2) Host COMPUTER receives, as is, data that sent as command to station.

Transmission-receiving switching of the Control the circuit at host COMPUTER side.
1
communication circuit in host COMPUTER
is not executed.
(3) Sum check error occurs at host CPU side.

1
5-56
5.3. Error report from PC-LINK
When detecting an abnormality in PC-LINK, inform CPU of the abnormality. CPU not only displays an
error message but also sets a special relay, a register for outputting CPU error information, and a
special register for a link error information.
5.3.1. Error display
(1) The special relay associated with the link
Address Content
VA1 Link1 Parameter abnormality

VAD Link4 Parameter abnormality
VB1 Link5 Parameter abnormality
VBD Link8 Parameter abnormality
VA2 Link1 Communication abnormality
VA6 Link2 Communication abnormality
VAA Link3 Communication abnormality
VAE Link4 Communication abnormality
VB2 Link5 Communication abnormality
VB6 Link6 Communication abnormality
VBA Link7 Communication abnormality
VBE Link8 Communication abnormality
VC4 Special module abnormality(failure of a communication module)
VC8 I/O configuration abnormality

(over 25 sheets of communication modules are mounted)
VF2 Special module layout abnormality
(lack No., slot No. and link module name of the link parameter are different from
those in a mounted state.)
Note) The addresses of the above special relay are those in PC2 compatibility mode and PC3/PC10
mode (data memory split mode). (Please refer to “8.5.”.)
5-57
(2) Link error code
Link error code is stored in the CPU special register.
CPU The address of The content of
Abnorm
(link) CPU special the address
The error content Corrective action ality
error register to store stated in the left
lank
code error information column.
85 S3x0 1001 (link parameter abnormality) Setting is not

S3x1 0082 carried out in BCD (master and slave-
(01) stations)
85 S3x0 1001 (link parameter abnormality) Values other
S3x1 0083 than 0.1 are set in master and
(01) Slave-stations.(master and slave-station)
85 S3x0 1001 (link parameter abnormality) The total
S3x1 0085 number of diverted bytes is over 65 bytes. Check and modify
(01) (master and Slave-stations) the content of the
S3x0 1001 (link parameter abnormality) Exceeding link parameter. Alarm
85
S3x1 0086 the final address of communication area. Check the setting.
(01)
(master and Slave-stations)
85 S3x0 1001 (link parameter abnormality)
(01) S3x1 0087 Link area overlaps Real I/O.
S3x0 1001
85 S3x1 0088 Sending points per one station exceed 48
(01) S3x2 Slave station bytes.
address(62∼70)
S3x0 10*0 (connecting sequence error with * station
86 S3x1 00D0 of the Slave-station)
(*0) S3x2 (L) Slave station Vertical parity exists in a received data
address(62∼70) from the Slave-station. (master station)
86 S3x1 00D1 of the Slave-station)
(*0) Slave station Negative response from the Slave-station.
address(62∼70) (master station)
S3x0 10*0
S3x1 00D2 (connecting sequence error with * station
86 of the Slave-station) Check whether * station
(L) Except address
(*0) data Received an address data that had not of the Slave-station is
S3x2 been expected. (master station) connected, or check the
(H) Receive data order of power supply. Alarm
S3x0 10*0 (connecting sequence error with * station Check the setting
86 S3x1 00D3 of the Slave-station) Check the wiring of
(*0) S3x2 (L) Slave station No response from * station of the communication wires.
address(62∼70) Slave-station. (master station)
S3x1 00D6 of the Slave-station)
86
Horizontal parity error exists in the
(*0) S3x2 Slave station received data from the Slave-station.
address(62∼70) (Master station)
S3x1 00D8 of the Slave-station)
86
S3x2 No horizontal parity data has not been
(*0) Slave station sent from the Slave-station. (Master
address(62∼70) station)
A code indicating the link No. of PC link that occurred an error is put into x in the table.
Code table for links No
Link no. 1 2 3 4 5 6 7 8
X (link No. code) 1 3 5 7 9 B D F
Note 1) * indicates the Slave-station No.
5-58
CPU The address of
The content of the Abnorm
(link) CPU special
address stated in the left The error content Corrective action ality
error register to store
column. lank
code error information
S3x0 10*1
S3x1 00D7
The address of the
(L) Slave-station(62∼70)
S3x2 The received data
(H) (the byte number from the
master to the sub) In * station of the Slave-station
The received data the number of input-output bytes Check the content
86
(the byte number from the is different from that of the master of the link Alarm
(*1)
(L) sub to the master) station. (master and parameter.
S3x3 The data set in the local Slave-station)
(H) station (the byte number
from the sub to the
master)
The received data
S3x4 (L) (the byte number from the
sub to the master)
S3x0 10*2 Response from * station from the Check the content
86 S3x1 00D9 Slave-station that is not set up in of the link
Alarm
(*2) S3x2 (L) The address of the the connective sequence. parameter of the
Slave-station(62∼70) (master station) Slave-station.
S3x0 10*9
S3x1 00D4 The connective sequence was
(L) Select a communication not carried out with * station of
the Slave-station. Check the content
S3x2 flag (1-7 stations)
of the link
(H) Select a communication
parameter of the
86 flag (8-15 stations) When multiple stations were set master station. Alarm
(*9) Completion flag of the in one Slave-station, a normal The normal
(L) connective sequence sequence started though there sequence doesn’t
S3x3 (1-7 stations) were some stations where the start even
(H) Completion flag of the connective sequence had not
connective sequence been completed. (Slave-station)
(8-15 stations)
S3x0 1008 10 minutes after the completion of Check an error
86
S3x1 00D5 the normal sequence. code of the master Alarm
(08)
(Slave-station) station.
S3x0 10*4 (the normal sequence error with *
86 S3x1 00E8 station of the Slave-station)
(*4) S3x2 (L) Slave station address Vertical parity exists in the
(62∼70) received data. (master station)
S3x1 00E1 station of the Slave-station)
86
S3x2 (L) Negative response from * station
(*4) Slave station address
of the Slave-station (master
(62∼70) station) Check shear in
S3x0 10*4 to* of sub station Alarm
(the normal sequence error with *
S3x1 00E2 station of the Slave-station)
86
(L) Except address data Receive the address data that
(*4)
S3x2 (62∼70) was contrary to the expectation.
(H) Receive address (master station)
86 S3x1 00E3 station of the Slave-station)
(*4) S3x2 (L) Slave station address No response from * station of the
(62∼70) Slave-station (master station)
Code table for links No.
Link no. 1 2 3 4 5 6 7 8
X (link No. Code) 1 3 5 7 9 B D F
Note 1) * indicates the Slave-station No.
5-59
CPU The address of The content of
Abnor
(link) CPU special the address
The error content Corrective action mality
error register to store stated in the left
lank
code error information column.
86 S3x1 00E7 station of the Slave-station) Parity error
(*4) exists in the horizontal parity received
S3x2 Slave station from * station of the Slave-station.
address(62∼70) Check whether wires
(Master station)
are securely connected
S3x0 10*4 (the normal sequence error with * Alarm
in * station of the
S3x1 00E6 station of the Slave-station) Slave-station.
86
(*4) S3x2 No data of the horizontal parity sent
Slave station from * station of the Slave-station
address(62∼70) (master station)
86 S3x0 1007 No data of the normal sequence was
Check the error code of
(07) S3x1 00E4 sent from the master station. (Slave Alarm
the master station.
sequence)
Check and modify the
89 Setting error of lack No., slot No. and
content of the link Alarm
link module name of the link parameter
parameter.
Supply power again or
turn on a reset start
Abnormality of the module hardware. switch of CPU,
84 Alarm
Interface abnormality with CPU module. however, if an
abnormality still occurs,
replace the link module.
Note 1) Code table for links No.

Link no. 1 2 3 4 5 6 7 8
Note 2) The address of the Slave-station in the table is as follows.

The address of the The address of the
The Slave-station No. The Slave-station No.
Slave-station Slave-station
62 The Slave-station 1 6A The Slave-station 9
63 The Slave-station 2 6B The Slave-station 10
64 The Slave-station 3 6C The Slave-station 11
65 The Slave-station 4 6D The Slave-station 12
66 The Slave-station 5 6E The Slave-station 13
67 The Slave-station 6 6F The Slave-station 14
68 The Slave-station 7 70 The Slave-station 15
69 The Slave-station 8
Note 3) * indicates the Slave-station number.

Note 4) The above addresses of special register are for PC2 compatibility mode and PC3 mode (data
memory split mode).
5-60
(3) Special register for link error information output.
The link error code is composed of 8 step shift register and is able to store up to 8 times.
When exceeding 8 times, it is deleted from old data.
The address to store an

Link No. error. Address Content
1 S310 ∼ S31F S3x0 Error code
2 S330 ∼ S33F S3x1
3 S350 ∼ S35F S3x2
The error of detail
4 S370 ∼ S37F S3x3
5 S390 ∼ S39F S3x4
6 S3B0 ∼ S3BF
S3x5 Error code stack No.1 New
7 S3D0 ∼ S3DF S3x6 2
8 S3F0 ∼ S3FF S3x7 3
S3x8 4
S3x9 5
S3xA 6
S3xB 7 Old
Note) Code for link No. of PC link that caused an error is put in x.

Link No. 1 2 3 4 5 6 7 8
(4) Inform abnormality of the separated Slave-station.

If the separated Slave-station can’t respond to the master station because of power supply failure and
the like, communication abnormality doesn’t occur. Each data of an communication area remains
OFF and the error code of communication can’t be stored.
5-61
5.3.2. Error check flow chart for PC-LINK
Start
Does abnormality
Doesn’t occur
occur?
Occur
A
S3x0
=10*0 =10*1 =10*2 =10*9 =1008 =10*4 =1007
=1001 B C D E F G H
S3x0
=0082 =0083 =0085∼88
Set the link parameter code Specify the master (1)Link area
in BCD again to get the and Slave-stations (2)Check whether the link points
right one. again. (byte number) is right or not.
A code indicating the link No. of PC-link that occurred an error is put into x.
Link no. 1 2 3 4 5 6 7 8
x(link No. code) 1 3 5 7 9 B D F
Note 1) “*” indicates the Slave-station No.
5-62
A B
Check whether → Clear the Communication abnormality

separation is separate register in the connective sequence
carried out. with the Slave-station.
Y Supply power to the master

Repaired? station again.
N
End Abnormality N
occurs
Exchange modules. Y End
(1) Is power supplied to the Slave-station? → Supply power to the Slave-station.

End (2) Is the Slave-station number right? → Set the Slave-station number again
to get the right one.
(3) Is communication speed → Set it to the right baud rate.
(baud rate) right?
(4) Is wiring right? → Distribute wires properly.
A table for the separate register

Separate
link No. register
1 S31C Y
Repaired?
2 S33C
S35C N
3
End
4 S37C
5 S39C
Exchange modules
6 S3BC
7 S3DC
8 S3FC End
5-63
C E
In the Slave-station the number

of input-output bytes is different
from that of the master station.
D
→ Set a right link parameter.
(1) Is the link parameter of the master station right? → Set the link parameter of the master
station again to get the right one.
(2) Is the Slave-station number right? → Set the Slave-station number again to
get the right one.
Y
Repaired?
N
End
Exchange modules
End
5-64
F H
The normal sequence doesn’t The normal sequence from

start after the connective the master station can’t be
sequence terminates. transmitted.
Check whether the master station is

normal?
Communication abnormality in the Connective

sequence with the Slave-station.
Is power supplied to the → Supply power to the

Slave-station? Slave-station.
Is wiring right? → Distribute wires properly.
Supply power again.
Y
Repaired?
N
End
Replace modules
End
5-65
5.4. Error Codes Used by the FL-net
If the FL-net module finds an error, it indicates a two-digit error code on the LED display at the front and
warns the CPU module of the error.
The CPU module sets special relays, error information output registers, and link error information output
registers according to the content of the error.
5.4.1. Error Codes
If the FL-net module finds an error, it informs CPU of abnormality that abnormality is detected and
stores a detailed code of abnormality since S3x0. When the communication cannot be normally
performed, check for error code. Refer to “5.4.2.2.(2) Special Registers (4) Link error Information
Output Resisters
Error
Content of error Cause and remedy
code
Preset link parameters if not preset. If all link parameters have been
preset, rack No. or slot No. as link parameter may not correspond
with the actual position.
E5 Link parameters not preset
A link parameter has a wrong value.

A wrong link parameter
E6 Read the link error information register and take corrective action as
value
described in the next section.
This error occurs when a node with the same node No. with your
module has participated in the communication before your module's
E7 Node No. duplicated attempt to participate.
Check the node Nos. of your module and that node as link
parameters.
For the FL-net data link communication, data is transmitted and
Common memory received via the 'common memory,' a virtual memory space shared
E8 transmission area address by all nodes participating in the communication.
duplicated (relay link) Transmission area for a node on the common memory should not be
overlapped with that for another node. If another node has been
transmitting data to the area part or whole of which is overlapped
with transmission area for your module before your module's
Common memory
participation, E8 (relay link area overlap) or E9 (register link area
E9 transmission area address
overlap) appears.
duplicated (register link) Check transmission area settings for the module and that node in
accordance with 9.7.10.1 (4)-6 'Data Link Parameters.'
5-66
Token monitor time-out occurs when all data cannot be transmitted
from your module within the token monitor time-out time specified as
link parameter on 'Network' window.
Check 'Auto' for token monitor time-out time or increase the preset
value.
EA Token monitor time-out
This error occurs when a link area out of the data register area in
the CPU module is specified.
Data register area For example, the PC2J-CPU has data registers at D0000 to D0FFF
Ed
overflow and, if a link area out of this area is specified, error code Ed
appears.
Check the link area address.
Upon power-up or reset/start-up, the FL-net module automatically
checks that data can be normally transmitted and received. This
error code appears if the module fails in the test.
In this case, the test is automatically repeated until successfully
completed.
Communication starts after acceptable test results are obtained.
Check the following items in accordance with 2.4.5' Wiring of
FL-net/Ethernet/FL-remote controller '
(1) Is the LAN cable connector firmly connected to the module?
(2) Is the LAN cable connector firmly connected to the HUB?
(3) Any cut wire or short circuit in the LAN cable?
Is the transceiver cable connector firmly connected to HUB
and locked with fitting?
(4) Is the transceiver cable connector firmly connected to HUB and
-- locked with fitting?
-- Failure in loop back test (5) When it is being used carrying out stack of HUB, in the
-- connection between HUB(s) correct?
(6) Is the transceiver cable connector firmly connected to the
transceiver and locked with fitting?
(7) Any cut wire or short circuit in transceiver cable?
Is there any problem in connection between transceiver and
backbone cable.
(8) Is there any problem in connection between transceiver and
backbone cable.
(9) Is terminator connected to the both ends of the backbone
cable?
(10)Any cut wire or short circuit in backbone cable?
If this error occurs with all FL-net modules on the network, (9)
or (10) is suspected to be a cause.
5-67
This is displayed when no participating node is found in the network.
Check the following items:
(1) Whether the power for HUB is turned off or not.
(2) Whether the power for another node is off or not.
-- Waiting to receive
(3) Whether the connector of LAN cable is securely attached to the
module.
(4) Whether the connector of LAN cable is securely attached to
HUB.Whether LAN cable is broken or shorted.
FL-net Failure of FL-net incorporated in PC10G is possible.

H-
Hardware error Replace PC10G module.
5-68
5.4.2. Error Messages Used by the CPU Module
5.4.2.1. Special Relays

One of the following special relays turns on in case of failure.
Address Content
VA1 A wrong link parameter setting for link No. 1

VAD A wrong link parameter setting for link No. 4
VB1 A wrong link parameter setting for link No. 5
VBD A wrong link parameter setting for link No. 8
VA2 A communication error for link No. 1

VA6 A communication error for link No. 2
VAA A communication error for link No. 3
VAE A communication error for link No. 4
VB2 A communication error for link No. 5
VB6 A communication error for link No. 6
VBA A communication error for link No. 7
VBE A communication error for link No. 8
VC4 Faulty special module (faulty I/O module)
VC8 An I/O configuration error
Incorrect assignment of special modules

VF2 (Rack No., slot No. or link module names as link parameter
does not correspond with the actual position.)
5-69
5.4.2.2. Special Registers
 General map of special registers

Address Content
S200
| CPU error information output registers (Note)
S24F
Participation of nodes in FL-net network communication
S3*0
Indicates the communication status of each node (1 =
|
participating or 0 = not participating).
S3*F
See 9.7.8 'Monitor Function.'
S3x0
| Link error information output registers
S3xB
S3xF Own node number output registers
 “*” and “x” in the above addresses are determined by the link No. as shown in the following
table.
Link No. 1 2 3 4 5 6 7 8
* 0 2 4 6 8 A C E
X 1 3 5 7 9 B D F
Example) If the link No. is 1, for example, the communication status of each node is recorded
at S300 to S30F and the link error information at S310 to S31B.
Note: The information recorded at a special register S200 to S24F and S3x0 to S3xB is not
cleared after error recovery.
If it is to be cleared, enter '0000' at the register using PCwin or such.
Address of special register above is applicable to PC2 compatible mode and PC3 mode
(data area dividing mode).
Error information saved in S200- is also stored in S1000- for Ver.3.00 and thereafter.
5-70
(1) CPU Error Information Output Registers
When an error is detected, an error code, error related information, and error detection time are
recorded at registers specially designed for recording error information. Up to 8 errors are
recorded at these 8-level (in the case of PC10 mode, 64-level) shift registers. As the 9th and
subsequent errors occur, error records are deleted from the oldest one.
The error information recorded at these registers can be loaded with peripheral equipment or
such.
 Contents of CPU error information output registers

Address
S200
S20A Information on error 0 Error code
S214 Error related information 1 (lower order),

Information on error 1
2 (higher order)
S21E Error related information 3 (lower order),
Information on error 2
4 (higher order)
S228
Information on error 3 Error detection time (sec)
S232
Information on error 4 Error detection time (min)
S23C
Information on error 5 Error detection time (hour)
S246
Information on error 6 Error detection time (day of month)
S24F
Information on error 7 Error detection time (month)
Error detection time (year)

Error detection time (day of week)
Deleted 0 - 6 : Sun to Sat
 Error related information

Related Related Related Related
Error Error message
Content of error informa- informa informa- informa-t Remark
code on I/O monitor
tion 1 -tion 2 tion 3 ion 4
Critical errors
* * 2: Detected at CPU
I/O MODULE Rack
84 Failure of I/O module Classifi- Slot No. - 1 and 3: Detected at
ERROR 2 No.
cation link
LINK PRAM. A wrong link

85 Link No. - - -
ERROR parameter setting
Warnings
A communication
86 LINK ERROR Link No. - - -
error
A wrong rack No., slot
FUNC. I/O Rack
89 No. or module name Slot No. - - VF2 ON
ALARM No.
as link parameter
(See the item 5.1.4 Error information output special register.)
5-71
(2) Link Error Information Output Registers
If the FL-net module finds an error, it warns the CPU module of the error. The CPU module
records content of the error at link error information output registers. Up to 8 errors can be
recorded at these 8-level (in the case of PC10 mode, 64-level) shift registers. As the 9th and
subsequent errors occur, error records are deleted from the oldest one.
The error information recorded at these registers can be loaded with peripheral equipment or such.
 Contents of link error information output registers
Error Indication
Link No. Address MSB Content LSB
Address
Node No. of your module
1 S310 - S31F S3x0 (hex) Error code (hex) *1
2 S330 - S33F S3x1 Link parameter error code (hex) *2
3 S350 - S35F S3x2 Fixed to 0000
4 S370 - S37F S3x3 Fixed to 0000
5 S390 - S39F S3x4 Software version (BCD) *3
6 S3B0 - S3BF S3x5 Node No. and error code stack 1 Latest
7 S3D0 - S3DF S3x6 Node No. and error code stack 2
S3x7 Node No. and error code stack 3
8 S3F0 - S3FF S3x8 Node No. and error code stack 4
S3x9 Node No. and error code stack 5
S3xA Node No. and error code stack 6
S3xB Node No. and error code stack 7 Oldest
.
.
.
S3xF Own node number
*1: The same with the error codes indicated at the front of the module.
*2: For link parameter errors only (error code = E6). Fixed to 0000 for other errors.
*3: 0123(BCD) for version 1.23.
Note 1) “x” is determined by the link No.

Link No. 1 2 3 4 5 6 7 8
x 1 3 5 7 9 B D F
For the FL-net module with link No. 5, for example, error
information is recorded at S390 to S39F.
5-72
 Link Parameter Error Codes
If a link parameter has been set to a wrong value, E6 appears on the LED display at the front of the
module with error code E6 recorded at link error information output register S3x0 and a link
parameter error code at S3x1.
Check link parameters in accordance with the following table.
Before checking link parameters, load them from the CPU module to the peripheral equipment.
Parameters in the peripheral equipment may not coincide with those in the CPU module.
If parameters are set with the peripheral equipment such as PCwin, preset values are checked by
the peripheral equipment and wrong ones are rejected. If a link parameter error still occurs, link
parameters in the CPU module may have been modified by a computer link command except for
0024 (a switch setting error).
Error code Communi-
at S3x1 Content of error Cause(s) cation
(hex) method
0001 A wrong relay link area top address • Relay link area top address is not specified by word.
0002 A wrong register link area top address • Register link area top address is not specified by word.
0003 A wrong relay link transmission area top • Relay link transmission area top address is wrong.
address • Number of relay link transmission area words is wrong.
• Relay link transmission area top address is not specified by word.
0004 A wrong register link transmission area top • Register link transmission area top address is wrong.
address • Number of register link transmission area words is wrong.
• Register link transmission area top address is not specified by N:N
word.
0005 Relay link area overflow • Number of relay link area words is wrong.
• Relay link area top address and number of words are wrong.
• Relay link area top and transmission area top IDs are inconsistent.
0006 Register link area overflow • Number of register link area words is wrong.
• Register link area top address and number of words are wrong.
• Register link area top and transmission area top IDs are
inconsistent.
0010 A wrong relay link reception area top • Relay link area top address is not specified by word.
address
0011 A wrong resister link reception area top • Register link area top address is not specified by word.
address
0012 Relay link area overflow For relay link parameter settings:
• Number of reception words is wrong.
• Number of transmission area words is wrong.
• Reception area top address and number of transmission/reception
words are wrong.
• Common memory address is wrong.
0013 Register link area overflow For register link parameter settings:
• Number of reception words is wrong. 1:N
• Number of transmission area words is wrong.
• Reception area top address and number of transmission/reception
words are wrong.
• Common memory address is wrong.
0014 A wrong relay link transmission common • Common memory address in relay link transmission area is wrong.
memory address
0015 A wrong register link transmission common • Common memory address in register link transmission area is
memory address wrong.
0016 A wrong node No. for master station • Master station node No. is smaller than 1 or larger than 254.
• Master station node No. is the same with node No. of your
module.
0020 A wrong network address • Network address is 0.0.0 or 255.255.255.
0021 X/Y area overlap • X/Y area used by actual I/O and link area are overlapped.
0022 Communication method not defined • Communication method is neither N:N nor 1:N.
0023 A wrong node No. for your module • Node No. of your module is smaller than 1 or larger than 254. Common
0024 A switch setting error • Switch settings are wrong. to N:N
0025 A wrong link parameter sub-code • Link parameter sub-code is wrong. and 1:N
0026 A wrong token monitor time-out • Token monitor time-out time is set to a value less than 10 ms.
0027 A wrong minimum permissible frame interval • Minimum permissible frame interval is not between 1 ms and 5
ms.
Note 1) “x” is determined by the link No.
Link No. 1 2 3 4 5 6 7 8
x 1 3 5 7 9 B D F
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5.5. Warning by the Ethernet
5.5.1. Classification of Errors
The errors reported by the Ethernet module are classified as follows.
(1) Hardware errors………… Failures of the Ethernet module or communication errors with the
CPU module
Error code 84 (a special module error) occurs on the CPU module.
See 5.5.2 'Hardware Errors.'
(2) Link parameter error …… The link module name as link parameter has been set to a wrong
value on the CPU module. Error code 89 (a link module
assignment error) appears on the CPU module.
Note: This error is only related with the link module name. If any
setting written from the Link Module Setup window or with an
SPW command of the sequence program is wrong, a
communication error of (3) occurs.
(3) Communication errors……A wrong I/O parameter setting or a failure of the sequence program.
If an I/O parameter has been set to a wrong value, error code 86 (a
communication error) appears on the CPU module and detail data
recorded at address S3x0 and subsequent.
(x is determined by the link No. of the Ethernet module.)
See section 5.5.4 'Communication Errors.'
(4) Connection errors ……… A communication error with another node.

If a connection error occurs, the connection error code is stored in
the file memory and the connection error flag turns on.
Connection error codes for each connection may also be read from
the monitor area (see 10.9.6 ’Status Monitor Function’).
As a connection error occurs, the connection error flag of the file
memory turns on and the connection error code is stored in the file
memory.
Any connection error does not affect the CPU module.
See 5.5.5 'Connection Errors.'
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(5) Line errors……………… If the line does not become available before the power-up or
reset/start-up, this error occurs.
In this case, the following causes are suspected.
(1) The I/O cable has been disconnected or poorly connected.
(2) The device connected with the I/O cable (hub or computer)
has not been started.
(3) A cross cable is used to connect the hub.
(4) A straight cable is used to directly connect a terminal device
such as computer.
(5) The cable has a cut wire.
(6) The Ethernet module has been out of order.
Note: 10 Base-T cables for Ethernet are divided into two types;
straight and cross ones.
Use a straight one to connect the hub or a cross one to
make a direct 1:1 connection with another device.
(6) No initial data …………… If initial data such as IP address is not received from the CPU module
upon the power-up or reset/start-up, this error occurs. In this case,
the following causes are suspected.
(1) Initialization is to be performed by the sequence program and
the sequence program for turning the initialization request flag
of the file memory on has an error or has not been assembled.
(2) Initialization is to be performed by link parameters and
'Initialization based on Link Parameters' has not been selected.
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5.5.2. Hardware Errors
When the Ethernet module does not normally operate due to a failure of the module or peripheral
equipment, it is considered as a hardware error.
Error code 84 (a special module error) appears on the CPU module.
An error code appears on the LED display at the front of the Ethernet module. Take corrective
action in accordance with the following table.
Error code on Ethernet

Cause and remedy
module LED
The Ethernet module is considered to be faulty.
H---
Replace PC10G with a new one.
5.5.3. Link Parameter Error
The link module name as a link parameter has been set to a wrong value.
Select Ethernet as link module name.
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5.5.4. Communication Errors
When an I/O parameter has been set to a wrong value with the Ethernet module or the number of
bytes to be transmitted with the file memory method is out of the specified range, it is considered as
an I/O error.
Error code 86 appears on the CPU module.
Error detailed data codes are recorded at the CPU module's special registers at the following
addresses determined by the link No. of the Ethernet module.
Error Code Detailed Data Detailed Data Detailed Data

1 2 3
Link No.1 S310 S311 S312 S313
Link No.2 S330 S331 S332 S333
Link No.3 S350 S351 S352 S353
Link No.4 S370 S371 S372 S373
Link No.5 S390 S391 S392 S393
Link No.6 S3B0 S3B1 S3B2 S3B3
Link No.7 S3D0 S3D1 S3D2 S3D3
Link No.8 S3F0 S3F1 S3F2 S3F3
Take corrective action in accordance with the following table
5-77
 Communication Anomaly Error Code Table
Detailed Detailed Detailed

Error Code Description How to Dispose
Data 1 Data 2 Data 3
Ascertain whether your own IP address is correctly specified.
Note that the following IP addresses are not available:
•All bits of network ID are 0 or 1 solidly.
Your own node IP address on the initialization command may be
0113 0000 0000 0000 •All bits of host ID are 0 or 1 solidly.
erroneous.
•All bits of subnet ID are 0 or 1 solidly.
•The highest byte is 127 (7Fh).
(See Reference 5.)
0114 Gateway IP address on the initialization command may be erroneous. 0000 0000 0000 Ascertain whether the gateway IP address is correctly specified.
Ascertain whether the other node IP address is correctly specified.
•All bits of network ID are 0 or 1 solidly.
Other node IP address on the initialization command may be •All bits of host ID are 0 or 1 solidly.
0115 0000 0000 0000
erroneous. •All bits of subnet ID are 0 or 1 solidly.
•The highest byte is 127 (7Fh).
(See Reference 5.)
Other node port No. (TCP) on the initialization command may be Ascertain whether the other node port No. is correctly specified.
0116 0000 0000 0000
erroneous. The port No. should be between 0401h and FFFEh (1025 and 65534).
Ascertain whether the protocol (TCP:00 or UDP:01) is correctly
0117 Protocol on the initialization command may be erroneous. 0000 0000 0000
specified.
Ascertain whether the mode (Active:00, Destination-Specified
0118 Mode on the initialization command may be erroneous. 0000 0000 0000 Passive:01, or Destination Non-Specified Passive:02) is properly written
in File Memory when you use TCP as the protocol.
Your own node port No. (TCP) on the initialization command may be Ascertain whether the other node port No. is correctly specified.
0119 0000 0000 0000
erroneous. The port No. should be between 0401h and FFFEh (1025 and 65534).
Ascertain whether the other node port No. is correctly specified and
011A Other node table No. on the initialization command may be erroneous. 0000 0000 0000 whether the specified table is set as "used" in the Using Table of initial
parameter.
Your own node port No. (TCP) on the initialization command may be
011B 0000 0000 0000 Ascertain whether your own node port No. is not duplicated.
duplicated.
Your own node port No. (UDP) on the initialization command may be
011C 0000 0000 0000 Ascertain whether your own node port No. is not duplicated.
duplicated.
Resending-timer (data) value on the initialization command may be
011D 0000 0000 0000 Ascertain whether the timer value is within the specification.
erroneous.
Resending-timer (SYN,FIN) value on the initialization command may
011E 0000 0000 0000 Ascertain whether the timer value is within the specification.
be erroneous.
011F Closing-timer value on the initialization command may be erroneous. 0000 0000 0000 Ascertain whether the timer value is within the specification.
0120 Packet alive time on the initialization command may be erroneous. 0000 0000 0000 Ascertain whether the timer value is within the specification.
IP assembly timer value on the initialization command may be
0121 0000 0000 0000 Ascertain whether the timer value is within the specification.
erroneous.
Limit the altering points between 0 and 1 of the subnet mask to one
0125 Subnet mask on the initialization command may be erroneous. 0000 0000 0000
point only.(See Reference 5.)
0126 Gateway IP address on the initialization command is not configured. 0000 0000 0000 Configure the gateway address or ascertain whether there is not any
5-78
error on your own node IP address and other node IP addresses.
(See Reference 5.)
Ascertain whether the number of retransmissions is within the specified
0127 The initial command indicates an invalid number of re-transmissions. 0000 0000 0000
range.
This anomaly shows that Other Node Table No. is not specified for the
connection designated as TCP Active. Ascertain whether the Other
0134 Other node table No. on the active opening command may be invalid. Connection No. 0000 0000
Node Table No. is correct and whether the specified table is set as
'used.'
2080 Faulty response timer value of the initial data 0000 0000 0000 Ascertain whether the timer value is within the specification.
2081 Faulty non-reception timer value of the initial data 0000 0000 0000 Ascertain whether the timer value is within the specification.
Check whether the transfer data size at the head of transmission data
Transfer
2082 Faulty transmission data transfer number Connection No. 0000 area is between 0 and 2044 (7FCh) and whether the transfer data size
number
is properly written in the file memory.
Reception confirmation flag has been already hoisted when the fail
2085 Connection No. 0000 0000 Ascertain whether the reception confirmation flag is not kept hoisted.
reception is completed.
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5.5.5. Connection Errors
When the data received from another node has an error, it is considered as a connection error.
In this case, the error is indicated by the following devices.
(1) Status monitor

A connection error code is recorded at the CPU module's special registers in the following area.
Connection which can be monitored by special register is 1 to 8.
Connection 9 to 32 shall be monitored with SPR2 command.
Error response data
Link No.
to the other node
1 S308 - S30F S3*8 Connection 1: Connection error code
2 S328 - S32F S3*9 Connection 2: Connection error code
3 S348 - S34F S3*A Connection 3: Connection error code
4 S368 - S36F S3*B Connection 4: Connection error code
5 S388 - S38F S3*C Connection 5: Connection error code
6 S3A8 - S3AF S3*D Connection 6: Connection error code
7 S3C8 - S3CF S3*E Connection 7: Connection error code
8 S3E8 - S3EF S3*F Connection 8: Connection error code
The connection error code can be read by monitoring this area with the peripheral equipment.
(2) File memory

Data is recorded in the connection error code area of the file memory.
It may be read into I/O registers with an SPR command of the sequence program.
If a connection error occurs, an error response may be transmitted to the other node.
Take corrective action in accordance with the following table.
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5.5.5.1. Connection Anomaly Error Code Table
Symbols, "(1) – (4), **, and ***," Description

Trouble
finding and correcting, (1) – (4)
In case any anomaly arises, your Ethernet Module conducts the designated steps, (1) – (4):
(1): Writing the connection anomaly code and hoisting the connection anomaly flag
(2): Resetting the Connection
(3): Transmitting the error response data to the other node
(4): Setting 10 in RC to return the error response data as follows:
“80. 10. 01. 00.” (:Error Code)
Refer to Error Response Data Error Code Table (5.5.5.2) for error code information.
ErrorResponse Data, "**, and ***"

The frame type (FT) of error response data is transmitted in the following data:
**: In case of error response against file memory reception, ** = E0.
In case of error response against computer link command, ** = 80.
***: Data with the highest bit of received frame type (FT) set at 1
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(i) In case of connection of TCP Passive:
Find & Error response
Connection
Description Correct data to the other Clear Timing of Anomaly Occurrence Cause of Anomaly and Corrective Action
Anomaly Code
Trouble node
This arises if no response is returned from the other node within Response Timer (default 6 sec)
File Memory Transmission Response Data In Lowering Transmission
(1)(2) 4002 - after a file data transmission via Ethernet Module. Ascertain whether the other node processes
Reception Time Is Up Request Flag
the File Memory Reception properly.
In Lowering Transmission The number of transmission bytes in the file memory is wrong. Check transfer data size at the
Wrong number of file memory transmission bytes (1) 4003 -
Request Flag head of the file memory transmission data area.
This arises if file memory data or computer link command is received or if the transfer-number data
(LL,LH) exceeds data number to be transmitted or the data is discontinued in the middle.
Inability to receive data by the transfer number (1)(2)(3) 4004 **.05 Opening from other node
Ascertain whether the transfer-number data is appropriate and whether all one-frame data are
transmitted.
Faulty reception data frame format This arises if the head data (FT:frame type) of reception data is abnormal.
(1)(2)(3) 4005 ***.01 Opening from other node FT must be one of the following: FT=00 (computer link command), FT=60 (file memory
(Abnormal FT) transmission), FT=E0 (the corresponding response to transmitted file memory)
Faulty reception data frame format This arises if the second datum (RC:response code) of received data is one besides "00" when file
(1)(2)(3) 4005 **.02 Opening from other node
(Abnormal RC) memory data or computer link command is received. Verify your transmission data.
Faulty reception data frame format This arises if the transfer-number data (LL,LH) of received data is "0000," exceeds 1274 bytes
(1)(2)(3) 4005 **.03 Opening from other node (computer link command), or exceeds 2044 bytes (file memory transmission). Verify your
(Abnormal transfer number) transmission data.
Though a computer link command has not
This arises if the next computer link command is received before resending the response to a
processed yet, the next computer link command (1)(2)(3) 4006 80.06 Opening from other node
received computer link command. Verify the computer link command transmission timing.
is received.
Though a file memory transmission has not
This arises if the next file memory data is received before resending the response to received file
processed yet, the next file memory data is (1)(2)(3) 4007 E0.07 Opening from other node
memory data. Verify the file memory data transmission timing.
received.
Relay command has a wrong transfer data size or ENG code. Check the content of relay
Faulty relay command format (1)(2)(3) 4008 80.04 Opening from other node
command.
Connection reset or closed during file memory In Lowering Transmission
(1) 4009 - A connection was reset or closed during file memory transmission process.
transmission process. Request Flag
Data from another node cannot be received for a time longer than specified by Non-Reception
Non-reception timer is time up (1)(2) 4010 - Opening from other node
Timer as initial parameter (defaulted 00: undefined). Check the setting of Non-Reception Timer.
Reception confirmation (ACK) signal was not received from the other node after the number of
Connection reset after specified number of TCP
(1)(2) 4013 - Opening from other node communication retries specified by 'reset wait resending times' as initial parameter. This occurs
re-transmissions
when the other node is powered off or the cable has a cut wire. (See 7-4.)
Connection reset by multiple connection opening The connection designated as TCP non-specified passive open is reset if opening request is sent
request from another port with the same IP (1)(2) 4014 - Opening from other node to the same port from another node when the connection is open. As opening request is sent
address from another node later, the connection with that node opens. (See 7-4.)
Error Response Reception to file memory
In Lowering Transmission This arises if the response code (RC) received from other node is not "00" after a file memory data
transmission from other node (1)(2) 30++ -
Request Flag transmission. Verify the response data.
[++=response code: RC]
NAK response from J-CPU during computer link Received computer link command has an error and could not be normally processed. Check the
(3) - (4) -
command process content of computer link command.
Occur if an improper open/close request is received from another mode. Please check the
Connection errors other than the above (1)(2) 013+ - Opening from other node
communication program of the other node.
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(ii) In case of TCP active connection
Error
Find & Connection
response
Description Correct Anomaly Clear Timing of Anomaly Occurrence Cause of Anomaly and Corrective Action
data to the
Trouble Code
other node
In hoisting opening The module failed in active-opening a connection with another node. Check that line is correctly connected, the other node has
Failing in active opening (1) 4001 - been started, and IP addresses of your node and the other node have the same network ID (see Reference 5).
request flag
File Memory transmission response data reception In lowering transmission No response is sent from the other node for the time specified by Response Timer as initial parameter (defaulted 6 secs) after file
(1)(2) 4002 - memory data is transmitted from Ethernet module. Check that file memory is normally processed by the other node.
time is up. request flag
In lowering transmission The number of transmission bytes in the file memory is wrong. Check transfer data size at the head of the file memory
Wrong number of file memory transmission bytes (1) 4003 - transmission data area.
request flag
This arises if file memory data or computer link command is received or if the transfer-number data (LL,LH) exceeds data number
In hoisting opening
Inability to receive data by the transfer number (1)(2)(3) 4004 **.05 to be actually transmitted or the data is discontinued in the middle.Ascertain whether the transfer-number data is appropriate and
request flag whether all one-frame data are transmitted.
In hoisting opening This arises if the head data (FT:frame type) of reception data is abnormal.FT must be one of the following: FT=00(computer link
Faulty reception data frame format (Abnormal FT) (1)(2)(3) 4005 ***.01 command),FT=60(file memory transmission), FT=E0(the corresponding response to transmitted file memory)
request flag
In hoisting opening This arises if the second datum (RC:response code) of received data is one besides "00" when file memory data or computer link
Faulty reception data frame format (Abnormal RC) (1)(2)(3) 4005 **.02 command is received. Verify your transmission data.
request flag
Faulty reception data frame format (Abnormal In hoisting opening This arises if the transfer-number data (LL,LH) of received data is "0000," exceeds 1274 bytes computer link command), or
(1)(2)(3) 4005 **.03 exceeds 2044 bytes (file memory transmission). Verify your transmission data.
transfer number) request flag
Though a computer link command has not
In hoisting opening This arises if the next computer link command has been received before resending the response to a received computer link
processed yet, the next computer link command (1)(2)(3) 4006 80.06 command. Verify the computer link command transmission timing.
request flag
has been received.
Though a file memory transmission has not processed In hoisting opening This arises if the next file memory data has been received before resending the response to received file memory data. Verify the
(1)(2)(3) 4007 E0.07 file memory data transmission timing.
yet, the next file memory data has been received. request flag
In hoisting opening
Faulty relay command format (1)(2)(3) 4008 80.04 Relay command has a wrong transfer data size or ENG code. Check the content of relay command.
request flag
Connection reset or closed during file memory In lowering transmission
(1) 4009 - A connection was reset or closed during file memory transmission process.
transmission process. request flag
In hoisting opening This arises if data from other node cannot be received for the period or more that is set by on-Reception Timer (default
Non-reception timer is time up (1)(2) 4010 - 00:undefined) of file memory. Check the setting of Non-Reception Timer.
request flag
In hoisting opening
Other node has closed the connection. (1) 4011 - This arises if the other node has closed the connection after your own node opened a connection through an active opening.
request flag
In hoisting opening
Other node has reset the connection. (1) 4012 - This arises if the other node has reset the connection after your own node opened a connection through an active opening.
request flag
Reception confirmation (ACK) signal was not received from the other node after the number of communication retries specified by
Connection reset after specified number of TCP In hoisting opening
(1) 4013 - 'reset wait resending times' as initial parameter. This occurs when the other node is powered off or the cable has a cut wire.
re-transmissions request flag (See 7-4.)
In hoisting transmission This arises if the response code (RC) received from other node is not "00" after a file memory data transmission. Verify the
transmission from other node (1)(2) 30++ - response data.
request flag
[++=response code: RC]
NAK response from J-CPU during computer link Received computer link command has an error and could not be normally processed. Check the content of computer link
(3) - (4) - command.
command process
In hoisting opening Occurs if the send complete flag turns off while data is being sent, and sending is performed
Continuous open (1)(2) 0132 - request again. If it occurs, please reset the CPU module. Please modify the program so that the send
flag request flag turns off after data sending is complete or a connection error has occurred.
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(iii) In case of UDP connection
Find & Error response

Connection
Description Correct data to the other Clear Timing of Anomaly Occurrence Cause of Anomaly and Corrective Action
Anomaly Code
Trouble node
No response is sent from the other node for the time specified by Response Timer as
File Memory transmission response data reception In hoisting transmission
(1) 4002 - initial parameter (defaulted 6 secs) after file memory data is transmitted from Ethernet
time is up. request flag
module. Check that file memory is normally processed by the other node.
In hoisting transmission The number of transmission bytes in the file memory is wrong. Check transfer data size
Wrong number of file memory transmission bytes (1) 4003 -
request flag at the head of the file memory transmission data area.
This arises if file memory data or computer link command is received or if the
transfer-number data (LL,LH) exceeds data number to be actually transmitted or the data
Inability to receive data by the transfer number (3) **.05 -
is discontinued in the middle. Ascertain whether the transfer-number data is appropriate
and whether all one-frame data are transmitted.
This arises if the head data (FT:frame type) of reception data is abnormal.
Faulty reception data frame format (Abnormal FT) (3) ***.01 - FT must be one of the following: FT=00(computer link command),FT=60(file memory
transmission), FT=E0(the corresponding response to transmitted file memory)
This arises if the second datum (RC:response code) of received data is one besides "00"
Faulty reception data frame format (Abnormal RC) (3) **.02 - when file memory data or computer link command is received. Verify your transmission
data.
This arises if the transfer-number data (LL,LH) of received data is "0000," exceeds 1274
Faulty reception data frame format (Abnormal
(3) **.03 - bytes (computer link command), or exceeds 2044 bytes (file memory transmission).
transfer number)
Verify your transmission data.
Though a computer link command has not This arises if the next computer link command has been received before resending the
processed yet, the next computer link command (3) 80.06 - response to a received computer link command. Verify the computer link command
has been received. transmission timing.
Though a file memory transmission has not
This arises if the next file memory data has been received before resending the response
processed yet, the next file memory data has been (3) E0.07 -
to received file memory data. Verify the file memory data transmission timing.
received.
Relay command has a wrong transfer data size or ENG code. Check the content of
Faulty relay command format (3) 80.04 -
relay command.
In hoisting transmission This arises if the response code (RC) received from other node is not "00" after a file
transmission from other node (1) 30++ -
request flag memory data transmission. Verify the response data.
[++ = response code: RC]
NAK response from J-CPU during computer link This arises if received computer link command has any fault resulting in abnormal
(3) - (4) -
command process transaction. Verify the computer link command contents.
If any error code other than the above is returned, review the entire command data.
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5.5.5.2. Error Response Data Error Code Table
If any NAK (anomaly) reply is returned as the computer link command error response "80.10.01.00.
" (:Error Code) or as the relay command response, refer to the following table for reviewing
your command data:
: Error Code Error Description

11 Inability to process data because of faulty CPU Module Hardware
20 Fixed Data (ENQ) within relay command is not "05."
Faulty transfer number (there is erroneous transfer byte number within the relay
21
command.)
23 Erroneous command code
24 Erroneous subcommand code
25 Erroneous command-format data byte
26 Erroneous function-call operand number
Attempting to write data into the field where any writing is prohibited during a sequence
31 operation or to use the function call which is protected from any execution during a
sequence operation.
32 A command that is defeated during a stop continuity is activated during a stop continuity.
33 Attempting to execute a debug function call despite non-debug mode
34 Access prohibited owing to access-prohibited configuration
35 Non-executable owing to execution-priority limiting configuration (*)
36 Non-executable owing to execution-priority limiting configuration by another device (*)
Attempting to start scanning without any reset after writing I/O point-number parameters
39
or I/O allocation point-number parameters
3C During a fatal failure, a command has issued that is not executable during a fatal failure
3D Non-executable due to competing process while a different-factor command is executed.
3E Non-executable command due to reset existence
3F Non-executable command due to stop duration
Address of a reading/writing command or of "address + data number" of a command is
40
out of range.
41 Word/byte number is out of range.
42 Non-designated data is sent.
43 Erroneous function-call operand
Though any timer or counter is employed, a command for reading/writing the set/recent
52
values is issued.
No reply is sent from link module with the link exchange No. specified by a relay
66 command (Owing to no existence of specified link module, power OFF, or faulty circuit,
etc.)
Non-executable module with the link exchange No. specified by a relay command
70
(Owing to erroneous link No. designation or faulty link module)
No reply is sent from link module with the link exchange No. specified by a relay
72 command (Owing to no existence of specified link module, power OFF, or faulty circuit,
etc.)
Multiple relay commands were issued to the same link module from the CPU module
73
and the link module could not process the commands. (Send commands again.)
*: See command (22), reading execution priority limitation state or (23), setting execution priority limitation.
If any error code other than the above is returned, review the entire command data.
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5.6. Error reports from FL-remote
Detecting an abnormality in FL-remote, inform FL-remote and CPU of the abnormality.
FL-remote indicates the abnormality with Hardware status, Communication status lumps and a
message display.
CPU indicates the abnormality with a special relay, a special register (a register for error information
output and a register for link error information output) and a message display.
The Communication State of FL-remote can be checked with the special register.
(1) Hardware status, Communication status lumps

Each Hardware status and Communication status lamp has a green and a red color, and display
these states by lighting, flashing, and putting out.
Define Define state in

Lamp name Color Content
state proposal
Normal state Normal state of a module
Green
Not yet set up In initial
Mortal failure Hardware abnormality
Hardware Red
Light failure Link parameter error
status
 No power supply of master module
- No power supply  In the process of resetting
 Waiting to be initially processed.
Normal state Normal state of a network
Green The network is normal; communication is not
Not yet connected
yet established
Mortal  Detected abnormality unable to
Communicati communication communicate on the network.
on status Red abnormality  Duplicate node address
Communication Communication abnormality of the child
abnormality station of the communication part.
Abnormality of power
- Cable unconnection
supply of the network
: lighting : flashing : putting out
5-86
5.6.1. Error information by CPU
(1) Special Relay
All station in communicating flag turn ON at normal, and other flags are turned ON at error.
At At
Address Contents
normal error
VA0 Link No.1 All station in communicating
VAC Link No.4 All station in communicating Note) When the unlinking
ON OFF
VB0 Link No.5 All station in communicating function is set, it becomes 0.
VB4 Link No.6 All station in communicating
VB8 Link No.7 All station in communicating
VBC Link No.8 All station in communicating
VA1 Link No.1 Link parameter error
VAD Link No.4 Link parameter error
OFF ON
VB1 Link No.5 Link parameter error
VBD Link No.8 Link parameter error
VA2 Link No.1 Communication error
VA6 Link No.2 Communication error
VAA Link No.3 Communication error
VAE Link No.4 Communication error
OFF ON
VB2 Link No.5 Communication error
VB6 Link No.6 Communication error
VBA Link No.7 Communication error
VBE Link No.8 Communication error
VC4 Error with special module(Communication module failure) OFF ON
I/O configuration error
VC8 (Communication modules are mounted more than the regulated OFF ON
number.)
Special module allocated error
VF2 (Rack No., Slot No., Link module name in link parameter different from OFF ON
state of mounting.)
(Note) The address of the special relays are the case of the PC2 compatible mode and the data
memory separate mode (the PC3 mode).
5-87
(2) Special Register
FL-remote stores the data of error condition and communication condition into the following address
of PLC.
Address Contents
S200
| CPU error output register
S24F
S3#0
Normal slave data area
S3#1
This displays the communication conditions
S3#2
(normal / error) of each slave.
S3#3
The master status area
S3#4
Indicating master and network status. *1
S3#5 Software version (BCD)
S3#6 The number of times of re-issuing token
S3#7 The number of times of token retention timeout
S3#8 The number of times of token monitor timeout
S3#C
| Connection office connection state
S3#F
S3*0
| Link error output register
S3*B
S3*C
S3*D
Unlinking register
S3*E
S3*F
 The # and * portion of the above address are determined by link No.
Link No. 1 2 3 4 5 6 7 8
# 0 2 4 6 8 A C E
* 1 3 5 7 9 B D F
(Note) Information stored in the register S200 to S24F and S3#0 to S3*B is not cleared after
restoration from error.
When information must be cleared, write "0000" to the register with PCwin, etc.
The address of the special resisters are the case of the PC2 compatible mode and the
data memory separate mode (the PC3 mode).
*1: S3#4 Master status area

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
* * * * * * * *
Node address
duplication E7
Transfer error D9
Checking error D6
Master communication speed [0: 10M, 1:100M]
Setting up for communication 1: Setting up for communication
(since power is turned on until communication is established)
Common memory sending area duplication, Error E8 and E9
Error is present (Error of bit 1, 6, 7, and 10 is present)

I/O communication in operation
5-88
(3) Special Register for CPU Error Information Output
When any error is detected, error code, error related information, and error detection time are stored
in the special register for error information. This register is a 8-step (in the case of PC10 mode,
64-step) shift register and can store up to 8 errors.
When error are detected more than 8 times, the oldest error information is lost.
Error information stored in the register can be displayed by the peripheral device.
 Contents of register
Adress
S200
Error 0 Information Error code
S20A
Error 1 Information Error related information 1,2
S214
Error 2 Information Error related information 3,4
S21E
Error 3 Information Error detection time(Second)
S228
Error 4 Information Error detection time(Minute)
S232
Error 5 Information Error detection time(Hour)
S23C
Error 6 Information Error detection time(Day)
S246
Error 7 Information Error detection time(Month)
S24F
Error detection time(Year)
Error detection time
Lost (Day of the week) 0~6:Sun-Sat
 Error related data

Error I/O monitor Relation Relation Relation Relation
Error contents Remarks
code error message 1 2 3 4
*2:CPU
*
I/O MODULE Communication Rack Slot detection
84 Classific -
Serious error
ERROR 2 module failure No. No. 1,3:Link

ation
detection
24 or more
implementation
FUNC. I/O
88 of - - - - VC8 ON
OVER 1
communication
modules
LINK PRAM. Link parameter Link
85 - - -
ERROR Error No.
Communication Link
86 LINK ERROR - - -
Error No.
Alarm
Link parameter
rack
FUNC. I/O Rack Slot
89 No. slot No. - - VF2 ON
ALARM No. No.
module
name error
(Note) This differs from error code of FL-remote.
(See the item 5.1.4 Error information output special resister)
5-89
(4) Link Error Data Output Special Register
At detection of error in FL-remote, error message is carried out to CPU, and the error code of
FL-remote is stored into the link error data output special register.
This register has an 8-step shift register structure, and can memorize up to 8 errors.
At errors over 8 errors, the first stored error data is deleted.
 Register contents of link error data output special register
Link No. Error display address Address MSB Content LSB

1 S310～S31F S3*0 Node Address(HEX) Error Code(hex)
2 S330～S33F S3*1 Actual input bytes(HEX)low Actual output bytes(HEX)low
3 S350～S35F S3*2 Input bytes(HEX)low Output bytes(HEX)low
6 S3B0～S3BF S3*5
Node Address + Error Code stack1 NEW
S3*6 Node Address + Error Code stack2
7 S3D0～S3DF S3*7 Node Address + Error Code stack3
8 S3F0～S3FF S3*8 Node Address + Error Code stack4
S3*9 Node Address + Error Code stack5
S3*A Node Address + Error Code stack6
S3*B
Node Address + Error Code stack7 OLD
Note 1) * decides by link No..

Link No. 1 2 3 4 5 6 7 8
* 1 3 5 7 9 B D F
Note 2) When “Collation error (I/O bytes discrepancy)“, the number of I/O bytes is stored in the
S3*1 – S3*4.
S3*1 : The number of I/O bytes of the real slave. (low byte)
S3*2 : The number of I/O bytes in the link parameters. (low byte)
Example S3*0 02D6

S3*1 0400
S3*2 0004
Reference error of Slave 02
Slave 02: Input 04 bytes Output 00 bytes
Parameter: Input 00 bytes Output 04 bytes
5-90
 Error Code Details and FL-remote Error Display
Alarm
Error Code Display S03*0 S03*1 Detail
code
89 0x02F0 E5 --- --- Link parameter is not set yet.
85 0x02F2 E7 00F0 00F2 Own node number duplication error
85 0x02F1 ED 00ED 0000 Area overflow
85 0x221 E6 0021 0000 Total byte count has exceeded the limit.
85 0x222 E6 0022 0000 Station number with byte count 0 is found.
0x223 E6 0023 0000 Input or output byte count of 1 slave has
85
exceeded the limit.
85 0x225 E6 0025 0000 Communication area overflow
0x226 E6 0026 0000 I/O of CPU and communication area are
85
duplicated.
85 0x227 E6 0027 0000 Module sub-code error
85 0x228 E6 0028 0000 Module No. error
FL-
85 0x229 E6 0029 0000 Minimum permissible frame interval error
remote
85 0x22A E6 002A 0000 Own node number error
85 0x22B E6 002B 0000 Network address error
86 0x0302 E8 E8 0000 Common memory 1 duplication error
86 0x0303 E9 E9 0000 Common memory 2 duplication error
86 0x0304 EA EA 0000 Token monitor timeout error
86 0x0305 EB EB 0000 Cyclic data reading error
86 0x0306 EC EC 0000 Cyclic data writing error
Checking error
S03*1H actual input byte count (HEX)
S03*1L actual output byte count (HEX)
S03*2H input byte count (HEX)
86 0x0308 D6 ##D6 II00 S03*2L output byte count (HEX)
86 0x0309 D9 ##D9 0000 Transfer error
84 --- H- --- --- Some other trouble of hardware
*1: The portion * of special register S3*0 is determined by link No.

Link No. 1 2 3 4 5 6 7 8
* 1 3 5 7 9 B D F
Content of S3*0 ##: Node address of error slave
*2: When the error situation is released, "E0" and "E2" displays of Master error code become the
exchange number blinking displays.
5-91
5.6.2. Communication Status
FL-remote outputs the communication status in the special register.
(1) Normal Slave Data Area
Each bit of normal slave data area shows communication status of each slave.
The state flags of each slave are output to special register S3#0 - S3#3.
Each bit No. represents node address.
MSB LSB
S3#0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
S3#1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
S3#2 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
S3#3 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
1: Communication normal state
0: Communication error state (or node not to use)
(Either communications error or verification errors have occurred.)
■ # part of the special register decides by link No.

Link No. 1 2 3 4 5 6 7 8
# 0 2 4 6 8 A C E
Note 1) Even when the slave is unlinking state, and the link parameter is set up for
“communication stop in communication error”, this flag functions.
(2) Communication state confirmation function

This function is the st andard of the st ability of the communication li ne. The communication
error does not necessa rily occur, even if error occurs. It is possible that the communication
error occurs when error occurs frequently.
 The content of communication error data area

The data is set in the special register S3#6-3#8 according to the error (six kinds).
Address Error
S3#6 Number of token reissued
# part of Address decides by the link number.

Link number 1 2 3 4 5 6 7 8
# 0 2 4 6 8 A C E
 Error is counted up to 65535 (FFFFh) times at the maximum.

 Error count is cleared when power is turned off or when CPU is reset.
But it is not cleared by the communication reset.
5-92
 Saving circuit of the number of errors
The total number of CAN errors (CAN error data area) is cleared by power off or CPU reset at
the communication error. But it is not cleared by the communication reset. So, please design the
following sequence circuit to save the total number of CAN errors.
Example)
The following circuit is saving the slave state, master status, number of CAN error and time of
error occurrence
Communication error flag
(Link No. 1)
VA2 Txxx
TMR K=1.0 1sec timer
Txxx P***
Slave state
WBMOV S3#0 → D0FF0= 0012D Master status
Number of CAN
error transmission
WBMOV S019 → D0FFC= 003D Time of error

occurrence
transmission
# part of Address decides by the link number.

Link No. 1 2 3 4 5 6 7 8
# 0 2 4 6 8 A C E
Address of communication error flag decides by the link number
Link No. 1 2 3 4 5 6 7 8
Communication
VA2 VA6 VAA VAE VB2 VB6 VBA VBE
error flag
According to the above-mentioned circuit, the area from D0FF0 is as follows
D0FF0
1
2 Normal slave data area
3
4
Master status area
5
6
7
8
Number of CAN error
9
A
B
C time minute, sec (BCD)
D time day, hour (BCD)
E time year, month (BCD)
5-93
(3) Connected slave setting area
It is an area where the connection of the slave set in the link parameter of the CPU is shown. The
state flag of each slave is output to special register S3#C-3#F.
0 shows the master, and each bit number shows the node address (station number).
MSB LSB
S3#C 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
S3#D 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
S3#E 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
S3#F 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
Each bit = 1 : connect

Each bit = 0 : no connect
 # part of the special register decides by link No..

Link No. 1 2 3 4 5 6 7 8
# 0 2 4 6 8 A C E
5-94
5.6.3. Error Contents and Supposed Causes
Special
Master 7
register
segment Error contents Main supposed cause Recovery method
contents
indicator
*
Check the condition of
CPU itself and noise
environment, and turn on
H- Hardware error CPU itself caused an error.
power again.
If the error occurs again,
replace the CPU module.
Total number of bytes
0021 E6
exceeding limitation value
Station with 0 byte
0022 E6
present
Link parameter error
Number of bytes for input Rewrite normal parameter,
0023 E6 / output per one slave and reset or supply power
exceeding limitation value  Error with CPU main body once again.
or memory
Input / output designation  Disappearance of memory
0024 E6 Please refer to the manual of
error data by a battery voltage
each CPU for details.
drop of CPU main body.
0025 E6 Range over
CPU input / output and
0026 E6
range in duplication
0027 E6 Sub code error
64F0 E7 Master duplication
Common memory  Two or more master  Separate any other master
sending area modules are connected to module from the network,
00E8 E8
Address duplication the network. and turn on power again.
(relay link)
Common memory  FL-net module is  Separate FL-net module
sending area connected to the same from the network, and turn
00E9 E9 Address network. on power again.
communication
(register link)
00EB EB Cyclic data reading error  FL-net module is  Separate FL-net module
connected to the same from the network, and turn
00EC EC Cyclic data reading error network. on power again.
Token monitor timeout error occurs when all data of own
node could not be sent within token monitor timeout time
set in "network" of link parameter.
Check the checkbox of "Automatic" of token monitor
timeout time, or increase the setting time.
00EA EA Token monitor timeout
5-95
Special
Master 7
register
segment Error contents Main supposed cause Recovery method
contents
indicator
*
Confirm the I/O byte number

of the slave to be connected,
and change link parameter.
Collation error When the node address of
The number of bytes of a
(Disagreement the slave has been changed,
slave and the number of
##D6 D6 turn on the slave once again
of the number of bytes of a link parameter
and change the link
I/O bytes） are not in agreement.
parameter. When the slave
has been removed, it is also
necessary to change the link
parameter.
Check whether the slave

connector is connected
correctly or not.
Check whether the power is
supplied to the slave or not.
Confirm a power supply of
HUB.
Please confirm duplication of
Transmission
##D9 D9 The slave separated. a node address.
error
Check the wiring portion to
the connector for
disconnection or short circuit
in communication line.
In the case of a slave by
other manufacturers, refer to
the instruction manual for the
slave concerned.
 Please confirm whether 0
(no unlinking designation) is
set by the applicable slave of
an unlinking register.
 Please confirm whether
Hardware status  There is an
the communication area set
lamp and unlinking-designated slave.
to the parameter of the
Communication  Duplication of
master overlaps with the
status lamp communication area.
communication area of other
00 lights green and  Mis-setting of I/O
link modules.
communicates address order.
 Please confirm whether
normally, but I/O  Overwrite to
I/O address order set by the
data is not communication area by
parameter of the master is
correct. sequence program.
set correctly.
 Please confirm whether to
overwrite the communication
area in the sequence
program.
# # : Node address of abnormal slave
5-96
6. MAINTENANCE
6.1. Battery replacement
(1) Lithium rechargeable battery (TIP-5426)

The PC10G CPU uses exclusive lithium rechargeable battery.
This battery is always kept full charged by about 4 hours' current feed per day. If kept full charged,
this battery can back up (*1) for one year or more subject to normal temperature (25°C). If
"BATTERY VOLTAGE LOW" is detected, BATTERY ALM (error code 0022) is output. (Special relays
V03 and VF0 turn ON.)
If BATTERY ALM fails to turn OFF even after charged 8 hours or more or it turns ON immediately
after charged, possible cause is expiry of the battery life. In such a case, replace with new battery.
The battery replacement cycle as a guideline is 5 years though depending on the actual operating
conditions. In replacing, use specific battery (Charge type battery for PC3J-CPU: TIP-5426) (*2).
Replace the battery by a maintenance man having the relevant expertise knowledge.
*1 This lithium rechargeable battery backs up data memory (data area for keep-relay , data register,
etc.) and the built-in clock. The guaranteed back-up period subject to full charge is 6 months (at
25°C).
User program (sequence program + parameters) and equipment information memory data
(comment, etc.) are never cancelled even against power failure because they are stored in a
flash memory which can hold such data even during power failure.
*2 Appearance of lithium rechargeable battery (TIP-5426)

6
Lead wire, black (-)
(Front side: vacant)
Lead wire, red (+)
Connector (CPU side)

3-pin connector
6-1
(2) Battery replacing procedure
110 35
PC10G-CPU
POWER RUN E/A
W
P2 P3
L1 L2
L3
BATTERY
TIP-5426
1st./ MODE
2nd.
1.00 I/F
L1 FL
ET
RMT
130 L2
FL
L1 100M
10M
L2 100M
10M
START
RESET
L1 L3
L3
0
L-
V
L2
L+
SN/PC/CMP
 Battery replacing procedure

(1) Backup the data by PCwin.
(2) Prepare battery (TIP-5426) for replacing.
(3) Turn off power supply. The module is removed from a rack.
(4) Remove set screw for battery fixing plate. Pay adequate attention not to drop the screw within
main unit during operation.
(5) Remove battery fixing plate.
(6) Remove battery connector. Because the battery does not break down, please do not pull out
the battery with the lead line.
6-2
(7) Replace old battery with new battery. Mount battery in reverse procedure of removing.
Note) When you attach a battery connector, please be careful for attachment.
Please do not protrude a battery lead from a substrate outside.
Red Black
Blank
(8) Turn on power supply and check that battery alarm is turned out (Special relay: VF0 is turned
off.) using peripheral equipment (PCwin).
(9) Turn off power supply and enter battery replaced date.
Note) Be sure to complete battery replacing operation (Battery replacing procedure (2)-(8)) within five
minutes after power source is turned off.
For a while after power source is turned off data memory (such data area for keep relay and
data register, etc.) and built-in clock are backed up by large capacity capacitor.
User program (sequence program and parameter) and equipment information memory content
including comment are would not be erased even battery is removed because they are stored
in flash memory that maintains content even service interruption.
6-3
WARNING LITHIUM BATTERY HANDLING PRECAUTIONS
For proper replacement of the lithium battery, follow the instructions given in the Individual
Instruction Manual for the battery. Where it is in normal use with our equipment, the lithium battery
is worry free while in use, but where it is stocked as a spare or it is disposed as scrap after expiry of
its life the battery must be handled with good care. Improper handling of the lithium battery could
result in liquid leak, overheat, ignition, and bursting, in the worst case, resulting in breakdown of
device and bodily injury.
To avoid such possible trouble and accident, observe the precautions given below.
(1) Don't throw the battery in fire.
(2) Protect it from water splash.
(3) Don't apply direct soldering to the battery.
(4) Don't heat it.
(5) Don't overhaul .
(6) Don't short plus (+) and minus (-).
(7) Avoid pressurizing and deforming.
(8) Avoid force-discharging.
(9) Don't charge .
(10) Don't use in series or parallel.
(11) When storing a spare battery, don't select a place of high temperature and high
humidity and take a proper measure to prevent condensation.
When disposing the battery as scrap, dispose it properly as incombustibles with good attention to
the following instructions as well as observing the precautions given above , or otherwise dispose it
properly in accordance with the applicable ordinance by each local administrative body.
1) In disposing, don't mix batteries together. Contain them one by one in a vinyl bag to
avoid shorting.
2) Use a collective container of good-insulation material to contain batteries therein.
3) Don't contain them together with other metallic materials ( nails, steel wires, etc.) .
4) Protect them from rain and water.
5) Don't contain them together with other hazardous materials which are defined under
"Fire Law". Also don't place them near such hazardous materials.
6) Don't place them near fire and at a location where they are exposed to high
temperature.
This “Crossed-out wheeled bin” symbol is for EU countries only.

This “Crossed-out wheeled bin” symbol means that batteries and
accumulators, at their end-of-life, should be disposed of separately from
your household waste.
In the European Union there are separate collection systems for used
batteries and accumulators.
Please, dispose of batteries and accumulators correctly at your local
community waste collection/recycling centre.
6-4
6.2. Maintenance and check
It is recommended to check the programmable controller regularly for using it long time. When checking
the programmable controller regularly, check the maintenance check item shown in the list 6.2.1. Use a
check sheet and prevent missing of checking, as well as control the result of check on a history, then it
will be helpful in the next checking and investigation when any trouble occurs.
Table 6.2.1 Maintenance and check item

Life cycle
Checking position Within 10 10 years or Description of check Judgment criterion
years longer
Check for the following of PLC: Check for the following of PLC:
(1) Contamination (1) Contamination
 
(2) Dust (2) Dust
(3) Condensation (3) Condensation
LED must turn on normally and no
 Check that LED of PLC turns on.
LED must be broken.
Check for damage to PLC The lid, cover, etc must not be

PLC in enclosure. deformed or damaged.
general The module must be fixed securely
Check the mounting condition of
  without loosening of base mounting
PLC module.
screw.
Screw of terminal block must be free
Check the wiring connection
  from loosening. (Additional
condition of PLC.
tightening)
Check of I/O bus cable for Free from loosening, without tilt of
 
installing additional PLC cable connector
Fan rotating condition
 Fan must be rotating (blowing up air)
Fan (TOYOPUC-PCS)
PLC
 Condition of dust on fan blade No dust is acceptable.
Measurement of input power
  Within DC24V supply rated voltage
supply
Power Measurement of output voltage
 Within DC5V supply rated voltage
supply (Measure at the terminal of base)
Check for color change by heat of
 The top must not be brown.
enclosure
 Condition of switch on front panel Must not be damaged.
Condition of loosening of Free from loosening

connector and terminal block Locking must not be unlocked if any.
CPU
Battery must not be used long from
 Battery purchase (more than five years for
example).
 Terminal cover Cover must be attached.
Top and bottom lock must not be
I/O module  Loosening of terminal block unlocked.
Terminal block must not be askew.
  Condition of fuse Fuse must not be broken.
Condition of core wire
Optical
  Check for crush, pinch, bending Core wire must not be damaged.
fiber
below radius 10cm, and tension.
Damage and crush
Communic  Shield wire is broken.
 Cable must not be damaged.
Wiring ation cable  A part of shield sticks out.
 Terminal block is distorted.
Damage and crush
Power
 Electric wire is broken.
supply   Cable must not be damaged.
 A part of electric wire sticks out.
cable
 Terminal block is distorted.
* Check the item shown by  depending on life cycle.
6-5
Periodic check of spare parts
If a new part is stored for spare, it is not new forever. Especially the power module changes with time,
and requires rotation. In addition, it is recommended to check the operation regularly. It is also
recommended to acquire production discontinuation information of each module on our webpage, and
refill spare parts.
Table 6.2.2 shows checking item of spare parts and table 6.2.3 shows caution when replacing a module.
Table 6.2.2 Check item of spare parts

Checking Life cycle
Within 10 10 years or Description of check Judgment criterion
position
years longer
Check of operation by
energization condition.
Operation
 When checking is not easy, Free from malfunction
check
contact us for checking
PLC
operation and overhauling.

Check of version
Compatible with the version of target
Version  
Check with us if unknown. equipment
The latest backup of target equipment
equipment
Peripheral
must be available.
Program Check whether backup data
  <Compatible module of PCwin>
data can be used.
PC1 series, PC2 series, PC2J series,
MX, PC3J series, and PC10 series
* Check the item shown by  depending on life cycle.
Table 6.2.3 Caution when replacing module

No. Item
1. Have the instruction manual ready for replacement module.
2. Check whether the model of spare conforms to that of equipment to be replaced.
3. Check whether the version of software is appropriate.
Ensure space for placing the removed module, and lay cloth or paper to avoid contamination in
4.
placement.
Do not allow the screw to drop when removing. The tip of crosshead screwdriver should preferably
5.
be magnetized.
Check the mark tube and match mark before removing the wiring of terminal block and connector.
6. Take down note for restoration.
(Mark tube and signal name are often unmatched. Mark tube is often missing.)
Place the removed module and replacement one in parallel, and mate the setting switch and short
7.
pin if any.
8. Check for malfunction of base connector and connector of module on mounting side by sight.
Lock the connector having a locking mechanism. If unreliable, remove the connector once again
9.
and check it.
10. After replacement, check again for wrong wiring and connector before turning on power.
11. When replacing CPU, have backup data ready.
12. Save the removed equipment and module as they are assuming that they can be returned again.
13. Use a tool conforming in size.
14. Do not apply excessive force to the wiring.
15. Be sure to check the voltage. Do not allow short-circuit here carelessly.
16. Use a light and work under a bright environment.
6-6
7. SPECIFICATIONS
7.1. General specification
No. Items Specification

AC85 ~ 264V 47 ~ 66Hz (Case of POWER1) (Note 1)
DC18 ~ 32V (Case of POWER2 / POWER2H) *
1 Power
* Use a power supply complying with the following standards.
IEC/EN 60950-1,EN50178(UL Class2,SELV)
38W max (80VA max ) (Case of POWER1)
Power
2 40VA max (Case of POWER2)
consumption
50VA max (Case of POWER2H)
Ambient
3 0 – 55C
temperature
Relative
4 30 - 85%RH (But no condensation allowed.)
humidity
5 Atmosphere No corrosive gas allowed.
Frequency Acceleration Amplitude Sweep cycles
Vibration
6 10 ~ 57Hz - 0.15mm 10 cycles
resistance
57~150Hz 9.8m/s2 - (1 octave /minute)
Shock
7 147m/s2 3 directions, 3 shocks in each direction
resistance
Noise
8 It shows in the following table.
resistance
Dielectric AC1500V 1 minute (AC external terminal - earth)
9
strength AC1000V 1 minute (DC external terminal - earth)
Insulation DC500V 10Mmin (AC external terminal - earth)
10
resistance DC100V 10Mmin (DC external terminal - earth)
Momentary power interrupt permissible time 0.5 cycle max, momentary power
Momentary interrupt interval 1s min (Case of POWER1)
11
power interrupt Momentary power interrupt permissible time 10ms max, momentary power
interrupt interval 1s min (Case of POWER2 / POWER2H)
Pollution
12 2 or less (Note 2)
degree
Overvoltage
13 II or less (Note 3)
category
14 Altitude 2000m (max)
15 Installation Mounted in a control panel (Note 4)
Overseas
Please refer TOYOPUC overseas standard compatible in website as below.
16 corresponding
URL：http://www.jtekt.co.jp/products/toyopuc/csa.html
standard
The above is the specification common to each module.
Note1) In case that POWER1 is used as a power module, the system doesn’t comply with CE marking
and UL/CSA.
Note2) The pollution degree indicates the degree of pollution (conductive solid, liquid, or gaseous) that
may be present in the environment. Pollution degree 2 is only non-conductive pollution occurs
except that occasionally a temporary conductivity caused by condensation is expected.
Note3) This indicates a transient overvoltage (impulse voltage) condition. The equipment with
overvoltage category II is intended to be supplied from the building wiring. The transient
overvoltage condition is 1500V up to 150Vac and 2500C up to 300Vac.
Note4) To ensure that the machine which uses this product complies with EMC instruction, this product
must be installed within a control panel.
7-1
7.2. CPU module specification
7.2.1. Basic specification of CPU module

Items Specification
Current
1000mA
consumption
Outside
35(W)130(H)118(D) (TOYOPUC standard 1 slot size)
dimension
Weight 204g
7.2.2. Performance specification

Stored program system
1 Program system
Event monitor function by parameter setting
Cyclic computation system
2 Program control system
Constant period interrupt timer function
3 Program language SFC, LD, FBD
4 I/O control system Image register system

Basic command
5 0.015s - /command
processing speed
Applied command
6 0.05 - several s/ command
processing speed
7 Basic command 20 different commands
8 Timer count command 23different commands

700 or more different commands(Calculation provided with sign possible.
9 Applied command
A floating point calculation is possible.)
180K words (60K words x 3)+60KW(FB Library)
10 Program capacity
Standard library 32K words + User library 32K words
11 Memory element CMOS-RAM, E2PROM
12 Battery Charge type (lithium secondary battery: battery life ..5 years)
13 External I/O points 2048 points
14 Internal I/O points 86016 points (4096 points3+8192 points+65536 points)
15 Keep-relay points 6400 points (768 points3+4096 points)

Timer function 0.1- 6553.5 sec /0.01- 655.35 sec
16 0. 001- 65.535 sec /1- 65535 sec 9,728 points in total
Counter function 1- 65535 (2560 points3 + 2048 points)
17 Link relay points 38912 points (10240 points3+ 8192 points)
18 Rise and fall detection 11776 points (2560 points3+4096 points)

164 KW(12KW3+ 128 points)
File register: 256KW, direct designation allowed.
19 Data register
Flash register: 4Mbytes, flash memory (reading only)
Writing is allowed in the unit of 64Kbytes.
20 Link register 6KW/16 bit (2KW3)
Equipment information
21 4Mbyte
memory *1
Number of actually
Communication (link) module up to 24 maximum
22 installed communication
There are no number of sheets restrictions by consumption memory.
modules
7-2
7.2.3. Built-in communication
Communication port Link function
Communication port L1 FL-Net / Ethernet / FL-remote I/O(selectable)
Communication port L2 FL-Net / Ethernet / FL-remote I/O(selectable)
Communication port L3 SN-I / F/PC-LINK / CMP-LINK / MODBUS(selectable)
High Speed: 480Mbps. Full Speed: 12Mbps (Automatic
Peripheral port USB I/F
recognition)
7.2.4. I/O bus

1 Cable length Total extension length, Max. 10m
Number of extension units, 7 units (8 units including
2 Number of extension racks
CPU rack)
3 Number of modules Max. 64 modules (8-slot base is used.)
Max. 24 modules, Not limited by memory
4 Number of communication modules
consumption.
5 Number of I/O points Max. 2048 points, (Assigned to the X/Y area.)
7-3
7.3. I/O module specification
7.3.1. Input module specification
(1) IN-11 Module (THK-2749)
Title AC100V Input Module

Specification IN-11 (Identification Code: 0F)
Number of circuits 16 points
Insulation method Photo coupler insulation Maximum simultaneous input
Rated input voltage AC100V / 115V 50/60Hz points-Input voltage
characteristics
Rated input current 8.5mA (AC100V 50Hz)
Operating voltage range AC85 - 132V (50/60Hz) Ambient temper-
ON voltage/ON current AC70V Max / 6mA Max ature 55C
Ambient temper-
OFF voltage/OFF current AC30V Min / 2mA Min (Points) ature 50C
Approximately 14k(50Hz) / 16
Input impedance
12k(60Hz)
Maximum similtaneous
12
Response OFFON 15m sec Max
input points
time ON OFF 15m sec Max
Internal current 60mA (TYP. All points ON)
consumption (5V) (1+3.7n)mA n : Number of ON points
8 points 1 common
Common system (note:It is 16 points 1 common to suit 0 121 132 DC(V)
the CE marking.)
Status indication LED light with ON Input Voltage
Weight 0.25kg
External Connection and Internal Circuit Block Diagram Termi

Signal Termi
Signal
-nal -nal
No. name No. name
1 IN00
1 2 IN01
3 IN02
~
8 Internal 4 IN03
circuit 5 IN04
17 6 IN05
7 IN06
~ Photo coupler 8 IN07
AC100V 9 IN08
10 IN09
9 11 IN0A
to CPU
12 IN0B
~
16 13 IN0C
14 IN0D
19 15 IN0E
~ 17 COM1
16 IN0F
AC100V 18 NC
19 COM2
(Note:) Please use a short bar for terminal COM1-2 connection of the terminal block attachment to suit the
CE marking.
7-4
(2) IN-12 Module (THK-2750)
Title DC24V Input Module
Specification IN-12 (Identification Code: 07)
Rated input voltage DC24V points-Input voltage
characteristics
Rated input current 10mA
Operating voltage range DC18 - 30V Ambient temper-
ON voltage/ON current 16.8V Max/7mA Max ature 55C
Ambient temper-
OFF voltage/OFF current 7.2V Min/2.5mA Min (Points) ature 47C
Input impedance Approximately 2.5k 16
Response OFFON 15m sec Max 12
time ON OFF 15m sec Max
input points
Internal current 60mA(TYP. All points ON)
consumption (5V) (1+3.7n) mA n: Number of ON points
Common system 8 points 1 common
0 27 30 DC(V)
Status indication LED light with ON
Non-polarity (Either plus common or minus Input Voltage
Polarity common available for use)
Weight 0.22kg
External Connection and Internal Circuit Block Diagram Termi- Termi-

Signal nal Signal
nal
No. name No. name
1 IN00
1 2 IN01
3 IN02
~
8 Internal 4 IN03
circuit 5 IN04
17 6 IN05
7 IN06
Photo coupler 8 IN07
9 IN08
DC24V 10 IN09
9 11 IN0A
to CPU
12 IN0B
~
16 13 IN0C
14 IN0D
19 15 IN0E
16 IN0F
17 COM1
18 NC
DC24V 19 COM2
7-5
(3) IN-22D module (THK-2871)
Specification IN-22D (Identification Code:06)
Rated input voltage DC24V points-Input voltage
characteristics
Operating voltage range DC18 - 30V Ambient temper-
ON voltage/ON ature 55C
16.8V Max/3.5mA Max Ambient temper-
current
(Points) ature 53C
OFF voltage/OFF
7.2V Min/1.5mA Min
current 32
Input impedance Approximately 4.7k 28
Response OFFON 10msec Max
time ON OFF 10msec Max
input points
Internal current 63mA(TYP, All points ON) (1 + 3.7n) mA
consumption (5V) n: ON point number of points
Common system 16 points 1 common 0 29 30 DC(V)
Status indication LED light with ON (16 points display switching) Input Voltage
Non-polarity (Either plus common or minus

Polarity common available for use)
37 pin D-sub connector, 1 piece
External connecting method
(The connector is connector: DC-37PF-N (JAE)
attached to the module.) case: DC-C8-J13-B1-1R (JAE)
Weight 0.20kg
External Connection and Internal Circuit Block Diagram
A0
~
AF
Connector pin configuration
Internal
circuit
COM1
Photo coupler
DC24V
B0
to CPU
~
BF
COM2
DC24V
7-6
(4) IN-22H module (THK-6831)
Specification IN-22H (Identification Code:05)
Insulation method Photo coupler insulation
Rated input voltage DC24V
Operating voltage range DC18～26.4V
ON voltage/ON current 16.8V Max/3.5mA Max
OFF voltage/OFF current 7.2V Min/1.5mA Min
Input impedance Approximately 4.7 k
Response OFFON 1ms～8ms (It is possible to set up in a unit of 1 ms.)

time ON OFF default 8ms
Internal current 100mA(TYP, All points ON)
consumption (5V) (20＋2.5n)mA n：ON point number of points
Common system 8 points 1 common
Status indication LED light with ON
Polarity Non-polarity (Either plus common or minus common available for use)
External connecting method

(The terminal block is 20-pin screw-free terminal block, 2 pieces
Type: DFMC 1,5/10-ST-3,5-LR (Phoenix Contact Inc)
attached to the module.)
Weight 0.20 ㎏
1
～
7
Internal
circuit
COM1
Photo coupler
DC24V
Connector pin configuration
8 To CPU
～
0 1
F 2 3
4 5
6 7
COM2 COM1 COM1
8 9
A B
C D
DC24V E F
10 COM2 COM2
～
17
10 11
COM3 12 13
14 15
16 17
COM3 COM3
DC24V 18 19
1A 1B
18 1C 1D
～
1E 1F
1F COM4 COM4
COM4
DC24V
7-7
IN-22H module
The IN-22H module is the one with 32-point inputs.

The input response time can be set up in a unit of millisecond for the range of 1ms to 8ms for each group
of eight input points.
<I/O Module Setting>
IN-22H, in addition to 32 actual input point, there are 32 points of the input response time
setting/confirmation area after these actual input points.
Therefore, the number of allocation points in the I/O module setting is normally 64 points.
Although it is possible for you to designate 32 allocation points, the response time is fixed at 8ms in this
case.
64(default): Response time can be arbitrary entered.

32: Response time is fixed at 8ms.
<IO address appropriation on IN-22H module>
Here, the state of IO appropriation when an IN-22H module has been allocated to slot 0 rack 0 is shown
as an example.
Address F E D C B A 9 8 7 6 5 4 3 2 1 0
P1-X/Y00W Input 8points (X/Y 8~F) Input 8points (X/Y 0~7) IN-22H allocated to slot 0 of rack
P1-X/Y01W Input 8points (X/Y 18~1F) Input 8points (X/Y 10~17) 0 occupies 32 input points.
For confirmation of response time
P1-X/Y02W *4 *3 *2 *1 setting
P1-X/Y03W *8 *7 *6 *5 For response time setting
*1 P1-X/Y02L(bit 0~3) P1-X/Y00L Response time of 8 points; for confirmation of current setting
*2 P1-X/Y02L(bit 4~7) P1-X/Y00H Response time of 8 points; for confirmation of current setting
*3 P1-X/Y02H(bit 8~B) P1-X/Y01L Response time of 8 points; for confirmation of current setting
*4 P1-X/Y02H(bit C~F) P1-X/Y01H Response time of 8 points; for confirmation of current setting
*5 P1-X/Y03L(bit 0~3) P1-X/Y00L Response time of 8 points; for setting
*6 P1-X/Y03L(bit 4~7) P1-X/Y00H Response time of 8 points; for setting
*7 P1-X/Y03H(bit 8~B) P1-X/Y01L Response time of 8 points; for setting
*8 P1-X/Y03H(bit C~F) P1-X/Y01H Response time of 8 points; for setting
P1-X/Y02W shows the current response time setting. (The latest value is always displayed.)
P1-X/Y03W is for the setting of response time.
7-8
<IN-22H response time setting method>
A response time of the IN-22H module allocated to slot 0 of rack 0 is set by using a sequence.
The state of default IO address state is as follows:
The current response

time setting can be
checked here
(X/Y02W).
A response time can

be set up by changing
the value here
(X/Y03W).
Response time setting is as shown down below:
Value to be entered in
response time setting Response time to be set
register
0 8ms
1 to 8 Response time is set at the value which was entered. (1-8ms)
Reservation; do make any entry. When an erroneous setting is made, response
9 to F
time is set at 8ms.
7-9
With the example this time, response time is set as below:
Input address Response time you want Address for setting Value to be written in a
to set response time response time setting
register
X000~X007 8ms Y030~Y033 8
X008~X00F 5ms Y034~Y037 5
X010~X017 2ms Y038~Y03B 2
X018~X01F 1ms Y03C~Y03F 1
By writing 1258 h here with a

sequence, response time is
entered.
Example Sequence:
Example: Change the response time of the embedded IN-22H in rack 0, slot 0 when M000 is turned on.
Points of Caution
1. Be sure to put in an edge point. (Do not set continuous execution.)
2. 8ms when 0h or 9h or a larger value is set.
3. Filtering time can be entered for every eight points.
Turning the M000 contact on makes the filter setting change.

The current value is
changed.
X00L : 8ms
X00H : 5ms
X01L : 2ms
X01H : 1ms
The setting has been

entered.
7-10
(5) IN-SW module (THK-5977)
Title Switch input module
Specification IN-SW (identification code:07)
OFF
10ms or less
Response ON
time ON
10ms or less
OFF
Internal current
126mA(Typ . all points ON)
consumption(5V)
Weight 0.18kg
Switch No.
Operation explanation & switch arrangement chart
Switch No
Address Address
Function
The state of ON/OFF of the switch in front of I N -S W
the module is taken into the address where 0 1 ON
this module was allocated as direct input PULL

0 X00 1 X01
E F
information. SW
OFF
2 X02 3 X03
SW0 0 SW1
Operation
4 X04 5 X05
(1) The lever is pulled until the malfunction 1
prevention lock is released. SW2 2 SW3 6 X06 7 X07

3
(2) ON/OFF is operated while pulling the lever. SW4
8 X08 9 X09
4 SW5
5 A X0A B X0B
(2) SW6 6 SW7
ON C X0C D X0D
7
(1) PULL
SW8 E X0E F X0F
8 SW9
OFF
SW 9
SWA A SWB
Note) Please do not operate the switch
B
forcibly with the lock has not been
SWC C SWD
released. It causes the module to be
damaged. D
SWE E SWF
7-11
7.3.2 Output Module Specification
(1) OUT-1 Module (THK-2751)
Title TRIAC (Triode AC) Output Module
Specification OUT-1 (Identification Code:1F)
Number of circuits 8 points *1
Rated load voltage AC100V/115V 50/60Hz
Maximum load voltage AC132V
Maximum load current 1A/Point 4A/COM
Minimum load voltage/current AC15V 10mA
Maximum rush current 80A (1 cycle or below)
Leak current at OFF 1.5mA Max
Max voltage drop at ON 1.5V Max
Response OFFON 150s

time ONOFF 1/2 cycle + 1ms
Internal current
consumption (5V) 174mA (TYP. All points ON) (11 +20.3n) mA n: ON points
Surge killer CR Absorber (0.022F + 47)
Fuse rating 5A
Fuse blown display With (ALM LED ON against fuse blown)
Common method 8 points-1 common
Status indication LED ON at switch ON
Weight 0.32kg

nal Signal nal Signal
No. name No. name
1 OUT00
2 OUT01
TRIAC 1 3 OUT02
L 4 OUT03
Internal 5 OUT04
circuit 8 6 OUT05
L 7 OUT06
FUSE 17 8 OUT07
~ 9 NC
to CPU AC100V 10 NC
DC5 11 NC
12 NC
Fuse blow detection
13 NC
14 NC
15 NC
16 NC
17 COM
18 NC
19 NC
*1: OUT-1 Module's real I/O points is 8 points. However, PC 3JG CPU permits allocation of I/O
address 16 points. At this time Lower 8 points of address becomes the real I/O. Therefore, do not
use upper 8 points.
7-12
Title Independent contact relay output module
Specification OUT-3 (Identification Code: 2E)
Insulation method Relay insulation
Rated switching voltage DC24V 2A (Resistance load)

2A/COM
Rated switching current AC240V 2A(cos=1)
Minimum switching load DC5V 10mA
Maximum switching voltage DC30V AC264V
Response OFFON 8ms Max (at DC 24V)

time ON OFF 15ms Max (at DC 24V)
Electric: Resistance load 200,000 cycles min
Relay life Induced load
Mechanic: 20,000,000 cycles min
Maximum switching frequency At ON: 1 sec min At OFF: 1 sec min
Surge killer None
Internal current consumption
(5V) 356mA (TYP. All points ON) (11 + 43n) mA n: ON Number of points
Common system 1 point/COM (Inter common insulation)
Weight 0.31kg

No. name No. name
1 OUT00A
2 OUT00B
Relay 3 OUT01A
1 4 OUT01B
L 5 OUT02A
Internal 6 OUT02B
circuit 7 OUT03A
2 8 OUT03B
~
9 OUT04A
AC100V 10 OUT04B
to CPU 11 OUT05A
12 OUT05B
15 13 OUT06A
L
14 OUT06B
15 OUT07A
16 16 OUT07B
~ 17 NC
AC100V 18 NC
19 NC
*1: OUT-3 Module's real I/O points is 8 points. However, PC3JG CPU permits allocation of I/O
use upper 8 points.
(Note) When DC inductive load is opened and closed, use a diode for surge killer.
7-13
Specification OUT-4 (Identification Code: 1D)
Rated load voltage AC240V 50/60Hz
Maximum load current 1A/Point, 4A/COM
Minimum load voltage/current AC15V 10mA
Maximum rush current 80A

(5V) 174mA (TYP. All points ON) (11 + 20.3n) mA n: ON Number of points
Fuse rating 5A
Common method 8 points-1 common
Weight 0.29kg

No. name No. name
1 OUT00
2 OUT01
TRIAC 3 OUT02
1 4 OUT03
L
Internal 5 OUT04
6 OUT05
circuit 8
L 7 OUT06
FUSE 8 OUT07
17 9 NC
~
to CPU 10 NC
AC200V
DC5 11 NC
12 NC
Fuse blown detection 13 NC
14 NC
15 NC
16 NC
17 COM
18 NC
19 NC
*1: OUT-3 Module's real I/O points is 8 points. However, PC3JG CPU permits allocation of I/O
use upper 8 points.
7-14
Specification OUT-11 (Identification Code: 1E)
Rated load voltage AC100V/115V 50/60Hz
Maximum load current 0.5A/Point 2A/COM
Minimum load voltage·Current AC15V 10mA
Maximum rush current 60A (1 cycle or below)

Fuse rating 3.2A/COM
Fuse blown display With (ERR LED ON against fuse blown)*1
8 points-1 common (Inter common insulation)
Common method
(note:It is 16 points 1 common to suit the CE marking.)
Weight 0.32kg

No. name No. name
1 OUT00
TRIAC 1 2 OUT01
L 3 OUT02
Internal 4 OUT03
circuit 8 5 OUT04
L 6 OUT05
FUSE 17 7 OUT06
~ 8 OUT07
to CPU AC100V 9 OUT08
10 OUT09
9 11 OUT0A
L 12 OUT0B
13 OUT0C
16 14 OUT0D
L
15 OUT0E
19 16 OUT0F
~
17 COM1
AC100V 18 NC
19 COM2
note: Please use a short bar for terminal COM1-2 connection of the terminal block attachment to suit
the CE marking.
*1: Modules produced before January 1996, the "ERR" is not printed on the LED cover.
7-15
Title Contact Output Module
Specification OUT-12 (Identification Code: 2F)
Insulation method Relay insulation
Rated switching voltage DC24V 2A (Resistance load) (note:It is rated switching
5A/COM voltage DC24V,AC120V to suit
Rated switching current AC240V 2A(cos=1) the CE marking.)
Minimum switching load DC5V 10mA
Maximum switching voltage DC30V AC264V (note:It is DC30V or AC132V to suit the CE marking.)
Response OFFON 13ms Max (at DC 24V)

time ONOFF 13ms Max (at DC 24V)
Electric:Resistance load 200,000 min
Relay life Induced load
Mechanic: 20,000,000 min
Maximum switching frequency At ON: 1 sec min At OFF: 1 sec min
Surge killer None
8 point-1 common (Inter common insulation)
Common method
(note:It is 16 points 1 common to suit the CE marking.)
Weight 0.3kg

No. name No. name
Relay 1 1 OUT00
L 2 OUT01
Internal 3 OUT02
circuit 8 4 OUT03
L 5 OUT04
FUSE 17 6 OUT05
~ 7 OUT06
To CPU AC100V 8 OUT07
DC5
9 OUT08
9 10 OUT09
Fuse blown detection L 11 OUT0A
12 OUT0B
16 13 OUT0C
L 14 OUT0D
FUSE
19 15 OUT0E
~
16 OUT0F
AC100V 17 COM1
18 NC
19 COM2
(note: It is rated switching voltage DC24V,AC120V and maximum switching voltage DC30V,AC132V to suit
the CE marking. Moreover, please use a short bar for terminal COM1-2 connection of the terminal
block attachment.)
(note2 : Please use the diode for the serge killer when you use the inductive load with DC.
7-16
Title Power MOS FET Output (-) COM
Specification OUT-15 (Identification Code: 14)
Rated load voltage DC5V/12V/24V
Operating load voltage range DC4.75~30V
Maximum load current 1A/Point (2A/2 Points) 4A/COM
Max voltage drop at ON 0.3V Max, 0.17V (TYP.) 1A/point 2A/at 2 poins
Response OFFON 2mS Max

time ONOFF 6mS Max
(5V) 310mA Max (All points ON) (11 + 18.4n) mA n: ON Number of points
Surge killer Silicon surge absorber
Fuse blown display with (ALM LED ON against fuse blown)
Common method 8 points, 1 common (Inter common insulation)
Weight 0.26kg

No. name No. name
Photo vol FET 1 1 OUT00

Coupler L 2 OUT01
Internal 3 OUT02
8 4 OUT03
circuit L
FUSE 5 OUT04
17 6 OUT05
7 OUT06
DC5/12/24V
DC5V 8 OUT07
To CPU 9 OUT08
Fuse blown detection 9 10 OUT09
L
11 OUT0A
12 OUT0B
16 13 OUT0C
L
FUSE 19 14 OUT0D
15 OUT0E
DC5/12/24V
16 OUT0F
17 COM1
18 NC
19 COM2
1 L
2 For 2A/2-point output, turn
ON/OFF 2 points simultaneously
17
7-17
Title Power MOS FET Output (+) COM
Rated load voltage DC5V/12V/24V
Operating load voltage range DC4.75~30V
Maximum load current 1A/Point (2A/2 Points) 4A/COM
Max voltage drop at ON 0.3V Max, 0.17V (TYP.) 1A/point 2A/at 2 Points
Response OFFON 2ms Max

time ONOFF 6ms Max
Internal current consumption 310mA Max (All points ON) (11 + 18.4n) mA n: ON Number of points
Surge killer Silicon surge absorber
Common method 8 points, 1 common (Inter common insulation)
Weight 0.26kg

No. name No. name
Photo vol
Coupler 1 1 OUT00
L 2 OUT01
Internal 3 OUT02
circuit 8 4 OUT03
L
FUSE 5 OUT04
17 6 OUT05
FET
DC5/12/24V
7 OUT06
DC5V 8 OUT07
to CPU 9 OUT08
Fuse blown detection 9 10 OUT09
L
11 OUT0A
12 OUT0B
16 13 OUT0C
L
FUSE 19 14 OUT0D
15 OUT0E
DC5/12/24V 16 OUT0F
17 COM1
18 NC
19 COM2
1 L
2 For 2A/2-point output, turn
ON/OFF 2 points simultaneously
17
7-18
Title Transistor Output Module (-) COM
Rated load voltage DC12V/24V
Operating load voltage range DC10~30V

Internal current consumption 136mA Max (All points ON time) (11+7.8n) mA n: ON Number of points
Surge killer By Zener diode contained in the transistor (Zener voltage 6010V)
Fuse rating 3.2A/COM *1
Fuse blown display None
Common method 8 points, 1 common (Inter-common insulation)
Weight 0.23kg

nalSignal nal Signal
No. name No. name
1 1 OUT00
L 2 OUT01
Internal 3 OUT02
circuit 8 4 OUT03
L 5 OUT04
FUSE 17 6 OUT05
Photo 7 OUT06
to CPU coupler DC24 8 OUT07
Transistor 9 OUT08
9 10 OUT09
L 11 OUT0A
12 OUT0B
16 13 OUT0C
L 14 OUT0D
19 15 OUT0E
16 OUT0F
DC24 17 COM1
18 NC
19 COM2
*1: This fuse is to protect printed circuit board from burning. When short-circuited, this fuse element
may be unable to protect the elements.
(This fuse is soldered to the printed circuit board.)
7-19
Title Transistor Output Module (+) COM
Specification OUT-19 (Identification Code : 17)

Internal current consumption 136mA Max (All points ON time) (11+7.8n) mA n: ON Number of points
Surge killer By Zener diode contained in the transistor (Zener voltage 6010V)
Weight 0.23kg

nalSignal nal Signal
No. name No. name
1 OUT00
1 2 OUT01
L 3 OUT02
Internal 4 OUT03
8 5 OUT04
circuit L
FUSE 6 OUT05
17 7 OUT06
Photo 8 OUT07
Transistor DC24V
coupler 9 OUT08
to CPU 10 OUT09
9 11 OUT0A
L 12 OUT0B
13 OUT0C
16 14 OUT0D
L
15 OUT0E
19 16 OUT0F
17 COM1
DC24V
18 NC
19 COM2
*1: This fuse is to protect printed circuit board from burning. When short-circuited, this fuse element may
be unable to protect the elements.
(This fuse is soldered to printed circuit board.)
7-20
(10) OUT-28D Module (THK-2870)
Title Transistor Output Module (-) COM
Specification OUT-28D (Identification Code: 03)
Maximum load current 0.2A/point 2A/COM
Max voltage drop at ON 1.5V Max, 0.8V (TYP.) 0.2A

(DC5V) 210mA Max (All points ON)
External voltage DC12/24V(DC10~30V)

power supply Current 38mA (Typ. DC24V, per 1 PWR)
Surge killer C-E .. by Zener diode

Status indication LED ON at switch ON (16 points display switching)
External connecting method 37-Pin D-sub connector, 1 piece
Weight 0.20kg

1
A0 20
A1
A2
A3
A4
PWR1 A5
A6
Connector pins configuration
A0 A7
Internal L A8
A9
circuit AA
~
AF AB
L AC
AE AD
COM1 COM1 AF
Photo PWR1
coupler B0
to CPU FUSE DC24V B1
B2
PWR2 B4 B3
B6 B5
BA B7
L B8
BA B9
~
BF BB
L BC
BE BD
COM2 BF
COM2
PWR2
DC24V NC 37
19
*1: This fuse is to protect printed circuit board from burning. When short-circuited, this fuse may be
unable to protect the elements.
7-21
(11) OUT-29D Module (THK-5025)
Title Transistor Output Module (+) COM
Specification OUT-29D (Identification Code: 12)
Rated Load voltage DC12V/24V
Operating Load voltage range DC10~30V
Maximum Load current 0.2A/point 2A/COM
Max voltage drop at ON 1.5V Max, 0.8V (TYP.) 0.2A

(DC5V) 210mA Max (ALL points ON)
External voltage DC12/24V (DC10 - 30V)

power supply Current Max 148mA (at DC30V, per 1 PWR) Typ. 82mA (at DC24V, per 1 PWR)
Surge killer C-E .. by Zener diode
Status indication LED ON at switch ON (16 points display switching)
External connecting method 37-Pin D-sub connector, 1 piece
(The connector is connector: DC-37PF-N (JAE)
attached to the module.) case : DC-C8-J13-B1-1R (JAE)
Weight 0.20kg

1
A0 20
A1
A2
A3
A4
PWR1 A5
A6
Connector pins configuration
OUT00 A7
Internal L A8
A9
circuit AA
~
AB
OUT0F
L AC
AE AD
COM1 AF
Photo COM1 PWR1
coupler B0
to CPU FUSE DC24V B1
B2
B4 B3
PWR2
B6 B5
OUT10 B7
L B8
B9
~
BA
OUT1F
BC BB
L
BE BD
COM2 COM2 BF
PWR2
DC24V NC 37
19
*1: This fuse is to protect printed circuit board from burning. When short-circuited, this fuse may be
unable to protect the elements.
7-22
7.3.3. I/O module specification
(1) I/O-328G <THK-6905>
I/O-328G
When the switch is changed When the switch is changed

to the left, the status of "A" is to the right, the status of "B" is
displayed on the indicator. displayed on the indicator.
A B
Weight:215g
Internal current
consumption (5V)
Below 330mA
Specification of input
1 Rated input voltage DC24V
2 Rated input current 5mA
3 Operating voltage range DC21.6 - 26.4V
4 ON voltage / ON current 16.8V Max / 3.5mA Max.
5 OFF voltage / OFF current 7.2V Min. /1.5mA Min.
6 Input resistance Approximately4.7k
Response OFFON 10msec Max.
7
time ONOFF 10msec Max.
8 Points 32 points
9 Common 16 points per common (COM1, COM3)
10 Address X000~X00F,X020~X02F
11 Indication 16 points are switched with the switch.
X000
X00F
COM1
- + Photo coupler
DC24V
X020
X02F
COM3
- + Photo coupler
DC24V
7-23
Specification of Output
7.3.3.1. (1) Specification of Output
1 Rated load voltage DC24V
2 Maximum load current 0.3A / points 2A / 16 points
3 Voltage range DC21.6 - 26.4V
4 Max voltage drop at ON 1.5V Max.
5 Leak current at OFF 0.1mA Max.
6 Output element FET open drain
7
time ON OFF 1msec Max.
8 Points 16 points
9 Common 16 pints per common (COM2)
10 Address Y010~Y01F
11 Fuse 3.2A: 16 pints per fuse *1
*1 When a fuse has blown, fuse alarm is indicated on LED Display.
PWR2
Y010
Load
Photo coupler Load
Y01F
COM2
- +
FUSE
DC24V
7-24
7.3.3.2. (2) Specification of Output (Output for signal Communication)
2 Maximum load current 0.05A / points 0.8A / 16 points
6 Output element Transistor output
7
8 Points 16 points
10 Address Y030~Y03F
11 Fuse None
PWR4 *1
Y030
Load＊２
Photo coupler Load＊２

Y03F
Transistor
COM4
- +
DC24V
*1 “Supply voltage to the PWR4” ≥ “Supply voltage to the load”

*2 Output for signal Communication Can not drive induction loads (like relay or solenoid valve).
7-25
Pin arrangement 0~1F(FRONT Left Connector) 20~3F(FRONT Right Connector)
Pin No. Signal Pin No. Signal Pin No. Signal Pin No. Signal
COM2 PWR2 COM4 PWR4
A1 B1 A1 B1
(0V) (+24V) (0V) (+24V)
COM2 COM1 COM4 COM3
A2 B2 A2 B2
(0V) (+24V) (0V) (+24V)
COM2
A3 B3 - A3 - B3 -
(0V)
COM2
A4 B4 - A4 - B4 -
(0V)
A5 Y1F B5 X0F A5 Y3F B5 X2F
A6 Y1E B6 X0E A6 Y3E B6 X2E
A7 Y1D B7 X0D A7 Y3D B7 X2D
A8 Y1C B8 X0C A8 Y3C B8 X2C
A9 Y1B B9 X0B A9 Y3B B9 X2B
A10 Y1A B10 X0A A10 Y3A B10 X2A
A11 Y19 B11 X09 A11 Y39 B11 X29
A12 Y18 B12 X08 A12 Y38 B12 X28
A13 Y17 B13 X07 A13 Y37 B13 X27
A14 Y16 B14 X06 A14 Y36 B14 X26
A15 Y15 B15 X05 A15 Y35 B15 X25

When it was seen from
the front of the module. A16 Y14 B16 X04 A16 Y34 B16 X24
A17 Y13 B17 X03 A17 Y33 B17 X23
A18 Y12 B18 X02 A18 Y32 B18 X22
A19 Y11 B19 X01 A19 Y31 B19 X21
A20 Y10 B20 X00 A20 Y30 B20 X20
The external connectors are the following.

Type Specification Type for JTEKT
Fujitsu*1 FCN-361J040-AU 40 pins , soldering type TIP-5867
*1
Fujitsu FCN-360C040-B 40 pins , case (2 pieces for one set)
The size of the screw of the connector is M2.6 .
And, it Can be Connected with the FCN-360 jack type (for the gold plating) made by Fujitsu Takamisawa
Component Ltd..*1 Be sure to use contact goods for the gold plating.
*1 : FUJITSU COMPONENT LIMITED
7-26
I/O-328G wiring occupation area
130
156
200
7-27
(2) I/O-329G <THK-6410>
I/O-329G
When the switch is changed When the switch is changed

to the left, the status of "A" is to the right, the status of "B" is
displayed on the indicator. displayed on the indicator.
A B
Weight:215g
Internal current
consumption (5V)
Below 330mA
Specification of input
1 Rated input voltage DC24V
2 Rated input current 5mA
3 Operating voltage range DC21.6 - 26.4V
4 ON voltage / ON current 16.8V Max / 3.5mA Max.
5 OFF voltage / OFF current 7.2V Min. /1.5mA Min.
6 Input resistance Approximately4.7k
7
time ONOFF 10msec Max.
8 Points 32 points
9 Common 16 points per common (COM1, COM3)
X000
X00F
COM1
+ - Photo coupler
DC24V
X020
X02F
COM3
+ - Photo coupler
DC24V
7-28
Specification of Output
7.3.3.2. (1) Specification of Output
2 Maximum load current 0.3A / points 2A / 16 points
6 Output element FET open drain
7
8 Points 16 points
10 Fuse 3.2A: 16 pints per fuse *1
*1 When a fuse has blown, fuse alarm is indicated on LED Display.
FUSE
COM2
+ -
DC24V
FET Y010
Load
Y01F
Load
Photo coupler
PWR2
7-29
7.3.3.2. (2) Specification of Output (Output for signal Communication)
2 Maximum load current 0.05A / points 0.8A / 16 points
6 Output element Transistor output
7
8 Points 16 points
10 Fuse None
COM4
+ -
Switch
DC24V *1
Photo coupler
Y030
Load *2
Y03
Load *2
*1 “Supply voltage to the PWR4” ≥ “Supply voltage to the load”

*2 Output for signal Communication Can not drive induction loads (like relay or solenoid valve).
7-30
Pin arrangement 0~1F(FRONT Left Connector) 20~3F(FRONT Right Connector)
Pin No. Signal Pin No. Signal Pin No. Signal Pin No. Signal
COM2 PWR2 COM4
A1 B1 A1 B1 -
(+24V) (0V) (+24V)
COM2 COM1 COM4 COM3
A2 B2 A2 B2
(+24V) (0V) (+24V) (0V)
COM2
A3 B3 - A3 - B3 -
(+24V)
COM2
A4 B4 - A4 - B4 -
(+24V)
A5 Y1F B5 X0F A5 Y3F B5 X2F
A6 Y1E B6 X0E A6 Y3E B6 X2E
A7 Y1D B7 X0D A7 Y3D B7 X2D
A8 Y1C B8 X0C A8 Y3C B8 X2C
A9 Y1B B9 X0B A9 Y3B B9 X2B
A10 Y1A B10 X0A A10 Y3A B10 X2A
A11 Y19 B11 X09 A11 Y39 B11 X29
A12 Y18 B12 X08 A12 Y38 B12 X28
A13 Y17 B13 X07 A13 Y37 B13 X27
A14 Y16 B14 X06 A14 Y36 B14 X26
A15 Y15 B15 X05 A15 Y35 B15 X25

When it was seen from
the front of the module. A16 Y14 B16 X04 A16 Y34 B16 X24
A17 Y13 B17 X03 A17 Y33 B17 X23
A18 Y12 B18 X02 A18 Y32 B18 X22
A19 Y11 B19 X01 A19 Y31 B19 X21
A20 Y10 B20 X00 A20 Y30 B20 X20

The external connectors are the following.
Type Specification Type for JTEKT
Fujitsu*1 FCN-361J040-AU 40 pins , soldering type TIP-5867
Fujitsu*1 FCN-360C040-B 40 pins , case (2 pieces for one set)
The size of the screw of the connector is M2.6 .
And, it Can be Connected with the FCN-360 jack type (for the gold plating) made by Fujitsu Takamisawa
Component Ltd..*1 Be sure to use contact goods for the gold plating.
*1 : FUJITSU COMPONENT LIMITED
7-31
I/O-329G wiring occupation area
130
156
200
7-32
7.3.4. Identification and function of each I/O module component
(1) I/O display LED
(2) Terminal block lock lever
(3) Terminal block
(2) Terminal block lock lever
(1) I/O display LED ---- 0 - F LED display ON/OFF status of I/O.
(OUT-1, OUT-11, OUT-12, OUT-15, and OUT-16 modules “FUSE BLOWN"
of each is alarmed by other ALM LED, in addition to status display by 0 - F
lamps.
(2) Terminal block lock lever - To set and lock terminal block to the module.
(2 levers altogether at top and bottom )
(3) Terminal block ------ Detachable terminal block for I/O wiring
 Detachment of terminal block

PC3J/2J I/O module is of such a construction as to permit simple detachment of I/O
terminal block.
In detaching and attaching, follow the operation sequence given below.
How to remove the terminal block

(1) Open outward both of top and bottom terminal block lock levers with them in fingers.
(2) After complete open of the levers, draw frontward the terminal block.
(If single-side lever only is opened, again draw frontward the terminal block, with its floated-up
end in hand.)
7-33
[ How to remove the terminal block 1 ]
[ How to remove the terminal block 2 ]
How to set the terminal block

(1) Be sure to check that both of top and bottom terminal block lock levers are fully opened outward.
(2) Push-in the terminal block, with its lower stage faced to the left, until it clicks.
Be sure to check that the terminal block is perfectly locked at both top and bottom sides when the
lever was push in.
[ Hot to set the terminal block 1 ]
7-34
7.3.5. Fuse Specification
Type name MAKER : Daito Communication Apparatus Co., Ltd.

Item GP-50 GP-75 MP-63 HM-32 LM-32
Module FUSE OUT-1 OUT-12 OUT-15 OUT-11 I/O-328G
used exchange is OUT-16
possible. I/O-329G
OUT-18*
OUT-19*
FUSE
OUT-28D*
exchange is
impossible. * OUT-29D*
OUT-38F*
OUT-39F*
Profile Plug-shaped Dip shaped micro fuse
Rated current 5A 7.5A 6.3A 3.2A

* The fuses used in OUT-18, OUT-19, OUT-28D, OUT-29D, OUT-38F, OUT-39F can not be replaced
because of the soldered type.
Fuse blown detecting function:

Output modules OUT-1, OUT-11, OUT-12, OUT-15, OUT-16,I/O-328G,I/O-329G have fuse blown
detecting function. Output modules OUT-1, OUT-11, OUT-12, OUT-15, OUT-16 enables to set up
at the unit of each module whether fuse blown is detected or not as error. (OUT-3, OUT-18,
OUT-19, OUT-28D, OUT-29D, OUT-38F, OUT-39F are not provided with this function.)
Error setup
jumper
Cooling
wheel
Fuse
Jumper status Setting Contents CPU status Output module display
Fuse blown. RUN stop

ON detected as error ALM LED .. ON
Error code 43
Fuse blown.
or OFF not detected as RUN goes on ALM LED .. ON
error
7-35
7.4. Base Specification
Five different bases of 2-slot base, 4-slot base, 6-slot base, and 8-slot base (2 bases) are available to
install according to the number of I/O modules. These can be used with additional I/O rack.
And, there is Selector Base. It has selector function.
Bases for PC10/PC3J /2J application

Type
THR-2766 THR-2872 THR-2813 THR-2775 THR-2814
Items
Number of I/O modules
8 modules 6 modules 4 modules 2 modules
installed
Outer dimension
4061307 4241307 3351307 2641307 1931307
(WHD mm)
Installing dimension
39186 40986 32086 24986 17886
(WHmm)
Mounting hole Ф6 bell-shaped hole (M5 screw used)
Weight (kg) 0.8 0.85 0.65 0.5 0.35
* Precautions:
Only one I/O bus connector is used for 2-slot base, 4-slot base, 6-slot base and 8-slot base.
Hence, the number of additionally connectable bases is one set maximum. When connecting two or
more additional bases, use two 8-slot bases (2 pieces of I/O bus connectors) or I/O Branch Module.
Further, in this case the total length of I/O cables and length per cable shall be 5m max and 3m
max respectively.
Note) The maximum quantity of additionally connectable bases is 7 sets maximum.(When using I/O
Branch Module, 3 sets maximum)
When connecting MC256 IV, calculate the quantity of additional bases as one base for one
MC256 IV.
7-36
Base
(5) 5V terminal block (1) Module fixing hole (2) Module connector
(4) I/O bus connector (3) Base mounting hole
(1) Module fixing hole

To fix the selector module, I/O module, power module, etc.
Module fixing screw size: Attach M3X8 equipped with washer.
(2) Module connector

POWER: Power module
CPU/SEL: Selector module
CPU module
high-speed remote I/O module (RMFS)
Device net slave station module (DLNK-S)
0 – 7: I/O module
Communication module
Special (AD, DA etc.) module
(3) Base mounting hole

Used to mount the base.
(4) I/O bus connector

To connect I/O cable.
(5) 5V terminal block (5V, 0V, FG)

DC5V and FG terminal block
7-37
7.5. Power Module Specification
There are power supply module, AC input power source unit (POWER 1) and DC input power source
unit (POWER 2 / POWER 2H).
The POWER 1 can work on input voltage ranging from AC85 to 264V.
The POWER 2 / POWER 2H can work on input voltage ranging from DC18 to 32V.
Power module specification

Type
THV-2747 THV-2748 THV-6374
Items
Name POWER1 POWER2 POWER2H
Input voltage AC85 ~ 264V DC18 ~ 32V
Input frequency 47 ~ 66Hz -
Power consumption 38W max, 80VA max 40VA max 50VA max
Max 20A
(subject to AC100V input)
Rush current Max 5A
Max 40A
(subject to AC200V input)
Rated output
DC5V 4A 5A
current
Over current
DC5V 5.25A min 7.35A min
protection
Over-voltage protection 5.75 ~ 7.00V
Efficiency 65%typ 70%typ
RUN Rated voltage/current DC24V/1A, AC100, 200V/1A
relay
output Surge killer C  R (0.01F + 110)
Outside dimension 35(W)130(H)110(D)
Weight 0.33kg 0.34kg 0.38kg
7-38
Power module
(1) Lower cover
(2) Terminal block
(1) Lower cover

(2) Terminal block
POWER 1 is the terminal block to input AC85 - 264V and output to RUN relays.
POWER 2 / POWER 2H is the terminal block to input DC18 - 32V and output to RUN relays.
"RUN relay" output contact will open and close synchronizing with the CPU-RUN signal.
CPU at running: output contact is closed
CPU at not running: output contact is opened
But the output to RUN relays is only effective in the rack (CPU rack) wherein
CPU module is installed. (No output is effective in the additional I/O rack.)
7-39
7.6. Selector Module Specification
This selector module is used when using additional base other than the basic base on which PC10G is
mounted. This module enables to set up Rack No. and head address of I/O Module addresses to be
allocated. When Selector Base integrated with Selector function is used, this module isn't used.
Type
THU-2765
Items
Function Enable to set up Rack No. and I/O address
Consumption current 31mA
Outside dimension 35(W)130(H) 110(D)mm
Weight 0.16kg
Selector module
This is needed when I/O rack for additional installation is used.
(1) POWER lamp (2) ERROR lamp
(6) Notice Label
(3) RACK NO. selector switch
(4) I/O ADDRESS selector switch
(5) Upper cover
(1) POWER lamp

Showing that 5V power supply is ready in the base, but turning off when instantaneous
interruption of the power is detected. (When power throw-in is made at the additional I/O rack
side later than the CPU rack, the CPU detect I/O power interruption and, hence, this lamp
does not turn ON. For resetting it, turn on CPU RESET switch.
(2) ERROR lamp
This lamp turns ON against error of the I/O module, which is installed on applicable rack, and
parity error of I/O bus.
(3) RACK NO. selector switch
This switch is to select Rack No. in the range of 1 - E (hexadecimal).
Selection of Rack No. "F" or Rack No. doubling would result in error.
(4) I/O ADDRESS selector switch
This switch intended to decide the head address of the rack selects the addresses in the range
of 00 - 3F (hexadecimal).
(5) Upper cover
(6) Notice Label
This label describes notice on mounting on the base unit (Added from shipment after February
2019).
It is prohibited to mount SELECTOR to other than the CPU/SEL slot of the base unit.
7-40
 Rack No. setup and head address setup
Where additional I/O racks are installed, rack No. and head address must both be set up using RACK
NO. selector switch and I/O ADDRESS selector switch in the selector module.
(1) Rack No.

Rack No. is selected from the range of 1 to E. ("0" is for CPU base and "F" for CPU incorporation,
therefore select in the range from 1 to E for additional I/O rack.) Rack No. has no relation with I/O
cable connection order. Rack No. is intended to discriminate each rack. Where two or more
racks exist, avoid double setup.
(2) Rack head address
For an additional I/O rack, it is allowed to set the head address for each rack.
Set up it by upper two digits of the head address of each rack and I/O ADDRESS selector switch.
Further, in setting up, be careful to avoid overlapping of other rack to I/O address. Skip setup of
I/O address is trouble free.
[EX.] Rack No.=2

Rack head address = X130
RACK NO.
(or Y130)
I/O HIGH
ADDRESS
I/O LOW
ADDRESS
Note) Switch OFF the power source before switch setting up.
Related self-diagnosis
For the details of the following items, refer to “Self-Diagnosis."
 Use of I/O Rack F
 I/O Rack No. overlap
 Overlap of I/O Rack No.
(3) I/O Address

I/O addresses in each base are allocated according to the number of allocation points which were
setup on PARAMETER in the order from left slot (slot 0), based on the head address as a
reference.
7-41
7.7. I/O Cable Specification
This cable is used to connect the basic base, on which CPU is mounted, with additional base on which
Selector Module is mounted.
Cable length Type Remarks

0.5m THY-2770 -
1m THY-2771 -
1.5m THY-5146 Production to order
2m THY-5045 Production to order
*) Cable length is optionally available up to 3m maximum on special request (order).
7.8. I/O Branch Module Specification

This module is used to connect two or more additional bases.
Type
THU-2774
Items
Outside dimension 93(W)113(H)18.5(D)mm
Installing dimension 77.6(W)86(H)mm
Installing holes 06 bell-shaped hole (M5 screw used)
Weight 0.19 kg
*) This module is not needed when 8-slot bases (2 pcs.)are used.
7.9. I/O Conversion Cable Specification

This cable is used to connect bus line to devices (MC256IV, etc.) where in PC2 bus is ready and to
connect bus line to the I/O base of PC2.
Cable length Type Remarks

0.5m THY-2772 -
1m THY-2773 -
*) The cable length is optionally available up to 3m maximum on special request (order).
7-42
7.10. Selector base specification
Selector base PC3J/PC2J is the integrated base combining conventional base and selector module and
can be used additional base for each CPU module. (However cannot be used for CPU base.)
Setting for rack No. and heading address setting for I/O module are executed.
Selector base
Type
THR-5643 THR-5644 THR-5645
Item
Actually installed I/O number 8 Modules 6 Modules 4 Modules

Outer dimension
370.51607 299.51607 228.51607
(WHD mm)
Mounting dimension
350145 280145 210145
(WH mm)
Consuming current 32mA (Typ.)
Weight 0.69kg 0.57kg 0.45kg
7-43
7.10.1. Composition example of Selector Base
Selector base has configuration shown in below:
System configuration example I/O module

Communication module
Special module
or blank
POWER module
CPU module
CPU base
CPU base
I/O cable
POWER module
8 slots selector base

POWER module
Additional base
6 slots selector base

POWER module
4slots selector base
Note) Selector base cannot be used as CPU base.

Use one of the bases for CPU from 8 slots base(2), 6 slots base, 4 slots base and 2 slots base.
7-44
7.10.2. Name and function of each portion for Selector Base
(1) POWER lamp
POW ERR
(2) Error lamp

RACK C C
S No.
N N
(3) Rack No. select switch W I/O H
1 ADRS 1 2
I/O L
(4) I/O address select switch ADRS
5
V
0
(5) 5V power source terminal V
F
G
(7) (8)
Connector for power Connector for I/O
(6) I/O bus connector module module
(1) POWER lamp

Indicates 5V power source is supplied to base module.
However the lamp turned off when interruption of power source is detected. (This lamp does not light
because CPU detects I/O power down when power source of selector base is turned on after CPU
started up. Turn on CPU’s reset switch to release this state)
(2) Error lamp

Lights when module error and I/O bus parity error that are amounted on applicable rack are
generated.
(3) Rack number selective switch

Rack number is set within range 1 ~ E (Hexadecimal notation). Error is generated when rack
number “E” is selected or duplicated rack No. is selected.
(4) I/O address selective switch

Determines heading of address number for rack I/O module within range 00 ~ 3F (PC3J).
Pay attention for giving overlapped I/O address to the rack belonging to other rack. Random setting
of I/O address is not problem.
7-45
Setting example of rack No. and I/O address
RACK Rack No.=1

No.
I/O H
ADRS
I/O heading address X130
(or Y130) is set.
I/O L
ADRS
(5) 5V power source terminal block

5V, 0V :This terminal is used for receiving terminal 5V from external source or supply 5V to outer
load. Do not connect 5V and 0V terminals between racks having power source in their rack.
This will be parallel operation of module, which causes breakage of module. Also do not
connect terminal in reverse polarity or supply power other than 5V, which prevents module
from breakage.
(Recommending screw tightening torque: 1N·m)
FG: Connect to the earth block grounded by class D.
(6) I/O bus connector

Serves to connect I/O bus cable.
(7) Connector for power module

This connector is used to connect POWER 1 module or POWER 2 or POWER2H module.
(8) Connector for I/O module

This connectors are used to connect with such module as I/O module, communication module or
special module. Do not connect with CPU module or selector module, if connected the module could
be broken.
7-46
7.11. Communication specification
7.11.1. COMPUTER-LINK specification (Communication port L3)
1 Interface standard Conforming to EIA RS-422
2 Communication system Start-stop synchronous, semi-dual
3 Transmission line Shielded twist bare cable
0.3,0.6,1.2,2.4,
4 Communication speed
4.8,9.6,19.2,38.4,57.6,115.2kbps (presetting*1)
5 Transmission distance Max 1 km (total length)
6 Transmission form 1:N
7 Number of stations Max 32 stations (Address No. 00 - 37 [set with octal number *1])
Start bit1 bit
Data length 7 or 8 bit (presetting*1)
8 Data type
Parity1 bit (even parity )
Stop bit 1 or 2 bit (presetting*1)
9 Characters used ASCII code
10 Error detection Parity check, sum check
*1 It is set up by the link parameter.
(Note) When setting the memory capacity, if the incorporated standard link parameter in PC2 mode
has not been set, the computer link operates as set in .
7.11.2. PC-LINK specification (Communication port L3)

1 I/O points Max 512 points/1 port
Transmission points per When 19.2kbps / 57.6kbps is selected : Max 384 points
2
station When NCx3 selected : Max 512 points
3 Communication area XY,M,L,EXEY,EM,EL
4 No. of stations Max 16 stations (master 1, slave 15 ) /1 line
5 I/O allocation Minimum setting unit :8 points
6 Transmission distance Max 1 km (total length)
7 Signal level Conforming to EIA RS-422
8 Communication speed 19.2kbps / 57.6kbps / NCx3speed *1 (Presetting*2)
9 Synchronous system Start-stop synchronous
10 Transmission system Semi-dual system (2-wire type)
11 Bit composition JIS 7 unit system, 10 bits
12 Check system Vertical parity, horizontal parity (Even number)
13 Cable Shielded twist bare cable
Transmission data at CPU
14 OFF data / Pre-stop data (Presetting*2)
stopping
CPU operation against
15 Stop/RUN continue (Presetting*2)
communication error
Communication error under
16 As error /repeat (Presetting*2)
connection sequence
*1 This speed is set to communicate with NC machine corresponding to M-NETx3 speed.
*2 It is set up by the link parameter.
7-47
7.11.3. SN-I/F specification (Communication port L3)
1 Data link I/O : 32byte, register : 32byte
2 Transmission distance Max 3 m (only inside of controller box)
Parity ..............1 bit (even parity)
3 Data type Data length .....8 bit
Stop bit ...........1 bit
4 Synchronous system Start-stop synchronous
5 Transmission system Semi-dual system (2-wire type)
6 Communication speed 288kbps
7 Cable Shielded twist bare cable
(Note) When the setting of memory capacity is in PC10 and PC3 mode, and the link
parameter is not set, SN-I/F operates.
7.11.4. FL-net / Ethernet / FL-remote specification

7.11.4.1.FL-net specification (Port L1, L2)
No. Item Specifications
1 Physical Layer 10BASE-T,100BASE-TX
2 Data Transfer Rate 10Mbps,100Mbps
*1
3 Maxmum cable length Max 100m (from node to node (when connected one by one),
In communication at 10Mbps between node and HUB/ between HUB and HUB)
In communication at Total extension: Max 2100m (HUB: 20 units at the maximum)
100Mbps
4 Maximum Number of Nodes 241 (254 stations) *2
5 Data link function
Communication Functions Message server function
Message client function
6 Relay Link Capacity 512 words
7 2048 words /6144 words /8192 words
Register Link Capacity
(Selectable with dip switches.)
8 Message Data Capacity 1024 bytes
*1. Designated HUB is used for auto negotiation. It is 100Mbps when auto negotiation is connected
with each other.
*2 Figure in ( ) represents the number of nodes including maintenance.
Specifications for Data Link
Specifications
No. Item
Relay link Register link
L000 - L7FF
L1000 - L2FFF*2
M000 - M7FF
M1000 - M17FF*2 R000 - R7FF
X･Y000 - X･Y7FF D0000 - D2FFF
1 Link Area *1
EL000 - EL1FFF U0000 - U1FFFF*2
EM000 - EM1FFF EB00000 - EB3FFFF*2
EX･EY000 - EX･EY7FF
GX･GY0000 - GX･GYFFFF
GM0000 - GMFFFF
2 Link Capacity 512 words 2048 words/6144 words/8192 words
Transmission
3 Ditto ditto
Capacity per Unit
Communication
4 N:N or 1:N N:N or 1:N
Method
*1 Usable area is limited by the setting of operation mode and memory capacity.
*2 L1000-L2FFF M1000-M17FF U08000-U1FFFF EB00000-EB3FFFF is usable only in PC10 mode.
It cannot be used in PC10 standard mode.
7-48
7.11.4.2. Ethernet specification (Port L1, L2)
1 Physical Layer 10BASE-T/100BASE-TX
2 Data Transfer Rate 10Mbps, 100Mbps
3 Maxmum cable length *1 Max 100m (between node and node (when
connected one by one, between node and HUB
, between HUB and HUB)
4 (1) Computer Link Function
Communication Functions
(2) File Memory Function
5 Relay Link Capacity Up to 32 ports
6 Register Link Capacity Up to 1 kilobyte
7 Transmission:2 kilobytes
Message Data Capacity
Reception:2 kilobytes
*1 Designated HUB is used for auto negotiation. It is 100Mbps when auto negotiation is connected
with each other.
7.11.4.3. FL-remote specification
Item Specifications
Physical Layer 10Mbps, 100Mbps
Max 100m (Between master and HUB, between master and slave (when
Maximum cable length *1 connected one by one))
Total extension: Max 2100m (HUB: 20 units at the maximum)
Maximum connection
64(master 1 slave 63)
Number of Nodes
Maximum number of
slave：01~63
connected nodes
Node address Input: 2048 points max, Output: 2048 points max
I/O points number Input: 64 points max, Output: 64 points max
I/O points per 1 slave Minimum unit of 8 points
I/O allotment X・Y，M，L，EX・EY，EM，EL，GX/GY，GM
Link area I/O communication
*1 Designated HUB and FRMT are used for auto negotiation. It is 100Mbps when auto negotiation is
connected with each other.
7-49
8. CPU FUNCTION
8.1. CPU Setting Procedure
" Data area separate mode", " Data area single mode", and "PC2 compatible mode" are available as
CPU operation mode. And program capacity and data capacity can be selected as necessary.
Data area separate mode: has independent data area every each program.
Data area single mode: data area in each program is common to other programs.
PC2 compatible mode: Peripheral equipment of PC2 series can be used.
The number of available programs is limited to one 32K words program
(Program-1).
Any function extended in PC3J is unable to be used under this mode.
PC10 mode (including PC10 standard mode) is added in Ver.3.00 and thereafter.
Selection of program capacity and flash register are added to PC10 mode.
Flash register size: 0 - 4096 Kbytes (Setting in the unit of 64Kbytes is allowed.)
(Select "0" when it is unused.)
Relationship of CPU operation mode to program capacity and data capacity

Program capacity KW Basic area data capacity KW Extended area data capacity KW
Mode Relay
PRG.1 PRG.2 PRG.3 PRG.1 PRG.2 PRG.3 Data Buffer
register
60 60 60
PC10 mode 32
120 60 0 32 32 16 128 256
(Ver3.00~)
180 0 0
PC10 standard 60 8
60 60 8 8 16 32 128
/PC3JG
Separate mode 1 16 16 16 8 8 8 8 －－
Separate mode 2 32 － 16 16 － 8 8 －－
PC10
Separate mode 3 16 32 － 8 16 － 8 －－
/PC3 Separate mode 4 16 16 － 8 16 － 8 16 －
Separate mode 5 16 － 16 16 － 8 8 16 －
1
Single mode 1 16 16 16 24＊ 8 －－
1
－ 16 24＊－－
Single mode 2 32
＊1
8
8
Single mode 3 16 32 － 24 8 －－
1
Single mode 4 32 －－ 24＊ 8 16 －
1
Single mode 5 16 －－ 24＊ 8 32 －
1
Single mode 6 16 16 － 24＊ 8 16 －
PC2 compartible 32 －－ 24 －－－－－
*1 The basic area data in single mode is common to each program.
In addition to the above, as CPU operation mode parameter execution/non-execution of program-2, 3

and its link with RUN signal can be selected.
Item Selection value
Program1 Effective [EXECUTE] (fixed)
*2
Program execution Program2 Effective /ineffective [Execute/non-execute]
Program3 Effective /ineffective [Execute/non-execute]
Program1 Link (fixed)
*3
RUN signal link Program2 Link /Non-link
Program3 Link /Non-link
*2 Execution of Program-2 and-3 can be selected from the parameters.
If "INEFFECTIVE" is selected, the applicable program (program-2 or -3) is not executed.
*3 Link of program-2 and -3 with RUN signal is selected from the parameters. If "LINK" is selected
and the applicable program stops, RUN signal turns OFF, linked with the program, then allowing
stop of all the programs.
8-1
8.1.1. Separate patterns of program data
By presetting CPU operation mode, the PC10G can select program capacity and data capacity as
necessary. Program capacity and data capacity are the same as PC3JG from Ver.2.04 and after.
(1) Data area separate mode

PC10 mode (Ver3.00~)
PRG.1 PRG.2 PRG.3
Program capacity can be varied.
Program 1 Program 2 Program 3 P1: 60KW P2:60KW P3:60KW
(60KW) (60KW) (60KW) P1:120KW P2:60KW P3: 0 KW
P1:180KW P2: 0KW P3: 0KW
I/O (0.128KW)
Basic area data Basic area data Basic area data

(32KW) (32KW) (32KW)
Extended area data

(400KW)
Capacity for communicating with

PCwin can be varied.
Common area 0 - 4096 Kbytes
Flash resister (Setting in the unit of 64Kbytes is
(2048KW) allowed.)
PC10 standard/PC3JG mode (-Ver2.04)

PRG.1 PRG.2 PRG.3
Program 1 Program 2 Program 3

(60KW) (60KW) (60KW)
I/O (0.128KW)
Basic area data Basic area data Basic area data

(8KW) (8KW) (8KW)
Includes buffer register that cannot be
designated directly.
Common data
(It can be designated directly in
(176KW)
expanded mode.)
8-2
Separate pattern 1
PRG.1 PRG.2 PRG.3

(16KW) (16KW) (16KW)
I/O
Basic area Basic area Basic area

data data data
Extended area
data
Separate pattern 2
PRG.1 PRG.3
Program 1 Program 3
(16KW)
(32KW)
I/O
Basic area
Basic area data
data
Extended area
data
8-3
Separate pattern 3
PRG.1 PRG.2
Program 1 Program 2
(16KW)
(32KW)
I/O
Basic area
data Basic area
data
Extended area
data
Separate pattern 4
PRG.1 PRG.2
Program 1 Program 2
(16KW) (16KW)
I/O
Basic area
data Basic area
data
Extended area
data
8-4
Separate pattern 5
PRG.1 PRG.3
Program 1 Program 3
(16KW) (16KW)
I/O
Basic area
Basic area data
data
Extended area
data
8-5
(2) Data area single mode
Single pattern 1
PRG.1 PRG.2 PRG.3

(16KW) (16KW) (16KW)
I/O
Basic area
data
Extended area
data
Single pattern 2
PRG.1 PRG.3
Program 1 Program 3
(16KW)
(32KW)
I/O
Basic area
data
Extended area
data
8-6
Single pattern 3
PRG.1 PRG.2
Program 1 Program 2
(16KW)
(32KW)
I/O
Basic area
data
Extended area
data
Single pattern 4
PRG.1
Program 2
(32KW)
I/O
Basic
area
Extended
area
8-7
Single pattern 5
PRG.1
Program 1
(16KW)
I/O
Basic area
data
Extended
area
data
Single pattern 6
PRG.1 PRG.2
Program 1 Program 2
(16KW) (16KW)
I/O
Basic area
data
Extended area
data
8-8
(3) PC2 compatible mode
PRG.1
Program 1
(32KW)
I/O
Basic area
data
8-9
8.1.2. Program Execution
8.1.2.1. Arithmetic processing method
The PC10G can execute two or more programs, that is, three sequence programs maximum. In detail,
these programs are executed in the order of program-1, program-2, program-3 and end processing and
repeated.
The number of programs and execution/ non-execution (*1) of program-2 and -3 are set up using the
CPU operation mode parameters.
Furthermore, link/non-link (*2) of program-2 and -3 with RUN signal is also set using the CPU operation
mode parameters.
*1 Execution of program-2 /-3 can be selected from the CPU operation mode parameters. If
INEFFECTIVE (Non-execution) is selected, the applicable program (program-2 or 3) is not executed.
*2 Link of program-2/-3 can be selected from the CPU operation mode parameters. If "LINK" is selected
and the applicable program stops, RUN signal turns OFF linked with the program stop and all other
programs stop simultaneously.
(1) Program execution sequence
Power ON or Reset/Start
Update I/O data

3
1st scan only*
PRG.1 PRG.2 PRG.3
Initial 1st Initial 1st Initial

3 3 3
program* program* scan program*
scan
3
only*
3 only*
START START START
Main Main Main

program program program
CALL
END END END
4 4 4
LABEL * LABEL * LABEL *
Subroutine Subroutine Subroutine
RET program program program
RET RET RET
· ·
· ·
· ·
PEND PEND PEND
*3 Initial program is a sequence program being executed only once whenever the power switch is
turned ON or RESET/START is pressed.
*4 :showing label No. of subroutine program. 128 subroutines of S000 ~ S127 per program
and 1024 subroutines of EL0000~EL1023 commonly available for jump and subroutine can be
created respectively.
8-10
(2) Execution/non-execution of program
Execution/non-execution of program 2 and program 3 is set using the CPU operation mode
parameters. Program for which non-execution was selected is not executed.
Execution of program -1,to -3 Execution of program -1,-3 Execution of program -1,-2 Execution of program –1 only
PRG.1 PRG.1 PRG.1 PRG.1

Execution (fixed) Execution (fixed) Execution (fixed) Execution (fixed)

Execution Non-execute Execution Non-execute

Execution Execution Non-execute Non-execute
End processing End processing End processing End processing

(Update I/O data) (Update I/O data) (Update I/O data) (Update I/O data)
(3) Link of program with RUN signal
Link of program-2 and -3 with RUN signal can be selected from the CPU operation mode parameters.
If "LINK" is selected and applicable program stops, RUN signal turns OFF linked with the program
and all other programs stop simultaneously.
Link with RUN signal (by parameter setting) RUN signal status at program stopping
Program-1 Program-2 Program-3 Program-1 Program-2 Program-3
Link (fixed) Link Link OFF OFF OFF
Link (fixed) Non-link Link OFF Continued OFF

Link (fixed) Link Non-link OFF OFF Continued
Link (fixed) Non-link Non-link OFF Continued Continued
(4) Execution of SFC program
The SFC program is executed after the main program of each program.
START
Main program SFC program
END
8-11
8.1.2.2. Sub-routine
The sequence program includes the same processing at many positions, and these parts can be collected
as subroutine at one position.
When the program contains CALL command, the subroutine having a number designated by CALL
command is executed, and control returns to the original program processing through RET command.
Processing sequence
START (1)
(6)
CALL S***
(3) Repeats (2) – (6) hereafter.
CALL S***
(5)
END
LABEL S***
(2) (4)
Sub-routine
RET
Sub-routine number ranges from S000 to S127, and the nesting structure shown below is allowed:
1024 from EL0000 to EL1023 is additionally included in PC3J series.
Processing sequence
START (1)
(6)
CALL S***
Repeats (2) – (6) hereafter.
(5)
END
LABEL S***
(2)
CALL S###
(4)
RET
LABEL S###
(3)
RET
8-12
8.1.2.3. Interruption program (constant cycle interruption)
Constant cycle interruption that can be set in milliseconds can be set up to four at the maximum in PC10G
standard mode.
Interruption program can be described in any of P1, P2, and P3 in the form of subroutine starting with label
"I0–I3" and ending with RETI command. However, duplication by P1, P2, and P3 is prohibited.
Interruption cycle can be set respectively in the range from 0 to 65535ms (in millimeters), and they are set
as parameter by PCwin. If 0 is designated here, absence of interruption is set.
When interruption is enabled, interruption program having a label of interruption number"I0–I3 is executed
depending on each cycle, and control is returned to the original program processing by RETI processing.
Program Program 2 Program 3
|---[START ]
|---[START ] |---[START ]
|---[END ]
|---[Label I1 ] |---[END ] |---[END ]
|---[Label I0 ] |---[Label I2 ]
|---[RETI ]
|---[PEND ]
|---[RETI ] |---[RETI ]
|---[PEND ] |---[PEND ]
8-13
Note on interruption program
(1) Execution of interruption program can be prohibited or permitted by application command DI, EI, PDI,
and PEI command. (See the programming manual T-307 for detail.)
(2) When power is turned on or when resetting and starting, execution of interruption program is
prohibited (DI status), therefore EI command must be executed in advance for executing interruption
program.
(3) Interruption response speed: several microseconds - several ten microseconds. However, it may be
delayed 100 microseconds in the worst case when the condition below is overlapped.
1) Interruption processing on system side: Several - Several ten microseconds

2) In the course of executing a command: When interruption occurs while a basic command and
application command is being executed, interruption program is executed after the processing of
corresponding command is completed. Therefore, when an application command of long processing
time such as block transfer command is used, interruption response may be delayed. Be careful.
(Especially when a special module command (such as SPR and SPW) is being executed,
interruption response may be delayed several hundred microseconds.)
 Supplement
As for PC10G, interruption is allowed in the course of end processing (refreshing of I/O and link).
(Interruption was prohibited in the course of end processing by PC2 interruption function.)
(4) Priority of interruption factor is as follows. Interruption with higher rank than the interruption program
being executed is processed in advance if it is in EI condition. On the other hand, interruption with
lower rank than the interruption program being executed is pended until RETI command is executed
even if it is in EI condition.
High Priority Low
Interruption level 64 65 66 67
Interruption number I0 I1 I2 I3
8-14
(5) Enable Interrupt status (EI status) is set even when interruption program is being executed. Therefore
when the time for executing an interruption program with higher priority is reached in the course of
interruption execution, the interruption program with higher priority is executed.
Priority
Interruption program I0
Main program
Time
Interruption Interruption
program I2 program I2 is
is executed. over.
When the time has come When the interruption

to execute I0 with higher program I0 is finished,
priority during execution the program is executed
of interruption program from the middle of I2.
I2, I0 is executed.
When it is not desired to execute any other interruption program while the interruption program is being
executed, use "partial disable interrupt (PDI)" and "partial enable interrupt (PEI)".
EX:
|-------------------------------------[LABEL I3 ]-|
|-------------------------------------[PDI 64d 3d ]-|



|-------------------------------------[PEI 64d 3d ]-|
|-------------------------------------[RETI ]-|
(6) Interruption program is executed upon image memory. Therefore the output data calculated by
interruption processing is not output to the external output module until END command finishes one
scan. When you want to output externally the result processed by interruption on the spot, use I/O
control command RIO, RI,RO, and ARIO before RETI command.
8-15
8.1.2.4. Constant scan function
Perform constant scanning by describing the following command immediately after START command of P1.
P1
|--------[START ]
|-------[SYS 20 10 0]
|---[SYS 20h Time 0]

Set the scan time in milliseconds by BCD (10ms in the example above).
Constant scan designation (20ch)
When a value smaller than actual scan time is set, constant scan is not applied naturally. Therefore, set a
value greater than the maximum of scan time.
When the previous scan time has exceeded the preset value, turn on V56(CY) when executing this
command.
Do not set more than one.
Note: Setting of scan time is "1 - 99".

Significant digit of OP2 is two digits. When a figure of three or more digits is set, upper digits are
ignored.
8-16
8.1.3. Inter-program data utilization
As mentioned in the foregoing subsection, the PC10G can execute three different sequence programs
maximum in the given order. These program data can be utilized mutually for each program without
special setting.
(1) Data area separate mode

The basic area data are independent from each other every each program. On the other hand, the
I/O area and extended area data are common to each program.
(1-1) Basic area
PRG.1 PRG.2 PRG.3
START START START

· · ·
· · ·
· · ·
P2-M100 M100 M100 Y200 P2-M110
=H P3-D0000L=12h
Sequence X000 EM0000

EM0000 Y200 X000 M100
program
· · ·
· · ·
· · ·
END END END
PEND PEND PEND
I/O area X000

Y200
M100 M100 M100

Basic area
M110
data
D0000
Extended
area data EM0000
Where data area in other program is specified,

P* representing program No. ( P1=Program-1, P2=program-2, P3= Program-3) is prefixed to each
program address.
EX. P2- M100 : M100 of program-2

P3-D0000L: D0000L of program-3 (Byte below D0000)
8-17
(1-2) I/O area and extended area
PRG.1 PRG.2 PRG.3
START START START
· · ·
· · ·
· · ·
P2-M100 M100 M100 Y200 M100
=H P3-D0000L=12h

EM0000 Y200 X000 P2-M110
program
· · ·
· · ·
· · ·
END END END
PEND PEND PEND
I/O area X000

Y200
M100 M100 M100

Basic area
M110
data
D0000
Extended
area data EM0000
(2) Data area single mode

The data area in each program is common to other programs.
PRG.1 PRG.2 PRG.3
START START START

· · ·
· · ·
· · ·
M100 M100 M200 Y200 M300

=H D0000L=12h

EM0000 Y200 X000 M310
program
· · ·
· · ·
· · ·
END END END

PEND PEND PEND
I/O area X000

Y200
M100
M200
Basic area
M300
data
M310
D0000
Extended
EM0000
area data
8-18
(3) PC2 compatible mode
Under this mode the number of programs is limited to one program (Program-1).
No extended area is available as the data area.
PRG.1
START
· · ·
M200 M100
Sequence M200
program =H D0000L=12h
· · ·
END
PEND
I/O area X000

Y200
M100
Basic area
M200
data
D0000
8-19
8.2. User memory data
8.2.1. Parameter
The following parameters are available as those settable at user side. These are settable according to
each program. (For the setting method, see the PCWin Operation Manual.)
Items Settable range
PC10mode,PC10standerd mode,PC3JGmode
User memory Data area separate mode1~5,Data area single mode1~6
CPU operation
PC2compatible mode
mode
Program 1 Effective [Execute] (fixed)

Program execution Effective [Execute]
Program 2, 3
/Ineffective [Non-execute]
Program 1 Link (Fixed)
Link with RUN signal
Program 2, 3 Link /Non-link
Overall
Scan time timer value Initial program 1 - 65535ms
Basic performance
Main program
Scan time over
I/O table verification error
Running status against error Stop/continue
Applied command error
Data error
I/O module allocation *1 Type identification code Module identification code
(0 - E rack, 0 - 7 slots ) Allocation points 0 - 64points/slot
Interruption (constant cycle 0 - 65535ms
Interruption No.0 - No.3
interruption mechanism) Program 1, 2, 3
Link *2
Link parameters Depending on type of link module
module
Other Program name 64characters (half size)
*1 The CPU has the function to recognize the installation status of I/O module, whereby I/O
configuration preset in parameters is compared with the real installation status of same module
when the power switch is turned ON or RESET is pressed.
Therefore, incorrect configuration of I/O module or use of incorrect module type and missing
parameter setting would result in " I/O TABLE VERIFICATION ERROR".
In addition to the above function, allocation of I/O address occupied points to each slot is can be
set and this data is prior to the real points in I/O module.
*2 Twenty-four (24) communication modules (link) maximum can be installed.
However, the number of modules per program is up to 8 maximum. A built-in link is allocated as
one module.
8.2.2. Program capacity/data capacity

Program Timer/ Link
Internal Keep-rela Rise/fall
Data area
*1 counter relay Extended Extended

CPU relay y detection Link register
T,C0-1FF L0-7FF R0-7FF
Data register buffer flash
operation
Cap I/O M0-7FF K0-2FF P0-1FF
mode ET,C0-7F EL0-1FF [KW] register register
acity No. [Points] EM0-1FFF EK0-FFF EP0-FFF [KW]
GM0-FFFF [Points] F F [KW] [KW]
KW [Points]
[Points] [Points] [Points]
60 1 4096 768 2560 10240 2560 2 12 - -
PC10 60 2 Basic 2048 4096 768 2560 10240 2560 2 12 - -
mode
(Ver3.00 60 3 4096 768 2560 10240 2560 2 12 - -
and Common Extended (67584)
over)
73728 4096 2048 8192 4096 - 128 256 2048
to program
-1,-2 -3 Total 2048 86016 6400 9728 38912 11776 6 164 256 2048
PC3JG/ 60 1 2048 768 512 2048 512 2 4 - -

PC10 60 2 Basic 2048 2048 768 512 2048 512 2 4 - -
standar
d 60 3 2048 768 512 2048 512 2 4 - -
(Ver2.04 Common Extended
and (67584) 73728 4096 2048 8192 4096 - 32 128 -
to program
less)
-1,-2 -3 Total 2048 79872 6400 3584 14336 5632 6 44 128 -
*1 Inputs/outputs are all common to all the programs. Extended input output is unusable for actual I/O.
8-20
8.2.3. I/O address table
8.2.3.1. PC3JG/PC10 standard mode(~Ver.2.04)
*2 Data
Identif
Address
Bit Word Number
area
No
ier
Name Points Indirect byte
address address of words address holding
*1 1 X Input
X,Y000 – 7FF 2048 X,Y00W – 7FW 128 200 – 2FF -
*1 2 Y Output
Bit address area

3 M Internal relay M000 - 7FF 2048 M00W - 7FW 128 300 - 3FF -
4 K keep-relay K000 - 2FF 768 K00W - 2FW 48 40 - 9F O
5 V Special relay V000 - 0FF 256 V00W - 0FW 16 A0 - BF -
Basic area
*1 6 T Timer
T,C000 - 1FF 512 T,C00W - 1FW 32 C0 - FF -
*1 7 C Counter
8 L Link relay L000 - 7FF 2048 L00W - 7FW 128 100 - 1FF -
9 P Edge detection P000 - 1FF 512 - - - -
Word address area

*3 10 D Data register D0000-0 - FFF-F 65536 D0000 - FFF 4096 2000-3FFF O
11 R Link register R0000-0 - 07FF-F 32768 R0000 - 07FF 2048 1000-1FFF O
12 N Present value register N0000-0 - 01FF-F 8192 N0000 - 01FF 512 C00 - FFF O
13 S Special register S0000-0 - 03FF-F 16384 S0000 - 03FF 1024 400 - BFF O
*3 14 B File register B0000-0 - 1FFF-F 131072 B0000 - 1FFF 8192 C000-FFFF O
*1 15 EX Extended input
EX,EY000 - 7FF 2048 EX,EY00 - 7FW 128 B00 - BFF -
*1 16 EY Extended output
Bit address area
17 EM Extended internal relay EM000 - 1FFF 8192 EM00W - 1FFW 512 C00 - FFF -
18 EK Extended keep-relay EK000 - FFF 4096 EK00W - FFW 256 200 - 3FF O
19 EV Extended special relay EV000 - FFF 4096 EV00W - FFW 256 400 - 5FF -
Extended area 1
*1 20 ET Extended timer
ET,EC000 - 7FF 2048 ET,EC00 - 7FW 128 600 - 6FF -
*1 21 EC Extended counter
22 EL Extended link relay EL000 - 1FFF 8192 EL00W - 1FFW 512 700 - AFF -
Extended edge
23 EP EP000 - FFF 4096 - - - -
detection
Extended present EN0000-0 -
24 EN 32768 EN0000 - 07FF 2048 2000-2FFF O
Word address area
value register 07FF-F

Extended setup value
25 H H0000-0 - 07FF-F 32768 H0000 - 07FF 2048 3000-3FFF O
register
ES0000-0 -
26 ES Extended special register 32768 ES0000 - 07FF 2048 1000-1FFF O
07FF-F
*1 27 GX Extended input GX,GY0000 - GX,GY000W - C000 -
Extended
Bit address
65536 4096 -
area 2
*1 28 GY Extended output FFFF FFFW DFFF

GM000W - E000 -
area
29 GM Extended internal relay GM0000 - FFFF 65536 4096 -

FFFW FFFF
*3
Word address
30 U Extended data register U0000-0 - 7FFF-F 524288 U0000 - 7FFF 32768 0000-FFFF O
area
*3
31 EB Extended buffer register Not use - EB00000-1FFFF 131072 - O
*1 Address can not be allocated in overlap to X and Y (EX,EY,GX,GY) and T and C ( ET, EC).
It is incorrect to allocate like (X000/Y000, EX000/EY000, T000/C000, ET000/EC000. )
*2 Used to indirectly designate address using applied command. For indirectly designating address to extended area
and data area of other program, follow the sequence given below.
Use the register of area designated with indirect address as the applied command operand register.
Designate indirect address with offset+ indirect byte address. The offset value is 0000h in the extended area, 4000h
in Program 1, 8000h in Program 2, and C000h in Program 3.
EX. 8 points (1 byte) of EX000 to EX007 in the extended area are transferred to the lower byte of Program 2 D0000.
MOVH (EM00W) -> (P2-D0100)
The register (EM00W) of extended area The register P2-D0100) of Program 2 is used
is used to designate the extended area to designate the area of Program 2 with
with indirect address. indirect address.
Herein, set in advance indirect byte address 0B00h (0000h + 0B00h) in the extended area EX000 - EX007 in the
extended internal relays (EM00W (EM000 - EM00F) and indirect byte address A000h (8000h + 2000h) of D0000
lower byte in the data register P2-D0100 of Program 2 respectively.
*3 An address changes by the mode of CPU of operation.
8-21
8.2.3.2. PC10 mode(Ver.3.00~)
Coloring part is the address which increased by PC10G (Ver.3.00 and over).
*4
Address area
Data
Identifier
indirect byte
Bit address Word address Number of holding
Name points address
（***－***）（***－***） words area at
（***－***）
power cut
off
P Edge detection P000 P1FF 512 P00W P1FW 32 - - -
K Keep-relay K000 K2FF 768 K00W K2FW 48 40 9F ○
Bit address area

*8 V Special relay V00 VFF 256 V0W VFW 16 A0 BF -
TC Timer Counter T000 T1FF 512 T00W T1FW 32 C0 FF -
L Link relay L000 L7FF 2048 L00W L7FW 128 100 1FF -
*6 XY Input Output X000 X7FF 2048 X00W X7FW 128 200 2FF -
M Internal relay M000 M7FF 2048 M00W M7FW 128 300 3FF -
*8 S Special register S000-0 S3FF-F 16384 S000 S3FF 1024 400 BFF ○
Word address
Basic area
N Present value register N000-0 N1FF-F 8192 N000 N1FF 512 C00 FFF ○
area
*7 R Link register R000-0 R7FF-F 32768 R000 R7FF 2048 1000 1FFF ○
D Data register D0000-0 D2FFF-F 196608 D0000 D2FFF 12288 2000 7FFF ○
*1 P Edge detection P1000 P17FF 2048 P100W P17FW 128 C000 C0FF -
Bit address area
*1 V Special relay V1000 V17FF 2048 V100W V17FW 128 C100 C1FF -
*1 TC Timer Counter T1000 T17FF 2048 T100W T17FW 128 C200 C2FF -
*1 M Internal relay M1000 M17FF 2048 M100W M17FW 128 C300 C3FF -
*1 L Link relay L1000 L2FFF 8192 L100W L2FFW 512 C400 C7FF -
address area
*1 S Special register S1000-0 S13FF-F 16384 S1000 S13FF 1024 C800 CFFF ○
Word
*1 N Present value register N1000-0 N17FF-F 32768 N1000 N17FF 2048 D000 DFFF ○
Extended edge
EP EP000 EPFFF 4096 EP00W EPFFW 256 - - -
detection
EK Extended keep-relay EK000 EKFFF 4096 EK00W EKFFW 256 200 3FF ○
Extended special
Bit address area
*8 EV EV000 EVFFF 4096 EV00W EVFFW 256 400 5FF -

relay
Extended timer
*7 ET ET000 ET7FF 2048 ET00W ET7FW 128 600 6FF -
counter
Other area 1
EL Extended link relay EL0000 EK1FFF 8192 EL000W EK1FFW 512 700 AFF -
EX Extended input output EX000 EX7FF 2048 EX00W EX7FW 128 B00 BFF -
E Extended internal
EM0000 EM1FFF 8192 EM000W EM1FFW 512 C00 FFF -
M relay
Extended special
*8 ES ES000-0 ES7FF-F 32768 ES000 ES7FF 2048 1000 1FFF ○
register
address area
Word
E Extended present
*7 EN000-0 EN7FF-F 32768 EN000 EN7FF 2048 2000 2FFF ○
N value register
Extended setting
*7 H H000-0 H7FF-F 32768 H000 H7FF 2048 3000 3FFF ○
value resister
G
address area
Extended input output GX0000 GXFFFF 65536 GX000W GXFFFW 4096 C000 DFFF -
area 2
Other
XY
Bit
G Extended internal
GM0000 GMFFFF 65536 GM000W GMFFFW 4096 E000 FFFF -
M relay
U00000- U1FFFF-
U Extended data register 2097152 U00000 U1FFFF 131072 *2 *2 ○
0 F
address area
Word
EB00000 EB3FFF
*5 EB Extended buffer register 4194304 EB00000 EB3FFFF 262144 *2 *2 ○
-0 F-F
FR00000 FR1FFF FR1FFFF
*3 FR Extended flash register 33554432 FR000000 2097152 *2 *2 ○/-
0-0 FF-F F
*1 It is not allowed to refer to additional new address in basic area after No.400 of indirect address of the other area 1.
Further, the area expanded in PC10 mode (P, V, TC, M, L, S, and N) all starts from No.1000. It is not continuous from conventional
area. It is not allowed to cross over conventional area and expanded area in setting the communication refresh area and application
command treated per block.
*2 See the next page for indirect address of U, EB, and FR area.
*3 See "8.7.2 Flash register" for expanded flash register.
*4 Area for saving data when power is off (reset).
*5 In PC10 mode, it is allowed to directly designate the address of EB area for each operand of contact, coil, and application command.
(In PC3JG/PC10 standard mode, it was not allowed to designate directly the address of EB area for operand of contact, coil, and
application command. Accessed by "Command dedicated to EB area access".
EB000-1 EB100-2
|-----||---------------------------------[ ]
|----------[WMOVE EB0  EB10]

|----------[+ EB0 + EB1 EB3 ]
*6 It is not allowed to assign address in duplication to X and Y (EX and EY, GX and GY) and T and C (ET and EC).
(It is wrong to assign address X000/Y000, EX000/EY000, T000/C000, and ET000/EC000.)
*7 R0500 - 07FF is for SFC control, and cannot be used for general purpose.
When SFC is used, expanded timer and counter ET/C, EN, and H are restricted in use.
*8 Special relay and special register are for system. Use them only for defined application.
8-22
Indirect address of U, EB, and FR area is used in the address space of every 64K (0 - FFFF) shown below.
Therefore, register of space designated by indirect address must be used for register for saving indirect
address.
When indirectly designating U, EB, and FR by application command, use index register function.
Identifier Name Address （***-***） Indirect address （***-***）

U00000 U07FFF 0 FFFF
Extended data U08000 U0FFFF 0 FFFF
U U10000 U17FFF 0 FFFF
register
U18000 U1FFFF 0 FFFF
EB00000 EB07FFF 0 FFFF
EB08000 EB0FFFF 0 FFFF
Extended EB18000 EB1FFFF 0 FFFF
EB EB20000 EB27FFF 0 FFFF
buffer register
FR000000 FR007FFF 0 FFFF
FR008000 FR00FFFF 0 FFFF
FR0A0000 FR0A7FFF 0 FFFF
FR0A8000 FR0AFFFF 0 FFFF
FR0B0000 FR0B7FFF 0 FFFF
FR0B8000 FR0BFFFF 0 FFFF
FR0C0000 FR0C7FFF 0 FFFF
FR0C8000 FR0CFFFF 0 FFFF
FR0D0000 FR0D7FFF 0 FFFF
FR0D8000 FR0DFFFF 0 FFFF
FR0E0000 FR0E7FFF 0 FFFF
FR0E8000 FR0EFFFF 0 FFFF
FR0F0000 FR0F7FFF 0 FFFF
Extended flash FR0F8000 FR0FFFFF 0 FFFF
FR FR100000 FR107FFF 0 FFFF
register
FR1A0000 FR1A7FFF 0 FFFF
FR1A8000 FR1AFFFF 0 FFFF
FR1B0000 FR1B7FFF 0 FFFF
FR1B8000 FR1BFFFF 0 FFFF
FR1C0000 FR1C7FFF 0 FFFF
FR1C8000 FR1CFFFF 0 FFFF
FR1D0000 FR1D7FFF 0 FFFF
FR1D8000 FR1DFFFF 0 FFFF
FR1E0000 FR1E7FFF 0 FFFF
FR1E8000 FR1EFFFF 0 FFFF
FR1F0000 FR1F7FFF 0 FFFF
FR1F8000 FR1FFFFF 0 FFFF
8-23
8.2.5. Ex number
In PC10 mode, the whole data area is represented by "byte address of 8 digits (hexadecimal)".
"Byte address of 8 digits" and "Ex number" may be used by "index function" and "flash register".
Byte address of 8 digits = "00" + "Ex number (2 digits)" + "Indirect byte address"
* Use Ex number from "0D" to "0F" for designating basic area.

"00" is designated by own area.
"01" is designation up to the area [PC3JG/PC10 standard mode].
Ex:
P1-D0000 ⇒ 000D2000
EB01234 ⇒ 00102468h
EM0L ⇒ 00010C00h
上位2桁下位4桁
Upper two digits Lower four digits 上位2桁
Upper two digits 下位4桁
Lower 上位2桁
four digits Upper two digits 下位4桁
Lower four digits 上位2桁
Upper two digits 下位4桁
Lower four digits
00 Own自領域 area
20 40 FR00 ００００－FFFF 60 FR32 ００００－FFFF
01 E* 21 41 FR01 ００００－FFFF 61 FR33 ００００－FFFF
02 G* 22 42 FR02 ００００－FFFF 62 FR34 ００００－FFFF
03 U ００００－FFFF 23 43 FR03 ００００－FFFF 63 FR35 ００００－FFFF
04 U1 ００００－FFFF 24 44 FR04 ００００－FFFF 64 FR36 ００００－FFFF
05 U2 ００００－FFFF 25 45 FR05 ００００－FFFF 65 FR37 ００００－FFFF
06 U3 ００００－FFFF U0000-U1FFFF
26 46 FR06 ００００－FFFF 66 FR38 ００００－FFFF
07 27 47 FR07 ００００－FFFF 67 FR39 ００００－FFFF
08 FR0000-FR1FFFFF
28 48 FR08 ００００－FFFF 68 FR40 ００００－FFFF
09 29 49 FR09 ００００－FFFF 69 FR41 ００００－FFFF
0A 2A 4A FR10 ００００－FFFF 6A FR42 ００００－FFFF
0B 2B 4B FR11 ００００－FFFF 6B FR43 ００００－FFFF
0C Forｼｽﾃﾑ用
system 2C 4C FR12 ００００－FFFF 6C FR44 ００００－FFFF
0D P1 ００００－FFFF 2D 4D FR13 ００００－FFFF 6D FR45 ００００－FFFF
0E P2 ００００－FFFF 2E 4E FR14 ００００－FFFF 6E FR46 ００００－FFFF
0F P3 ００００－FFFF 2F 4F FR15 ００００－FFFF 6F FR47 ００００－FFFF
10 EB0 ００００－FFFF 30 50 FR16 ００００－FFFF 70 FR48 ００００－FFFF
15 EB5 ００００－FFFF EB0000-EB3FFFF 35 55 FR21 ００００－FFFF 75 FR53 ００００－FFFF
18 EB8 38 58 FR24 ００００－FFFF 78 FR56 ００００－FFFF
19 EB9 Reserved 39 59 FR25 ００００－FFFF 79 FR57 ００００－FFFF
1A EB10 3A 5A FR26 ００００－FFFF 7A FR58 ００００－FFFF
1B EB11 　　予約 3B 5B FR27 ００００－FFFF 7B FR59 ００００－FFFF
1C EB12 3C 5C FR28 ００００－FFFF 7C FR60 ００００－FFFF
1D EB13 3D 5D FR29 ００００－FFFF 7D FR61 ００００－FFFF
1E EB14 3E 5E FR30 ００００－FFFF 7E FR62 ００００－FFFF
1F EB15 3F 5F FR31 ００００－FFFF 7F FR63 ００００－FFFF
8-24
Ref) Address list
Ex No.
Name Address Byte address
(Hexadecimal)
Edge P000 - P1FF 0000 - 003F
Keep-relay K000 - K2FF 0040 - 009F
Special relay V000 - V0FF 00A0 - 00BF
Timer/Counter TC000 - TC1FF 00C0 - 00FF
Link relay L000 - L7FF 0100 - 01FF
P1PC3JG
Input Output XY000 - XY7FF 0200 - 02FF
compatible
Internal relay M000 - M7FF 0300 - 03FF
Special register S0000 - S03FF 0400 - 0BFF
Present value register N0000 - N01FF 0C00 - 0FFF
Link register 0D R0000 - R07FF 1000 - 1FFF
Data register 1 D0000 - D0FFF 2000 - 3FFF
Edge P1000 - P17FF C000 - C0FF
P1 Special relay V1000 - V17FF C100 - C1FF
Timer/Counter TC1000 - TC17FF C200 - C2FF
PC10 Internal relay M1000 - M17FF C300 - C3FF
expansion Link register L1000 - L2FFF C400 - C7FF
Special register S1000 - S13FF C800 – CFFF
Present value register N1000 - N17FF D000 – DFFF
Edge P000 - P1FF 0000 - 003F
P2 Timer/Counter TC000 - TC1FF 00C0 - 00FF
Link register L000 - L7FF 0100 - 01FF
PC3JG Input Output XY000 - XY7FF 0200 - 02FF
compatible Internal relay M000 - M7FF 0300 - 03FF
Basic
Link register 0E R0000 - R07FF 1000 - 1FFF
area
Edge P000 - P1FF 0000 - 003F
Timer/Counter TC000 - TC1FF 00C0 - 00FF
P3 Link register L000 - L7FF 0100 - 01FF
Input Output XY000 - XY7FF 0200 - 02FF
PC3JG
compatible Internal relay M000 - M7FF 0300 - 03FF
Link register 0F R0000 - R07FF 1000 - 1FFF
8-25
Ex No.
(Hexadecimal)
Extended edge EP000 - EPFFF 0000 - 01FF
Extended keep-relay EK000 - EKFFF 0200 - 03FF
Extended Special relay EV000 - EVFFF 0400 - 05FF
Extended Timer/Counter ETC000 - ETC7FF 0600 - 06FF
Extended PC3JG Extended Link relay EL0000 - EL1FFF 0700 - 0AFF
01
area1 compatible Extended Input Output EXY000 - EXY7FF 0B00 - 0BFF
Extended Internal relay EM0000 - EM1FFF 0C00 - 0FFF
Extended Special register ES0000 - ES07FF 1000 - 1FFF
Extended Present value register EN0000 - EN07FF 2000 - 2FFF
Extended setting value resister H0000 - H07FF 3000 - 3FFF
Extended PC3JG Extended Input Output GXY0000 - GXYFFFF C000 – DFFF
02
area2 compatible Extended Internal relay GM0000 - GMFFFF E000 – FFFF
PC3JG
03 U00000 - U07FFF 0000 – FFFF
compatible
Extended
Extended data resister 04 U08000 - U0FFFF 0000 – FFFF
area3
PC10Expansion 05 U10000 - U17FFF 0000 – FFFF
06 U18000 - U1FFFF 0000 – FFFF
10 EB00000 - EB07FFF 0000 – FFFF
PC3JG 11 EB08000 - EB0FFFF 0000 – FFFF
compatible 12 EB10000 - EB17FFF 0000 - FFFF
Extended 13 EB18000 - EB1FFFF 0000 - FFFF
Extended buffer resister
area 4 14 EB20000 - EB27FFF 0000 - FFFF
15 EB28000 - EB2FFFF 0000 - FFFF
PC10Expansion
16 EB30000 - EB37FFF 0000 - FFFF
17 EB38000 - EB3FFFF 0000 - FFFF
8-26
Ex No.
(Hexadecimal)
40 FR000000 - FR007FFF 0000 - FFFF
41 FR008000 - FR00FFFF 0000 - FFFF
42 FR010000 - FR017FFF 0000 - FFFF
43 FR018000 - FR01FFFF 0000 - FFFF
44 FR020000 - FR027FFF 0000 - FFFF
45 FR028000 - FR02FFFF 0000 - FFFF
46 FR030000 - FR037FFF 0000 - FFFF
47 FR038000 - FR03FFFF 0000 - FFFF
48 FR040000 - FR047FFF 0000 - FFFF
49 FR048000 - FR04FFFF 0000 - FFFF
4A FR050000 - FR057FFF 0000 - FFFF
4B FR058000 - FR05FFFF 0000 - FFFF
4C FR060000 - FR067FFF 0000 - FFFF
4D FR068000 - FR06FFFF 0000 - FFFF
4E FR070000 - FR077FFF 0000 - FFFF
4F FR078000 - FR07FFFF 0000 - FFFF
50 FR080000 - FR087FFF 0000 - FFFF
51 FR088000 - FR08FFFF 0000 - FFFF
52 FR090000 - FR097FFF 0000 - FFFF
53 FR098000 - FR09FFFF 0000 - FFFF
54 FR0A0000 - FR0A7FFF 0000 - FFFF
55 FR0A8000 - FR0AFFFF 0000 - FFFF
56 FR0B0000 - FR0B7FFF 0000 - FFFF
57 FR0B8000 - FR0BFFFF 0000 - FFFF
58 FR0C0000 - FR0C7FFF 0000 - FFFF
59 FR0C8000 - FR0CFFFF 0000 - FFFF
5A FR0D0000 - FR0D7FFF 0000 - FFFF
5B FR0D8000 - FR0DFFFF 0000 - FFFF
5C FR0E0000 - FR0E7FFF 0000 - FFFF
5D FR0E8000 - FR0EFFFF 0000 - FFFF
5E FR0F0000 - FR0F7FFF 0000 - FFFF
Extended 5F FR0F8000 - FR0FFFFF 0000 - FFFF
PC10Expansion Flash resister
area5 60 FR100000 - FR107FFF 0000 - FFFF
61 FR108000 - FR10FFFF 0000 - FFFF
62 FR110000 - FR117FFF 0000 - FFFF
63 FR118000 - FR11FFFF 0000 - FFFF
64 FR120000 - FR127FFF 0000 - FFFF
65 FR128000 - FR12FFFF 0000 - FFFF
66 FR130000 - FR137FFF 0000 - FFFF
67 FR138000 - FR13FFFF 0000 - FFFF
68 FR140000 - FR147FFF 0000 - FFFF
69 FR148000 - FR14FFFF 0000 - FFFF
6A FR150000 - FR157FFF 0000 - FFFF
6B FR158000 - FR15FFFF 0000 - FFFF
6C FR160000 - FR167FFF 0000 - FFFF
6D FR168000 - FR16FFFF 0000 - FFFF
6E FR170000 - FR177FFF 0000 - FFFF
6F FR178000 - FR17FFFF 0000 - FFFF
70 FR180000 - FR187FFF 0000 - FFFF
71 FR188000 - FR18FFFF 0000 - FFFF
72 FR190000 - FR197FFF 0000 - FFFF
73 FR198000 - FR19FFFF 0000 - FFFF
74 FR1A0000 - FR1A7FFF 0000 - FFFF
75 FR1A8000 - FR1AFFFF 0000 - FFFF
76 FR1B0000 - FR1B7FFF 0000 - FFFF
77 FR1B8000 - FR1BFFFF 0000 - FFFF
78 FR1C0000 - FR1C7FFF 0000 - FFFF
79 FR1C8000 - FR1CFFFF 0000 - FFFF
7A FR1D0000 - FR1D7FFF 0000 - FFFF
7B FR1D8000 - FR1DFFFF 0000 - FFFF
7C FR1E0000 - FR1E7FFF 0000 - FFFF
7D FR1E8000 - FR1EFFFF 0000 - FFFF
7E FR1F0000 - FR1F7FFF 0000 - FFFF
7F FR1F8000 - FR1FFFFF 0000 - FFFF
8-27
8.2.5. Table of special relays
Special relays are used for special applications such as CPU status, applied commands, link module,
etc. And these relays exist in the basic area and the extended area.
For the data memory division mode the special relays are provided in the basic area every each
program. In this case, applied-command related special relays which are used in each sequence
program are configured in special-relay area corresponding to the program. Other relays are all
configured in the special relay area for " PRG.1".
Don't handle a user because "V58~V5D" "EV800~EVBFF" is used for the one for the executive control
of SFC when you do programming by SFC. It is all reservation area for the address that doesn't exist in
the list. Therefore, the user cannot use its address.
(1-1) PC10 mode, data memory division mode PRG.1
Address Name Outline Description
0: No ERR0 ON against occurrence of major error
V01 MAJOR ERROR
1: ERR0 in occurring OFF after ERROR is reset
ON against occurrence of minor
0: No ERR1
V02 MINOR ERROR error.
1: ERR1 in occurring
OFF after ERROR is reset.
0: No ALM ON against ALARM
V03 ALARM
1: ALM in outputting OFF after ERROR is reset.
Normally ON irrespective of run
V04 NORMALLY ON Normally 1
status.
Normally OFF irrespective of run
V05 NORMALLY OFF Normally 0
status.
END command
ON ON by resetting and OFF by END
V06 1ST SCAN Reset processing.
OFF
0: Not in dummy stopping ON by executing dummy scan stop
V24 IN DUMMY STOPPING
1: In dummy stopping OFF by resetting
STOP REQ IN 0: No stop request ON by dummy scan stop request.
V25
CONTINUING 1: Stop requested OFF by resetting
0: In scanning OFF during sequence scan
V26 IN STOPPING
1: In stopping But ON during step-operation
0: Sequence command non-execution ON while sequence command is in
V27 RUN
1: Sequence command in executing executing.
0: Single mode
V38 DATA MEMORY MODE ON under data area division mode
1: Division mode
PRG.1 FUN FLAG 0: Not FUN FLAG CLEAR MODE ON when program-1 is FUN FLAG
V39
CLEAR MODE 1: FUN FLAG CLEAR MODE CLEAR mode.
0: Not in data backing up ON while user data is being backed
V3A IN DATA BACK-UP
1: In data backing-up up
0: Sequence command non-execution ON while program-1 is executing
V40 PRG.1 RUN
1: Sequence command in executing sequence command.
V41 PRG.2 RUN
V42 PRG.3 RUN
0: Test mode OFF
V48 Test mode 1: Test mode operating
Test mode operating ON
0: Event monitor not executed ON when event monitor is
V49 Event monitor 1: Event monitor being executed enabled
0: FB library invalid
V4A FB library 1: FB library valid
ON when FB library is enabled
0: User library invalid
V4B User library 1: User library valid
ON when user library is enabled
0: Standard library invalid ON when standard library is
V4A Standard library 1: Standard library valid enabled
ON if applied command error occurs
PRG.1 APPLIED
0: No error in program-1 and OFF if not, but
V50 COMMAND ERROR 1
1: Error limited to only command with
(ER)
confinement .
0: Comparative result not small Result of comparison with applied
V51 PRG.1 
1: Comparative result small command in program-1
0: Comparative result unequal Result of comparison with applied
V52 PRG.1 
1: Comparative result equal command in program-1
8-28
0: Comparative result not large Result of comparison with applied command in
V53 PRG.1 >
1: Comparative result large program-1
0: Result not 0 ON when computation result of applied command in
V54 PRG.1 ZERO (Z)
1: Result 0 program-1 is 0.
0: No digit down The computation result of applied command in
V55 PRG.1 BORROW (BO)
1: Digit down program-1 is smaller than 0.
0: No digit up The computation result of applied command in
V56 PRG.1 CARRY (CY)
1: Digit up program-1 exceeded the specific digit number.
0: No error present ON if index error is found in program 1, and OFF if
V57 PRG.1 Index error (ER)
1: Error present not found.
DATA ERROR UNCHECK ALM is cleared by turning
V5E DATA ERROR CLEAR 1: Data error cleared
ON this special relay (V5E).
V70 0.1 SEC CLOCK 0.05 sec. Clock of cycle 0.1 sec and duty 50%
0.05 sec.
0.1 sec.
0.5 sec.
V72 1-SEC CLOCK Clock of cycle 1 sec and duty 50%
0.5 sec.
V73 2-SEC CLOCK 1 sec. Clock of cycle 2 sec and duty 50%
1 sec.
V74 60-SEC CLOCK 30 sec. Clock of cycle 60 sec and duty 50%
30 sec.
V78 SCAN CLOCK 1 scan Clock to turn ON/ OFF SCAN every 1 scan.
1 scan
n scan Clock to turn ON/OFF scan at scanning interval

V79 USER DEFINED CLOCK 1
m scan preset by applied command.

V7A USER DEFINED CLOCK 2
1: P1 being executed
V7C P1 being executed Turns on only when P1 program is being executed
0: Stopped or P2/P3 being executed
V7D P2 being executed Turns on only when P2 program is being executed
V7E P3 being executed Turns on only when P3 program is being executed
PRG.1-LINK 1 0: RESET OFF
V80
COMMUNICATION RESET 1: RESET ON
V81
V82
V83
V84
PRG.1-LINK 6 0:Reset OFF
V85
COMMUNICATION RESET 1:Reset ON
V86
V87
0: Special unit command not permitted Turns off when special unit command or hierarchy
PRG.1-LINK 1
V90 1: Special unit command hierarchy communication is executed.
LINK COMMAND PERMITFLAG
communication permitted Turns on in execution.
PRG.1-LINK 1
V91
LINK COMMANDERRORFLAG
0: Special unit command not permitted Turns off when special unit command or hierarchy
PRG.1-LINK 2
V92 1: Special unit command hierarchy communication is executed.
LINK COMMAND PERMITFLAG
Note) For the communication (link) modules, see the respective Instruction Manuals.
8-29
PRG.1-LINK 2
V93
0: Special unit command not permitted Turns off when special unit command or
PRG.1-LINK 3
V94 1: Special unit command hierarchy hierarchy communication is executed.
LINK COMMANDPERMITFLAG
PRG.1-LINK 3
V95
PRG.1-LINK 4
PRG.1-LINK 4
V97
PRG.1-LINK 5
PRG.1-LINK 5
V99
PRG.1-LINK 6
V9A 1: Special unit command hierarchy hierarchy communication is executed.
PRG.1-LINK 6
V9B
PRG.1-LINK 7
V9C 1: Special unit command hierarchy hierarchy communication is executed.
PRG.1-LINK 7
V9D
PRG.1-LINK 8
V9E 1: Special unit command hierarchy hierarchy communication is executed.
PRG.1-LINK 8
V9F
VA0 ALL ST IN COMMUNICATING
｝
VA1 LINK PARAMETERERROR PRG.1 0: No error
VA2 COMMUNICATION ERROR -LINK 1 1: Error
VA3
｝
VA5 LINK PARAMETERERROR 0: No error
PRG.1
VA6 COMMUNICATION ERROR 1: Error
-LINK 2
VA7
｝
VA9 LINK PARAMETERERROR 0: No error
PRG.1
VAA COMMUNICATION ERROR 1: Error
-LINK 3
VAB
VAC ALL ST IN COMMUNICATING
｝
VAD LINK PARAMETERERROR 0: No error
PRG.1
VAE COMMUNICATION ERROR 1: Error
-LINK 4
VAF
VB0 ALL ST IN COMMUNICATING
｝
VB1 LINK PARAMETERERROR 0: No error
PRG.1
VB2 COMMUNICATION ERROR 1: Error
-LINK 5
VB3
｝
PRG.1
-LINK 6
VB7
｝
PRG.1
VBA COMMUNICATION ERROR 1: Error
-LINK 7
VBB
VBC ALL ST IN COMMUNICATING
｝
VBD LINK PARAMETERERROR 0: No error
PRG.1
VBE COMMUNICATION ERROR 1: Error
-LINK 8
VBF
8-30
0: No error
VC0 CPU ERROR ON upon detection of CPU module error.
1: Error
0: No error ON upon detection of POWER DOWN .
VC1 POWER DOWN
1: Error OFF after reset or power rethrow-in
0: No error
VC2 MEMORY DATA ERROR ON detection of program or parameter data error.
1: Error
0: No error
VC3 I/O BUS ERROR ON upon detection of I/O bus error.
1: Error
ON upon detection of special module error
SPECIAL MODULE 0: No error OFF after ERROR reset
VC4
ERROR 1: Error
MODULE PARAMETER 0: No error ON when CPU can not recognize correctly I/O
VC5
ERROR 1: Error module.
0: No error
VC6 PARAMETER ERROR ON upon detection of parameter error.
1: Error
I/O MODULE ERROR 0: No error ON upon detection of I/O module error
VC7
( Fuse blown, etc.) 1: Error OFF after ERROR reset
I/O COMPOSITION 0: No error ON upon detection of I/O module composition error/
VC8 ( Allocation of special card number and I/O addresses )
ERROR 1: Error
USER PROGRAM 0: No error ON upon detection of error related to user program.
VC9
ERROR 1: Error OFF after ERROR reset.
BACK UP MEMORY 0: No error
VCA ON upon detection of back-up memory error
ERROR 1: Error
DATA ERROR 0: Checked ON upon detection of memory data error (VC2).
VCB
UNCHECK 1: Uncheck OFF with V5E ON or use of peripheral equipment.
PRG.1 0: No error
VD0 ON upon errors related to user program as program-1
USER PROGRAM ERROR 1: Error
PRG.2 0: No error
PRG.3 0: No error
PRG.1 PARAMETER 0: No error
VD8 ON upon detection of program-1 parameter error
ERROR 1: Error
ERROR 1: Error
VDA ON upon detection of program-3 parameter error
ERROR 1: Error
I/O VERIFICATION 0: No error ON when I/O identification codes of parameter differ
VE0
ERROR 1: Error from actually mounted I/O modules.
0: No error ON upon detection of SCAN TIME OVER .
VE1 SCAN TIME-OVER
PRG.1 APPLIED 0: No error ON against occurrence of error of applied command
VE2
COMMAND ERROR LATCH 1: Error (V50) in program-1. It is held until reset or 0 write.
PRG.1 SCAN TIME 0: No error ON upon detection of scan time-over in program-1.
VE8
OVER 1: Error OFF after reset or power rethrow-in
VE9
VEA
0: No error ON upon error detection
VF0 BATTERY ERROR
1: Error OFF after ERROR reset
SPECIAL MODULE 0: No error ON against allocation error of communication (link)
VF2
ALLOCATION ERROR 1: Error module.
DIAGNOSIS MODULE 0: No error
VF3 ON against diagnosis module error.
ERROR 1: Error
0: No error
VF5 CLOCK ERROR ON upon detection of built-in clock error.
1: Error
8-31
(1-2) Data memory division mode PRG.2
V04 NORMALLY ON NORMALLY 1 ON irrespective operation status
V05 NORMALLY OFF NORMALLY 0 OFF irrespective of operation status
END COMMAND
ON
V06 1ST SCAN Reset
ON by resetting and OFF by END processing.
OFF
IN STOP REQUEST 0: No stop request ON by dummy scan stop request.
V25
V26 IN STOPPING
PRG.2 FUN FLAG 0: Not FUN FLAG CLEAR MODE
V39 1: FUN FLAG CLEAR MODE ON when program-2 is FUN FLAG CLEAR mode.
CLEAR MODE
ON if applied command error occurs in program-2
PRG.2 APPLIED 0: No error
V50 and OFF if not, but limited to only command with
COMMAND ERROR 1 (ER) 1: Error
confinement .
0: Comparative result not small Result of comparison with applied command in
V51 PRG.2 < 1: Comparative result small program-2
0: Comparative result unequal Result of comparison with applied command in
V52 PRG.2 = 1: Comparative result equal program-2
V53 PRG.2 > 1: Comparative result large program-2
0: Result not 0 ON when computation result of applied command in
V54 PRG.2 ZERO (Z)
1: Result 0 program-2 is 0.
0: No error ON if index error is found in program 2, and OFF if
1: Error not found.
0.05 sec.
0.1 sec.
V71 0.2 SEC CLOCK 0.1 sec.
Clock of cycle 0.2 sec and duty 50%
0.5 sec.
V72 1-SEC CLOCK 0.5 sec.
Clock of cycle 1 sec and duty 50%
1 sec.
V73 2-SEC CLOCK 1 sec.
30 sec.
1 scan
V78 SCAN CLOCK 1 scan
Clock to turn ON/ OFF SCAN every 1 scan.

V7C P1 being executed 0: Stopped or P2/P3 Turns on only when P1 program is being executed
being executed
V7D P2 being executed 0: Stopped or P1/P3 Turns on only when P2 program is being executed
being executed
V7E P3 being executed 0: Stopped or P1/P2 Turns on only when P3 program is being executed
being executed
PRG.2-LINK 1 0: Reset OFF
V80
COMMUNICATION RESET 1: Reset ON
V81
V82
8-32
PRG.2-LINK 4 COMMUNICATION 0: Reset OFF
V83 RESET 1: Reset ON
PRG.2-LINK 1
V90 LINK COMMAND PERMIT FLAG
1: Special unit command hierarchy hierarchy communication is executed.
PRG.2-LIN K1
V91 LINK COMMAND ERROR FLAG
PRG.2-LINK 2
PRG.2-LINK 2
PRG.2-LINK 3
PRG.2-LINK 3
PRG.2-LINK 4
PRG.2-LINK 4
PRG.2-LINK 5
PRG.2-LINK 5
PRG.2-LINK 6
V9A LINK COMMAND PERMIT FLAG
PRG.2-LINK 6
V9B LINK COMMAND ERROR FLAG
PRG.2-LINK 7
V9C LINK COMMAND PERMIT FLAG
PRG.2-LINK 7
V9D LINK COMMAND ERROR FLAG
PRG.2-LINK 8
V9E LINK COMMAND PERMIT FLAG
PRG.2-LINK 8
V9F LINK COMMAND ERROR FLAG
VA1
VA2
VA3
LINK PARAMETERERROR
COMMUNICATION ERROR
｝
PRG.2 0: No error
-LINK 1 1: Error

VA5
VA6
VA7
LINK PARAMETERERROR
COMMUNICATION ERROR
｝
PRG.2 0: No error
-LINK 2 1: Error

VA9
VAA
VAB
LINK PARAMETERERROR
COMMUNICATION ERROR
｝
PRG.2 0: No error
-LINK 3 1: Error
VAC ALL ST IN COMMUNICATING

VAD
VAE
VAF
LINK PARAMETERERROR
COMMUNICATION ERROR
｝
PRG.2 0: No error
-LINK 4 1: Error
8-33
ALL ST IN
VB0 COMMUNICATING
VB1
VB2
VB3
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝
PRG.2 0: No error
-LINK 6
1: Error
ALL ST IN
VB4 COMMUNICATING
VB5
VB6
VB7
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝
PRG.2 0: No error
-LINK 6
1: Error
ALL ST IN
VB8 COMMUNICATING
VB9
VBA
VBB
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝
PRG.2 0: No error
-LINK 7
1: Error
ALL ST IN
VBC COMMUNICATING
VBD
VBE
VBF
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝
PRG.2 0: No error
-LINK 8
1: Error
ON against occurrence of applied command error

PRG.2 APPLIED COMMAND 0: No error
VE2 (V50) in program-2 and it is held until reset or 0
LATCH ERROR 1: Error
write.
8-34
(1-3) Data memory division mode PRG.3
V04 NORMALLY ON NORMALLY 1 ON irrespective operation status
V05 NORMALLY OFF NORMALLY 0 OFF irrespective of operation status
END COMMAND
ON
V06 1ST SCAN Reset
OFF
IN STOP REQUEST 0: No stop request ON by dummy scan stop request.
V25
V26 IN STOPPING
PRG.3 FUN FLAG 0: Not FUN FLAG CLEAR MODE
V39 1: FUN FLAG CLEAR MODE ON when program-3 is FUN FLAG CLEAR mode.
CLEAR MODE
ON if applied command error occurs in program-2
V50 and OFF if not, but limited to only command with
COMMAND ERROR 1 (ER) 1: Error
confinement .
0: Comparative result not small Result of comparison with applied command in
V51 PRG.3 < 1: Comparative result small program-3
0: Comparative result unequal Result of comparison with applied command in
V52 PRG.3 = 1: Comparative result equal program-3
V53 PRG.3 > 1: Comparative result large program-3
0: Result not 0 ON when computation result of applied command
V54 PRG.3 ZERO (Z)
1: Result 0 in program-3 is 0.
0: No error ON if index error is found in program 3, and OFF if
1: Error not found.
0.05 sec.
0.1 sec.
0.5 sec.
0.5 sec.
1 sec.
30 sec.
1 scan
V78 SCAN CLOCK 1 scan
Clock to turn ON/ OFF SCAN every 1 scan.

V7C P1 being executed 0: Stopped or P2/P3 Turns on only when P1 program is being executed
being executed
V7D P2 being executed 0: Stopped or P1/P3 Turns on only when P2 program is being executed
being executed
V7E P3 being executed 0: Stopped or P1/P2 Turns on only when P3 program is being executed
being executed
8-35
V80 COMMUNICATION RESET 1:Reset ON
PRG.3-LINK 1
V90 LINK COMMANDPERMITFLAG
PRG.3-LINK 1
V91 LINK COMMANDERRORFLAG
PRG.3-LINK 2
PRG.3-LINK 2
PRG.3-LINK 3
PRG.3-LINK 3
PRG.3-LINK 4
PRG.3-LINK 4
PRG.3-LINK 5
PRG.3-LINK 5
PRG.3-LINK 6
V9A LINK COMMANDPERMITFLAG
PRG.3-LINK 6
V9B LINK COMMANDERRORFLAG
PRG.3-LINK 7
V9C LINK COMMANDPERMITFLAG
PRG.3-LINK 7
V9D LINK COMMANDERRORFLAG
PRG.3-LINK 8
V9E LINK COMMANDPERMITFLAG
PRG.3-LINK 8
V9F LINK COMMANDERRORFLAG
ALL ST IN
VA0 COMMUNICATING
｝
LINK PARAMETER
VA1 ERROR PRG.3 0: No error
-LINK 1
VA2
COMMUNICATION 1: Error
ERROR
VA3
ALL ST IN
VA4 COMMUNICATING
｝
LINK PARAMETER
VA5 ERROR PRG.3 0: No error
-LINK 2
VA6 ERROR
VA7
8-36
ALL ST IN
VA8 COMMUNICATING
VA9
VAA
VAB
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝PRG.3 0: No error
-LINK 3
1: Error
ALL ST IN
VAC COMMUNICATING
VAD
VAE
VAF
LINK PARAMETERERROR
COMMUNICATION
-LINK 4
1: Error
ALL ST IN
VB0 COMMUNICATING
VB1
VB2
VB3
LINK PARAMETERERROR
COMMUNICATION
-LINK 5
1: Error
ALL ST IN
VB4 COMMUNICATING
VB5
VB6
VB7
LINK PARAMETERERROR
COMMUNICATION
-LINK 6
1: Error
ALL ST IN
VB8 COMMUNICATING
VB9
VBA
VBB
LINK PARAMETERERROR
COMMUNICATION
-LINK 7
1: Error
ALL ST IN
VBC COMMUNICATING
VBD
VBE
VBF
LINK PARAMETERERROR
COMMUNICATION
-LINK 1
1: Error
ON against occurrence of applied command error

PRG.3 APPLIED COMMAND 0: No error
VE2 (V50) in program-3 and it is held until reset or 0
LATCH ERROR 1: Error
write.
(1-4) PC10 mode and data memory separate mode, extended area
0: Flash register writing

Flash register writing not permitted ON when writing is allowed to flash memory of
EV100
permitted 1: Flash register writing flash register.
permitted
Flash register writing 0: No error
EV101 ON when flash memory of flash register fails.
failed 1: Writing failed
EVE00
SN-I/F input data link

area
EVEFF
EVE00
SN-I/F output data link

area
EVEFF
8-37
(2-1) Data memory single mode, basic area
V01 MAJOR ERROR
0: No ERR1 ON against occurrence of minor error.
V02 MINOR ERROR
1: ERR1 in occurring OFF after ERROR is reset.
V03 ALARM
V04 NORMALLY ON Normally 1 Normally ON irrespective of run status.
V05 NORMALLY OFF Normally 0 Normally OFF irrespective of run status.
END COMMAND
ON
V06 1ST SCAN Reset
OFF
V25
V26 IN STOPPING
0: Sequence command
non-execution
V27 RUN 1: Sequence command in ON while sequence command is in executing.
executing
0: Single mode
V38 DATA MEMORY MODE ON under data area division mode
1: Division mode
FUN FLAG CLEAR 0: Not FUN FLAG CLEAR MODE
V39 1: FUN FLAG CLEAR MODE ON under FUN FLAG CLEAR mode.
MODE
0: Not in data backing up
V3A IN DATA BACK-UP ON while user data is being backed up
1: In data backing-up
0: Sequence command
non-execution ON while program-1 is executing sequence
V40 PRG.1 RUN 1: Sequence command in command.
executing
0: Sequence command
executing
0: Sequence command
executing
ON if applied command error occurs and OFF
APPLIED COMMAND 0: No error
V50 if not, but limited to only command with
ERROR 1 (ER) 1: Error
confinement .
0: Comparative result not small Result of comparative command of applied
V51  1: Comparative result small commands
0: Comparative result unequal Result of comparative command of applied
V52 = 1: Comparative result equal commands
0: Comparative result not large Result of comparative command of applied
V53  1: Comparative result large commands
0: Result not 0 ON when computation result of applied
V54 ZERO (Z)
1: Result 0 command is 0
0: No digit down The computation result of applied command is
V55 BORROW (BO)
1: Digit down smaller than 0.
0: No digit up The computation result of applied command is
V56 CARRY (CY)
1: Digit up over the digit number.
DATA ERROR UNCHECK ALM is cleared by
turning ON this special relay (V5E).
0.05 sec.
0.1 sec.
0.5 sec.
V72 1-SEC CLOCK 0.5 sec.
1 sec.
30 sec.
8-38
1scan Clock to turn ON/ OFF SCAN every 1
V78 SCAN CLOCK
1scan scan.
n scan Clock to turn ON/OFF scan at scanning
mscan interval preset by applied command.
n scan Clock to turn ON/OFF scan at scanning
mscan interval preset by applied command.
1: P1 being executed Turns on only when P1 program is being
V7C P1 being executed
0: Stopped or P2/P3 being executed executed
V7D P2 being executed
V7E P3 being executed
V80
V81
V82
V83
V84
V85
V86
V87
PRG.1-LINK 1
PRG.1-LINK 1
PRG.1-LINK 2
PRG.1-LINK 2
PRG.1-LINK 3
PRG.1-LINK 3
PRG.1-LINK 4
PRG.1-LINK 4
PRG.1-LINK 5
PRG.1-LINK 5
PRG.1-LINK 6
PRG.1-LINK 6
PRG.1-LINK 7
PRG.1-LINK 7
PRG.1-LINK 8
PRG.1-LINK 8
8-39
ALL ST IN
VA0 COMMUNICATING
VA1
VA2
VA3
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 1
0: No error
1: Error
ALL ST IN
VA4 COMMUNICATING
VA5
VA6
VA7
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 2
0: No error
1: Error
ALL ST IN
VA8 COMMUNICATING
VA9
VAA
VAB
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 3
0: No error
1: Error
ALL ST IN
VAC COMMUNICATING
VAD
VAE
VAF
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 4
0: No error
1: Error
ALL ST IN
VB0 COMMUNICATING
VB1
VB2
VB3
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 5
0: No error
1: Error
ALL ST IN
VB4 COMMUNICATING
VB5
VB6
VB7
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 6
0: No error
1: Error
ALL ST IN
VB8 COMMUNICATING
VB9
VBA
VBB
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 7
0: No error
1: Error
ALL ST IN
VBC COMMUNICATING
VBD
VBE
VBF
LINK PARAMETERERROR
COMMUNICATION
ERROR ｝ PRG.1
-LINK 8
0: No error
1: Error
0: No error
1: Error
VC1 POWER DOWN
0: No error
VC2 MEMORY DATA ERROR ON detection of program or parameter data error.
1: Error
0: No error
1: Error
0: No error ON upon detection of special module error
VC4 SPECIAL MODULE ERROR
1: Error ON after ERROR reset
MODULE PARAMETER 0: No error
VC5 ON when CPU can not recognize correctly I/O module.
ERROR 1: Error
0: No error
1: Error
VC7
(Fuse blown, etc.) 1: Error OFF after ERROR reset
8-40
ON upon detection of I/O module composition
I/O COMPOSITION 0: No error error/
VC8
ERROR 1: Error ( Allocation of special card number and I/O
addresses )
USER PROGRAM 0: No error ON upon detection of error related to user
VC9
ERROR 1: Error program. OFF after ERROR reset.
BACK UP MEMORY 0: No error
VCA ON upon detection of back-up memory error
ERROR 1: Error
DATA ERROR 0: checked ON upon detection of memory data error (VC2) .
VCB
UNCHECK 1: uncheck OFF with V5E ON or use of peripheral equipment.
PRG.1 0: No error ON upon errors related to user program as
VD0
USER PROGRAM ERROR 1: Error program-1
VD1
VD2
ERROR 1: Error
ERROR 1: Error
VDA ON upon detection of program-3 parameter error
ERROR 1: Error
I/O VERIFICATION 0: No error ON upon detection of SCAN TIME OVER .
VE0
ERROR 1: Error OFF after reset or power rethrow-in
VE1 SCAN TIME-OVER
ON against occurrence of error of applied
VE2 command (V50) in program-1. It is held until reset
COMMAND ERROR LATCH 1: Error
or 0 write.
PRG.1 SCAN TIME 0: No error ON upon detection of scan time-over in
VE8
OVER 1: Error program-1. OFF after reset or power rethrow-in
VE9
VEA
VF0 BATTERY ERROR
SPECIAL MODULE 0: No error ON against allocation error of communication (link)
VF2
ALLOCATION ERROR 1: Error module.
DIAGNOSIS MODULE 0: No error
VF3 ON against diagnosis module error.
ERROR 1: Error
0: No error
VF5 BATTERY ERROR ON upon detection of built-in clock error.
1: Error
8-41
(2-2) Data memory single mode, extended area
EV00
EV01
EV02
EV03
EV04
EV05
EV06
EV07
PRG.2-LINK 1
EV10 LINK COMMANDPERMITFLAG
PRG.2-LINK 1
EV11 LINK COMMANDERRORFLAG
PRG.2-LINK 2
PRG.2-LINK 2
PRG.2-LINK 3
EV14 LINK COMMAND PERMITFLAG
PRG.2-LINK 3
PRG.2-LINK 4
PRG.2-LINK 4
PRG.2-LINK 5
PRG.2-LINK 5
PRG.2-LINK 6
EV1A LINK COMMANDPERMITFLAG
PRG.2-LINK 6
EV1B LINK COMMANDERRORFLAG
PRG.2-LINK 7
EV1C LINK COMMANDPERMITFLAG
PRG.2-LINK 7
EV1D LINK COMMANDERRORFLAG
PRG.2-LINK 8
EV1E LINK COMMANDPERMITFLAG
PRG.2-LINK 8
EV1F LINK COMMANDERRORFLAG
ALL ST IN
EV20 COMMUNICATING
｝
LINK PARAMETER
EV21 ERROR PRG.2 0: No error
-LINK 1
EV22 ERROR
EV23
ALL ST IN
EV24 COMMUNICATING
｝
LINK PARAMETER
EV25 ERROR PRG.2 0: No error
-LINK 2
EV26
ERROR
EV27
8-42
EV28 ALL ST IN COMMUNICATING
EV29
EV2A
EV2B
LINK PARAMETERERROR
COMMUNICATION ERROR
｝ PRG.2 0: No error
-LINK 3 1: Error
EV2C ALL ST IN COMMUNICATING

EV2D
EV2E
EV2F
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 4 1: Error

EV31
EV32
EV33
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 5 1: Error

EV35
EV36
EV37
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 6 1: Error

EV39
EV3A
EV3B
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 7 1: Error
EV3C ALL ST IN COMMUNICATING

EV3D
EV3E
EV3F
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 8 1: Error
0:Reset OFF
EV40 PRG.3-LINK 1 COMMUNICATION RESET
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
PRG.3-LINK 1
PRG.3-LINK 1
PRG.3-LINK 2
PRG.3-LINK 2
PRG.3-LINK 3
PRG.3-LINK 3
PRG.3-LINK 4
PRG.3-LINK 4
Note) For the communication (link) modules, see the respective Instruction Manuals.。
8-43
PRG.3-LINK 5
PRG.3-LINK 5
PRG.3-LINK 6 0: Special unit command not permitted Turns off when special unit command or
EV5A LINK COMMANDPERMITFLAG 1: Special unit command hierarchy hierarchy communication is executed.
PRG.3-LINK 6
EV5B LINK COMMANDERRORFLAG
PRG.3-LINK 7
EV5C LINK COMMANDPERMITFLAG
PRG.3-LINK 7
EV5D LINK COMMANDERRORFLAG
PRG.3-LINK 8
EV5E LINK COMMANDPERMITFLAG
PRG.3-LINK 8
EV5F LINK COMMANDERRORFLAG
ALL ST IN
EV60
｝
COMMUNICATING
EV61 LINK PARAMETERERROR PRG.3 0: No error
-LINK 1
EV62 COMMUNICATION ERROR 1: Error
EV63
ALL ST IN
EV64
｝
COMMUNICATING
-LINK 2
EV67
ALL ST IN
EV68
｝
COMMUNICATING
-LINK 3
EV6A COMMUNICATION ERROR 1: Error
EV6B
ALL ST IN
EV6C
｝
COMMUNICATING
EV6D LINK PARAMETERERROR PRG.3 0: No error
-LINK 4
EV6E COMMUNICATION ERROR 1: Error
EV6F
ALL ST IN
EV70
｝
COMMUNICATING
-LINK 5
EV73
ALL ST IN
EV74
｝
COMMUNICATING
-LINK 6
EV77
ALL ST IN
EV78
｝
COMMUNICATING
-LINK 7
EV7A COMMUNICATION ERROR 1: Error
EV7B
ALL ST IN
EV7C
｝
COMMUNICATING
EV7D LINK PARAMETERERROR PRG.3 0: No error
-LINK 8
EV7E COMMUNICATION ERROR 1: Error
EV7F
EVE00
SN-I/F input data link area

EVEFF
EVE00
SN-I/F output data link area

EVEFF
Note) For the communication (link) modules, see the respective Instruction Manuals.。
8-44
(3) PC2 interchange mode
V01 MAJOR ERROR
0: No ERR1 ON against occurrence of minor error.
V02 MINOR ERROR
1: ERR1 in occurring OFF after ERROR is reset.
V03 ALARM
V04 NORMALLY ON Normally 1 Normally ON irrespective of run status.
V05 NORMALLY OFF Normally 0 Normally OFF irrespective of run status.
END command
ON
V06 1ST SCAN ON by resetting and OFF by END processing.
Reset
OFF
V25
V26 IN STOPPING
0: Sequence command
non-execution
V27 RUN 1: Sequence command in
ON while sequence command is in executing.
executing
FUN FLAG CLEAR 0: Not FUN FLAG CLEAR MODE
V39 1: FUN FLAG CLEAR MODE ON under FUN FLAG CLEAR mode.
MODE
0: Not in data backing up
V3A IN DATA BACK-UP ON while user data is being backed up
1: In data backing-up
APPLIED COMMAND 0: No error ON if applied command error occurs and OFF if not,
V50
ERROR 1 (ER) 1: Error but limited to only command with confinement .
0: Comparative result not small
V51 < 1: Comparative result small
Result of comparative command of applied commands
0: Comparative result unequal
V52 = 1: Comparative result equal
0: Comparative result not large
V53 > 1: Comparative result large
0: Result not 0
V54 ZERO (Z) ON when computation result of applied command is 0
1: Result 0
0: No digit down The computation result of applied command is smaller
V55 BORROW (BO)
1: Digit down than 0.
0: No digit up The computation result of applied command is over the
V56 CARRY (CY)
1: Digit up digit number.
DATA ERROR UNCHECK ALM is cleared by turning
ON this special relay (V5E).
0.05 sec
V70 0.1 SEC CLOCK Clock of cycle 0.1 sec and duty 50%
0.05 sec
0.1 sec
V71 0.2 SEC CLOCK Clock of cycle 0.2 sec and duty 50%
0.1 sec
0.5 sec
0.5 sec
1 sec
1 sec
30 sec
30 sec
1 scan
V78 SCAN CLOCK Clock to turn ON/ OFF SCAN every 1 scan.
1 scan
n scan Clock to turn ON/OFF scan at scanning interval preset by
applied command.
m scan
n scan Clock to turn ON/OFF scan at scanning interval preset by
applied command.
m scan
PRG.1-LINK 1
0:Reset OFF
V80 COMMUNICATION
1:Reset ON
RESET
8-45
0:Reset OFF
V81 PRG.1-LINK 2 COMMUNICATION RESET
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
0:Reset OFF
1:Reset ON
PRG.1-LINK 1
PRG.1-LINK 1
PRG.1-LINK 2
PRG.1-LINK 2
PRG.1-LINK 3
PRG.1-LINK 3
PRG.1-LINK 4
PRG.1-LINK 4
PRG.1-LINK 5
PRG.1-LINK 5
PRG.1-LINK 6
PRG.1-LINK 6
PRG.1-LINK 7
PRG.1-LINK 7
PRG.1-LINK 8
PRG.1-LINK 8
VA1
VA2
VA3
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 1 1: Error

VA5
VA6
VA7
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 2 1: Error

VA9
VAA
VAB
LINK PARAMETERERROR
COMMUNICATION ERROR
-LINK 3 1: Error
8-46
ALL ST IN
VAC
｝
COMMUNICATING
VAD LINK PARAMETERERROR PRG.1 0: No error
-LINK 4
VAE COMMUNICATION ERROR 1: Error
VAF
ALL ST IN
VB0
｝
COMMUNICATING
VB1 LINK PARAMETERERROR PRG.1 0: No error
-LINK 5
VB3
ALL ST IN
VB4
｝
COMMUNICATING
-LINK 6
VB7
ALL ST IN
VB8
｝
COMMUNICATING
-LINK 7
VBA COMMUNICATION ERROR 1: Error
VBB
ALL ST IN
VBC
｝
COMMUNICATING
VBD LINK PARAMETERERROR PRG.1 0: No error
-LINK 8
VBE COMMUNICATION ERROR 1: Error
VBF
0: No error
1: Error
VC1 POWER DOWN
0: No error ON detection of program or parameter data
VC2 MEMORY DATA ERROR
1: Error error.
0: No error
1: Error
0: No error ON upon detection of special module error
VC4 SPECIAL MODULE ERROR
1: Error ON after ERROR reset
0: No error ON when CPU can not recognize correctly I/O
VC5 MODULE PARAMETER ERROR
1: Error module.
0: No error
1: Error
VC7
( Fuse blown, etc.) 1: Error OFF after ERROR reset
ON upon detection of I/O module composition
0: No error error/
VC8 I/O COMPOSITION ERROR
1: Error ( Allocation of special card number and I/O
addresses )
0: No error ON upon detection of error related to user
VC9 USER PROGRAM ERROR
1: Error program. OFF after ERROR reset.
0: No error
VCA BACK UP MEMORY ERROR ON upon detection of back-up memory error
1: Error
ON upon detection of memory data error
0: Checked
VCB DATA ERROR UNCHECK (VC2) . OFF with V5E ON or use of peripheral
1: Uncheck
equipment.
VE0 I/O VERIFICATION ERROR
VE1 SCAN TIME-OVER
VF0 BATTERY ERROR
SPECIAL MODULE ALLOCATION 0: No error ON against allocation error of communication
VF2
ERROR 1: Error (link) module.
0: No error
VF3 DIAGNOSIS MODULE ERROR ON against diagnosis module error.
1: Error
0: No error
VF5 BATTERY ERROR ON upon detection of built-in clock error.
1: Error
8-47
8.2.6. Table of special registers
The special registers listed in the table below are available for special applications such as CPU status,
built-in clock, link modules, etc. In PC10 mode, special relay of basic area is available for each program.
Under data memory division mode the special registers in basic area are available individually for each
program. In this case, the special registers for built-in clock time, annunciator, link modules, etc. used in
each sequence program are in special register area corresponding to the program.
Other special registers are all in the special register area for "PRG.1".
It is all reservation area for the address that doesn't exist in the list. Therefore, the user cannot use its
address.
(1-1) PC10 mode and data memory dividing mode PRG1

Address Name Description
S001 SCAN TIME max value Maximum scan time in sequence program (ms) Binary
S002 SCAN TIME min value Minimum scan time in sequence program (ms) Binary
S003 SCAN TIME Present value Updated scan time in sequence program (ms) Binary
Present time of the built-in clock is stored.
S004 Time (Sec) For data display, 1 digit is displayed by 1Byte in BCD code.
S005 Time (Minutes) (Ex. "0102" represents "12".)
Year data is displayed with lower two digits of AD year. "day
S006 Time (Hours) of week" data is represented by 0 ~ 6, which correspond to
Sun. ~ Sat.
BCD
S007 Time (Day) Even if the register is rewritten directly, time change is
(1 digit/byte)
impossible.Please perform a setup of time from <Setup
S008 Time (Month) data/time> of PCwin or use an exclusive use of an
application instruction. (Please refer to "309 SYS Clock
S009 Time (Year) adjustment instruction(FUN300) PC3J series since version
2.6" in "PROGRAMMING MANUAL" about an application
S00A Day of week instruction.)
Binary,
S00C
lower
Integrated make time Cumulative value of CPU module make (current feed) time (h)
Binary,
S00D
upper
Binary,
S00E
Cumulative value of sequence program run time (h) lower
Integrated run time
Binary,
S00F
upper
S010 End processing time max value Maximum end processing time in sequence program (ms) Binary
S011 End processing time Min value Minimum end processing time in sequence program (ms) Binary
S012 End processing time Present value Updated end processing time in sequence program (ms) Binary
S019 Time (Minutesec) Present time of the built-in clock is stored.
S01A Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD BCD
code. (2 digit/byte)
S01B Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
This timer works by 1 ms as 0 seconds when the power
S022 1 ms timer supply is turned on. (Scan synchronous) Binary
This timer works by 0.1 ms as 0 seconds when the power
S025 0.1 ms timer supply is turned on. (Scan asynchronous) Binary
S0A8

Link module corde See 9.4 “ Special Relays and Special Registers “.
S0AF
S0C0 Initial scan time Initial sequence program execution time in program-1 (ms) Binary
SCAN TIME max
S0C1 value
Maximum scan time in sequence program of program-1 (ms) Binary
PRG.1 SCAN TIME min
S0C2 value
Minimum scan time in sequence program of program-1 Binary
SCAN TIME
S0C3 Present value
Updated scan time in sequence program of program-1 Binary
S0C4 Initial scan time Initial sequence execution time in program-2 (ms) Binary
SCAN TIME max
S0C5 value
Maximum scan time in sequence program of program-2 (ms) Binary
PRG.2 SCAN TIME min
S0C6 value
Minimum scan time in sequence program of program-2 (ms) Binary
SCAN TIME
S0C7 Present value
Updated scan time in sequence program of program-2 (ms) Binary
8-48
SCAN TIME
S0C9 Maximum scan time in sequence program of program-3 (ms) Binary
max value
PRG.3 SCAN TIME min
S0CA Minimum scan time in sequence program of program-3 (ms) Binary
value
SCAN TIME
S0CB Present value
Updated scan time in sequence program of program-3 (ms) Binary
S0E0 Changed portion Bit B:PRG.3 Bit A: PRG.2, Bit 9 : PRG.1 ,Bit 8: parameter Bit
Program Time (Minutesec)
S0E1 Present time of the built-in clock is stored.
change BCD
S0E2 history 1 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
S0E3 Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
change BCD
S0E6 history 2 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
change BCD
S0EA history 3 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code. (2 digit/byte)
S0EB Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
S0EC Changed portion Bit B:PRG.3 Bit A: PRG.2, Bit 9 : PRG.1 ,Bit 8: parameter Bit
S0ED Present time of the built-in clock is stored.
change BCD
S0EE history 4 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code. (2 digit/byte)
S0EF Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
S0F0 Changed portion Bit B:PRG.3 Bit A: PRG.2, Bit 9 : PRG.1 ,Bit 8: parameter Bit
S0F1 Present time of the built-in clock is stored.
change BCD
S0F2 history 5 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code. (2 digit/byte)
S0F3 Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
change BCD
S0F6 history 6 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code. (2 digit/byte)
change BCD
S0FA history 7 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code. (2 digit/byte)
S0FB Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
S0FC Changed portion Bit B:PRG.3 Bit A: PRG.2, Bit 9 : PRG.1 ,Bit 8: parameter Bit
S0FD Present time of the built-in clock is stored.
change BCD
S0FE history 8 Ti m e ( D a y  H o u r ) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
S0FF Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
bit0:communicating(ON:Communicating with TOYOPUC-PCS)
bit1:RUN signal(ON:TOYO-PUC-PCS is in a RUS state)
bit2:ERR0 signal(ON:ERR0 is occurred in TOYOPUC-PCS)
Communication bit3:ERR1 signal(NO:ERR1 is occurred in TOYOPUC-PCS)
S130 status bit4:ALM signal(ON:ALM is occurred in TOYOPUC-PCS)
bit8:link command usable(ON:issue of link command is available in
TOYOPUC- TOYOPUC-PCS)
PCS data bit9:link command error(ON:Trouble is occurred in issued link command)
Flaming error counter occurred in communication between
S131 Flaming error
CPU-TOYOPUC-PCS.
Parity error counter occurred in communication between
S132 Parity error
CPU-TOYOPUC-PCS.
Over run error counter occurred in communication between
S133 Overrun error
CPU-TOYOPUC-PCS.
8-49
S140
Input from TOYOPUC-PCS.
~
Circuit can be created for TOYOPUC-PCS.
S14F
S150
SN-I/F output data link Output from TOYOPUC-PCS.
~
area Circuit can be created for TOYOPUC-PCS.

S15F
S200
Error information See 5.1.4 "Special register for error information output. "

S24F
S250
PRG.1 Annunciator
See Programming Manual.

information
S2CF
CPU Version is stored.
CPU version corresponds to register value from version 2.05 and after.
CPU version Register value (S2D1)

1.02 0069
1.10 0091
2.00 0101
S2D1 CPU Version
2.01 0105
2.02 0116
2.03 011B
2.04 0132
2.05 0205
3.00 0300
S300 LINK1-1 Communication
(link) module See the individual instruction manual for each communication(link) module.
~
S3FF LINK1-8 status information
In PC10 mode
S1000
Error information See 5.1.4 "Special register for error information output."
~
S11FF
8-50
(1-2) PC10 mode and Data memory division mode PRG.2
S004 Time (Sec) Present time of the built-in clock is stored.
For data display, 1 digit is displayed by 1Byte in BCD code. (Ex.
S005 Time (Minutes) "0102" represents "12".)
S006 Time (Hours) Year data is displayed with lower two digits of AD year. "day of
S007 Time (Day) week" data is represented by 0 ~ 6, which correspond to Sun. ~
Sat. BCD
S008 Time (Month) Note) Even if the register is rewritten directly, time change is (1 digit/byte)
S009 Time (Year) impossible.Please perform a setup of time from <Setup
data/time> of PCwin or use an exclusive use of an application
instruction. (Please refer to "309 SYS Clock adjustment
S00A Day of week instruction(FUN300) PC3J series since version 2.6" in
"PROGRAMMING MANUAL" about an application instruction.)
S019 Time (Minutesec) Present time of the built-in clock is stored. For data display, 2
digits are represented by 1Byte in BCD code. BCD
S01A Time (DayHour) (2 digit/byte)
(Ex. "1234" represents "12 (min).34(sec).)
S01B Time (Yearmonth)
S0A8
Link module corde
~
See 9.4 " Special Relays and Special Registers ".

S0AF
S250
PRG.2 Annunciator
~
information
S2CF
S300 Prg2-LINK1 Communication
(link) module
~
status See the individual instruction manual for each communication(link) module.
S3FF Prg2-LINK8 information
8-51
(1-3) PC10 mode and Data memory separate mode PRG.3
S004 Time (Sec) Present time of the built-in clock is stored.
S005 Time (Minutes) For data display, 1 digit is displayed by 1Byte in BCD code. (Ex.
S006 Time (Hours) "0102" represents "12".)
Year data is displayed with lower two digits of AD year. "day of
S007 Time (Day) week" data is represented by 0 ~ 6, which correspond to Sun. ~
S008 Time (Month) Sat. BCD
S009 Time (Year) Note) Even if the register is rewritten directly, time change is (1 digit/byte)
impossible.Please perform a setup of time from <Setup data/time>
of PCwin or use an exclusive use of an application instruction.
S00A Day of week (Please refer to "309 SYS Clock adjustment instruction(FUN300)
PC3J series since version 2.6" in "PROGRAMMING MANUAL"
about an application instruction. )
S019 Time (Minute·sec) Present time of the built-in clock is stored. For data display, 2 BCD
S01A Time (Day·Hour) digits are represented by 1Byte in BCD code.
(Ex. "1234" represents "12 (min).34(sec).) (2 digit/byte)
S01B Time (Year·month)
S0A8
~
Link module corde See 9.4 " Special Relays and Special Registers ".
S0AF
S250
PRG.3 Annunciator
~
information
S2CF
S300 Prg3-Link1 Communication
(link) module
~
status See the individual instruction manual for each communication(link) module.
S3FF Prg3-Link8 information
8-52
(2-1)Data memory single mode, Basic area
S004 Time (sec) Present time of the built-in clock is stored.
For data display, 1 digit is displayed by 1Byte in BCD code.
S005 Time (minutes) (Ex. "0102" represents "12".)
Year data is displayed with lower two digits of AD year. "day
S006 Time (Hours) of week" data is represented by 0 ~ 6, which correspond to
Sun. ~ Sat.
Note) Even if the register is rewritten directly, time change is BCD
S007 Time (day) (1 digit/byte)
impossible.Please perform a setup of time from <Setup
S008 Time (Month) data/time> of PCwin or use an exclusive use of an
application instruction. (Please refer to "309 SYS Clock
S009 Time (year) adjustment instruction(FUN300) PC3J series since version
2.6" in "PROGRAMMING MANUAL" about an application
S00A Day of week instruction. )
Binary,
S00C
lower
Binary,
S00D
upper
Binary,
S00E
lower
Integrated run time Cumulative value of sequence program run time (h)
Binary,
S00F
upper
S012 End processing time Present value Updated end processing time in sequence program (ms) Binary
S019 Time (Minutesec) Present time of the built-in clock is stored. For data display, 2
BCD
S01A Time (DayHour) digits are represented by 1Byte in BCD code.
(2 digit/byte)
(Ex. "1234" represents "12 (min).34(sec).)
S022 1 ms timer Binary
supply is turned on.
This timer works by 0.1 ms as 0 seconds when the power
S025 0.1 ms timer Binary
supply is turned on. (Scan asynchronous)
S0A8
Link module corde See 9.4 " Special Relays and Special Registers ".
~
S0AF
S0C0 Initial sequence program execution time in program-1 (ms) Binary
SCAN TIME max Maximum scan time in sequence program of
S0C1 Binary
value program-1 )ms)
PRG.1 SCAN TIME min
S0C2 Minimum scan time in sequence program of program-1 Binary
value
SCAN TIME
S0C3 Updated scan time in sequence program of program-1 Binary
Present value
SCAN TIME max
value
PRG.2 SCAN TIME min
S0C6 Minimum scan time in sequence program of program-2 (ms) Binary
value
SCAN TIME
S0C7 Updated scan time in sequence program of program-2 (ms) Binary
Present value
SCAN TIME max
value
PRG.3 SCAN TIME min
S0CA Minimum scan time in sequence program of program-3 (ms) Binary
value
SCAN TIME
S0CB Updated scan time in sequence program of program-3 (ms) Binary
Present value
8-53
change BCD
S0E2 history 1 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
change BCD
S0E6 history 2 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
change BCD
S0EA history 3 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
S0EB Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
S0ED Present time of the built-in clock is stored.
change BCD
S0EE history 4 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
S0EF Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
change BCD
S0F2 history 5 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
change BCD
S0F6 history 6 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
change BCD
S0FA history 7 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
S0FB Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
S0FC Changed portion Bit B:PRG.3 Bit A: PRG.2, Bit 9 : PRG.1 ,Bit 8: parameter Bit
S0FD Present time of the built-in clock is stored.
change BCD
S0FE history 8 Time (DayHour) For data display, 2 digits are represented by 1Byte in BCD code.
(2 digit/byte)
S0FF Time (Yearmonth) (Ex. "1234" represents "12 (min).34(sec).)
bit0:communicating(ON:Communicating with TOYOPUC-PCS)
bit1:RUN signal(ON:TOYO-PUC-PCS is in a RUS state)
bit2:ERR0 signal(ON:ERR0 is occurred in TOYOPUC-PCS)
Communication bit3:ERR1 signal(NO:ERR1 is occurred in TOYOPUC-PCS)
S130 status bit4:ALM signal(ON:ALM is occurred in TOYOPUC-PCS)
bit8:link command usable(ON:issue of link command is available in
TOYOPUC- TOYOPUC-PCS)
PCS data bit9:link command error(ON:Trouble is occurred in issued link command)
Flaming error counter occurred in communication between
S131 Flaming error
CPU-TOYOPUC-PCS.
Parity error counter occurred in communication between
S132 Parity error
CPU-TOYOPUC-PCS.
Over run error counter occurred in communication between
S133 Overrun error
CPU-TOYOPUC-PCS.
S140
Input from TOYOPUC-PCS.
~

S14F
S150
Output from TOYOPUC-PCS.
SN-I/F output data link area
~

S15F
8-54
S200
Error information See 5.1.4 "Special register for error information output."
~
S24F
S250
Annunciator information See Programming Manual.
~
S2CF


1.02 0069
1.10 0091
2.00 0101
S2D1 CPU version
2.01 0105
2.02 0116
2.03 011B
2.04 0132
2.05 0205
3.00 0300
S300 PRG.1- LINK1 Communication

(link) module
~
See the individual instruction manual for each communication(link) module.

status
S3FF PRG.1- LINK8 information
(2-2)Data memory single mode, extended area

ES000 LINK2-1 Communication (link)
See the individual instruction manual for each communication (link) module.
module status
~
(Corresponding to S300 - S3FF).

ES0FF LINK2-8 information
ES100 LINK3-1 Communication (link)
See the individual instruction manual for each communication (link) module.
module status
~
(Corresponding to S300 - S3FF).

ES1FF LINK3-8 information
8-55
(3) PC2 Interchange Mode
S000 Initial scan time Initial sequence program execution time (ms) Binary
S004 Time (sec)
Present time of the built-in clock is stored.
For data display, 1 digit is displayed by 1Byte in BCD code. (Ex.
S005 Time (minutes)
"0102" represents "12".)
Year data is displayed with lower two digits of AD year. "day of
S006 Time (Hours)
week" data is represented by 0 ~ 6, which correspond to Sun. ~
Sat. BCD
S007 Time (day)
Note) Even if the register is rewritten directly, time change is (1 digit/byte)
impossible.Please perform a setup of time from <Setup data/time>
S008 Time (Month)
of PCwin or use an exclusive use of an application instruction.
(Please refer to "309 SYS Clock adjustment instruction(FUN300)
S009 Time (year)
PC3J series since version 2.6" in "PROGRAMMING MANUAL"
about an application instruction. )
S00A Day of week
Binary,
S00C
lower
Binary,
S00D
upper
Binary,
S00E
lower
Integrated run time Cumulative value of sequence program run time (h)
Binary,
S00F
upper
End processing time Present
S012 value
Updated end processing time in sequence program (ms) Binary
S019 Time (Minutesec) Present time of the built-in clock is stored.
BCD
For data display, 2 digits are represented by 1Byte in BCD code.
S01A Time (DayHour) (Ex. "1234" represents "12 (min).34(sec).) (2 digit/byte)
This timer works by 1 ms as 0 seconds when the power supply is Binary
S022 1 ms timer
turned on.
This timer works by 10 ms as 0 seconds when the power supply Binary
S023 10 ms timer
is turned on.
This timer works by 100 ms as 0 seconds when the power Binary
S024 100 ms timer
This timer works by 0.1 ms as 0 seconds when the power supply Binary
S025 0.1 ms timer
is turned on. (Scan asynchronous)
S0A8
Link module corde See 9.4 “Special relay” "Special register".
~
S0AF
8-56
Program
S0E1 Time (Minutesec) Present time of the built-in clock is stored. For data display, 2
change BCD
S0E2 history 1 Time (DayHour) digits are represented by 1Byte in BCD code. (Ex. "1234"
(2 digit/byte)
S0E3 Time (Yearmonth) represents "12 (min).34(sec).)
Program
change BCD
S0E6 history 2 Time (DayHour) digits are represented by 1Byte in BCD code. (Ex. "1234"
(2 digit/byte)
S0E7 Time (Yearmonth) represents "12 (min).34(sec).)
Program
change BCD
S0EA history 3 Time (DayHour) digits are represented by 1Byte in BCD code. (Ex. "1234"
(2 digit/byte)
S0EB Time (Yearmonth) represents "12 (min).34(sec).)
Program
S0ED Time (Minutesec) Present time of the built-in clock is stored. For data display, 2
change BCD
S0EE history 4 Time (DayHour) digits are represented by 1Byte in BCD code. (Ex. "1234"
(2 digit/byte)
S0EF Time (Yearmonth) represents "12 (min).34(sec).)
Program
change BCD
(2 digit/byte)
Program
change BCD
(2 digit/byte)
Program
change BCD
(2 digit/byte)
Program
change BCD
(2 digit/byte)
S200
Error information See 5.1.4 "Special register for error information output".
~
S24F
S250
Annunciator information See Programming Manual.
~
S2CF


1.02 0069
1.10 0091
2.00 0101
S2D1 CPU Version
2.01 0105
2.02 0116
2.03 011B
2.04 0132
2.05 0205
3.00 0300
S300 LINK1-1 Communication

See the individual instruction manual for each communication(link)
(link) module status
~
information module.
S3FF LINK1-8
8-57
Table of link module code
Module name Code Remaks Module name Code Remaks

AD10 0000 － 2port M-NET 0002 －
PC Link Master 0102 － Pulse Output module 0100 －
PC1-I/F Output 0102 － DLNK-M 8008 －
PC link Slave 0002 － DLNK-S2 8008 －
PC1-I/F Input 0002 － DLNK-M2 8208 －
Computer Link 0003 － Ethernet 8203 －
ME-NET Master 0104 － AF1K 800E －
ME-NET-Slave 0004 － MA1K 810E －
SIO Module 0005 － Motion controller 820E －
Memory card I/F 0005 － FL-net(8K) 8009 －
High speed remote I/O 0008 － FL-net(16K) 8109 －
AS-i 0008 － FL-net(32K) 8209 －
HPC Link Master 4009 － PROFI-S2 8309 －
SUB-CPU Master 4009 － Ethernet(32port) 8203 －
HPC Link Slave **09 **:Slave No. FL remote 8308 －
SUB-CPU Slave **09 **:Slave No.
8-58
8.3. Index function and indirect address
8.3.1. Index register
Index register is dedicated to saving the address information of register.
There are 16 registers available from IX0 to IXF.
It corresponds to conventional indirect designation.
Difference from indirect designation and problem of indirect designation

 For indirect designation, the command that can be indirectly designated was limited.
Use of index register enables indirect designation of command that used to allow only direct
designation.
 Conventional indirect designation provided address information only 16 bits (64Kbytes).
Therefore its use is limited for PC10 expanded mode (Mbyte order) with the register expanded
drastically. Index register provides address information of 32 bits.
 For a circuit using indirect designation, address information is displayed only in hexadecimal
even though the circuit is monitored, and visibility of circuit was not provided. The circuit using
index register designs a system for monitoring the address at indirect designation destination
and its detail at the same time, and has improved the visibility of circuit.
 Offset function, increment and decrement function before execution, and increment and
decrement function after execution are added to the index register, which enables easier
programming.
For a circuit which used to apply indirect designation command conventionally, it is
recommended to substitute index designation and enable visibility of circuit.
8.3.1.1. Command for index register operation (newly added)

 -[INDX D000L -> IX0] Command for setting address information to index register
It corresponds to - [MOVAD (D0000) -> D0100] of indirect
designation.
Byte address of 32 bits is set to the index register.
 -[STIDX IX1 -> D0 ] Command for saving the address information of index register to
the register. Transfer destination requires two words.
 -[LDIDX D0 -> IX2 ] Address information saved in STIDX is returned to the index
register.
Register requires address information of 32 bits.
 -[IDX+ D0 + IX3 ] Detail of 16-bit register is added to the index register.
Added data is treated in signed form.
 -[IDX+H 120h+IX4 ] Hexadecimal constant of 16 bits is added to the index register.
Constant data is signed.
 -[IDX+D -120+IX4 ] Decimal constant of 16 bits is added to the index
register.Constant data is signed.
8.3.1.2. Example of substitute of indirect designation

|-----------------[MOVAD (D120L)-> D0 ] |-------------[INDX D120L -> IX0 ]
|-----------------[MOVAD (D200L)-> D1 ] = |-------------[INDX D200L -> IX1 ]
|-----------------[MOVH (D0) -> (D1) ] |-------------[MOVE IX0 -> IX1 ]
Command for direct designation "MOVE" uses the same processing as "MOVH".
It is not necessary to use index register for all operands. Mixed condition is OK.
Command for direct designation enables indirect designation.
8-59
8.3.1.3. Index register offset designation
When the index is designated, relative address can be designated with index register as head
address.
|-------------[INDX D120L -> IX0 ]

|-------------[* IX0 * IX0+1 -> IX+2]
IX0 (D120L) and IX0 (D120H) are multiplied and the result is stored in IX0+2 (D121L).
The offset can be set in decimal and hexadecimal number.
The range that can be offset-designated is the range of the same identifier as the area
designated by index register.
Own area (M1000 - M17FF) expanded by PC10G and basic area (M000 - M7FF) are regarded to
be different.
Up to max 3FFFFh (256Kbytes) can be designated in a huge area such as FR register.
8.3.1.4. Use of index register on contact and coil

Index register can be used for contact and coil.
For bit address of contact, coil, etc, the offset value is also bit offset.
|-------------[INDX M01L -> IX1 ]

IX1+11h IX1+5h
|----| |---------------------------------------------[ ]
(M021) (M015)
It is not allowed to designate the offset value across the areas the same as operand of application
command.
When the index register is used, it is also allowed to add setting and coil comment.
Circuit monitor is also allowed.
(Note) It is not allowed to use index for timer and counter command.
8.3.1.5. Pre/Post increment/decrement function

Address information of index register is automatically updated.
Designated format
++IX0 Pre-increment: Address information of index register is incremented by 1 (byte
type), 2 (word type), 4 (double word type), and 8 (double
precision) according to data type before executing a command.
--IX0 Pre-decrement: Address information is decremented by 1, 2, 4, and 8 according

to data type before executing a command.
IX0++ Post-increment: Address information of present index register is incremented by

1, 2, 4, and 8 according to data type after the execution of
command.
IX0-- Post-decrement: Address information of present index register is decremented

by 1, 2, 4, and 8 according to data type after the execution of
command.
This function cannot be used for bit address of contact, coil, etc.
Data type is automatically distinguished by each command.
Example
-[W* IX0++ * IX1++ -> IX2++]
(+2) (+2) (+4) Address information is incremented by 4 because the result
of multiplication command is 32 bits.
8-60
8.3.1.6. Circuit monitor of circuit using index register Address in execution
(D0008) (R008) (U1010)

|----------------[W+ IX0+10h + IX1+10h -> IX2+20h]
1234h 2345h 3579h
Data of U1010
8.3.1.7. Specification in detail

 Index command
INDX Index address setting

Address of OP1 is set in the index register of OP2.
Ex: [ INDX D0000L -> IX0 ] D0 is set in the index register IX0.
LDIDX Load index

Address of index address information of 32 bits stored in OP1 register is set in the index of
OP2.
Ex: [ LDIDX D0000 -> IX0 ] Address of address information stored in D1/D0 is set in
IX0.
STIDX Store index

Address information of 32 bits of OP1 index register is stored in OP2 register.
Ex: [ STIDX IX0 -> D0000 ] Address information of IX0 is stored in D1/D0.
IDX+ Index addition

Address obtained by adding the content of OP1 register (word) to the
index register of OP2 as offset is set.
Range of offset: -7FFFh~+7FFFh (8000h~7FFFh) = -32768~+32767
Ex: [ IDX+ D0000 + IX0 ] Offset of DO content is added to IX0.
IDX+D Index constant addition (decimal)

Address obtained by adding the decimal number of OP1 to the index Unit of
register of OP2 is set. addition is
Range of offset: -32768~+32767 bytes.
Ex: [ IDX+D 99 + IX0 ] Offset 99d is added to IX0
IDX+H Index constant addition (hexadecimal)

Address obtained by adding the hexadecimal number of OP1 to the index
register of OP2 is set.
Range of offset: -7FFFh~+7FFFh
Ex: [ IDX+H FF + IX0 ] Offset FFh is added to IX0.
8-61
 Index register
IX0 - IXF 16 index registers

(1) Recognition unit of address
 When inputting an address in bits to the contact, coil, etc.
Automatic recognition by IXn+ (offset) Ex: D0000L = IX0  D0000-1 = IX0+1
IXn represents IX0 - IXF
Range of offset: 0 - 3FFFFh bit (0 - 7FFFFh bytes)
 When inputting an address in bytes to the operand.
Recognition in normal bytes. Ex: D0000L = IX0
 When inputting an address in words to the operand.
Recognition in normal words. Ex: D0000L = IX0 or D0000H = IX0  D0000 = IX0
 When inputting an address in double words to the operand
Recognition in normal words
Ex: D0000L = IX0 or D0000H = IX0  D1D0000 = IX0
(2) Index register is used in common to P1, P2, and P3. Sequence of address setting is cyclic
(P1  P2  P3)
Supplement: All addresses are distinguished 32 bits.
(3) Offset
Offset is recognized by byte.
(Excluding bit designation. Bit designation is describedin (1) above.)
IX@+ (Offset number in hexadecimal or decimal) The value of set index
Range of offset: 0 - 3FFFF bytes (smaller than offset of bit) register itself is not changed.
Ex: |-----------[ INDX D0000L -> IX0 ]-|
|-----[ DMOV 12345678 -> IX0+3h ]-| : 12345678 is transferred to D2/D2.
(Transferred to D2/D1 even if OP2 is IX0+2h.)
[Assuming that D0000L is 0, 3 bytes are added, and (D0001H) is recognized by word,
and (D0001) is obtained.]
(4) Pre-post increment/decrement Data type of address

--IXn The address set before execution is decremented by 1. (byte, word, and double-word)
++IXn The address set before execution is incremented by 1. is automatically distinguished.
IXn-- The address set after execution is decremented by 1.
IXn++ The address set after execution is incremented by 1. The value set in index register
IXn is IX0 - IXF is actually changed.
Ex: |-----------[ INDX D0000L -> IX0 ]-| D0L is set in IX0.
|-----------[ MOV 12 -> IX0++ ]-| 12 is transferred to D0L, and then IX0 = D0H
|-----------[ IDX+H 1 + IX0 ]-| Address set in IX0 is offset by one byte.
(IX0=D0H  IX0=D1L)
|-----------[ WMOV 1234 -> IX0++ ]-| 1234 is transferred to D1 (D1L is recognized by
word address), and then the address is
incremented by one word, IX0 = D2L.
|-----------[ DMOV 12345678 -> IX0++ ]-| 12345678 is transferred to D3D2 (D2L is
recognized by word address), then the address
is incremented by two words.
(5) Timer and counter

It is not allowed to use index for timer and counter.
(6) Application command for which index register cannot be used.

BBM0V (bit block transfer)
(7) When cutting of power supply, or when resetting.

Index register is not retained. (Cleared)
8-62
 Index error (error 7F)
* Condition of occurrence
(1) When no index address is set, application command relating to the index was executed, or index
register was used.
(2) Out of area: When the identifier was crossed over in offset mode. When discontinuous address
with the same identifier is crossed, the error occurs as well.(Ex.M7FF and M1000)
Supplement: When the area 64K is crossed over within the same identifier of U, EB, and FR, the
index is executed normally.
(3) When executing the timer command, the index register used something other than T or ET.
* Flag
V57 (index error) turns on.
VE2 (application command error latch) turns on.
Supplement: V50 (application command error 1) does not turn on.
* RUN status in error mode
Stops when the calculation command error is checked.
* Operation in error mode
(1) Contact  OFF
(2) Coil  No operation (because there is no executing register itself)
(3) Contact type application command (comparison command)  OFF
(4) Output type application command  Not executed (because there is no executing register itself)
 Example of function description

P1
|------------------[ INDX D5L -> IX0 ]-| D5L is set in IX0.
|--------------[ WMOV 1234 -> IX0++ ]-| 1234h is transferred to D5 (then, IX0=D6L)
|----------[ DMOV 12345678 -> IX0++ ]-| 12345678h is transferred to D7/D6 (then, IX0=D8L)
|-----------------[ MOV AB -> IX0+3 ]-| AB is transferred to D9H (IX0=D8L) Recognized in words.
|--------------[ WMOV 9876 -> IX0+4 ]-| 9876 is transferred to DA (IX0=D8L)
DAL,DAH  DA
|-------------[ WMOV ABCD -> IX0+5 ]-| ABCD is transferred to DA (IX0=D8L)
|-----------------[ STIDX IX0 -> D10 ]-| Address information of IX0 (=D8L) is stored in D11/D10.
|-----------------[ LDIDX D10 -> IX1 ]-| D8L is set in IX1.
|-------------------[ IDX+H 20 + IX1 ]-| D18L is set inIX1 (IX1=D8L+20h=D18L)
P2
|-----------------[ WMOVE IX1 -> D0 ]-| P1-D18L is transferred to P2-D0.
8-63
 PCwin display and note
(1) When the index is used for coil (including output type application command), duplication of output
cannot be detected by program check.
(2) The address indicating the index register is displayed in monitoring.
(3) The index serial number is affixed per index.
(4) Comment is attached to each index and serial number. (Index/Comment).
(5) In checking with block, index and serial number are included in checking.
(6) Index can be used for operand of indirect address in application command.
(7) It is not allowed to use index for direct address in the step of SFC.
(8) It is not allowed to used index within FB library.
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8-64
8.3.1.8. List of address addition and subtraction value for pre/post increment and decrement
Pre/Post increment and decrement (--Ixn, ++Ixn, IXn--, IXn++: IXn represents IX0 - IXF) automatically
distinguishes the address data type of application command for use (byte, word, and double-word) and
changes the address of index register.
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Mnemonic Name OP1 OP2 OP3 INDX
Single
NO.
2-byte direct
0 WMOVE 4 Transfer source Transfer destination 2/2
transfer
BCD 4-digit
1 WMOVP 4 Constant data Transfer destination 0/2
constant transfer
Exchange
2 WXCH 16-bit exchange 4 Transfer destination 2/2
source
BCD 4 digits -> Conversion
3 WBIN 4 Transfer destination 2/2
BIN source
Conversion
4 WBCD BIN->BCD 4 digits 4 Transfer destination 2/2
source
Transfer destination Offset storage
5 DIV Distribution (byte) 5 Transfer source 1/1/1
base address address
Transfer source Offset storage Transfer
6 PUP Extraction (byte) 5 1/1/1
base address address destination
Decimal 5-digit
7 WMOVR 4 Constant data Transfer destination 0/2 
constant transfer
Octal 6-digit
8 WMOVQ 4 Constant data Transfer destination 0/2
constant transfer
Conversion
9 NOT Inversion (byte) 4 Transfer destination 1/1
source
BCD addition (4
10 W+P 5 S address Daddress Raddress 2/2/2
digits)
BCD subtraction
11 W-P 5 S address Daddress Raddress 2/2/2
(4 digits)
Comparison Comparison
12 WCP Word comparison 4 2/2 
source address destination address
Logical product
13 AND 5 S address D address Raddress 1/1/1
(byte)
14 OR Logical sum (byte) 5 S address D address Raddress 1/1/1
Comparison Comparison
17 CP Byte comparison 4 1/1 
source address destination address
Exclusive logical
18 XOR 5 S address D address Raddress 1/1/1
sum (byte)
Clear check Transfer destination
20 CMOV 5 Transfer source Data quantity 1/1/0
transfer (byte) clearing confirmation
Matched data Comparison Comparison clearing
21 CLR 5 Data quantity 1/1/0
clearing (byte) source destination
1-bit right shift
36 WSFR 3 Shift destination 2
(word)
1-bit left shift
37 WSFL 3 Shift destination 2
(word)
50 DECO 4 -> 16 decoder 4 Decode source Decode destination 1/2
51 ENCO 16 ->4 encoder 4 Encode source Encode destination 2/1
7-segment
52 SEG 5 Decode source Decode destination Data quantity 1/1/0
decoder ﾞ
Exchange
53 SXCH 4-bit exchange 4 Transfer destination 1/1
source
Bit extraction Beat position
54 BPU 4 Extraction source 1/1
(byte) storage
Hexadecimal
Transfer
62 MOVT 2-digit constant 5 Constant data Transfer destination 0/1/1
destination
2-position transfer
Binary increment Comparison
63 WINC 4 +1 address 2/2
(word) source
Binary decrement
64 WDEC 3 -1 address 2
(word)
Entrapment shift
68 SFIN 4 Head address End address 1/1
IN (byte)
Entrapment shift Transfer
69 SFOUT 5 Head address End address 1/1/1
OUT (byte) destination
8-65
Floating
point
Step count
Signed
precision
precision
FUN.
Double
Single
NO.
Transfer source Transfer destination Transfer

70 BMOV1 Byte block transfer 1 5 destination end 1/1/1
initial address head address
Indirect byte block Transfer source Transfer destination Transfer count
71 BMVI 5 2/2/2
transfer initial indirect head indirect indirect
Block distribution Transfer source Transfer count
72 BDIV (byte) 5 base offset Transfer destination indirect 2/2/2
73 BPUP Block extraction 5 Transfer source Transfer destination Transfer count 2/2/2
(byte) base offset indirect
1-byte indirect Transfer destination
74 MOVF 4 Transfer source 1/2
transfer 1 indirect
1-byte indirect Transfer source
75 MOVG transfer 2 4 indirect Transfer destination 2/1
76 MOVH 1-byte indirect 4 Transfer source Transfer destination 2/2

transfer 3 indirect indirect
77 FIL1 Byte data file 1 5 Constant data Head End address 0/1/1
Indirect byte data file Constant data End address
78 FILI1 1 5 indirect Head indirect indirect 1/2/2
81 MKP2 Even number parity 4 Transfer source Transfer destination 1/1

preparation
Even number parity
82 PCH2 3 Check source 1
check
Odd number parity
83 MKP1 preparation 4 Transfer source Transfer destination 1/1
84 PCH1 Odd number parity 3 Check source 1

check
Code conversion Transfer destination Transfer
85 CDSET 5 Transfer source 1/1/1
setting offset destination base
Code conversion Transfer source Transfer source Transfer
86 CDO1 output 1 5 offset base destination 1/1/1
Conversion
Code conversion Transfer source Transfer source
87 CDO2 output 2 5 offset base output 1/1/1
destination
Search data
88 SRH1 Byte data search 1 5 storage Head End 1/1/1
destination
Search data
89 WSRH1 Word data search 1 5 storage Head End 2/2/2
destination
90 MOVE 1-byte direct transfer 4 Transfer source Transfer destination 1/1
91 UP1 Upward 1-byte shift 4 Head End 1/1

Binary addition
92 W+ (word) S address D address R address 2/2/2 
93 W- Binary subtraction S address D address R address 2/2/2 

(word)
Binary multiplication
94 W* S address Daddress R address 2/2/4 
(word)
95 W/B Binary division (word 1) S address D address R address 2/1/2 
100 MOV Hexadecimal 2-digit 4 Constant data Transfer destination 0/1 

constant transfer
Hexadecimal 4-digit
101 WMOV 4 Constant data Transfer destination 0/2 
constant transfer
Hexadecimal 8-digit Low-order High-order constant Transfer
102 DMOV constant transfer 5 constant data data destination 0/0/4  568 568
103 MOVP BCD 2-digit constant 4 Constant data Transfer destination 0/0/1
transfer
BCD 8-digit constant Low-order High-order constant Transfer
104 DMOVP 5 0/0/4
transfer constant data data destination
Decimal 3-digit
105 MOVR constant transfer 4 Constant data Transfer destination 0/1 
106 DMOVR Decimal 10-digit 5 Low-order High-order constant Transfer 0/0/4  569 569
constant transfer constant data data destination
Octal 3-digit
107 MOVQ 4 Constant data Transfer destination 0/1
constant transfer
Octal 11-digit Low-order High-order constant Transfer
108 DMOVQ constant transfer 5 constant data data destination 0/0/4
109 JIS JIS code storage 5 Low-order High-order constant Transfer 0/0/1
constant data data destination
Hexadecimal 4-digit Transfer
110 WMOVT 5 Constant data Transfer destination 0/2/2
2-position transfer destination
8-66
Floating
point
Step count
Signed
precision
precision
FUN.
Double
Single
NO.
111 DMOVE 4-byte indirect 4 Transfer source Transfer destination 4/4

transfer
112 WMOVF 2-byte indirect 4 Transfer source Transfer destination 2/2
transfer 1 indirect
113 DMOVF 4-byte indirect 4 Transfer source Transfer destination 4/2
transfer 1 indirect
114 WMOVG 4 Transfer destination 2/2
transfer 2 indirect
115 DMOVG 4 Transfer destination 2/4
transfer 2 indirect
2-byte indirect Transfer source Transfer destination
116 WMOVH 4 2/2
4-byte indirect Transfer source Transfer destination
117 DMOVH 4 2/2
118 BMOV2 Byte block transfer 5 Transfer source Transfer destination Transfer count 1/1/0
2 head head
119 WBMOV Word block 5 Transfer source Transfer destination Transfer count 2/2/0
transfer head head
120 WBMVI Word indirect 5 Transfer source Transfer destination Transfer count 2/2/2
block transfer head indirect head indirect indirect
Transfer Transfer
122 WDIV Distribution (word) 5 Transfer source destination 2/2/2
destinationbase offset
Transfer
123 DDIV Distribution (32 5 Transfer source Transfer destination 4/2/2
bits) destinationbase
offset
Transfer source Transfer source Transfer
124 WPUP Extraction (word) 5 2/2/2
base offset destination
Extraction (32 Transfer source Transfer source Transfer
125 DPUP 5 4/2/4
bits) base offset destination
Block distribution Transfer source Transfer destination Transfer count
126 WBDIV 5 2/2/2
(word) base offset indirect indirect
Transfer
Block extraction Transfer source Transfer count
127 WBPUP (word) 5 indirect destinationbase indirect 2/2/2
offset
128 FIL2 Byte data file 2 5 Constant data Transfer destination Data count 0/1/0
head
129 WFIL Word data file 5 Constant data Transfer destination Data count 0/2/0
head
130 FILI2 Indirect byte data 5 Constant data Transfer destination Data count 1/2/2
file 2 indirect head indirect indirect
131 WFILI Indirect word data 5 Constant data Transfer destination Data count 2/2/2
file indirect head indirect indirect
132 XCH 8-bit exchange 4 Transfer source Transfer source 1/1
destination destination
133 DXCH 32-bit exchange 4 Transfer source Transfer source 4/4
destination destination
134 BXCH Block exchange 5 Transfer source Transfer source Data count 1/1/0
(byte) destination destination
135 WBXCH Block exchange 5 Transfer source Transfer source Data count 2/2/0
(word) destination destination
136 BSET Bit setting (byte) 4 Bit position Bit operation 1/1
destination
137 WBSET Bit setting (word) 4 Bit position Bit operation 1/2
destination
138 DBSET Bit setting (32 bits) 4 Bit position Bit operation 1/4
destination
139 BRST Bit resetting (byte) 4 Bit operation 1/1
Bit position destination
140 WBRST Bit resetting 4 Bit operation 1/2
(word) Bit position destination
141 DBRST Bit resetting (32 4 Bit operation 1/4
bits) Bit position destination
142 WBPU Bit extraction 4 Bit operation 1/2
(word) Bit position destination
143 DBPU Bit extraction (32 4 Bit operation 1/4
bits) Bit position destination
144 MOVJ Register -> File 4 Transfer source Transfer destination 1/1
(byte)
145 WMOVJ Register -> File 4 Transfer source Transfer destination 2/2
(word)
146 DMOVJ Register -> File 4 Transfer source Transfer destination 4/4
(32 bits)
147 MOVK File -> Register 4 Transfer source Transfer destination 1/1
(byte)
148 WMOVK File -> Register 4 Transfer source Transfer destination 2/2
(word)
149 DMOVK File -> Register 4 Transfer source Transfer destination 4/4
(32 bits)
8-67
Floating
point
Step count
Signed
precision
precision
FUN.
Double
Single
NO.
152 BIN BCD2 digits -> 4 Conversion Conversion 1/1

BIN source destination
153 DBIN BCD8 digits -> 4 Conversion Conversion 4/4
BIN source destination
154 BCD BIN -> BCD2 4 Conversion Conversion 1/1
digits source destination
155 DBCD BIN -> BCD8 4 Conversion Conversion 4/4
digits source destination
156 JBIN JIS -> BIN 5 Conversion Conversion Data count 1/1/0
source destination
157 BJIS BIN -> JIS 5 Conversion Conversion Data count 1/1/0
source destination
158 WTIM1 Hour, Minute, 4 Conversion Conversion 1/2
Second -> Second source destination
159 WTIM2 Second - > Hour, 4 Conversion Conversion 2/1
Minute, Second source destination
160 FIFW FIFO writing (byte) 5 Transfer source FileHead Offset 1/1/2
FIFO writing
161 WFIFW (word) 5 Transfer source FileHead Offset 2/2/2
FIFO writing (32
162 DFIFW bits) 5 Transfer source FileHead Offset 4/4/2
FIFO reading Transfer
163 FIFR (byte) 5 File head Offset destination 1/2/1
FIFO reading Transfer
164 WFIFR (word) 5 File head Offset destination 2/2/2
FIFO reading (32 Transfer
165 DFIFR bits) 5 File head Offset destination 4/2/4
Clearing check Transfer source Transfer destination
166 WCMOV transfer (word) 5 head clear check Transfer count 2/2/0
Matched data Comparison Clear destination
167 WCLR clearing (word) 5 head Head Data count 2/2/0
Binary addition
168 + (byte) 5 Saddress Daddress Raddress 1/1/1 
Binary addition
169 D+ (32 bits) 5 Saddress Daddress Raddress 4/4/4  556 556
Binarysubtraction
170 - (byte) 5 Saddress Daddress Raddress 1/1/1 
Binarysubtraction
171 D- (32 bits) 5 Saddress Daddress Raddress 4/4/4  557 557
Binary
172 * multiplication 5 Saddress Daddress Raddress 1/1/2 
(byte)
Binary
173 D* multiplication (32 5 Saddress Daddress Raddress 4/4/8  558 558
bits)
174 / Binary division 5 Saddress Daddress Raddress 1/1/1 
(byte)
175 W/ Binary division 5 Saddress Daddress Raddress 2/2/2 
(word 2)
176 D/ Binary division (32 5 Saddress Daddress Raddress 4/4/4  559 559
bits)
177 +P BCD addition (2 5 Saddress Daddress Raddress 1/1/1
digits)
178 D+P BCD addition (8 5 Saddress Daddress Raddress 4/4/4
digits)
179 -P BCD subtraction 5 Saddress Daddress Raddress 1/1/1
(2 digits)
180 D-P BCD subtraction 5 Saddress Daddress Raddress 4/4/4
(8digits)
181 *P BCD multiplication 5 Saddress Daddress Raddress 1/1/2
(2 digits)
182 W*P BCD multiplication 5 Saddress Daddress Raddress 2/2/4
(4 digits)
183 D*P BCD multiplication 5 Saddress Daddress Raddress 4/4/8
(8 digits)
184 /P BCDdivision 5 Saddress Daddress Raddress 1/1/1
(2 digits)
185 W/P BCDdivision 5 Saddress Daddress Raddress 2/2/2
(4 digits)
186 D/P BCDdivision 5 Saddress Daddress Raddress 4/4/4
(8 digits)
187 WAND Logical product 5 Saddress Daddress Raddress 1/1/1
(word)
188 DAND Logical product 5 Saddress Daddress Raddress 4/4/4
(32 bits)
189 WOR Logical sum 5 Saddress Daddress Raddress 1/1/1
(word)
8-68
Floating
point
Step count
Signed
precision
precision
FUN.
Double
Single
NO.
190 DOR Logical sum (32 5 Saddress Daddress R address 4/4/4

bits)
191 WNOT Inversion (word) 4 Transfer source Transfer destination 2/2
192 DNOT Inversion (32 bits) 4 Transfer source Transfer destination 4/4/4
Exclusive logical
193 WXOR 5 Saddress Daddress R address 2/2/2
sum (word)
Exclusive logical
194 DXOR 5 Saddress Daddress R address 4/4/4
sum (32 bits)
195 INC 4 +1address 1/1
(byte) destination
196 DINC 4 +1address 4/4
(32 bits) destination
Binary decrement
197 DEC 3 -1address 1
(byte)
Binary decrement
198 DDEC 3 -1address 4
(32 bits)
BCD 2-digit Comparison
199 INCP 4 +1address 1/1
increment destination
200 WINCP 4 +1address 2/2
201 DINCP 4 +1address 4/4
BCD 2-digit
202 DECP 3 -1address 1
decrement
BCD 4-digit
203 WDECP 3 -1address 2
decrement
BCD 8-digit
204 DDECP 3 -1address 4
decrement
ON bit count
208 SUM 4 Count source Transfer destination 1/1
(byte)
ON bit count
209 WSUM 4 Count source Transfer destination 2/1
(word)
ON bit count (32
210 DSUM 4 Count source Transfer destination 4/1
bits)
Comparison
211 DCP 32-bit comparison 4 Comparison source 4/4 
destination
Byte data search Search data
212 SRH2 5 Head Data count 2/1/0
2 address
Word data search Search data
213 WSRH2 5 Head Data count 2/2/0
2 address
Search data
214 DSRH 32-bit data search 5 Head Data count 4/4/0
address
1-bit rightward
217 SFR 3 Shift destination 1
shift (byte)
1-bit rightward
218 DSFR 3 Shift destination 4
shift (32 bits)
1-bit leftward shift
219 SFL 3 Shift destination 1
(byte)
1-bit leftward shift
220 DSFL 3 Shift destination 4
(32 bits)
1-bit rightward and
221 SRL leftward shift 3 Shift destination 1
(byte)
1-bit rightward and
222 WSRL leftward shift 3 Shift destination 2
(word)
1-bit rightward and
223 DSRL leftward shift (32 3 Shift destination 4
bits)
N-bit rightward
224 BSFR 4 Shift destination Shift count 1/0
shift (byte)
N-bit rightward
225 WBSFR 4 Shift destination Shift count 2/0
shift (word)
N-bit rightward
226 DBSFR 4 Shift destination Shift count 4/0
shift (32 bits)
N-bit leftward shift
227 BSFL 4 Shift destination Shift count 1/0
(byte)
228 WBSFL 4 Shift destination Shift count 2/0
(word)
229 DBSFL 4 Shift destination Shift count 4/0
(32 bits)
8-69
Floating
point
Step count
Signed
precision
precision
FUN.
Double
Single
NO.
N-bit
230 BSRL rightward/leftward 4 Shift destination Shift count 1/0
shift (byte)
N-bit
231 WBSRL rightward/leftward 4 Shift destination Shift count 2/0
shift (word)
N-bit
232 DBSRL rightward/leftward 4 Shift destination Shift count 4/0
shift (32 bits)
CY-equipped
233 RRC rightward rotating 4 Shift destination Shift count 1/0
(byte)
CY-equipped
234 WRRC rightward rotating 4 Shift destination Shift count 2/0
(word)
CY-equipped
235 DRRC rightward rotating 4 Shift destination Shift count 4/0
(32 bits)
CY-equipped
236 RLC leftward rotating 4 Shift destination Shift count 1/0
(byte)
CY-equipped
237 WRLC leftward rotating 4 Shift destination Shift count 2/0
(word)
CY-equipped
238 DRLC rightward/leftward 4 Shift destination Shift count 4/0
rotating (32 bits)
CY-equipped
239 RLRC leftward/rightward 4 Shift destination Shift count 1/0
rotating (byte)
CY- equipped
240 WRLRC leftward/rightward 4 Shift destination Shift count 2/0
rotating (word)
CY- equipped
241 DRLRC leftward/rightward 4 Shift destination Shift count 4/0
rotating (32 bits)
242 RR CY-absent right 4 Shift destination Shift count 1/0
rotating (byte)
243 WRR CY-absent right 4 Shift destination Shift count 2/0
rotating (word)
244 DRR CY-absent right 4 Shift destination Shift count 4/0
rotating (32 bits)
245 RL CY-absent left 4 Shift destination Shift count 1/0
rotating (byte)
246 WRL CY-absent left 4 Shift destination Shift count 2/0
rotating (word)
CY-absent
247 DRL rightward/leftward 4 Shift destination Shift count 4/0
rotating (32 bits)
CY-absent
equipped
248 RLR 4 Shift destination Shift count 1/0
leftward/rightward
rotating (byte)
CY-absent
equipped
249 WRLR leftward/rightward 4 Shift destination Shift count 2/0
rotating (word)
CY-absent
250 DRLR rightward/leftward 4 Shift destination Shift count 4/0
rotating (32 bits)
251 SUP Upward shift (4 4 Shift head Shift count 1/0
bits)
252 UP2 Upward shift 4 Shift head Shift count 1/0
(byte)
253 WUP Upward shift 4 Shift head Shift count 2/0
(word)
254 DUP Upward shift (32 4 Shift head Shift count 4/0
bits)
255 SDOWN Downward shift 4 Shift head Shift count 1/0
(4 bits)
256 DOWN Downward shift 4 Shift head Shift count 1/0
(byte)
257 WDOWN Downward shift 4 Shift head Shift count 2/0
(word)
258 DDOWN Downward shift 4 Shift head Shift count 4/0
(32 bits)
259 STURN Inversion (4 bits) 5 Transfer source Transfer destination Data count 1/1/0
8-70
Floating
point
Step count
Signed
precision
precision
FUN.
Double
Single
NO.
260 TURN Inversion (8 bits) 5 Transfer source Transfer destination Data count 1/1/0
261 WTURN Inversion (16 bits) 5 Transfer source Transfer destination Data count 2/2/0
281 RI Input refresh 4 Head Data count 1/0
282 RO Output refresh 4 Head Data count 1/0
283 REF External input transfer 5 Transfer source Transfer destination Data count 1/1/0
External output
284 REFO 5 Transfer source Transfer destination Data count 1/1/0
transfer
291 ANN Annunciator 4 Code Transfer source 0/1
DLNK message
302 MSET transmission
0/1/1
Special module byte Link NO.transfer Transfer source Transfer destination
304 SPR reading
5 count indirect indirect
2/2/2
Special module byte Link NO.transfer Transfer source Transfer destination
306 SPW writing
5 count indirect indirect
2/2/2
316 HCR High-speed counter RD 4 Module address Transfer destination 2/2
317 HCW High-speed counter WR 5 Module address Transfer source Data count 2/2/0
318 IOR Common I/ORD 5 Module address Transfer destination Data count 2/2/0
319 IOW Common I/OWR 5 Module address Transfer source Data count 2/2/0
Address constant Address
320 MOVAD 4 Transfer destination 0/2
transfer constant
BIN constant addition
323 +H 5 Saddress Constant data R address 1/0/1 
(byte)
BIN constant addition
324 W+H 5 Saddress Constant data R address 2/0/2 
(word)
BIN constant addition Low-order constant High-order constant
325 D+H 5 Saddress 4/0/0  560 560
(32 bits) data data
BCD 2-digit constant
326 +HP 5 Saddress Constant data R address 1/0/1
addition
327 W+HP 5 Saddress Constant data R address 2/0/2
addition
BCD 8-digit constant Low-order constant High-order constant
328 D+HP 5 Saddress 4/0/0
addition data data
BIN constant
329 -H 5 Saddress Constant data R address 1/0/1 
subtraction (byte)
BIN constant
330 W-H 5 Saddress Constant data R address 2/0/2 
subtraction (word)
BIN constant Low-order constant High-order constant
331 D-H 5 Saddress 4/0/4  561 561
subtraction (32 bits) data data
332 -HP 5 Saddress Constant data R address 1/0/1
subtraction
333 W-HP 5 Saddress Constant data R address 2/0/2
subtraction
334 D-HP 5 Saddress 4/0/4
subtraction data data
BIN constant
335 *H 5 Saddress Constant data R address 1/0/2 
multiplication (byte)
BIN constant
336 W*H 5 Saddress Constant data R address 2/0/4 
multiplication (word)
BIN constant Low-order constant High-order constant
337 D*H 5 Saddress 4/0/0  562 562
multiplication (32 bits) data data
338 *HP 5 Saddress Constant data R address 1/0/2
multiplication
339 W*HP 5 Saddress Constant data R address 2/0/4
multiplication
340 D*HP 5 Saddress 4/0/0
multiplication data data
BIN constant division
341 /H 5 Saddress Constant data Raddress 1/0/1 
(byte)
BIN constant division
342 W/H 5 Saddress Constant data Raddress 2/0/2 
(word)
BIN constant division Low-order constant High-order constant
343 D/H 5 Saddress 4/0/0  563 563
(32 bits) data data
344 /HP 5 Saddress Constant data R address 1/0/1
division
345 W/HP 5 Saddress Constant data R address 2/0/2
division
346 D/HP 5 Saddress 4/0/0
division data data
Constant logical
347 ANDH 5 Saddress Constant data Raddress 1/0/1
product (byte)
Constant logical
348 WANDH 5 Saddress Constant data Raddress 2/0/2
product (word)
Constant logical Low-order constant High-order constant
349 DANDH 5 Saddress 4/0/0
product (32 bits) data data
8-71
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Constant logical
350 ORH 5 S address Constant data Raddress 1/0/1
sum (byte)
Constant logical
351 WORH 5 S address Constant data Raddress 2/0/2
sum (word)
Constant logical Low-order constant High-order
352 DORH 5 S address 4/0/0
sum (32 bits) data constant data
Constant XOR
353 XORH 5 S address Constant data Raddress 1/0/1
(byte)
Constant XOR
354 WXORH 5 S address Constant data Raddress 2/0/2
(word)
Constant XOR (32 Low-order constant High-order
355 DXORH 5 S address 4/0/0
bits) data constant data
362 STI1 ΣX (byte) BIN 5 Head address Transfer destination Data count 1/2/2 
363 WSTI1 ΣX (word) BIN 5 Head address Transfer destination Data count 2/2/2 
364 DSTI1 ΣX (32 bits) BIN 5 Head address Transfer destination Data count 4/2/2  564 564
Flash register Transfer destination
369 FRWR 5 Head address Data count 2/2/0
writing (FR register)
Storage
I/O register Issue destination
370 CSET 5 Data count destination 0/1/1
reading issue address
address
EB address Transfer
371 BRSET 5 EB address (L) EBaddress(H) 0/0/4
setting destination
Reading out of EB Transfer
372 WBR 5 Transfer source Transfer destination 2/2/0
address count
Writing to EB Transfer
373 WBW 5 Transfer source Transfer destination 2/2/0
address count
Maximum value
374 MAX 5 Head address Transfer destination Data count 1/1/2 
retrieval (byte)
Maximum value
375 WMAX 5 Head address Transfer destination Data count 2/2/2 
retrieval (word)
Maximum value
376 DMAX 5 Head address Transfer destination Data count 4/2/4  565 565
retrieval (32 bits)
Minimum value
377 MIN 5 Head address Transfer destination Data count 1/1/2 
retrieval (byte)
Minimum value
378 WMIN 5 Head address Transfer destination Data count 2/2/2 
retrieval (word)
Minimum value
379 DMIN 5 Head address Transfer destination Data count 4/2/4  566 566
retrieval (32 bits)
380 AVE Average (byte) 5 Head address Transfer destination Data count 1/1/2 
381 WAVE Average (word) 5 Head address Transfer destination Data count 2/2/2 
382 DAVE Average (32 bits) 5 Head address Transfer destination Data count 4/2/4  567 567
Comparison AND
576 =H = Hexadecimal 4 S address Constant 1 
(byte)
Comparison AND
577 =D 4 S address Constant 1 
= Decimal (byte)
Comparison AND
578 =N 4 S address D address 1
= Variable (byte)
Comparison AND
579 W=H = Hexadecimal 4 S address Constant 2 
(word)
Comparison AND
580 W=D 4 S address Constant 2 
= Decimal (word)
8-72
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Comparison
581 W=N AND=Variable 4 S address D address 2
(word)
Comparison
High-order
582 D=H AND=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
583 D=D AND=Decimal (32 5 S address Low-order constant 4  928 928
constant
bits)
Comparison
584 D=N AND=Variable (32 4 S address D address 4 929 929
bits)
Comparison
585 <>H AND<>Hexadecimal 4 S address Constant 1 
(byte)
Comparison
586 <>D AND<>Decimal(byte 4 S address Constant 1 
)
Comparison
587 <>N AND<>Variable 4 S address D address 1
(byte)
Comparison
588 W<>H AND<>Hexadecimal 4 S address Constant 2 
(word)
Comparison
589 W<>D AND<>Decimal 4 S address Constant 2 
(word)
Comparison
590 W<>N AND<>Variable(wor 4 S address Daddress 2
d)
Comparison
High-order
591 D<>H AND<>Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
592 D<>D AND<>Decimal (32 5 S address Low-order constant 4  930 930
constant
bits)
Comparison
593 D<>N AND<>Variable (32 4 S address D address 4 931 931
bits)
Comparison
594 >H AND>Hexadecimal 4 S address Constant 1 
(byte)
Comparison
595 >D 4 S address Constant 1 
AND>Decimal (byte)
Comparison
596 >N AND>Variable 4 S address Daddress 1 
(byte)
Comparison
597 W>H AND>Hexadecimal 4 S address Constant 2 
(word)
Comparison
598 W>D AND>Decimal 4 S address Constant 2 
(word)
Comparison
599 W>N AND>Variable 4 S address Daddress 2 
(word)
8-73
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Comparison
High-order
600 D>H AND>Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
601 D>D AND>Decimal (32 5 S address Low-order constant 4  932 932
constant
bits)
Comparison
602 D>N AND>Variable (32 4 S address D address 4  933 933
bits)
Comparison
603 >=H AND>=Hexadecimal 4 S address Constant 1 
(byte)
Comparison
604 >=D AND>=Decimal 4 S address Constant 1 
(byte)
Comparison
605 >=N AND>=Variable 4 S address D address 1 
(byte)
Comparison
606 W>=H AND>=Hexadecimal 4 S address Constant 2 
(word)
Comparison
607 W>=D AND>=Decimal 4 S address Constant 2 
(word)
Comparison
608 W>=N AND>=Variable 4 S address D address 2 
(word)
Comparison
High-order
609 D>=H AND>=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
610 D>=D AND>=Decimal (32 5 S address Low-order constant 4  934 934
constant
bits)
Comparison
611 D>=N AND>=Variable (32 4 S address Daddress 4  935 935
bits)
Comparison
612 <H AND<Hexadecimal 4 S address Constant 1 
(byte)
Comparison
613 <D 4 S address Constant 1 
AND<Decimal (byte)
Comparison
614 <N 4 S address Daddress 1 
AND<Variable (byte)
Comparison
615 W<H AND<Hexadecimal 4 S address Constant 2 
(word)
Comparison
616 W<D 4 S address Constant 2 
AND<Decimal (word)
Comparison
617 W<N 4 S address Daddress 2 
AND<Variable (word)
Comparison
High-order
618 D<H AND<Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
619 D<D AND<Decimal (32 5 S address Low-order constant 4  936 936
constant
bits)
8-74
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Comparison
620 D<N AND<Variable (32 4 S address Daddress 4  937 937
bits)
Comparison
621 <=H AND<=Hexadecimal 4 S address Constant 1 
(byte)
Comparison
622 <=D AND<=Decimal 4 S address Constant 1 
(byte)
Comparison
623 <=N AND<=Variable 4 S address Daddress 1 
(byte)
Comparison
624 W<=H AND<=Hexadecimal 4 S address Constant 2 
(word)
Comparison
625 W<=D AND<=Decimal 4 S address Constant 2 
(word)
Comparison
626 W<=N AND<=Variable 4 S address Daddress 2 
(word)
Comparison
High-order
627 D<=H AND<=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
628 D<=D AND<=Decimal (32 5 S address Low-order constant 4  938 938
constant
bits)
Comparison
629 D<=N AND<=Variable (32 4 S address D address 4  939 939
bits)
Comparison
640 =H STR=Hexadecimal 4 S address Constant 1 
(byte)
Comparison
STR=Decimal (byte)
Comparison
STR=Variable (byte)
Comparison
648 W=H STR=Hexadecimal 4 S address Constant 2 
(word)
Comparison
649 W=D STR=Decimal 4 S address Constant 2 
(word)
Comparison
652 W=N STR=Variable 4 S address D address 2
(word)
Comparison
High-order
656 D=H STR=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
657 D=D STR=Decimal (32 5 S address Low-order constant 4  940 940
constant
bits)
Comparison
660 D=N STR=Variable (32 4 S address D address 4 941 941
bits)
Comparison
664 =H OR=Hexadecimal 4 S address Constant 1 
(byte)
ComparisonOR=
Decimal (byte)
Comparison
OR=Variable (byte)
Comparison
672 W=H OR=Hexadecimal 4 S address Constant 2 
(word)
Comparison
673 W=D 4 S address Constant 2 
OR=Decimal (word)
ComparisonOR=
676 W=N 4 S address D address 2
Variable (word)
8-75
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Comparison
High-order
680 D=H OR=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
681 D=D OR=Decimal (32 5 S address Low-order constant 4  942 942
constant
bits)
Comparison
684 D=N OR=Variable (32 4 S address D address 4 943 943
bits)
Comparison
688 <>H STR<>Hexadecimal 4 S address Constant 1 
(byte)
Comparison
689 <>D STR<>Decimal 4 S address Constant 1 
(byte)
Comparison
692 <>N STR<>Variable 4 S address D address 1
(byte)
Comparison
696 W<>H STR<>Hexadecimal 4 S address Constant 2 
(word)
Comparison
697 W<>D STR<>Decimal 4 S address Constant 2 
(word)
Comparison
700 W<>N STR<>Variable 4 S address D address 2
(word)
Comparison
High-order
704 D<>H STR<>Hexadecimal 4 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
705 D<>D STR<>Decimal (32 5 S address Low-order constant 4  944 944
constant
bits)
ComparisonSTR<>
708 D<>N 4 S address D address 4  945 945
Variable (32 bits)
Comparison
712 <>H OR<>Hexadecimal 4 S address Constant 1 
(byte)
Comparison
713 <>D 4 S address Constant 1 
OR<>Decimal (byte)
Comparison
716 <>N 4 S address D address 1
OR<>Variable (byte)
Comparison
720 W<>H OR<>Hexadecimal 4 S address Constant 2 
(word)
Comparison
721 W<>D OR<>Decimal 4 S address Constant 2 
(word)
Comparison
724 W<>N OR<>Variable 4 S address D address 2
(word)
Comparison
High-order
728 D<>D OR<>Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
729 D<>D OR<>Decimal (32 5 S address Low-order constant 4  946 946
constant
bits)
Comparison
732 D<>N OR<>Variable (32 4 S address D address 4  947 947
bits)
Comparison
736 >H STR>Hexadecimal 4 S address Constant 1 
(byte)
Comparison
STR>Decimal (byte)
8-76
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Comparison
740 >N 4 S address D address 1 
STR>Variable (byte)
Comparison
744 W>H STR>Hexadecimal 4 S address Constant 2 
(word)
Comparison
745 W>D 4 S address Constant 2 
STR>Decimal (word)
Comparison
748 W>N 4 S address D address 2 
STR>Variable (word)
Comparison
High-order
752 D>H STR>Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
753 D>D STR>Decimal (32 5 S address Low-order constant 4  948 948
constant
bits)
Comparison
756 D>N STR>Variable (32 4 S address D address 4  949 949
bits)
Comparison
760 >H OR>Hexadecimal 4 S address Constant 1 
(byte)
Comparison
OR>Decimal (byte)
Comparison
764 >N 4 S address D address 1 
OR>Variable (byte)
Comparison
768 W>H OR>Hexadecimal 4 S address Constant 2 
(byte)
Comparison
769 W>D 4 S address Constant 2 
OR>Decimal (word)
Comparison
772 W>N 4 S address D address 2 
OR>Variable (word)
Comparison
High-order
776 D>H OR>Hexadecimal (32 5 S address Low-order constant 4 
constant
bits)
Comparison High-order
777 D>D 5 S address Low-order constant 4  950 950
OR>Decimal (32 bits) constant
Comparison
780 D>N 4 S address D address 4  951 951
OR>Variable (32 bits)
Comparison
784 >=H STR>=Hexadecimal 4 S address Constant 1 
(byte)
Comparison
785 >=D 4 S address Constant 1 
STR>=Decimal (byte)
Comparison
788 >=N 4 S address D address 1 
STR>=Variable (byte)
Comparison
792 W>=H STR>=Hexadecima 4 S address Constant 2 
l(word)
Comparison
793 W>=D 4 S address Constant 2 
STR>=Decimal (word)
Comparison
796 W>=N 4 S address D address 2 
STR>=Variable (word)
Comparison
High-order
800 D>=H STR>=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
801 D>=D STR>=Decimal (32 5 S address Low-order constant 4  952 952
constant
bits)
Comparison
804 D>=N STR>=Variable (32 4 S address D address 4  953 953
bits)
Comparison
808 >=H OR>=Hexadecimal 4 S address Constant 1 
(byte)
Comparison
809 >=D 4 S address Constant 1 
OR>=Decimal (byte)
8-77
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Comparison
812 >=N 4 S address D address 1 
OR>=Variable (byte)
Comparison
816 W>=H OR>=Hexadecimal 4 S address Constant 2 
(word)
Comparison
817 W>=D 4 S address Constant 2 
OR>=Decimal (word)
Comparison
820 W>=N 4 S address D address 2 
OR>=Variable (word)
Comparison
High-order
824 D>=H OR>=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
825 D>=D OR>=Decimal (32 5 S address Low-order constant 4  954 954
constant
bits)
Comparison
828 D>=N OR>=Variable (32 4 S address D address 4  955 955
bits)
Comparison
832 <H STR<Hexadecimal 4 S address Constant 1 
(byte)
Comparison
STR<Decimal (byte)
Comparison
836 <N 4 S address D address 1 
STR<Variable (byte)
Comparison
840 W<H STR<Hexadecimal 4 S address Constant 2 
(word)
Comparison
STR<Decimal (word)
Comparison
844 W<N 4 S address D address 2 
STR<Variable (word)
Comparison
High-order
848 D<H STR<Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
849 D<D STR<Decimal (32 5 S address Low-order constant 4  956 956
constant
bits)
Comparison
852 D<N STR<Variable (32 4 S address D address 4  957 957
bits)
Comparison
856 <H OR<Hexadecimal 4 S address Constant 1 
(byte)
Comparison
OR<Decimal (byte)
Comparison
860 <N 4 S address D address 1 
OR<Variable (byte)
Comparison
864 W<H OR<Hexadecimal 4 S address Constant 2 
(word)
Comparison
OR<Decimal (word)
Comparison
868 W<N 4 S address D address 2 
OR<Variable (word)
Comparison
High-order
872 D<H OR<Hexadecimal (32 5 S address Low-order constant 4 
constant
bits)
Comparison High-order
873 D<D 5 S address Low-order constant 4  958 958
OR<Decimal (32 bits) constant
Comparison
876 D<N 4 S address Daddress 4  959 959
OR<Variable (32 bits)
8-78
Floating
point
Step count
Signed
FUN.
precision
precision
Double
Single
NO.
Comparison
880 <=H STR<=Hexadecimal 4 S address Constant 1 
(byte)
Comparison
881 <=D 4 S address Constant 1 
STR<=Decimal (byte)
Comparison
884 <=N 4 S address D address 1 
STR<=Variable (byte)
Comparison
888 W<=H STR<=Hexadecimal 4 S address Constant 2 
(word)
Comparison
889 W<=D 4 S address Constant 2 
STR<=Decimal (word)
Comparison
892 W<=N 4 S address D address 2 
STR<=Variable (word)
Comparison
High-order
896 D<=H STR<=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
897 D<=D STR<=Decimal (32 5 S address Low-order constant 4  960 960
constant
bits)
Comparison
900 D<=N STR<=Variable (32 4 S address D address 4  961 961
bits)
Comparison
904 <=H OR<=Hexadecimal 4 S address Constant 1 
(byte)
Comparison
905 <=D 4 S address Constant 1 
OR<=Decimal (byte)
Comparison
908 <=N 4 S address D address 1 
OR<=Variable (byte)
Comparison
912 W<=H OR<=Hexadecimal 4 S address Constant 2 
(word)
Comparison
913 W<=D 4 S address Constant 2 
OR<=Decimal (word)
Comparison
916 W<=N 4 S address D address 2 
OR<=Variable (word)
Comparison
High-order
920 D<=H OR<=Hexadecimal 5 S address Low-order constant 4 
constant
(32 bits)
Comparison
High-order
921 D<=D OR<=Decimal (32 5 S address Low-order constant 4  962 962
constant
bits)
Comparison
924 D<=N OR<=Variable (32 4 S address D address 4  963 963
bits)
8-79
8.3.2. Indirect addressing
Indirect address can be used in PC10 mode the same as before.
For a circuit performed conventionally by indirect designation command, it is
recommended to make the circuit visible by substituting index designation.
8.3.2.1. Indirect addressing

The address space of relay/register has three kinds of the following.
Basic register of own program (_****)
Own program register area
File register (B****)
Basic register of other programs (P*-_****)
Other programs register area 1
Enhancing register 1 (E_****, H****)
Other programs register area 2 Enhancing register 2 (G_****)
Enhancing data register area Enhancing data register (U****)
The execution of the sequence program and the referred register are shown as follows
Execution of program
P1 executing P2 executing P3 executing
P1 P2 P3
: M0 P2-M0 : M0 P3-M0 : M0 P1-MO

|-||-----------( )-| |-||-----------( )-| |-||-----------( )-|
: EX0 P3-LO : EX2 P1-L0 : EX1 P2-LO
|-||-----------( )-| |-||-----------( )-| |-||-----------( )-|
: : :
|---------[ U0]-| |---------[ U0]-| |---------[ U0]-|
: : :
Referred register
Own program Other programs Extended data register
Address register area Address register area Address area
0000 P1 P2 P3 0000 Enhancing 0000 Extended data register
3FFF (_****) (_****) (_****) (E_****,H****) (U****)
4000 P1
(P1-_****)
Because of the change of the 8000 P2
execution of the program, the
register of the area changes too. (P2-_****)
C000 P3
FFFF (P3-_****) FFFF
Note) It is an example of one data separate mode 1. Refer since of the following page for the address
map of other modes.
The distinction of three above-mentioned address spaces is never considered at the direct
address specification. When "_****" and the address are specified, the register of the basic area
of the program executing now is accessed. The basic area of another program when specifying,
"P*-_****", the Enhancing arear when specifying, "E_**** and H****", the enhancing data register
area is accessed when specifying, "U****".
8-80
The register which stores indirect addressing should use the register of the area specified by indirect
addressing to distinguish three above-mentioned address spaces at the indirect addressing
specification.
Address indirectly specified Register of storage destination

(1) Indirect addressing in own area _**** Register of own area (_****)
->
B**** (B****)
(2) Indirect addressing in other P*-_**** Register of other areas (P*-_****)
areas 1 E_**** -> 1 (E_****)
H**** (H****)
(3) Indirect addressing in other G_**** Register of other areas (G_****)
->
areas 2 2
(4) Indirect addressing of U**** Enhancing data (U****)
->
enhancing data register register
(1) When you do addressing indirectly compared with the oun area
● To the register of the operand by which indirect addressing is stored, the register of the own area
is used.
● Indirect addressing is specified in the indirect byte address.
(2) When you do addressing indirectly compared with other areas (data area of the extended partition
and another program)
● To the register of the operand by which indirect addressing is stored, the register of the area
specified by indirect addressing is used.
● Indirect addressing is specified in offset + indirect byte address.
The offset value is 0000h in the extended area, 4000h in Program 1, 8000h in Program 2, and
C000h in Program 3.
EX. 8 points (1 byte) of EX000 to EX007 in the extended area are transferred to the lower byte
of Program 2 D0000.
MOVH (EM00W)  (P2-D0100)
The register (EM00W) of extended area The register P2-D0100) of Program 2 is used
is used to designate the extended area to designate the area of Program 2 with
with indirect address. indirect address.
Herein, set in advance indirect byte address 0B00h ( 0000h+0B00h) in the extended area EX000
- EX007 in the extended internal relays (EM00W( EM000 - EM00F) and indirect byte address
A000h (8000h +2000h) of D0000 lower byte in the data register P2-D0100 of Program 2
respectively.
(3) When you do addressing indirectly compared with other areas 2 (data area of the extended partition)
To the register of the operand by which indirect addressing is stored, the register of G_**** is used.
(4) When you do addressing indirectly compared with the enhancing data register area
● To the register of the operand by which indirect addressing is stored, the enhancing data register
is used.
● Indirect addressing is specified in the indirect byte address.
8-81
8.3.2.2. Method of expressing byte address
Where address is expressed with byte address, word address is followed by H, L, being then
expressed with upper byte or lower byte within word data . The addresses in the pit address area
are followed by W for word address, but they are followed by H, L for byte address.
Addresses in the word address area can be used as bit address by adding bit to right end of word
address.
(EX.)
Bit address Word address Byte address
X000 (LSB) (LSB)
X001
X002
X003
X00L Lower byte
X004
X005
Bit X006
address X007 (MSB)
X00W
area X008 (LSB)
(Example) X009
X00A
X00B
X00H Upper byte
X00C
X00D
X00E
X00F (MSB) (MSB)
D0000-0 (LSB) (LSB)
D0000-1
D0000-2
D0000-3
D0000L Lower byte
D0000-4
D0000-5
Word D0000-6
address D0000-7 (MSB)
D0000
area D0000-8 (LSB)
(Example) D0000-9
D0000-A
D0000-B
D000H Upper byte
D0000-C
D0000-D
D0000-E
D0000-F (MSB) (MSB)
Bit address Bit data Byte data Word data
0 0
1 0
2 1
3 0
34h
4 1
5 1
6 0
7 0
1234h
8 0
9 1
A 0
B 0
12h
C 1
D 0
E 0
F 0
h : Indicated with hexadecimal number.
8-82
8.4. Command words
8.4.1. Conventional instruction word
(1) Basic commands

Step
No. Symbol Language Function
number
1 STR 1(2) Computing start (a-contact)
2 STR NOT 1(2) Computing start (b-contact)
3 AND 1(2) Series connection (a-contact)
4 AND NOT 1(2) Series connection (b-contact)
5 OR 1(2) Parallel connection (a-contact)
6 OR NOT 1(2) Parallel connection (b-contact)
7 AND STR 1 Logic interblock series connection
8 OR STR 1 Logic interblock parallel connection
9 OUT 1(2) Coil output
10 SET 1(2) Keep-relay setting
11 RST 1(2) Keep-relay resetting
12 PTS 1(2) Rise differentiation
13 NTS 1(2) Fall differentiation
14 FPS 1 Multi-coil branching start
15 FRD 1 Multi-coil branching
16 FPP 1 Multi-coil branching end
17 FST 1 Unconditional output
18 NOT 1 Condition reversing
19 NOP 1 Non-processing
The parenthesized step number is subject to designation of the data in other area or an extended
area.
8-83
(2) Timer and counter commands
Step Content of
Classification Function Nnemonic Symbol (example)
number computation
T000 10ms timer of 655.35 sec
Direct-design
at setup value
ated 10ms TMRH 4 TMRH K=655.35
timer
T001 10ms timer on which

Indirect-desi
D0100 content is set up
gnated 10ms TMRH 4 TMRH S=D0100 (as a setup value)
timer
Timer 100ms timer of 6553.5
Direct-design T002
sec at setup value
ated 100ms TMR 4 TMR K=6553.5
timer

Indirect-desi
D0101 content is set up
gnated TMR 4 TMR S=D0100 (as a setup value)
100ms timer
Direct-design T004 10ms integrating timer of
T
ated 10ms TMRSH K=123.45 123.45 sec at setup
TMRSH 4
integrating R value
timer
Indirect-desi T005 10ms integrating time on
gnated 10ms T
TMRSH 4 TMRSH S=D0102 which D0102 content is
integrating
Integrating R set up (as a setup value).
timer
timer Direct-design T006 100ms integrating timer
ated 100ms T of 1234.5 sec at setup
TMRS 4 TMRS K=1234.5
integrating value
R
timer
Indirect-desi
T007 100ms integrating time
gnated
T on which D0103 content
100ms TMRS 4 TMRS S=D0103 is set up (as a setup
integrating R
value).
timer
C008 UP-counter of 65535 at a
Direct-design
CK setup value
ated UP CNT 4 CNT K=65535
counter R
UP counter UP-counter on which
Indirect-desi C009
CK D0104 content is set (as
gnated UP CNT 4 CNT S=D0104 a setup value).
counter R
C00A DOWN-counter of 12345

Direct-design
CK at setup value
ated DOWN CNTD 4 CNTD K=12345
counter R
DOWN
counter Indirect-desi C00B DOWN-counter on which
gnated CK D0105 content is set up
CNTD 4 CNTD S=D0105
DOWN (as a setup value)
R
counter
C00C UP-DOWN counter of
Direct-design CK 65535 at setup value
ated CNTH K=65535
CNTH 4 U/D
UP-DOWN
counter
UP-DOWN R
counter C00D UP-DOWN counter on
Indirect-desi CK which D0106 content is
gnated CNTH S=D0106
CNTH 4 U/D set up (as a setup value)
UP-DOWN
counter R
U/D: "EITHER UP-COUNT OR DOWN-COUNT" command input UP-count is executed with
conditional satisfaction and DOWN -count executed with conditional dissatisfaction
8-84
(3) Exclusive extended timer nd counter commands for PC3J
Step Content of
Classification Function Nnemonic Symbol (example)
number computation
10ms timer on which
ET000 content of extended
Extended
ETMRH 3 ETMRH S=H0000 setup value register
10ms timer
H0000 is set as a setup
value
Timer 100ms timer on which
ET001 content of extended
Extended
ETMR 3 ETMR S=H0001 setup value register
100ms timer
H0001 is set as a setup
value
10ms integrating timer
Extended ET002 on which the content of
10ms T
ETMRSH 3 ETMRSH S=H0002 extended setup value
integrating
R register H0002 is set up
timer
Integrating as a setup value
timer 100ms integrating timer
Extended ET003 on which the content of
100ms T
ETMRS 3 ETMRS S=H0003 extended setup value
integrating
R register H0003 is set up
timer
as a setup value
UP-counter on which the
EC004 content of extended
Extended CK
UP counter UP-counter ECNT 3 ECNT S=H0004 setup value register
R H0004 is set up as a
setup value
DOWN-counter on which
Extended EC005 the content of extended
DOWN CK
DOWN-count ECNTD 3 ECNTD S=H0005 setup value register
counter er R H0005 is set up as a
setup value
UP-DOWN counter on
EC006
CK which the content of
UP-DOWN Extended ECNTH S=H0006 extended setup value
UP-DOWN ECNTH 3 U/D
counter register H0006 is set up
counter
R as a setup value
Extended setup value register: Fixed setup value register corresponding to coil address
U/D:"EITHER UP COUNT OR DOWN COUNT" command input -- UP count is executed with
conditional satisfaction and DOWN count executed with conditional dissatisfaction.
8-85
(4) Application commands
(4-1) Contact type application commands

No. Comman
Classification Symbol Function
STR AND OR d word
2 digits 640 576 664 =H =H
Hexa-deci W=H S H
4 digits 648 579 672 W=H
Constant
mal D=H
8 digits 656 582 680 D=H The current flows across
3 digits 641 577 665 =D the contact if S=H, S=K,
=D
= Decimal 5 digits 649 580 673 W=D W=D
D=D
S K S1=S2 upon comparison of
10 digits 657 583 681 D=D register to constant or
Register
8bits 644 587 668 =N register to register.

=N
16bits 652 581 676 W=N W=N S1 S2
D=N
32bits 660 584 684 D=N
2 digits 688 585 712 <>H <>H
Hexa-deci
4 digits 695 588 720 W<>H W<>H S H
Constant
mal D<>H
8 digits 704 591 728 D<>H The current flows across
3 digits 689 586 713 <>D the contact if SH, SK,

<>D
Decimal 5 digits 697 589 721 W<>D W<>D S K S1S2upon comparison of
D<>D
10 digits 705 592 729 D<>D register to constant or
Register
8bits 692 587 716 <>N register to register.

<>N
16bits 700 590 724 W<>N W<>N S1 S2
D<>N
32bits 708 593 732 D<>N
2 digits 736 594 760 >H >H
Hexa-deci W>H
4 digits 744 597 768 W>H S H
mal
Constant
D>H
8 digits 752 600 776 D>H The current flows across
3 digits 737 595 761 >D the contact if S>H, S> K,
>D
> Decimal 5 digits 745 598 769 W>D W>D
D>D
S K S1>S2 upon comparison of
Comparison ( contact type)
10 digits 753 601 777 D>D register to constant or

Register
8bits 740 596 764 >N register to register.

>N
16bits 748 599 772 W>N W>N S1 S2
D>N
32bits 756 602 780 D>N
2 digits 784 603 808 >=H
Hexa-deci >=H
4 digits 792 606 816 W>=H W>=H S H
mal
Constant
D>=H
8 digits 800 609 824 D>=H
The current flows across
3 digits 785 604 809 >=D
> Decimal 5 digits 793 607 817 W>=D
>=D the contact if SH, SK,
S1S2 upon comparison of
= 10 digits 801 610 825 D>=D
W>=D
D>=D
S K
register to constant or
register to register.
Register
8bits 788 605 812 >=N

>=N
16bits 796 608 820 W>=N W>=N S1 S2
D>=N
32bits 804 611 828 D>=N
2 digits 832 612 856 <H <H
Hexa-deci W<H S H
4 digits 840 615 864 W<H
mal
Constant
D<H
8 digits 848 618 872 D<H The current flows across
3 digits 833 613 857 <D the contact if S<H, S< K,
<D
< Decimal 5 digits 841 616 865 W<D W<D
D<D
S K S1<S2 upon comparison of
10 digits 849 619 873 D<D register to constant or
Register
8bits 836 614 860 <N <N register to register.

16bits 844 617 868 W<N W<N S1 S2
D<N
32bits 852 620 876 D<N
2 digits 880 621 904 <=H <=H
Hexa-deci
4 digits 888 624 912 W<=H W<=H S H
Constant
mal D<=H
8 digits 896 627 920 D<=H The current flows across
3 digits 881 622 905 <=D the contact if SH, SK,
< Decimal 5 digits 889 625 913 W<=D
<=D
W<=D S1S2 upon comparison of
= 10 digits 897 628 921 D<=D
D<=D
S K
register to constant or
Register
8bits 884 623 908 <=N register to register.

<=N
16bits 892 626 916 W<=N W<=N S1 S2
D<=N
32bits 900 629 924 D<=N
S,D: Register H: Hexadecimal constant K: Decimal constant
8-86
(4-2) Output type applied commands
Comman
Classification No. Symbol Function
d word
2 digits 100 MOV MOV
Hexadecimal constant WMOV H D
4 digits 101 WMOV Hexadecimal constant H (2,4, 8 digits) ...transferred to D.
transfer DMOV
8 digits 102 DMOV
3 digits 103 MOVP MOVP
BCD constant transfer 5 digits 1 WMOVP WMOVP H D BCD constant H (2, 4, 8 digits)..transferred to D.
DMOVP
10 digits 104 DMOVP
3 digits 105 MOVR MOVR
Decimal constant WMOVR K D
5 digits 7 WMOVR Decimal constant K ( 3, 5, 10 digits) ...transferred to D.
transfer DMOVR
10 digits 106 DMOVR
3 digits 107 MOVQ MOVQ
Octal constant transfer 6 digits 8 WMOVQ WMOVQ Q D Octal constant Q (3, 6, 11 digits) ..transferred to D.
DMOVQ
11 digits 108 DMOVQ
Hexadecimal constant 2 digits 62 MOVT MOVT
WMOT H D1 D2 Hexadecimal constant H (2, 4 digits) ..transferred to D1, D2.
transfer to two destinations 4 digits 110 WMOVT
8bits 90 MOVE MOVE
Direct transfer 16bits 0 WMOVE WMOVE S D S data transferred to D.
DMOVE
Register to register transfer
32bits 111 DMOVE

8bits 74 MOVF MOVF
Indirect transfer WMOVF
16bits 112 WMOVF S D S data is transferred to register which of address is D content.
(1) DMOVF
32bits 113 DMOVF
8bits 75 MOVG MOVG
Indirect transfer WMOVG S D Data in register which of address is S content is transferred to
16bits 114 WMOVG
(2) DMOVG D.
32bits 115 DMOVG
8bits 76 MOVH MOVH
Indirect transfer WMOVH S D Data in register which of address is S content is transferred to
16bits 116 WMOVH
(3) DMOVH register which of address is D content.
32bits 117 DMOVH
Direct transfer BMOV1 S D1 D2 Data in the area which of head address is S is transferred to
8bits 70 BMOV1
(1) the area from D1 up to D2.
Block transfer
Direct transfer 8bits 118 BMOV2 BMOV2 Data of the number indicated with K which of head address is
WBMOV S D K
(2) 16bits 119 WBMOV S are transferred to the area which of head address is D.
8bits 71 BMV1 BMV1 Data in the area which of head address is S1 is transferred to
Indirect transfer WBMV1 S1 D S2 the area which of head address is D content. The content of
16bits 120 WBMV1 S2 is the number of transferred.
8bits 5 DIV DIV
WDIV S1 D S2 S1 data is transferred to address shown with ( address shown
Data distribution 16bits 122 WDIV
DDIV with D + offset value shown with S2 content).
Transfer
32bits 123 DDIV

8bits 72 BDIV Transfers the data of the area wherein the number of data is
BDIV S2 content and which of head address is (S1 address + offset
Block distribution WBDIV S1 D S2
16bits 126 WBDIV value shown with S1 content) to the locations starting at the
address specified by the content of OP2.
8bits 6 PUP PUP The content of address shown with (S1 address + offset value
Data extract 16bits 124 WPUP WPUP S1 S2 D shown with content of S2) is transferred to the address shown
DPUP
with D.
32bits 125 DPUP
8bits 73 BPUP Data in the area which of head address is S1 content and
BPUP wherein the number of data is the content of S2 is transferred
Block extract WBPUP S1 D S2
16bits 127 WBPUP to the area which of head address is the offset value shown
with (D address + content of D).
4bits 53 SXCH
SXCH For 4bit change, upper 4bit and lower 4bit of D1 are changed
8bits 132 XCH XCH D1 D2
Data change WXCH and stored in D2. For 8 and 16bit change, the contents of D1
16bits 2 WXCH and D2 are changed.
DXCH
32bits 133 DXCH
8bits 134 BXCH BXCH Data in the areas which of respective head addresses are D1
Block change WBXCH D1 D2 K and D2 addresses and which are shown with constant K are
16bits 135 WBXCH changed.
JIS C1 C2 D Character addresses C1,C2 (JIS code address) are stored in

JIS Code store 109 JIS
area of 4byte portion from D address.
FIL1 H D1 D2 Hexadecimal 2-digit constant H is stored in the area from

Data fill 1 8bits 77 FIL1
address shown with D1 up to address shown with D2.
8bits 128 FIL2 FIL2 H is transferred to an area wherein head address is S and the
Data fill 2 WFIL H S K
16bits 129 WFIL number of data is K.
The content of S is stored in an area wherein the head
Indirect data fill 1 8bits 78 FILI1 FILI1 S D1 D2 address is D1 content and the number of data is the content of
D2.
8bits 130 FILI2 FILI2 The content of S1 is stored in an area wherein the head
Indirect data fill 2 WFILI S1 D S2 address is the content of D and the number of data is the
16bits 131 WFILI content of S2.
8bits 20 CMOV CMOV
WCMOV S D K Data portion from S address is transferred to the data area
Clear check transfer
16bits 166 WCMOV from D, if data of K portion from D address are all 0.
8bits 21 CLR CLR If data of K portion commencing from S address and data of K
Matched data clear WCLR S D K portion commencing from S address match one another, the
16bits 167 WCLR data of K portion commencing from D is cleared.
REF S D K External input data of Kbyte portion is transferred to an area

External I/O transfer 283 REF
which of head address is D, from S address.
REFO S D K Data of Kbyte portion is transferred to external output which of

External output transfer 284 REFO
head address is D , from S address.
S,D : register H:hexadecimal constant K:Decimal constant Q: Octal constant C: Character constant
8-87
Comman
d word
Register 8bits 144 MOVJ
-> MOVJ
16bits 145 WMOVJ WMOVJ S D The content of S is transferred to File Register D.
File DMOVJ
Transfer
File register Register 32bits 146 DMOVJ

transfer File 8bits 147 MOVK
Register MOVK
16bits 148 WMOVK WMOVK S D The content of File Register S is transferred to D.
-> DMOVK
Register 32bits 149 DMOVK
8bits 168 + +
W+ S1 S2 D The respective contents of S1 and S2 are added and the result
Binary 16bits 92 W+
D+ is stored in D. Data are all handled as binary number.
32bits 169 D+
Add
2digits 177 +P +P
W+P S1 S2 D The respective contents of S1 and S2 are added and the result
BCD 4digits 10 W+P
D+P is stored in D. The data are all handled as BCD.
8digits 178 D+P
8bits 170 - -
W- S1 S2 D The content of S2 from that of S1 and the result is stored in D.
Binary 16bits 93 W-
D- The data are all handled as binary number.
32bits 171 D-
Deduct
2digits 179 -P -P
W-P S1 S2 D The content of S2 is deducted from that of S1 and the result is
BCD 4digits 11 W-P
D-P stored in D. The data are all handled as BCD.
8digits 180 D-P
8bits 172 * * The content of S1 is multiplied by the content of S2. The
Binary 16bits 94 W* W* S1 S2 D result is stored in D. The data are all handled as binary
D* number.
32bits 173 D*
Multiply
2digits 181 *P *P
Arithmetic calculation
W*P S1 S2 D The content of S1 is multiplied by the content of S2. The

BCD 4digits 182 W*P
D*P result is stored in D. The data are all handled as BCD.
8digits 183 D*P
8bits 174 /
/ The content of S1 is divided by that of S2. The quotient is
16bits 95 W/B W/B
Binary S1 S2 D stored in D and the remainder stored in D+1. The data are all
16bits 175 W/ W/
D/ handled asbinary number.
Divide 32bits 176 D/
2digits 184 /P /P The content of S1 is divided by that of S2. The quotient is
BCD 4digits 185 W/P W/P S1 S2 D stored in D and the remainder stored in D+1. The data are all
D/P handled as BCD.
8digits 186 D/P
8bits 195 INC INC
WINC S D After +1 to the content of D, it is compared with the content of
Binary 16bits 63 WINC
DINC S1. The data are handled as binary number.
32bits 196 DINC
Increment
2digits 199 INCP INCP
WINCP S D After +1 to the content of D, it is compared with the content of
4digits 200 WINCP
BCD DINCP S1. The data are handled as BCD.
8digits 201 DINCP
8bits 197 DEC DEC
WDEC D -1 is deducted from the content of D. The data are all
Binary 16bits 64 WDEC
DDEC handled as binary number.
32bits 198 DDEC
Decrement
2digits 202 DECP DECP
WDECP D -1 is deducted from the content of D. The data are all
BCD 4digits 203 WDEC
DDECP handled as BCD.
8digits 204 DDEC
8bits 13 AND AND
WAND S1 S2 D Logical product(AND) of S1 content and S2 content is
Logical product (AND) 16bits 187 WAND
DAND determined. The result is stored in D.
32bits 188 DAND
8bits 14 OR OR
Logic calculation
WOR S1 S2 D Logical sum (OR) of S1 content and S2 content is determined.

Logical sum (OR) 16bits 189 WOR
DOR The result is stored in D.
32bits 190 DOR
8bits 9 NOT NOT
Reverse (NOT) WNOT S D The content of S is reversed (to 0 if each bit is 1 and to 1 if it is
16bits 191 WNOT
DNOT 0.). The result is stored in D.
32bits 192 DNOT
8bits 18 XOR XOR
Exclusive logical sum WXOR S1 S2 D Exclusive logical sum (XOR) of S1 content and S2 content is
16bits 193 WXOR
(XOR) DXOR determined. The result is stored in D.
32bits 194 DXOR
8bits 88 SRH1 SRH1 If a data matching the content of S1 exists between S2 address
Data search 1 WSRH1 S1 S2 S3 and S3 address, CARRY FLAG is turned ON and the position
16bits 89 WSRH1
Search
data is stored in S1+1.

8bits 212 SRH2 SRH2 If an data matching S1 content exists in the area of data
WSRH2 S1 S2 K number designated with K from the address of S2, CARRY
Data search 2 16bits 213 WSRH2
DSRH FLAG is turned and the position data is stored in S1+1 and the
32bits 214 DSRH matched data stored in S2 respectively.
8-88
Comman
d word
Odd 83 MKP1 Most significant bit is set/reset so that the bit number of "1"
MKP1
calculation
Parity bit create S D becomes odd (MKP1) [Even (MKP2)], using the lower 7bits in
MKP2
Parity
Even 81 MKP2 the content of S as "source data". The result is stored in D.

Odd 84 PCH1 PCH1 CARRY FLAG is turned ON unless the bit number of "1" is odd
Parity check PCH2 S
Even 82 PCH2 (PCH1) [even (PCH2)] upon parity check of S content.
BCD -> 2 digits -> 8bits 152 BIN BIN

WBIN S D BCD data stored in S is converted to binary data and,
Conversion to 4 digits -> 16bits 3 WBIN DBIN thereafter, stored in D.
binary data 8 digits -> 32bits 153 DBIN
Binary -> 8bits -> 2 digits 154 BCD BCD
WBCD S D Binary data stored in S is converted to BCD data and,
Conversion to 16bits -> 4 digits 4 WBCD DBCD thereafter, stored in D.
BCD data 32bits -> 8 digits 155 DBCD
Character and numeral data shown with K from the address of
JBIN S D K
JIS ->Conversion to binary data 156 JBIN S are deemed as JIS code and then stored in the area having
D as its head address, after converted to binary number.
The digit number shown with K from the address of S is
Binary data -> Conversion to JIS 157 BJIS BJIS S D K deemed as hexadecimal number and the stored in the area
having D as its head address, after converted to JIS code.
DECO S D The content of S is stored in D, after its lower 4bit was
4 ->16 DECODER 50 DECO
decoded to hexadecimal data.
Conversion
ON bit position, of 16 bits in the S content, is converted to

ENCO S D
16 ->4 DECODER 51 ENCO binary data (two or more ON bits; Priority is given to the lower
bit.) and the converted data is stored in lower 4 bits of D.
Binary 4bit data is converted to 7-segment data, but limited to
SEG S D K the digit number shown with K from the address of S, and the
7-SEGMENT DECODER 52 SEG
converted data is stored in the area which of head address is
D.
Hour, minute, second -> The BCD type data of hour, minute and second which is stored
158 WTIM1 WTIM1 S D in 4 bytes with S on its head is converted to binary data of 0.1
Convert to sec sec unit and the converted data is stored in D.
Sec -> The content of S is deemed as binary data of 0.1 sec unit and
159 WTIM2 WTIM2 S D converted to BCD type data of hour, minute and second. The
Convert to hour, minute, sec converted data is stored in 4 bytes with D on its head.
CDSET S1 S2 D The content of S1 is transferred to register shown with (D
Code conversion Setting 85 CDSET
address +S2 content). The content of S1 is handled as BCD.
CDO1 S1 S2 D The content of register shown with (S2 address +S content ) is
Code conversion Output 1 86 CDO1
transferred to D. The content of S1 is handled as BCD.
BCD data stored in the register shown with (S2 address +S1
Code conversion Output 2 87 CDO2 CDO2 S1 S2 D content) is transferred to D+1 and furthermore transferred to D
after converted to binary data.
Comparison
8bits 17 CP CP Upon comparison of S1 content with S2 content, either one of

Comparison 16bits 12 WCP WCP S1 S2 >, =, < FLAGS is turned ON from the size relation between
DCP the two.
32bits 211 DCP
8bits 136 BSET BSET
Bit set 16bits 137 WBSET WBSET S D D bit is set as designated in S content.
DBSET
32bits 138 DBSET
8bits 139 BRST BRST
WBRST S D
Bit operation
Bit reset 16bits 140 WBRST D bit is reset as designated in S content.

DBRST
32bits 141 DBRST
8bits 54 BPU BUP
WBUP S1 S2 Bit content of S2 which is designated in S1 content is
Bit extract 16bits 142 WBUP
DBUP transferred to CARRY FLAG.
32bits 143 DBUP
8bits 208 SUM SUM
WSUM S D The sum of bits under ON, of bits in S content, is counted and
On bit counter 16bits 209 WSUM
DSUM the result is stored in D.
32bits 210 DSUM
8bits 217 SFR D SFR S content is shifted by 1 bit to the right. The content entered
1 bit right shift 16bits 36 WSFR T WSFR S in D is shifted to most significant bit and the content of least
DSFR significant bit is shifted to CARRY FLAG.
32bits 218 DSFR
8bits 224 BSFR BSFR
n-bit right shift 16bits 225 WBSFR WBSFR S K S content is shifted by designated bit number (K) to the right.
DBSFR
32bits 226 DBSFR
8bits 219 SFL D SFL S content is shifted by 1 bit to the left. the content entered in D
1 bit left shift 16bits 37 WSFL T WSFL S is shifted to most significant bit and the content of least
DSFL significant bit is shifted to CARRY FLAG
32bits 220 DSFL
Shift
8bits 227 BSFL BSFL

n bit left shift 16bits 228 WBSFL WBSFL S K S content is shifted by designated bit number (K) to the left.
DBSFL
32bits 229 DBSFL
8bits 221 SRL D
SRL S content is shifted by 1 bit to the left (L/R=ON) [right
1 bit right/left shift 16bits 222 WSRL L/R WSRL S
T
(L/R=OFF).
32bits 223 DSRL DSRL
8bits 230 BSRL L/R BSRL
n bit right/left shift WBSRL S S content is shifted 1 bit by designated bit number (K) to the
16bits 231 WBSRL T
DBSRL left (L/R=ON) [right )L/R=OFF)].
32bits 232 DBSRL
8-89
Comman
d word
4bits 251 SUP
8bits 252 UP2 SUP Data in area with S on its head address and with data number
UP2 S K designated with K are shifted to upper significant direction.
16bits 253 WUP WUP The least significant data is 0.
Upper significant shift DUP
32bits 254 DUP
Shift
Data in areas from S1 up to S2 are shifted at unit of 1 byte.

8bits 91 UP1 UP1 S1 S2
Least significant data remains unchanged.
4bits 255 SDOWN
SDOWN Data in area with S on its head address and with data number
8bits 256 DOWN DOWN S K
Lower significant shift WDOWN designated with K are shifted to lower significant direction.
16bits 257 WDOWN DDOWN Most significant data is 0.
32bits 258 DDOWN
8bits 160 FIFW FIFW S content is transferred to the address shown with ( offset
Fifo write 16bits 161 WFIFW WFIFW S D1 D2 value shown with D1 address + D2 content). Furthermore, +1
DFIFW is added to D2 content.
32bits 162 DFIFW
8bits 163 FIFR S content is transferred to D2. Data in the area with S as its
FIFR head address and with D1 content as its data number are
Fifo read 16bits 164 WFIFR WFIFR S D1 D2
shifted to lower significant direction. Furthermore, +1 is
FIFO
DFIFR
32bits 165 DFIFR added to D1 content.
The areas from S address up to D address are deemed as
Stack shift input 68 SFIN SFIN S D STACK and the content of S is all stacked. However, 0 is
deemed as "no data".
S content is transferred to D2. The data from D1 address up
Stack shift output 69 SFOUT SFOUT D1 S D2 to S-1 are shifted to upper significant direction. D1 content is
made to 0.
8bits 233 RRC
RRC S content and CARRY FLAG are rotated to the right, by the bit
With carry 16bits 234 WRRC WRRC S K
DRRC number designated with K.
Rotate to 32bits 235 DRRC
right 8bits 242 RR RR
Without WRR S K S content is rotated to the right, by the bit number designated
16bits 243 WRR
carry DRR with K.
32bits 244 DRR
8bits 236 RLC RLC
With S content and CARRY FLAG is rotated to the left, by the bit
16bits 237 WRLC WRLC S K
carry DRLC number designated with K.
Rotate
Rotate to 32bits 238 DRLC

left 8bits 245 RL
Without RL S content is rotated to the left, by the bit number designated
16bits 246 WRL WRL S K
carry DRL with K.
32bits 247 DRL
8bits 239 RLRC L/R RLRC
With WRLRC S content and CARRY FLAG are rotated to the left (L/R =ON)
16bits 240 WRLRC T S
carry DRLRC [right (L/R=OFF), by the bit number designated with K.
Rotate to 32bits 241 DRLRC
right/left 8bits 248 RLR L/R RLR
Without WRLR S S content is rotated to the left (L/R=ON) [right (L/R =OFF)], by
16bits 249 WRLR T
carry DRLR the bit number designated with K.
32bits 250 DRLR
JMP Ln Jumped into label No. Ln.

Jump 272 JMP
CALL Sn Sub routine of label No. Sn is executed and steps following

Sub-routine call 273 CALL
this command example are executed.
Program branching
RET After termination of subroutine, the steps following the CALL

Return from sub routine 464 RET
command which called applicable subroutine are executed.
FOR K This command - NEXT command are repeated K times.

Repeating start 472 FOR
This command - NEXT command are repeated by the

FORN S frequency shown with S content. -1 is deducted from S
Repeating start (indirect) 476 FORN
content whenever executed.
Program from FOR and FORN commands up to this command

Repeating end 480 NEXT NEXT is repeated by the frequency designated with FOR, FORN
commands.
Set 440 MC MC Output command of the master control range from SET up to
Master control MCR K RESET is controlled . Normally controlled if MO command
Reset 444 MCR input is ON and all OFF if the same command input is OFF.
External input ON/OFF information is transferred to Device X
I/O refresh 280 RIO RIO and the ON/OFF information of Device Y is transferred to the
external output unit.
I/O control
RI D K External input data of Kbyte portion is transferred to Device X

Input refresh 281 RI
from the address of D.
RO D K ON/OFF information on Device Y of Kbyte portion is

Output refresh 282 RO
transferred to external output unit from D address,
START Indicating start-up of main sequence program.

Main program start 448 START
END Indicating end of main sequence program.

Main program end 452 END
Label
PEND Indicating end of sequence program including subroutine.

Program end 456 PEND
LABEL Ln Indicating division and jump of sequence program .

Label 460 LABEL
S,D: Register H:Hexadecimal constant K:decimal constant n: Label No.
8-90
Comman
d word
HCR S1 S2 Directly reads internal memory of high speed counter module.

High speed counter data read 316 HCR
HCW S1 S2 H Directly writes data in internal memory of high speed counter

High speed counter data write 317 HCW
module.
Special Module
IOR S1 S2 H Directly reads internal memory of analog module.

Common I/O data read 318 IOR
IOW S1 S2 H Directly writes data in internal memory of analog module.

Common I/O data write 319 IOW
SPR Directly reads internal memory of serial I/O module.

Special module byte data read 304 SPR
Directly write data in internal memory of serial I/O module.

Special module byte data write 306 SPW SPW
Message data and time in the 16Byte area with code H and S
Annunciator 291 ANN ANN H S on its head address are transferred to the annunciator area of
special register.
USC K1 K2 K3 User defined clock 1, 2 in special relay are set up.

User defined clock 293 USC
30 sec correction is made to the built-in clock. Less than 30

Built-in clock 30 sec correction 292 ADJ ADJ sec is rounded off. More than 30 sec is counted up as 1
Others
minute.
Communication speed setting for BAUD K The communication speed for peripheral equipment is
288 BAUD
peripheral equipment changed into the speed designated with K.
STOP Run of sequence program is stopped.

Program stop 287 STOP
WDR The scan time monitor timer is reset.

Scan time reset 46 WDR
8-91
(5) Application instruction added with PC3J
Command
word
Bit data with bit position represented by h1 of S at its head and
Transfer commands
Bit block transfer 121 BBMOV BBMOV Sh1 Dh2 K with points represented by K is transferred to an area with bit
position represented by h2 of D at its head.
4bit 259 STURN Transfer to area with D as its head address in inverse
STURN
Inversion 8bit 260 TURN TURN S D K sequence from last data in data area with S as its head
WTURN address and with points represented by K.
16bit 261 WTURN
Address constant transfer 320 MOVAD MOVAD S D S is stored in D after changed into indirect address.
8bit 323 +H +H After S content and constant H were added, the result is stored
W+H S H D
16bit 324 W+H in D. Data are all handled as binary value.
Binary S content and constant H are added and the result is stored in
32bit 325 D+H D+H S H the address next to S. The data are all handled as binary
Constant number.
addition
2 digits 326 +HP +HP After S content and constant K were added, the result is stored
W+HP S K D
4 digits 327 W+HP in D. The data are all handled as BCD.
BCD
D+HP S K S content and constant K are added and the result is stored in
8 digits 328 D+HP
the address next to S. The data are all handled as BCD.
8bit 329 -H -H After S content and constant H were deducted, the result is
W-H S H D
16bit 330 W-H stored in D. The data are all handled as binary value.
Binary S content and constant H are deducted and the result is stored
32bit 331 D-H D-H S H in the address next to S. The data are all handled as binary
Constant number.
deduction 2 digits 332 -HP -HP After S content and constant K were deducted, the result is
W-HP S K D
Arithmetic computation
4 digits 333 W-HP stored in D. The data are all handled as BCD.
BCD S content and constant K are deducted and the result is stored
8 digits 334 D-HP D-HP S K in the address next to S. The data are all handled as binary
number.
8bit 335 *H *H After S content and constant H were multiplied, the result is
W*H S H D
16bit 336 W*H stored in D. The data are all handled as binary value.
Binary After S content and constant H were multiplied, the result is
32bit 337 D*H D*H S H stored in the address next to S. The data are all handled as
Constant
binary value.
multiplica-tio
2 digits 338 *HP *HP After S content and constant K were multiplied, the result is
n S K D
W*HP stored in D. The data are all handled as BCD.
4 digits 339 W*HP
BCD After S content and constant K were multiplied, the result is
8 digits 340 D*HP D*HP S K stored in the address next to S. The data are all handled as
BCD.
8bit 341 /H After S content and constant H were divided, the result is
/H
W/H S H D stored in D and remainder stored in next address. The data
16bit 342 W/H are all handled as binary value.
Binary
After S content and constant H were divided, the result is
32bit 343 D/H D/H S H stored in address next to S and remainder stored in next next
Constant
address . The data are all handled as binary value.
dividing
2 digits 344 /HP After S content and constant K were divided, the result is
/HP
W/HP S K D stored in D and remainder stored in next address. The data
4 digits 345 W/HP are all handled as BCD.
BCD
After S content and constant K were divided, the result is
8 digits 346 D/HP D/HP S K stored in address next to S and remainder stored in next next
address. The data are all handled as BCD.
8bit 347 ANDH ANDH After logic product (AND) of S content and constant H was
WANDH S H D
16bit 348 WANDH computed, the result is stored in D.
Constant logic product
After logic product(AND) of S content and constant H was
Logic computation
32bit 349 DANDH DANDH S H

computed, the result is stored in address next to S.
8bit 350 ORH ORH After logic sum (OR) of S content and constant H was
WORH S H D
16bit 351 WORH computed,the result is stored in D.
Constant logic sum
After logic sum (OR) of S content and constant H was
32bit 352 DORH DORH S H
computed,the result is stored in address next to S.
8bit 353 XORH XORH After exclusive logic sum (XOR) of S content and constant H
WXORH S H D
Constant exclusive 16bit 354 WXORH was computed, the result is stored in D.
logic sum After exclusive logic sum (XOR) of S content and constant H
32bit 355 DXORH DXORH S H
was computed, the result is stored in address next to S.
8bit 362 STI1 STI1 The sum in data area with S1 as head address and with
Sum 16bit 363 WSTI1 WSTI1 S1 D S2 number represented by S2 content is stored in D. The data
DSTI1 are all handled as binary value.
32bit 364 DSTI1
Statistic processing
8bit 374 MAX MAX

WMAX S1 D S2 Maximum value in data area with S1 as head address and with
Max value retrieval 16bit 375 WMAX
DMAX number represented by S2 content is stored in D.
32bit 376 DMAX
8bit 377 MIN MIN
WMIN S1 D S2 Minimum value in data area with S1 as head address and with
Min value retrieval 16bit 378 WMIN DMIN number represented by S2 content is stored in D.
32bit 379 DMIN
8bit 380 AVE AVE Mean value in data area with S1 as head address and with
WAVE S1 D S2 number represented by S2 content is stored in D. The data are
Mean 16bit 381 WAVE DAVE all handled as binary value and fractions over 4 at first decimal
32bit 382 DAVE point are counted as one.
8-92
Command
word
Subroutine is closed when the conditions are met, and
CRET
Conditional return 285 CRET applicable subroutine is called and executed from step
next toCALL command.
ARIO D K External I/O of Kbyte portion from D address are
Area designated I/O refresh 295 ARIO
Others
refreshed.
Applied command flag clear SYS 4 1 0 Set up so that applied command flag is cleared at
300 SYS
mode setting reading of applied command .
Applied command flag clear Set up so that applied command flag is not cleared at
300 SYS SYS 4 0 0
mode resetting reading of applied command.
SYS Clock adjustment The clock in CPU is adjusted by “the minute second day
instruction (PC3J series 300 SYS SYS 5 S 0 hour year month week” of the 4-word which makes the
ver2.6～) *1 address of S a head.
S,D: Register , H: Hexadecimal constant K:decimal constant
(6) Application instruction added with PC3JG

Command
word
The Indirect address of the buffer register(EB)
register address BRSET S D
371 BRSET specified S is set to the 2 word area with D as the
setting
head address.
Transfer commands
Data in buffer registers which of address is the

Buffer content of 2 word area with S as the head address is
Indirect loading 372 WBR WBR S D K
register transferred to registers with D as the head address.
transfer Size is K.
Registers with S as the head address is transferred to
buffer registers which of address is the content of 2
Indirect saving 373 WBW WBW S D K word area with D as the head address.
Size is K.
Message of the number indicated with H which of
head address is S are tranfered to DLNK-M2
Order the message
indicated with H.
Others
302 MSET MSET H S D

command for DLNK-M2 The response data from DLNK-M2 are trnsfered to
the area which of head address is D.
Commnad of the number indicated with H which of
Order the command for head address is S are tranfered to TOYOPUC-PCS.
370 CSET CSET H S D
TOYOPUC-PCS The response data from TOYOPUC-PCS are
trnsfered to the area which of head address is D.
S, D: Register , H: Hexadecimal constant K:decimal constant
8-93
8.4.2. Application command dedicated to PC10G (Ver 3.00 and over)
8.4.2.1. Timer command (1ms 1s)

Timer command in milliseconds and seconds is added to conventional timer command in 10 and
100 milliseconds.
(1) Difference of timer command in milliseconds

Only for timer command in milliseconds, it is acceptable to perform more than one time in the
same scan.
It enables a program to place a timer command in the loop processing and exit such loop
processing when time is up.
|---------------[Label L0 ]
|--||---------[TIMHH T0 5ms]
T0
|---|/|-------[JMP L0 ]
(2) Timer in seconds

It enables long time timer. Max 65535 seconds, 18h, 12min, 15s.
Timer error: 0.1s
Classifica Step Content of Processing
Function Mnemonic number Symbol (example) time μs
tion computation
T000
Direct-design 1ms timer of 65.535 sec
TMRHH 4 TMRHH K=65.535
ated 1ms timer at setup value
Indirect-desi
TMRHH 4 TMRHH S=D0100 D0100 content is set up
gnated 1ms timer
(as a setup value)
Timer T002
Direct-design 1000ms timer of 6553.5
TMRL 4 TMRL K=65535
ated 1000ms timer sec at setup value
Indirect-desi T003 1000ms timer on which
Gnated 1000ms TMRL 4 TMRL S=D0100 D0101 content is set up
timer (as a setup value)
T004
Direct-design 1ms integrating timer of
T
ated 1ms TMRSHH 4 12.345 sec at setup
TMRSH K=12.345
integrating timer value
R
T005
Indirect-desi gnated 1ms integrating time on
T
1ms integrating TMRSHH 4 which D0102 content is
TMRSH S=D0102
timer set up (as a setup value).
Integrating R
timer T006
Direct-design ated 1000ms integrating timer
T
1000ms integrating TMRSL 4 of 1234.5 sec at setup
TMRS K=12345
timer value
R
T007 1000ms integrating time
Indirect-desi gnated
T on which D0103 content
1000ms integrating TMRSL 4
TMRS S=D0103 is set up (as a setup
timer
R value).
8-94
8.4.2.2. Inversion coil
Coil is added to inverse the output when a condition is satisfied.
It is usually used in pair with edge command.
A B
|----| |------| |----------------------------[/]
A:
B:
Inversion Inversion Inversion
Used for mode switching from programmable indicator, etc.
8.4.2.3. Signed calculation

Designation of signed calculation is made possible for four arithmetic operations and comparison of
BIN type.
This is byte type command,

therefore the highest bit 7
is treated as a sign.
If [Sign(s)] is checked,
signed calculation is enable.
(1) Byte type (8 bits)

The highest bit 7 is treated as a sign. -128 to 127 (80h to 7Fh)
(2) Word type (16 bits)

The highest bit 15 is treated as a sign. -32768 to 32767 (8000h to 7FFFh)
(3) Double-word type (32 bits)

The highest bit 31 is treated as a sign. -2147483648 to 2147483647 (80000000h to 7FFFFFFFh)
In addition command and subtraction command, the result of calculation is the same whether a sign
is attached or not.
However, note that overflow and underflow are operated differently.
No sign (word)
FFFFh + 0001h = 0000h Overflow
Signed (word)
FFFFh + 0001h = 0000h Not overflow
(-1)
In a circuit monitor by PCwin, monitor result is also displayed with sign for signed calculation.
8-95
8.4.2.4. PID command
|--------[PID D0000 D0010 D0020 ]
Format
OP1: Initial address single precision floating point of various parameters
OP2: Deviation input storage address single precision floating point
OP3: PID output storage address single precision floating point
Parameter Table (OP1)

Address Description Remark
OP1+0 mode: Operation mode 0:Position algorithm
1: Speed algorithm
OP1+2 Kp: Proportion coefficient
OP1+4 Ki: Integration coefficient
OP1+6 Kd: Differentiation coefficient
OP1+8 work0: Deviation integration value (Sigma Only under mode=0
ei)
OP1+10 work1: for storing data in the middle of
previous deviation (e1) calculation
OP1+12 work2: only when the difference of Only under mode=1
previous deviation (e1 - e2)
OP1+14 work3: reservation
Ki = Kp* (Ts/Ti)
Kd = Kp*(Td/Ts)
Ti = Integration time
Ts = Sampling cycle (constant cycle interruption interval)
Td = Differentiation time
Position algorithm=0: Mp= Kp*e0 + Ki*Σ ei + Kd* (e0 - e1)

Speed algorithm=1: Mp+ = Kp*(e0-e1) + Ki*e0 + Kd*((e0-e1) - (e1-e2))
e0: This deviation

e1: Previous deviation
e2: Deviation before previous deviation
Mp: PID output (operation quantity)
It is a command for executing basic calculation formula, and is used for PID control.
It does not have a function such as auto tuning.
This command is executable only during constant cycle interruption.

Interval of constant cycle interruption, as it is, is the sampling cycle.
8-96
8.4.2.5. Floating point command
Select floating point

command.
Select the decimal point

from “Float” or “Double(d)”.
8.4.2.5.1. Floating point command list
Mnemonic Description Single Double Caution in calculating floating

precision precision
point
FD+ Addition (floating point)  
How to use register
FD- Subtraction (floating point))   Single precision: From
FD* Multiplication (floating point)   even-number address of register
FD/ Division (floating point)   Ex: D0000 designation
D000 and D001
FD+FH Constant addition (floating point)  
Designation from
FD-FH Constant subtraction (floating point)   odd-number address is
FD*FH Constant multiplication (floating point)   prohibited.
FD/FH Constant division (floating point)  
Double precision: From 4-word
FDSTI1 ΣX (floating point)  
boundary of register
FDMAX Maximum value retrieval (floating point)   Ex: D000 designation
FDMIN Minimum value retrieval (floating point)   D000, D001, D002, and
FDAVE Average (floating point)  
D003
Enabled only when the
FDMOVR Decimal constant transfer (floating point)  
lowest digit is 0, 4, 8, and C
FFLT BIN16 -> floating point  
FDFLT BIN32 -> floating point  
FINT Floating point -> BIN16  
FDINT Floating point -> BIN32   Data format is pursuant to
FVAL Character string -> floating point   IEEE754.
Single precision: 32 bits
FSTR Floating point -> Character string  
Double precision: 64 bits
F=FD Comparison AND = decimal (floating point)  
F=FN Comparison AND = variable (floating point)  
F<>FD Comparison AND<>decimal (floating point)  
F<>FN Comparison AND<>variable (floating point)  
F>FD Comparison AND>decimal (floating point)  
F>FN Comparison AND>variable (floating point)  
F>=FD Comparison AND>=decimal (floating point)  
F>=FN Comparison AND>=variable (floating point)  
F<FD Comparison AND<decimal (floating point)  
F<FN Comparison AND<variable (floating point)  
F<=FD Comparison AND<=decimal (floating point)  
F<=FN Comparison AND<=variable (floating point)  
8-97
F=FD Comparison STR=decimal (floating point)  
F=FN Comparison STR=variable (floating point)  
F=FD Comparison OR=decimal (floating point)  
F=FN Comparison OR=variable (floating point)  
F<>FD Comparison STR<>decimal (floating point)  
F<>FN Comparison STR<>variable (floating point)  
F<>FD Comparison OR<>decimal (floating point)  
F<>FN Comparison OR<>variable (floating point)  
F>FD Comparison STR>decimal (floating point)  
F>FN Comparison STR>variable (floating point)  
F>FD Comparison OR>decimal (floating point)  
F>FN Comparison OR>variable (floating oint)  
F>=FD Comparison STR>=decimal (floating point)  
F>=FN Comparison STR>=variable (floating point)  
F>=FD Comparison OR>=decimal (floating point)  
F>=FN Comparison OR>=variable (floating point)  
F<FD Comparison STR<decimal (floating point)  
F<FN Comparison STR<variable (floating point)  
F<FD Comparison OR<decimal (floating point)  
F<FN Comparison OR<variable (floating point)  
F<=FD Comparison STR<=decimal (floating point)  
F<=FN Comparison STR<=variable (floating point)  
F<=FD Comparison OR<=decimal (floating point)  
F<=FN Comparison OR<=variable (floating point)  
DEG Radian -> Angle  

RAD Angle -> Radian  
SIN Sine  
COS Cosine (COS)  
TAN Tangent (TAN)  
ASIN Arosine (ASIN)  
ACOS Arocosine (ACOS)  
ATAN Arotangent (ATAN)  
SQR Square root (SQRT)  

POW Power (POW)  
EXP Exponential calculation (EXP)  
LOGE Logarithmic calculation (LOGe)  
LOG10 Logarithmic calculation (LOG10)  
8-98
8.4.2.5.2. Internal Expression of Floating point number
(1) Internal expression of floating point number conforms to standard format of IEEE.
(a) Float type
31 30 23 22 0
Exponential part Significand (23 bits)

(8 bits)
Sign part (1 bit)
(b) Double type and long double type
63 62 52 51 0
Exponential part (11 bits) Significand (52 bits)
Sign part (1 bit)
(2) The meaning of each component of internal expression is shown below:

1. Sign part
Sign of floating point number. It is positive for 0, and negative for 1.
2. Exponential part
Exponent of floating point decimal number is indicated by power.
3. Significand
Data corresponding to significant figure of floating point number
(3) Type of value to be expressed

Floating point number is capable of expressing an infinite number in addition to normal real number.
The type of value expressed by floating point number is shown below:
1. Normalized value
When the exponential part is not 0 or all bits are not 1. Represents a normal real number
value.
2. Un-normalize value
When the exponential part is 0, and significand is not 0. Represents a small real value with
small absolute value.
3. Zero
When the exponential part and significand are 0. Represents a value 0.0.
4. Infinity
When the exponential part is 1 in all bits and significand is 0. Represents infinity.
5. Nonnumeric
When the exponential part is 1 in all bits and significand is not 0. It is obtained as a result of
calculation in which the result does not correspond to numeric value, such as "0.0/0.0", "/",
and "-".
8-99
8.4.2.5.3. Data format detail of floating point number command
(a) Float type
1. Normalized value
Sign part is 0 (positive) or 1 (negative), which represents the sign of a value.
The exponential part takes a value 1~254(28-2). Actual exponent is a value obtained by subtracting
127 from this value, and ranges from -126 to 127.
Significand takes a value 0~223-1. Actual significand is interpreted assuming the bit of 223 at 1 and
decimal point directly after.
The value represented by normalized number is
(-1)<sign part> x 2<exponential part>127 x (1 +<significand> x 2-23)
Ex:
31 30 23 22 0
0 10000010 01100000000000000000000
Sign: +
Exponent: 10000010(2)-127= 3 (2) represents a binary number.
Significand: 1.011(2)= 1.375
Value: 1.37523= 11
2. Un-normalized value
Exponential part is 0 and actual significand is -126.
Significand is 1~223 -1, and actual significand is interpreted assuming the bit of 223 at 0 and decimal
point directly after.
The value expressed by un-normalized number is
(-1)<sign part> x 2-126 x (<significand> x 2-23)
Ex:
31 30 23 22 0
0 00000000 01100000000000000000000
Sign: +
Exponent: -126 (2) represents a binary number.
Significand: 0.011(2)=0.375
Value: 0.3752-126
3. Zero
Sign part is either 0 (positive) or 1 (negative), respectively showing +0.0 and -0.0.
Exponential part and significand are both 0.
+0.0 and -0.0 both represent 0.0 as a value.
4. Infinity
Sign part is either 0 (positive) or 1 (negative), respectively showing + infinity and - infinity.
Exponential part is 255(28-1).
Significand is 0.
5. Nonnumeric
Significand part is a value other than 0.
8-100
(b) doubletype and long doubletype
1. Normalized value
The exponential part takes a value 1~2046(211-2). Actual exponent is a value obtained by subtracting
1023 from this value, and ranges from -1022 to 1023.
Significand takes a value 0~252-1, and actual significand is interpreted assuming the bit of 252 at 1
and decimal point directly after.
The value represented by normalized number is
(-1)<sign part> x 2<exponential part>1023 x (1 + <significand> x 2-52)
Ex:
63 62 52 51 0
0 01111111111 0111000000000000000000000000000000000000000000000000
Sign: +
Exponent: 1111111111(2)-1023=0 (2) represents a binary number.
Significand: 1.0111(2)=1.4375
Value: 1.4375×20=1.4375
2. Un-normalized value
Exponential part is 0 and actual significand is -1022.
Significand is 1~223 -1, and actual significand is interpreted assuming the bit of 223 at 0 and decimal
point directly after.
The value expressed by un-normalized number is
(-1)<sign part> x 2-126 x (<significand> x 2-23)
Ex:
63 62 52 51 0
1 00000000000 1110000000000000000000000000000000000000000000000000
Sign: -
Exponent: -1022
Significand: 0.0111(2)=0.4375 (2) represents a binary number.
Value: 0.43752-1022
3. Zero
Sign part is either 0 (positive) or 1 (negative), respectively showing +0.0 and -0.0.
Exponential part and significand are both 0.
+0.0 and -0.0 both represent 0.0 as a value.
4. Infinity
Sign part is either 0 (positive) or 1 (negative), respectively showing + infinity and - infinity.
Significand is 0.
5. Nonnumeric
Significand part is a value other than 0.
8-101
8.4.2.5.4. Four arithmetic operations specification of floating point number command
1. How to round a value of result
When a correct value resulting from four arithmetic operations of floating point exceeds the
significant figure of significand of internal expression, follow the rule below for rounding.
[1] Round the resulting value toward the nearer internal expression of approximate two floating point
numbers.
[2] When the resulting value is just in the middle of approximate two floating point numbers, round
the value in a direction where the last digit of significand is 0.
2. Processing of overflow, underflow, and ineffective calculation

Overflow, underflow, and ineffective calculation in execution are processed as follows:
[1] For overflow, the result is infinite in positive or negative according to the sign.
[2] For underflow, the result is zero in positive or negative according to the sign.
[3] Ineffective calculation occurs when the infinity with reverse sign is added, when the infinity with
the same sign is subtracted, when zero and infinity are multiplied, and when zero is divided by zero
or infinity is divided by infinity. In this case, the result is nonnumeric.
3. Caution on calculation of special value (zero, infinite, or nonnumeric)

[1] The sum of positive zero and negative zero is positive zero.
[2] Difference between zeroes of the same sign is positive zero.
[3] Result of calculation containing nonnumeric in either or both of operands is always nonnumeric.
[4] Positive zero and negative zero are treated to be equal in comparative calculation.
8-102
8.4.2.5.5. Lineup on data register of floating point number command
Single precision
D0000 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
D0001 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Always start with even-number address.
Double precision
D0000 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
D0001 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
D0002 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
D0003 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
Always start with quadruple number address.
8-103
8.4.2.5.6. How to use
Floating point addition Single precision/Double precision
(Hexadecimal)
Mnemonic FD+ FUN_No. 556 22C
Number of steps 9 steps

Index designation Data type
Operand OP1 Augend data Register address Allowed Single precision/Double
precision
OP2 Added data Register address Allowed Single precision/Double
precision
OP3 Calculation Register address Allowed Single precision/Double
result precision
Destination Allowed Area

T X ET EX GX G
P V K
L M S N R D JL JS EP EV EK EL EM ES H EN GS GZ GF U EB FR
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
JL, JS, GS, GZ, and GF are system area, which is prohibited for use by users.
FR area is a flash register, and returns to the original value when power is turned off or reset.
Index addition and subtraction when designating the index and pre/post
Single precision Double precision
++IX --IX IX++ IX-- ++IX --IX IX++ IX--
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +4 -4 +4 -4 OP3 +8 -8 +8 -8
Address designation rule Example

Single precision : 4-byte boundary even-number address of register D000,D002,D004,D006,-----
Double precision : 8-byte boundary quadruple number address of D000,D004,D008,D00C,------
register
When rule-violating address is designated, it is automatically corrected in calculation.
Function Floating point addition OP1 + OP2 -> OP3

--------[ FD+ D000 + D002 -> D004 ] Single precision
--------[ (d)FD+ D000 + D004 -> D008 ] Double precision
Flag output by calculation result

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
  
Err (V50) : Nonnumeric

Z (V54) : +0,-0
CY (V56) : +,-
Calculation result
Augend data
0 Numeric + - Nonnumeric
0 0 Numeric + - ERR
Numeric Numeric *1 + - ERR
+ + + + ERR ERR
- - - ERR - ERR
Nonnumeric ERR ERR ERR ERR ERR
*1 : 0 or numeric or + or -
8-104
Floating point minuend Single precision/Double precision
(Hexadecimal)
Mnemonic FD- FUN_No. 557 22D

Operand OP1 Minuend data Register address Allowed Single precision/Double
precision
OP2 Subtraction data Register address Allowed Single precision/Double
precision
OP3 Calculation result Register address Allowed Single precision/Double
precision

T X ET EX GX G
P V K
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +4 -4 +4 -4 OP3 +8 -8 +8 -8

register
Function Floating pointminuend OP1 - OP2 -> OP3
--------[ FD ｰ D000 - D002 -> D004 ] Single precision

--------[ (d)FD- D000 - D004 -> D008 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
  
Z (V54) : +0, -0
CY (V56) : +, -
Calculation result
Minuend data
+ + + ERR - ERR
- - - + ERR ERR
*1 : 0 or Numeric or + or -
8-105
Floating point multiplication Single precision/Double precision
(Hexadecimal)
Mnemonic FD* FUN_No. 558 22E

Operand OP1 Multiplicand data Register address Allowed Single precision/Double
precision
OP2 Multiplication data Register address Allowed Single precision/Double
precision
precision

T X ET EX GX G
P V L K M S N R D JL JS EP EV EK EL EM ES H EN GS GZ GF U EB FR
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +4 -4 +4 -4 OP3 +8 -8 +8 -8

register
Function Floating point multiplication OP1 * OP2 -> OP3
--------[ FD* D000 * D002 -> D004 ] Single precision

--------[ (d)FD* D000 * D004 -> D008 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
  

Z (V54) : +0, -0
CY (V56) : +, -
Calculation result
Multiplicand data
0 Numeric + -∞ Nonnumeric
0 0 0 ERR ERR ERR
Numeric 0 *1 +/- +/- ERR
+ ERR +/- + - ERR
- ERR +/- - + ERR
8-106
Floating point division Single precision/Double precision
(Hexadecimal)
Mnemonic FD- FUN_No. 559 22F

Operand OP1 Dividend data Register address Allowed Single precision/Double
precision
OP2 Division data Register address Allowed Single precision/Double
precision
precision

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +4 -4 +4 -4 OP3 +8 -8 +8 -8

register
Function Floating pointdivision OP1 / OP2 -> OP3
--------[ FD-/ D000 / D002 -> D004 ] Single precision

--------[ (d)FD/ D000 / D004 -> D008 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
   

Z (V54) : +0, -0
CY (V56) : +, -
Calculation result
Dividend data
0 ERR +/- + - ERR
Numeric 0 *1 +/- +/- ERR
+ 0 *2 0 ERR ERR ERR
- 0 *2 0 ERR ERR ERR
*2 : Result of underflow
8-107
Floating point Constant Addition Single precision/Double precision
(Hexadecimal)
Mnemonic FD+FH FUN_No. 560 230

Operand OP1 Augend data Register address Allowed Single precision/Double
precision
OP2 Added data Constant Not allowed Single precision/Double
number precision
OP3

T X ET EX GX G
P V K
C Y EC EY GY M
OP1                               
OP2
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 OP2
OP3 OP3

register
Function Floating point Constant addition The next resister of OP1 + OP2 -> OP1
--------[ FD+FH D000 + 0.1 ] Single precision (Output to D002)

--------[ (d)FD+FH D000 + 0.2 ] Double precision (Output to D004)

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
  

Z (V54) : +0, -0
CY (V56) : +, -
Calculation result
Augend data
0 Numeric +∞ -∞ Nonnumeric
+
-
Nonnumeric
8-108
Floating point Constant Subtraction Single precision/Double precision
(Hexadecimal)
Mnemonic FD-FH FUN_No. 561 231

Operand OP1 Minuend data Register address Allowed Single precision/Double
precision
OP2 Subtraction Constant Not allowed Single precision/Double
data number precision
OP3

T X ET EX GX G
P V K
C Y EC EY GY M
OP1                               
OP2
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 OP2
OP3 OP3

register
Function Floating point Constant Subtraction The next resister of OP1 - OP2 -> OP
--------[ FD-FH D000 – 0.1 ] Single precision (Output to D002)

--------[ (d)FD-FH D000 – 0.2 ] Double precision (Output to D004)

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
  

Z (V54) : +0, -0
CY (V56) : +, -
Calculation result
Minuend data
+
-
Nonnumeric
8-109
Floating point Constant multiplication Single precision/Double precision
(Hexadecimal)
Mnemonic FD*FH FUN_No. 562 232
Number of steps 9steps

Operand OP1 Multiplicand data Register address Allowed Single precision/Double
precision
OP2 Multiplication data Constant Not allowed Single precision/Double
number precision
OP3

T X ET EX GX G
P V K
C Y EC EY GY M
OP1                               
OP2
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 OP2
OP3 OP3

register
Function Floating point Constant multiplication The next resister of OP1 * OP2 -> OP1
--------[ FD*FH D000 * 0.1 ] Single precision (Output to D002)

--------[ (d)FD*FH D000 * 0.2 ] Double precision (Output to D004)

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
  

Z (V54) : +0, -0
CY (V56) : +, -
Calculation result
Multiplicand data
0 0 0 ERR ERR ERR
Numeric 0 *1 +/- +/- ERR
+
-
Nonnumeric
8-110
Floating point Constant division Single precision/Double precision
(Hexadecimal)
Mnemonic FD/FH FUN_No. 563 233

Operand OP1 Dividend data Register address Allowed Single precision/Double
precision
OP2 Division data Constant Not allowed Single precision/Double
number precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 OP2
OP3 OP3

Double precision : 8-byte boundary quadruple number D000,D004,D008,D00C,------
address of register
Function Floating point Constant division The next resister of OP1 / OP2 -> OP1
--------[ FD/FH D000 / 0.1 ] Single precision (Output to D002)

--------[ (d)FD/FH D000 / 0.2 ] Double precision (Output to D004)

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
   

Z (V54) : +0, -0
CY (V56) : ＋, -
Calculation result
Dividend data
0 Numeric +∞ -∞ Nonnumeric
0 ERR +/- + - ERR
Numeric 0 *1 +/- +/- ERR
+
-
Nonnumeric
8-111
Floating point Sum Single precision/Double precision
(Hexadecimal)
Mnemonic FDSTI1 FUN_No. 564 234

Operand OP1 Initial address Register address Allowed Single precision/Double
precision
precision
OP3 Data quantity Register address Allowed BIN16bit

T X ET EX GX G
P V L KM S N R D JL JS EP EV EK EL EM ES H EN GS GZ GF U EB FR
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +2 -2 +2 -2 OP3 +2 -2 +2 -2

register
Function Floating point sum: Total sum of area data with initial address OP1 is output to OP2. Data
quantity is the registered value of OP3 (BIN value).
--------[ FDSTI1 D000 -> D100 D104 ] Single precision

--------[ (d)FDSTI1 D000 -> D200 D204 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF OFF  
Err (V50) : Nonnumeric or greater than data quantity 8192

Z (V54) : +0, -0
CY (V56) : +, -
Calculation result
Augend data
+ + + + ERR ERR
- - - ERR - ERR
8-112
Floating point Maximum Single precision/Double precision
(Hexadecimal)
Mnemonic FDMAX FUN_No. 565 235

Operand OP1 Initial Register address Allowed Single
address precision/Double
precision
OP2 Calculation Register address Allowed Single
result precision/Double
precision
OP3 Data Register address Allowed BIN16bit
quantity

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +2 -2 +2 -2 OP3 +2 -2 +2 -2

address of register
Function Retrieval for floating point maximum: Retrieves the maximum from data of area having the
initial address OP1, and outputs to OP2. Data quantity is the resistered value of OP3.（BIN
value）.
--------[ FDMAX D000 -> D100 D104 ] Single precision

--------[ (d)FDMAX D000 -> D200 D204 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF OFF  

Z (V54) : +0, -0
CY (V56) : +, +
8-113
Floating point Minimum Single precision/Double precision
(Hexadecimal)
Mnemonic FDMIN FUN_No. 566 236

precision
OP2 Calculatio Register address Allowed Single
n result precision/Double
precision
quantity

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +2 -2 +2 -2 OP3 +2 -2 +2 -2
Address designation Example

rule
Single : 4-byte boundary even-number address D000,D002,D004,D006,-----
precision of register
Double : 8-byte boundary quadruple number D000,D004,D008,D00C,------
precision address of register
Function Retrieval for floating point minimum: Retrieves the minimum from data of area having the initial
address OP1, and outputs to OP2. Data quantity is the resistered value of OP3（BIN value）.
--------[ FDMIN D000 -> D100 D104 ] Single precision

--------[ (d)FDMIN D000 -> D200 D204 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF OFF  

Z (V54) : +0, -0
CY (V56) : +, +
8-114
Floating point average Single precision/Double precision
(Hexadecimal)
Mnemonic FDAVE FUN_No. 567 237

precision
OP2 Calculatio Register address Allowed Single
n result precision/Double
precision
quantity

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +2 -2 +2 -2 OP3 +2 -2 +2 -2

address of register
Function Floating point average: Average of area having the initial address OP1 is output to OP2. Data
quantity is the register value of OP3 (BIN value).
--------[ FDAVE D000 -> D100 D104 ] Single precision

--------[ (d)FDAVE D000 -> D200 D204 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
   

Z (V54) : +0, -0
CY (V56) : +, -
8-115
Decimal constant transfer Single precision/Double precision
(Hexadecimal)
Mnemonic FDMOVR FUN_No. 569 239

Operand OP1 Transfer data Constant Allowed Single precision/Double
number precision
OP2 Transfer destination Register address Allowed Single precision/Double
precision
OP3

T X ET EX GX G
P V K L M S N R D JL JS EP EV EK EL EM ES H EN GS GZ GF U EB FR
C Y EC EY GY M
OP1
OP2                               
OP3
OP1 OP1
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function Floating point decimal constant transfer Floating point constant is transferred to OP2 register.
--------[ FDMOVR 0.1 -> D100 ] Single precision

--------[ (d)FDMOVR 0.2 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
8-116
BIN16->Floating point Single precision/Double precision
(Hexadecimal)
Mnemonic FFLT FUN_No. 570 23A

Operand OP1 Conversion source Register address Allowed BIN16bit
OP2 Conversion Register address Allowed Single
destination precision/Double
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +2 -2 +2 -2 OP1 +2 -2 +2 -2
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function BIN16-> Floating point: Signed 16-bit binary data of OP1 register is converted into floating
point and output to OP2 register.
--------[ FFLT D000 -> D100 ] Single precision

--------[ (d)FFLT D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err

8-117
BIN32->Floating point Single precision/Double precision
(Hexadecimal)
Mnemonic FDFLT FUN_No. 571 23B

Operand OP1 Conversion source Register address Allowed BIN32bit
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +4 -4 +4 -4
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function BIN32-> Floating point: Signed 32-bit binary data of OP1 register is converted into floating
point and output to OP2 register.
--------[ FDFLT D000 -> D100 ] Single precision

--------[ (d)FDFLT D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err

8-118
Floating point->BIN16 Single precision/Double precision
(Hexadecimal)
Mnemonic FINT FUN_No. 572 23C

Operand OP1 Conversion source Register address Allowed Single
precision/Double
precision
OP2 Conversion Register address Allowed BIN16bit
destination
OP3

T X ET EX GX G
P V K
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +2 -2 +2 -2 OP2 +2 -2 +2 -2
OP3 OP3

Single precision : 4-byte boundary even-number address of D000,D002,D004,D006,-----
register
register
Function Floating point-> BIN16: Integer of floating point data of OP1 register is converted into BIN, and
output to OP2 register.
--------[ FINT D000 -> D100 ] Single precision Example -3.5 -> -3
--------[ (d)FINT D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
 OFF  

Z (V54) : +0, -0
CY (V56) : Other than -32768~32767 (Out of range)
8-119
Floating point->BIN32 Single precision/Double precision
(Hexadecimal)
Mnemonic FDINT FUN_No. 573 23D

precision/Double
precision
OP2 Conversion Register address Allowed BIN32bit
destination
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +4 -4 +4 -4
OP3 OP3

rule
register
Function Floating point-> BIN16: Integer of floating point data of OP1 register is converted into BIN, and
output to OP2 register.
--------[ FDINT D000 -> D100 ] Single precision Example -3.5 -> -3
--------[ (d)FDINT D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
 OFF  

Z (V54) : +0, -0
CY (V56) : Other than -2147483648~2147483647 (Out of range)
8-120
Character string ->Floating point Single precision/Double precision
(Hexadecimal)
Mnemonic FVAL FUN_No. 574 23E

Operand OP1 Conversion source Register address Allowed ASCII
precision
OP3 Number Constant Decimal
of number number
character
s

T X ET EX GX G
P V K
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +2 -2 +2 -2 OP1 +2 -2 +2 -2
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

address of register
Function ASCII-> Floating point: ASCII character string (for data quantity of OP3) starting from the low
order of OP1 register is converted into floating point and output to OP2.
--------[ FVAL D000 -> D100 8d ] Single precision

--------[ (d)FVAL D000 -> D200 8d ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
 OFF  
Err (V50) : Inconvertible data quantity above 256

Z (V54) :0
CY (V56) : Overflow
8-121
Floating point->Character string Single precision/Double precision
(Hexadecimal)
Mnemonic FSTR FUN_No. 575 23F

Operand OP1 Conversion source Register address Allowed Single precision/Double
precision
OP2 Conversion destination Register address Allowed ASCII
OP3 Number of characters Constant Decimal number
number

T X ET EX GX G
P V LK M S N R D JL JS EP EV EK EL EM ES H EN GS GZ GF U EB FR
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +2 -2 +2 -2 OP2 +2 -2 +2 -2
OP3 OP3

register
Function Floating point -> Character string: Data of OP1 register as floating point data is converted into
ASCII, and output to OP2 register for the number of digits of OP3.
When the number of digits of OP3 is "0000", exponential expression is
used.
--------[ FSTR D000 -> D100 8d ] Single precision
--------[ (d)FSTR D000 -> D200 8d ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF OFF OFF 
Err (V50): Nonnumeric digit count shortage data quantity above 256
Conversion specification: When designated number of characters of OP3 is smaller than 16, the
number of digits below decimal point is 6.
When designated number of characters of OP3 is 16 or above, the
number of digits below decimal point is 12.
When designated number of characters of OP3 is 0, exponential
expression is used.
When converted data is greater than the designated number of characters,
FUN error occurs.
When the number of characters is 5 for 123456, an error occurs.
1.234 in the case of 1.23456
Converted data is rounded.
8-122
Radian -> Angle Single precision/Double precision
(Hexadecimal)
Mnemonic DEG FUN_No. 985 3D9

precision/Double
precision
OP2 Conversion destination Register address Allowed Single
precision/Double
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function Radian -> Angle: Floating point radian of OP1 register is converted into floating point angle,
and output to OP2 register.
--------[ DEG D000 -> D100 ] Single precision

--------[ (d)DEG D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
 OFF  
8-123
Angle -> Radian Single precision/Double precision
(Hexadecimal)
Mnemonic RAD FUN_No. 986 3DA

precision/Double
precision
precision/Double
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

rule
register
Function Angle -> Radian: Floating point angle of OP1 register is converted into floating point radian,
and output to OP2 register.
--------[ RAD D000 -> D100 ] Single precision

--------[ (d)RAD D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
   
8-124
SIN Single precision/Double precision
(Hexadecimal)
Mnemonic SIN FUN_No. 987 3DB

precision/Double
precision
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function SIN SIN (sine) is output to OP2 register with OP1 register floating point radian.
--------[ SIN D000 -> D100 ] Single precision

--------[ (d)SIN D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF   
8-125
COS Single precision/Double precision
(Hexadecimal)
Mnemonic COS FUN_No. 988 3DC

precision/Double
precision
precision/Double
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
Single Double
precision precision
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function COS COS (cosine) is output to OP2 register with OP1 register floating point radian.
--------[ COS D000 -> D100 ] Single precision

--------[ (d)COS D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF   
8-126
TAN Single precision/Double precision
(Hexadecimal)
Mnemonic TAN FUN_No. 989 3DD

precision/Double
precision
precision/Double
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function TAN TAN (tangent) is output to OP2 register with OP1 register floating point radian.
--------[ TAN D000 -> D100 ] Single precision

--------[ (d)TAN D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
   
8-127
ASIN Single precision/Double precision
(Hexadecimal)
Mnemonic ASIN FUN_No. 990 3DE

precision/Double
precision
precision/Double
precision
OP3

T X ET EX E GX G
P V L KM S N R D JL JS EP EV EK EL ES H EN GS GZ GF U EB FR
C Y EC EY M GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function ASIN Radian value is output to OP2 register with OP1 register floating point sine value.
--------[ ASIN D000 -> D100 ] Single precision

--------[ (d)ASIN D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF   
8-128
ACOS Single precision/Double precision
(Hexadecimal)
Mnemonic ACOS FUN_No. 991 3DF

precision/Double
precision
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function ACOS Radian value is output to OP2 register with OP1 register floating point cosine
value.
--------[ ACOS D000 -> D100 ] Single precision

--------[ (d)ACOS D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF   
8-129
ATAN Single precision/Double precision
(Hexadecimal)
Mnemonic ATAN FUN_No. 992 3E0

precision/Double
precision
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function ATAN Radian value is output to OP2 register with OP1 register floating point tangent
value.
--------[ ATAN D000 -> D100 ] Single precision

--------[ (d)ATAN D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF   
8-130
Square root Single precision/Double precision
(Hexadecimal)
Mnemonic SQR FUN_No. 993 3E1

Operand OP1 Conversi Register address Allowed Single
on source precision/Double
precision
OP2 Conversi Register address Allowed Single
on precision/Double
destinatio precision
n
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function Square root Square root of OP1 register is output to OP2 register.
--------[ SQR D000 -> D100 ] Single precision

--------[ (d)SQR D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
OFF   
8-131
Power Single precision/Double precision
(Hexadecimal)
Mnemonic POW FUN_No. 994 3E2

Operand OP1 Powerend data Register address Allowed Single
precision/Double
precision
OP2 Power data Register address Allowed Single
precision/Double
precision
OP3 Calculation result Register address Allowed Single
precision/Double
precision

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3                               
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 +4 -4 +4 -4 OP3 +8 -8 +8 -8

register
Function Power: OP1 register is raised by OP2 register and output to OP3 register.
--------[ POW D000 D102 -> D004 ] Single precision

--------[ (d)POW D000 D004 -> D008 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
 OFF  
8-132
Exponent Single precision/Double precision
(Hexadecimal)
Mnemonic EXP FUN_No. 995 3E3

precision/Double
precision
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function Exponent Exponent of OP1 register (lowe) is output to register of OP2.
--------[ EXP D000 -> D100 ] Single precision

--------[ (d)EXP D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
  OFF 
8-133
Logarithm (e) Single precision/Double precision
(Hexadecimal)
Mnemonic LOGE FUN_No. 996 3E4

precision/Double
precision
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function Logarithm (e) Logarithm of OP1 register (low e) is output to OP2 register.
--------[ LOGE D000 -> D100 ] Single precision

--------[ (d)LOGE D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
   
8-134
Logarithm (10) Single precision/Double precision
(Hexadecimal)
Mnemonic LOG10 FUN_No. 996 3E4

precision/Double
precision
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function Logarithm (10) Logarithm of OP1 register (low 10) is output to OP2 register.
--------[ LOG10 D000 -> D100 ] Single precision

--------[ (d)LOG10 D000 -> D200 ] Double precision

V57 V56 V55 V54 V53 V52 V51 V50
CY BO Z > = < Err
   
8-135
Comparison Single precision/Double precision
Mnemonic Various FUN_No.
Number of steps 7,9 steps

Operand OP1 Comparison Register address Allowed Single
source precision/Double
precision
OP2 Comparison Resister address or Allowed Single
source Constant number precision/Double
precision
OP3

T X ET EX GX G
C Y EC EY GY M
OP1                               
OP2                               
OP3
Single Double
precision precision
OP1 +4 -4 +4 -4 OP1 +8 -8 +8 -8
OP2 +4 -4 +4 -4 OP2 +8 -8 +8 -8
OP3 OP3

register
Function Comparison (contact type) OP1 and OP2 are compared as floating point. Turns on when
condition is satisfied.
-[ F=N D000 = D100 ]-- Single precision

-[ (d)F>N D000 > D200 ]-- Double precision
Type
(comparison between registers) Constant comparison
F=N F=D
F<>N F<>D
F>N F>D
F>=N F>=D
F<N F<D
F=<N F=<D
STR, AND, OR type is available depending on use place.
8-136
8.4.3. Application command for layered communication(Ver3.30~)
1. Outline
The layered communication is a function for performing event communication exceeding a

network layer.
PLC
FL-net
PLC
FL-net
Message communication is
performed via layers from
PLC PC10G.
FL-net
PLC
PC10G
2. The method of the layered communication
The message for layered communication (relay command) is transmitted and received by executing an
application command for exclusive use within the sequence program of PC10G.
Since an exclusive application command returns to sequence operation after ending without
waiting for a response, the end of a command and reception of a response are not simultaneous.
Reception of a response is checked with the link command permit flag of an applicable link.
8-137
3. Specification of the application command
LCSET: Link command issue (FUN 383) PC10G

(1) Usable devices
X Y M K V T C L P D R N S B Constant
PC3/PC2
OP1 ○
OP2 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○
OP3 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○
EX EY EM EK EV ET EC EL EP U H EN ES GX GY GM GS GZ GF JL JS EB FR
OP1
PC3 extension
PC10 extension OP2 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○
OP3 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○
GS, GZ, GF, JL and JS is a disable because of a system area.

Since FR is the flash register, the written-in data returns by power supply OFF or reset of CPU.
(2) The number of step: 5
(3) Symbol
LCSET LCSET 100Ah D0100 U0000
(4) Function
The message set as the area of the size shown by OP1 from the register of OP2 is issued to a link
module. Moreover, a response is stored in the register of OP3 when a response is received.
Response data is not set even if an application command is completed. A link command permit flag
is set after the completion of a set of response data. This command is executed in the sequence of
the program number to which the link module is assigned.
Format of OP1 (Command size)

F C B 0
Link No Data size

(Max. 550 bytes)
(5) Flag
CY BO Z > = < ER
↑
Error flag(ER): It turns on, when the stored area is outside the area of data memory.
(6) Example program

When M0 is ON, and when use of the link command to FL-net assigned to link No3 is permited,
the message command defined by 10 bytes from R0200 to R0204 is issued.
A response is stored in the area which made D0800 the head.
M000 P000 V90
LCSET 300Ah R0200 D0800
OP1=300Ah
OP2=R0200
OP3=D0800
8-138
4. Message format
The message format is based on the computer link system relay command format of TOYOPUC
Ethernet. However, a header part (from a head to 6 bytes) is unnecessary to a setup of the command
data of an application command.
The example in the case of setting a command as D0100 and storing a response in U0000 is shown.
■ Command
Satellite No. (Hi) Satellite No. (Lo)

D0100
D0101 LL 05
D0102 Command code LH
D0103 Data Data
D0104 Data Data The 7th byte of a relay command or
subsequent ones is set in registers.
D010n 00 Data
Reference) Ethernet relay command

Link No.
Satellite No. (Lo)

Satellite No. (Hi)
0 0 L L C 0 L L 0
Command
0 0 L H M 5 L H Data 0
code
Unnecessary Satellite No. of link module The command to the CPU module which issues an event
■ Response
<On success > < Abnormal case (In the case of 1st layer) >
Satellite No. Satellite No. Satellite No. Satellite No.

U0000 (Hi) (Lo) U0000 (Hi) (Lo)
U0001 LL 06 U0001 LL 15
Command code
U0002 LH U0002 NAK Code LH
U0003 Data Data U0003 xx
U0004 Data Data
< Abnormal case (In the case of 2nd layer) >

Satellite No. Satellite No.
U000n 00 Data U0000 (Hi) (Lo)
U0001 LL 06
U0002 60 LH
Satellite No.
U0003 (Lo) Link No.
Note) The data length of a response is to Satellite No.
512 bytes (except for the header U0004 15 (Hi)
portion of a command). U0005 LH LL

U0006 xx NAK Code
8-139
5. Usage examples
(1) Writing data
PC10G Satellite No. =100

Program No=3
FL-net
PLC
FL-net Satellite No. =100
Program No=1
PLC
Satellite No. =100
FL-net
PLC
Program No=1
In the above-mentioned network, when P1-M500 turns on, the command which writes 1234h in
P2-D0800 of PLC is issued. A command is set to P1-D0100. A response is received in U0400.
<Sequence program>
Program
M500 P000 V98 OP1=101Ch
LCSET 101Ch D0100L U0400L OP2=D0100L
OP3=U0400L
M510
S M510= Under command execution
V98 P001 M510

Reception processing of a response
M510
R
8-140
< Command data >
2)
1)
Relay command code
64.00.05.16.00.60.13.64.00.05.0E.00.60.32.64.00.05.06.00.95.02.00.18.34.12.00.00.00
Satellite No. P1L3 Number of Satellite No. 00 is added to final data.

bytes of 1) P3L2
Number of Writing Data Expansion Word
bytes of 2) Satellite No.
Hi. Lo.
D0100 00 64
D0101 16 05
D0102 60 00
D0103 64 13
D0104 05 00
D0105 00 0E
D0106 32 60
D0107 00 64
D0108 06 05
D0109 95 00
D010A 00 02
D010B 34 18
D010C 00 12
D010D 00 00
< Response data>

1)
2)
64.00.06.11.00.60.13.64.00.06.09.00.60.32.64.00.06.01.00.95.XX.XX.XX
ACK(06) Number of ACK(06) Number of ACK(06) Writing Data Expansion Word

bytes of 1) bytes of 2)
Hi. Lo.
U0400 00 64
U0401 11 06
U0402 60 00
U0403 64 13
U0404 06 00
U0405 00 09
U0406 32 60
U0407 00 64
U0408 01 06
U0409 95 00
U040A XX XX
U040B XX
8-141
(2) Reding data
PC10G Satellite No. =100

Program No=3
FL-net
PLC
Satellite No. =100

FL-net
Program No=1
PLC
Satellite No. =100
FL-net
PLC
Program No=1
In the above-mentioned network, when P1-M120 turns on, the command which reads from FR01000
to FR010FF (512 bytes) of PLC is issued. A command is set to EB00000. A response is received in
EB00800.
<Sequence program>
Program
M120 P010 V98 OP1=101Dh
LCSET 101Dh EB00000L EB00800L OP2=EB00000L
OP3=EB00800L
M180
S M180= Under command execution
V98 P011 M180

Reception processing of a response
M180
R
8-142
< Command data >
2)
1)
Relay command code
64.00.05.17.00.60.13.64.00.05.0F.00.60.32.64.00.05.07.00.C2.00.20.40.00.00.02.00.00.00
Satellite P1L3 Number of Satellite 00 is added to final data.

No. bytes of 1) P3L2 No.
Number of Satellite Writing Data Expansion Word
bytes of 2) No.
Hi. Lo.
EB00000 00 64
EB00001 17 05
EB00002 60 00
EB00003 64 13
EB00004 05 00
EB00005 00 0F
EB00006 32 60
EB00007 00 64
EB00008 07 05
EB00009 C2 00
EB0000A 20 00
EB0000B 00 40
EB0000C 02 00
EB0000D 00 00
EB0000E 00
< Response data>

When response data is FR00000=0000, FR00001=0001, FR00002=0002.
1)
2)
64.00.06.11.02.60.13.64.00.06.09.02.60.32.64.00.06.01.02.C2.00.00.01.00.02.00.03.00････
････
FD.00.FE.00.FF.00.XX.XX.XX
ACK(06) Number of ACK(06) Number of ACK(06) PC10 Reading Data Byte
bytes of 1) bytes of 2)
Hi. Lo.
EB00800 00 64
EB00801 11 06
EB00802 60 02
EB00803 64 13
EB00804 06 00
EB00805 02 09
EB00806 32 60
EB00807 00 64
EB00808 01 06
EB00809 C2 02
EB0080A 00 00
EB0080B 00 01
EB0080C 00 02
EB00908 00 FE
EB00909 00 FF
EB0090A xx xx
EB0090B xx
8-143
8.5. Equipment Information Memory
The equipment information memory is available to store comments, etc. on sequence circuits
separately from sequence program, parameters and data.
This equipment information memory of 4MB capacity can normally store 10,000 points or more, where
limited to the address comments only. The number of storable comments differs depending on the
content of comment.
Storing comments, etc. in the equipment information memory is effected by PCwin (Ver.8.00 or later).
PCwin (Ver.8.00 or later) can display commented circuit diagram, cycle chart, etc. by reading the
information stored in the equipment information memory.
Storing and reading in/from the equipment information memory can be made by PCwin (Ver.8.00 or
later) for the PC10, irrespective of CPU operation mode.
Further, it is impossible to change the information stored in the equipment information memory and to
store data in the same memory in sequence program. Also it is impossible to refer to the stored
information in accordance with sequence program.
Carry Carry Door Unclamp Palette NC

out out open position return start
position under position position position Start
position
Start Start Continuo Return Continuo Stand-by Intensiv Cycle

position us us off e err off
Start
Restart
Start
Peripheral Equipment
(PCwin)
Equipment User Memory
Information Memory Sequence program,
4MB Parameters,
comments, etc. Data
Displays commented circuit

PC10G
diagram, etc. based on
information stored in the
Equipment Information
Memory.
8-144
8.6. Backup function
8.6.1. Backup function of data memory
A lithium battery is provided to back up the data memory (data areas such as keep relay, data register,
etc.) against power failure and to drive the built-in clock.
When the unit is not energized long, such as for six months, it is possible that the battery is consumed
and data memory cannot be retained. Therefore, take backup of data memory.
On the other hand, The contents (sequence program and parameters) of user program and equipment
information memory (comments, etc.) are never cancelled even against power failure,because they
are stored in "flash memory" which can retain the stored data unchanged even in the case of power
failure.
8-145
8.6.2. Flash register
8.6.2.1. Setting of communication with PCwin
It is allowed to limit the size by designating parameter. It eliminates unnecessary processing in backup
of data (backup of unused area) and enables high-speed backup.
8.6.2.2. About flash register
Flash register is used with data stored in flash memory developed on volatile RAM.
Flash memory Volatile RAM

4Mbyte FR register
The set capacity is transferred.

Transfer
in
initializing Access is enabled freely.
Sequence program
|--||-----[MOV FR0 -> D0]
DM
Caution: FR register can be accessed freely, but when FR register is written, the written data is rewritten
into the original data of flash memory by power-off or resetting.
Therefore it is normally used for register dedicated to reading.
8-146
8.6.2.3. Difference between flash register and some other register
FR register has a specification different from any other register. Understand the specification of FR
register well enough before use.
Property 1: Flash memory can be written only after being erased once.
Therefore, it is allowed to write only once to the same address after erasing.
(Data is "FFFFh" when erased.)
Property 2: Flash memory can be erased only in the unit of 64kbytes.
Therefore it is impossible to erase a limited area approx several bytes.
Property 3: It is nonvolatile memory, and data is retained without battery.
Property 4: Writing and erasing require certain processing time.
Erasing of one block (64kbytes) takes approx 0.5s typically.
Writing of one word takes approx 6 microseconds typically.
Property 5: When some area is being erased or written, it is impossible to erase or write in any other
area.
8.6.2.4. Example of application
(1) Application 1
For storing constant data (data unchanged by calculation) such as work processing condition and
various setting conditions. (Used for read-only register) Constant data is prepared by PCwin etc, and
written to PC10G by register writing function.
In register writing from PCwin, data is written not only to FR register area (volatile RAM) but also to
flash memory as well.
(2) Application 2
Used for calculation work area. (Data which causes no problem when erased by power-off)
Alternatively, the latest data is always written from host computer when power is turned on, and such
latest data is used for control. (No problem when data is erased by power-off)
(3) Application 3
For storing the log information of equipment. Log information is accumulated on flash memory by use
of dedicated command.
Log information, when accumulated for a certain amount, is read by host computer, etc.
8-147
8.6.2.5. FR register address list
User notation address (in words) ExNo. User notation address (in words) ExNo.
FR000000 - FR007FFF 40 FR100000 - FR107FFF 60
FR008000 - FR00FFFF 41 FR108000 - FR10FFFF 61
FR010000 - FR017FFF 42 FR110000 - FR117FFF 62
FR020000 - FR027FFF 44 FR120000 - FR127FFF 64
FR030000 - FR037FFF 46 FR130000 - FR137FFF 66
FR040000 - FR047FFF 48 FR140000 - FR147FFF 68
FR050000 - FR057FFF 4A FR150000 - FR157FFF 6A
FR058000 - FR05FFFF 4B FR158000 - FR15FFFF 6B
FR060000 - FR067FFF 4C FR160000 - FR167FFF 6C
FR068000 - FR06FFFF 4D FR168000 - FR16FFFF 6D
FR070000 - FR077FFF 4E FR170000 - FR177FFF 6E
FR078000 - FR07FFFF 4F FR178000 - FR17FFFF 6F
FR080000 - FR087FFF 50 FR180000 - FR187FFF 70
FR090000 - FR097FFF 52 FR190000 - FR197FFF 72
FR0A0000 - FR0A7FFF 54 FR1A0000 - FR1A7FFF 74
FR0A8000 - FR0AFFFF 55 FR1A8000 - FR1AFFFF 75
FR0B0000 - FR0B7FFF 56 FR1B0000 - FR1B7FFF 76
FR0B8000 - FR0BFFFF 57 FR1B8000 - FR1BFFFF 77
FR0C0000 - FR0C7FFF 58 FR1C0000 - FR1C7FFF 78
FR0C8000 - FR0CFFFF 59 FR1C8000 - FR1CFFFF 79
FR0D0000 - FR0D7FFF 5A FR1D0000 - FR1D7FFF 7A
FR0D8000 - FR0DFFFF 5B FR1D8000 - FR1DFFFF 7B
FR0E0000 - FR0E7FFF 5C FR1E0000 - FR1E7FFF 7C
FR0E8000 - FR0EFFFF 5D FR1E8000 - FR1EFFFF 7D
FR0F0000 - FR0F7FFF 5E FR1F0000 - FR1F7FFF 7E
FR0F8000 - FR0FFFFF 5F FR1F8000 - FR1FFFFF 7F
ExNo.: Number used for erasing unit of flash memory (in unit of 64kbytes) Upper 2 digits of byte address.
8-148
8.6.2.6. Command dedicated to FR register erasing and writing
(1) Flash memory erasing

---[FRCL Top block Final block ]
Designate the top and end of block number to be erased (ExNo. in the list above) and erase.
(2) Command dedicated to flash memory writing

---[FRWR Register address FR register Writing word count]
Designate by the same format as word type block transfer (WBMOV).
Both commands are for starting erasing and writing of flash memory, and exit without waiting for
completion of erasing and writing, and move to execution of next command. (Completion can be
distinguished by special relay V100.)
Actual erasing and writing of flash memory are performed automatically on system side.
Special relay
EV100: Flash memory writing enable flag
EV101: Flash memory writing fail flag
Erasing complete Writing complete
EV100:
Execute FRCL. FRWRI Execute FRWR.
*Also by an Ethernet command, the writing to a flash register is possible.

* Please refer to the catalogs of "9.8.9.1 Ethernet command" for details.
8-149
Reference circuit
Log information of equipment is accumulated in FR register.
For log storage: 1Mbyte FR00000 - FR0FFFFF
Log information of once: 64 bytes
Log information prepared in D0000 - D001F is written to FR register.
Index register is used for a circuit. See "8.3 Index register".
FR register FR register
clearing clearing start
FR register clearing start

FR register clearing start
FR register clearing FR register WR

start available
FR register 1M (40-4F)
clearing
FR register starting check

FR register start
check
FR register address initial
FR register address saving

Log writing start Log writing start check
Log writing start

Log writing start
Log writing start
Log data setting

Log writing start
FR register address reading

Log writing start FR register WR
available
Log writing
Log writing start check

Log writing start
check
FR register address updating
FR register address reading
8-150
8.7. Writing while PLC is running
Execution of the program is stopped temporarily while programs are being written. Do
not attempt to execute [Write during RUN] while the equipment or target machine is
running.
Always execute [Write during RUN] after the equipment and/or machine are in the
cycle stop state.
Always pay special attention to the operational safety, since the equipment starts
functioning unexpectedly depending on the contents of changes made on the circuit.
Note: When CPU operation mode in PCwin differs from PLC, the program cannot be written while
PC is running.
Operating procedure
1. Select [Write onto CPU] from the CPU menu and click [Program *](*: 1 – 3).
The following message will appear. Click [Yes].
2. The following screens are displayed.
8-151
(1) To prevent any accidents, write operation is prohibited while PLC is running.
If it is absolutely required to write programs while PLC is running , read the contents stated in
the warning box to fully understand them, and then start writing programs.
You may input the following two characters as password.
Password: #W
(2) If you wish to rest and restart PLC after writing, check on [Write program and reset/start PC]
and click [Continue].
If you do not wish to reset and restart PLC, click [Continue].
(3) When programs are successfully written, the completion message will appear.
Please click [OK].
8-152
8.8. Library function
PC10G incorporates library function.
See "Instruction manual for library function" for detail of function.
8.9. SFC
See "Instruction manual for PCwin (t-a35)" for detail of function.
When programming by SFC is performed, data memory area shown below is occupied for
execution and control of SFC. Therefore it cannot be used for user memory. Be careful.
Also note that programming by SFC is impossible depending on operation mode. "V58 - V5D" and
"EV800 - EVBFF" of special relay are also occupied by execution and control of SFC. Do not make
access to this area.
Number Number Number

Number Number
Operation Program Number of of of
of action of Data memory occupation area
mode No. of steps transition actions/s processe
labels sub-SFC
s tep s
P1 1000 16 1000 256 100 P1-R580-R7FF
PC10 ET000-ET5FF H000-H5FF EN000-EN5FF
P2 ※1 1000 16 1000 256 100 P2-R580-R7FF
mode ※2 ※2 ※2
P3 1000 16 1000 256 100 P3-R580-R7FF
P1 500 1000 16 1000 256 100 P1-R580-R7FF ET000-ET1FF H000-H1FF EN000-EN1FF
Separate 1 P2 500 1000 16 1000 256 100 P2-R580-R7FF ET200-ET3FF H200-H3FF EN200-EN3FF
Separate
P2 - - - - - - - - - -
2
Separate
3
P3 - - - - - - - - - -
Separate
4
P3 - - - - - - - - - -
Separate
P2 - - - - - - - - - -
5
P1 500 1000 16 1000 256 100 R580-R7FF ET000-ET1FF H000-H1FF EN000-EN1FF
Single 1 P2 Unavailable Unavailable
P3 Unavailable Unavailable
Single 2 P2 - - - - - - - - - -
P3 Unavailable Unavailable
P3 - - - - - - - - - -
Single 4 P2 - - - - - - - - - -
P3 - - - - - - - - - -
Single 5 P2 - - - - - - - - - -
P3 - - - - - - - - - -
P3 - - - - - - - - - -
PC2
compartibl P1 Unavailable - - - -
e
Usable 0000 0000 000- 000-
- - 00-99 - - - -
number -9999 -9999 999 255
*1 Restriction of each program number usable step count of PC3JG division mode is shown.
P1 P2 P3 Explain
P1+P2+P3  1500 When P1 uses 700 steps, P2 can use up to 300 (1000 -
Example
700 300 500

P1+P2  1000 700) steps and P3 can use up to 500 steps.
P2+P3  1000 When P1 uses 400 steps, P2 can use up to 600 (1000 -
P3  500 400 600 400 400) steps and P3 can use up to 400 (1000 - 600)
steps.
*2 Area used by each address of ET/H/EN is determined by the number of steps used by program 1/2/3.
8-153
(1) Not usable in PC2-interchangeable mode/PC2/PC1 series/MX.
(2) Allowed only in program 1 in single mode
(3) The number of steps is limited to 500 at the most when program capacity is 16KW.
(4) Occupies the identifier R (link register area) of user data memory and expanded timer area for
SFC control.
(5) Occupies the expanded label (EL****) for SFC.
Note) Expanded timer/counter and expanded label occupied by SFC cannot be used.
8-154
9. LINK FUNCTION
PC10G has PC/CMP, SN-I/F and 2 port of FL/ET/RMT as standard.
9.1. Setting link parameters
Set parameter for each program when link module is used installing on PC10G.
When a built-in link is not used, it is not necessary to set this item.
Link Link No. Rack No. Slot No. Module Name

PC / CMP / MODBUS Arbitrariness Built-In Standard PC link MODBUS
(L3) *1 Computer link
(L1 side) *2 Ethernet
FL-remote-M
(L2 side) Ethernet
FL-remote-M
*1 If the link parameter is not set by L3, SN-I/F is selected.

In the case of PC2 compatible mode, it can be used as computer link.
However, when using this unit for SN-IF, tilt the switch to L3T-ON side. When SN-IF is not used,
set to T-OFF side.
*2 When connecting with the direct monitor, set the communication setting switch to "DM".
It is possible to connect with the direct monitor without setting the link parameter.
Communication
setting switch Link parameter setting of
Operation Remarks
of incorporated incorporated L1
L1
Communication with direct monitor is
Recommended
No setting enabled.
setting
(Occupies P3L1 as Ethernet for DM.)
DM Connection with direct monitor is enabled
Ethernet
by assigned program No and link No.
Other than Ethernet
Link module assignment error (error 89)
(including Ethernet(32 ports))
No operation 9
No setting (7-segment display: E5 (link parameter
L1 SEL. not set yet)
Recommended
Setting available Operation by link parameter setting
setting
BATTERY
TIP-5426 MODE
1st./
2nd./
1.00 I/F
FL
L1 ET
RMT
FL
L2 ET
RMT Communication setting
L1 Auto 10M switch
L2 Auto 10M a. L1 Auto 10M
L1 SEL. DM b. L2 Auto 10M
L3 T-ON T-OFF c. L1 SEL. DM
d. L3 T-ON T-OFF
ON OFF
ON OFF
9-1
9.2. Data link area
When the link modules for data link are mounted in the PC10G, the data link areas available for use
(usable devices) are as listed below.
2) Link area expansion

・GX/Y000L- FFFH (16KB),GM000L- FFFH (16KB) are added newly.
Data link areas (usable devices )
Link modules
L,M L1,M1 X,Y R,D EL,EM EX,EY GM GX,GY U EB
PC link ○ ○ ● ● * *
PC1-I/F ○ ○ ● ● * *
High speed remote
○ ○ ● ● * *
I/O
HPC link ○ ○ ●*1 *
Multiple
○ ○ ● ● * *
communication I/F
M-NET ○ ○ ● ● * *
Pulse output ○ ○ ○ ● ●
DLNK-M ○ ○ ● ●
DLNK-M2 ○ ○ ● ● * *
AF1K ○ ○ ○ ● ● * *
MA1K ○ ○ ○ ● ● * *
ME-NET ○ ○
FL-net ○ # ○ ○ ● ● * * * #
PROFI-S2 ○ ○ ○ ● ● * *
Motion controller ○ ○ ○ ● ● * *
FL-remote ○ ○ ● ● * *
The -marked devices are the conventional usable devices and the device that can use the division mode
of 3J is and and the device that can be the use it at the PC10G standard mode and the PC3JG division
mode is , , ＊. The device that can be the use it at the PC10 mode is , , ＊, and #.
Data link area is differ according to CPU operation mode.
*1: For HPC link, Ver 2.20 and higher Ver can use some (EL, EM) of the extended relay areas.
Furthermore, availability of the data link areas differs depending on CPU operation mode.
< Case of Data Area Separate Mode >

Only data areas in a program wherein applicable link parameters are set up can be applied to the
data link areas (devices).
For example, where PC link host station is set up in Program 2 and parameters are set up so as to
send L0000 - L001F to slave station 1, L0000 - L001F in Program 2 are sent to slave station 1.
Under "Data Area Separate Mode", attention must be paid to the following items regarding the data
link areas.
 L, L1, M, M1, R, and D are independent every program.

Set up each area to store the received data so as to avoid doubling in each link setup every program.
Furthermore, set up each area so as to avoid doubling with those in the data registers intended to store
output coil in the program and calculated result.
 X, Y, EL, EM, EX, EY,GX, GY, GM, U, and EB are common to each program.
Set up each area to store the received data so as to avoid doubling in all the installed links. In addition,
set up each area so as to avoid doubling with the data register to store the output coils of all programs
and calculated result.
9-2
< Case of Data Area Single Mode or PC2 compatible Mode>
Only data areas common to each program are applied to the data link areas.
For example, where PC link host station is set up in Program 2 and link parameters are set up so as
to send L0000 - L001F to slave station 1, L0000 - L001F in the basic area are sent to the slave
station 1.
In the case of Data Area Single Mode or PC2 compatible Mode, attention must be paid to the
following regarding the data link areas.
• All the data link areas are common to each program.

Set up each area to store the received data so as to avoid doubling in all the installed links. In addition,
set up each area so as to avoid doubling with the data register to store the output coils of all programs
and calculated result.
9-3
9.3. Commands
Where link module to issue commands is mounted in the PC10series, some restrictions are given to
handling of the commands as described below.
1. Where commands for data read, etc. are sent, the operation and response are different depending
on CPU operation mode.
< Case of Data Area Separate Mode >

Where commands for data read, etc. are sent, the data areas in a program wherein link parameters
are set up are applied to the operation and response. The data areas in other program (no link
parameters set up therein) can not be applied.
For example, where the computer link is set in Program 1 and V40 is read using one I/O point read
command, the response data is V40 in Program 1.
< Case of Data Area Single Mode or PC2 compatible Mode >
Where the commands for data read, etc. are sent, the data areas common to each program are
applied to the operation and response.
For example, where the computer link is set in Program 3 and S200 is read using I/O register word
read command, the response data is S200 in the basic area.
2. Extended relay and extended register can not be applied to the commands.
3. Commands intended for control of CPU operation such as scan halt, halt reset (release), etc. are
applied to control of the system overall. These can not be applied to individual control every
program.
4. Some commands for program read, etc. are not available for the use.However, it is possible to issue
the commands intended to support the PC3J CPU function by mounting a link module which
contains therein the command function corresponding to the PC3J, whereby the restrictions
mentioned above are eliminated.
9.3.1. Computer Link commands
Where any of the computer link modules in Ver 5.00 and lower Version is mounted in the PC3J, the
PC10G/ Standard / PC3JG operates and responds as described on next page when the computer link
commands are sent.
However, the PC3J operation and response are identical to Ver 5.00 and lower Version when it is
operated in PC2 compatible Mode.
Even if the computer link modules Version is after Ver 5.00, it cannot access “GM, GX, GY, EB" domain
added to the PC10G/ Standard / PC3JG division mode.
 The computer link built in PC10G/ Standard / PC3JG corresponds to the PC10G/
Standard / PC3JG commands.
 Only the computer link built in PC10G/ Standard / PC3JG can access “GM, GX, GY,
EB" domain.
(Version 6 or more)
PC2J PC/CMP LINK(THU-2755)
PC2J PC/CMP LINK2(THU-5139)
PC2J 2PORT LINK(THU-2927)
9-4
No Commands PC3J operation and response
1 I/O 1 POINT READ Response is sent to the data area in the
2 parameter-set program from the computer
I/O REGISTER BYTE READ
link. ( But unable to be applied to extended
3 I/O 1 POINT WRITE relay and extended register .) *1
4 I/O REGISTER BYTE WRITE
5 SEQUENCE PROGRAM READ Unable to be applied .( NAK sent back)
6 SEQUENCE PROGRAM WRITE
7 I/O REGISTER WORD READ Response is sent to the data area in the
parameter-set program from the computer
8 I/O REGISTER WORD WRITE link. ( But unable to be applied to extended
relay and extended register .) *1
9 SCAN HALT Works for the system overall.
10 ( not work individually every program.)
SCAN HALT RESET (RELEASE)
11 SCAN RESTART
12 CPU STATUS READ Identical to conventional Ver.
13 FILL I/O REGISTER Response is sent to the data area in the
parameter-set program from the computer
link. ( But unable to be applied to extended
14 WRITE MODE SETTING Identical to conventional Ver.
15 WRITE MODE READ
16 RESET Identical to conventional Ver.
17 DUMMY SCAN HALT Unable to be applied .( NAK sent back)
18 DUMMY SCAN HALT RESET(RELEASE)
19 CPU ID READ Identical to conventional Ver.
20 TIMER/ COUNTER SETUP VALUE & Response is sent back to the timer/counter of
PRESENT VALUE READ parameter-setup program from the computer
21 link.
TIMER/ COUNTER SETUP VALUE &
PRESENT VALUE WRITE
22 TIMER/COUNTER SETUP VALUE WRITE
23 TIMER /COUNTER PRESENT VALUE WRITE
24 PARAMETER READ Unable to be applied .( NAK sent back)
25 PARAMETER WRITE
26 EXECUTE RIGHT LIMIT SETTING Identical to conventional Ver.
27 EXECUTE RIGHT LIMIT READ
28 CLOCK TIME READ Identical to conventional Ver.
29 CLOCK TIME SETTING
30 FILL SEQUENCE PROGRAM Unable to be applied .( NAK sent back)
31 I/O REGISTER MULTI-POINT READ,ADDRESS Response is sent to the data area in the
REGISTRATION parameter-set program from the computer
32 link. ( But unable to be applied to extended
I/O REGISTER MULTI-POINT WORK READ
*1 Extended relay: EP, EK, EV, ET, EC, EX, EY, EM, GX,GY,GM
Extended register: ES, EN, H, U, EB
9-5
9.4. Special Relays and Special Registers
The PC10G CPU stores the link module related error information and status information in special
relays and special registers individually every each program. The areas and addresses to be stored in
these special relays and special registers differ depending on CPU operation mode applied.
(1) Data Dividing Mode
<Special relays >
Store area Address *1 Name and content Applicable link

V80 - V87 COMMUNICATION RESET
LINK COMMAND USE OK PRG.1-Link 1
V90 - V9F
LINK COMMAND ERROR
PRG.1
-
LINK PARAMETER ERROR
VA0 - VBF IN COMMUNICATION WITH PRG.1-Link 8
COMMUNICATION ERROR
V90 - V9F
LINK COMMAND ERROR
PRG.2
-
COMMUNICATION ERROR
V90 - V9F
LINK COMMAND ERROR
PRG.3
-
COMMUNICATION ERROR
<Special Registers>
Store area Address *1 Name and content Applicable link
S0A8- S0AF LINK module code
S300 COMMUNICATION (LINK) PRG.1-Link 1
PRG.1
MODULE
-
S3FF STATUS INFORMATION PRG.1-Link 8

PRG.2
MODULE |
-

PRG.3
MODULE |
-
*1 The name and content of each address are same as those in PC2 Series.
9-6
(2) Data Single Mode
<Special Relays >

Applicable link
Store area Address *1 *2 Name and content
No.
LINK COMMAND USE OK
PRG.1-Link 1
FLAG
V90 - V9F
LINK COMMAND ERROR
Basic area FLAG |
IN COMMUNICATION WITH
VA0 - VBF PRG.1-Link 8
ALL STS /
COMMUNICATION ERROR
EV00 - EV07 COMMUNICATION RESET
LINK COMMAND USE OK
PRG.2-Link 1
FLAG
EV10 - EV1F
LINK COMMAND ERROR
FLAG |
EV20 - EV3F PRG.2-Link 8
ALL STS /
COMMUNICATION ERROR
Extended area
EV40 - EV47 COMMUNICATION RESET
LINK COMMAND USE OK
PRG.3-Link 1
FLAG
EV50 - EV5F
LINK COMMAND ERROR
FLAG |
EV60 - EV7F PRG.3-Link 8
ALL STS /
COMMUNICATION ERROR
<Special Registers>
Applicable link
Store area Address *1 *3 Name and content
No.
S0A8-S0AF PRG.1-Link 1
S0B0-S0B7 LINK module code PRG.2-Link 1
S0B8-S0BF PRG.3-Link 1
Basic area
| MODULE |
ES000 COMMUNICATION (LINK) PRG.2-Link 1
| MODULE |
ES0FF STATUS INFORMATION PRG.2-Link 8
Extended area
ES100 COMMUNICATION (LINK) PRG.3-Link 1
| MODULE |
ES1FF STATUS INFORMATION PRG.3-Link 8
*1 The name and content of each address in the basic area are same as those of same address in
PC2 Series.
*2 The name and content of each address in the extended area are as follows.
V80=EV00=EV40,V81=EV01=EV41...VBF=EV3F=EV7F
*3 The name and content of each address in the extended area are as follows.
S300=ES000=ES100,S301=ES001=ES101...S3FF=ES0FF=ES1FF
9-7
(3) PC2 Interchange Mode
<Special Relays >

Address *1 Name and content Applicable link No.
LINK COMMAND USE OK FLAG PRG.1-Link 1
V90 - V9F
LINK COMMAND ERROR FLAG
|
VA0 - VBF IN COMMUNICATION WITH ALL STS / PRG.1-Link 8
COMMUNICATION ERROR
<Special Registers>
Address *1 Name and content Applicable link No.
V80 - V87 Link module code PRG.1-Link1
PRG.1 Link 1
S300 COMMUNICATION (LINK) MODULE
|
| STATUS INFORMATION
S3FF PRG.1-Link 8
*1 The name and content of each address are same as those in PC2 Series.
Table of link module code

Module name Code Note Module name Code Note
AD10 0000 ---- 2-port M-NET 0002 ----
PC link master 0102 ---- Pulse output module 0100 ----
PC1-I/F output 0102 ---- DLNK-M 8008 ----
PC link slave 0002 ---- DLNK-S2 8008 ----
PC1-I/F input 0002 ---- DLNK-M2 8208 ----
Computer link 0003 ---- Ethernet 8203 ----
ME-NET(master) 0104 ---- AF1K 800E ----
ME-NET(slave) 0004 ---- MA1K 810E ----
SIO module 0005 ---- Motion controller 820E ----
Memory card I/F 0005 ---- FL-net (8KB) 8009 ----
High speed remote 0008 ---- FL-net (16KB) 8109 ----
AS-i 0008 ---- FL-net (32KB) 8209 ----
HPC link(master) 4009 ---- PROFI-S2 8309 ----
SUB-CPU(master) 4009 ---- Ethernet (32Port) 8203 ----
HPC link(slave) **09 **: Slave № FL Remote 8308 ----
SUB-CPU(slave) **09 **: Slave №
9-8
9.5. Built-in COMPUTER LINK function
Serial communication performs data exchange with PC and host computers (a personal computer,
operation board, etc.).
It is the multi-drops system (1:N) with which communication form a host computer, and the data
exchange with PC10G of a maximum of 32 and a host computer is possible.
9.5.1. Specification
(1) Computer link specification

Items Specification
Interface standard Conforming to EIA RS-422
Communication system Start-stop synchronous, half-duplex (2-wire type)
Transmission line Shielded twist bare cable
0.3, 0.6, 1.2, 2.4, 4.8
Communication speed
9.6,19.2, 38.4 kbps (Presetting)
Transmission distance Max 1 km (total length)
Transmission form 1:N
Number of stations Max 32 stations (Address No. 00 ~ 37) [set with octal number)
Start bit1 bit
Data length 7 or 8 bit (presetting)
Data type
Parity1 bit (even parity)
Stop bit 1 or 2 bit (presetting)
Characters used ASCII code
Error detection Parity check, sum check
Note) When setting of memory capacity is PC2 mode, and link parameter incorporated in PC2
mode in standard is not set, this unit operates for computer link of the setting .
*1 Set by link parameters.

*2 Communication speed is displayed below against maximum transmission distance as an
approximation.
When using at a communication speed of 115.2kbps, be sufficiently careful of noise etc. while
running.
Transmission speed and transmission

distance of RS422/RS485
Register link (m)
Register link (bps)
9-9
(2) Communication formats
The communication formats for command and response are as follows.
Sum Check area
AD(H)
SC(H)
AD(L)
SC(L)
PRG
CR
RI
Command Command content
?
:
AD(H)
SC(H)
AD(L)
SC(L)
Response
PRG
CR
RI
Response content
#
:
(Normal )
AD(H)
EC(H)
SC(H)
AD(L)
EC(L)
SC(L)
Response
PRG
CR
RI
%
:
(Abnormal)
AD (H) (L) ………………This represents Station No. to receive command in command format and
Station No. to send response in response format. Two-digit octal number (00
~ 37) is expressed with ASCII Code.
RI…………………………Designates the time from receipt of command until sending response.

One-digit hexadecimal number (0 ~ F) is expressed with ASCII Code (30H ~
39H, 41H ~ 46H).
The relationship of RI to response time is as per the table below.
Response time Response time
RI RI
(msec) (msec)
0 0 8 80
1 10 9 90
2 20 A 100
3 30 B 200
4 40 C 300
5 50 D 400
6 60 E 500
7 70 F 600
9-10
PRG  Representing an objective of command processing.
0 ~ 3 are expressed with ASCII Code.
PRG Program PRG Program
0 System overall 2 Program 2
1 Program 1 3 Program 3
"PRG" is divided into "mandatory", "omittable" and "unnecessary" depending
on commands. Where omitted, parameter-set program No. is an objective of
command processing.
SC (H) (L) Representing sum check data.

Two-digit hexadecimal number ( 00 ~ FF) is expressed with ASCII Code.
EC (H)(L)  Representing error code against error occurrence.

Two-digit hexadecimal number (00 ~ 1F) is expressed with ASCII Code.
: Code (ASCII 3AH) representing command and response start.
?Code (ASCII 3FH) representing "That's command"
#Code (ASCII 23H) representing normal response.
%Code (ASCII 25H) representing response against error (abnormal) .
CR Code (ASCII ODH) representing end of command and response .
9-11
Supplement: Sum Check
For improving the reliability of transmission data this module detects error by
means of sum check in addition to parity check. The sum check sequence in this
module is as follows.
(1) Command content ( or response content ) up to last data from AD (H) is

added as ASCII code remained unchanged.
(2) Two-digit hexadecimal number in "SC" field is converted to 8-bit data, which
is then added to the sum of (1). If this result is 0, the message is deemed as
normal.
Hence, sum check code is created by the sequence given below.
Step-1: Add the command content (or response content) up to its last data from
AD (H) with ASCII Code remained unchanged.
Step-2: Obtain " complement of 2 (Note 1)" of lower 1 byte from the sum
created in above (1).
Step-3: Divide 1-byte data created in above (2) into upper 4bit and lower 4bit,
thereafter converting each to ASCII Code.
Note 1) Complement of 2  everse all bits of the binary expressed data ( 01,
10) and add 1 to each.
Note 2) When two characters in the sum check field [SC (H),(L) in command
format are @ (ASCII 40H)", this module does not execute sum check.
Hence, enter "@ @" in a column which needs no sum check. In this case,
however, enter sum check data in this column as far as possible because
the detection rate of transmission error comes down.
9-12
(3) Communication commands
No Function PRG Commands Remarks
1 I/O 1-POINT READ O MRL
2 I/O REGISTER BYTE READ O MRB Unit of 8 points
3 I/O 1-POINT WRITE O SRR
4 I/O REGISTER BYTE WRITE O SRB Unit of 8 points
5 SEQUENCE PROGRAM READ  RPM PRG=1,2,3
6 SEQUENCE PROGRAM WRITE  WPM PRG=1,2,3
7 I/O REGISTER WORD READ O RDR Unit of 16 points
8 I/O REGISTER WORD WRITE O WDR Unit of 16 points
9 SCAN HALT O HLT PRG=0,2,3
10 SCAN HALT(RELEASE) RESET O RUN PRG=0,2,3
11 SCAN RESTART O STA PRG=0,2,3
12 CPU STATUS READ - MPC
13 FILL I/O REGISTER O FDR Unit of 16 points
14 WRITE MODE SETTING - EWR
15 WRITE MODE READ - SWE
16 RESET - RST
PC2 interchange
17 DUMMY SCAN HALT - PSC
mode only
PC2 interchange
18 DUMMY SCAN HALT RESET - PRC
mode only
19 CPU ID READ - IDR
Except extended
20 TIMER/COUNTER SETUP /PRESENT VALUE READ O TCR
timer and counter
Except extended
21 TIMER/COUNTER SETUP /PRESENT VALUE WRITE O TCW
timer and counter
Except extended
22 TIMER/COUNTER SETUP VALUE WRITE O SPW
timer and counter
Except extended
23 TIMER/COUNTER PRESENT VALUE WRITE O PPW
timer and counter
24 PARAMETER READ  PRR
25 PARAMETER WRITE  PRW
26 EXECUTE RIGHT LIMIT SETTING - ELS
27 EXECUTE RIGHT LIMIT READ - ELR
28 CLOCK TIME READ - WTR
29 CLOCK TIME SETTING - WTC
30 FILL SEQUENCE PROGRAM  FIL PRG=1,2,3
I/O REGISTER MULTI-POINT WORD READ & ADDRESS
31 - RDA
REGISTRATION
32 I/O REGISTER MULTI-POINT WORD READ - RDM
33 I/O EXTENDED MULTI-POINT BYTE READ - REM PC3J
I/O REGISTER EXTENDED MULTI-POINT READ &
34 - REA PC3J
ADDRESS REGISTRATION
35 I/O REGISTER EXTENDED MULTI-POINT BYTE WRITE - WEM PC3J
36 EQUIPMENT INFORMATION BYTE READ - IBR PC3J
37 EQUIPMENT INFORMATION BYTE WRITE - IBW PC3J
38 PROGRAM+PARAMETER WRITE START @ RWS PC3J
PROGRAM+PARAMETER WRITE END & STATUS
39 @ ERC PC3J
CONTINUE
PROGRAM + PARAMETER WRITE END & RESET/STATUS
40 @ ERS PC3J
CONTINUE
41 EQUIPMENT INFORMATION WRITE START - IWS PC3J
42 EQUIPMENT INFORMATION WRITE END - IWE PC3J
43 CPU STATUS EXTENDED READ - MPE PC3J
I/O REGISTER EXTENDED MULTI-POINT WRITE &
44 - WEA PC3J
ADDRESS REGISTRATION
PRG: @= Program No. mandatory
O = Omittable( When omitted, link parameter-set program No. But "HLT", “RUN", "STA" commands are handled as PRG=0.)
 = Omittable only under PC2 interchange mode
PC3J: Commands extended for application to PC3J series CPU
9-13
9.5.2. Setting link parameters
(1) Set the rack, slot and link module.

When setting a built-in computer link of PC10G, it is necessary to set the rack No. “built-in”, slot No.
“standard” and link module name "Computer link".
(2) Detailed setting

Set the parameter according to the connecting equipment.
Operating procedure
1. Set the station No.
2. Set the data length.
3. Set the stop bit.
4. Set the baud rate.
Click for the baud rate and select a desired baud rate from the list.
5. Set the 2-wire/4-wire system.
6. When the setting is completed, click [OK].
Note) When the built-in computer link is used in "PC2 Compatible Mode", setting of a link
parameter is unnecessary.
When they are set besides the above, they can become communication error.
9-14
9.5.3. Newly added PC10G computer link command.
Following (1) and (2) are added for supporting PC10 mode.
(Note) Added commands are effective only for PC10 built-in computer link.
(1) Addition of program number

Program Program Format Supplement
number
None Compatible with the address expanded by
0 System in general, etc. PC10's own area.
1 Program-1 Two identifiers JL and JS are added.
2 Program-2 See the list of indirect address for expanded
3 Program-3 address.
(Identifier to be expanded is P, K, V, T, L, X, Y,
The same as before M, S, N, D, JL, and JS)
7 GX,GY,GM (address in 4 digits)
8 U00000 - U07FFF
9 EB00000 - EB07FFF
A EB08000 - EB0FFFF
B EB10000 - EB17FFF
C EB18000 - EB1FFFF
* Compatible with PC10 The address is 6 digits to be compatible with the
(Asterisk) address expanded in PC10.
Identifier FR is added in addition to 4 digits of
the address above.
Address is 6 digits.
See the list of indirect address for expanded
address.
(Identifier to be expanded is U, EB, and FR in
addition to 4 digits of the address above.)
(2) 6 commands are added. (See “CMP command addition for detail)
45. RPD：high capacity sequence program reading
The address 4 digits of RPM and WPM command is
46. WPD：high capacity sequence program writing
changed to 6 digits.
47. EBR：high capacity equipment information
byte reading
48. EBW：high capacity equipment information
byte writing Block number of IBR, IBW, IWS, and IWE command is
49. EWS：high capacity equipment information changed to 2 digits.
writing start
50. EWE：high capacity equipment information
writing end
When the program number is set to "*"

Communication format (asterisk), the address has 6 digits.
Command
Identifier
Command Address
6 digits
Response (in normal mode)
Address
Identifier
Command
6 digits
Response (in abnormal mode)
9-15
Newly added command
45.RPD: Large capacity
sequence program reading
Computer
link
command
Program No.
AD(H)
SC(H)
AD(L)
SC(L)
Address 1 Address 2
CR
RI
: : ? R P D
6 digits 6 digits
Computer link response

Program No.
AD(H)
SC(H)
AD(L)
SC(L)
Address 1 Address 2 Data 1 Data 2 Data N
CR
RI
: : # R P D ・・・・・・・
6 digits 6 digits 4 digits 4 digits 4 digits
46. WPD: Large capacity sequence program reading

Computer link command
Program No.
AD(H)
SC(H)
AD(L)
SC(L)
Address 1 Address 2 Data 1 Data 2 Data N
CR
RI
: : ? W P D ・・・・・・・
6 digits 6 digits 4 digits 4 digits 4 digits

Program No.
AD(H)
SC(H)
AD(L)
SC(L)
Address 1 Address 2
CR
RI
: : # W P D
6 digits 6 digits
47. EBR: Large capacity equipment information byte

reading
Program No.
Number of
2 digits
AD(H)
SC(H)
AD(L)
SC(L)
bytes
Start address
CR
RI
: : ? E B R
4 digits

Program No.
Number of
2 digits
Data N
Data 1
Data 2
Data 3
AD(H)
SC(H)
AD(L)
SC(L)
bytes
Start address
CR
RI
: : # E B R
4 digits
48. EBW: Large capacity equipment information byte writing

Program No.
Number of
2 digits
Data N
Data 1
Data 2
Data 3
AD(H)
SC(H)
AD(L)
SC(L)
bytes
Start address
CR
RI
: : ? E B W
4 digits

Program No.
Number of
2 digits
AD(H)
SC(H)
AD(L)
SC(L)
bytes
Start address
CR
RI
: : # E B W
4 digits
49. EWS: Large capacity equipment information writing start

Program No.
2 digits
AD(H)
SC(H)
AD(L)
SC(L)
CR
RI
: : ? E W S

AD(H)
SC(H)
AD(L)
SC(L)
CR
RI
: : # E W S
50. EWE: Large capacity equipment information writing end

Program No.
2 digits
AD(H)
SC(H)
AD(L)
SC(L)
CR
RI
: : ? E W E

AD(H)
SC(H)
AD(L)
SC(L)
CR
RI
: : # E W E
9-16
9.6. Built-in PC-LINK Function
The maximum of 15 sets of slaves are connectable.

The maximum I/O points which can exchange information are 512 points.
9.6.1. Specification
(1) PC-LINK specification

Items Specification
I/O points Max 512 points/1 port
When 19.2kbps/57.6kbps is selected: Max 384 points
Transmission points per station
When NCx3 selected: Max 512 points
No. of stations Max 16 stations (master 1, slave 15 ) /1 line
I/O allocation Minimum setting unit :8 points
Transmission distance Max 1 km (total length)
Signal level Conforming to EIA RS-422
Communication speed 19.2kbps/57.6kbps/NCx3speed *1 (Presetting)
Synchronous system Start-stop synchronous
Transmission system Half-duplex (2-wire type)
Bit composition JIS 7 unit system, 10 bits
Check system Vertical parity, horizontal parity (Even number)
Cable Shielded twist pair cable
Transmission data at CPU stopping OFF data / Pre-stop data (Be presetting)
CPU operation against communication
Stop/RUN continue (Be presetting)
error
Communication error under
As error /repeat (Be presetting)
connection sequence
*1 This speed is set to communicate with NC machine supporting M-NET3 speed.
9-17
(2) Link No. and Link Area
Link parameters can be optionally set for link No. 1 ~ 8 of program 1 ~3.
If internal relay (M) or link relay (L) is set in the link area, the relay area in program for which the link
parameter was set becomes the link area.
I/O (X, Y) area and extended area (EXEY, EM, EL ) are common to each program.
Link 1-1  1-8 Link 2-1  2-8 Link 3-1  3-8
Program 1 (PRG.1) Program 2 (PRG.2) Program 3 (PRG.3)

Link parameter can
LINK PARAMETER LINK PARAMETER LINK PARAMETER be optionally set for
link No. 1 ~ 8 of
program-1 ~ -3.
I/O (X,Y) I/O (X, Y) area is common

to each program.
PRG.1 INTERNAL PRG.2 INTERNAL PRG.3 INTERNAL If internal relay (M) or link
RELAY (M) RELAY (M) RELAY (M) relay (L) is set in the link
area, the relay area in
PRG.1 LINK RELAY PRG.2 LINK RELAY PRG.3 LINK RELAY program for which the link
(L) (L) (L) parameter was set
becomes the link area.
Extended I/O(EX,EY)
EXTENDED INTERNAL RELAY(EM) Extended area is common

to each program.
EXTENDED LINK RELAY (EL)
9-18
(3) Matters to be attended to operation of I/O relay (X/Y)
Pay attention not to overlap I/O module and I/O address that are connected to CPU are not
overlapped when I/O relay (X and Y) is used in communication area.
X,Y000 X,Y000 X,Y000
O
Allowed
X,Y7FF X,Y7FF X,Y7FF
X,Y000 X,Y000 X,Y000
X
Not
X,Y7FF allowed
X,Y7FF X,Y7FF
Actual I/O and communication When communication area is When actual I/O exist after
inserted between actual I/O communication area.
are overlapped.
and I/O.
I/O modules (input, output, and I/O) connected to CPU
PC-LINK communication area
Application command is not applied for such communication area as I/O refresh (RIO, FUN No. =
280), input refresh (RI, FUN No. = 281) and output refresh (RO, FUN No. = 282).
9-19
9.6.2. Outline of PC-LINK operations
PC-LINK communication includes a connection sequence and a normal sequence.
Check a connecting situation and setting in the connection sequence when power is supplied, and then
exchange ON/OFF information of I/O in a normal sequence.
Master station Slave station
Connection Is connection
sequence No
quence from master station
waited?
Yes
Is connection No
sequence OK? Connection sequence
Yes
Normal sequence Is connection No

sequence OK?
Yes
Is normal Yes
Release error
sequence OK?
No
Connection
Inform error
No
Is normal sequence
Yes OK?
Is reset switch ON?
Yes
No
Inform error
Yes No
Is communication
reset OK? Yes
Is reset switch ON?
No
Yes
Is communication reset
OK?
No
Yes Is connection sequence No

from master station
waited?
9-20
(1) The conceptual figure of data transmission
Master station Slave station 1 Slave station2 Slave station n

I/O
address L000 L000 L000
L000
(M000)
* *
*
**** ****
(Output) (Input)
Slave- (1)
station1
(Input) (2) (Output)
**** *
(Output) (3) (Input)
Slave-
station2 (Input) (4) (Output)
max
continuous
512point
*
****
2N
Slave- (Output ) (Input)
*
station n
(Input) (Output )
2N+1
* *
L7FF L7FF L7FF L7FF

(M7FF)
communication order (1)  (2)  (3)  (4)   2N  2N+1  (1)  (2) (N=1-15)
* ------ Available for internal relay
**** -------- Display a head address of an area to be used for communication in each station.
The head address can freely be set in each station. Not necessary to adjust the address
of the master station. However, those available for communication are only such areas
as a link relay(L), an internal relay(M), an I/O relay(X,Y) a link relay (extended area) (EL),
an internal relay(extended area), an input-output relay(extended area) (EX,EY).
9-21
(2) Connection sequence
The master station checks the existence of connection and examine a coincidence of the
input-output points between the master and the slave station to set from the slave station No.1 to the
slave station No.15.
When the slave station respond to the master station as specified, the connection sequence
becomes OK, in turn, the normal sequence is returned.
The slave station will wait for the connection sequence from the master station after the power
supply begins. Check the input-output points between the master and the slave station. It is not
until the connection sequence becomes OK that a response to a normal sequence from the master
station can be made.
(3) Normal sequence

The master station carries out a normal sequence from slave station No.1 to the last slave station in
turn. In the normal sequence, the master station exchange data with the slave station n by
transmitting an amount equal to set points of ON/OFF data of I/O and receiving an amount equal to
selected points of ON/OFF data of I/O from the slave station n. The master station exchanges data
with the slave station by repeating these actions.
(4) Communication data when CPU stops

PC-LINK performs communication whether CPU runs or stops. However, when CPU is stopped, it
can’t exchange data with an area to communicate with, making all the data to transmit turn into OFF
data.
Stop with CPU reset switch.
Stop with a peripheral equipment → Transmit OFF data
Stop RUN by a CPU error. (Received data is thrown away)
9-22
9.6.3. PC operation timing
The operation of PC is not synchronized with that of PC–LINK, but an I/O data exchange is conducted
at end of each scan.
(1) One scan of PC < One scan of communication

One scan of PC
One scan of
communication
(2) One scan of communication< One scan of communication
One scan of PC
One scan of
communication
: Data of PC link to an internal dummy.

Sending data to PC-LINK
: Receiving data to PC
Exchanging sending data
The time for one scan (communication set by No.1 slave station, and covering the last slave station)
is determined depending on the number of the slave stations and the points of communication.
Communication speed in case of 19.2 kbps

One scan of communication (ms)=1.2X + 9.5N
Communication speed incase of 57.6 kbps X: Total bytes of input-output

One scan of communication (ms)=1.0X + 8.1N N: The number of the Slave stations
Communication speed three times as fast as a normal one.

One scan of communication (ms)=0.5X + 7.3N
Example: Communication speed 19.2kbps,the number of the Slave stations=7, The total bytes of
input-output = 32bytes (256points)
1scan = 1.2 x 32 + 9.5 x 7=104.9(ms)
9-23
9.6.4. Separate Function
When the slave gets in communication error, the master stops communication to all the slaves and
reports error.
The separate function is such that a specific slave is broken away (or reset) from the communication
network.
This function makes it possible to separate the slave that is in the abnormal state from the
communication network and continue communication for other normal slaves.
(1) Specify The slave station to be separated

Specify The slave station to be separated is carried out by setting data in the separate register of the
master PC.
Each bit for each Slave station Bit=1 Specify

Bit=0 No specification
Separate Register(1word)
D15  DA D9 D8 D7  D2 D1 D0
No relation
Specify separation of Slave station No.1

Link 1 - S31C Link 5 - S39C

Note 1) When the separate function is not used, clear the separate register by using a sequence
program. Since the separate register is maintained even after power supply is cut,
separation sometimes still remains without noticing it. In this case communication is still
normally conducted, but all the data turns to OFF data.
Note 2) When the separate register is not 0000, turn off communicating with all the stations.
Note 3) The address of the above separate register is for PC2 compatibility mode and PC3 mode
(data memory division mode)
9-24
(2) Communicating with the separated station
[1] When the separated Slave station is normal,

The master station transmits OFF data of I/O to the separated Slave station, threw away-received
data from The slave station and performs operation, judging that The slave station has accepted
OFF data of I/O. However, it normally communicates with the other Slave stations not separated
regarding ON/OFF data of I/O.
If power supply is conducted or communication is reset in the master station while separation of
the master and The slave station still remains, start the connection sequence like the other Slave
stations start, so the normal sequence conducts exchange of OFF data.
[2] When the separated Slave station causes the communication error
The master station keeps transmitting the connection sequence till the error of the child is
released. If the error is released and a normal response is obtained, it starts again the normal
sequence as in the above [1] and continues the normal sequence to the rest of Slave stations.
[3] When the specify separation is released,

In case of [1] ………exchange a normal I/O data of ON/OFF
In case of [2] ………regard it as a communication error and inform all the Slave stations of such
error and stops communicating with them.
[4] Others
When The slave station that was not separated causes the communication error, inform all the
Slave stations of such error and stops communicating with them.
9-25
9.6.5. PC-LINK communication reset
Perform the reset communication at communication error.
(1) Method
Switch a dummy for the reset from OFF to ON, and the communication is reset.
Reset is available only for a rise time to switch it from ON and OFF .
Address Content Address Content
V80 Reset communication 1 V84 Reset communication 5
Note) The above addresses of special relays are for PC2 compatibility mode and PC3 mode
(data memory division mode).
(2) Reset timing
1 scan
: END processing
PC Data exchange with
PC-LINK
Reset
communication
Communication error Connection sequence
Initial set Normal sequence
PC-LINK
Reset Read out a link
parameter.
PC-LINK starts the same operation as in the commencement of power supply by the reset
communication.
(After execution of a communication sequence start I/O data exchange by a normal sequence)
Note 1) The reset communication is performed with a reset start switch of CPU.
Note 2) The reset communication is available only during the period of communication error. However,
when the link parameter is abnormal, it can’t become effective, so supply power again or
turn on the reset start switch after rewriting the parameter.
9-26
(3) Release communication error
Supply power again, or turn on the reset start switch, or reset communication in the master station,
and the communication error is released, which starts communication again. It is not necessary to
reset communication in the Slave station. The slave station responds to the connection sequence
from the master station during the communication error and such error is released by accepting the
connection sequence, which makes responding to the normal sequence available.
However, when the link parameter is modified, supply power again or turn the reset start switch of
CPU on in The slave station.
Master Slave
station station
Communication error
Master station Slave station.

Inform error Inform error
Communication reset
Connection sequence
Master station Slave station.
Inform error Inform error
Connection sequence
Slave station.
Master Inform error
station
(4) An example of communication reset circuit

[1] When the reset communication circuit is used.
Even when scattering occurs at the time of power supply, it can’t be regarded as a
communication error, so it is a circuit to reset for 2 seconds after power is supplied.
First scan
V06 T000
[ TIM K=0002.0 ] SET:2.0seconds
Special relay of
communication VA2 T000 V80
error.
Communication
reset
Communication
reset
Press button
T000 Y000
signal for VA2
communication Communication
reset error
V06 FUN No.1
Clear separate
[ WMOVP 0000 → S31C ]
resister
Separate register
Note 1) The above is the example for a circuit in the case of link No.1
The communication error special relay, reset communication push button signal and separate
register differ depending on link number.
Note 2) Never fail to clear the separate register when it is not used.
9-27
[2] When using the separate register,
When “[1] When the reset communication is used" is employed and the raising of the power
supply is delayed, “LINK ERROR”(error code :86) is stored in a register for outputting an error
information” (error code :86).
This circuit won’t display “LINK ERROR” for 2 seconds after power is supplied and is a circuit not
to store the error code in the register for outputting the error information.
No. 1 scan Separate register

V06 FUN No.101
[ WMOV FFFFh → S31C ] Separate
register set
V06 T00
[ TMR K=0002.0 ] SET:2.0 seconds
T00 P00 FUN No.101

[ WMOV 0000h → S31C ] Clear separate
register
Separate register
After supplying power, separate all the stations and doesn’t inform them of any error for 2 seconds
and then release separation, followed by a normal communication.
Note 1) In the above circuit, link No.1 is used.

Make sure that the separate register changes depending link No.
Link No. Separate register Link No. Separate register
1 S31C 5 S39C
2 S33C 6 S3BC
3 S35C 7 S3DC
4 S37C 8 S3FC
The address of the separate register changes in PC3 mode. (single data memory mode)
Note 2) When connecting with a FS terminal (V1.00) with a built-in PC-LINK as a master station,
put in a PC10G sequence a circuit employing the above [2] separate register. If this circuit
doesn’t exist, it causes communication error which may hinder communication.
9-28
9.6.6. PC-LINK status
PC-LINK informs a CPU special register of status information (the communication status of the slave
station, the connection status of the slave station)
Setting data in the separate register can separate the slave station.
MSB LSB
Address F E D C B A 9 8 7 6 5 4 3 2 1 0 Use
S3*0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 The communication status of the slave station
S3*1
S3*2 Slave station No.
S3*3
S3*4
S3*5
S3*6
S3*7
S3*8
S3*9
S3*A
S3*B
S3*C 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 The communication status of the slave station
S3*D
S3*E
S3*F
S3x0 Error information (error code)
S3x1 Error information (error No.1 of detail)
S3x5 Error information (error code stack No.1)
S3xA Error information (error code stack No.6)
S3xB Error information (error code stack No.7)
S3xC 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Separate the slave station
S3xD
S3xE
S3xF
Code of *and x
Link No. 1 2 3 4 5 6 7 8
* 0 2 4 6 8 A C E
x 1 3 5 7 9 B D F
Note) In a single data mode the address is as follows.

Program 1 S3#0∼
Program 2 ES0#0∼
Program 3 ES1#0∼
* and x are put into above #.
9-29
Inform communication status function
PC-LINK incorporated in PC10G conveys the status information to a special register (the
communication status of the slave station, and the connection status of the slave station)
(1) The communication status of the slave station

Inform the special register, “S 3*0”, of the communication status of the slave station.
MSB LSB
The communication status of
S3*0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 the slave station
The slave station No.

Code of *
Link No. 1 2 3 4 5 6 7 8 When informing the communication
* 0 2 4 6 8 A C E status, there may arise a time lag at the
maximum of several millions of ms.
In the master station,

The bit becomes “ 1” corresponding to The slave station that performs normal communication.
(Even in the separate state, the bit becomes “1” if communication is carried out)
1:The slave station performing a normal communication.
0:The slave station where communication is not performed
When communication error occurs, the bit becomes “0” corresponding to The slave station that
detects the error and the other Slave stations retain the contents of state just before the
occurrence of error (when the communication error occurs communication isn’t really carried out,
but the bit remains “1” corresponding to The slave station where the normal communication was
carried out just before the error occurred).
In The slave station,

When the link parameter is set, the bits that are set as connected in a local station alone
become “1”. The bits all become “0” when the communication error occurs.
(2) The connection status of the slave station

Inform the special register, “S 3*C”, of the communication status of the slave station
MSB LSB
The communication status of
S3*C 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 the slave station
In the master station,

When the link parameter is set, the bit that is set as connected, corresponding to the slave
station, becomes “1”.
In The slave station,

When the link parameter is set, among the bits that are set as connected, only those
corresponding the local station, become “1”.
9-30
(3) Diagnostic method of communication error
Execute using the separate function and the communication status of the slave station.
Example of diagnosis (PC-Link master station on an operation board is assigned to link No.1)
Slave station No.2 Slave station no.4
PB2 PB2
Wiring for back up
Slave station 1 Slave station 3

Open circuit
PB2 PB2
Operation board PB2
Communication wire
PB2Photo branch switch
[1] Separate all the connecting stations.

[2] Reset communication.
[3] Monitor the connection status and communication of the slave station.
MSB LSB
S300 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0
S30C 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0
Slave- station No.2 and No.4 are impossible to be communicated with.

Judged as an open circuit between No.3 and No.4 stations according to a link system
diagram.
[4] Distributing and connecting wires

[5] Monitor the statuses of connection and communication of the slave station
MSB LSB
S300 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0
S30C 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0
Make sure that there are no slave station which cause communication error.
[6] Release as separation and restart operation.
9-31
9.6.7. Setting link parameters
(1) Set the rack No., slot No. and link module.
When setting a built-in PC-LINK in PC10G, it is necessary to set the rack No. to “Built-in” and slot No.
to “Standard”, select link module name to “PC link master” or “PC link slave”.
9-32
(2) Detail setting of link parameter
PC link master setting
When setting up PC link in PC10G, rack No. is set as "Built-in" and slot No. is set as an "Option." And
it is necessary to set up [Soft SW].
Operating procedure
1. Set the head address of a link area.

The range available for input
Link relay L00L - L7FH
Internal relay M00L - M7FH
Input-output X/Y00L - X/Y7FH
Link relay (extended area) EL000L - EL1FFH
Internal relay (extended area) EM000L - EM1FFH
Input-output (extended area) EX/Y000L - EX/Y7FH
2. Set up the connective slave stations.

Select the slave station to connect and click the set slave station.
3. Set up the number of transmission bytes.

The sum total of the number of transmission is to 64 bytes.
4. Click [Soft SW] to set up a soft switch.
5. If a setup is completed, click [OK].
Memo
The error check of the contents of a setting is performed about the following four items.
1. Is head address of link area right?
2. Is the number of transmission bytes right?
3. Is sum total of the number of transmission bytes less than 64 bytes?
4. Doesn't sum total of the number of head address of link area and transmission bytes exceed
the area?
9-33
Software switch setting (master station)
The following parameter needs to be setup when PC-LINK in PC10G is used. Click each item for
detail settings.
Operating procedure
1. Select the state of transmission data at CPU stop.

● Transmission data in CPU halt
OFF data
Off DATA is transmitted at the time of CPU stop.
Data before halt
Data before a stop is transmitted at the time of CPU stop.
2. Select state of CPU RUN at the time of the communication error.

● CPU operation in the communication error.
Halt
CPU is stopped at the time of the communication error.
RUN Continued
CPU RUN is continued at the time of the communication error.
The special relay for communication error is turned ON.
9-34
3. Select the communication error in connection sequence.
● Communication error in connection sequence
Treat as error
When the communication error in connection sequence, communication is stopped.
Power-supply turn-on order is Slave -> Master.
If power-supply turn-on order is Master -> Slave that communication be stopped.
Repeat
The connection sequence is repeated until all Slave end a connection sequence.
Therefore, communication error does not occur in either order of the power supply,
master to slave or slave to master
However, since communication error is not reported even if the communication line is
disconnected at the time of a power-supply turn-on, please be careful.
4. Select the baud rate of communication.

● Baud rate of communication
Select the baud rate of communication.
57600 bps
19200 bps
NC *3times speed
5. Select 2-wire or 4-wire.

2-wire is chosen in PC10G.
6. If a setup is completed, please click [OK.].
9-35
PC link slave setting
When setting up PC link in PC10G, rack No. is set as "Built-in" and slot No. is set as an "Option." And
it is necessary to set up [Soft SW].
Operating procedure
1. Set the head address of a link area.
The range available for input
Link relay L00L - L7FH
Internal relay M00L - M7FH
Input-output X/Y00L - X/Y7FH
Link relay (extended area) EL000L - EL1FFH
Internal relay (extended area) EM000L - EM1FFH
Input-output (extended area) EX/Y000L - EX/Y7FH
2. Set up the connective slave stations.

Select the slave station to connect and click the set slave station.
3. Set up the number of transmission bytes.

The sum total of the number of transmission is to 64 bytes.
4. Click [Soft SW] to set up a soft switch.
5. If a setup is completed, please click [OK.].
Memo
The error check of the contents of a setting is performed about the following four items.
1. Is head address of link area right?
2. Is the number of transmission bytes right?
3. Is sum total of the number of transmission bytes less than 64 bytes?
4. Does not sum total of the number of head address of link area and transmission bytes exceed
the area?
9-36
Software switch setting (Slave station)
The following parameters need to be set up when built-in PC LINK is used.

Click each item for detail settings.
Operating procedure
1. Select the state of transmission data at CPU stop.

● Transmission data in CPU halt
OFF data
Off DATA is transmitted at the time of CPU stop.
DATA before halt
Data before a stop is transmitted at the time of CPU stop.
2. Select state of CPU RUN at the time of the communication error.

● CPU operation in communication error.
HALT
CPU is stopped at the time of the communication error.
RUN Continued
CPU RUN is continued at the time of the communication error.
The special relay for communication error is turned ON.
3. Select the baud rate of communication.

● Baud rate
Select the baud rate of communication.
•57600 bps
•19200 bps
•NC *3times speed
Attention
Communicating with NC machine which corresponded to NC*3times speed, if a
setup of baud rate is set to 57600bps, the check of communication error may not be
made.
4. Select 2-wire or 4-wire.

2-wire is chosen in PC10G.
5. If a setup is completed, click [OK].
9-37
9.7. Built-in FL-net Function
FL-net function is described in this section.
9.7.1. Specifications for the FL-net

1 Physical Layer 10BASE-T , 100BASE-TX
2 Data Transfer Rate 10Mbps , 100Mbps
3 Maximum cable length*1
Max 100m (between node and node (when connected one by
one), between node and HUB / between HUB and HUB)
Total extension: Max 2100m (HUB: 20 units max)
4 Maximum Number of 241(254 stations)*2
Nodes
5 Data link function
Communication Functions Message server function
Message client function
6 Relay Link Capacity 512 words
7 2048 words / 6144 words / 8192 words
Register Link Capacity
(switching depending on link parameter)
8 Message Data Capacity 1024 bytes
*1 Designated HUB is auto negotiation. When auto negotiation is connected with each other, 100Mbps is
applied.
*2 ( ) represents the node count including maintenance.
9.7.2. Specifications for Data Link
Specifications
No Item
L000 - L7FF
L1000 - L2FFF*2
M000 - M7FF
M1000 - M17FF*2
X･Y000 - X･Y7FF R000 - R7FF
EL000 - EL1FFF D0000 - D2FFF
1 Link Area *1
EM000 - EM1FFF U0000 - U1FFFF*2
EX･EY000 - EX･EY7FF EB00000 - EB3FFFF*2
GX･GY0000 - GX･GYFFFF
GM0000 - GMFFFF
Refer to 9.7.4 for using XY
area.
2048 words / 6144 words / 8192
2 Link Capacity 512 words words
(Selectable with dip switches.)
Transmission
3 ↑ ↑
Capacity per Unit
Communication
4 N:N or 1:N N:N or 1:N
Method
*1 Usable area is limited by the setting of operation mode and memory capacity.
*2 L1000-L2FFF M1000-M17FF U08000-U1FFFF EB00000-EB3FFFF can be used only in PC10 mode. It
cannot be used in PC10 standard mode.
9-38
9.7.3. Data Link Method
The data link method supports N:N (N to N) and 1:N (1 to N) connections. With N:N connections, the
transmission area for a node (station) is the reception area for another node and data is shared by
different nodes as shown below.
Node 1 Node 2 Node 3 Node 4

Reception area Reception area Reception area
Transmission area
Reception area Transmission area Reception area Reception area
Reception area Reception area Reception area

Transmission area
Reception area Reception area Reception area Transmission area
With 1:N connections, communication is performed between a node designated as 1:N Master and
those as 1:N Slaves. No data link is established among 1:N Slaves.
1:N Master 1:N Slave 1:N Slave 1:N Slave

Transmission area Reception area Reception area Reception area
Reception area Transmission area Transmission area Transmission area

Reception area
Reception area
Nodes with N:N connections and those with 1:N connections may coexist on a single network.
N:N or N:N or
1:N Master 1:N Master 1:N Slave 1:N Slave
Reception area Transmission area Reception area Reception area
Transmission area Reception area Transmission area Transmission area

Reception area Reception area
Reception area Reception area
9-39
9.7.4. Caution in Using I/O (X/Y) Area in Communication Area
(1) Take care not to overlap with I/O addresses of the I/O module connected with the CPU.
It overlaps, and when it sets up, an error "86" (communication error) occurs in CPU.
X/Y000 X/Y000 X/Y000
Acceptable
X/Y7FF X/Y7FF X/Y7FF
X/Y000 X/Y000 X/Y000
 Not acceptable
I/O and communication Communication area Communication area

areas overlapped put between I/O followed by I/O area
areas
I/O area of PC Where I/O area of PC and communication

Communication area of FL-net area of FL-net are overlapped
(2) I/O refresh (RIO: FUN No. = 280), I refresh (RI: Fun No. = 281), and O refresh (RO: Fun No. = 282)
for instructions cannot be used in the communication area.
9-40
9.7.5. Message Server Function
With this function, a response is made to a command message sent from another node.
The command and response are automatically processed by the FL-net module and CPU module.
Parameter settings and sequence program processes are not necessary for this function.
Please refer to the manual of the PC3J/2J FL/ET-T-V2H module or 2PORT-EFR module for details.
Command
Response
9.7.6. Message Client Function
With this function, a command message is sent to another node and the response to that message is
received.
The sequence program generates the command data, gives instruction to send it to the FL-net , and
loads the response data from the FL-net module to the register.
Command
Response
9.7.7. Node Status Loading Function
The status of another node participating in the FL-net communication may be loaded to the register with
the sequence program.
9-41
9.7.8. Monitor Function
The nodes (stations Nos. 1 to 254) participating in the FL-net communication can be monitored with
special registers S3*0 to S3*F. Correspondence between the station No. (hexadecimal) and the bit
address is shown below.
MSB LSB
F E D C B A 9 8 7 6 5 4 3 2 1 0
S3*0 0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01
S3*1 1F 1E 1D 1C 1B 1A 19 18 17 16 15 14 13 12 11 10
S3*2 2F 2E 2D 2C 2B 2A 29 28 27 26 25 24 23 22 21 20
S3*3 3F 3E 3D 3C 3B 3A 39 38 37 36 35 34 33 32 31 30
S3*4 4F 4E 4D 4C 4B 4A 49 48 47 46 45 44 43 42 41 40
S3*5 5F 5E 5D 5C 5B 5A 59 58 57 56 55 54 53 52 51 50
S3*6 6F 6E 6D 6C 6B 6A 69 68 67 66 65 64 63 62 61 60
S3*7 7F 7E 7D 7C 7B 7A 79 78 77 76 75 74 73 72 71 70
S3*8 8F 8E 8D 8C 8B 8A 89 88 87 86 85 84 83 82 81 80
S3*9 9F 9E 9D 9C 9B 9A 99 98 97 96 95 94 93 92 91 90
S3*A AF AE AD AC AB AA A9 A8
S3*B BF BE BD BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
S3*C CF CE CD CC CB CA C9 C8 C7 C6 C5 C4 C3 C2 C1 C0
S3*D DF DE DD DC DB DA D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
S3*E EF EE ED EC EB EA E9 E8 E7 E6 E5 E4 E3 E2 E1 E0
S3*F FE FD FC FB FA F9 F8 F7 F6 F5 F4 F3 F2 F1 F0
.
.
.
S3xF Own node number(hexadecimal)
Bit 1 = Participating in the communication
Bit 0 = Not participating in the communication
██ “*” and ”x” in the special register No. is determined by the link No.
Link No. 1 2 3 4 5 6 7 8
* 0 2 4 6 8 A C E
x 1 3 5 7 9 B D F
If the link No. of the PC10G FL-net is 5, for example, the station with node No. 85 (55h) may be
monitored by checking the fifth bit of S355.
The above area is cleared with reset/start or the power supply switching off.
Moreover, PC10G FL-net secedes from the communication line, and starts the communication joining
processing by reset again.
9-42
9.7.9. Communication response time of FL-net
(1) Refresh cycle time

Communication of FL-net has adopted the masterless token system. Time from the acquisition of a
certain node of the token(Transmission right) to the next acquisition of the token(Time for a token to
take 1 round) is called " refresh cycle time ".
Refresh cycle time(average) T=P(1.375+0.0275P)+0.004N [ms]

P: nodes number
N: Number of words in which total of all nodes is put on number of
transmission words of each node
(Number of transmission words=Number of relay link transmission
words + Number of register link transmission words)
(2) Response time

Response time is time from turning on the input by the transmission side PLC to the output by the
reception side PLC turns on.When it communicates by CPUs.
Composition Transmission side PLC Reception side PLC

CPU CPU
output
input
Response time (average) R=25+T+1.6P+10(K-1)+0.024*n1+Tsc1*2+Tsc2*2+TID+TOD [ms]

T: refresh cycle time
P: node number
n1: Number of transmission words of transmission side nodes
K: number of packets (=n1/512 Decimal point up valuation)
TSC1: scanning time by transmission side PLC
TSC2: scanning time by reception side PLC
TID: Input module delay time
TOD: output module delay time
9-43
9.7.10. Initial Settings of the FL-net
9.7.10.1. Initial Setting Procedure
Setting procedure upon system start-up

Note: PCwin is required to set parameters of the FL-net.
The PCwin’s version may be checked by selecting 'Version Information' under the Help menu.
Start
Set switches. See (1) 'Switch Settings.'
Set link module name See (2) 'Link Module Name.'
Set link parameters. See (3) 'Link Parameters.'
Set network parameters. See (4) 'Network Parameters.'

(In usual, it is not necessary to change default values.)
Power off and on or

reset and start.
9-44
(1) Switch settings
L1/L2 communication selection switch
BATTERY
TIP-5426 MODE
1st./
2nd./
1.00 I/F
FL
L1 ET
RMT
FL
L2 ET
RMT
a. L1 Auto 10M
b. L2 Auto 10M
c. L1 SEL. DM
d. L3 T-ON T-OFF
ON OFF
a. Switching of communication speed at L1 port

When it is ON, communication in auto-negotiation mode.
When it is OFF, communication at 10Mbps.
b. Switching of communication speed at L2 port
When it is ON, communication in auto negotiation mode.
When it is OFF, communication at 10Mbps.
c. When using L1 port in FL-net, set at L1SEL.
9-45
(2) Link Module Name
Select the link No. to be assigned to the FL-net module and specify the rack No., slot No. and link
module name on the 'Link Parameter' window under 'Parameter' of PCwin.
If the switch positions, I/O module ID code, capacity in the link module name (8KB, 16 KB, or 32 KB)
are inconsistent, a link parameter error occurs.
Example of setting
(3) Link Parameters
After specifying the link module name, set link parameters.
Set the following parameters.

[1] Node No.
[2] Node name
[3] State of output in halt
[4] State of input in other node separation
[5] Communication methods
[6] Data link parameters
[7] Network parameters
These parameter values are usually specified by the network administrator at the end user.
9-46
(3)-1 Node No.
Specify the station No. of the FL-net module with 1 to 159 and168 to 249.
It should not be the same with another node (FL-net station).
If two or more nodes have the same No., the node that attempted later to participate in the
communication cannot do so. In this case, error code E7 (node No. duplicated) appears on the
LED display at the front of the module.
(3)-2 Node Name
Enter the node name of the FL-net module using up to 10 alphanumeric one-byte characters. This
field may be kept blank.
The specified node name is read as response data to the 'Request for Reading Network
Parameters' command from the host computer or such.
(3)-3 State of Output in Halt
Specify the status of relay link and register link outputs with the CPU module not running. If 'Clear'
is checked, the data sent through the data link to your module becomes all zeros when the CPU
module stops running. If 'Hold' is checked, the same data is continuously sent as directly before
the CPU module stops running.
(3)-4 State of Input in Other Node Separation
Specify, for the relay link and register link, how to process the data received from another node
when that node is separated from the network.
If 'Clear' is checked, the data received from the separated node becomes all zeros. If 'Hold' is
checked, the data remains the same as directly before the node is separated.
Note:
The data sent from another node not participating in the communication is kept 00. If your module
participates in the communication after a participant node leaves the communication, the data sent
from that node is also kept 00.
If your module and another node participate in the communication at the same time and the other
node leaves after that, the data status depends on the setting of 'State of input in other node
separation.'
9-47
(3)-5 Communication Methods
Select the data link method from 'N:N or 1:N (Master),' '1:N (Slave),' or 'No Datalink (Message
only).'
1) N:N or 1:N (Master)

With N:N connections, the transmission area for a node (station) is the reception area for
another node and data is shared by different nodes. Select this mode for the master station
that communicates with 1:N connections.
For detail, see the subsequent sections.

Transmission Reception area Reception area Reception area
area
Reception area Transmission Reception area Reception area
area
Reception area Reception area Transmission Reception area
area
Reception area Reception area Reception area Transmission
area
2) 1:N (Slave)
Data is linked with a single station in this mode.
An example where 'N:N or 1:N (Master)' has been selected for node 1 and '1:N (Slave)' for
nodes 2 to 4 is given below.
For detail, see the subsequent sections.
This mode saves the memory space at substations and permits the sharing of the sequence
program.
N:N or 1:N Master 1:N Slave 1:N Slave 1:N Slave

Transmission Reception area Reception area Reception area
area
Reception area Transmission Transmission Transmission
area area area
Reception area
Reception area
3) No Data link (Message only)

No data is linked in this mode. The module participates in the FL-net communication and only
exchanges messages.
9-48
(3)-6 Data Link Parameters
If 'N:N or 1:N (Master)' or '1:N (Slave)' has been selected, click the Data Link button and set
communication parameters.
For the data linkable area, see 9.7.2 'Data Link Specifications.'
1) N:N or 1:N (Master)

On the FL-net network, data is transmitted and received via the 'common memory,' a virtual
memory space shared by all nodes participating in the communication.
As a node transmits data to the common memory, the data is received by other nodes and
shared by the respective nodes.
The destination address on the common memory and data size may be specified in units of word
(16 bits) for each node. Order of node No. does not coincide with that of destination address.
Example:
Common memory
Address 0000
Transmission area for node 1
Areas on the common memory to which data is to be transmitted from different nodes should
be not be overlapped. If they are overlapped, E8 (relay link area overlap) or E9 (register link
area overlap) appears on the LED display at the front of the node that participated in the
communication later.
Example:
Transmission
area for node 1 Transmissions
areas for nodes 2
and 3 are
Transmission
overlapped.
area for node 10
Communication
Transmission error occurs with
Transmission node 2.
area for node 2 area for node 3
9-49
In the 'N:N or 1:N (Master)' mode, it is necessary to specify the data range starting at the top of
the common memory, the corresponding top address on the CPU module register, and the top
address and size of the area to which data is transmitted from your module, using the following
four parameters.
Common memory address 0000 corresponds to the top address of the link area.
 Link area top address ...[1]

Specify the top address of the link area in units of word.
This address corresponds with address 0000 on the common memory.
 Link area words ...[2]
Specify the size of the whole area data in which is to be refreshed in units of word.
 Transmission area top address ... [3]
Specify the top address of the area to which data is to be transmitted from your module in
units of word.
 Transmission area words ... [4]
Specify the size of the transmission area in units of word.
PLC internal register Common memory

[1] Address 0000
Reception
area
[3]
[2] [4]
Transmission
area
Reception
area
Note:The node No., the destination address on the common memory, and data size are usually
determined by the network administrator at the end user.
9-50
Example 1
(Relay link)
[1] [2]
[3] [4]
Correspondence between the register data and the common memory with the above
parameter settings is shown below.
Address Address
PC internal register Common memory
L000 0000
Reception
area
L100 0010
16 Transmission
words L1FF area 001F
64 words
Reception
area
L3FF 003F
Note: Common memory addresses are expressed in units of word (16 points).
For example, L01W represents 16 points from L010 to L01F.
(Register link)
[1] [2]
[3] [4]
Correspondence between the register data and the common memory with the above
parameter settings is shown below.
Address Common memory Address

PC internal register
R000 0000
Reception
area
1536 words R300 0300
512 Transmission
words area
R4FF 04FF
Reception
R5FF area 05FF
9-51
Example 2
Node No. 1
Node No. 2
If the above parameter settings are used for two nodes respectively, the data transmitted from
L100 to L1FF on node 1 is further transmitted to the same addresses on node 2 via the
common memory as shown below.
The data transmitted from L280 to L47F on node 2 is reflected on the common memory but
data from L400 to L47F is not accepted by the link area on node 1, L000 to L3FF, and
consequently not read by node 1. In this case, data from L280 to L3FF on node 2 is received
at the same addresses on node 1.
Address Data on node 1 Common memory Data on node 2 Address

L000 L000
L100 Data on node 1 L100

Transmission
Reception area
L1FF area
L280 L280
Data on node 2
Reception Transmission
area area
L3FF
L47F
L5FF
9-52
The link area top address does not need to be the same for all nodes. If the following settings
are used for node 2, data is exchanged between nodes 1 and 2 as shown below.
Address Address
Data on node 1 Common memory Data on node 2
L000 M100
L100 Data on node 1 M200

Transmission
Reception area
L1FF area
Data on node 2
L280 Reception
M380
area
Transmission
area
L3FF
M57F
M6FF
9-53
Example 3
Node No. 10
Node No. 128
Node No. 249
If the above settings are used, data is linked as shown below.
9-54
 Relay link
Data on node 10 Data on node 128 Data on node 249

X400 L000 M000
Reception Reception
Transmission
area for area for
area
node 128 node 128
X600 Reception L200 Reception M200
Transmission area for area for node
area node 10 10
X700 L2FF M300
Reception
area for node Transmission
X7FF 254 area
M3FF
Note: Relay link addresses may be specified in units of word (16 bits). X40W represents
X400 to X40F.
 Register link

R000 L000 D000
Transmission Reception Reception

area area for area for
node 10 node 10
R400 D500 D400

R500 D600 D500
Reception area Transmission Reception area
for node 128 area for node 128
D6FF
Reception area
R6FF for node 254
D6FF
Transmission
area D7FF
Note: Relationship between link area and transmission area
The transmission area defined by the 'transmission area top address' and 'transmission area
words' should be completely contained in the link area defined by the 'link area top address'
and 'link area words.'
For example, the following settings are not acceptable because the transmission area (L300 to
L47F) overflows the link area (L000 to L3FF). (An error message appears with such settings.)
9-55
2) 1:N (Slave)
In the 1:N (Slave) mode, data is only linked with a single station specified by the link parameter.
In this mode, it is necessary to specify the station (node) from which data is to be received, the
number of words to be received, the register at which data is to be stored, the address on your
module from which data is to be transmitted, the number of words to be transmitted, and the
top address on the common memory (*1) to which data is to be transmitted, using the following
parameters.
 Master node No. ... [1]

Specify the node No. of the station with which data is to be communicated between 1 and
249. Any No. within this range is acceptable. It is not necessary to consider node Nos. of
substations.
 Reception area starting address ... [2]
Specify the top address of the register used to store data received from the master station in
units of word.
 Reception words ... [3]
Specify the number of words to be received from the master station.
 Transmission words ... [4]
Specify the number of words to be transmitted from your module. (The top address of the
data transmitted from your module directly follows the ending address of the reception area.)
 Common memory (*1) transmission area starting address ... [5]
Specify the common memory (*1) address of the data to be transmitted from your module.
(*1): The common memory is a virtual memory space shared by all nodes participating in the
communication. The FL-net data is linked via the common memory.
Address 0000
[2]
Reception [3]
area
Transmission [4] [5]

area
9-56
Data is linked as shown below on the whole network.
N:N or 1:N Master 1:N Slave 1:N Slave 1:N Slave

Transmission area Reception area Reception area Reception area
Reception area Transmission area Transmission area Transmission area

Reception area
Reception area
Note: The node No., the destination address on the common memory, and data size are
usually determined by the network administrator at the end user.
Example 1
With the above settings, data is linked as shown below.

Address
0000
Address
L000 Master station
transmission area
Reception 32 words
area specified by station No.
(32 words)
L200
Transmission
20 words 0100
area
Note: The data transmitted from the master station to any address on the common memory is
received from that address. Therefore, it is not necessary to specify the starting
address of the transmission area for the master station.
9-57
 If the number of words specified by 'Recv. words' is smaller than the actual number of
transmission words from the master station:
Overflown part of the transmission data from the master station (last 8 words in the
following example) is not received.
PLC internal register Common memory Address

0000
Address
L000
Master station
Reception 32 words transmission area
area specified by node No.
Area not
L200 (40 words)
received
Transmission 20 words 0100
area
 If the number of words specified by 'Recv. words' is larger than the actual number of
transmission words from the master station:
Part of the reception area not filled with the data transmitted from the master station (last
16 words in the following example) is filled with 0.
PLC internal register Common memory Address

0000
Address
Master station
L000 transmission area
32 words specified by station No.
Reception
area (16 words)
This area is filled
L200 with 00.
Transmission 20 words 0100
area
Note: If the hierarchical order of transmission areas on the common memory changes, the
order of reception and transmission areas at the PLC internal register remains
unchanged.
Reception
area
Transmission
area
Master station
transmission area
specified by station No.
(32 words)
9-58
Node No. 100
Node No. 64
Node No. 150
9-59
 Relay link

(Master) (Slave) (Slave)
X400 L000 M000
Reception Reception
Transmission area for area for
area node 100 node 100
X5FF L1FF M1FF
X600 Reception Transmission L200 Transmission M200
area for
node 64 area area
X700 L2FF M2FF
Reception
area for
X7FF node 150
Note: Relay link addresses may be specified in units of word (16 bits). X40W represents
X400 to X40F.
 Register link

(Master) (Slave) (Slave)
D000 L000 D000
Reception
area for
Transmission Reception node 10
area for D1FF
area D200
node 10
Transmission
area
D3FF D4FF D3FF
Transmission D580
D500
Reception area D67F
area for
node 150
D6FF
D780
Reception area
for node 64
D87F
9-60
(3)-7 Network Parameters
Network parameters do not need to be changed in usual cases. Do not change them unless
otherwise instructed by the network administrator.
Click the Network button and change the network parameters.
 Network Address
The FL-net communicates using the UDP/IP protocol. Specify the former 3 digits of the IP
address to be used for this protocol as network address. The forth digit of the IP address
represents the node No.
If the network address is 192.168.250 and the node No. is 100, for example, the IP address is
192.168.250.100. As PING is sent to this IP address from a personal computer or such, a
response is made by the FL-net module.
The FL-net broadcasts data using the UDP/UP protocol. At this time, it sends the IP address
with the forth digit replaced by FFh as destination IP address. For the node with the IP address
of 192.168.250.100, for example, the destination IP address is 192.168.250.255.
All nodes on a single FL-net network should have the same network address.
Any node with a different network address cannot receive data from other nodes and the data
transmitted from that node is not received by other nodes. Care is required because all data is
monitored by the Ethernet analyzer.
The FL-net standards require the network address be defaulted as 192.168.250.
9-61
 Token Monitor Time-Out Time
For the FL-net communication, each node rotates the token (right to transmit) among other nodes
in ascendent order of node No. The node that has received the token transmits data in the data
link transmission area and message data, if any, as divided into frames each consisting of 1024
bytes or less and adds the token to the last frame to hand it over to the next node.
The token monitor time-out time means the permissible longest time to be spent after the token is
transmitted by the prior node until it is transmitted to the next node. If the token is not transmitted
within this time, the next node reissues the token. If this occurs three times, the node that fails to
transmit the token is considered to have left and no longer given with the token.
If 'Auto' has been checked, the token monitor time-out time is automatically determined from the
data size of the transmission area with the following formula.
Token monitor time-out time =(1+5)+(TBN+1+1)*(1+5) ms

Maximum value of frame intervals
Maximum data transmission time
Spare
Message frame
Total number of cyclic data blocks
Maximum value of frame intervals (*2) Time taken by
Maximum data transmission time (*1) prior node
1ms 5ms 1ms 5ms 1ms
Token Token
(*1): The time required to put 1024-byte data on a 10 Mbps communication line.
(*2): The maximum value of minimum permissible frame intervals (for detail, see the next section).
To manually preset the token monitor time-out time, remove the check mark in the check box
before 'Auto' and enter a desired value between 10 and 255.
If the token is not transmitted within the preset token monitor time-out time, error code EA appears
on the LED display at the front of the module. In this case, increase the token monitor time-out
time.
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 Minimum Permissible Frame Interval
The frame interval means the interval between two successive data frames where no data is
exchanged through the line.
Data frame Data frame
Frame interval Time
For the FL-net communication, the minimum permissible frame interval has been preset for each
node and its value is always transmitted. Each node always monitors the minimum permissible
frame interval values of other nodes and the largest value of all nodes becomes effective. The
minimum permissible frame interval is changeable between 0 ms and 5 ms. If nodes with three
minimum permissible frame interval values of 1 ms, 3 ms and 5 ms coexist, for example, 5 ms
becomes effective and all data frames are transmitted through the line at intervals of 5 ms.
This parameter is intended to adjust the data volume through the line per unit time so that nodes
even with a lower processing rate can participate in the communication.
The minimum permissible frame interval has been preset to the default of 1 ms for PC10G-CPU.
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9.8. Built-in Ethernet function
This section describes functions of the Ethernet.
9.8.1. Specifications for the Ethernet

1 Physical layer 10BASE-T/100BASE-TX
2 Transmission Rate 10Mbps, 100Mbps
Max 100m (between node and node (when
3 Maximum cable length*1 connected one by one), between node and HUB /
between HUB and HUB)
4 (1)Computer Link Function
Communication Facility (2)File Memory Function
When the setting of the link parameter is “Ethernet”
5 Max. 8 ports
Openable Port Number When the setting of the link parameter is “Ethernet(32
ports)”
Max. 32 ports
6 Computer Link Data Capacity Max.1K byte
7 Transmission: 2 K bytes
File Memory Capacity
Reception: 2 K bytes
*1 Designated HUB is auto negotiation. When auto negotiation is connected with each other, 100Mbps is
applied.
9.8.2. Communication with Computer Link Method
Transmit a command from another node to read/write data in the CPU module.Since the Ethernet
module is responsible for command analysis and communication with the CPU module, no sequence
program is required for data exchange.
Another node may be a personal computer or host and data exchange between TOYOPUCs is not
attainable.
Please refer to the operation manual of the “PC3J/2J FL/ET-T-V2H” module or 2PORT-EFR module for
details.
PC10G
CPU FL/ET
(Ethernet)
Another
node
Command Command
Analysis
Response Response
9-64
9.8.3. Communication with File Memory Method
Use instructions of the sequence program such as SPR and SPR2 (to read the file memory) and SPW
and SPW2 (to write the file memory) to read/write the file memory in the Ethernet module for
transmission/reception.
Another node may be any device other than a personal computer or host and data exchange between
Ethernet modules of other PC10G or FL/EL-T-V2 , FL/ET-T-V2H module of PC3J/2J and 2PORT-EFR is
attainable. (No communication is available with Ethernet modules offered by other manufacturers.)
Please refer to the manual of the “PC3J/2J FL/ET-T-V2H” module or “2PORT-EFR” module for details.
PC10G
FL/ET
CPU (Ethernet) Another node
File memory Transmission

SPW SPW Connection 1 Reception
Transmission area Response
Connection 1
SPR Reception area Transmission
SPR
Transmission
Response
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9.8.4. PING Test Function
Conduct a PING Test to verify that the communication circuit is connected with a communicate/
communicator and that communication is attainable normally.
If the module fails in the PING test, the following causes are suspected.
 The cable is disconnected or poorly connected.
 A communication device such as a hub between PC10G and the other node is out of order.
 The other mode has not been started.
 Both nodes have the same IP address.
 Both nodes have the different network ID in the IP address.
(Please refer to the operation manual of the “PC3J/2J FL/ET-T-V2” module or “2PORT-EFR” module
for details.)
9.8.5. PING Test Procedure
Set any of the following addresses as defined by the link No. to which the Ethernet of PC10G has been
assigned, to the IP address of the other node by hexadecimal notation using peripheral equipment or
such.
Link No. Write IP address of the other node at:

1 S31C - S31D
2 S33C - S33D
3 S35C - S35D
4 S37C - S37D
5 S39C - S39D
6 S3BC - S3BD
7 S3DC - S3DD
8 S3FC - S3FD
If the Ethernet module has been assigned to link No. 1 and the IP address of the other node is
172.16.93.133, for example, set S31C to '5D85' and S31D to 'AC10.'
After completion of the PING test, reset these values to 0000.
The PING test is performed every two seconds and results are expressed by the 3rd and 4th bits at file
memory address 106. The 3rd bit turns on if the PING test is successfully completed and the 4th bit
turns on if not. Results of the PING test may also be found from the status monitor area.
A sequence program using an SPR command is required to load data from the file memory.
(Please refer to the operation manual of the “PC3J/2J FL/ET-T-V2” module or “2PORT-EFR” module for
details.)
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9.8.6. Status Monitor Function
The module status may be monitored by checking special registers S300's of the CPU module.
Connection that can be monitored by special register is from 1 to 8.
For 9 - 32, monitor the status by use of SPR2 command.
Address to be monitored is determined as follows by link No.
Link No. Write IP address of the other node at:

1 S300 - S30F
2 S320 - S32F
3 S340 - S34F
4 S360 - S36F
5 S380 - S38F
6 S3A0 - S3AF
7 S3C0 - S3CF
8 S3E0 - S3EF
The status of the control flag in the file memory and connection error codes, if any, may be monitored by
checking this area using peripheral equipment.
MSB LSB
F E D C B A 9 8 7 6 5 4 3 2 1 0
S3#0 CN8 Request for active open CN1 0 0 0 0 0 0 0 *1
S3#1 CN8 Request for file memory reception CN1 CN8 Request for file memory transmission CN1
S3#2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 *3 *2
S3#3 CN8 Open normal CN1 0 0 0 0 0 0 *5 *4
S3#4 CN8 File memory transmission complete CN1 CN8 Connection error CN1
S3#5 0 0 0 0 *9 *8 *7 *6 CN8 File memory reception complete CN1
S3#6 4th digit of own Ethernet address *10 5th digit of own Ethernet address *10
*10
S3#7 6th digit of own Ethernet address 0 0 0 0 0 0 0 0
S3#8 Connection 1: Connection error code
S3#9 Connection 2: Connection error code
S3#A Connection 3: Connection error code
S3#B Connection 4: Connection error code
S3#C Connection 5: Connection error code
S3#D Connection 6: Connection error code
S3#E Connection 7: Connection error code
S3#F Connection 8: Connection error code
*1: Request for initialization *2: Error log reception confirmed

*3: ICMP log reception confirmed *4: Normally initialized
*5: Abnormally initialized *6: Error log received
*7: ICMP log received *8: PING passed *9: PING failed
*10: Former 3 digits of Ethernet address are fixed to 00.60.53.
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9.8.7. Ethernet communication processing time
Transmission delay time when communicating in computer link system and file memory system can be
calculated by the formula below.
However, transmission delay time may be long depending on load factor of network and system
configuration.
Use the value obtained by the calculation formula below as a standard of the minimum transmission delay
time.
When the circuit was heavy and data could not be sent, or when data collided on the circuit, incorporated
Ethernet waits for the time designated by "Resend timer" of communication parameter and tries
transmitting again.
(1) Computer link system

Time since the host computer sends a command on the circuit until the incorporated Ethernet sends
response on the circuit.
Host computer PC10G-CPU
 When the protocol is TCP/IP

When the link parameter is Ethernet
Transmission delay time = 6 + (1+0.001 x command byte count + 0.002 x response byte count) x
used connection count + sequence scan time*1 (ms)
When the link parameter is "Ethernet (32 ports)"

Transmission delay time = 6 + (1.5 + 0.002 x command byte count + 0.002 x response byte
count) x used connection count + sequence scan time*1 (ms)
 When the protocol is UDP/IP

Transmission delay time = 6 + (0.5 +0.002 x command byte count*2 + 0.002 x response byte
count*2) x used connection count + sequence scan time*1 (ms)

Transmission delay time = 6 + (1 + 0.003 x command byte count*2 + 0.003 x response byte
count*2) x used connection count + sequence scan time*1 (ms)
*1: When the sequence scan time exceeds 25ms, use 25ms in calculation.
*2: Command byte count and response byte count are the number of bytes of computer link system
TOYOPCU data unit.
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(2) File memory system
When communication is made between incorporated Ethernet of TOYOPUC PC10G-CPU, time from
the point when the sender turns on transmission request flag to the point when the receiver reads the
received data to the register, turns on the reception confirmation flag, and returns response to the
transmitting side, and the transmission completion flag on sender side turns on.
PC10G-CPU PC10G-CPU
Transmitting the file memory

Transmitting the response
When the protocol is TCP/IP

Transmission delay time = 9 + (1+0.005 x transmission data byte count*1) x used connection
count + transmitting side sequence scan time x 3 + receiving side
sequence scan time x 6 (ms)

Transmission delay time = 11 + (1.5 + 0.005 x transmission data byte count*1) x used
connection count + transmitting side sequence scan time x 3 + receiving
side sequence scan time x 6 (ms)
 When the protocol is UDP/IP

Transmission delay time = 7 + (1+0.005 x transmission data byte count*1) x used connection

Transmission delay time = 8 + (1.5 + 0.005 x transmission data byte count*1) x used connection
*1: The transmission data byte count is the number of bytes of file memory data to be sent (value of LL
and LH).
9-69
9.8.8. Initial Settings of the Ethernet
9.8.8.1. Initial Setting Procedure
Start
Setting IO module
Specify link module name.
Set a detail link parameters or set

I/O parameters with sequence
program.
Power off and on or reset and start.
9-70
(1) Link Module Name
Select the rack No. and slot No. to which the Ethernet module is to be assigned by the settings on
'Link Parameter' window under 'Parameter' of the peripheral equipment. Set the link module name
to 'Ethernet (32 ports).' When CPU has been used in the program divided mode, also select the
program No. correctly.
(2) Setting Communication Parameters
(2)-1 Description of Communication Parameters
The following communication parameters are used.
[1] Your own node IP address

The IP address assigned to the Ethernet module and expressed by four numbers between 0 and
255. Note that 0.0.0.0 and 255.255.255.255 are not acceptable. If two or more nodes on the
same line have the same IP address, communication cannot be normally performed.
The IP address consists of a network ID and host ID. The network ID should be the same with
that of the node to be communicated with.
(For detail, see operation manual of FL/ET-T-V2H module of PC3J/2J or 2PORT-EFR module.)
[2] Connection 1 to 32 Used

The Ethernet module has 32 connections from 1 to 32. Specify which connections are to be
used.
An error occurs if the Open Protocol, Port No., and Other Node Table No. are not correctly
specified for any connection with the `Used' box checked.
[3] Protocol-opening Method

Specify which protocol is to be used for communication, TCP/IP or UDP/IP, and how to
open/close the connection if TCP/IP has been selected.
With the TCP/IP, it is necessary to open the line before the start of communication and close or
reset it at the end of communication. With the UDP/IP, communication can be started or
interrupted without opening or closing the line. With the TCP/IP, it is confirmed from the ACK
(acknowledge) response whether data has reached the other node or not and, if it cannot be
confirmed, data is re-transmitted. With the UDP/IP, it is not confirmed whether data has reached
and, therefore, transmitted data may disappear due to data collision on the line or for another
reason before reaching the other node.
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(i) TCP Active
A mode used with the TCP/IP protocol where the line cannot be easily opened by the Ethernet
module to the other node.
(ii) TCP Destination - Specified Passive

A mode used with the TCP/IP protocol where the line is opened by a node specified in the other
node table. The line is not opened if requested by another node with an IP address or port No.
other than specified.
(iii) TCP Destination Non-Specified Passive

A mode used with the TCP/IP protocol where the line is opened by the other node. The IP
address and port No. of the other node need not be specified. This mode is normally used for
communication with a computer.
(iv) UDP
Communication is performed with the UDP/IP protocol. The line is not opened or closed. It is
not confirmed whether data has reached the destination and, therefore, data may be lost before
reaching.
[4] Your Own Node Port No.

Specify the port No. for each connection between 1025 and 65534 (0401 and FFFE by
hexadecimal notation).
The own node port No. should not be the same for different connections.
[5] Other Node Table No.

If 'TCP Active,' 'TCP Destination - Specified Passive' or 'UDP' has been selected, it is necessary
to specify the IP address and port No. of the other node. Specify IP addresses and port Nos. of
different nodes in Other Node Tables Nos. 1 to 32 and enter a desired Other Node Table No. in
the 'Other Node Table NO.' field.
[6] Other Node Tables 1 to 32 Used

IP addresses and port Nos. of up to 32 nodes to be communicated with may be specified.
Check the 'Used' boxes for the Other Node Tables where IP addresses and port Nos. are to be
specified.
9-72
[7] Other Node IP Address
For the Other Node Tables for which the 'Used' boxes have been checked, it is necessary to
specify the IP address of the other node with four numbers between 0 and 255.
[8] Other Node Port No.

Specify the node No. of the other node between 1025 and 65534 (0401h and FFFEh by
hexadecimal notation).
This is necessary for the other node tables designated as 'Used'.
 Reference
Specify a unique IP address for each node (each device equipped with Ethernet communication
function such as personal computer or PC10G module). Do not specify the same IP address for two
or more nodes as doing so prevents normal communication.
More than one port No. may be specified for each node. Do not specify the same port No. more
than once for a single node.
Communication may be independently performed for each node.
When the TCP protocol is to be used, determine which ports open connections. Specify the ports
that open them as 'active' and others as 'passive'. The ports communicating with each other do not
need to have the same port No.
Example of settings
Opens Opened IP address 192.168.1.0
Port No.2001
IP address 192.168.1.1 Port No.1025
Port No.6000 Port No.1020
Port No.6001
Port No.6002 IP address 192.168.1.2
Port No.2000
Port No.3000
Port No.4000
Port No.4500
[9] Sub-Net Mask and Gateway IP Address

If the IP address of your module and that of the node to be communicated with have different
network IDs, it is necessary to specify the sub-net mask and gateway IP address.
(For detail, see the operation manual of FL/ET-T-V2H module of PC3J/2J or 2PORT-EFR
module.)
9-73
Timer settings used for communication are described below.
They do not need to be changed in usual cases.
[10] Reset wait retransmitting times

If no ACK (reception confirmation signal) is sent from the other node in response to the data
transmitted through a TCP connection, data is re-transmitted the number of times specified
herein. If no ACK is received after the specified number of re-transmissions, the connection is
reset by the Ethernet module. At this time, connection error code 4013 appears. It is cleared
when the connection is opened again.
If `Disable' has been checked, data is re-transmitted permanently and the connection is never
reset. If any connection at the Ethernet module remains open because the other node is
powered off during communication or for another reason, the connection is no longer normally
opened by the other node. To prevent such a problem, it is recommended to specify the reset
wait retransmitting times.
(Programmable between 3 and 10, defaulted as 10)
[11] Non-Reception Timer

If no data is sent from the other node through a TCP connection for the number of seconds or
minutes specified as 'Non-Reception Timer,' the connection is reset by the Ethernet module. If
'Disable' has been checked, the module waits permanently for data from the other data without
resetting the connection.
(Programmable between 1 second and 255 minutes, defaulted as permanent waiting)
[12] Response Timer

The following timers are set at a time.
 Active open command response waiting timer
 Subsequent data reception timer in case of divided reception data (TCP/UDP)
 Response monitor timer for file memory transmission
(Programmable between 1 and 255 seconds, defaulted as 6 seconds)
[13] Retransmitting Timer (Data)

A timer waiting for ACK (reception confirmation signal) from the other node after data is
transmitted. If ACK is not received within the specified time, data is re-transmitted.
(Programmable between 200 ms and 60 seconds, defaulted as 500 ms)
[14] Retransmitting Timer (SYN/FIN)

A timer waiting for a response to SYN (open connection to the other node) or FIN (close
connection to the other node). If ACK is not received within the specified time, data is
re-transmitted.
(Programmable between 200 ms and 60 seconds, defaulted as 500 ms)
[15] Close Timer

When a connection is to be closed by your module, it is necessary to transmit FIN from your
module and receive FIN from the other node. If FIN is not received from the other node within
the specified time after FIN is transmitted from your module, the connection is reset.
(Programmable between 2 and 60 seconds, defaulted as 10 seconds)
[16] Packet Alive Time

Set value of Time To Live: Decremented one by one every pass over IP router
(Programmable between 1 and 255, defaulted as 10)
[17] IP Assembly Timer

Standby period to assemble divided packet
(Programmable between 1 and 255 sec, defaulted as 10 sec.)
9-74
(2)-2 Setting Communication Parameters
Parameters can be set in either of two ways as described below.

[1] Set from the 'Link parameter setup' window of the peripheral equipment.
(Use PCwin if the setting is to be made by this method)
[2] Set with the sequence program.

If communication parameters have been set from link parameters and with the sequence program,
the settings from link parameters usually take precedence. If 'Initialized based on Initial
Sequence Program' has been selected on the link parameter setup window, however, the settings
with the sequence program take precedence over those from link parameters.
[1] Setting Communication parameters from link parameters

(Note: This procedure requires that the peripheral equipment supports the Ethernet link parameter
setting function.)
Select 'Ethernet' on the 'Link parameter setup' window and click the 'Detail (D)' button to open the
'Ethernet P1 L5 R0 S3' window.
On this window, specify:

Own Node IP Addresses
Connection 1 to 32 Used
Protocol Opening Methods
Own Node Port Nos.
Other Node Table Nos.
Then, click the buttons at
the left bottom and enter
values in the Other Node
Table No., Timer, Sub-net
Mask, and Gateway IP
Address fields if necessary.
9-75
Click the 'Other Node Table ' button to open the Other Node Table window.
On this window, specify:

 Table 1 to 32 used
 Other Node IP Addresses
 Other Node Port No.
Click the 'Timers' button to open the Timers window.
9-76
Click the 'Sub-net Mask and Gateway IP Address...' button to open the Sub-net Mask and
Gateway IP Address window. All values are initially defaulted as zero.
Click the 'Change' button when parameters are to be changed.
Click the 'Default' button to reset parameters to default values.
 Caution
If the CPU module parameters are to be set from the link parameter settings of the Ethernet
module by reading to the peripheral equipment parameters from the CPU module with which the
Ethernet module has been initialized with the sequence program, default values are usually
changed to zeros. In this case, return to the Program 1 Link <1> window, clear the Ethernet
settings, click the 'OK' button, and set the Ethernet parameters again.
[2] Setting Communication parameters with the Sequence Program
Communication parameters may be set with the sequence program with the following procedure.
Record communication parameters at registers.
Transfer communication parameters to the file memory

of the Ethernet module with an SPW command as
function instruction.
Turn the initial request bit in the file memory of the

Ethernet module on with an SPW or SPW2 command
as function instruction.
9-77
 Recording communication parameters at registers
Communication parameters are written in the Ethernet module with an SPW command after recorded at
registers.
The following example shows communication parameters and a sequence program that write them into
File Memory:
Communication Parameters Sample

Your Own Node IP Address = 192.168.1.2 (C0.A8.01.02h)
Connections No.1,2,& 3 and Other Node Tables No.1 & 2 are used.
Connection 1: TCP Active, Port No. = 6000 (1770h), Other Node Table No.=1
Connection 2: TCP Destination-Specified Passive, Port No.=6001 (1771h), Other Node Table No.=2
Connection 3: TCP Destination Non-Specified Passive, Port No.=6002 (1772h)
Other Node Table 1: IP Address = 192.168.1.1 (C0.A8.01.01h), Port No.=8000 (1F40h)
Other Node Table 2: IP Address = 192.168.1.3 (C0.A8.01.03h), Port No.=8001 (1F41h)
A case of initial parameter configuration starting with R104:

Register
Set Data Data Description
Data
R0104 0102 Your own node IP address (Lower)
R0105 C0A8 Your own node IP address (Higher)
R0106 0307 Using tables (1, 2)/using connections (1, 2, 3)
R0107 0000 Using connections (9 - 16)
R0108 0000 Connection 1: TCP Active
R0109 1770 Connection 1: Port No.
R010A 0001 Connection 1: Other Node Table No.
R010B 0000 0000 fixed
R010C 0100 Connection 2: TCP Destination-Specified Passive
R010D 1771 Connection 2: Port No.
R010E 0002 Connection 2: Other Node Table No.
R010F 0000 0000 fixed
R0110 0200 Connection 3: TCP Destination-Specified Passive
R0111 1772 Connection 3: Port No.
R0112 0000 Connection 3: Other Node Table No.
R0113 0000 0000 fixed
R0114 0000
No parameters are set, for connections 4 to 8 are
| |
unused.
R0127 0000
R0128 0101 Other Node Table 1: Other Node IP Address (Lower)
R0129 C0A8 Other Node Table 1: Other Node IP Address (Higher)
R012A 1F40 Other Node Table 1: Other Node Port No.
R012B 0000 0000 fixed
R012C 0103 Other Node Table 2: Other Node IP Address (Lower)
R012D C0A8 Other Node Table 2: Other Node IP Address (Higher)
R012E 1F41 Other Node Table 2: Other Node Port No.
R012F 0000 0000 fixed
Caution) Since CPU Module register data are 16-bit word data, File Memory by 2 bytes is
represented by one register datum.
9-78
 An example of sequence program for transferring communication parameters to
Ethernet module and turning initialization request flag on
A function instruction, SPW, is used to transfer the communication parameters recorded at registers to
the Ethernet module. For the SPW command, see operation manual of FL/ET-T-V2H module of
PC3J/2J or 2PORT-EFR module.)
An example is given below where the communication parameters as shown in the previous page are
written in the file memory of the Ethernet module and the initialization request flag turned on.
[WMOV 1058  R010 ]

(Link No.5, 58h-byte transfer)
V006
Specific relay
Data at R004 to
to activate the [WMOV 1208  R011 ] R012F is written
first scan only (1208h = Indirect address of R104 (1000h+104h*2))
in the file memory
of the Ethernet
[WMOV 0008  R012 ] module (link No.
(0008h = The head address of written File Memory) 5 in this example)
from address
0008.
[SPW R010 , R010  R012 ]
V090 P001 (Writing into File Memory)
Link 1
Available flag
[WMOV 0001  R100 ]
V006 (Data for turning the initialization request flag on)
[WMOV 1001  R013 ]

(Link No.5, 1 byte transfer)
V006
Data recorded at
[WMOV 1200  R014 ] R001 for turning
(1200h = Indirect address of R100 initialization
(1000h+100H*2)) request flag on is
[WMOV 0000  R015 ] written at file
(0000h = The head address of written File memory address
Memory) 0000.
[SPW R013 , R014  R015 ]

V090 P002 (Writing into File Memory)
Any communication parameter has been set to a wrong value, Communication error 'E6' occurs in a
CPU module. Check communication parameters in accordance with 5.5.4 'Communication Errors.'
Note: When a PC10 series CPU has been used in a mode other than PC2 compatibility, programs
2 and 3 do not run unless the program execution mode is selected to be 'enable' with CPU
operation mode parameter.
9-79
 File memory communication parameter setting address
bit7 bit0
0000 (00 fixed) 1 1:Initialization Request
0001 8 7 6 5 4 3 2 1 1-8:Connections 1-8 Active Open Request (1:Request)
0002 8 7 6 5 4 3 2 1 1-8:Connections 1-8 Transmission Request (1:Request)
0003 8 7 6 5 4 3 2 1 1-8:Connections 1-8 Reception Request (1:Confirmation)
0004 (00 fixed) 2 1 1:Error Log Reception Confirmation, 2:ICMP Log Reception
0005 (00 fixed) Confirmation
0006 (00 fixed)
0007 (00 fixed)
0008 (Lower)
0009
Own Node IP Address
000A
00000001 - FFFFFFE
000B (Higher)
000C 8 7 6 5 4 3 2 1
000D 8 7 6 5 4 3 2 1 1-8:Connection Used (1:Use)
000E 16 15 14 13 12 11 10 9 1-16:Table Used (1:Use)
000F (00 fixed)
0010 TCP Active Open: 0000h, TCP Destination-Specified Passive Open:
Connection opening method
Connection No.1
0011 0100h,
0012 Own Node Port No. (Lower) TCP Destination Non-Specified Passive Open: 0200h, UDP:0001h
0013 0401h - FFFEh (Higher)
0014 Other Node Table No. (Lower)
0015 0001h - 0010h (Higher)
0016
(00 fixed)
0017
Connection No.2
0019 0100h,
001A Own Node Port No. (Lower) TCP Destination Non-Specified Passive Open: 0200h, UDP:0001h
001B 0401h - FFFEh (Higher)
001C Other Node Table No.. (Lower)
001D 0001h - 0010h (Higher)
001E
(00 fixed)
001F
Connection No.3
0021 0100h,
0022 (Lower) TCP Destination Non-Specified Passive Open: 0200h, UDP:0001h
Own Node Port No.
0024 Other Node Table No.. (Lower)
0025 0001h - 0010h (Higher)
0026
(00 fixed)
0027
Connection No.4
0029 0100h,
002D 0001h - 0010h (Higher)
002E
(00 fixed)
002F
Connection No.5
0031 0100h,
0032 (Lower) TCP Destination Non-Specified Passive Open: 0200h, UDP:0001h
Own Node Port No.
0035 0001h - 0010h (Higher)
0036
(00 fixed)
0037
9-80
Connection No.6
0039 0100h,
003D 0001h - 0010h (Higher)
003E (00 fixed)
003F
Connection No.7
0041 0100h,
0042 Own Node Port No. (Lower) TCP Destination Non-Specified Passive Open: 0200h, UDP:0001h
0045 0001h - 0010h (Higher)
0046 (00 fixed)
0047
Connection No.8
0049 0100h,
004C Other Node Table No. (Lower)
004D 0001h - 0010h (Higher)
004E
(00 fixed)
004F
0050 (Lower)
0051
Other Node IP Address
Table No.1
0052
00000001 - FFFFFFE
0053 (Higher)
0054 Other Node Port No. (Lower)
0056
(00 fixed)
0057
0058 (Lower)
0059
Table No.2
005A
00000001 - FFFFFFE
005B (Higher)
005C Other Node Port No. (Lower)
005D 0401h - FFFEh (Higher)
005E
(00 fixed)
005F
0060 (Lower)
0061
Table No.3
0062
00000001 - FFFFFFE
0063 (Higher)
0066
(00 fixed)
0067
0068 (Lower)
0069
006A
00000001 - FFFFFFE
Table No.4
006B (Higher)
006E
(00 fixed)
006F
9-81
0070 (Lower)
0071
Table No.5
0072
00000001 - FFFFFFE
0073 (Higher)
0076
(00 fixed)
0077
0078 (Lower)
0079
Table No.6
007A
00000001 - FFFFFFE
007B (Higher)
007E
(00 fixed)
007F
0080 (Lower)
0081
Table No.7
0082
00000001 - FFFFFFE
0083 (Higher)
0086
(00 fixed)
0087
0088 (Lower)
0089
Table No.8
008A
00000001 - FFFFFFE
008B (Higher)
008E
(00 fixed)
008F
0090 (Lower)
0091
Table No.9
0092
00000001 - FFFFFFE
0093 (Higher)
0096
(00 fixed)
0097
0098 (Lower)
0099
Table No.10
009A
00000001 - FFFFFFE
009B (Higher)
009E
(00 fixed)
009F
00A0 (Lower)
00A1
00A2
Table No.11
00000001 - FFFFFFE
00A3 (Higher)
00A4 Other Node Port No. (Lower)
00A5 0401h - FFFEh (Higher)
00A6
(00 fixed)
00A7
9-82
00A8 (Lower)
00A9
Table No.12
00AA
00000001 - FFFFFFE
00AB (Higher)
00AC Other Node Port No. (Lower)
00AD 0401h - FFFEh (Higher)
00AE
(00 fixed)
00AF
00B0 (Lower)
00B1
Table No.13
00B2
00000001 - FFFFFFE
00B3 (Higher)
00B4 Other Node Port No. (Lower)
00B5 0401h - FFFEh (Higher)
00B6
(00 fixed)
00B7
00B8 (Lower)
00B9
Table No.14
00BA
00000001 - FFFFFFE
00BB (Higher)
00BC Other Node Port No. (Lower)
00BD 0401h - FFFEh (Higher)
00BE
(00 fixed)
00BF
00C0 (Lower)
00C1
Table No.15
00C2
00000001 - FFFFFFE
00C3 (Higher)
00C4 Other Node Port No. (Lower)
00C5 0401h - FFFEh (Higher)
00C6
(00 fixed)
00C7
00C8 (Lower)
00C9
Table No.16
00CA
00000001 - FFFFFFE
00CB (Higher)
00CC Other Node Port No. (Lower)
00CD 0401h - FFFEh (Higher)
00CE
(00 fixed)
00CF
00D0 (Lower)
00D1
Sub-Net Mask
00D2
00D3 (Higher)
00D4 (Lower)
00D5
Gateway IP Address
00D6
00000001 - FFFFFFE
00D7 (Higher)
00D8
00D9
00DA
00DB (00 fixed)
00DC
00DD
00DE
00DF
9-83
00E0 (Lower)
Response Timer  Response time
00E1 (Higher)
00E2 (Lower) Set in units of second.
Non-Reception Timer (0006h for 6 seconds)
00E3 (Higher)
00E4 (Lower)
Retransmitting Timer (Data)  Non-reception timer
00E5 (Higher)
Set in units of second or minute. If set in units of
00E6 (Lower)
Re-transmitted Data (SYN/FIN) second, the most significant digit of hexadecimal
00E7 (Higher)
notation should be 1.
00E8 (Lower)
Close Timer Set to 0 if the timer is not to be used.
00E9 (Higher)
(101Eh for 30 seconds, 0002h for 2 minutes, 0000h
00EA (Lower)
Packet alive Time for permanent waiting)
00EB (Higher)
00EC (Lower)  Resending Timer (Data)/Re-transmitted Data
IP Assembly Timer
00ED (Higher) (SYN/FIN)
00EE (Lower) Set in units of second or 100 ms. If set in units of 100
Reset wait retransmitting times
00EF (Higher) ms, the most significant digit of hexadecimal notation
00F0 should be 1.
00F1 (1005h for 500 ms, 0002h for 2 seconds)
00F2  Close Timer
00F3 Set in units of second.
00F4 (0005h for 5 seconds)
00F5
00F6  Packet alive Time
Set in units of time.
00F7
(00 fixed) (000Ah for 10 times)
00F8
00F9  IP Assembly Timer
00FA Set in units of time.
00FB (000Ah for 10 times)
00FC  Reset wait resending times
00FD Set in units of time.
00FE (000Ah for 10 times)
00FF
9-84
9.8.9. PC10G newly added
9.8.9.1. Ethernet command
1. Command list (abstract)

PC3JG PC10
Command PC3JG division mode PC3JG division mode
Function
No. Division mode Division mode PC10 mode
Single mode Single mode
94 Data expanding word reading
95 Data expanding word Writing 
96 Data expanding byte reading (excluding
 
97 Data expanding byte Writing PC10 additional
98 Data expanding multi-point reading addresses)
99 Data expanding multi-point writing

Extended function call (Dedicated to
A0  
CPU status reading PC10
Bit available)
C2(new) PC10 data byte reading
C3(new) PC10 data byte writing 
C4(new) PC10 multi-point reading -- -- (PC10 all
C5(new) PC10 multi-point writing addresses)
CA(new) PC10 FR register registration
2. Address list
Use the address by each command in words, bytes, or bits in the command data of computer link. (Long
unit is the same designation as word unit.)
In bits
Ex) P1-M1000
1) Reference) Obtain the bit address from the address list (0x61800 is stored in bit 0 - 18.)
2) Reference) Obtain Ex No. from the address list. (0x0D is stored in bit 19 - 26.)
3) Calculate the bit address from 32-bit data. (0x006E1800)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0固定
Fixed at 0 Ex No.(0x0D) ﾋﾞｯﾄｱﾄﾞﾚｽ(0x61800)
Bit address
0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0
0 0 6 E 1 8 0 0
上位WORD
High order word 上位WORD
High order word 下位WORD
Low order word 下位WORD
Low order word
Address high order
ｱﾄﾞﾚｽ上位 Address low order
ｱﾄﾞﾚｽ下位 Address high order
ｱﾄﾞﾚｽ上位 Address low order
ｱﾄﾞﾚｽ下位
In bytes
Ex) P2-D2000L
1) Reference) Obtain the byte address from the address list. (0x6000 is stored in bit 0 - 15.)
2) Reference) Obtain Ex No. from the address list. (0x0E is stored in bit 16 - 23.)
3) Calculate the byte address from 32-bit data. (0x000E6000)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Fixed
0固定 at 0 Ex No.(0x0E) Bit address
ﾊﾞｲﾄｱﾄﾞﾚｽ(0x6000)
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 E 6 0 0 0
上位WORD
High order word 上位WORD
High order word 下位WORD
Low order word 下位WORD
Low order word
ｱﾄﾞﾚｽ上位
Address high order ｱﾄﾞﾚｽ下位
Address low order ｱﾄﾞﾚｽ上位
Address high order ｱﾄﾞﾚｽ下位
Address low order
9-85
3. PC10 additional command
new PC10 data byte reading (CMD=C2H)
(1) Function
Data memory (PC10 whole area) is read in byte unit block.
(2) Message format

 Command
転送数
The number of transfers
下位WORD
Low 上位WORD
order High order
word word
count
count
order
order
order
order
order
order
Address
Address
Address
Address
C
ﾊﾞｲﾄ数
ﾊﾞｲﾄ数
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
low下位
上位
0 0 L L
low下位
上位
low下位
上位
M
0 0 L H
high
high
Byte
Byte
high
D
 Response
Data quantity
ﾃﾞｰﾀ数
C
ﾃﾞｰﾀ11
ﾃﾞｰﾀ22
ﾃﾞｰﾀ33
ﾃﾞｰﾀ44
ﾃﾞｰﾀnn
8 R L L
Data
Data
Data
Data
Data
M n<=3F0H
0 C L H
D
new PC10 data byte writing (CMD=C3H)
(1) Function
Data memory (PC10 whole area) is read in byte unit block.
(2) Message format

 Command The number of transfers
転送数
下位WORD
Low 上位WORD
order High order
word word
n<=3F0H
order
order
order
order
Address
Address
Address
Address
C
1
n
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ﾃﾞｰﾀ1
ﾃﾞｰﾀ2
ﾃﾞｰﾀ3
ﾃﾞｰﾀ4
ﾃﾞｰﾀn
0 0 L L
下位
上位
下位
上位
Data
Data
Data
Data
Data
M
0 0 L H
high
high
low
low
 Response
C
8 R L L
M
0 C L H
D
9-86
new PC10 multi-point reading (CMD=C4H)
(1) Function
Data memory (PC10 whole area) is read in each unit of bit, byte, word, and long at multipoint.
(2) Message format

 Command The number of transfers
転送数
下位WORD
Low order 上位WORD
High order 下位WORD
High order
word word word word word word word word
Word point
ﾋﾞｯﾄ点数
ﾊﾞｲﾄ点数
ﾜｰﾄﾞ点数
ﾛﾝｸﾞ点数
Long point
Byte point
order
order
order
order
order
order
order
order
order
order
order
order
C
order
order
order
order
Address
Address
Address
Address
Address
Address
Address
Address
Bit point
Address
Address
Address
Address
Address
Address
Address
Address
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
0 0 L L
count
count
count
count
下位
上位
low下位
上位
下位
上位
low下位
上位
下位
上位
low下位
上位
下位
上位
下位
上位
M
0 0 L H
high
high
high
high
high
high
high
high
low
low
low
low
low
D
Bitﾋﾞｯﾄｱﾄﾞﾚｽ部
address count ﾊﾞｲﾄｱﾄﾞﾚｽ部
Byte address count ﾜｰﾄﾞｱﾄﾞﾚｽ部
Word address count ﾛﾝｸﾞｱﾄﾞﾚｽ
Long address
(bit address) (byte address) (byte address) (byte address)
(ﾋﾞｯﾄｱﾄﾞﾚｽ) (ﾊﾞｲﾄｱﾄﾞﾚｽ) (ﾊﾞｲﾄｱﾄﾞﾚｽ) (ﾊﾞｲﾄｱﾄﾞﾚｽ)
Address total = Bit point count + Byte point count + Word point count + Long
ｱﾄﾞﾚｽ合計=ﾋﾞｯﾄ点数+ﾊﾞｲﾄ点数+ﾜｰﾄﾞ点数+ﾛﾝｸﾞ点数<=127点
point count <= 127 points
 Response 下位WORD
Low 上位WORD
order High order
word word
Long point
Word point
order
order
order
point
order
order
order
ﾋﾞｯﾄ点数
ﾊﾞｲﾄ点数
ﾜｰﾄﾞ点数
ﾛﾝｸﾞ点数
Bit point
ﾃﾞｰﾀNN
ﾃﾞｰﾀNN
ﾃﾞｰﾀLL
ﾃﾞｰﾀLL
ﾃﾞｰﾀLL
ﾃﾞｰﾀLL
ﾃﾞｰﾀ11
ﾃﾞｰﾀ22
ﾃﾞｰﾀ33
ﾃﾞｰﾀM
count
count
count
count
8 R L L
low下位
上位
low下位
上位
low下位
上位
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
M
0 C L H
Byte
high
high
high
D
1 data 8点で1ﾃﾞｰﾀ
by 8 points Number of data
ﾃﾞｰﾀ数
Address total = Bit point count + Byte point count + Word point count + Long
ﾃﾞｰﾀ合計=ﾋﾞｯﾄ点数/8+ﾊﾞｲﾄ点数+ﾜｰﾄﾞ点数*2+ﾛﾝｸﾞ点数*4<=506(ﾊﾞｲﾄ)
point count <= 506 (bytes)
new PC10 multipoint writing (CMD=C5H)
(1) Function
Data memory (PC10 whole area) is read in each unit of bit, byte, word, and long at multipoint.
(2) Message format

 Command The number
転送数 of transfers
下位WORD
High order
word word word word word word
N high
Word point
ﾋﾞｯﾄ点数
ﾊﾞｲﾄ点数
ﾜｰﾄﾞ点数
ﾛﾝｸﾞ点数
N low
Long point
Byte point
order
order
order
order
order
order
order
order
C
order
order
order
Address
Address
order
Bit point
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ﾃﾞｰﾀ1
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ﾃﾞｰﾀM
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ﾃﾞｰﾀN
ﾃﾞｰﾀN
M
1
count
count
0 0 L L
count
count
下位
上位
下位
上位
low下位
上位
low下位
上位
下位
上位
low下位
上位
下位
上位
order
order
M
Data
Data
0 0 L H
high
high
Data
high
high
high
high
low
low
Data
low
Byte address count Word address count

ﾋﾞｯﾄｱﾄﾞﾚｽ部
Bit address count ﾊﾞｲﾄｱﾄﾞﾚｽ部ﾜｰﾄﾞｱﾄﾞﾚｽ部
(bit address) (byte address) (byte address)
(ﾋﾞｯﾄｱﾄﾞﾚｽ) (ﾊﾞｲﾄｱﾄﾞﾚｽ) (ﾊﾞｲﾄｱﾄﾞﾚｽ)
下位WORD
High order
word word word word
order
order
order
order
order
order
order
order
Address
Address
Address
Address
Address
Address
Address
Address
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ｱﾄﾞﾚｽ
ﾃﾞｰﾀL
ﾃﾞｰﾀL
ﾃﾞｰﾀL
ﾃﾞｰﾀL
下位
上位
下位
上位
下位
上位
下位
上位
high
high
high
high
low
low
low
low
ﾛﾝｸﾞｱﾄﾞﾚｽ
Long address
 Response (byte address)
(ﾊﾞｲﾄｱﾄﾞﾚｽ)
C
8 R L L
M
0 C L H
D
9-87
CPU status reading (CMD=A0H)
(1) Function
Operation status information of CPU is read.
(2) Message format

 Command
C
0 0 L L 0 1 0
M
0 0 L H 0 1 0
D
 Response
Data 1
Data 2
Data 8
ﾃﾞｰﾀ1
ﾃﾞｰﾀ2
ﾃﾞｰﾀ8
8 R L L 0 1 0
M
0 C L H 0 1 0
D
9-88
Details of response data of CPU status read-out
bit Description bit Description
7 RUN 7 Trace
6 Under a stop 6 Scan sampling trace
5 Under stop-request continuity 5 Periodic sampling trace
Data 1
Data 5
4 Under a pseudo-stop 4 "Enable" detected
3 Debug mod 3 Trigger detected
2 I/O monitor user mode 2 One scan step
1 PC3 mode 1 One block step
0 PC10 mode 0 One instruction step
7 Fatal failure 7 I/O off-line
6 Faint failure 6 Remote RUN setting
5 Alarm 5 Status latch setting
Data 2
4 Data 6 4
3 I/O allocation parameter altered 3
2 With a memory card 2
1 1
0 TEST mode 0
7 Memory card operation 7
Write-protected program and Write-priority limited program and
6 6
supplementary information supplementary information
5 5 Flash register write error
4 4 Flash register under writing
Data 3
Data 7
Equipment information Flash

3 3
register write error
Equipment information Flash
2 2
register under writing
1 1 Abnormal write during RUN *
0 0 Under writing during RUN *
7 Read-protected system memory 7
6 Write-protected system memory 6
5 Read-protected system I/O 5
Data 4
Data 8
4 Write-protected system I/O 4

3 3
2 2 Under program 3 running *
(Example)
A command
0 0 . 0 0 . 0 3 . 0 0 . 3 2 . 11 . 0 0
The response to normal RUN state

8 0 . 0 0 . 0 B . 0 0 . 3 2 . 11 . 0 0 . 8 0 . 0 0 . 0 0 . 0 0 . 0 0 . 0 0 . 0 0 . 0 0
9-89
new FR register registration (CMD=CAH)
(1) Function
Data of flash register is written to corresponding flash memory.
When only the block is written without issuing flash register registration command, the flash memory
recovers the original content by resetting or power-on.
(2) Message format

 Command
C
0 0 L L
ExNo
M
0 0 L H
D
See "8.2.4 EX number" for ExNo.
 Response
C
8 R L L
M
0 C L H
D
Ex) When writing FR000000 - FR00FFFF

1) [FR000000 - FR007FFF] PC10 data block writing (command C3)
2) Flash register registration (command CA) Perform 1) through 3) in
3) Flash writing completion check (command A0 and CPU status reading. It the unit of 64kbytes.
checks that data 7 and the bit 4 turn off.)
4) [FR008000 - FR00FFFF] PC10 data block writing (command C3)

Perform 1) through 3)
5) Flash register registration (command CA)
in the unit of
6) Flash writing completion check (command A0 and CPU status reading. It
64kbytes.
checks that data 7 and the bit 4 turn off.)
7) Completion
9-90
9.8.9.2. Built-in Ethernet Simultaneous opening function of 32 ports
9.8.9.2.1. Built-in Ethernet Simultaneous opening function of 32 ports
When performing file memory communication, memory space inside Ethernet is extended by
application of 32 ports, and some space is created that cannot be accessed by present SPR and SPW
command.
Therefore, SPR2 and SPW2 commands are added newly.
|----||-------[SPR2 D0 D1 D2 ]
Indirect address register for storing the read data
Address in reading source Ethernet (32 bits)
Link No. Reading data count
Address of OP2 in Ethernet is changed from 16 bits of SPR to 32 bits.
|----||-------[SPW2 D0 D1 D2 ]
Address of writing destination in Ethernet (32 bits)
Indirect address register for storing the written data
Link No reading data count
Address of OP3 in Ethernet is changed from 16 bits of SPW to 32 bits.
 Status monitoring function

As for up to the port 8 of Ethernet, the status of file memory control flag and connection error code can be
seen by monitoring the special register of S300 mark of CPU module the same as before. (See "9.8.6
Status monitor function".)
It is impossible to monitor the status by special register from the port 9 to the port 32.
Monitor the status of file memory control flag and connection error code by use of "SPR2 (special module
byte reading)".
See the file memory address map for "Reading source address in Ethernet".
9-91
9.8.9.2.2. File memory address map (32-port expansion area)
* See "9.8.7 Initial setting of Ethernet" for the conventional area up to the port 8.
The extended area below can be accessed only by SPR2 and SPW2 command.
When the lowest order bit of E00C is turned on, it is allowed to operate the control flag CN1 - 8 in the
extended area.
Here, the address from 0001 to 0003 is invalid.
When the lowest order bit of E00C is turned off, it is allowed to operate the control flag CN1 - 8 in the
normal area, and the sequence prepared conventionally can be used.
bit7 bit0
E000 8 7 6 5 4 3 2 1 1～8：ｺﾈｸｼｮﾝ1～8　ｱｸﾃｨﾌﾞｵｰﾌﾟﾝ要求[0001]
Connection 1 - 8 Active open request [0001]
E001 16 15 14 13 12 11 10 9
E002 24 23 22 21 20 19 18 17 9～32：ｺﾈｸｼｮﾝ9～32　ｱｸﾃｨﾌﾞｵｰﾌﾟﾝ要求(1:要求)
Connection 9 - 32 Active open request [1: Request]
E003 32 31 30 29 28 27 26 25
E004 8 7 6 5 4 3 2 1 1～8：ｺﾈｸｼｮﾝ1～8　送信要求[0002]
Connection 1 - 8 Send request [0002]
E005 16 15 14 13 12 11 10 9
E006 24 23 22 21 20 19 18 17 9～32：ｺﾈｸｼｮﾝ9～32　送信要求(1:要求)
Connection 9 - 32 Send request (1: Request)
E007 32 31 30 29 28 27 26 25
E008 8 7 6 5 4 3 2 1 1～8：ｺﾈｸｼｮﾝ1～8　受信確認[0003]
Connection 1 - 8 Receive confirmation [0003]
E009 16 15 14 13 12 11 10 9
E00A 24 23 22 21 20 19 18 17 9～32：ｺﾈｸｼｮﾝ9～32　受信確認(1:確認)
Connection 9 - 32 Receive confirmation (1: Confirm)
E00B 32 31 30 29 28 27 26 25
E00C 00固定
Fixed at 00 1 1: Control signal area CN1 - CN8 *1 ※1
1:CN1～CN8の制御信号エリア
E00D 00固定
Fixed at 00
E00E 00固定
Fixed at 00 1 1: Initial request [0000]
1:ｲﾆｼｬﾙ要求[0000]
1. Error Log receive confirmation 2: IGMP Log receive confirmation
E00F 00固定
Fixed at 00 3 2 1 1:ｴﾗｰLog受信確認 2:ICMPLog受信確認 3:予約[0004]
3: Reservation [0004]
※１
*1
0:通常エリア(0000～）の制御フラグ有効
0: Control flag of normal area (0000 -) is valid.
1:拡張エリア(E000～）の制御フラグ有効
1: Control flag of extended area (E000 -) is valid.
Extended area setting validity flag

1: IP 2: Connection use 3: Table
E0C0 00固定
Fixed at 00 6 5 4 3 2 1 拡張ｴﾘｱ設定有効ﾌﾗｸﾞ　1:IP 2:ｺﾈｸｼｮﾝ使用､3:ﾃｰﾌﾞﾙ
4: Subnet 5: Gateway
E0C1 　 4:ｻﾌﾞﾈｯﾄ 5:ｹﾞｰﾄｳｪｲ
6: Various timers 6:各種ﾀｲﾏ
E0C2
E0C3
E0C4 (下位)
(Low order)
Own node IP address
自ﾉｰﾄﾞIPｱﾄﾞﾚｽ
E0C5
E0C6 00000001 ～ FFFFFFE
E0C7 (上位)
(High order)
E0C8 8 7 6 5 4 3 2 1 1～8：ｺﾈｸｼｮﾝ使用[000C]
Connection use [000C]
E0C9 16 15 14 13 12 11 10 9
E0CA 24 23 22 21 20 19 18 17 　　9～32：ｺﾈｸｼｮﾝ使用(1:使用)
Connection use (1: Use)
E0CB 32 31 30 29 28 27 26 25
E0CC 8 7 6 5 4 3 2 1 　　1～16：ﾃｰﾌﾞﾙ使用[000D,000E]
Table use [000D, 000E]
E0CD 16 15 14 13 12 11 10 9
E0CE 24 23 22 21 20 19 18 17 　　17～32：ﾃｰﾌﾞﾙ使用(1:使用)
Table use (1: Use)
E0CF 32 31 30 29 28 27 26 25
E0D0 (下位)
(Low order)
E0D1 ｻﾌﾞﾈｯﾄﾏｽｸ
Subnet mask
E0D2
E0D3 (上位)
(High order)
E0D4 (下位)
(Low order)
Gateway IP address
E0D5 ｹﾞｰﾄｳｪｲIPｱﾄﾞﾚｽ
E0D6 00000001 ～ FFFFFFE
E0D7 (上位)
(High order)
E0D8 (下位)
(Low order)
通信ｽﾃｰﾀｽ出力領域
Communication status output area
E0D9 PC10 logic address (24 bits)
PC10論理ｱﾄﾞﾚｽ(24bit)
E0DA (上位)
(High order)
E0DB 00固定
Fixed at 00


9-92
E0E0
ﾚｽﾎﾟﾝｽﾀｲﾏ
Response timer
(下位)
(Low order) ﾀｲﾏ[00E0]
Timer [00E0]
E0E1 (上位)
(High order)
E0E2 (下位)
(Low order)
無受信ﾀｲﾏ timer
No-reception
E0E3 (上位)
(High order)
E0E4 (下位)
(Low order)
再送ﾀｲﾏ(ﾃﾞｰﾀ)
Resend timer (data)
E0E5 (上位)
(High order)
E0E6 (下位)
(Low order)
再送ﾃﾞｰﾀ(SYN/FIN)
Resend data (SYN/FIN)
E0E7 (上位)
(High order)
E0E8 (下位)
(Low order)
ｸﾛｰｽﾞﾀｲﾏ
Closed timer
E0E9 (上位)
(High order)
E0EA (下位)
(Low order)
ﾊﾟｹｯﾄ生存時間
Bucket existing time
E0EB (上位)
(High order)
E0EC (下位)
(Low order)
IP組立ﾀｲﾏ
IP assembling timer
E0ED (上位)
(High order)
E0EE (下位)
(Low order)
ﾘｾｯﾄ待ち再送回数
Reset standby resend count
E0EF (上位)
(High order)
E100
: ｺﾈｸｼｮﾝNo.1
Connection No.1
E107
E108
Connection No.2
E10F

E138
Connection No.8
E13F
E140
Connection No.9
E147

E1F0
Connection No.31
E1F7
E1F8
Connection No.32
E1FF
E200
: ﾃｰﾌﾞﾙNo.1
Table No.1
E207
E208
Table No.2
E20F

E2F0
Table No.31
E2F7
E2F8
Table No.32
E2FF

E400 8 7 6 5 4 3 2 1
E401 16 15 14 13 12 11 10 9
E402 24 23 22 21 20 19 18 17 9～32：ｺﾈｸｼｮﾝ9～32　ｵｰﾌﾟﾝ正常(1:正常)
Connection 9 - 32 Open normal (1: Normal)
E403 32 31 30 29 28 27 26 25
E404 8 7 6 5 4 3 2 1
E405 16 15 14 13 12 11 10 9
E406 24 23 22 21 20 19 18 17 9～32：ｺﾈｸｼｮﾝ9～32　コネクション異常(1:異常)
Connection 9 - 32 Connection error (1: Abnormal)
E407 32 31 30 29 28 27 26 25
E408 8 7 6 5 4 3 2 1
E409 16 15 14 13 12 11 10 9
E40A 24 23 22 21 20 19 18 17 9～32：ｺﾈｸｼｮﾝ9～32　送信完了(1:完了)
Connection 9 - 32 Transmission complete (1:
Complete)
E40B 32 31 30 29 28 27 26 25
E40C 8 7 6 5 4 3 2 1
E40D 16 15 14 13 12 11 10 9
E40E 24 23 22 21 20 19 18 17 9～32：ｺﾈｸｼｮﾝ9～32　受信完了(1:完了)
Connection 9 - 32 Receiving complete (1: Complete)
E40F 32 31 30 29 28 27 26 25
E410 00固定
Fixed at 00 2 1 1:1:ｲﾆｼｬﾙ正常
Initializing normal2:ｲﾆｼｬﾙ異常　[0100]
2: Initializing abnormal [0100]
E411 00固定
Fixed at 00 4 3 2 1 1:1:ｴﾗｰﾛｸﾞ受信2:ICMPﾛｸﾞ受信3:PING正常4:PING異常[0106]
Error log receive 2: ICMP log receive 3: PING normal 4: PING abnormal [0106]

9-93

E500 コネクション１
Connection 1
E501 コネクション異常コード
Connection error code
E502
E503
E504 コネクション２
Connection 2
E506
E507
E508 コネクション３
Connection 3
E50A
E50B
E50C コネクション４
Connection 4
E50D コネクション異常コード
E50E
E50F
E510 コネクション５
Connection 5
E512
E513
E514 コネクション６
Connection 6
E516
E517
E518 コネクション７
Connection 7
E51A
E51B
E51C コネクション８
Connection 8
E51E
E51F
E520 コネクション９
Connection 9
E522
E523
E524 コネクション１０
Connection 10
E526
E527
E528 コネクション１１
Connection 11
E52A
E52B
E52C コネクション１２
Connection 12
E52E
E52F
E530 コネクション１３
Connection 13
E532
E533
E534 コネクション１４
Connection 14
E536
E537
E538 コネクション１５
Connection 15
E53A
E53B
E53C コネクション１６
Connection 16
E53E
E53F
9-94
E540 コネクション１７
Connection 17
E542
E543
E544 コネクション１８
Connection 18
E546
E547
E548 コネクション１９
Connection 19
E54A
E54B
E54C コネクション２０
Connection 20
E54E
E54F
E550 コネクション２１
Connection 21
E552
E553
E554 コネクション２２
Connection 22
E556
E557
E558 コネクション２３
Connection 23
E55A
E55B
E55C コネクション２４
Connection 24
E55E
E55F
E560 コネクション２５
Connection 25
E562
E563
E564 コネクション２６
Connection 26
E566
E567
E568 コネクション２７
Connection 27
E56A
E56B
E56C コネクション２８
Connection 28
E56E
E56F
E570 コネクション２９
Connection 29
E572
E573
E574 コネクション３０
Connection 30
E576
E577
E578 コネクション３１
Connection 31
E57A
E57B
E57C コネクション３２
Connection 32
E57E
E57F

9-95

Connection 1
E601 TCP TCP送信回数
transmission count
Connection 1
E603 TCP再送回数 count
TCP retransmission
Connection 1
E605 TCPTCP状態遷移
status transition
Connection 1
E607 Residual受信バッファ残量
content of receiving buffer
E608 コネクション２
Connection 2
transmission count
E60A コネクション２
Connection 2
E60B TCP再送回数 count
TCP retransmission
E60C コネクション２
Connection 2
E60D TCPTCP状態遷移
status transition
E60E コネクション２
Connection 2
E60F Residual受信バッファ残量
Connection 3
transmission count
Connection 3
TCP retransmission
Connection 3
status transition
Connection 3
E618 コネクション４
Connection 4
transmission count
E61A コネクション４
Connection 4
TCP retransmission
E61C コネクション４
Connection 4
status transition
E61E コネクション４
Connection 4
Connection 5
transmission count
Connection 5
TCP retransmission
Connection 5
status transition
Connection 5
E628 コネクション６
Connection 6
transmission count
E62A コネクション６
Connection 6
TCP retransmission
E62C コネクション６
Connection 6
status transition
E62E コネクション６
Connection 6
Connection 7
transmission count
E632 Connection 7
コネクション７
E633 TCP retransmission count
Connection 7
status transition
Connection 7
E638 コネクション８
Connection 8
transmission count
E63A コネクション８
Connection 8
TCP retransmission
E63C コネクション８
Connection 8
status transition
E63E コネクション８
Connection 8
9-96
Connection 9
E641 TCP送信回数count
TCP transmission
Connection 9
TCP retransmission
Connection 9
status transition
Connection 9
E648 コネクション１０
Connection 10
E649 TCP送信回数 count
TCP transmission
E64A コネクション１０
Connection 10
TCP retransmission
E64C コネクション１０
Connection 10
status transition
E64E コネクション１０
Connection 10
Connection 11
TCP transmission
Connection 11
TCP retransmission
Connection 11
status transition
Connection 11
E658 コネクション１２
Connection 12
TCP transmission
E65A コネクション１２
Connection 12
TCP retransmission
E65C コネクション１２
Connection 12
status transition
E65E コネクション１２
Connection 12
Connection 13
TCP transmission
Connection 13
TCP retransmission
Connection 13
status transition
Connection 13
E668 コネクション１４
Connection 14
TCP transmission
E66A コネクション１４
Connection 14
TCP retransmission
E66C コネクション１４
Connection 14
status transition
E66E コネクション１４
Connection 14
Connection 15
TCP transmission
Connection 15
TCP retransmission
Connection 15
status transition
Connection 15
E678 コネクション１６
Connection 16
TCP transmission
E67A コネクション１６
Connection 16
TCP retransmission
E67C コネクション１６
Connection 16
status transition
E67E コネクション１６
Connection 16
9-97
Connection 17
TCP transmission
Connection 17
TCP retransmission
Connection 17
status transition
Connection 17
E688 コネクション１８
Connection 18
TCP transmission
E68A コネクション１８
Connection 18
TCP retransmission
E68C コネクション１８
Connection 18
status transition
E68E コネクション１８
Connection 18
Connection 19
TCP transmission
Connection 19
TCP retransmission
Connection 19
status transition
Connection 19
E698 コネクション２０
Connection 20
TCP transmission
E69A コネクション２０
Connection 20
TCP retransmission
E69C コネクション２０
Connection 20
status transition
E69E コネクション２０
Connection 20
E6A0 コネクション２１
Connection 21
E6A1 TCP送信回数count
TCP transmission
Connection 21
E6A3 TCP再送回数 count
TCP retransmission
Connection 21
E6A5 TCPTCP状態遷移
status transition
Connection 21
E6A7 Residual受信バッファ残量
E6A8 コネクション２２
Connection 22
E6A9 TCP送信回数count
TCP transmission
E6AA コネクション２２
Connection 22
E6AB TCP再送回数 count
TCP retransmission
E6AC コネクション２２
Connection 22
E6AD TCPTCP状態遷移
status transition
E6AE コネクション２２
Connection 22
E6AF Residual受信バッファ残量
E6B0 コネクション２３
Connection 23
E6B1 TCP送信回数count
TCP transmission
Connection 23
E6B3 TCP再送回数 count
TCP retransmission
Connection 23
E6B5 TCPTCP状態遷移
status transition
Connection 23
E6B7 Residual受信バッファ残量
E6B8 コネクション２４
Connection 24
E6B9 TCP送信回数count
TCP transmission
E6BA コネクション２４
Connection 24
E6BB TCP再送回数 count
TCP retransmission
E6BC コネクション２４
Connection 24
E6BD TCPTCP状態遷移
status transition
E6BE コネクション２４
Connection 24
E6BF Residual受信バッファ残量
9-98
E6C0 コネクション２５
Connection 25
E6C1 TCP送信回数 count
TCP transmission
Connection 25
E6C3 TCP再送回数 count
TCP retransmission
Connection 25
E6C5 TCPTCP状態遷移
status transition
Connection 25
E6C7 Residual受信バッファ残量
E6C8 コネクション２６
Connection 26
E6C9 TCP送信回数 count
TCP transmission
E6CA コネクション２６
Connection 26
E6CB TCP再送回数 count
TCP retransmission
E6CC コネクション２６
Connection 26
E6CD TCPTCP状態遷移
status transition
E6CE コネクション２６
Connection 26
E6CF Residual受信バッファ残量
E6D0 コネクション２７
Connection 27
E6D1 TCP送信回数 count
TCP transmission
Connection 27
E6D3 TCP再送回数 count
TCP retransmission
Connection 27
E6D5 TCPTCP状態遷移
status transition
Connection 27
E6D7 Residual受信バッファ残量
E6D8 コネクション２８
Connection 28
E6D9 TCP送信回数 count
TCP transmission
E6DA コネクション２８
Connection 28
E6DB TCP再送回数 count
TCP retransmission
E6DC コネクション２８
Connection 28
E6DD TCPTCP状態遷移
status transition
E6DE コネクション２８
Connection 28
E6DF Residual受信バッファ残量
E6E0 コネクション２９
Connection 29
E6E1 TCP送信回数 count
TCP transmission
Connection 29
E6E3 TCP再送回数 count
TCP retransmission
Connection 29
E6E5 TCPTCP状態遷移
status transition
Connection 29
E6E7 Residual受信バッファ残量
E6E8 コネクション３０
Connection 30
E6E9 TCP送信回数 count
TCP transmission
E6EA コネクション３０
Connection 30
E6EB TCP再送回数 count
TCP retransmission
E6EC コネクション３０
Connection 30
E6ED TCPTCP状態遷移
status transition
E6EE コネクション３０
Connection 30
E6EF Residual受信バッファ残量
E6F0 コネクション３１
Connection 31
E6F1 TCP送信回数 count
TCP transmission
Connection 31
E6F3 TCP再送回数 count
TCP retransmission
Connection 31
E6F5 TCPTCP状態遷移
status transition
Connection 31
E6F7 Residual受信バッファ残量
E6F8 コネクション３２
Connection 32
E6F9 TCP送信回数 count
TCP transmission
E6FA コネクション３２
Connection 32
E6FB TCP再送回数 count
TCP retransmission
E6FC コネクション３２
Connection 32
E6FD TCPTCP状態遷移
status transition
E6FE コネクション３２
Connection 32
E6FF Residual受信バッファ残量
9-99
10000 ＬＬ [1000]
ＬＨ [1001]
[1002]
Connection 1
コネクション１
Transmission
送信 Data
データ
Max 2044 bytes
最大２０４４バイト
107FF [17FF]
10800 ＬＬ [1800]
ＬＨ [1801]
[1802]
コネクション１
Connection 1
受信
Reception Data
データ
Max 2044
最大２０４４バイト bytes
10FFF [1FFF]
11000 ＬＬ
ＬＨ
Connection 2
コネクション２
Transmission
送信 Data
データ
Max 2044 bytes
117FF
11800 ＬＬ
ＬＨ
Connection 2
コネクション２
Reception
受信 Data
データ
Max 2044 bytes
11FFF
12000 ＬＬ
ＬＨ
Connection 3
コネクション３
Transmission
送信 Data
データ
Max 2044 bytes
127FF
12800 ＬＬ
ＬＨ
Connection 3
コネクション３
受信
Reception Data
データ
Max 2044 bytes
12FFF
13000 ＬＬ
ＬＨ
Connection 4
コネクション４
Transmission
送信 Data
データ
Max 2044 bytes
137FF
13800 ＬＬ
ＬＨ
Connection 4
コネクション４
Reception
受信 Data
データ
Max 2044 bytes
13FFF
9-100
14000 ＬＬ
ＬＨ
Connection 5
コネクション５
Transmission Data
送信
Max データ
2044 bytes
147FF
14800 ＬＬ
ＬＨ
Connection 5
コネクション５
Reception
受信 Data
データ
Max 2044 bytes
14FFF
15000 ＬＬ
ＬＨ
Connection 6
コネクション６
Transmission
送信 Data
データ
Max 2044 bytes
157FF
15800 ＬＬ
ＬＨ
Connection 6
コネクション６
Reception
受信データ
Data
Max 2044 bytes
15FFF
16000 ＬＬ
ＬＨ
Connection 7
送信
Transmission Data
データ
Max 2044 bytes
167FF
16800 ＬＬ
ＬＨ
Connection 7
受信
Reception Data
データ
Max 2044
最大２０４４バイト bytes
16FFF
17000 ＬＬ
ＬＨ
Connection 8
コネクション８
Transmission
送信 Data
データ
Max 2044 bytes
177FF
17800 ＬＬ [8800]
ＬＨ [8801]
[8802]
Connection 8
コネクション８
Reception
受信 Data
データ
Max 2044 bytes
17FFF [8FFF]
9-101
18000 ＬＬ
ＬＨ
Connection 9
コネクション９
Transmission
送信 Data
データ
Max 2044 bytes
187FF
18800 ＬＬ
ＬＨ
Connection 9
コネクション９
受信
Reception Data
データ
Max 2044 bytes
18FFF
19000 ＬＬ
ＬＨ
コネクション１０
Connection 10
送信
Transmission Data
データ
Max 2044 bytes
197FF
ＬＬ
ＬＨ
コネクション１０
Connection 10
受信
Reception Data
データ
Max 2044 bytes
ＬＬ
ＬＨ
コネクション１１
Connection 11
送信
Transmission Data
データ
Max 2044 bytes
ＬＬ
ＬＨ
コネクション１１
Connection 11
受信
Reception Data
データ
Max 2044 bytes
ＬＬ
ＬＨ
Connection 12
コネクション１２
Transmission
送信 Data
データ
Max 2044 bytes
ＬＬ
ＬＨ
Connection 12
コネクション１２
受信
Reception Data
データ
Max 2044 bytes
9-102

2E000 ＬＬ
ＬＨ
Connection 31
コネクション３１
Transmission
送信 Data
データ
Max 2044 bytes
2E7FF
2E800 ＬＬ
ＬＨ
Connection 31
コネクション３１
送信
Reception Data
データ
Max 2044 bytes
2EFFF
2F000 ＬＬ
ＬＨ
Connection 32
コネクション３２
Transmission
送信データ
Data
Max 2044 bytes
2F7FF
2F800 ＬＬ
ＬＨ
Connection 32
コネクション３２
Reception
受信 Data
データ
Max 2044 bytes
2FFFF
9-103
9.9. SN-I/F Function
If Rack No.: Built-in / Slot N0.: Option is not made setting in the link parameters, SN-I/F is selected as a
link and connected to TOYOPUC-PCS automatically.
Because fixed parameters are automatically set as for the data link area, they can not be changed.
In the case of PC2 compatible mode, it cannot be used as SN-I/F.
When you connect TOYOPUC-PCS, please use L3-T-ON.
When you do not connect TOYOPUC-PCS, please use L3-T-OFF.
9-104
(1) PC link specification
Items Specification
Data link I/O : 32bytes, register : 32bytes
Transmission distance Max 3 m (only inside of controller box)
Parity .............. 1 bit (even parity)
Data type Data length ..... 8 bit
Stop bit ........... 1 bit
Synchronous system Start-stop synchronous
Transmission system Semi-dual system (2-wire type)
Communication speed 288kbps
Cable Shielded twist bare cable
(2) Data link areas

Off-data is set to input data when not communicating with TOYOPUC-PCS (bit0 of S130 turns off).
Items Link area Remarks
Input EVE00-EVEFF 32 bytes (256 points)
I/O
Output EVF00-EVFFF 32 bytes (256 points)
Input S140-S14F 32 bytes
register
Output S150-S15F 32 bytes
(3) Special registers

The communication state with TOYOPUC-PCS and The run state of TOYOPUC-PCS can be
confirmed with S130 (communication status).
Communication with TOYOPUC-PCS is a stop state, but abnormal information is not performed. A
communication state is possible by confirming a flag during communication of bit0 of S130.
Registers Description
Communication status information
bit0:communicating (ON: Communicating with TOYOPUC-PCS)
bit1:RUN signal (ON: TOYOPUC-PCS is in RUN state)
bit2:ERR0 signal (ON: ERR0 occurs in TOYOPUC-PCS)
S130 bit3:ERR1 signal (ON: ERR1 occurs in TOYOPUC-PCS)
bit4:ALM signal (ON: ALM occurs in TOYOPUC-PCS)
bit8:link command available flag(ON: link commands can be issued to
TOYOPUC-PCS)
bit9:link command error (ON: Error occurs by the issued link command. )
S131 Flaming error count
S132 Parity error count
S133 Over run error count
9-105
9.10. Built-in FL-remote M function
(1) FL-remote specification
Item Specifications
Transmission rate 10Mbps, 100Mbps
Max 100m(Between master HUB, and between master slave (at one-to one
Maximum cable length*1 connection) between slave HUB, between HUB-HUB.)
Total extended distance: Max 2100m (HUB:Max20 units)
Maximum number of
64 units (master 1 unit slave 63 units)
connected nodes
Node address Slave: 01~ 63
I/O points number Input: Max. 2048 points, Output: Max. 2048 points
I/O points number per slave Input: Max. 64 points, Output: Max. 64 points
I/O allotment Minimum unit of 8 points
Link area X•Y, M, L, EX•EY, EM, EL, GX/GY, GM
Communication Functions I/O communication
*1 Specified HUB and FRMT are auto-negotiations. Connection with auto-negotiations is 100Mbps.
Switching HUB: Max. 20 units
24VDC

Max 100m
Master Max 100m
Max 100m
Slave 01 Slave 02 Slave 63

Slave: Max. 63 units
9-106
(2) Link No. and Link Area
Link parameters can be optionally set for link No. 1 ~ 8 of program 1 ~3.
Where internal relay (M) or link relay (L) is set in the link area, the relay area in program for which
the link parameter was set becomes the link area.
I/O (X, Y) area and extended area (EX · EY, EM, EL, GX · GY, GM) are common to each program.
Link 1-1 ~ 1-8 Link 2-1 ~ 2-8 Link 3-1 ~ 3-8
Program 1 (PRG.1) Program 2 (PRG.2) Program 3 (PRG.3)

Link parameter can
LINK PARAMETER LINK PARAMETER LINK PARAMETER be optionally set for
link No. 1 ~ 8 of
program-1 ~ -3.
I/O (X · Y) I/O (X, Y) area is common

to each program.
PRG.1 INTERNAL PRG.2 INTERNAL PRG.3 INTERNAL Where internal relay (M) or
RELAY (M) RELAY (M) RELAY (M) link relay (L) is set in the link
area, the relay area in
PRG.1 LINK RELAY PRG.2 LINK RELAY PRG.3 LINK RELAY program for which the link
(L) (L) (L) parameter was set becomes
the link area.
Extended I/O(EX · EY , GX · GY)
EXTENDED INTERNAL RELAY(EM , GM) Extended area is common

to each program.
EXTENDED LINK RELAY(EL)
9-107
(3) Notes when input-output(X,Y)is used in the communication area.
1. Pay attention so that there is no duplication I/O address between I/O module connected to CPU
and communication area.
X/Y000 X/Y000 X/Y000
Good
O
X/Y000 X/Y000 X/Y000
Bad

When the When input-output exists

The area of input-output
communication area is put after the communication
overlaps that of
between input-outputs area.
communication
I/O area of CPU An area where I/O area of

CPU overlaps the
communication area of FL
FL remote communication area. remote
2. Input/output refresh (RIO, FUN No.=280), input refresh (RI, FUN No.=281), and output refresh
(RO, FUN No.=282) of applied command cannot be used to communication area.
3. When “Y” are used for the address of Communication Area, those addresses are set to “X” inside
CPU. Accordingly, when communication area is monitored by the I/O monitor, “X “ is displayed.
9-108
(4)Display
Display lamp indicating FL-remote includes Hardware status and Communication status.
Each Hardware status and Communication status lamp has a green and a red color, and display
these states by lighting, flashing, and putting out.
Define Define state in

Lamp name Color Content
state proposal
Normal state Normal state of a module
Green
Not yet set up In initial
Mortal failure Hardware abnormality
Hardware Red
Light failure Link parameter error
status
 No power supply of master module
- No power supply  In the process of resetting
 Waiting to be initially processed.
Normal state Normal state of a network
Green The network is normal; communication is not
Not yet connected
yet established
Mortal  Detected abnormality unable to
Communicati communication communicate on the network.
on status Red abnormality  Duplicate node address
Communication Communication abnormality of the child
abnormality station of the communication part.
Abnormality of power
- Cable unconnection
supply of the network
: lighting : flashing : putting out
9-109
9.10.1. Order of Power on
Supply power first to the slave then to the master, or supply power to both the slave and master at the
same time. Supplying power first to the master and then to the slave may cause communication error.
And cutting off power supply to the slave after start of communication may cause communication error
too.
Power supply Results

order
Master  Slave 
Slave  Master 
Simultaneously 
The master does not regard response delay in the slave for up to 18 seconds. During this period, the
master carries out communication recovery actions. And if recovery is not possible then, it reports the
situation as communication error.
Note 1: To remove communication error, reset and start the CPU or turn the communication reset
special ON. (Refer to "9.10.3. Communication Reset.")
Note 2: The master continues communication when the communication of all the slaves is normal.
Even if one slave is missing, the master regards it as communication error and stops
communication. (Use the unlinking function to continue communication. Refer to "9.10.4.
Unlinking Function." FL-remote can choose the communication stop / continuation at the
communication error by setup of Link Parameter.)
9-110
9.10.2. Communication Reset
Communication reset is the function to make communication resume, when communication stops by
communication error.
To reset communication, turn the communication reset special relay OFF  ON.
The special relay I/O address corresponding to the link number is as shown below:
Link No. I/O address

1 V80
2 V81
3 V82
4 V83
5 V84
6 V85
7 V86
8 V87
Note 1: Communication reset is valid only at rise of the special relay.

Note 2: Communication reset is valid only at communication error.
At normality, Communication reset is invalid.
 Communication reset by reset of CPU

The reset switch of the CPU resets the communication.
9-111
 Communication Reset Circuit Example
For 18 seconds after supplying power, communication recovery actions are carried out, so reset
circuit is not necessary.
The figure below is a circuit example for communication recovery at communication error.
V82
Communication reset Communication reset
pushbutton signal
VAA
Communication error Communication
special relay error
Note 1: The above shows a circuit example of Link No.=3.

Communication error special relay, communication reset differs with link number.
Note 2: When "CPU RUN Stop" is set at communication error, the above circuit does not become
valid.
9.10.3. Unlinking Function

When the slave gets in communication error, the master stops communication to all the slaves and
reports error.
The unlinking function is such that a specific slave is broken away (or reset) from the communication
network.
This function makes it possible to separate the slave that is in the abnormal state from the
communication network and continue communication for other normal slaves.
 Communication to Unlinked Slave

(1) When the unlinked slave is normal:
The master sends I/O OFF data to the unlinking-designated slave. The master reads and
disposes the received data from the slave, and works as if it was received I/O OFF data.
Even the output to the unlinked slave is turned ON, it sends OFF data on communication. The
master carries out I/O data communication as usual with other slaves.
Even when the master is turned on or its communication is reset with a slave in unlinking status,
OFF data is exchanged.
9-112
(2) When the unlinked slave gets in communication error:
The master continues communication recovery actions until the error of the slave is removed.
When error is removed, and there is normal response, it starts exchanging OFF data. During
this period, the master carries out I/O data communication as usual to other slaves.
To annunciate that the unlinking-designated slave has become abnormal in
communication, the master displays error code D9 (Communication error) and abnormal
slave number on 7-seg display.
Where the unlinking is designated for all slaves and all slaves get in communication
errors, the master judges that not a single slave exists on the network, producing error
code E2 (Transmission Error). At this time, in FL-remote, the unlinking function is valid.
(3) When unlinking designation is canceled:

When slave station is normal---------- I/O data of normal ON/OFF is exchanged.
When slave station is error ---------- It is regarded as communication error, and error is reported,
and communication is stopped to all the slaves.
(4) Others
When the unlinking-undesignated slave gets in communication error, the master reports error
and stops communication to all the slaves.
 Designation of Unlinking Slave

Unlinking state of each slave are set by setting data in special registers S3*C to 3*F.
Bit No. represents node address (station number).

MSB LSB
S3*C 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 -
S3*D 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
S3*E 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
S3*F 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
Each bit = 1: unlinking designation

Each bit = 0: no unlinking designation
 The asterisk portion of each special register is replaced by the link No.
Link No. 1 2 3 4 5 6 7 8
* 1 3 5 7 9 B D F
9-113
9.10.4. Communication data response time
(1) Configuration
Slaves are all FRMT (TCU-6405, TCU-6406, and TCU-6407).
Refreshing Communication
CPU processing Incorporated processing
FL remote
master (master
station)
FRMT FRMT FRMT (Slave station)
Input X120
Output Y100
(2) Program
X120 Y100
Time from input to slave station to output from slave station is the communication data response time.
(3) Calculation formula
Average of response time = 20 + 1.7 x (number of slaves) + (I/O response time) + (scan time) x 2 [ms]
(in the case of 100Mbps)
(Reference) FRMT Specification of I/O response time

OFF  ON: 1.5ms or below
ON  OFF: 1.5ms or below
9-114
9.10.5. Parameter Setting
The programmer sets up “I/O Module” and “Link Parameter”.
The example of a setting of the parameter by PCwin is explained below.
Note 1: In the case of change or additional parameter, be sure to read "All programs + parameter” from
CPU before change or addition.
Note 2: Please set up the Link Parameter of "FL-remote-M" more than by Ver.10 of PCwin.
Next, it explains the method of setting the parameter of the following compositions.
LS is connected with i4. A valve is connected with O2
Slave
9.10.5.1. I/O Module Setting

PC10G incorporates the function of FL remote control, and it is not necessary to set "I/O module".
9-115
9.10.5.2. Link Parameter Setting
“Link parameter" is chosen at a parameter menu and the following screen is displayed.
(1)
(2)
[Setting procedures of Link module name]

(1) Program No. and Link No. are chosen.
(2) [Link setup] is clicked and the following screen is displayed.
(3) (4)
(5)
(6)
(3) Rack No. in which the module is mounted is chosen.

in Rack No. column is clicked and rack No. (0 - E) is chosen.
(4) Slot No. in which the module is mounted is chosen.
in Slot No. column is clicked and Slot No. (0 - 7) is chosen.
(5) Setting Link module name
in Link module name column is clicked and Link module name is chosen.
(6) By clicking [OK], the following screen is displayed and Link module name is set up.
(7)
(7) By clicking [Detail], the following screen is displayed.
9-116
[Setting detailed setup]
Setting the detailed parameter of FL-remote-M
(1) (9)
(2) (8)
(3)
(7)
(4) (6)
(5)
(10)
(1) [Link area]

The top address of the communication area is set up. The last address is automatically set up by
the sum total of transmission bytes of slaves.
The area that can be used as I/O address is as follows.
• Link relay: L00L-L7FL, L1000L~L2FFFH, EL000L-EL1FFH
• Internal relay: M00L-M7FH, M1000L-M17FFH, EM000L-EM1FFH, GM000L-GMFFFH
• Input / Output: X•Y00L-X•Y7FH, EXY000L-EXY7FH, GXY000L-GXYFFFH
Note 1: GX•GY and GM area can be used in the PC3JG separate mode.
Note 2: When using X•Y area for the communication area, don't overlap I/O used by CPU.
(2) [Node name]

Please put the name of FL-remote-M.
9-117
(3) [Slave setup]
Slave No. at Slave setup list is clicked, [Slave setup] is clicked, and detailed parameter of Slave
is set up. Please refer to "Setting detailed parameter of Slaves" for details.
(4) [State of output in halt]

The output state when RUN of CPU module stops is set up. When it sets up for "Clear", the node
transmission data of the data link becomes all 0 if RUN stops. When it sets up for "Hold", it keeps
transmitting the data just before RUN stops even if RUN stops.
(5) [Communication stop in communication error]

Communication is set up for "stop" or "not stop" in communication error.
When it sets up for "not stop", the master does not report errors to CPU in communication error,
but the master continues the communication with normal slaves. The master resumes the
communication with the slaves automatically, when error slaves return normally.
(6) [CPU operation in communication error]

CPU operation when error occurs in the module is set up. When it sets up for "RUN continued",
RUN never stops even in communication error. When it sets up for "Stop", RUN stops in
communication error.
(7) [Unconnected detecting effective I/O address list]

The I/O address that set “Enable” to Unconnected detecting is displayed about a slave clicked in
[Slave setup list].
(8) [Diagnosic Detail setup]

When a slave is FRMT series, the area that stores diagnosis data (General-purpose status,
Short-circuit state, Unconnected state) in CPU is set up. Please refer to "9.10.6 COLLECTION
OF DIAGNOSIS DATA" for details of diagnosis data.
(9) [Network]
It is not necessary to set it for this item.
(10) [OK] is clicked after completing the setup.
9-118
[Setting the detailed parameter of slaves]
The slave setting screen of FRMT
(4)
(1)
(2)
(3)
(3)-1.
(3)-2.
(1) [Slave connection setup]

"Do" is set up in the case that connects a slave to the network.
"Do not" is set up in the case that does not connect a slave to the network.
(2) [Transferred bytes setup] M: Master, S: Slave, : Transmission Direction

The number of slave I/O bytes is set up with decimal.
The number of input bytes is set to [M  Bytes transferred to slave], the number of output bytes is
set to [S  Bytes transferred to mas.ter].
I/O address of the upper row in [Transferred bytes setup] is previously allocated, I/O address of
the lower is allocated in the following order.
In the order of I/O address of the previous setting example, input is previous and output is
following. The transmission direction changes by click of [Transmission Direction].
Range of the number of transferred bytes per one slave: Input 0-128 and output 0-128
The sum total of the number of transferred bytes: Less than 256 bytes.
(3) [Extended setting]
In case that the correspondent slave is FRMT series, please set the following.
(3)-1. Diagnosis function
In case that the diagnosis function of FRMT series is used, [Enable] is set. In case that the
diagnosis function of FRMT series is not used, [Disable] is set.
Refer to "9.10.8 Collection of Diagnosis Data" for the details of diagnosis data.
(3)-2. [Unconnected detecting Enable/Disable]
[Enable] or [Disable] for the function of detecting disconnection is set to each point.
Check is [Enable] and no check is [Disable].
00 – 3F are I/O address.
(Note) Data of [Unconnected detecting Enable/Disable] are saved to the slave in initialed
processing of the master when diagnosis function "Enable". These data are maintained
during turning off slave's power supply.
(4) [OK] is clicked after completing the setup.
9-119
9.10.6. COLLECTION OF DIAGNOSIS DATA
In FL-remote, there are diagnosis data as ‘general-purpose status’, ‘short circuit data’, ‘disconnection
data’, and ‘validity/invalidity of the disconnection detecting function’ besides the I/O data.
I/O data / diagnosis data flow

I/O is always refreshed. I/O communication
CPU Master (FL remote-M) Slave (FRMT series)
I/O allocation
I/O data I/O data I/O data
1
general status general status general status

2
error record reset / error record reset /
arbitrary reading switch arbitrary reading switch
validity/invalidity of the Link parameter validity/invalidity of the validity/invalidity of the

3 disconnection detecting Setting data disconnection detecting disconnection detecting
function function function
4 short-circuit data short-circuit data short-circuit data
disconnection data disconnection data disconnection data

5
When the short-circuit and the disconnection command

are generated, I/O is refreshed. response
I/O allocation by the link parameter of FL-remote (Refer to “9.10.7 Collection of Diagnosis Data by
Link Parameter” about details)
1. I/O data: the top address is set to ‘link area’.
2. General-purpose status and error record reset / arbitrary reading switch: the top address is set to
‘General-purpose status area’ in the extended setting.
3. Validity/invalidity of the disconnection detecting function: ‘validity/invalidity of the disconnection
detecting function’ is set for the I/O address of the each slave. This data is kept during turning off
the slave's power supply.
4. Short-circuit data: the top address is set to ‘ Short-circuit state area’ in the extended setting.
5. Disconnection data: the top address is set to ‘ Unconnected state area’ in the extended setting.
(Note 1) In general-purpose status, error record reset / arbitrary reading switch, validity/invalidity of the
disconnection detecting function, short-circuit data and disconnection data, the target slave is
FRMT series and these are effective when set by the link parameter, diagnosis function
"Enable".
(Note 2) If the diagnosis functions of all slaves are ‘Disable’, ‘General-purpose status area’ of the node
01-63 must be set to the unused area because these are always I/Orefreshed.
(Note 3) To change the "diagnosis function" from "Enable" to "Disable":

1) In the state of the "diagnosis function" being "Enable," change "no-contact detection" of all I/O
addresses to "Disable."
2) After writing parameters, re-supply to check if the communication is established.
3) Change "diagnosis function" to "Disable."
4) After writing parameters, re-supply the power to check if the communication is established.
9-120
9.10.6.1. Collection of Diagnosis Data by Link Parameter
I/O allocation to CPU for ‘general-purpose status’, ‘short-circuit data’ and ‘disconnection data’, and the
setting of ‘validity/invalidity of the disconnection detecting function’ are set to the link parameter of
FL-remote with PCwin (Ver10 or later).
Please refer to “9.7.7 Parameter Setting” for the method of setting the link parameter.
Initial setting is "general-purpose status area" D000L-D003FH, "short-circuit information area"
D0040L-D007FH", and "Un-connect information area" D0080L-D00BFH.
The link parameter setting screen of FL-remote with PCwin
The detail setting screen of the slave Diagnosis function Enable/Disable

Enable: The “Unconnected detection
Enable/Disable” setting information per
slave address I/O is sent when power is
supplied.
Disable: Does not send the
“Unconnected detection Enable/disable”
setting information.
Each slave I/O address retains the
information which was set when
“diagnosis function enable”.
‘validity/invalidity of the
disconnection detecting function’
are set.
‘ ’ is checked to the I/O address
‘ ’ : validity, ‘ ‘ : invalidity
To make “Diagnosis function” “Valid” from “Invalid”

1) Set “Unconnected detection” of all I/O address to
“Invalid” in the state of “Diagnosis function” being
“Enable”,
2) Turn the power on again after writing parameter
in order toconfirm if communication is established
O.K.,
3) Set “Diagnosis function” to “Invalid,
4) Turn the power on again after writing parameter
in order to confirm if communication is
established O.K.
9-121
9.10.6.2. General-purpose Status
If the general-purpose status is allocated to CPU by the link parameter, ‘general-purpose status’ is
allocated to the top address to set [+00L] – [+1FH], and ‘error record reset / arbitrary reading switch’ is
allocated to [+20L] – [+3FH] in CPU. (Refer to “9.10.3.3 Error Record Reset / Arbitrary Reading Switch”
about details)
The general-purpose status and the error record reset / arbitrary reading switches are allocated in 1byte
per 1node.
(Note) Even if the diagnosis functions of all slaves are set to ‘Disable’ in the link parameter of FRMT, the
general-purpose status and the error record reset / arbitrary reading switch of the node 01-63 are
allocated.
Allocation of the general-purpose status and error record reset / arbitrary reading switch
relative byte data
address
+00L
+00H node 01 : general-purpose status
| |
| | General-purpose status area
| |
+1FL node 62 : general-purpose status
+1FH node 63 : general-purpose status
+20L
+20H node 01 : error record reset /
arbitrary reading switch
| |
| | Error record reset / arbitrary reading switch
| |
+3FL node 62 : error record reset /
+3FH node 63 : error record reset /
The format of general-purpose status is the following.
General-purpose status format

bit content
0 I/O terminal block1 (for I/O address 0-F) Power supply voltage state flag
0 : I/O power ON , 1 : I/O power OFF
1 I/O terminal block2 (for I/O address 0-F) Power supply voltage state flag
0 : I/O power ON , 1 : I/O power OFF
2 Unused (not defined)
4 In case of the input unit
detection flag of disconnection Please refer to the
0 : normal (all connected) operation manual of the
1 : disconnection (when disconnected sensor is detected) FRMT series ("2.5.2
In case of the output unit Detection timing of
detection flag of disconnection disconnection") for the
0 : normal (all connected) state of the flag.
1 : disconnection (when disconnected external load is detected)
5 In case of the input unit only
detection flag of short-circuit
0 : normal (all points are normal)
In error : 1
1 : short-circuit (it is short-circuited)
In case of the output unit (keep for minimum 1s)
detection flag of disconnection After releasing : 0
0 : normal (all points are normal)
1 :short-circuit (when it is short-circuited)
9-122
9.10.6.3. Error Record Reset / Arbitrary Reading Switch Format
In FRMT series, after detecting ‘short-circuit’ and ‘disconnection’, if the factor is removed, I/O control is
returned automatically but the short-circuit data and the disconnection data are kept and I/O LED is
maintained in the red flicker.
Setting various bits of the error record reset switch can reset these kept data.
The error record and the error are loaded to the diagnosis data map (Refer to “9.10.7.4 Diagnosis
Data Map” about details) by setting various bits of the arbitrary reading switch.
Format of error record reset / arbitrary reading switch

bit content
0 short-circuit error record reset for input unit (1 : reset)
Error record reset switch
1 disconnection error record reset for input unit (1 : reset)
(Note) It is validity only the
2 short-circuit error record reset for output unit (1 : reset)
rise differentiation
3 disconnection error record reset for output unit (1 : reset)
short-circuit record and reading of current state for input unit
4
(1: reading)
disconnection record and reading of current state for input
5 Arbitrary reading switch
unit (1: reading)
(Note) It is validity only the
short-circuit record and reading of current state for output unit
6 rise differentiation
(1: reading)
disconnection record and reading of current state for output
7
unit (1: reading)
9.10.6.4. Diagnosis Data Map

In FRMT series, when detecting ‘short-circuit’ and ‘disconnection’, the master saves the diagnosis data
in the short-circuit data area or the disconnection data area automatically.
Please refer to ‘(1) Format of short-circuit data area’ about the data from the top address [+00L] to
[+3FH] in the short-circuit data area that is set in the link parameter.
Please refer to ‘(2) Format of disconnection data area’ about the data from the top address [+00L] to
[+3FH] in the disconnection data area that is set in the link parameter.
Common explanation of ‘Short-circuit data area’ and ‘disconnection data area’

1) The error record data and the error current data are saved at the same time
2) This area is a shift structure of four steps, and information 0 is latest data and data shifts in order of
information 1 -> information 2 -> information 3 and information 3 disappears.
3) Get/Set flag (Only information 0)
When the master (FL-remote) saves the error record data and the error current data, bit 0 of the
Get/Set flag is set.
Bit 0 of the Get/Set flag is observed by sequence program, and when the bit is set, the error record
data and the error current data are taken out and clear the bit. (Clear the bit at initialization)
9-123
(1) Format of short-circuit data area
Relative
Data Content Data format
address
+00L Get/Set flag Bit0=0 : Get, Bit0=1 : Set, Bit1 – 7=0 fixed
+00H (Unused) 00h fixed
+01L Node address (Hex) 00h – 3Fh (1 – 63)
+02L Response code Lo Normal :69h Error :94h
Short-
circuit
+02H Response code Hi 00h fixed
+03L Error code Lo error code (Lo) of message response (Normal:00h Error:10h)
Record +03H Error code Hi error code (Hi) of message response(Normal:00h Error:00h)
data0 +04L MSB LSB
+04H 07 06 05 04 03 02 01 00
newest
data
+05L 0F 0E 0D 0C 0B 0A 09 08
+05H Short-circuit record data | | | | | | | |
+06L I/O 0 – 63 | | | | | | | |
+06H 3F 3E 3D 3C 3B 3A 39 38
Numerical value : I/O Address
+07L
Bit data=0 : Normal , Bit data=1: Short-circuit
+07H
+0AL Response code Lo Normal :67h Error :94h
Short-
circuit
+0AH Response code Hi 00h fixed
+0BL Error code Lo error code (Lo) of message response(Normal:00h Error:10h)
Current +0BH Error code Hi error code (Hi) of message response(Normal:00h Error:00h)
data0 +0CL MSB LSB
+0CH 07 06 05 04 03 02 01 00
newest
data
+0DL 0F 0E 0D 0C 0B 0A 09 08
+0DH Short-circuit current data | | | | | | | |
+0EL I/O 0 – 63 | | | | | | | |
+0EH 3F 3E 3D 3C 3B 3A 39 38
+0FL
Bit data=0 : Normal , Bit data=1: Short-circuit
+0FH
Short- Same as record data0 Same as record data0
+10L
circuit
|
Record
+17H
data1
Short- +18L Same as current data0 Same as current data0
circuit
Current
|
data1 +1FH
Short- +20L Same as record data0 Same as record data0
circuit
Record
|
data2 +27H
Short- +28L Same as current data0 Same as current data0
circuit
Current
|
data2 +2FH
Short- +30L Same as record data0 Same as record data0
circuit
Record
|
data3 +37H
Short- Same as current data0 Same as current data0
+38L
circuit
|
Current
+3FH
data3
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(2) Format of disconnection data area
Relative
Data Content Data format
address
+02L Response code Lo Normal : 6Ah Error : 94h
Disco- +02H Response code Hi 00h fixed
Connection
+03L Error code Lo error code (Lo) of message response(Normal:00h Error:10h)
Record +03H Error code Hi error code (H) of message response(Normal:00h Error:00h)
data0 +04L MSB LSB
newest +04H 07 06 05 04 03 02 01 00
data +05L 0F 0E 0D 0C 0B 0A 09 08
+05H Disconnection record data | | | | | | | |
+06L I/O 0 – 63 | | | | | | | |
+06H 3F 3E 3D 3C 3B 3A 39 38
+07L
Bit data=0 : Normal , Bit data=1: Disconnection
+07H
+0AL Response code Lo Normal:68h Error:94h
Disco- +0AH Response code Hi 00h fixed
Connection
+0BL Error code Lo Error code (Lo) of message response(Normal:00h Error:10h)
Current +0BH Error code Hi Error code (Hi) of message response(Normal:00hErrot:00h)
data0 +0CL MSB LSB
newest +0CH 07 06 05 04 03 02 01 00
data +0DL 0F 0E 0D 0C 0B 0A 09 08
+0DH Disconnection current data | | | | | | | |
+0EL I/O 0 – 63 | | | | | | | |
+0EH 3F 3E 3D 3C 3B 3A 39 38
+0FL
Bit data=0 : Normal , Bit data=1: Disconnection
+0FH
Disco- Same as record data0 Same as record data0
Connection
+10L
Record |
data1 +17H
Disco- +18L Same as current data0 Same as current data0
Connection
Current |
data1 +1FH
Disco- +20L Same as record data0 Same as record data0
Connection
Record |
data2 +27H
Disco- +28L Same as current data0 Same as current data0
Connection
Current |
data2 +2FH
Disco- +30L Same as record data0 Same as record data0
Connection
Record |
data3 +37H
Disco- Same as current data0 Same as current data0
Connection
+38L
Current |
data3 +3FH
9-125
9.11. BUILT-IN standard MODBUS-RTU (slave) function
Data is exchanged with the MODBUS-RTU (master) using MODBUS-RTU communication.
MODBUS-RTU is the function added in PC10G Ver3.30~.）
9.11.1. MODBUS-RTU specification
(1)MODBUS-RTU specification
Items Specification
Interface standard Conforming to EIA RS-485 2-wire type
Communication
Start-stop synchronous
system
Transmission line Shielded twist bare cable
Communication 0.3,0.6,1.2,2.4,4.8,
speed 9.6, 19.2 ,38.4,57.6,115.2kbps (Presetting)
Transmission
Max 1km(Total extended distance)
distance
Transmission form 1:N 1:1
Number of stations Max 255 stations
Start bit……1 bit
Data length…….8 bit
Data type
Parity…….with/none odds/even (Presetting)
Stop bit....... 1 or 2 bit (Presetting)
Error detection Parity check, CRC check
(2) Supported MODBUS function codes
Function code Function

01, 02 Bit data reading
03, 04 Word data reading
05 1 bit data writing
06 1 word data writing
0F(15) Writing bit data to block
10(16) Writing word data to block
( ): Decimal
For details of MODBUS Communication Protocol etc., refer to specifications etc. published on the
web.
9-126
(3) MODBUS corresponding address map
Bit address for function code 01, 02, 05, 0F
MODBUS addoress No points

TOYOPUC Word addoress
Word addoress (word)
0000～ EP 0 ～ FFF 4096 EP 000 ～ FFF
EK 1000 ～ 1FFF 4096 EK 000 ～ FFF
EV 2000 ～ 2FFF 4096 EV 000 ～ FFF
ET,EC 3000 ～ 37FF 2048 ET,EC 000 ～ 7FF
EL 3800 ～ 57FF 8192 EL 000 ～ 1FFF
EX,EY 5800 ～ 5FFF 2048 EX,EY 000 ～ 7FF
EM 6000 ～ 7FFF 8192 EM 000 ～ 1FFF
8000～ P 8000 ～ 81FF 512 P 000 ～ 1FF
K 8200 ～ 84FF 768 K 000 ～ 2FF
V 8500 ～ 85FF 256 V 000 ～ FF
P1 T,C 8600 ～ 87FF 512 T,C 000 ～ 1FF
L 8800 ～ 8FFF 2048 L 000 ～ 7FF
X,Y 9000 ～ 97FF 2048 X,Y 000 ～ 7FF
M 9800 ～ 9FFF 2048 M 000 ～ 7FF
A000～ P A000 ～ A1FF 512 P 000 ～ 1FF
K A200 ～ A4FF 768 K 000 ～ 2FF
V A500 ～ A5FF 256 V 000 ～ FF
P2 T,C A600 ～ A7FF 512 T,C 000 ～ 1FF
L A800 ～ AFFF 2048 L 000 ～ 7FF
X,Y B000 ～ B7FF 2048 X,Y 000 ～ 7FF
M B800 ～ BFFF 2048 M 000 ～ 7FF
C000～ P C000 ～ C1FF 512 P 000 ～ 1FF
K C200 ～ C4FF 768 K 000 ～ 2FF
V C500 ～ C5FF 256 V 000 ～ FF
P3 T,C C600 ～ C7FF 512 T,C 000 ～ 1FF
L C800 ～ CFFF 2048 L 000 ～ 7FF
X,Y D000 ～ D7FF 2048 X,Y 000 ～ 7FF
M D800 ～ DFFF 2048 M 000 ～ 7FF
E000～ GX,GY E000 ～ FFFF 8192 GX,GY 000 ～ 1FFF
9-127
Word address for function code 03,04,06,10
MODBUS addoress No points

TOYOPUC Word addoress
Word addoress (word)
0000～ EP 0 ～ FF 256 EP 000 ～ FF W
EK 100 ～ 1FF 256 EK 000 ～ FF W
EV 200 ～ 2FF 256 EV 000 ～ FF W
ET,EC 300 ～ 37F 128 ET,EC 000 ～ 7F W
EL 380 ～ 57F 512 EL 000 ～ 1FF W
EX,EY 580 ～ 5FF 128 EX,EY 000 ～ 7F W
EM 600 ～ 7FF 512 EM 000 ～ 1FF W
ES 800 ～ FFF 2048 ES 000 ～ 7FF
EN 1000 ～ 17FF 2048 EN 000 ～ 7FF
H 1800 ～ 1FFF 2048 H 000 ～ 7FF
2000～ P 2000 ～ 201F 32 P 000 ～ 1F W
K 2020 ～ 204F 48 K 000 ～ 2F W
V 2050 ～ 205F 16 V 000 ～ F W
T,C 2060 ～ 207F 32 T,C 000 ～ 1F W
P1 L 2080 ～ 20FF 128 L 000 ～ 7F W
X,Y 2100 ～ 217F 128 X,Y 000 ～ 7F W
M 2180 ～ 21FF 128 M 000 ～ 7F W
S 2200 ～ 25FF 1024 S 000 ～ 3FF
N 2600 ～ 27FF 512 N 000 ～ 1FF
R 2800 ～ 2FFF 2048 R 000 ～ 7FF
D 3000 ～ 3FFF 4096 D 000 ～ FFF
4000～ P 4000 ～ 401F 32 P 000 ～ 1F W
K 4020 ～ 404F 48 K 000 ～ 2F W
V 4050 ～ 405F 16 V 000 ～ F W
T,C 4060 ～ 407F 32 T,C 000 ～ 1F W
P2 L 4080 ～ 40FF 128 L 000 ～ 7F W
X,Y 4100 ～ 417F 128 X,Y 000 ～ 7F W
M 4180 ～ 41FF 128 M 000 ～ 7F W
S 4200 ～ 45FF 1024 S 000 ～ 3FF
N 4600 ～ 47FF 512 N 000 ～ 1FF
R 4800 ～ 4FFF 2048 R 000 ～ 7FF
D 5000 ～ 5FFF 4096 D 000 ～ FFF
6000～ P 6000 ～ 601F 32 P 000 ～ 1F W
K 6020 ～ 604F 48 K 000 ～ 2F W
V 6050 ～ 605F 16 V 000 ～ F W
T,C 6060 ～ 607F 32 T,C 000 ～ 1F W
P3 L 6080 ～ 60FF 128 L 000 ～ 7F W
X,Y 6100 ～ 617F 128 X,Y 000 ～ 7F W
M 6180 ～ 61FF 128 M 000 ～ 7F W
S 6200 ～ 65FF 1024 S 000 ～ 3FF
N 6600 ～ 67FF 512 N 000 ～ 1FF
R 6800 ～ 6FFF 2048 R 000 ～ 7FF
D 7000 ～ 7FFF 4096 D 000 ～ FFF
8000～ U 8000 ～ FFFF 32768 U 000 ～ 7FFF
9-128
9.11.2. Set link parameter
PCwin Ver14.3R02 or later is necessary for setting up MODBUS.
(1) Set rack No. , Slot No. , Link Module name parameter
For Plus MODBUS, set the link module name in Rack No. [Built-in] and Slot No. [standard] to
[MODBUS].
(2) Detailed Link Parameter Settings

Set the parameters to suit the device connected to
Operating procedure
1. Set the station No.
2. Set the stop bit.
3. Set the Parity
4. Set the baud rate.
Click for the baud rate and select a desired baud rate from the list.
5. 2-wire is chosen. (The ports with built-in BUS-EXP is only 2-wire.)
6. When the setting is completed, c
lick [OK].
9-129
9.12. EtherCAT Function
Refer to the TOYOPUC EtherCAT Operation Manual (T-326N) for details such as specifications,
parameter settings and usage.
TOYOPUC PC10G-CPU (Ver3.60~)
＜L1＞
EtherCAT（Master）
Only one port of EtherCAT

＜L2＞ (master) can be used (selection)
EtherCAT（Master） (Two systems cannot be used at
the same time)
9-130
9.13. EtherNet/IP Function
PC10G more than Ver3.80 can use built-in L1 and L2 ports as EtherNet/IP. Use PCwin Ver. 17. 2R01 for
peripheral devices.
9.13.1. Outline
EtherNet/IP is an industrial network based on the widely used Ethernet technology. This standard is
controlled by ODVA (Open DeviceNet Vendor Association) and adopted in many devices manufactured in
the world.
You can use EtherNet/IP to establish not only the controller-to-controller network but also the field network
between the controller and devices.
<System outline>
EtherNet/IP is a multi-vendor network. For this reason TOYOPUC can be connected with not only another
TOYOPUC in a data link but also other EtherNet/IP-compatible controllers, remote I/O devices and so on
made by other than us.
EtherNet device
EtherNet/IP
Up to four EtherNet/IP
systems can be used
simultaneously.
EtherNet/IP device
PC10G is a device supporting Ether-Net/IP-compatible scanners.

A scan list including both the originator connections and target connections can be entered with PCwin, so
that EtherNet/IP controllers and IO devices equipped with CIP Transport class 1 can be connected.
(Transport class 3 is not supported.)
What is the scanner? .... A device that can establish a connection between scanners or between the
scanner and adaptor. The scanner has an originator function that opens the
connection of another device.
What is the adaptor? …. A device that does not have the function for opening a connection. For the
realization of EtherNet/IP communications, a scanner must open
communications. The adaptor is a frequently observed type in remote I/O
devices.
What is connection? .…….A communication path for EtherNet/IP-compatible data communications.
Note 1 : The data link is not established merely between adaptors.

Note 2 :Connection with devices made by other than us is subject to limitations. Refer to the cautionary
description given on the next page.
9-131
9.13.2. EtherNet/IP specification
NOTE) With EtherNet/IP compatible CPUs in Ver3.80 or later PC10G
9.13.2.1. EtherNet/IP
Communication service Specification

EtherNet/IP See Reference 9.13.2.2 EtherNet/IP Communication specification
No. of ports 8（TCP/UDP total）
General Compatible Ethernet computer link system
TCP/UDP communication Ethernet file memory system
system Ethernet general communication system
9.13.2.2. EtherNet/IP communication specification
Item Specification
No. of connections Max.128（Originator up to 64/Target up to 64）*1
No. of sessions (sum of no. of
IO connections + no. of ports Max.128
used for UCMM)
RPI(packet interval) 2～10000ms Enter in 2ms increments.
Transmission trigger Cyclic / Change of state(COS)
Connection type Point2Point / Multicast
Connection setting application
Exclusive Owner/Input Only
type
Communication time-out RPI x *
interval [ms] ( *= 4, 8, 16, 32, 64, 128, 256, 512)
Allowable band width of unit 1000pps
Max. link size of each
504 bytes or 1448 bytes（Large Forward Open specifications）
connection
Input (originator target → originator data size + target originator → target
data size) Max. 4096 byte
Total connection size
(originator originator → target data size + target target → originator data
size) Max. 4096 byte
*1 For connection occupation number at the time of using the multicast on the target, please refer to
"9.13.4.2 Link parameter setting" - "(2-2) Originator" - "(d-2) Connection type" - “Note”.
9-132
Linked Parameter configurable count Up to two links
Communication I/O Identifier L,X/Y,M,EL,EX/EY,EL,GX/GY,GM
area that can be
entered Register Identifier R,D,U
No. of I/O areas of each connection Max.8
Function No. of I/O areas that can be
Max.1000
registered
Communication disconnection station
Clear/Hold selectable
input
Output at RUN stop Clear/Hold selectable
First-connection setting Parameter entry possible
Note 1: Connection with devices of the following settings is impossible with the Transport Class 1
connection.
(1) Device not supporting "Point-to-Point" or "Multicast" connection type
(2) Device not supporting "Cyclic" or "Change of State (COS)" trigger
(3) Device of "Listen Only" or "Redundant Owner" transport type
(4) Device of "zero length format" real-time format
(5) Device of "Variable" network connection parameter ("Fixed"/"Variable")
(6) Device needing parameter setting using data segment
Note.2) Transport Class3 is not supported.

Note 3) PCwin is not provided with an EDS file acquisition function.
Note 4) PCwin is not provided with an EDS file acquisition function.
What is the EDS file? ... File including configuration description of the EtherNet/IP device supplied by the
corresponding vender
9-133
9.13.3. IO communication function
1) Connection
It is necessary to open connection with the other party of communication for data transmission
and reception.
The party opening the connection is called originator while the opened party is called target. The
originator issues a request to open connection to the target.
After connection is successfully opened, data communications become possible.
EtherNet/IP of TOYOPUC can use both the function of the originator and that of the target.
There are the following types in the connection connecting.
<Exclusive Owner>
This function enables bidirectional data communications with a single connection: from originator
to target and from target to originator.
This function can be used if the connection point setting is an instance ID. It may not be used in
case of a tag.
(For the connection point, refer to "2) Data allocation" on the next page.)
TOYOPUC or a third-party's
TOYOPUC EtherNet/IP module
Connection in-connection
Originator Target
Input IO data Output
Output IO data Input
＜Input Only＞
This setting enables data communication with a single connection from the target to the
originator.
If the connection point is tag designation, define two connections as shown below to realize
bidirectional communications.
TOYOPUC or a third-party's
TOYOPUC EtherNet/IP module
Originato Target
Input IO data Output
Target Originato
Output IO data Input
9-134
2) Data allocation
When connecting a connection, designate the connection point, which is provided for the target,
at the originator.
There are two types for designation of the connection point: instance ID and tag.
a) Instance ID
With this communication method, designate the other party of connection with the instance ID (a
number between 0 and 65535).
Designate the ID of the target connection at the originator.
Enter the address of the I/O area in detail connection settings.
Connec-
PLC A PLC B
tion point
CPU EtherNet/IP communication EtherNet/IP communication CPU
user memory function section Designate "101" function section user memory
(originator-to-target ID) or
Instance ID "100" (target-to-originator) Instance ID
Input area as a request to open. “100” Output area
Input area IO refresh Data IO refresh Output area
Input area Output area

Connec-
tion point
“101”
Output area Input area

IO refresh Data IO refresh
領

Originator Target
9-135
b) Tag
With this communication method, designate the other party of connection with a tag (variable
name).
PLC A Connec- PLC B

tion
CPU EtherNet/IP communication point EtherNet/IP communication CPU
function section function section user memory
Designate "tag_123" as
a tag name to request to Tag name
Input area open. Output area
”tag_123”
Input area IO refresh Data IO refresh Output area
Input area Output area

Originator Target
Designate "tag_456" as a
Tag name tag name to request to
open.

IO refresh Data IO refresh
Connection
Output point Input area
area
Target Originator
3) Connection in-connection motion
The originator requests connection in-connection to the target connection designated as the
other party of connection after it is turned on and becomes ready to start communications. When
the target is ready to respond and judges that connection can be made in response to a
connection request of the originator, connection is established.
The target checks the ID (or tag) data, data size and so on upon a connection request of the
originator.
If there is inconsistency in parameter data between the originator and target, connection
in-connection is impossible.
If the originator fails to make connection in-connection with the target device, a connection error
is caused and each piece of status data is updated. For the status, refer to Section 9.13.5.
When a connection error is caused, the originator tries to connect again.
While, if no problem is found in the other party or network device, connection in-connection is
made again, it may take about one minute to re-connect at certain network configuration or
connection setting state.
9-136
4) Packet interval (RPI)
After connection in-connection is successfully made, data transmission is made at a certain interval
from both the originator and target. This interval is called packet interval. The allowable setting range is
between 2 and 10,000ms. The packet interval can be entered both for the originator-to-target (OT)
direction and for the target-to-originator (TO) direction.
The data transmission interval is in 2ms increments. If an odd setting is entered, the setting is rounded
up to the nearest even number for transmission. For example, a packet interval setting of 5ms causes
transmission in 6ms intervals.
In case of a tag connection point, enter only the TO packet interval value.
The TO setting is used as an OT packet interval. However, for TO settings within 250ms, transmission
is made at 250ms intervals.
Note: Some products made by other than us allow an RPI shorter than 2ms. An RPI smaller than 2ms
can cause a communication error. Even if RPI is smaller than 2ms, the data transmission interval
of Plus is 2ms. Enter the RPI in the range between 2ms and 10,000ms.
5) Communication time-out
A connection error is caused and data communication is stopped if reception data is interrupted for a
certain time after connection is connected and the equipment is ready for data communications.
The reception data monitoring time is determined according to the packet interval setting and
communication time-out multiplier.
One of the following can be selected as a communication time-out multiplier: RPIx4, RPIx8, RPIx16,
RPIx32, RPIx64, RPIx128, RPIx256, RPIx512.
For example, suppose a packet interval of 50ms and a time-out multiplier of RPI x 8. Data reception
interrupted for 400ms causes a connection error.
If a connection error is caused, transmission from the connection is stopped and each piece of status
data is updated.
For the status, refer to Section 9.13.5.
For RPI within 10ms, select RPI x 8 or a larger time-out multiplier.
6) Communication load
The transmission data amount of EtherNet/IP is determined according to the packet interval. A larger
packet interval causes a smaller communication load, while a smaller packet interval causes a larger
communication load.
Lots of connections with a small packet interval cause a large load on the module. The packet amount
that can be sent or received is subject to limitation and, if the limitation is exceeded, the correct function
is not obtained.
For this reason, define the number of connections and packet interval during system construction so
that the performance of the module is not exceeded.
An approximate measure of communication data amount that can be exchanged can be calculated in
the following formula using the allowable band width of a unit.
The result of calculation is indicated in a load factor. If the load factor exceeds 100%, review the RPI
value or take other measures so that the communication load becomes a correct value. As well, if other
EtherNet/IP communication-incompatible devices are in the same circuit, allow a larger margin in the
load setting.
Load factor = sum of load factors of each connection [%]
Load factor of each connection = ((1000 / RPI on TO side) + (1000 / RPI on OT side)) / 1000pps x 100 [%]
Allowable band width of unit
Note: The RPI on the OT side of a tag-designated connection point is specified below.
If the RPI on the TO side is within 250ms: RPI on OT side = 250ms
If the RPI on the TO side is larger than 250ms: RPI on OT side = RPI on TO side
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Example of calculation of load factor:
Suppose there are three units of TOYOPUC They are called A, B and C, starting at the leftmost
one.
Instance ID communication is adopted between A and B.
Tag communication is adopted between A and C.
The originator, target and RPI settings of each of A, B and C are shown in the figure below.
TOYOPUC TOYOPUC TOYOPUC

A B C
Instance ID RPI=20ms
Originator Target
communication
RPI=20ms
RPI=50ms
Tag Target Originator
communication
RPI=250ms
Calculate the load factor of each unit of TOYOPUC (A, B and C) and check that 100% is not
exceeded.
TOYOPUC A
Because TOYOPUC A uses two connections, calculate the load factor for each connection and
calculate the sum lastly to obtain the load factor of A.
Load factor of instance ID communication

Load factor = {(1000÷20)+(1000÷20)}÷3000pps × 100
= 10 [%]
Load factor of tag communication

Load factor = {(1000÷50)+(1000÷250)}÷3000pps × 100
= 2.4 [%]
Total
Load factor = 10 + 2.4
= 12.4[%]
TOYOPUC B
Obtain the load factor of TOYOPUC B.
Load factor = {(1000÷20)+(1000÷20)}÷1000pps × 100
= 10 [%]
TOYOPUC C
Obtain the load factor of TOYOPUC C.
Load factor = {(1000÷50)+(1000÷250)}÷1000pps × 100

= 2.4 [%]
The load factor of all units of TOYOPUC is within 100%. Thus it is found that there is no problem in
operation with this setting.
Note:A smaller value defined as the RPI increases the load factor. Wherever high-speed communication
is unnecessary, the RPI should be as large as possible, so that the load factor does not increase.
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9.13.4. How to configure EtherNet/IP
To enter EtherNet/IP communication settings, use 17.2 R01 or later version of PCwin.
9.13.4.1. Link parameter setting
Assignment of linked module

Configure module settings related to communication in Plus-CPU.
(1) (1) Starting at Project, double click the I/O Module in the Parameter folder.
(2) Select the Program No. and Link No. at which EtherNet/IP is entered.
(3) Click the Link setup button.
Determine the Link No. for which EtherNet/IP is

configured. (Arbitrary) As an example, Link No. 1 is
selected here.
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(4) Select rack built-in and slot L1 for rack number and slot number.
(5) Select EtherNet/IP or Plus EtherNet/IP from the linked module.
(6) Click the OK button.
(4) Open the tab and select EtherNet/IP.
(7) After checking that EtherNet/IP is selected, click the "Detail" button.
(6) While selecting EtherNet/IP, click

Detail.
NOTE) EtherNet/IP of PC10G's built-in L1 port is Plus EtherNet/IP""EtherNet/IP.

Both module can be configured.
For EtherNet/IP, the number of connections is available for 128 connections. 384 can not be used.
The following specifications differ depending on module name.
Link module name Universal Universal Error detailed information storage area
function
Plus EtherNet/IP Not available Detail 1:S3x1L, Detail 2:S3x1H
EtherNet/IP(128 connection ) Available Details 1:S3x1, Detail2:S3x2
9-140
Detail link parameter setting (Plus EtherNet/IP)
(1) Own node IP address
The result of configuration is

displayed.
(6) Save target settings.
(4) Option
(2) Individual (3) List setting
setting
(5) Detail network setting
Detail link parameter setting (EtherNet/IP)

(1) Own node IP address
The result of configuration

is displayed.
(6) Save target settings.

(7) Universal TCP detail setting.
(2) Individual (4) Option

(3) List setting
setting
(1) IP address of own node
Enter the IP address of the own node. Select one in the following range as an IP address.
128.0.0.0 to 223.255.255.255
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(2) Individual setting
Enter settings for the selected connection number.
1. Select "Do" at Connection setting.

2. Select either "Target" or "Originator" as Function.
3. Press the Setup button to enter function settings.
Select either "Target" or

"Originator."
(2-1) Target setting
Enter target settings.
(a)
(b)
(c)
(d)
(a) Communication type
Select either "Instance ID" or "Tag" as Communication type.
(b) Target-to-originator information
Enter the target-to-originator information.
(b-1) Connection point

Enter connection point settings.
Communication type ID Value that can be entered
Instance ID Enter a number. 100 to 199, 768 to 1279
Tag Enter a tag name (character Letter (in upper or lower case),
string). number and symbol (Some symbols may not
be used.)
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(b-2) Output setting
Up to eight areas can be designated as Output area.

Note: The number of areas that can be used is up to total 1000 areas including input and output
areas.
(b-3) Address
The following areas can be entered as an address.
Allowable setting range

M00L to 7FH, R0000 to 07FF,
M100L to M17FH, D0000 to D2FFF,
L00L to 7FH, U0000 to U7FFFF
L100L to L2FFH,
X,Y00L to 7FH,
EM00L to 1FFH,
EL00L to 1FFH,
EX,EY00L to 7FH,
GM000L to FFFH,
GX,GY000L to FFFH
Note: Specify "L" (low) or "H" (high) without fail in the address. (Example: D000L, R100H, etc.)
(b-4) Number of bytes
Enter the number of bytes of the output area for each of the eight areas.
The upper limit of the total number of bytes varies according to the entered real time format.
Enter settings so that the sum of the number of bytes of the eight areas is contained within the
following range.
Real time format Range of number of bytes that can be entered

Modeless
0 to 1448 bytes
Heartbeat
32birHeader 0 to 1444 bytes
(b-5) State at fault
The status at the error can be selected among OFF (default) and Hold.
For the motion obtained with OFF or Hold, refer to "9.13.8. Input/Output setting at an error."
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(c) Originator-to-target information
Enter the originator-to-target information.
(c-1) Connection point

Communication type Connection point Value that can be entered
Instance ID Enter a number. 100 to 199, 768 to 1279
Tag Cannot be entered. Cannot be entered.
(c-2) Input setting
Note: The number of areas that can be used is up to total 1000 areas including input and output
areas.
(c-3) Address

L100L to L2FFH
X,Y00L to 7FH,
EM00L to 1FFH,
EL00L to 1FFH,
EX,EY00L to 7FH,
GM000L to FFFH,
GX,GY000L to FFFH
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(c-4) Number of bytes
Enter the number of bytes of the input area for each of the eight areas.
The upper limit of the total number of bytes varies according to the entered real time format.
following range.
Real time format Range of number of bytes that can be entered

Modeless
0 to 1448 bytes
Heartbeat
(c-5) State at fault
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(d) Detail setting
(d-1) Real-time format
Select Auto when connecting two units of TOYOPUC over EtherNet/IP. (Default: Auto)
With check mark at Auto
Communication
Communication direction Selected real-time format
type
Target to originator Modeless
Instance ID
Originator to target 32bitHeader
Tag
Originator to target HeartBeat
Without check mark at Auto
Clear the Auto check box to select the manual entry mode. Select the real-time format among the
following options.
Communication direction Real-time format options

Target to originator Modeless , HeartBeat , 32bitHeader
Originator to target Modeless , HeartBeat , 32bitHeader
9-146
(2-2) originator
(a)
(b) (g)
(c)
(d)
(e)
(f)
(a) IP address of target node
Enter the IP address of the target node.
(b) Communication type
Select either "Instance ID" or "Tag."
(c) Communication time-out
Select a multiplier of the RPI.

Select among X4 to X512.
For example, if RPI = 50ms and time-out is RPIx4,

A connection error is caused if there is no data reception for 200ms (50ms x 4).
(d) Target-to-originator information
(d-1) Packet interval (RPI)
Enter the transmission interval of the packet sent from the originator to the target.
( 2 to 10000ms: in 2ms increments)
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(d-2) Connection type
Select either "Point to Point" or "Multicast" as Connection type.
Point to Point
This connection connects the originator with the target in the one-on-one basis.
Originator Target
Multicast
The data sent from a target is received at multiple originators (except for a single module).
Originator Target
Originator
To use multicasting, keep consistency in the packet interval (RPI) setting on the TO side among
originators connected to a single target.
Note: You cannot multicast from two or more originator connections of a single unit of Plus EX2 or Plus
EFR2 to a single target.
In the example shown below, connection is attempted from multiple originators of the TOYOPUC on the
left side in the multicasting mode to the target of the TOYOPUC on the right side. In this case, the
originator connection of the TOYOPUC on the left side repeats connecting and disconnecting, failing to
function correctly. At this time, error code 86 (link communication error) is notified to the Plus CPU and
error code 5A is notified to S3*0.
TOYOPUC TOYOPUC
Originator Target
Originator
Originator
9-148
Caution) When using multicast as a target, the number of connections for the number of originators to be
connected is required.
Example) In the following figure, three originators are connected to one multicast target. There is only one
multicast connection configuration for the target, but since there are actually three connections,
there are three multicast connections in this case.
Originator Target
Originator
Consume three
connections
Originator
(d-3) Connection point
Enter connection point settings. Select setting values in the following range.
Instance ID Enter a number. 0 to 65535
Tag Enter a tag name Letter (in upper or lower case),
(character string). number and symbol (Some symbols may not
be used.)
(d-4) Input setting
Note: The total number of areas that can be used is up to total 1000 areas including input and output
areas.
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(d-5) Address

L100L to L2FFF,
X,Y00L to 7FH,
EM00L to 1FFH
EL00L to 1FFH,
EX,EY00L to 7FH,
GM000L to FFFH,
GX,GY000L to FFFH
(d-6) Number of bytes
Enter the number of bytes of the input area for each of the eight areas.
The upper limit of the total number of bytes varies according to the entered real-time format.
Enter settings so that the sum of the number of bytes of the eight areas is contained within the following
range.
Real-time format Range of number of bytes that can be entered

Modeless
0 to 1448 bytes
Heartbeat
(d-7) State at fault
(e) Originator-to-target information
(e-1) Packet interval (RPI)
The interval of transmission of the packet sent from the originator to the target can be entered.
(2 to 10000ms: in 2ms increments)
(e-2) Connection type
The connection type is fixed at "Point to Point."
(e-3) Connection point

Instance ID Enter in a number. 0 to 65535
Tag Cannot be entered. Cannot be entered.
9-150
(e-4) Output setting
Note: The number of areas that can be used is up to total 1000 areas including input and
output areas.
(e-5) Address
Enter the address in the following register area.

M100L to M17FH, D0000 to 2DFFF,
L100L to L2FFH,
X,Y00L to 7FH,
EM00L to 1FFH,
EL00L to 1FFH,
EX,EY00L to 7FH,
GM000L to FFFH,
GX,GY000L to FFFH
(e-6) Number of bytes
Enter the number of bytes of the output area for each of the eight areas.
The upper limit of the total number of bytes varies according to the entered real-time format.
following range.
Real-time format Range of number of bytes that can be entered

Modeless
0 to 1448 bytes
Heartbeat
(e-7) State at fault
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(f) Detail setting
(f-1)
(f-2)
(f-3)
(f-4)
(f-5)
(f-1) Trigger
Enter the transmission timing of transmission data.

Select either "Cyclic" or "COS" as Trigger.
Cyclic Data transmission is made at intervals of the RPI.

COS Data transmission is made at intervals of the RPI if there is no change in the data.
(Change of If there is any change in the data, data transmission is made within the entered
State) minimum transmission interval from the timing of the change.
(f-2) Minimum transmission interval
Enter the minimum transmission interval used in the "COS" trigger mode.
The value is a quarter of the RPI if "Auto" is selected.
Note: The minimum value of the minimum transmission interval is 6ms. Enter 24ms or a larger value as
an RPI in both the OT and TO directions to use "Auto." If the value is 23ms or smaller, the correct
function is not obtained.
(f-3) Configuration instance
This is the configuration connection instance. The default value is "1."

Leave "1" unchanged in regular cases.
The setting range is between 0 and 65535. (Default: 1)
To connect TOYOPUC with another TOYOPUC over EtherNet/IP, enter "1" as a setting.
Change this parameter if the configuration instance value of the other party of connection is other
than "1." With some devices made by other than us, the configuration instance setting is other
than "1." While referring to the instruction manual or EDS file prepared for the device made by
other than us, keep consistency in the configuration instance value with the device of the other
party of connection.
Note: Communication is impossible if there is inconsistency in the configuration instance.
9-152
(f-4) Port number, Link address
Enter the port number and link address according to connected devices.
The default value is "0" for both the port number and link address.
To connect TOYOPUC with another TOYOPUC over EtherNet/IP, use the default value ("0") for
the port number and link address.
With some devices made by other than us, the port number and link address can be set
differently. While referring to the instruction manual and EDS file prepared for the device made
by other than us, enter the port number and link address.
Note: Communication is impossible if connection is made with a device having a different port
number and/or link address.
(f-5) Real-time format
Enter the real-time format according to the device of the other party of connection.
To connect TOYOPUC with another TOYOPUC over EtherNet/IP, select "Auto." (The default
setting is "Auto.")
Note: If "Auto" is selected, the real time format specified in the table titled "With check mark at
"Auto"" is selected. "Auto" does not mean that configuration is automatically made
according to the device of the other party of connection.
With check mark at "Auto"
Communication
Direction of communication Selected real-time format
type
Instance ID
Originator to target 32bitHeader
Tag
Originator to target HeartBeat
Without check mark at "Auto"
Clear the "Auto" check box to select manually. Select one of the following real-time formats.
Direction of communication Real-time format option that can be selected

Target to originator Modeless , HeartBeat , 32bitHeader
Originator to target Modeless , HeartBeat , 32bitHeader
Note: To connect with a device made by other than us, keep consistency in the real-time format
with the connected device.
Communication may be impossible if there is inconsistency in the real-time format between
connected devices.
9-153
(g) Open target setting
Use the Open target setting button to use tag communications of the originator.
Load the tag name of the target having been saved to select the tag name of the target to be
used. Select the desired one in the dialog box of the originator connection point setting field.
To use this function, save the target tag name information in advance, using the target setting
save function. For details, refer to "(6) Saving target settings."
Load the text file

containing tag name
settings.
The tag name can be

selected from a list.
(3) List setting
The parameter setting data can be displayed and edited in a table format.
You can copy & paste EXCEL data or the like.
9-154
(4) Option
(4-1) Number of connections Selects the connection max value for IO-reply.
Select 128. If 384 is selected, a linked Parameter error will occur.
(4-2) Address of IP address output area of connection destination
The least significant byte of the IP address of the other party of connection of each connection is output.
If the connection setting is originator, the target IP address entered in a parameter is stored.
In case of target setting, the IP address of the originator of the other party is stored when connection is
established.
The initial value is "00." The storage format is shown below. 64 word registers are occupied.
In case of multicasting, only the IP address of one device of the other party of connection is stored.
Offset High order Low order

+0 CN1 CN0
+1 CN3 CN2
+2 CN5 CN4
+62 CN125 CN124

+63 CN127 CN126
Example: When the IP address of the other party of connection 0 of 192.168.0.1 is 192.168.0.8 and that
of the other party of connection 3 is 192.168.0.12, output the state to the area starting at
D0C00.
192.168.0.1 192.168.0.8
CN0
192.168.0.12
CN3
Address High order Low order

D0C00 00 08
D0C01 0C 00
D0C02 00 00
9-155
(4-3) Packet loss count
The frequency of lack of the reception packet of the connection is output.

The reception side monitors the serial number of the packet, based on which the count of missing
number is accumulated.
If this value is periodically updated, there may be a problem in the path to the device of the other party.
Note : The packet loss count monitors the frequency of skipping serial numbers, so that the frequency is
not updated if the LAN cable is disconnected.
(1) (2) (3) (4) (5) (6) (7) (8) (9) (10)
Error Error
Count 00 00 01 01 01 01 01 01 05 05
Re-connection of connection
Connection error
(11) (12) (13) (14) (15) (16) (17) (18) (19)
Error Error
Count 05 05 05 05 05 05 ** ** ** **
In case of originator 05 05 05 06
In case of target 00 00 00 01
If there is connection time-out, the count is retained.

If the connection is connected later again, the originator connection retains the value while the target
connection initializes the count to "0000."
The packet loss count is output in word data between 0 and 65535.
The count next to 65535 is 0.
The packet loss count storage format is shown below. A 128-word register is occupied.
Offset Description
Parameter
+0 CN0 packet loss count
setting
address +1 CN1 packet loss count

9-156
(4-4) Address of disconnection register area
Enter the register area for designation of disconnection.

The format of the setting area is shown below. An eight-word register is occupied.
Notes
The disconnection function is a function which recognizes the communication error of the designated
station and stops communication to the station, and continues communication to other normal
connectioned stations.
Please refer to "11.2.8 Disconnection function" for details.
Offset 15 0
+0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1: Disconnection designated
+2 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 0: Disconnection canceled
+3 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
+4 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64
+5 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80
+6 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96
+7 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112
(4-5) Address of output area of connection state

If the number of connections of 129 to 384, and set the start address of the area to output the
connection state.
(4-6) Address of output area of connection error history

If the number of connections of 129 to 384, and set the start address of the area to output the
connection error history.
(4-7) Address of output area of universal port status

Set the start address of the area to output the status of the universal port status.
(4-8) Notification of fault to CPU

Select whether or not to notify of a connection time-out error (error code 0050) of the originator
connection to the CPU module. The default setting is "Do not."
Do not notify the CPU. Do not notify the CPU of a connection error.
(default)
Notify the CPU. Notify of a communication error (error code 86) to the CPU when a connection
(option) error is detected.
The communication error (VA2) is turned on.
After a connection error is caused, connection in-connection is repeated at
10-second intervals. However, even if connection in-connection results in a
success, the CPU error status is retained until a communication reset (V80: in
the event of link 1) is supplied.
9-157
5-1) Sub-net mask, Gateway IP address
If there is inconsistency in the network ID between the IP address of the own node and that of the other
party of communication, correct the subnet mask and gateway IP address.
For details, refer to reference document 5 of the FL/ET-T-V2H Instruction Manual (t-754).
5-2) UDP port No. for command communications

Port number used for layered communications.
Leave settings unchanged in regular cases.
9-158
(6) Saving target settings
The target tag name information is saved in text data.

The saved data can be used to enter the tag name of tag communications of the originator of
TOYOPUC, which is the other party of communications. For details, refer to "(g) Open target
setting" of "(2-2) Originator."
(7) Universal TCP detail setting
Set the details of the Universal TCP port.
9-159
9.13.5. Status
9.13.5.1. Special register for link
EtherNet/IP is provided with the following status information in the special register.
15 0
S3*0
S3*1
S3*2
S3*3
Connection normal status area
S3*4
S3*5
S3*6
S3*7
S3*8
S3*9
S3*A
S3*B
Connection error status area
S3*C
S3*D
S3*E
S3*F
15 0
S3#0 Error code
S3#1 Detail 1
S3#2 Detail 2
S3#3 Detail 3
S3#4 System version
S3#5
S3#6 Error code history
S3#7
S3#8
S3#9
Connection error status area
S3#A
S3#B
4th digit of own 5th digit of own
S3#C
Ethernet address Ethernet address
6th digit of own
S3#D (Reserved for system)
Ethernet address
1st digit of own IP 2nd digit of own IP
S3#E
address address
3rd digit of own IP 4th digit of own IP
S3#F
address address
The first through third digits of the own Ethernet address: 00:60:53.
 The parts marked "#" and "*" in the special register are determined by the link number.
Link No. 1 2 3 4 5 6 7 8
* 0 2 4 6 8 A C E
# 1 3 5 7 9 B D F
9-160
(1) Connection normal status area
The connection connected status is output.

If connection has been established, the bit position corresponding to the connection number is "1."
15 0
S3*0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
S3*1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1: Normal
S3*2 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 0: No allocation or
S3*3 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 in a connection error
S3*4 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64
S3*5 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80
S3*6 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96
S3*7 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112
(2) Connection error status area
The connection error development state is output.

The bit position corresponding to the erring connection number is "1."
This area is history information and status "1" is retained even after restoration is made from the
connection error.
Turn the communication reset (V80: in the event of link No. 1) on to reset to "0."
15 0
S3*8 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
S3*9 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1: Connection error
S3*A 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 0: No allocation or normal
S3*B 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
S3*C 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64
S3*D 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80
S3*E 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96
S3*F 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112
Note 1: With parties taking some time for power-on or start-up, a connection error may be caused
before connection is established. If this is the case, conduct a communication reset (V80; in
case of link No. 1) to remove the error.
Note 2: The originator does not turn on the corresponding bit in the connection error status area for
approx. 40 seconds even if there is no party of communication in the corresponding connection
at power-on or in the event of a CPU reset. If "Notification of fault to CPU = Do" is selected,
notification of the communication error is not issued for approx. 40 seconds, too.
Note 3: The target does not turn the corresponding bit of the connection error area on if there is no party
of connection at power-on or in the event of a CPU reset.
The target turns on the corresponding bit of the connection error area only if a connection
having been normally established has gone faulty.
 The "*" part of the special register is determined according to the link number.
Link No. 1 2 3 4 5 6 7 8
* 0 2 4 6 8 A C E
9-161
The ON/OFF status of the bit corresponding to the connection error area of each of the originator and
target caused by no connection of the LAN cable at power-on is shown.
In this example, one of two TOYOPUC units located on the left side is called "A" and that located on the
right side is called "B," and "A" is used as an originator while "B" is used as a target. Suppose that both
units use connection number 0. (The bit position (S3*8-0 in the following description) of the special
register indicating the corresponding connection in the connection error area varies according to the
connection number.)
Configuration
example
A B
Switching hub
TOYOPUC No connection TOYOPUC

of wiring
IP address 192.168.1.1 IP address 192.168.1.2
Originator Target
The status of connection error area of originator "A" connection
There is no other party of connection due

to no wiring connection or the like.
Connected
Connection
No
connection
Approx. 40 sec.
ON
S3*8-0
OFF
Power-on
Status of connection error area of target "B" connection

Connected
Connection
No
connection
ON
S3*8-0
OFF
Power-on
9-162
9.13.5.2. Special relay
The special relay indicating the communication status includes the following.
Address Description
VA0 Link No. 1

VA4 Link No. 2
VA8 Link No. 3
OFF: No connection is established.
VAC Link No. 4
ON: One or more connections are established among
VB0 Link No. 5
those specified.
VB4 Link No. 6
VB8 Link No. 7
Link No. 8
VBC
VA1 Link No. 1

VA5 Link No. 2
VA9 Link No. 3 Link parameter error
VAD Link No. 4
VB1 Link No. 5 OFF: There is no link parameter error.
VB5 Link No. 6 ON : There is a link parameter error.
VB9 Link No. 7
Link No. 8
VBD
VA2 Link No. 1 Communication error

VA6 Link No. 2
VAA Link No. 3 OFF: There is no connection error. (Always turned OFF
VAE Link No. 4 if “Notification of fault to CPU = Do not” is
VB2 Link No. 5 selected as an optional setting)
VB6 Link No. 6 ON: If “Notification of fault to CPU = Do” is selected as
VBA Link No. 7 an optional setting, one or more connection errors
Link No. 8 are caused.
VBE
VC4 Special module abnormality (failure of a communication module)
Special module layout abnormality

VF2 (Rack No., slot No. and link module name of the link parameter are different
from those in a mounted state.)
9-163
9.13.6. Communication reset
The communication reset of EtherNet/IP indicates the resetting of the communication error history.
Conduct a communication reset to clear special registers S3*8-S3*F. ("*" varies according to the link
number. For details, refer to "9.13.5.1 Special register for link.")
You can turn the special relay for a communication reset off then on to reset communications.
The I/O address of the communication reset special relay of each link number is shown in the table below.
Link No. I/O address

1 V80
2 V81
3 V82
4 V83
5 V84
6 V85
7 V86
8 V87
Note 1: The communication reset is valid only when the special relay starts.
Note 2: Communication reset in the state of “Error code 0051 Duplicate IP address”, “Error
code 0052 Limit of processing performance” or “Error code 0053 Reception of frame
from own node”is invalid.
Note 3: If TOYOPUC functions as an originator and a communication reset is made without any
other party of connection, no error is notified to the connection error area for approx.
40 seconds after the communication reset.

Connection
Connection
No
connection
ON
V8#
OFF
Approx. 40 sec. Approx. 40 sec.
ON
S3*8-0
OFF
Power-on
9-164
Note 4 : The target turns the bit in the connection error area on only if the connection in a normal
state becomes faulty. For this reason, if a communication reset is made at a target
connection, which has become faulty due to a broken wire or the like from a normal state,
the bit in the connection error area remains turned off.
No connection continues
Broken wire, etc. due to broken wire or the
like.
Connection
Connection
No
connection
ON
V8#
OFF
ON
S3*8-0
OFF
ON because an Remains turned OFF after a
Power-on error is caused from communication reset until the
a normal state. connection changes from the
normal state to an error.
 "#" in the special relay is determined according to the link number.
Link No. 1 2 3 4 5 6 7 8
# 0 1 2 3 4 5 6 7
 "*" in the special register is determined according to the link number.

Link No. 1 2 3 4 5 6 7 8
* 0 2 4 6 8 A C E
9-165
9.13.7. Disconnection function
If a bit of the connection corresponding to the connection error status area is turned on and "notification of
a communication error" is selected with a link parameter, the CPU is notified of a communication error
when an originator or a target exits out of the network.
With the disconnection function, the communication error caused by a disconnected connection is
authorized while communications with other normal connections are continued. If "notification of a
communication error" is selected with a link parameter, the CPU is not notified of an error even when
disconnection occurs.
With this function, a specific originator or target can be disconnected from the communication network
without causing a connection error.
 Communication in disconnected state
Normal communication Communication error

Discon- IO status Error history
Normal status
nection OFF / Hold IO data status status IO data status
(S3*0-S3*7)
(S3*8-S3*F)
Communication
OFF 1 1 OFF data
IO data exchange
0 Data immediately
Communication
Hold 1 1 before error
IO data exchange
occurrence
OFF data
OFF 1 0 OFF data
exchange
1 Data immediately
Normal IO data
Hold 1 0 before error
exchange
occurrence
 "*" in the special register is determined according to the link number.

Link No. 1 2 3 4 5 6 7 8
* 0 2 4 6 8 A C E
9-166
 Designation of target of disconnection
The disconnection status of each originator or target can be retained only if the address of the
disconnection register area is entered with a link parameter.
Each bit number indicates the connection number.
Offset MSB LSB

+0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
+2 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
+3 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
+4 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64
+5 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80
+6 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96
+7 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112
"1" in each bit: disconnection designated

"0" in each bit: disconnection not designated
9-167
9.13.8. Input/Output setting at an error
The input data at an error in EtherNet/IP communications and the output data issued upon stoppage of
operation can be entered with a link parameter.
Input
Select whether the data in the input area is held or turned off at a communication error or upon
disconnection.
Note : The input area is reset to zero (0) at power-on or reset start of the CPU without relations to the
hold/OFF setting because the communication section of the module is reset.
Hold:
The data having been received is retained at a communication error.
TOYOPUC The other party

Output data 1111h
Input area data 1111h
Output data 2222h
Output data 3333h
Output data 4444h
The data is Input area data 3333h
retained. ･
Communication
･ error
･
OFF:
The data in the input area is reset to 0000h at a communication error.

Output data 1111h
Output data 2222h
Input area data 2222h Output data 3333h
Input area data 3333h Output data 4444h
The data is Input area data 0000h
turned off. ･
Communication
･ error
･
9-168
Output
Select whether the data in the output area is held or turned off upon stoppage of operation.
Hold:
The data in the output area is output upon stoppage of operation.
Output area data 1111h

Input data 1111h
Input data 2222h
Operation stop Input data 3333h
The data in Output area data 3333h

Input data 3333h
the output ･
area is output. ･
･
OFF:
The output data is reset to 0000h upon stoppage of operation. (The value in the output area
(register) remains unchanged.)

Input data 1111h
Input data 2222h
Input data 3333h
Operation stop
Output area data 3333h Output data
0000h Input data 0000h
The output ･
data is turned ･
off. ･
9-169
9.13.9. Difference from earlier communication modules
While the EtherNet/IP function some of the specifications are different from those of earlier remote IO
networks such as PC Link, DeviceNet and FL Remote.
Differences are described below.
PL Link, FL Remote, EtherNet/IP

DeviceNet
During communication Turned off even if a single Not turned off even if disconnection
of all stations station is disconnected occurs.
(V** differs with link
number.
VA0,VA4,VA8,VAC
VB0,VB4,VB8,VBC)
Input/Output at The inputs and outputs of all If "Notification of fault to CPU" is set
communication error nodes are turned off if to "ON" when a communication error
communications are stopped. occurs, Input turns off only the node
with the communication error, and
Output turns off all nodes.
When "Notification of fault to CPU" is
set to "OFF", the input/output of the
node with communication error is
OFF, and the normal node
communicates.
Please refer to "9.13.8 Setting of
the I/O at the time of errors" for the
contents of operation.
Detection of ERR86 is caused even on the ERR86 is not caused to the target
communication error slave station side. The error is connection. Only the status history
[DLNK-S2, PC link removed when the master bit is turned on. The target makes a
slave station] station connects again. communication reset to reset.
9-170
9.13.10. Connection examples
9.13.10.1. Connection example 1 of instance ID communication
A connection example of the data link over EtherNet/IP between two units of TOYOPUC using the
instance ID is shown.
Use instance ID communication to send/receive I/O data through a single connection in two direction from
the target to originator and from the originator to target.
As shown in the configuration example below, use two units of TOYOPUC to establish a data link over
EtherNet/IP with instance ID communication. Suppose that the unit of TOYOPUC on the left side is called
"A" and that on the right side is called "B."
In this example, "A" is used as an originator and "B" is used as a target to send/receive data between the
two: "A" sends "B" 256 bytes of data and "B" sends "A" 512 bytes of data.
First, enter link parameter settings of "B" (target).
Configuration
example
A B
Switching hub
TOYOPUC TOYOPUC
IP address: 192.168.1.1 IP address: 192.168.1.2
Originator Target
Input area Connection point: 100

D000L I/O data 512 bytes R000L Output area
Input area :
: 512 bytes
512 bytes R0FFH
D0FFH RPI : 50ms
Output area Connection point: 101
Output area D200L I/O data 256 bytes R200L Input area
256 bytes : : 256 bytes
D27FH RPI : 50ms R27FH
Parameter settings of target
9-171
Continued from previous page. Enter parameter settings of "A" (originator).
Configuration
example
A B
Switching hub
TOYOPUC TOYOPUC

Originator Target
Connection point: 100

Input area D000L R000L Output area
I/O data 512 bytes
D0FFH RPI : 50ms R0FFH

Parameter settings of originator
IP address of the other

party of communication
9-172
1 Example of setting different data areas for a single connection
Up to eight data areas can be entered to a single connection with EtherNet/IP link parameter settings of
TOYOPUC. Multiple areas are sent simultaneously and the receiver separates and stores the received
data.
In the following configuration example, two units of Plus are called "A" and "B" similarly to connection
example 1.
"A" uses three reception areas and one transmission area defined in the link parameter.
"B" uses two reception areas and two transmission areas defined in the link parameter.
Note : Consistency must be kept in the communication data amount of the connection.
Configuration
example A
A B
Switching hub
TOYOPUC TOYOPUC
Originator Target
D000L D000L
Input area : : Output area
D0FFH Input D0FFH
I/O data 1024 bytes Output
data
RPI : 50ms data
R000L R000L
Input area :
256 bytes : Output area
R07FH 512 bytes
:
R0FFH
R100L
Input area :
256 bytes R17FH
R200L Input area

D200L I/O data 256 bytes :
Output area Input R23FH 128 bytes
:
256 bytes D27FH RPI : 200ms data
R300L Input area
:
R33FH 128 bytes
9-173
Configuration
example
A B
Switching hub
TOYOPUC TOYOPUC
Originator Target
D000L D000L
D0FFH Input D0FFH
I/O data 512 bytes Output
data
RPI : 50ms data
R000L R000L
Input area :
256 bytes : Output area
R07FH 512 bytes
:
R0FFH
R100L
Input area :
256 bytes R17FH Connection point: 101
R200L Input area

D200L I/O data 256 bytes :
Output area Input R23FH
128 bytes
:
256 bytes D27FH RPI : 200ms data
R300L Input area
:
R33FH 128 bytes

9-174
Use instance ID communication to establish a unidirectional data link.
Use instance ID communication to send data from the target to the originator.
Enter 0 byte for data transmission from the originator to the target so that the target-to-originator data link
only is apparently established.
In the following configuration example, two units of Plus are called "A" and "B" similarly to connection
example 1.
Originator "A" receives 512 bytes of data from target "B." No data is sent from "A."
A B
Switching hub
TOYOPUC TOYOPUC
Originator Target

D000 I/O data 512 bytes R000L Output area
Input area
: : 512 bytes
512 bytes
D0FF RPI : 50ms R0FFH
Enter "0" as a
connection point of
the input area.
Clear the "Auto"
check box of
Real-time format.
Select "HeartBeat." Leave the input

area blank.
9-175
Configuration
example
A B
Switching hub
TOYOPUC TOYOPUC
Originator Target

Input area
: : 512 bytes
512 bytes
Parameter settings
IP address of the
of originator other party of
communication
Enter "254" as a
connection point of
the output area.
Leave the output

area blank.
Clear the "Auto"

check box of
Real-time format.
Select "HeartBeat."
9-176
9.13.10.4. Connection example of cases where multiple connections are used
TOYOPUC can use up to 128 connections.

This section describes the case of three units of Plus used for EtherNet/IP communication as an example
of multiple connections.
In the following configuration example, units of TOYOPUC are called "A," "B" and "C," starting at the
leftmost one.
Between originator "A" and target "C," 512 bytes of data are sent from the target to originator while 256
bytes of data are sent from the originator to target.
Between originator "A" and target "B," 8 bytes of data are sent from the target to originator while 128 bytes
of data are sent from the originator to target.
In this way, "A" functions as two originators, each of which has established connections for
communications.
Configuration
example
A Switching hub
C
B

IP address: 192.168.1.1 IP address: 192.168.1.2 IP address: 192.168.1.10
Originator Target

I/O data 512 bytes
Originator Target

I/O data
Input area R000L 8 bytes R000L Output area
8 bytes : : 8 bytes
R003H RPI : 20ms R003H
I/O data
Output area R100L 128 bytes R100L Input area
R13FH RPI : 50ms R13FH
9-177
Link parameter settings of TOYOPUC "B" (target)
Configuration
example
A Switching hub
C

Link parameter
オリジネータターゲット
コネクションポイント：100
Input area D000L R000L
I/O データ 512 バイト出力領域
512 バイト：： 512 バイト
Output area D400L I/O データ 256 バイト R400L 入力領域
256 バイト：： 256 バイト
D47FH RPI : 100ms
R47FH
Originator Target

I/O data
8 bytes ： : 8 bytes
I/O data
9-178
Link parameter settings of TOYOPUC "C" (target)
Configuration
example
A Switching hub C
B
Link parameter
EF10
TOYOPUC EF10
TOYOPUC TOYOPUC
IP アドレス 192.168.1.1 IP アドレス 192.168.1.2 IP address: 192.168.1.10
オリジネータ Target

I/O data 512 bytes
オリジネータターゲット
I/O データ
入力領域 R000L 8 バイト R000L 出力領域
8 バイト：： 8 バイト
I/O データ
出力領域 R100L 128 バイト R100L 入力領域
128 バイト：： 128 バイト
9-179
Link parameter settings of TOYOPUC "A" (originator)
Configuration A Link parameter Switching hub C
example
B

Originator Target

I/O data 512 bytes
Originator Target

I/O data
8 bytes : : 8 bytes
I/O data
9-180
9.13.10.5. Connection example 1 of tag communication
In tag communications, letters (in upper or lower case), numbers and symbols (some symbols may not be
used) can be used as a connection point name.
In this example, the connection point of the target is named "Tag1."
The data link of tag communication is in only one direction: from target to originator.
In the following configuration example, units of Plus are called "A" and "B," similarly to instance ID
connection example 1.
"A" uses two reception areas defined with link parameters.
"B" uses two transmission areas defined with link parameters.
Note : Consistency must be kept in the communication data amount of the connection.
Configuration
example
A
A B
Switching hub
TOYOPUC TOYOPUC
Originator Target
Connection point: Tag1
D000L D000L
Input I/O data 768 bytes Output
D0FFH data data D0FFH
RPI : 50ms
R000L R000L Output area

Input area : :
256 bytes 256 bytes
R07FH R07FH
9-181
Configuration
example
A B
Switching hub
TOYOPUC TOYOPUC
Originator Target
D000L D000L
Input I/O data 768 bytes Output
D0FFH data data D0FFH
RPI : 50ms
R000L R000L Output area

Input area : :
256 bytes 256 bytes
R07FH R07FH

9-182
9.13.10.6. Connection example 2 of tag communication
In case of tag communication, the data link is in a single direction from the target to originator.
To establish a bidirectional data link, define two connections.
In the following configuration example, two units of Plus are called "A" and "B," similarly to connection
example 1.
At the first connection (connection point Tag1), 8 bytes of data are sent from target "B" to originator "A."
At the second connection (connection point Tag2), 16 bytes of data are sent from the target "A" to
originator "B."
For the parameter entry method of each connection, refer to tag communication connection example 1.
Configuration
example
A B
Switching hub
TOYOPUC TOYOPUC
Originator Target

Input area :
: 8 bytes
8 bytes RPI : 50ms R003H
D003H
Target Originator

D207H RPI : 50ms R207H
Link parameter settings of "B"
Link parameter settings of "A"
9-183
9.13.10.7. Connection example 1 of multicasting
EtherNet/IP can handle multicasting in which the same data is sent from a target to multiple originators
simultaneously. (The originator cannot multicast.)
In this section, a connection example of multicasting is explained for instance ID communication.
Three units of Plus are called "A," "B" and "C" similarly to a previous connection example.
512 bytes of data are sent from target "C" to originators "A" and "B" in multicasting.
Originator "A" sends 256 bytes of data to the target "C" in the point-to-point mode.
No data transmission is made from originator "B."
Configuration
example A Switching hub
C
B

Originator Target
Connection type: Multicast Connection point: 100

I/O data 512 bytes
Connection type: Point to Point Connection point: 101

Originator
Connection type: Multicast

I/O data 512 bytes
Input area U000L
512 bytes : RPI : 100ms
U0FFH
9-184
Follow the procedure described on the previous page to enter link parameters of originator "A."
Configuration A Switching hub
example C
B

Originator Target

I/O data 512 bytes

Originator

I/O data 512 bytes
Input area U000L
U0FFH
Parameter settings of
originator "A"
9-185
Follow the procedure described on the previous page to enter link parameters of originator "B."
example C
B

Originator Target

I/O data 512 bytes

Originator

I/O data 512 bytes
Input area U000L
U0FFH
Parameter settings of
originator "B"
Clear the "Auto" check

box of Real-time
format.
Select "HeartBeat."
Leave the output

area blank.
Enter "254" as a
connection point
of the output area.
9-186
9.13.10.8. Connection example 2 of multicasting
Multicasting can be made in tag communication.

In this section, a connection example of multicasting is described for tag communication.
Three units of Plus are called "A," "B" and "C," similarly to a previous connection example.
Target "C" sends 8 bytes of data to originators "A" and "B" in multicasting.
"A" and "B" merely receive because they are originators.
First, enter link parameters of target "C."
Configuration
example A Switching hub
B C
Originator Target
Connection type: Multicast Connection point: Tag2

I/O data 8 bytes
8 bytes : : 8 bytes
D003H RPI : 100ms R003H
Originator

I/O data 8 bytes
Input area U000L
U003H
9-187
Follow the procedure described on the previous page to enter link parameters of originator "A."

example
C
B

Originator Target

I/O data 8 bytes
8 bytes : : 8 bytes
D003H RPI : 100ms R003H
Originator

I/O data 8 bytes
Input area U000L
U003H
Parameter settings of originator "A"
9-188
Follow the procedure described on the previous page to enter link parameters of originator "B."
Configuration A
Switching hub
example
C
B

Originator Target

I/O data 8 bytes
8 bytes : : 8 bytes
D003H RPI : 100ms R003H
Originator

I/O data 8 bytes
Input area U000L
U003H
Parameter settings of originator "B"
9-189
9.13.10.9. Connection example to a third-party's scanner
Some devices made by other than us are provided with a port address and link address. Refer to the
instruction manual and EDS file of the corresponding device when entering the link parameters.
Some devices made by other than us allow only the instance ID originator function settings. (Target
settings are not provided.) If this is the case, you can define TOYOPUC as a target of instance ID to
connect.
Some devices made by other than us do not accept an arbitrary RPI value even when they function as a
target. In this case, even if an RPI is entered at the originator TOYOPUC, the RPI follows the setting of
the other party of communication.
For details, refer to the instruction manual and so on prepared for the third-party's product.
Connection example of third-party's scanner with TOYOPUC through tag communication
If the third-party's product is provided with a port address, refer to the instruction manual or [Port] entry of
the EDS file.
In the following example, suppose that the [Port] entry of the EDS file of the other party of communication
(third-party's scanner) shows "Port1=Backplane." The port number of this device is "1."
Note: While the [Port] entry of the EDS file has "TCP" description (for Port2 in this example), the
TCP port has nothing to do with the port number entered as a link parameter. For this
reason, do not enter the TCP port number as a port number of the link parameter.
First, enter the settings of the target third-party's scanner while referring to the instruction manual or the
like.
Configuration
example
A Switching hub
Third-party's scanner
TOYOPUC
Originator Target

Input area D000L I/O data 256 bytes Output data
256 bytes : 256byte
D07FH RPI : 100ms
While referring to the instruction

manual or the like, enter the tag
name and output data size of the
connection point.
EDS file
Because the [Port] entry of the EDS
file shows "Port1=Backplane," this
device uses port number 1.
[Port]
Port1 = Backplane,
“Backplane”,
:
Port2 = TCP,
9-190
Follow the procedure described on the previous page to enter link parameters of TOYOPUC.
Configuration
A Switching hub
example
Third-party's scanner
TOYOPUC
Originator Target
Input area D000L I/O data 256 bytes Output data

256 bytes : 256byte
D07FH RPI : 100ms
Enter "1" as a port number while

keeping consistency with the setting
of the other party of communication.
9-191
9.13.10.10. Connection example of third-party's adaptor
A connection example of EF10 with an adaptor made by other than us is described.

Because the adaptor is usually provided with a preset connection point, refer to the instruction manual or
EDS file of the third-party's product for the connection point of the instance ID provided for the adaptor, to
check the connection point of the function to be used, when entering connection settings.
Suppose that the adaptor used in this example uses 8 digital input points and 8 digital output points.
Follow the description given in the instruction manual of the adaptor to enter IP address and other
necessary data to the adaptor.
Next, find the serviceable instance ID in the adaptor instruction manual.
In the instruction manual, you find a list table of instance ID and functions under an "Assembly Instance"
name. According to the table, "108" is assigned as a digital input data instance ID and "102" is assigned
as a digital output data instance ID.
Configuration
Switching hub
example
8 digital 8 digital
input points output points
TOYOPUC
Third-party's adaptor
Originator Target
Target

I/O data 1 byte
Input area
1 byte D000L 8 digital input points
RPI : 50ms

Output area I/O data 1 byte
1 byte D100L 8 digital output points
RPI : 50ms
Adaptor
instruction
manual
Assembly Instance
Instance 101(65hex) For analog/digital output data
Instance 102(66hex) For digital output data
•
•
Instance 108(6Chex) For digital input data
•
•
9-192
Follow the procedure described on the previous page to enter link parameter settings of TOYOYPUC.
Configuration Switching hub
example
8 digital 8 digital
input points output points
TOYOPUC
Third-party's adaptor
Originator Target
Target

I/O data 1 byte
Input area
D000L
1 byte RPI : 50ms 8 input points

Output area I/O data 1 byte
1 byte D100L 8 output points
RPI : 50ms
9-193
10. Display
The message display of the PC10G provides three CPU monitor modes, that is, "Operation status
monitor", "Error code monitor", and "Link communication status monitor”.
Every time the MODE button is pressed, the display monitor mode can be changed easily, like
"Operation status monitor" ⇒ "L1 status monitor" ⇒ "L2 status monitor" ⇒ "L3 status monitor" ⇒
"Operation status monitor”.
PC10G-CPU
POWER RUN E/A CPU status display
W
P2 P3
L1 L2 L1 status display
L3
L2 status display
BATTER MODE
1st./
TIP-5426
2nd./ L3 status display
10.1. Operation status monitor
<Operation status monitor display>

• RUN status
7-segment display on the left is lit like “8”.
PC10G-CPU
POWER RUN E/A
W
P2 P3
L1 L2
L3
BATTERY MODE
1st./
TIP-5426
2nd./
10.2. Error code monitor

If the CPU RUN is stopped due to an error, relevant error code is shown on the 7-segment display.If
multiple errors occur at the same time, relevant error codes are shown cyclically.Additionally, when
the CPU is running, the value at the 1st digit of the error code is shown on the 7-segment display on
the right.
10
PC10G-CPU PC10G-CPU PC10G-CPU
POWER RUN E/A POWER RUN E/A POWER RUN E/A
W W W
P2 P3 P2 P3 P2 P3
L1 L2 L1 L2 L1 L2
L3 L3 L3
BATTERY MODE BATTERY MODE BATTERY MODE

1st./
TIP-5426 1st./
TIP-5426 1st./
TIP-5426
2nd./ 2nd./ 2nd./
10-1
10.3. Link communication status monitor
<L1 status display>
L1 has three link functions, that is, “FL-net”, “Ethernet”, and “FL-remote”.
Display when FL-net Display when Display when
is selected. Ethernet is selected. FL-remote is selected.
W W W
P2 P3 P2 P3 P2 P3
L1 L2 L1 L2 L1 L2
L3 L3 L3

1st./
TIP-5426 1st./
TIP-5426 1st./
TIP-5426
2nd./ 2nd./ 2nd./
Own node No. is Opened connection is Master node No. is shown.

shown. shown.
<L2 status display>

This L2 status display functions in the same manner as described for the L1 status display.
<L3 status display>

L3 has three link functions, that is, “PC link”, “Computer link”, and “SN-I/F”.
“SN-I/F” is set before shipment.
Display when PC Display when CMP Display when
link is selected. link is selected. SN-I/F is selected.
W W W
P2 P3 P2 P3 P2 P3
L1 L2 L1 L2 L1 L2
L3 L3 L3

1st./
TIP-5426 1st./
TIP-5426 1st./
TIP-5426
2nd./ 2nd./ 2nd./
10-2
11. Tool
Tool has following functions
• I/O operation panel
• I/O check (for output)
This function can be operated since PCwin.
11.1. I/O Operation Panel

This function is the debug support function that enables I/O operation when actual input device is
not connected.
Input from this I/O operation panel ignores the input from sequence program and forcibly turns I/O
ON/OFF.
(NOTE) Forced output of the output in the I/O operation panel function cannot be carried out.
About difference from [Forced ON/OFF of I/O]

• Forced ON/OFF of I/O : There is forced setting of I/O but thereafter,
it is the actual input state.
• I/O Operation Panel (Input Retention): Retains I/O state even after I/O operation
setting.
The kind of setup

• Hold: Holds input state from input operation panel.
(Actual input of the sequence program is ignored)
• 1 Shot : Carries out forced setting only once. After execution, input of actual sequence
program becomes valid. (This function is similar to [I/O Forced ON/OFF]
If you press Start when the [type] of the I/O button setting is in the state of "hold" with the CPU
being normally running, the bottom segment of the right-side 7SEG (LED) digit blinks as shown in
the figure below:.
PC10G-CPU
POWER RUN E/A
W
P2 P3
L1 L2
L3
11
BATTERY MODE Flashing
1st./
TIP-5426
2nd./
11-1
11.2. I/O Check (for Output)
This function is meant for output wiring check at the time of equipment start up. Output based on
I/O check function forcibly turns I/O ON/OFF ignoring the output of sequence program.
Kindly avoid using the equipment under operation and also take sufficient care for safety.
Automatic Stoppage Timer

This timer is meant for stopping the present function automatically on the PC side, in
case communication between Pcwin and PC breaks, for the safety of the system. It can
be set in the range of 2~300 sec.
Kindly carry out setting on the I/O operation panel.
If you press Start in the state of CPU being normally running., the top segment of the right-side
7SEG (LED) digit blinks as shown in the figure below:
PC10G-CPU
POWER RUN E/A
W
P2 P3
L1 L2
L3 Flashing
BATTERY MODE
1st./
TIP-5426
2nd./
11-2
ATTACHMENTS 1 DIMENSIONAL OUTLINE DRAWING
ATTACHMENT 1-1 CPU Module
110 35
PC10G-CPU
POWER RUN E/A
W
P2 P3
L1 L2
L3
BATTERY
TIP-5426 MODE
1st./
2nd./
I/F
FL
L1 ET
RMT
130 L2
FL
ET
RMT
L1 Auto 10M
L2 Auto 10M
L1 SEL. DM
L3 T-ON T-OFF
*.**
START
RESET
L1
L3
L3
0V
L2 L-
L+
SN/PC/CMP
At1-1
ATTACHMENT 1-2 Power modul
At1-2
ATTACHMENT 1-3 Selector module
At1-3
ATTACHMENT 1-4 I/O modul
At1-4
ATTACHMENT 1-5 Base Exterior dimensions/Setting length
PC10G/PC3J series 424 ( 8slot(2))
15.5
409 112
130
86
8 slot base2(THR-2872)
I/O divergence module
(THU-2774)
178
193 ( 2slot )
249
264 ( 4slot )
320
264 ( 4slot )
391
406 ( 8slot )
PC10G/PC3J selector base 370.5 ( 8slot )

350
8 slot selector base

160
145
(THR-5643)

(THR-5644) Details of hole mounting

(THR-5645)
210
228.5 ( 4slot )
280
299.5 ( 6slot )
At1-5
ATTACHMENTS 2
ATTACHMENTS 2-1 Module type identification code
The module type identification code is a hexadecimal 2-digit (00-FF) value assigned by each
module type, a code used for I/O module assignment parameter, etc.
I/O occupying point number is a hexadecimal 2-digit value (any of 00, 16, 32, 48, and 64) assigned
per each module type, a point number used for I/O module assignment parameter, etc.
They can be set by various programmers (such as PCwin).
Assignment
Module type Type identification code Note 1
point number
IN-11 AC100/115 input 0F 16
Input
IN-12 DC24V input 07 16

IN-22D DC24V input 06 32
OUT-1 AC100/115V triac output 1F 16
AC240/DC24V relay
OUT-3 2E 16
independent contact output
OUT-4 AC240V triac output 1D 16
OUT-11 AC100/115V triac output 1E 16
Output
OUT-12 AC240/DC24V relay contact output 2F 16

OUT-15 Power MOS-FET output (-) common 14 16
OUT-16 Power MOS-FET output (+) common 15 16
OUT-18 Transistor output (-) common 16 16
OUT-19 Transistor output (+) common 17 16
OUT-28D Transistor output (-) common 13 32
OUT-29D Transistor output (+) common 12 32
DC24V input 32 points
FET open drain output 16 points (+)
I/O
I/O-329G common 3F 64
Transistor output 16 points (+)
common
PC/CMP-LINK For PC link B2 00
PC/CMP2-LINK For computer link B3 00
2PORT-LINK 2-port link Note 2
2PORT-M-NET 2-port M-NET B2 00
HPC-LINK
High-speed PC link B9 00
HPC-LINK2
8KB C9 00
FL-net FL-net 16KB D9 00
Communication
32KB E9 00
ME-NET ME-NET C4 00
RMT-I/O M High-speed remote I/O master B8 00
EN-I/F Ethernet B3 00
S-LINK S-link Note 3
B7A-I/F B7A interface 06 32
MPLX-TR-I/F Multiplex transmission I/F BC 7F 00 00 *
J-DLNK-M
J-DLNK-M2 DeviceNet B8 00
J-DLNK-S2
AS-i M ASi interface B8 00
2PORT-EFR 2-port FL/ET/RMT Note 4
FL-remote-M FL-remote master B8 00
Module not mounted 7F 00
At2-1
Assignment
Module type Type identification code Note 1
point number
COUNTER High-speed counter 28 64
AD Analogue input 29 64
DA Analogue output 0A 32
SIO Serial I/O B5 00
AF1KA-C 1-axis CNC system controller
BE 7F 00 00 *
MA1KA-C Multi-axis motion controller
AF1VI-C Absolute 1-axis CNC 2C 7F 64 00 *
Special
MC360VI-C Absolute indexing 3C 7F 64 00 *

PC1-I/O-I/F PC1 buss interface B2 00
SUB-CPU Sub CPU B9 7F 16 00 *
ID I/F ID interface BD 7F 16 00 *
PULSE OUT Pulse output C0 00
SIO-M Modem interface B5 00
MEMORYCARD
-I/F Memory card interface B5 00
DIAGNOSTIC Diagnosis module CE 7F 00 00 *
Note 1) Marked with * is a module occupying two slots.

Set a unique identification code and assignment point number to the slot on the left of the
two, and identification code "7F"/assignment point number "00" to the slot on the right.
Note 2) Assignment of identification code is different for 2-port link.
Set module un-mounted "7F"/assignment point number "00" at the port mounting position.
Instead, set PC link identification code "B2"/ assignment point number "00" or computer
link identification code "B3"/assignment point number "00" to the slot 0, 1 of the rack 8 - E
(setting by port link SW).
(2-port link determines that PC link or computer link is mounted to the slot 0 and 1 of rack
8 - E from CPU.)
Note 3) S-LINK applies different assignment of identification code.
Set module un-mounted "7F"/assignment point number "00" to S-LINK mounting position.
Instead, set the identification code "27"/ assignment point number "64" to the slot 0 and 1
of rack 1 - E (setting by SW of S-LINK), and identification code "27"/assignment point
number "32" (total 160 points) to the slot 2.
Note 4) Assignment of identification code is different for 2 PORT-EFR.
Set module un-mounted "7F"/assignment point number "00" to 2 PORT-FER mounting
position. Instead, set any of the identification code "C9" "D9" and "E9" of
FL-net/assignment point number "00", the identification code "B3" of EN-IF/assignment
point number "00", and identification code "B8" of FL-remote M/assignment point number
"00" to the slot 0 (L1) and slot 1 (L2) of rack 8 - E (setting by SW of 2PORT-EFT).
(2PORT-EFR determines that any of FL-net, EN-IF, FL-remote M is connected to the slot
0 and 1 of rack 8 - E from CPU.)
At2-2
ATTACHMENTS 2-2 Current consumption of various modules (Typ.)
Consumerd Current
Module name Module name
current(mA) consumption (mA)
180 (5VDC main
SELECTOR 31 J-DLNK-M
unit side)
25 (24VDC
SELECTOR BASE 32 (8,6,4 slot)
communication unit)
300 (5VDC main
IN-11,12 60*1 J-DLNK-M2
unit side)
40 (24VDC
IN-22D 63*1
communication unit)
100 (5VDC main
IN-22H 100*1 J-DLNK-S
unit side)
25 (24VDC
OUT-1,4 174*1
communication unit)
180 (5VDC main
OUT-3 356*1 J-DLNK-S2
unit side)
25 (24VDC
OUT-11 336*1
communication unit)
OUT-12 380*1 COUNTER 300
OUT-15,16 310*1 CT10 200
OUT-18,19 136*1 AD 140
OUT-28D,29D 210*1 DA 670
I/O-328G 330*1 SIO 310
I/O-329G 330*1 SC10 240
PC/CMP-LINK AF1KA-C 1000
170
PC/CMP2-LINK MA1KA-C 1000
2PORT-LINK 330 AF1VI-C 1900
2PORT-M-NET 150 PC1-I/O-I/F 200
ML10 150 ID I/F 1ch 170(5VDC)
HPC-LINK 190(24VDC)
250
HPC-LINK2 ID I/F 2ch 190(5VDC)
FL/ET-T-V2H 600 380(24VDC)
2PORT-EFR 1100 SUB-CPU 380
ME-NET 600 PULSE OUT 250
RMT-I/O M 210 SIO-M 310
100 (When no
MEMORY
RMT-I/O S 210 memory card is
CARD-I/F
available)
EN-I/F 600 DIAGNOSTIC 650
S-LINK 100 PROFI-S2 500
B7A-I/F 100 PROFI-S2O 560
MPLX-TR-I/F 700
*1 Current consumption of I/O module is a value when all points are on (Typ).
At2-3
ATTACHMENT 2-3 Error in self-contained clock
TOYOPUC-PC10G self-contain a quartz oscillator type clock. The quartz oscillator provides high
precision oscillation frequency, but it fluctuates slightly depending on temperature.
The chart below shows the frequency - temperature characteristic of the quartz oscillator for reference
use.
Temperature (ºC)
-10 0 10 20 30 40 50 60 70
0
-10 Error under

approximately
-11.574 ppm
Frequency
-20 is sec/day.
-30
f/f
-40
(ppm)
-50
-60
-70
The frequency characteristic can be approximated by the following equation.
fX(ppm)=f T + a(T - X)2
fX(ppm): Frequency deviation at a certain temperature degree

fT(ppm): Frequency deviation at T
a(ppm/ºC2): Secondary temperature coefficient (-0.035  0.005 ppm/ºC2)
T(ºC): Peak point temperature(25  55 ºC)
x(ºC): Ambient temperature
Error under approximately 11.574 ppm is 1 sec/day.
At2-4
ATTACHMENT 2-4 Hexadecimal system
The hexadecimal is one type of numerical expression, wherein the digit is carried over every 16.
(EX.)
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F,
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 1A, 1B, 1C, 1D, 1E, 1F,
20, •••
As per (EX.), numerals exceeding 9 are represented by A, B, C, D, E and F.

Calculator, etc. handles data with 8 bits, 16 bits, 32 bits, etc. If these data are expressed in decimal
system we are usually, the data expressed with 1 - 10 are easy to understand, but those exceeding
10 are difficult to understand the contents thereof. To eliminate such difficulty, octal number system
and hexadecimal system are used.
Hexadecimal expression
Higher Lower
23 22 21 20 In the case of hexadecimal system, numerals 0 - 15 are
Hexa-de
cimal
= = = = expressed with 0 - F as left.

8 4 2 1 For example, 20 bits are expressed as follows.
0 0 0 0 0 Higher Lower
0001 0011 1010 1100 0101
0 0 0 1 1
1 3 A C 5
0 0 1 0 2
13AC5(13 thousand A hundred C5)
0 0 1 1 3 Also, 16 bits are expressed as follow.
0 1 0 0 4 Higher Lower
0001 0010 0011 0100 1234
0 1 0 1 5
1010 1011 1100 1101 ABCD
0 1 1 0 6
0 1 1 1 7 1110 1111 0001 0010 FE12
1 0 0 0 8
0 and 1 status in each bit can be well understood by use of
1 0 0 1 9 hexadecimal expression.
1 0 1 0 A
1 0 1 1 B
1 1 0 0 C
1 1 0 1 D
1 1 1 0 E
1 1 1 1 F
At2-5
The descriptive contents of this Manual are subject to change due to
better improvement of applicable product without prior notice.
This Manual is issued after careful check and review of the contents
thereof. However, should any doubt or any descriptive error be
found in the contents, please feel free to contact us.
It is prohibited to copy and transfer , wholly or partly, the descriptive
contents of this Manual to others.
 1st Edition  December 2007

 21st Edition  March 2022
 We are ready to comply with your request for maintenance,
Please forward: Phone: +81-566-25-8291
FAX: +81-566-25-5469
1-1 Asahimachi, Kariya, Aichi 448-8652 Japan
Manual No.
T-335-21-E
© JTEKT CORPORATION 2007-2022.

* Specification in this manual are subject to change without notice.
* Products herein may be strategic commodities under the Foreign Exchange and
Foreign Trade Control Law of Japan.
An approval under the law may be required exportation of the products.

Series: Programmable Controller

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Series: Programmable Controller

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Programmable Controller

This is a operating manual of TOYOPUC-PC10G (TCC-6353).

Failure to observe the instructions given in this Manual could

Failure to observe the instructions given in this Manual could

Don't overhaul the module and don't touch the module

Execute write during PC run (write during run) only when

In handling the lithium battery, read and observe " Lithium

Use this product under an environment which meets the

Don't attach/detach each module to/from its base, with the

Don't touch directly the electronic circuits inside the

The cautions on storage and transportation

The slot that can mount PC10G-CPU or SELECTOR is a

Ex.: 6-slot base

Avant d'installer ou d'utiliser ce produit, d'effectuer des opérations de maintenance ou de

Le non-respect de l'une des consignes peut entraîner des

Le non-respect de l'une de ces consignes peut entraîner

 Ne révisez pas le module et ses composants si le

 Ne touchez pas aux bornes si le commutateur est placé en

 L'écriture pendant le fonctionnement du PC n'est possible que si

 Lorsque vous manipulez la batterie au lithium, lisez et respectez

 Utilisez ce produit dans un environnement conforme aux

 Ne touchez pas aux circuits électroniques du module directement.

 Précautions de magasinage et de manutention

2. Enlevez la pile du module si celui-ci n'est pas utilisé pendant

3. Ne posez pas le module sur un appareil développant de la

4. Les appareils électriques sont vulnérables à l'humidité (la

Operation Manual No.

1. SYSTEM COMPONENTS ..................................................................................................................................1-1

(1) Efficient CPU function

(2) Mass memory

(3) Variegated communication function

*1 Applies to PC10 mode.

*2 MODBUS-RTU is the function added to PC10G Ver3.30.

Expanding the extended buffer register from 128KW to

address by use of index register (IXO - IXF). It takes

PCwin (Ver. 8.00~)

Input IN-22D THK-2871 32 points DC24V input , D-sub connector

FL-Remote I/O FRMT-32/00P TCU-6405 FL-remote terminal Input 32 points

Equipment, device Name Type Specification

Programming software (CD-ROM version) for

Please refer to Section 2.2.6

*.** (6) RESET/START switch

No. Name Contents

Avoid installing the PC at the following environments.

(1) Place where ambient temperature exceeds the range of 0 to 55°C.

(7) Place where the product is exposed to direct sun ray.

2. For mounting, push-in the module in arrow direction until it clicks.

(2) How to remove module

Main power source

(5) The recommended cable for I/O signal is as follows.

(6) Use of the following crimp terminals is recommended.

(9) Output short-circuit protection

(10) Parallel connection of loads

Manufacturer Type Quantity

0.75 or 1.25 sq twist

To sequence control circuit

Ex. Proper connection AC100V(POWER1)

CPU rack Additional

Ex. Improper connection

AC100V(POWER1) AC100V(POWER1) AC100V(POWER1)

CPU rack Additional CPU rack Additional

I/O cable I/O cable

(1) Be careful to avoid miss wiring of 5V, 0V and FG.