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PD - 97098B

IRFB3306PbF
IRFS3306PbF
IRFSL3306PbF
HEXFET® Power MOSFET
Applications D VDSS 60V
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply RDS(on) typ. 3.3m:
l High Speed Power Switching max. 4.2m:
l Hard Switched and High Frequency Circuits G ID (Silicon Limited) 160A c
Benefits S ID (Package Limited) 120A
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness D D
D
l Fully Characterized Capacitance and Avalanche
SOA
S
l Enhanced body diode dV/dt and dI/dt Capability D
S D D
S
G G G
l Lead-Free
TO-220AB D2Pak TO-262
IRFB3306PbF IRFS3306PbF IRFSL3306PbF

G D S
G ate Drain Source

Absolute Maximum Ratings


Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 160c
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 110c
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120
IDM Pulsed Drain Current d 620
PD @TC = 25°C Maximum Power Dissipation 230 W
Linear Derating Factor 1.5 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery f 14 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range
°C
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw 10lbxin (1.1Nxm)

Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 184 mJ
IAR Avalanche Currentd See Fig. 14, 15, 22a, 22b, A
EAR Repetitive Avalanche Energy g mJ

Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case k ––– 0.65
RθCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 –––
°C/W
RθJA Junction-to-Ambient, TO-220 k ––– 62
2
RθJA Junction-to-Ambient (PCB Mount) , D Pak jk ––– 40
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IRFB/S/SL3306PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 60 ––– ––– V VGS = 0V, ID = 250μA
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.07 ––– V/°C Reference to 25°C, ID = 5mAd
RDS(on) Static Drain-to-Source On-Resistance ––– 3.3 4.2 mΩ VGS = 10V, ID = 75A g
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 150μA
IDSS Drain-to-Source Leakage Current ––– ––– 20 μA VDS = 60V, VGS = 0V
––– ––– 250 VDS = 48V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 0.7 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 230 ––– ––– S VDS = 50V, ID = 75A
Qg Total Gate Charge ––– 85 120 nC ID = 75A
Qgs Gate-to-Source Charge ––– 20 ––– VDS =30V
Qgd Gate-to-Drain ("Miller") Charge ––– 26 VGS = 10V g
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 59 ––– ID = 75A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 15 ––– ns VDD = 30V
tr Rise Time ––– 76 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 40 ––– RG = 2.7Ω
tf Fall Time ––– 77 ––– VGS = 10V g
Ciss Input Capacitance ––– 4520 ––– pF VGS = 0V
Coss Output Capacitance ––– 500 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 720 ––– VGS = 0V, VDS = 0V to 48V i, See Fig. 11
Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– 880 ––– VGS = 0V, VDS = 0V to 48V h

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 160c A MOSFET symbol D

(Body Diode) showing the


ISM Pulsed Source Current ––– ––– 620 A integral reverse G

S
(Body Diode)d p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
trr Reverse Recovery Time ––– 31 ns TJ = 25°C VR = 51V,
––– 35 TJ = 125°C IF = 75A
Qrr Reverse Recovery Charge ––– 34 nC TJ = 25°C di/dt = 100A/μs g
––– 45 TJ = 125°C
IRRM Reverse Recovery Current ––– 1.9 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calculated continuous current based on maximum allowable junction „ ISD ≤ 75A, di/dt ≤ 1400A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
temperature. Bond wire current limit is 120A. Note that current … Pulse width ≤ 400μs; duty cycle ≤ 2%.
limitations arising from heating of the device leads may occur with † Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements. as Coss while VDS is rising from 0 to 80% VDSS.
‚ Repetitive rating; pulse width limited by max. junction ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature. Coss while VDS is rising from 0 to 80% VDSS.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.04mH ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 96A, VGS =10V. Part not recommended for use mended footprint and soldering techniques refer to application note #AN-994.
above this value. ‰ Rθ is measured at TJ approximately 90°C

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IRFB/S/SL3306PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V

ID, Drain-to-Source Current (A)


ID, Drain-to-Source Current (A)

8.0V 8.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
4.8V 4.8V
BOTTOM 4.5V BOTTOM 4.5V

100 100

4.5V
4.5V

≤ 60μs PULSE WIDTH ≤ 60μs PULSE WIDTH


Tj = 25°C Tj = 175°C
10 10
0.1 1 10 100 0.1 1 10 100

VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics


1000 2.5
ID = 75A

RDS(on) , Drain-to-Source On Resistance


VGS = 10V
ID, Drain-to-Source Current(Α)

100 2.0
TJ = 175°C
(Normalized)

10 1.5

TJ = 25°C

1
1.0
VDS = 25V
≤ 60μs PULSE WIDTH
0.1
0.5
2.0 3.0 4.0 5.0 6.0 7.0 8.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

8000 20
VGS = 0V, f = 1 MHZ ID= 75A
Ciss = Cgs + Cgd, Cds SHORTED
VDS = 48V
VGS, Gate-to-Source Voltage (V)

Crss = Cgd
16 VDS= 30V
6000 Coss = Cds + Cgd
VDS= 12V
C, Capacitance (pF)

Ciss
12

4000
8

2000
4
Coss
Crss
0
0
0 20 40 60 80 100 120 140
1 10 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFB/S/SL3306PbF
1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)

ID, Drain-to-Source Current (A)


ISD , Reverse Drain Current (A)

1000
100
TJ = 175°C

1msec 100μsec
100
10 TJ = 25°C

10msec
10

1
1 Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.1 1 10 100
VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area
Forward Voltage
180

V(BR)DSS , Drain-to-Source Breakdown Voltage


80
ID = 5mA
160
Limited By Package
140
ID, Drain Current (A)

120 70

100

80

60 60

40

20

0 50
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

T C , Case Temperature (°C) TJ , Junction Temperature (°C)


Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
1.5 800
EAS, Single Pulse Avalanche Energy (mJ)

ID
TOP 13A
18A
600 BOTTOM 96A
1.0
Energy (μJ)

400

0.5

200

0.0 0
0 10 20 30 40 50 60 25 50 75 100 125 150 175
VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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IRFB/S/SL3306PbF
1

D = 0.50

0.20
Thermal Response ( Z thJC )
0.1
0.10
0.05
0.02
0.01 R1 R2
0.01
τJ
R1 R2
Ri (°C/W) τι (sec)
τC
τJ
τ1
τ1
τ2 0.249761 0.00028
τ2

Ci= τi/Ri 0.400239 0.005548


0.001 SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case


100
Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
0.01 Tstart =25°C (Single Pulse)
Avalanche Current (A)

0.05
10 0.10

Allowed avalanche Current vs avalanche


pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.

1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
200 Notes on Repetitive Avalanche Curves , Figures 14, 15:
TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
ID = 96A Purely a thermal phenomenon and failure occurs at a temperature far in
EAR , Avalanche Energy (mJ)

160
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
120
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
80 6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
40 tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature


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IRFB/S/SL3306PbF
4.5 16

ID = 1.0A
VGS(th) Gate threshold Voltage (V)

4.0 ID = 1.0mA
ID = 250μA 12
3.5
ID = 150μA

IRRM - (A)
3.0
8
2.5

2.0 IF = 30A
4
VR = 51V
1.5 TJ = 125°C
TJ = 25°C
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000

TJ , Temperature ( °C ) dif / dt - (A / μs)

Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

16 350

300

12
250
QRR - (nC)
IRRM - (A)

200
8
150

IF = 45A 100 IF = 30A


4
VR = 51V VR = 51V
TJ = 125°C 50 TJ = 125°C
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / μs) dif / dt - (A / μs)

Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

350

300

250
QRR - (nC)

200

150

100 IF = 45A
VR = 51V
50 TJ = 125°C
TJ = 25°C
0
100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / μs)

Fig. 20 - Typical Stored Charge vs. dif/dt


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IRFB/S/SL3306PbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

ƒ VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied


• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms

LD
VDS VDS
90%
+
VDD -

D.U.T 10%
VGS VGS
Pulse Width < 1μs
Duty Factor < 0.1% td(on) tr td(off) tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2μF
.3μF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRFB/S/SL3306PbF

TO-220AB Package Outline


Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information


EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789 INT ERNAT IONAL PART NUMBER
AS S EMBLED ON WW 19, 2000 RECT IFIER
IN T HE AS S EMBLY LINE "C" LOGO
DAT E CODE
YEAR 0 = 2000
Note: "P" in as s embly line pos ition AS S EMBLY
indicates "Lead - F ree" LOT CODE WEEK 19
LINE C

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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IRFB/S/SL3306PbF

TO-262 Package Outline (Dimensions are shown in millimeters (inches))

TO-262 Part Marking Information


EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
INT ERNAT IONAL
AS S EMBLED ON WW 19, 1997
RECT IFIER
IN T HE AS S EMBLY LINE "C" LOGO
DAT E CODE
YEAR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

OR

PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
DAT E CODE
P = DES IGNAT ES LEAD-FREE
AS S EMBLY
LOT CODE PRODUCT (OPT IONAL)
YEAR 7 = 1997
WEEK 19
A = AS S EMBLY S IT E CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

www.irf.com 9
IRFB/S/SL3306PbF

D2Pak Package Outline (Dimensions are shown in millimeters (inches))

D2Pak Part Marking Information


T HIS IS AN IRF530S WIT H PART NUMBER
LOT CODE 8024 INT ERNAT IONAL
AS S EMBLED ON WW 02, 2000 RECT IFIER F530S
IN T HE AS S EMBLY LINE "L" LOGO
DAT E CODE
YEAR 0 = 2000
AS S EMBLY
LOT CODE WEEK 02
LINE L

T HIS IS AN IRF530S WIT H PART NUMBER


LOT CODE 8024
For GB Production INT ERNAT IONAL
AS S EMBLED ON WW 02, 2000 RECT IFIER F530S
IN T HE AS S EMBLY LINE "L" LOGO

DAT E CODE
LOT CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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IRFB/S/SL3306PbF

D2Pak Tape & Reel Information

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)


1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)


12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)


(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

Data and specifications subject to change without notice.


This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/2008
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