MOSFETs 

Chapter Summary

Here is a brief summary of the material covered in this chapter:

There are two basic types of MOSFETs:

 Depletion MOSFETs, or D-MOSFETs, can be operated in either the depletion mode or

the enhancement mode.
 Enhancement MOSFETs, or E-MOSFETs, can be operated only in the enhancement
mode.

The differences between the two are a result of the physical construction of each. MOSFET
construction can be represented as shown in Figure 13-1.

FIGURE 13-1 MOSFET construction.

The D-MOSFET has a physical channel that connects the source and drain materials. The E-
MOSFET has source and drain materials that are separated by the substrate (which is made
of p-type material in the component shown).

Both MOSFETs represented in Figure 13-1 have a metal gate. Between the gate and the
semiconductor material is an insulating layer made up of silicon dioxide ( ). Going from the
gate to the substrate, the component has a metal-oxide-semiconductor, which is the source of
the component’s name. The symbols used to represent MOSFETs are shown in Figure 13-2.

 
  

FIGURE 13-2 MOSFET schematic symbols.

Because the   layer is extremely sensitive to static electricity, several precautions must be
observed when handling MOSFETs that do not have protected inputs:

 Store MOSFETs with the leads shorted together, or in conductive foam. Never store
MOSFETs in Styrofoam (which generates static electricity).
 Do not handle MOSFETs unless you need to. When you do, hold the component by
the case, not the leads.
 Do not install or remove a MOSFET while power is applied (or an active signal source
is connected) to the circuit.

D-MOSFETs

D-MOSFETs can operate in the depletion and enhancement modes. These modes of operation
are illustrated in Figure 13-3. (The zero bias condition is included for comparison.)

 
  

FIGURE 13-3 D-MOSFET operation.

Here is a summary of the operating states shown in Figure 13-3:

 Zero bias: The gate is shorted to the source, so drain current (by definition) equals the
 rating of the component. (Remember:  is the shorted-gate drain current.)
 Depletion mode: The negative gate-source voltage forces free electrons away from the
gate, forming a depletion layer that cuts into the channel. As a result,  .
 Enhancement mode: The positive gate-source voltage attracts free electrons in the
substrate toward the channel while driving valence-band holes (in the substrate) away
from the channel. As a result, the material to the right of the
channel effectively becomes n-type material. This results in a wider channel,
and  .

These operating relationships are represented by the transconductance curve shown in the
figure. The MOSFET transconductance curve is plotted in the same fashion as the JFET curve,
with one exception: Positive values of   are included in the process, as demonstrated in
Example 13.1 of the text. D-MOSFET drain curves are essentially the same as JFET drain
curves. (See Figure 13.6 of the text.)

 
D-MOSFET Biasing

D-MOSFETs can be biased using any of the JFET biasing circuits discussed in Chapter 12. In
addition, D-MOSFETs can use a biasing scheme referred to as zero bias. A zero-bias circuit is
shown in Figure 13-4.

FIGURE 13-4 Zero bias.

Since there is no current in the gate circuit, no voltage is developed across  ,

and  . Therefore:   and  . Note that the value of   is

normally chosen so that   (which midpoint biases the circuit).

The gate input impedance of a D-MOSFET is typically much greater than that of a comparable
JFET. A comparison of D-MOSFETs and JFETs is provided in Figure 13.8 of the text.

E-MOSFETs

E-MOSFETs are restricted to enhancement-mode operation. This mode of operation is

illustrated in Figure 13-5.

 
  

FIGURE 13-5 E-MOSFET operation.

When an E-MOSFET is zero biased, there is no channel between the source and drain
materials, and  . When   exceeds the threshold voltage rating for the component (
), a channel is formed as shown in Figure 13-5. This allows a current to pass through
the component. The operation of the E-MOSFET is represented by the transconductance curve
shown in Figure 13-6. Note that the   rating for the component is, by definition, the value of
drain current when  . Since the channel is just beginning to form
when  .

FIGURE 13-6 E-MOSFET transconductance curve.

 

The value of drain current at a given value of   is found using

where k is a constant whose value is found as

The values of  , and   are provided on the component spec sheet. Example
13.2 demonstrates the process of determining the values of k and  (at a specified value
of  ).

E-MOSFET Biasing Circuits

E-MOSFETs can be biased using voltage-divider bias, gate-bias, or drain-feedback bias. A

drain-feedback bias circuit (which is the MOSFET counterpart to collector-feedback bias) is
shown in Figure 13-7.

FIGURE 13-7 Drain-feedback bias.

There is no current in the gate circuit, so the drain and gate in Figure 13-7 are held at the same
potential by the gate resistor. Therefore,  , and  . (Note that   is
measured at  .)

Dual-Gate MOSFETs

MOSFET operation is limited at high frequencies because MOSFETs have high gate-to-
channel capacitance. This capacitance is a result of the metal-oxide-semiconductor layers,
which, in essence, form a capacitor. (See Figure 13.16.)

A dual-gate MOSFET uses two gates to reduce the overall gate-to-channel capacitance. Dual-
gate MOSFET construction is illustrated in Figure 13-8.

FIGURE 13-8 Dual-gate MOSFET construction and symbols.

The dual-gate MOSFET is normally wired so that the two gates are in series. Since total series
capacitance is lower than either individual value, the total gate-to-channel capacitance of the
device is reduced.

Power MOSFETs

Vertical MOSFETs (VMOS) are designed to handle much higher drain currents than standard
MOSFETs. VMOS construction can be represented as shown in Figure 13-9.

FIGURE 13-9 Vertical MOSFET (VMOS) construction.

When a positive gate voltage is applied to the device, the VMOS forms a channel on both sides
of the gate. This channel is wider than the standard MOSFET channel (as shown in Figure
13.19 of the text). As a result, the device allows for much greater values of drain current.

VMOS devices have positive temperature coefficients, so they are not subject to thermal
runaway. Also, the positive temperature coefficient allows 2 or more VMOS devices to be
connected in parallel, which is not possible with BJTs.

Lateral double-diffused MOSFETs (LDMOS) have short channel regions and heavily doped n-
type substrates (as shown in Figure 13.20 of the text.). As a result, the on resistance ( ) of
the device is extremely low, which allows for high values of drain current. LDMOS devices have
typical values of  .

Complementary MOSFETs (CMOS)

MOSFETs are commonly used in digital (computer) circuits. These circuits are designed to
work with signals that are made up of alternating dc voltage levels, called logic levels. The logic
levels in Figure 13-10 are 0 V and  .

 
  

FIGURE 13-10 Complementary MOSFETs (CMOS).

The CMOS inverter is designed to convert each logic level to the other. The circuit consists
of p-channel and n-channel E-MOSFETs that are configured as shown in Figure 13-10. When
the input to the circuit is low (0 V):   is biased on,   is biased off, and the output is coupled
to  . When the input to the circuit is high   is biased off,   is biased on, and
the output is coupled to ground. In each of these cases, the input signal has been converted
from one logic level to the other.

CMOS logic circuits have several advantages over BJT logic circuits:

1. They draw little current from the supply, so they consume little power.
2. They require virtually no input (gate) current, so the output from one CMOS logic circuit
can drive a nearly infinite number of CMOS inputs. In contrast, BJT circuits such as the
one in Figure 13.24 are generally restricted to driving 10 similar BJT inputs.

Cascode Amplifiers

A cascode amplifier is designed to reduce the effects of MOSFET input capacitance on high-
frequency operation. A cascode amplifier is shown in Figure 13-11. The two MOSFETs are in
series between the amplifier input and output, so the combined capacitance of the two is lower
than the capacitance of either MOSFET alone.   is in a self-biased common-
source configuration.  is in a voltage-divider biased common-gate configuration. Note that
the circuit can be constructed using a dual-gate MOSFET, as shown in Figure 13.27 of the text.

 
  

FIGURE 13-11 A cascode amplifier.

Several additional MOSFET applications are illustrated in the text, including a dual-gate
MOSFET RF amplifier and a MOSFET power driver.

MOSFET

The characteristics of depletion mode D MOSFETs is the same as for JFETs, and so the square law (110) holds, and
the curves of Figure 124 can be used. However, D MOSFETs can also be operated in enhancement mode with
positive values of vGS, see Figure 125. Formulas (111) and (112) also apply.

  
Figure 125: n-channel D MOSFET characteristics.
E MOSFETs can only operate in enhancement mode. When vGS=0, there is no conducting channel and only an
extremely small leakage current IDSS can flow. In an n-type E MOSFET, positive values of vGS larger than VGS(th) form
the conducting channel between source and drain. The characteristics are shown in Figure 126.

  
Figure 126: n-channel E MOSFET characteristics.
E MOSFETs are also square-law devices, and we write 

 
iDS = K( vGS - VGS(th))2 (113)

where the constant K can be determined from the data sheets for the device.

An e-mosfet is and "enhancement" mosfet. A d-mosfet is a "depletion" mosfet. These essentially show
what mode the mosfet operates in when a voltage is applied to the gate. .
An enhancement mode mosfet is normally non-conducting but conducts when the channel
is enhanced by applying a voltage to the gate and pulling carriers into the channel. A depletion mode
mosfet normally conducts but becomes more and more non-conducting as carriers are depleted or
pulled out of the channel by applying a voltage. The polarity of the voltage depends on whether it is
an N channel or P channel. P channel uses positively doped silicon while N channel uses negatively
doped silicon. N channel fets are used wherever possible because N material conducts better than P
material.
There are basically two types of fet, the jfet and the mosfet. The jfet uses a single junction to control
the channel hence draws some current. Bipolar transistors use two junctions. In the mosfet
(Metal Oxide Semiconducting Field Effect Transistor) there is no such junction hence draw so little
current for control purposes it can be regarded as zero. The gate is isolated from the channel by a
very thin layer of metal oxide (usually chromium dioxide). An enhacement mode mosfet can be turned
on by applying a voltage then removing the wire to the gate. The channel will then remain conducting
for some time.