PD -94424A

AUTOMOTIVE MOSFET
IRF3007
Typical Applications HEXFET® Power MOSFET
● 42 Volts Automotive Electrical Systems
D
Features VDSS = 75V
● Ultra Low On-Resistance
● 175°C Operating Temperature
● Fast Switching RDS(on) = 0.0126Ω
G
● Repetitive Avalanche Allowed up to Tjmax
● Automotive [Q101] Qualified ID = 75A
S

Description
Specifically designed for Automotive applications, this
design of HEXFET® Power MOSFETs utilizes the
lastest processing techniques to achieve extremely low
on-resistance per silicon area. Additional features of
this HEXFET power MOSFET are a 175°C junction
operating temperature, fast switching speed and
improved repetitive avalanche rating. These combine
to make this design an extremely efficient and reliable
device for use in Automotive applications and a wide
variety of other applications. TO-220AB

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon limited) 80
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig.9) 56 A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package limited) 75
IDM Pulsed Drain Current  320
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy‚ 280 mJ
EAS (6 sigma) Single Pulse Avalanche Energy Tested Value‡ 946
IAR Avalanche Current See Fig.12a, 12b, 15, 16 A
EAR Repetitive Avalanche Energy† mJ
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw 1.1 (10) N•m (lbf•in)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.74
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
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IRF3007
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 75 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.084 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 10.5 12.6 mΩ VGS = 10V, ID = 48A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA
gfs Forward Transconductance 180 ––– ––– S VDS = 25V, ID = 48A
––– ––– 20 VDS = 75V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 60V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 89 130 ID = 48A
Qgs Gate-to-Source Charge ––– 21 32 nC VDS = 60V
Qgd Gate-to-Drain ("Miller") Charge ––– 30 45 VGS = 10V
td(on) Turn-On Delay Time ––– 12 ––– VDD = 38V
tr Rise Time ––– 80 ––– ID = 48A
ns
td(off) Turn-Off Delay Time ––– 55 ––– RG = 4.6Ω
tf Fall Time ––– 49 ––– VGS = 10V „
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S

Ciss Input Capacitance ––– 3270 ––– VGS = 0V

Coss Output Capacitance ––– 520 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 78 ––– ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 3500 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 340 ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance … ––– 640 ––– VGS = 0V, VDS = 0V to 60V

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 80†
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 320

(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 48A, VGS = 0V „
trr Reverse Recovery Time ––– 85 130 ns TJ = 25°C, IF = 48A, VDD = 38V
Qrr Reverse Recovery Charge ––– 280 420 nC di/dt = 100A/µs „
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by … Coss eff. is a fixed capacitance that gives the same charging time
max. junction temperature. (See fig. 11).
as Coss while VDS is rising from 0 to 80% VDSS .
‚ Starting TJ = 25°C, L = 0.24mH
† Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive
R G = 25Ω, IAS = 48A, VGS=10V (See Figure 12).
avalanche performance.
ƒ ISD ≤ 48A, di/dt ≤ 330A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C ‡ This value determined from sample failure population. 100%
„ Pulse width ≤ 400µs; duty cycle ≤ 2%. tested to this value in production.

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 IRF3007

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
5.0V 100 5.0V
100 BOTTOM 4.5V
BOTTOM 4.5V

4.5V

10 10
4.5V

20µs PULSE WIDTH 20µs PULSE WIDTH

Tj = 25°C Tj = 175°C
1 1
0.1 1 10 100 0.1 1 10 100

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 100
T J = 175°C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current ( A)

80

100 T J = 175°C
60
T J = 25°C

40
10 T J = 25°C

20
VDS = 25V VDS = 25V
20µs PULSE WIDTH 20µs PULSE WIDTH
1
0
4.0 5.0 6.0 7.0 8.0 9.0
0 40 80 120 160
VGS , Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

Vs. Drain Current
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IRF3007

6000 20
VGS = 0V, f = 1 MHZ
ID= 48A VDS= 60V
C iss = C gs + C gd , C ds
VDS= 38V

VGS , Gate-to-Source Voltage (V)

5000 SHORTED
Crss = Cgd
16 VDS= 15V
Coss = Cds + Cgd
C, Capacitance (pF)

4000
12
Ciss
3000
8
2000

4
1000
Coss
Crss 0
0
0 40 80 120 160
1 10 100
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.0 10000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)

1000
100.0

TJ = 175°C 100

10.0 100µsec
10
1msec

1.0
1 10msec
Tc = 25°C
T J = 25°C Tj = 175°C
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 1 10 100 1000

VSD, Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRF3007

80 3.0
I D = 80A
LIMITED BY PACKAGE

2.5

60

RDS(on) , Drain-to-Source On Resistance

2.0
ID , Drain Current (A)

(Normalized)
40 1.5

1.0

20

0.5

V GS = 10V
0 0.0
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TC , Case Temperature ( °C) TJ, Junction Temperature ( °C)

Fig 9. Maximum Drain Current Vs. Fig 10. Normalized On-Resistance

Case Temperature Vs. Temperature

D = 0.50
(Z thJC)

0.20
Thermal Response

0.1 0.10

P DM
0.05

SINGLE PULSE t1
0.02 (THERMAL RESPONSE)
t2
0.01

Notes:
1. Duty factor D = t1/ t 2
2. Peak T J = P DM x Z thJC +T C
0.01
0.00001 0.0001 0.001 0.01 0.1

t 1, Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF3007

600
15V ID
TOP 20A
500 34A
L DRIVER BOTTOM 48A
VDS

EAS , Single Pulse Avalanche Energy (mJ)

400
RG D.U.T +
V
- DD
IAS A
20V
VGS 300
tp 0.01Ω

200
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp 100

0
25 50 75 100 125 150 175

Starting T , JJunction Temperature ( °C)

I AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
QG

10 V
QGS QGD 4.0
-VGS(th) Gate threshold Voltage (V)

VG
ID = 250µA

3.0
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
2.0
50KΩ

12V .2µF
.3µF

+
V
D.U.T. - DS
1.0
VGS -75 -50 -25 0 25 50 75 100 125 150 175
3mA T J , Temperature ( °C )

IG ID
Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature
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1000
Duty Cycle = Single Pulse

Allowed avalanche Current vs

avalanche pulsewidth, tav
100 assuming ∆ Tj = 25°C due to
Avalanche Current (A)

0.01 avalanche losses. Note: In no

case should Tj be allowed to
0.05 exceed Tjmax
10
0.10

0.1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

300 Notes on Repetitive Avalanche Curves , Figures 15, 16:

T OP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTT OM 50% Duty Cycle 1. Avalanche failures assumption:
ID = 48A Purely a thermal phenomenon and failure occurs at a
EAR , Avalanche Energy (mJ)

temperature far in excess of T jmax. This is validated for

every part type.
200 2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
100 avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I av = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting TJ , Junction Temperature (°C) ZthJC(D, tav ) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Fig 16. Maximum Avalanche Energy Iav = 2DT/ [1.3·BV·Zth]
Vs. Temperature EAS (AR) = PD (ave)·tav
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IRF3007

Driver Gate Drive

D.U.T P.W.
Period D=
P.W.
Period
+

*
ƒ Circuit Layout Considerations
VGS=10V

• Low Stray Inductance

• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚
-
„ +
Recovery
Current
Body Diode Forward
Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

RD
V DS

VGS
D.U.T.
RG
+
-VDD

10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

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TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415) 3.78 (.149) -B-
2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045) LEAD ASSIGNMENTS
MIN 1 - GATE
1 2 3 2 - DRAIN
3 - SOURCE
4 - DRAIN
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)

3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

EXAMPLE: T HIS IS AN IRF1010 PART NUMBER
LOT CODE 1789 INT ERNAT IONAL
RECT IFIER
AS S EMBLED ON WW 19, 1997
LOGO
IN T HE AS S EMBLY LINE "C"
DAT E CODE
YEAR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

TO-220AB package is not recommended for Surface Mount Application

Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 9/02
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