You are on page 1of 1
=a ee el High Performance ECMOS PLD Generic Array Logic™ + HIGH PERFORMANCE E'CMOS* TECHNOLOGY ‘= 4 ns Maximum Propagation Delay max = 260 MHz ‘3.5 ns Maximum from Glock Input to Data Output UitrtOS* Advanced GMOS Technology + ACTIVE PULLLUPS ON ALL PINS + COMPATIBLE WITH STANDARD 22040 DEVICES — Fully Funcuon/Fuse-MapParametric Compatible ‘wth Bipolar ana UVEMOS 22V10 Devices, + S0% 075% REDUCTION IN POWER VERSUS BIPOLAR. —S0mA Typical ice on Low Power Device = 46maA Typeal ee on Quartor Power Device + E'CELL TECHNOLOGY = Reconfigurable Loge = Reprogrammable Cells tot% Testeut00% Vilas high Speed Electrical Erasure (<100ms) T ao'ear bata Retention “TEN OUTPUT Logic macROCELLS = naximum Flexi for Complex Logie Designs + PRELOAD AND POWER-ON RESET OF REGISTERS "— 100% Funetional Testabity + APPLICATIONS INCLUDE: oma contre! = State Machine Control — high Speed Graphics Processing = Standera Logie Speed Upgrade + ELECTRONIC SIGNATURE FOR IDENTIFICATION ‘Tre GAL2010 dos rasa pepagaten dey ne corbines ahignpariormanca CMOS pace where Eronatle ©) tis clanyZeviO doves the ahel CMS cee owes {ha CaL22V10 to concur much ace pot une compared 2 Eipdor22vi woes. E'terelgyofes ng sed (100M) tenet, prong the aly oe pogta ecg he Setice quick and fly The genetic architecture provides maslmum design fexbity by ‘ilowhg tie Ouut Logis actocet (GLI) tobe configured By theuser The GALZ2V Dis hy unctowtuse mapfparameste com atl wih stander biplar nd GMOS 2210 dovos. pt reir anroerorariabi cl lew compete AC. tee Somoonducter oles 00% Bld pregrammatliy and ne tenaity ofa CAL pric. bacon, 100 essere oyses and data etenon in excess of 20 years ae spectied. Mee ex 'AND-ARRAY (32x44) PROGRAMMABLE oS PLL ome oe} EE ane oe cae rone Eee

You might also like