Digital to Analog Converter

Scientech 2602

Product Tutorials
Ver 1.1

Designed & Manufactured by-

An ISO 9001:2008 company
Scientech Technologies Pvt. Ltd.
94, Electronic Complex, Pardesipura, Indore - 452 010 India,
+ 91-731 4211100, : info@scientech.bz , : www.ScientechWorld.com
Scientech 2602

Digital to Analog Converter

Scientech 2602
Table of Contents

1. Safety Instructions 3
2. Introduction 4
3. Features 5
4. Technical Specifications 5
5. Theory 6
6. Experiments
• Experiment 1 19
Functional verification of weighted resistor D/A converter
• Experiment 2 22
Record the transfer characteristics of weighted resistor D/A
Converter
• Experiment 3 24
Functional verification of D/A converter with Ladder network
• Experiment 4 26
Record of transfer characteristic of the Ladder network D/A
Converter
• Experiment 5 28
Functional verification of an integrated D/A converter
7. Frequently Asked Questions 30
8. Warranty 31
9. List of Accessories 31

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Safety Instructions
Read the following safety instructions carefully before operating the instrument. To
avoid any personal injury or damage to the instrument or any product connected to it.
Do not operate the instrument if suspect any damage to it.
The instrument should be serviced by qualified personnel only.

For your safety:

Use proper Mains cord : Use only the mains cord designed for this instrument.
Ensure that the mains cord is suitable for your
country.
Ground the Instrument : This instrument is grounded through the protective
earth conductor of the mains cord. To avoid electric
shock the grounding conductor must be connected to
the earth ground. Before making connections to the
input terminals, ensure that the instrument is properly
grounded.
Observe Terminal Ratings : To avoid fire or shock hazards, observe all ratings and
marks on the instrument.
Use only the proper Fuse : Use the fuse type and rating specified for this
instrument.
Use in proper Atmosphere : Please refer to operating conditions given in the
manual.
1. Do not operate in wet / damp conditions.
2. Do not operate in an explosive atmosphere.
3. Keep the product dust free, clean and dry.

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Introduction
The digital to analog converters compose the devices transforming a digital word,
binary encoded and generated for example by a computer, into a discrete analog
signal, in the sense that to every input digital word a single output analog value
corresponds.

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Features
• Self contained TechBook
• Discrete & Monolithic D/A conversion
• On Board Function Generator & Counter
• Functional blocks indicated on board mimics
• Fully documented student workbook & operating manual
• Built in DC Power Supply
• Compact size
Technical Specifications
: 1.4 Bit weighted resistor
D/A Conversion
: 2.4 Bit R-2R ladder network
: 3.8 Bit monolithic D/A converter
Signal Source : DC Supply with toggle switches
O/P Indication : On DMM or Oscilloscope
Interconnections : 2mm banana sockets
Dimensions (mm) : W420 x H100 x D255
Weight : 2 Kgs (approximately)
Power
: 230V, ±10%, 50Hz

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Theory
The ideal characteristic of a 3 bit DAC is shown in figure 1 and it is represented by
the straight line that connects the output discrete values corresponding to the single
input digital data.

Figure 1
An output voltage value depending on the converter full-scale range corresponds to
every one of the 8 input stages, normally indicated with FSR (Full Scale Range).
If we define "quantum" Q the smallest variation of the output voltage, it results
Q = FSR / 2n
Where, n is the bit number composing the input code: it is therefore evident that the
resolution of the digital number conversion depends on the n value.
The maximum FS (Full Scale) value of the output voltage is:
FS = (1-2n) FSR = (2n-1) Q
In figure 1, in the hypothesis of FSR 10V, it results therefore
Q = 10 / 23 = 1.25V
FS = (23 - 1) * 1.25 = 8.75V

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Basic function of digital to analog converter:

A DAC converts an abstract finite-precision number (usually a fixed-point binary
number) into a concrete physical quantity (e.g., a voltage or a pressure). In particular,
DACs are often used to convert finite-precision time series data to a continually-
varying physical signal.

A typical DAC converts the abstract numbers into a concrete sequence of impulses
that are then processed by a reconstruction filter using some form of interpolation to
fill in data between the impulses. Other DAC methods (e.g., methods based on Delta-
sigma modulation) produce a pulse-density modulated signal that can then be filtered
in a similar way to produce a smoothly-varying signal.
By the Nyquist–Shannon sampling theorem, sampled data can be reconstructed
perfectly provided that its bandwidth meets certain requirements (e.g., a base band
signal with bandwidth less than the Nyquist frequency). However, even with an ideal
reconstruction filter, digital sampling introduces quantization error that makes perfect
reconstruction practically impossible. Increasing the digital resolution (i.e., increasing
the number of bits used in each sample) or introducing sampling dither can reduce this
error.

Digital to Analog Converter types:

The most common types of electronic Digital to Analog Converter are:
• Pulse width modulator:
This is the simplest DAC type. A stable current or voltage is switched into a low
pass analog filter with a duration determined by the digital input code. This
technique is often used for electric motor speed control, and is now becoming
common in high-fidelity audio.
• Over sampling DACs or interpolating DACs :
The over sampling technique allows for the use of a lower resolution DAC
internally. A simple 1-bit DAC is often chosen because the over sampled result
is inherently linear. The DAC is driven with a pulse density modulated signal,
created with the use of a low-pass filter, step non-linearity (the actual 1-bit
DAC), and negative feedback loop, in a technique called delta-sigma
modulation. This results in an effective high-pass filter acting on the
quantization (signal processing) noise, thus steering this noise out of the low
frequencies of interest into the high frequencies of little interest, which is called
noise shaping (very high frequencies because of the over sampling). The
quantization noise at these high frequencies are removed or greatly attenuated
by use of an analog low-pass filter at the output (sometimes a simple RC low-
pass circuit is sufficient). Most very high resolution DACs (greater than 16 bits)
are of this type due to its high linearity and low cost. Higher over sampling rates
can either relax the specifications of the output low-pass filter and enable further
suppression of quantization noise. Speeds of greater than 100 thousand samples
per second (for example, 192 kHz) and resolutions of 24 bits are attainable with

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Delta-Sigma DACs. A short comparison with pulse width modulation shows

that a 1-bit DAC with a simple first-order integrator would have to run at 3 THz
(which is physically unrealizable) to achieve 24 meaningful bits of resolution,
requiring a higher order low-pass filter in the noise-shaping loop. A single
integrator is a low pass filter with a frequency response inversely proportional to
frequency and using one such integrator in the noise-shaping loop is a first order
delta-sigma modulator. Multiple higher order topologies (such as MASH) are
used to achieve higher degrees of noise-shaping with a stable topology.
• Binary weighted DAC:
Which contains one resistor or current source for each bit of the DAC connected
to a summing point. These precise voltages or currents sum to the correct output
value. This is one of the fastest conversion methods but suffers from poor
accuracy because of the high precision required for each individual voltage or
current. Such high-precision resistors and current-sources are expensive, so this
type of converter is usually limited to 8-bit resolution or less.
• R-2R ladder DAC:
Which is a binary weighted DAC that uses a repeating cascaded structure of
resistor values R and 2R? This improves the precision due to the relative ease of
producing equal valued matched resistors (or current sources). However, wide
converters perform slowly due to increasingly large RC-constants for each
added R-2R link.
DAC performance
DACs are at the beginning of the analog signal chain, which makes them very
important to system performance. The most important characteristics of these
devices are:
• Resolution:
This is the number of possible output levels the DAC is designed to reproduce.
This is usually stated as the number of bits it uses, which is the base two
logarithm of the number of levels. For instance a 1 bit DAC is designed to
1 8
reproduce 2 (2 ) levels while an 8 bit DAC is designed for 256 (2 ) levels.
Resolution is related to the effective number of bits (ENOB) which is a
measurement of the actual resolution attained by the DAC.
• Maximum sampling frequency:
This is a measurement of the maximum speed at which the DACs circuitry can
operate and still produce the correct output. As stated in the Nyquist–Shannon
sampling theorem, a signal must be sampled at over twice the frequency of the
desired signal. For instance, to reproduce signals in all the audible spectrum,
which includes frequencies of up to 20 kHz, it is necessary to use DACs that
operate at over 40 kHz. The CD standard samples audio at 44.1 kHz, thus DACs
of this frequency are often used. A common frequency in cheap computer sound
cards is 48 kHz—many work at only this frequency, offering the use of other
sample rates only through (often poor) internal resampling.

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• Monotonicity:

This refers to the ability of a DACs analog output to move only in the direction
that the digital input moves (i.e., if the input increases, the output doesn't dip
before asserting the correct output.) This characteristic is very important for
DACs used as a low frequency signal source or as a digitally programmable trim
element.

• THD+N :
This is a measurement of the distortion and noise introduced to the signal by the
DAC. It is expressed as a percentage of the total power of unwanted harmonic
distortion and noise that accompany the desired signal. This is a very important
DAC characteristic for dynamic and small signal DAC applications.

• Dynamic range:

This is a measurement of the difference between the largest and smallest signals
the DAC can reproduce expressed in decibels. This is usually related to DAC
resolution and noise floor.

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Weighted Resistor D/A Converter:

The simplest D/A converter is obtained by means of a summing circuit with input
resistances whose value depends on the bit weight that are associated to. We obtain in
this way the weighted resistors converter whose diagram is shown in figure 2 for the 4
bit case, where the switches S3-S0 are driven from the digital information so that every
resistance is connected to the reference voltage VREF or to ground in accordance with
the fact that the corresponding bit is at logical level 1 or 0.
Let's consider now the possibility where only the most significant bit (MSB) S3 is at
level 1:

Figure 2
In the R resistance the current I3 = VREF/R will flow and therefore at the operational
amplifier output we will have the voltage
V03 = - I3 (R / 2) = - VREF / 2
Analogously the contribution to the output voltage provided by the immediately less
significant digit will result
V02 = - I2 (R/ 2) = - (VREF /2R) (R/2) = - VREF /4
and so on
V01 = -I1 (R/2) = - (VREF /4R) (R/2) = - VREF/8
V00 = I0 (R/2) = - (VREF/8R) (R/2) = - VREF /16
The operational amplifier works as current to voltage converter, by summing the
currents in the branches where the switch Si = 1, and it provides in output a voltage
proportional to the total current and therefore to the binary value of the input signal
V0 = -VREF (8.S3 + 4.S2 + 2.S1 + 1.S1)/16
When all the bits are at logical level 1 the output voltage assumes the maximum full
scale value
VOFS = - 0.9375 VREF
While the quantum, which represents the minimum increase of the output voltage in
correspondence to the least significant bit (LSB) results

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Q = - 0.0625 VREF
The main disadvantage of this converter is that resistances of different value in a very
wide field are demanded, above all at the increasing of the bit number, and therefore
that can be carried out with limited accuracy.

Weighted resistor network

CMOS
transmission
gates

How does voltage across load resistor relate to switch settings?

Thevenin equivalent
Veq = V
VCC = V '
V = ( I 3 + I 2 + I 1 + I 0 )(16 R )

What are the four source currents?

x3 (V ' − V ) (1 − x3 )V x V '− V
I3 = − = 3
2R 2R 2R
x (V ' − V ) (1 − x 2 )V x V '− V
I2 = 2 − = 2
4R 4R 4R Short circuit current?
x (V ' − V ) (1 − x1 )V x V '− V
I1 = 1 − = 1
8R 8R 8R x3V ' x 2V ' x1V ' x0V '
I SC = + + +
x (V ' − V ) (1 − x 0 )V x V '− V 2R 4R 8R 16 R
I0 = 0 − = 0
16 R 16 R 16 R V'
I SC = (8 x3 + 4 x 2 + 2 x1 + x0 )
V '  16 R
V =   (8 x 3 + 4 x 2 + 2 x1 + x 0 )
 16  Req = R

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V '
V = (8 x 3 + 4 x 2 + 2 x 1 + x 0 )
16
R eq = R

 n −1 
 RL   V ' RL   ∑ xi 2 i 
V out =  V eq =    i = 0 n 
 R + RL   R + RL  2 
 

Norton equivalent circuit

Rnorton = Rthevenin = R
Inorton = Vthevenin/ R

• For current-based analysis

Thevenin is for voltage-based analysis
• Replaces linear circuit with current generator and parallel resistance
linear circuit is one with only resistances and voltage sources
• Current source is short-circuit current
• Equivalent resistance is open-circuit voltage divided by short-circuit current
• Equivalent resistance can be found by shorting all voltage sources

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Norton analysis of weighted resistor network

Equivalent resistance
set voltage sources to zero:
1
Req = =R
1 1 1 1 1
+ + + +
16R 16R 8R 4R 2R

Have short-circuit current from

Thevenin analysis
Norton equivalent circuit:
V'
ISC = (8 x3 + 4 x2 + 2 x1 + x0 )
16R

Current divides proportionally

(1 − p ) R = p R L o a d
output voltage is then R
p =
constant times digital R + R L oad
input
V p 
V ou t =  ref 4
 R2
∑ x i 2 i  R L oad


V ou t
 V R 
=  ref L oad  
∑ xi 2 i 

 R Load + R   2n 

1-p
p

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Some problems with this weighted resistor solution

• Resistor values span a wide range
– n-bit DAC ==> resistors from 2R to 2nR
– 8-bit DAC ==> 2R to 512R, e.g., 2K to 512K
– Difficult to fabricate wide ranges of resistance in
semiconductor processes.
• Different resistors in the network have different
accuracy requirements.
– 5% resistance change at MSB has 2.5% effect
– 5% resistance change at LSB (8-bit) has .02% effect
– MSB of 16-bit DAC (as in CD player) would require
accuracy of one part in 215 (.003%) to have less than
one step-size error.
Note: In Scientech 2602 mechanical switches are used only for simplicity and for
educational reasons; in reality the integrated DAC use static switches carried out in
bipolar or CMOS technology.
The above problems can be solved by using ladder network.
D/A converter with ladder network:
The weighted resistances converter has been among the first ones studied and carried
out but it has been then abandoned in favor of the configuration with ladder network
that uses only resistances of two values, one the double of the other. The converter
with ladder network (R-2R ladder) eliminates the disadvantages of the weighted
resistances converter since it is characterized by the presence of only two types of
resistances, even if the resistance number, with bit equality, now results double, as it
is shown in figure 3 for the 4 bit possibility, where the switches S3-S0 connect the
corresponding resistance to the reference voltage VREF or to ground in accordance
with the fact that the corresponding bit finds itself to logic level 1 or 0.

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Figure 3
If we suppose at first that all the input bits are at low level (S3 S2 S1, S0 = 0000) every
switch grounds the respective resistance 2R.
Let's consider now the possibility where only the most significant bit S3 is at level 1 :
the current I3, delivered from the reference voltage VREF, will divide in node A into
two identical currents but equal to the half of the incoming one, as it is shown in
figure 4.

Figure 4
Being
I3 = VREF / 2R + (2R// 2R) = VREF/ 3R
The potential of node A against ground is equal to
VA3 = 2R. I3 / 2 = (1 / 3) VREF
And therefore at the operational amplifier output the voltage results
V03 = - 2R / 2R (1 / 3) VREF = -VREF/3
Analogously the contribution to the output voltage of the immediately less significant
digit is determined by noticing that the current delivered from the reference voltage
VREF is equal to
I2 = VREF / 2R+ (2R// 2R) = VREF / 3R = I3
And it divides itself in node B into two identical currents of value I2/2: this now
current will split equally at node A so the potential of node A against ground is now
equal to :

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VA2 = 2R. (I2/4) = (1/6) VREF

And therefore at the operational amplifier output the voltage results
V02 = -2R/2R. 1/6 VREF = -VREF/6
With analog reasoning, we obtain
I1 = VREF/3R
VAl = 2R. (I1/8) = (1/12) VREF
V01 = - VREF/12
And at the end
I0 = VREF /3R
VAO = 2R (I0/ 16) = (1/ 24) VREF
V00 = -VREF/24
By applying the principle of effect superposition the output voltage results at the end
V0 = -VREF (8.S3 + 4.S2 + 2.S1 + 1.S0)/24
When all the bits are at logic level 1 the output voltage assumes the maximum full
scale value :
VOFS = -0.625 VREF
While the quantum that represents the minimum increase of the output voltage in
correspondence of the least significant bit (LSB), results
Q = -0.04167 VREF

Solution: Ladder Network

• Claim: same Norton and Thevenin equivalents

• Uses only two resistor values, R and 2R

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Why same Thevenin and Norton equivalents?

•
Thevenin?
•

 2R  x 0V ref
V eq = x 0V ref  =
 2R + 2R  2
xV
I SC = 0 ref
2R
R eq = R

• •

• R

x0Vref
2
open-circuit voltage?

 x0Vref  equivalent resistance?

x0Vref  x1Vref − 2  set voltage sources to zero
Veq = + (2 R)  
2  4R 
  1
Req = =R
1 1
xV xV
Veq = 1 ref + 0 ref +
2 4 2R 2R

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and so on...

After reducing through most significant bit (bit 3 in this case):

RLoad R

x3Vref x2Vref x1Vref x0Vref

+ + +
2 4 8 16

 R Load   V ref 
V out =    (8 x 3 + 4 x 2 + 2 x1 + x 0 )
 R Load + R   16 
 R LoadV ref  ∑ xi 2
i
V out =  2n
 Load
R + R 
same equation as weighted resistor network
but uses only two resistor sizes: R and 2R

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Recommended Testing Instruments for Experimentation:

● 20MHz Oscilloscope
● 3½ digits DMM
Experiment 1
Objective: Functional verification of a weighted resistor D/A converter
The purpose of this experiment is to analyze the operation of weighted resistor D/A
converter according to the binary system.
Equipment Required:
● Scientech 2602 with Power Supply cord
● Connecting Cords.
Connection diagram:

Figure 1.1

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Procedure:
● Connect the power supply to the board.
● Connect the D0- D3 of the logic switches to the corresponding jacks B0-B3 of the
converter.
● Set the switches S0-S3 to logic level 0.
● Connect the VREF socket to +5V.
● Connect a Multi meter as voltmeter for DC, to the output V0 of the converter.
● Switch the logic switches in binary progression & measure & record the output
voltage in correspondence of every combination of the input code.
● With input code S3 S2 S1 S0 = 0000 the output voltage VO has to be null:
eventual little deviations against zero are due to the operational amplifier offset.
● Switch off the Power Supply.

S0 S1 S2 S3 V0(V)
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

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Conclusion:
As per the applied inputs through the switches then according to the reference voltage
the output voltage is generated in analog form.
Questions:
● What is the importance of digital to analog converter?
● List various types of digital to analog converter?
● Why Binary weighted resistor method is not suitable for 8 bit conversion?
● Which method is best suited for digital to analog conversion?
● IF 1111 is the input to digital converter then what will be the analog output?

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Experiment 2
Objective: Record the transfer characteristic of weighted resistor D/A converter
Equipment Required:
● Scientech 2602 with power supply cord
● Connecting Cords.
Connection Diagram:

Figure 2.1
Procedure:
● Connect the o/p of counter Q3-Q0 respectively to input B3-B0 of the converter.
● Switch ‘On’ the power supply.
● On the oscilloscope observe the staircase of the transfer function of the
generator.

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Conclusion:
As per the applied inputs through the counter then according to the reference voltage
the output voltage is generated in analog form.

Questions:
● What do you understand by transfer function?
● What is the counter?
● What is stair case waveform? Draw and explain it?
● What do you understand by operational amplifier?
● Why inverting terminal is generally preferred?

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Experiment 3
Objective: Functional verification of D/A converter with ladder network
Equipment Required:
● Scientech 2602 with power supply cord
● Connecting Cords.
Connection Diagram:

Figure 3.1
Procedure:
● Connect the D0-D3 of the logic switches respectively to the B0-B3 of the
converter.
● Switch ‘On’ the power supply.
● Connect the multi meter as a voltmeter for DC, to the output V0 of the converter.
● Connect the VREF to +5V.
● Switch the logic switches in binary progression and measure & record the output
voltage in correspondence of every combination of the input code.
● With input code S3 S2 S1 S0 = 0000 the output voltage V0 has to be null:
eventual little deviations against zero are due to the operational amplifier offset.

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S0 S1 S2 S3 V0 (V)
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
● Switch off the power supply.

Conclusion:
As per the applied inputs through the switches then according to the reference voltage
the output voltage is generated in analog form.

Questions:
● What do you understand by D/A converter?
● What is the importance of using R-2R ladder network?
● Explain the advantages of R-2R ladder network?
● Which theorem is used for solving R-2R ladder network?
● Which parameter affects the performance of D/A converter?

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Experiment 4
Objective: Record of transfer characteristic of the ladder network D/A converter.
Equipment Required:
● Scientech 2602 with power supply cord
● Connecting Cords.
Connection Diagram:

Figure 4.1
Procedure:
● Connect the outputs of the counter Q0-Q3 respectively to B0-B3 of the converter.
● Switch ‘On’ the power supply.
● Observe on the oscilloscope the typical staircase of the transfer function of the
converter.
Conclusion:
As per the applied inputs through the counter then according to the reference voltage
the output voltage is generated in analog form.

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Questions:
● What do you understand by transfer function?
● What is the counter?
● What is stair case waveform? Draw and explain it?
● What do you understand by operational amplifier?
● Why inverting terminal is generally preferred?

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Experiment 5
Objective: Functional verification of an integrated D/A converter
Equipment Required:
● Scientech 2602 with power supply cord
● Connecting Cords.
Connection Diagram:

Figure 5.1
Procedure:
● Connect the outputs D0-D7 of the logic switches to the corresponding digital
inputs B0-B7 of the DAC.
● Set all the switches S0-S7 to the logic level 0.
● Connect the multi meter as a voltmeter for DC, to the output VO of the DAC.
● Switch ‘On’ the power supply.
● Measure the quantum value in correspondence with every combination of input
code.

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Conclusion:

As per the applied inputs through the switches then according to the reference voltage
the output voltage is generated in analog form.

Questions:
● What do you understand by term monolithic?
● What is function of integrating type of DAC?
● What are the advantages of using integrating type of DAC?

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Frequently Asked Questions

1 What is basic function of digital to analog converter?
Ans: A DAC converts an abstract finite-precision number (usually a fixed-point
binary number) into a concrete physical quantity (e.g., a voltage).
DAC are often used to convert finite-precision time series data to a continually-
varying physical signal.
2 What Nyquist’s–Shannon sampling theorem states?
Ans: By the Nyquist’s–Shannon sampling theorem, sampled data can be
reconstructed perfectly provided that its bandwidth meets certain requirements
(e.g., a base band signal with bandwidth less than the Nyquist’s frequency).
3 List the types of Digital to Analog Converters?
Ans: The most common types of electronic Digital to Analog Converter are:
Pulse width modulator
Over sampling DAC or interpolating DAC
Binary weighted DAC
R-2R ladder DAC
4 What are the important characteristics of DAC?
Ans: The most important characteristics of these devices are
Resolution
Maximum sampling frequency
Monotonicity
Dynamic range
5 How weighted resistor D/A Converter is constructed?
Ans: The simplest D/A converter is obtained by means of a summing circuit
with input resistances whose value depends on the bit weight that are associated
to.
6 What is the advantage of R-2R ladder DAC?
Ans: It uses two types of resistors which provide a ladder network.

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Warranty
1. We guarantee this product against all manufacturing defects for 24 months from
the date of sale by us or through our dealers.
2. The guarantee will become void, if
a. The product is not operated as per the instruction given in the Learning
Material.
b. The agreed payment terms and other conditions of sale are not followed.
c. The customer resells the instrument to another party.
d. Any attempt is made to service and modify the instrument.
3. The non-working of the product is to be communicated to us immediately giving
full details of the complaints and defects noticed specifically mentioning the
type, serial number of the product and date of purchase etc.
4. The repair work will be carried out, provided the product is dispatched securely
packed and insured. The transportation charges shall be borne by the customer.
Hope you enjoyed the Scientech Experience.

List of Contents
1. Patch Cord 16” ....................................................................................... 17 Nos.
2. Mains Cord. ........................................................................................... 1 No.
3. TechBook Power Supply......................................................................... 1 No

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