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Final Lesson Plan For Computer System Architechtures
Final Lesson Plan For Computer System Architechtures
COURSE 1. To enable the student to know the basic concept of the software
OBJECTIVE engineering discipline, its evolution, impact and emergence of
S: software engineering and explain the development and use of
different software life cycle models for real-life industrial applications.
2. To enable the student to study different aspects of software project
management, risk management and configuration management and
explain various requirement elicitation, analysis and specification
techniques.
COURSE OUTCOME:
CO 1 The learner should be able to Understand the minimum requirements for the
development of application
CO2 The learner should be able to Know about the basic Software life cycle
CO 3 The learner should be able to develop, maintain, efficient, reliable and cost effective
software solutions
CO 4 The learner should be able to evaluate assumptions and arguments by using variant
software architectural styles & software process model
CO 5 The learner should be able to Understand software testing approaches such as unit
testing and integration testing
CO 6 The learner should be able to plan and analyze how to ensure good quality software .
Sl. No. Date Topics to be covered 60 Min Mode Link COs
propose Class of s
d Distrib Teachin
ution g
L ICT IM
M
Module – I Introduction)
1 30 30 GB CO-
Introduction
1
2 Review of basic computer GB CO-
architecture 2
3 Tutorial
class
4 Quantitative techniques in PPT CO-
computer design, 2
5 GB CO-
Measuring performance. 2
6 PPT CO-
reporting performance
2
7 Revision and question answer GB CO-
discussion(BPUT & Interview 2
Module – II ( Pipelining )
8 GB CO-
Basic concepts 2
15 PPT CO-
Exception handling 2
16 CO-
Pipeline optimization
2
17 Revision and question answer
discussion(BPUT & Interview
18 Revision and question answer
discussion(BPUT & Interview
Module – III( Hierarchical memory technology )
19 GB CO-
Inclusion, Coherence and locality 3
properties,
20 GB CO-
Cache memory organizations 3
21 Techniques for reducing cache PPT CO-
misses 3
22 Virtual memory organization, PPT CO-
3
23 Mapping and Management GB CO-
techniques 3
24 PPT CO-
Tutorial class 3
25 PPT CO-
3
Memory replacement policies
26 Revision and question answer GB CO-
discussion(BPUT & Interview 3
27 Revision and question answer PPT CO-
discussion(BPUT & Interview 3
MODULE- IV ( Instruction-level Parallelism )
28 GB CO-
(08 Hours) 4
Basic
concept of
ILP
29 GB CO-
Techniques for increasing ILP, 4
30 GB CO-
Superscalar 6
31 Super pipelined and VLIW PPT CO-
Processor 6
32 PPT CO-
Array and Vector processors 6
33 Revision and question answer
discussion(BPUT & Interview
34 Revision and question answer
discussion(BPUT & Interview
35
MODULE- V ( Multiprocessor architecture )
39
(08 Hours)
Taxonomy
of Parallel
Architectur
es,
40 Centralized shared- memory
architecture
41 Synchronization,
42 Memory consistency,
43 Interconnection networks
44 Distributed shared memory
architecture
45 Cluster computers
46 Revision and question answer
discussion(BPUT & Interview
47 Revision and question answer
discussion(BPUT & Interview
NOTE:
GB:-GREEN BOARD