Professional Documents
Culture Documents
11 Tiva C Parte 2 Merged
11 Tiva C Parte 2 Merged
Parte 2
Punteros
• Definición
unsigned int * nombrepuntero;
• Asignarle dirección
nombrepuntero = (int *) 0x2000000U;
• Darle valor
*nombrepuntero = 0x20U;
Preprocesadores
#define clock_register (*((unsigned int*) 0x4000u))
Variables con ancho específico
• Incluir librería estándar C99 stdint.h
#include <stdint.h>
4.
Banco de Registros R0
R1
• 16 Registros: R2
• 13 Registros de propósito general LR
R3
• 3 Registros de funciones especiales R4
• Registros (R0 – R12) pueden contener datos o GPR R5
direcciones.
R6
• R13 es el Stack Pointer (SP)
R7
• R14 es el Link Register (LR)
R8
• R15 es el Program Counter (PC) R9 HR
R10
• Existen otros registros de funciones especiales: R11
• PSR (APSR, EPSR, IPSR) Program Status Register
R12
• PRIMASK
• FAULTMASK Exception Mask Register SFR R13 SP
• BASEPRI R14 LR
• CONTROL Control Register
R15 PC
Development Tools para la
Tiva C
Development Tools for Tiva C Series MCUs
30-day full 32KB code size 32KB code size Full function.
Eval Kit License function. limited. limited. Onboard emulation
Upgradeable Upgradeable Upgradeable limited
99 USD
personal MDK-Basic (256
Full Upgrade edition / 2800 2700 USD KB) = €2000 (2895 445 USD
USD full USD)
support
JTAG Debugger J-Link, 299 USD U-Link, 199 USD XDS100, 79 USD
TI SW Ecosystem …
Formas de Programar
TivaWare™ for C Series Features
Peripheral Driver Library
High-level API interface to complete peripheral set
License & royalty free use for TI Cortex-M parts
Available as object library and as source code
Programmed into the on-chip ROM
Ethernet
lwip and uip stacks with 1588 PTP modifications
Extensive examples
Graphics Library Sensor Library
Graphics primitive and widgets An interrupt driven I2C master driver for
handling I2C transfers
153 fonts plus Asian and Cyrillic
A set of drivers for I2C connected sensors
Graphics utility tools
A set of routines for common sensor operations
Three layers: Transport, Sensor and
Processing
ISP Options...
CMSIS Cortex Microcontroller Software
Interface Standard
• La ventaja de utilizar CMSIS, es que es adaptable a cualquier
microcontrolador ARM.
• Documentación
• Directorio de instalación de Keil
C:\Keil_v5\ARM\PACK\ARM\CMSIS\5.4.0\CMSIS\Documentation\index.html
Fuentes de Reloj
Fundamental Clock Sources
SysClk Sources...
System (CPU) Clock Sources
The CPU can be driven by any of the fundamental clocks …
Internal 16 MHz
Main
Internal 30 kHz
External Real-Time
- Plus -
The internal PLL (400 MHz) (La TivaC puede operar a máximo 80MHz)
The internal 16MHz oscillator divided by four (4MHz ± 3%)
Clock Tree...
Tiva C Series Clock Tree
Pág. 222 Datasheet
Se utilizará un prescaler de 5
Se utilizará el PLL
Estará utilizando un reloj
externo de 16 MHz
Se asignará este reloj al
sistema
Configuración TivaWare Pág. 493
489
16 MHz
5 40 MHz
- Configurar pines
Pin Mux Utility
Allows the user to graphically configure the device pin-out
Generates source and header files for use with any of the supported IDE’s
- Cuenta en www.dev.ti.com
http://www.ti.com/tool/tm4c_pinmux
Masking...
Advanced Peripheral Bus (APB) vs Advanced High-
Performance Bus (AHB)
Lab...
Configuración de periféricos
Antes de llamar a cualquier función de la librería
Driverlib es necesario habilitar el reloj para ese
periférico. Si no se hace de esta forma tendremos una
interrupción de Fault ISR.
Enable ADC
Enable GPIO
Enable UART
Config ADC
Config GPIO
Config UART
Ejemplo de configuración Pág. 275
273
SysCtlPeripheralEnable(SYSCTL_
PERIPH_GPIOF); (Pág. 509)
GPIOPinTypeGPIOOutput(GPIO_P
ORTF_BASE, GPIO_PIN_1 |
GPIO_PIN_2 | GPIO_PIN_3);
(Pág. 275)
TivaWare
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1);
CMSIS** C**
SYSCTL->RCGCGPIO = R5; SYSCTL_RCGCGPIO_R |= R5;
GPIOF->DIR |= PF1; GPIO_PORTF_DIR_R |= PF1;
GPIOF->DEN |= PF1; GPIO_PORTF_DEN_R |= PF1;
GPIO_PORTF_DIR_R
GPIO_PORTF_DEN_R
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3);
Ejemplo de escritura en el puerto Pág. 287
285
TivaWare
Encendido
GPIOPinWrite(GPIO_PORTF_BAS
E, GPIO_PIN_1, GPIO_PIN1);
Apagado
GPIOPinWrite(GPIO_PORTF_BAS
E, GPIO_PIN_1, 0X00);
CMSIS**
Encendido
C**
GPIOF->DATA |= PF1; Encendido
GPIO_PORTF_DATA_R|= PF1;
Apagado
GPIOF->DATA &= ~ PF1; Apagado
GPIO_PORTF_DATA_R &= ~ PF1;
** Se definió lo siguiente: #define PF1 (1U << 1)
Tiva C TM4C123G
Timers
Timer vs. Contador
• Es el pulso de reloj para que incrementen
• Los usos de los timers:
• Crear delays
• Contar eventos
• Medir tiempo entre eventos
Timers
16,000,000 = 1,000 mS
1mS = 16,000
n n
0 0
Tamaño de Timer en segundos
16 MHz = 16,000,000 ciclos
• 16 bits = 2^16 = 65,536
65536 x 1 / 16 MHz = 65,536 x ( 6.25x1E-8 ) = 4.096 x1E-3 = 4.096 mSeg
IRQ2
PUS PO PUS
Typical processor ISR 1 ISR 2 POP
H P H
Tail-chaining
PUS PO
Cortex-M4 ISR 1 ISR 2
Interrupt handling in H P
HW 12 6 12
Cycles Cycles Cycles
Pre-emption …
Interrupt Latency – Pre-emption
Highest
Priority IRQ1
IRQ2
PO PO
Cortex-M4 ISR 1 ISR 2
P P
1- 6 12
12 Cycles
Cycles Cycles
Late arrival...
Interrupt Latency – Late Arrival
Highest IRQ1
Priority
IRQ2
PUS PO
Cortex-M4 ISR 1 ISR 2
H P
6 12
Cycles Cycles
Interrupt handling...
®
Cortex-M4 Interrupt Handling
Interrupt handling is automatic. No instruction overhead.
Entry
• Automatically pushes registers R0–R3, R12, LR, PSR, and PC onto the stack
• In parallel, ISR is pre-fetched on the instruction bus. ISR ready to start
executing as soon as stack PUSH complete
Exit
• Processor state is automatically restored from the stack
• In parallel, interrupted instruction is pre-fetched ready for execution upon
completion of stack POP
Exception types...
®
Cortex-M4 Exception Types (pg. 103)
Vector Exception Priority Vector Descriptions
Number Type address
1 Reset -3 0x04 Reset
2 NMI -2 0x08 Non-Maskable Interrupt
3 Hard Fault -1 0x0C Error during exception processing
4 Memory Programmable 0x10 MPU violation
Management
Fault
5 Bus Fault Programmable 0x14 Bus error (Prefetch or data abort)
6 Usage Fault Programmable 0x18 Exceptions due to program errors
7-10 Reserved - 0x1C - 0x28
11 SVCall Programmable 0x2C SVC instruction
12 Debug Monitor Programmable 0x30 Exception for debug
13 Reserved - 0x34
14 PendSV Programmable 0x38
15 SysTick Programmable 0x3C System Tick Timer
16 and above Interrupts Programmable 0x40 External interrupts (Peripherals)
Vector
Table...
Tabla 2-9. Interrupts Pg. 104
Tiva C TM4C123G
UART
UART Features (Pg. 893)
• 8 módulos UART
• Separate 16x8 bit transmit and receive FIFOs
• Generador de Baudrate programable (hasta 5Mbps o 10Mbps)
• Auto generation and stripping of start, stop, and parity bits
• Line break generation and detection
• Programmable serial interface
• 5, 6, 7, or 8 data bits
• even, odd, stick, or no parity bits
• 1 or 2 stop bits
• baud rate generation, from DC to processor clock/16
• Soporte 9 bits
Block Diagram...
Block Diagram
Basic Operation...
Puertos (Pg. 1351)
Módulo TX RX
UART0 PA1 PA0
UART1 PB1 PB0
UART2 PD7 PD6
UART3 PC7 PC6
UART4 PC5 PC4
UART5 PE5 PE4
UART6 PD5 PD4
UART7 PE1 PE0
Operación Básica (Tivaware)
• Configuración
1. Enable the UART peripheral, e.g.
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
2. Set the Rx/Tx pins as UART pins
GPIOPinConfigure(GPIO_PA0_U0RX);
GPIOPinConfigure(GPIO_PA1_U0TX);
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
3. Configure the UART baud rate, data configuration
ROM_UARTConfigSetExpClk(UART0_BASE, ROM_SysCtlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
4. Configure other UART features (e.g. interrupts, FIFO)
• Listos para mandar o recibir
• Single register used for transmit/receive
• Blocking/non-blocking functions in driverlib:
UARTCharPut(UART0_BASE, ‘a’);
newchar = UARTCharGet(UART0_BASE);
UARTCharPutNonBlocking(UART0_BASE, ‘a’);
newchar = UARTCharGetNonBlocking(UART0_BASE);
Interrupts...
UART Interrupts
Single interrupt per module, cleared automatically
Interrupt conditions:
• Overrun error
• Break error
• Parity error
• Framing error
• Receive timeout – when FIFO is not empty and no further data is received over a 32-bit period
• Transmit – generated when no data present
• Receive – generated when character is received
Interrupts on these conditions can be enabled individually
Your handler code must check to determine the source
of the UART interrupt and clear the flag(s)
Cálculo Baudrate (Pg. 896)
• Utilizamos la siguiente ecuación
Donde:
• UARTSysClk : es el reloj del sistema
• CLKDiv: Puede ser 8 o 16 según la opción que tengamos configurada
según el bit HSE Si
HSE : 0 ClkDiv :16
• Tenemos dos registros que componen BRD = BRDI + BRDF HSE : 1 ClkDiv : 8
Ejemplo Cálculo Baudrate (Pg. 896)
Escribir
1. Revisar que la bandera TXFF del registro UARTFR Pg. 911 este en 0
2. Cargar el dato a escribir en el registro de datos UARTDR