‘Modern Digital Electronics 24 The weights assigned im an Shit hinary number to LSR and MSR. are and, respectively. 2.5 The MSB ofa signed-binary number indicates its, 2.6 2's complement of a 2's complement is 2.7. The number of bits required to represent 25 in BCD is, 2.8 The Excess-3 code for decimal number 8 is, 2.9 The number of bits in ASCII code is, 2.10 The number of characters represented by ASCII code is. 2.11 The parity of 01110010 is, . 2.12 The minimum distance required for a code to be error detecting code is, 2.13 A minimum distance of. is required for a code to be error correcting code. 2.14 The process of subtraction gets converted into that of addition by using 215 Gray code is a (weighted/non-weighted) 2.16 The distance between the code words 10010 and 10101 is, 2.17 A single parity bt attached to 8421 code makes its minimum distance 2.18 Aminimum of parity bits are required for generating Hamming code for 8421 code. 2.19 The number of parity bits required for generating Hamming code for ASCII code is 2.20. In 7-bit Hamming code for BCD, the parity bits are at locations. 2.21 The minimum distance of ASCII code changes from to in its Hamming code. PROBLEMS 2.1 Determine the decimal numbers represented by the following binary numbers: (a) 111001 (© mmo (©) 101.0011 (s) 0.11100 (b) 101001 (@) 1100100 ( 1010.1010 2.2. Determine the binary numbers represented by the following decimal numbers () 37 © 15 (©) 11.75 (b) 255 (@) 2625 © 0.1 2.3. Add the following groups of binary numbers 1011 1o10.1101 © Sor © sto101 24 Perform the following subtractions using 2's complement method: (a) 01000-01001 (b) 01100-00011 (¢) 001.1001 ~ 0001.1110 28 Convert the following numbers from decimal to octal and then to binary. Compare the binary numbers ‘obtained with the binary numbers obtained directly from the decimal numbers. (a) 375 (by 249 (©) 27.125 2.6 Convert the following binary numbers to octal and then to decimal. Compare the decimal numbers ‘obtained with the decimal numbers obtained directly from the binary numbers. (a) 11011100,101010 (b) 01010011.010101 (¢) 101100112 28 29 240 211 212 243 2Ad 245 216 247 248 219 2.20 221 222 223 224 225 2.26 ‘Number Systems and Codes ‘Convert the decimal numbers in Problem 2.5 to hexadecimal and then to binary. Compare the binary ‘numbers obtained with the binary numbers obtained directly from the decimal numbers. Convert the binary numbers in Problem 2.6 to hexadecimal and then to decimal, Compare the decimal numbers obtained with the decimal numbers obtained directly from the binary numbers. Encode the following decimal numbers in BCD code: (a) 46 (b) 327.89, (©) 20.305 Encode the decimal numbers in Problem 2.9 to Excess-3 code. Encode the decimal number 46 to Gray code. Use the 6-bit intemal code to represent the statement, P=3°0 Write your full name in (@) ASCII code (b) EBCDIC code (¢) 6-bit intemal code Include blanks wherever necessary. Attach an even parity bit as MSB for (@) ASCH code (b) EBCDIC code Repeat Problem 2.14 for odd parity. Find the number of bits required to encode: (a) 56 elements of information (b) 130 elements of information Write 8-bit ASCH code (parity and 7-bit code) obtained in Problems 2.14 and 2.15 in hexadecimal format. Develop the binary subtraction rules using one’s complement representation for negative numbers. How many bits of memory are required for storing 100 names of a group of people, assuming that no name occupies more than 20 characters (including spaces)? Assume 7-bit ASCII code with parity bit. A line printer 1s capable ot printing 132 characters m a single line and each characteris represented by ASCII code. How many bits are required to print each line? How many words can be added to code A, in Example 2.44, without changing its error-detection and correction capabilities? Give a possible set of such words. Is this set unique? Find the number and positions of parity bits to be added to construct Hamming code for an 8-bit data word, Determine Hamming code sequence with odd parity for natural BCD for making it an error correcting code. For ASCII code words 1010010 and 1010000 (a) determine the distance between them. (©) Detorminc Hamming code words and distance between them. Construct Hamming codes for the following 8-bits words (@ 10101010 () 00000000 @ ui For some 8-bit data words, the following Hamming code words are received. Determine the correct, data words, Assume even parity check. (@) 000011101010 (b) 101110000110 (¢) 101111110100228 ‘Modern Digital Electronics PROBLEMS 5.1 A staircase light is controlled by two switches, one at the top of the stairs and another atthe bottom of stairs (a) Make a truth table for this system, (b) Write the logic equation in SOP form. (©) Realise the circuit using AND-OR gates. (@) Realise the circuit using NAND gates only. 5.2. Given the logic equation f= ABC +BCD+ABC (@) Make a truth table (©) Simplify using K-map, (6) Realise Fusing NAND gates ony. 3 For the truth table given in Table 5.28 (a) Write logie equations for f, and f, in POS form, (©) Use K-map for minimisation and obtain the minimised expressions. (6) Realise these using OR-AND gates, (@) Realise these using only NOR gates. (©) Compare the IC packages required in pats (c) and (A). Table 5:28 Truth Table for Problem 5.3 Inputs Outputs Lf ee eee ea eee fe lore ee cre ela ease ee soe eo coals eeorseeessessoeels SA_ (a) Realise Bq, (5.24) using only NAND gates.3s 56 87 58 589 5.10 Sal 52 5.3 sas ss 5.16 87 5.18 5.19 5.20 Combinational Logic Design (©) Realise Eq, (5.27) using only HOR gates. () Compare the IC packages required in parts (a) and (b). See Table 1.11 for IC packages. (a) Realise Eq, (5.25) using minimum number of available NAND gate ICs (©) Realise Eq. (5.28) using minimum number of available NOR gate ICs. (©) Compare the IC packages required in parts (a) and (b). Realise Eq. (5.31) using minimum number of available NOR gate chips. (@) Make a K-map for the function Se AB+ AC + C+ AD + ABC+ ABC (6) Express fin canonical SOP form. (©) Minimise it and realise the minimised expression using NAND gates only. ‘Minimise the following functions and realise using minimum number of gates. (a) f,=2m (0,3, 5, 6,9, 10, 12, 15) () p= 2m (0,1, 2,3, 11, 12, 14, 15) Design a BCD-to-Excess-3-code converter using minimum number of NAND gates. Design a Excess-3-to-BCD-code converter using minimum number of NAND gates. Minimise the following expressions using K-maps and realise using NOR gates only (2) f,(4. 8, G, D)= ILM, 2, 3, 5,6, 7,9, 10, LL 13, 14, 19) ©) £4.B,C D)=TM (1 4, 6,9, 10, 11, 14, 15) (©) £,B, C, D)= MQ 7,8, 9, 10, 12) ‘Minimise the following expressions using K-maps and realise with NAND gates. ‘,(4, B. C, D, E)=Em (8, 9, 10, 11, 13, 15, 16, 18, 21, 24, 25, 26,27, 30, 31) F(A. B, C.D, E)=T1M (6, 9,11, 13, 14, 17,20, 25, 28, 29, 30) Realise the logic function of Truth Table 5.10 using minimum number of NAND gates (@) assuming 0's forall the don't-care conditions. (©) assuming a0 or | forthe don’t-care conditions leading toa simpler expression. (©) comment on the effect of don’t-care conditions on the hardware requirement, “Minimise the following logic functions and realise using NAND/NOR gates. ©) fA. B,C, D)=E m(1,3, 58,9, 11, 15) +dQ, 13) (6) f,(4. B, C, D)=11M(, 2, 3,8, 9, 10, 11, 14) (7, 15) Realise the following expressions using EX-OR and EX-NOR gates. (@) f,=4BCD + ABCD + ABCD + ABCD () fp ABC | ABCs ACD + ACD (©) ABCD + ABCD + ABCD + ABCD Design a parity generator to generate an odd parity bit for a 4-bit word. Use EX-OR and EXOR ates. ‘Repeat Prob, 5.16 for an even parity bit. Simplify the following logic expressions and realise using NAND/WOR gates. (2) fA. B, CD, EF) =Em(6, 9,13, 18, 19, 25,27, 29, 41, 45, 57, 61) () (A.B CD. E, F)=TIMA, 5, 6, 7, 8, 12, 13, 16, 17, 18, 19, 2, 22, 25, 28, 32, 35, 37, 38, 39, 40), Design a full adder circuit using two half-adders. Use (@) Block diagram of half-adder. (©) Cicuit of Fig. 5.19 for half-adder. For the full-adder eircut of Prob. 5.19(b) determine the propagation delay time for Sum output (S,) and carry output (C,) assuming the propagation delay time of gates assai 522 523 524 525 5.26 827 ‘Modern Digital Electronics EX-OR — 20ns AND 10ns oR 10ns and presence of data inputs 4,, B, and carry-in (C,,.) simultaneously. Realise the logic function in SOP form using Quine-McCluskey method AA, B,C, D)=TIM (2,7, 8, 9, 10, 12) ‘Minimise the logic function using Quine-McCluskey method fA, B,C, D)=Em(1, 3, 5,8,9, 11, 15) +d, 13) “Minimise the logic Function using Quine-MeCluskey method AA, B, C, D, E)=Em (8, 9,10, 11, 13, 15, 16, 18, 21, 24, 25, 26, 27, 30, 31) Will there be any hazard in the K-maps of Fig. 5.202. In each of the K-maps of Fig. 5.25, determine whether hazard occurs or not. In case hazard occurs, design the hazardless circuit. For the logic function $4, B,C.D) IM, 3, 4, 5,6, 7,8, 11, 12) (a) Design logic circuit with minimum number of NOR gates only. (b) Examine whether hazard is present in the circuit obtained in (a). Ifyes, what is the type of hazard present? (©) Design its hazardless circuit, Repeat Prob. 5.26(a),(b), and (c) for NAND only realisation