P441 Distance Relay Tech Manual

MiCOM
P441/P442/P444
Numerical Distance Protection
Version B1.2
Technical Manual
P44x/EN T/E33
Technical Guide P44x/EN T/E33
MiCOM P441/P442 & P444 Page 1/2
Numerical Distance Protection

MiCOM P44x
GENERAL CONTENT
Safety Section Px4xxEN SSA11
Introduction P44x/EN IT/E33
Hardware Description P44x/EN HW/E33
Application Guide P44x/EN AP/E33
Technical Data P44x/EN TD/E33
Installation P44x/EN IN/E33
Commissioning & Maintenance P44x/EN CM/E33
Commissioning Test & Record Sheet P44x/EN RS/E33
Connection Diagrams P44x/EN CO/E33
Relay Menu Database P44x/EN GC/E33
Menu Content Tables P44x/EN HI/E33
Version Compatibility P44x/EN VC/E33

P44x/EN T/E33 Technical Guide
Page 2/2 MiCOM P441/P442 & P444
BLANK PAGE
SAFETY SECTION Px4xx/EN SS/A11
SAFETY SECTION
Page 1/8
CONTENTS
1. HANDLING OF ELECTRONIC EQUIPMENT 3
2. SAFETY SECTION 4
3. INSTALLING, COMMISSIONING AND SERVICING 5
4. EQUIPMENT OPERATING CONDITIONS 6

4.1. Current transformer circuits 6
4.2. External resistors 6
4.3. Battery replacement 6
4.4. Insulation and dielectric strength testing 6
4.5. Insertion of modules and pcb cards 6
4.6. Fibre optic communication 6
5. DECOMMISSIONING AND DISPOSAL 7
6. TECHNICAL SPECIFICATIONS 7
Px4xx/EN SS/A11 SAFETY SECTION
Page 2/8
BLANK PAGE
Page 3/8
1. HANDLING OF ELECTRONIC EQUIPMENT

A person's normal movements can easily generate electrostatic potentials of several
thousand volts. Discharge of these voltages into semiconductor devices when
handling electronic circuits can cause serious damage, which often may not be
immediately apparent but the reliability of the circuit will have been reduced.
The electronic circuits of AREVA T&D EAI products are immune to the relevant levels
of electrostatic discharge when housed in their cases. Do not expose them to the risk
of damage by withdrawing modules unnecessarily.
Each module incorporates the highest practicable protection for its semiconductor
devices. However, if it becomes necessary to withdraw a module, the following
precautions should be taken to preserve the high reliability and long life for which the
equipment has been designed and manufactured.
1. Before removing a module, ensure that you are at the same electrostatic
potential as the equipment by touching the case.
2. Handle the module by its front-plate, frame, or edges of the printed circuit
board. Avoid touching the electronic components, printed circuit track or
connectors.
3. Do not pass the module to any person without first ensuring that you are both
at the same electrostatic potential. Shaking hands achieves equipotential.
4. Place the module on an antistatic surface, or on a conducting surface which is
at the same potential as yourself.
5. Store or transport the module in a conductive bag.
More information on safe working procedures for all electronic equipment can be
found in BS5783 and IEC 60147-0F.
If you are making measurements on the internat electronic circuitry of an equipment
in service, it is preferable that you are earthed to the case with a conductive wrist
strap.
Wrist straps should have a resistance to ground between 500k - 10M ohms. If a wrist
strap is not available, you should maintain regular contact with the case to prevent
the build up of static. Instrumentation which may be used for making measurements
should be earthed to the case whenever possible.
AREVA T&D EAI strongly recommends that detailed investigations on the electronic
circuitry, or modification work, should be carried out in a Special Handling Area such
as described in BS5783 or IEC 60147-0F.
Page 4/8
2. SAFETY SECTION
This Safety Section should be read before commencing any work on the
equipment.
Health and safety
The information in the Safety Section of the product documentation is intended to
ensure that products are properly installed and handled in order to maintain them in
a safe condition. It is assumed that everyone who will be associated with the
equipment will be familiar with the contents of the Safety Section.
Explanation of symbols and labels
The meaning of symbols and labels which may be used on the equipment or in the
product documentation, is given below.
!
Important: Important:
refer to the product documentation risk of electrocution
Protective/safety earth * Functional earth terminal*
NOTE: This symbol can also be used for a

protective/safety earth terminal if that
terminal is part of a terminal block or sub-
assembly eg. power supply.
*NOTE: The term earth used throughout the product documentation is

the direct equivalent of the North American term ground.
Page 5/8
3. INSTALLING, COMMISSIONING AND SERVICING

Equipment connections
Personnel undertaking installation, commissioning or servicing work on this
equipment should be aware of the correct working procedures to ensure safety. The
! product documentation should be consulted before installing, commissioning or

servicing the equipment.
Terminals exposed during installation, commissioning and maintenance may present
a hazardous voltage unless the equipment is electrically isolated.
If there is unlocked access to the rear of the equipment, care should be taken by all
personnel to avoid electric shock or energy hazards.
Voltage and current connections should be made using insulated crimp terminations
to ensure that terminal block insulation requirements are maintained for safety. To
ensure that wires are correctly terminated, the correct crimp terminal and tool for the
wire size should be used.
Before energising the equipment it must be earthed using the protective earth
terminal, or the appropriate termination of the supply plug in the case of plug
connected equipment. Omitting or disconnecting the equipment earth may cause a
safety hazard.
The recommended minimum earth wire size is 2.5 mm2, unless otherwise stated in
the technical data section of the product documentation.
Before energising the equipment, the following should be checked:
− Voltage rating and polarity;
− CT circuit rating and integrity of connections;
− Protective fuse rating;
− Integrity of earth connection (where applicable)
Page 6/8
4. EQUIPMENT OPERATING CONDITIONS

The equipment should be operated within the specified electrical and
environmental limits.
4.1. Current transformer circuits
Do not open the secondary circuit of a live CT since the high voltage produced may
be lethal to personnel and could damage insulation.
4.2. External resistors
Where external resistors are fitted to relays, these may present a risk of electric shock
or burns, if touched.
4.3. Battery replacement
Where internal batteries are fitted they should be replaced with the recommended
type and be installed with the correct polarity, to avoid possible damage to the
equipment.
4.4. Insulation and dielectric strength testing
Insulation testing may leave capacitors charged up to a hazardous voltage. At the
end of each part of the test, the voltage should be gradually reduced to zero, to
discharge capacitors, before the test leads are disconnected.
4.5. Insertion of modules and pcb cards
These must not be inserted into or withdrawn from equipment whilst it is energised,
since this may result in damage.
4.6. Fibre optic communication
Where fibre optic communication devices are fitted, these should not be viewed
directly. Optical power meters should be used to determine the operation or signal
level of the device.
Page 7/8
5. DECOMMISSIONING AND DISPOSAL

Decommissioning: The auxiliary supply circuit in the relay may include capacitors
across the supply or to earth. To avoid electric shock or
energy hazards, after completely isolating the supplies to the
relay (both poles of any do supply), the capacitors should be
safely discharged via the external terminals prior to
decommissioning.
Disposal: It is recommended that incineration and disposal to water
courses is avoided. The product should be disposed of in a
safe manner. Any products containing batteries should have
them removed before disposal, taking precautions to avoid
short circuits. Particular regulations within the country of
operation, may apply to the disposal of lithium batteries.
6. TECHNICAL SPECIFICATIONS
Protective fuse rating
The recommended maximum rating of the external protective fuse for this equipment
is 16A, Red Spot type or equivalent, unless otherwise stated in the technical data
section of the product documentation.
Insulation class: IEC 601010-1: 1990/A2: 1995 This equipment requires a

Class I protective (safety) earth
EN 61010-1: 1993/A2: 1995 connection to ensure user
Class I safety.
Installation IEC 601010-1: 1990/A2: 1995 Distribution level, fixed
Category Category III installation. Equipment in this
(Overvoltage): EN 61010-1: 1993/A2: 1995 category is qualification tested
Category III at 5kV peak, 1.2/50µs,
500Ω, 0.5J, between all
supply circuits and earth and
also between independent
circuits.
Environment: IEC 601010-1: 1990/A2: 1995 Compliance is demonstrated
Pollution degree 2 by reference to generic safety
EN 61010-1: 1993/A2: 1995 standards.
Pollution degree 2
Product safety: 73/23/EEC Compliance with the
European Commission Low
Voltage Directive.
EN 61010-1: 1993/A2: 1995 Compliance is demonstrated
EN 60950: 1992/A11: 1997 by reference to generic safety
standards.
Page 8/8
BLANK PAGE
MiCOM P441/P442 & P444
INTRODUCTION
MiCOM P441/P442 & P444 Page 1/24
CONTENT
1. INTRODUCTION TO MiCOM 3
2. INTRODUCTION TO MiCOM GUIDES 4
3. USER INTERFACES AND MENU STRUCTURE 5

3.1 Introduction to the relay 5
3.1.1 Front panel 5
3.1.2 Relay rear panel 6
3.2 Introduction to the user interfaces and settings options 9
3.3 Menu structure 10
3.3.1 Protection settings 11
3.3.2 Disturbance recorder settings 11
3.3.3 Control and support settings 11
3.4 Password protection 12
3.5 Relay configuration 12
3.6 Front panel user interface (keypad and LCD) 13
3.6.1 Default display and menu time-out 14
3.6.2 Menu navigation and setting browsing 14
3.6.3 Password entry 14
3.6.4 Reading and clearing of alarm messages and fault records 15
3.6.5 Setting changes 15
3.7 Front communication port user interface 16
3.8 Rear communication port user interface 18
3.8.1 Courier communication 18
3.8.2 Modbus communication 20
3.8.3 IEC 60870-5 CS 103 communication 21
3.8.4 DNP 3.0 Communication 22
3.9 Second rear Communication Port 23
P44x/EN IT/E33 Introduction
Page 2/24 MiCOM P441/P442 & P444
BLANK PAGE
MiCOM P441/P442 & P444 Page 3/24
1. INTRODUCTION TO MiCOM
MiCOM is a comprehensive solution capable of meeting all electricity supply requirements. It
comprises a range of components, systems and services from AREVA T&D Protection and
Control.
Central to the MiCOM concept is flexibility.
MiCOM provides the ability to define an application solution and, through extensive
communication capabilities, to integrate it with your power supply control system.
The components within MiCOM are:
• P range protection relays;
• C range control products;
• M range measurement products for accurate metering and monitoring;
• S range versatile PC support and substation control packages.

MiCOM products include extensive facilities for recording information on the state and
behaviour of the power system using disturbance and fault records. They can also provide
measurements of the system at regular intervals to a control centre enabling remote
monitoring and control to take place.
For up-to-date information on any MiCOM product, visit our website:
www.areva-td.com
Page 4/24 MiCOM P441/P442 & P444
2. INTRODUCTION TO MiCOM GUIDES

The guides provide a functional and technical description of the MiCOM protection relay and
a comprehensive set of instructions for the relay’s use and application.
The technical manual include the previous technical documentation, as follows:
Technical Guide, includes information on the application of the relay and a technical
description of its features. It is mainly intended for protection engineers concerned with the
selection and application of the relay for the protection of the power system.
Operation Guide, contains information on the installation and commissioning of the relay,
and also a section on fault finding. This volume is intended for site engineers who are
responsible for the installation, commissioning and maintenance of the relay.
The chapter content within the technical manual is summarised below:
Safety Guide
P44x/EN IT Introduction
A guide to the different user interfaces of the protection relay describing how
to start using the relay.
P44x/EN HW Relay Description
Overview of the operation of the relay’s hardware and software. This chapter
includes information on the self-checking features and diagnostics of the
relay.
P44x/EN AP Application Notes (includes a copy of publication P440/EN BR/Eb)
Comprehensive and detailed description of the features of the relay including
both the protection elements and the relay’s other functions such as event
and disturbance recording, fault location and programmable scheme logic.
This chapter includes a description of common power system applications of
the relay, calculation of suitable settings, some typical worked examples,
and how to apply the settings to the relay.
P44x/EN TD Technical Data
Technical data including setting ranges, accuracy limits,
recommendedoperating conditions, ratings and performance data.
Compliance with technical standards is quoted where appropriate.
P44x/EN IN Installation
Recommendations on unpacking, handling, inspection and storage of the
relay. A guide to the mechanical and electrical installation of the relay is
provided incorporating earthing recommendations.
P44x/EN CM Commissioning and Maintenance
Instructions on how to commission the relay, comprising checks on
thecalibration and functionality of the relay. A general maintenance policy for
the relay is outlined.
P44x/EN CO External Connection Diagrams
All external wiring connections to the relay.
P44x/EN GC Relay Menu Database
User interface/Courier/Modbus/IEC 60870-5-103/DNP 3.0
Listing of all of the settings contained within the relay together with a brief
description of each.
Default Programmable Scheme Logic
P44x/EN HI Menu Content Tables
P44x/EN VC Hardware / Software Version History and Compatibility
Repair Form
MiCOM P441/P442 & P444 Page 5/24
3. USER INTERFACES AND MENU STRUCTURE

The settings and functions of the MiCOM protection relay can be accessed both from the
front panel keypad and LCD, and via the front and rear communication ports. Information on
each of these methods is given in this section to describe how to get started using the relay.
3.1 Introduction to the relay
3.1.1 Front panel
The front panel of the relay is shown in figure 1, with the hinged covers at the top and bottom
of the relay shown open. Extra physical protection for the front panel can be provided by an
optional transparent front cover. With the cover in place read only access to the user
interface is possible. Removal of the cover does not compromise the environmental
withstand capability of the product, but allows access to the relay settings. When full access
to the relay keypad is required, for editing the settings, the transparent cover can be
unclipped and removed when the top and bottom covers are open. If the lower cover is
secured with a wire seal, this will need to be removed. Using the side flanges of the
transparent cover, pull the bottom edge away from the relay front panel until it is clear of the
seal tab.
The cover can then be moved vertically down to release the two fixing lugs from their
recesses in the front panel.
Serial N˚ and I*, V Ratings Top cover
Zn 1/5 A 50/60 Hz
SER N o Vx V
DIAG N o Vn V
LCD
TRIP
Fixed ALARM
function
OUT OF SERVICE
LEDs
HEALTHY
User programable
= CLEAR function LEDs
= READ
= ENTER
Keypad
SK 1 SK 2
Bottom
cover
Battery compartment Front comms port Download/monitor port
P0103ENa
FIGURE 1 - RELAY FRONT VIEW

Page 6/24 MiCOM P441/P442 & P444
The front panel of the relay includes the following, as indicated in figure 1:
• a 16-character by 2-line alphanumeric liquid crystal display (LCD).
• a 7-key keypad comprising 4 arrow keys ( !, ", # and $),

an enter key (%), a clear key (!), and a read key (&).
• 12 LEDs; 4 fixed function LEDs on the left hand side of the front panel and 8
programmable function LEDs on the right hand side.
Under the top hinged cover:
• the relay serial number, and the relay’s current and voltage rating information*.
Under the bottom hinged cover:
• battery compartment to hold the 1/2 AA size battery which is used for memory
back-up for the real time clock, event, fault and disturbance records.
• a 9-pin female D-type front port for communication with a PC locally to the relay (up to
15m distance) via an EIA(RS)232 serial data connection.
• a 25-pin female D-type port providing internal signal monitoring and high speed local
downloading of software and language text via a parallel data connection.
The fixed function LEDs on the left hand side of the front panel are used to indicate the
following conditions:
Trip (Red) indicates that the relay has issued a trip signal. It is reset when the associated
fault record is cleared from the front display. (Alternatively the trip LED can be configured to
be self-resetting)*.
Alarm (Yellow) flashes to indicate that the relay has registered an alarm. This may be
triggered by a fault, event or maintenance record. The LED will flash until the alarms have
been accepted (read), after which the LED will change to constant illumination, and will
extinguish when the alarms have been cleared.
Out of service (Yellow) indicates that the relay’s protection is unavailable.
Healthy (Green) indicates that the relay is in correct working order, and should be on at all
times. It will be extinguished if the relay’s self-test facilities indicate that there is an error with
the relay’s hardware or software. The state of the healthy LED is reflected by the watchdog
contact at the back of the relay.
3.1.2 Relay rear panel
The rear panel of the relay is shown in figure 2. All current and voltage signals, digital logic
input signals and output contacts are connected at the rear of the relay. Also connected at
the rear is the twisted pair wiring for the rear EIA(RS)485 communication port, the IRIG-B
time synchronising input and the optical fibre rear communication port which are both
optional.
MiCOM P441/P442 & P444 Page 7/24
Digital output (relays)

connections (Terminal blocks B & E)
A B C D E F
Power supply
connection
(Terminal
block F)
Rear comms
port (RS485)
Current and voltage Digital input

input terminals (Terminal block C) connections (Terminal block D)
P3023ENa
FIGURE 2A - RELAY REAR VIEW 40TE CASE
Optional IRIG-B board Digital output (relays) Power supply

(Terminal Block A) connections (Terminal blocks F & H) connection (TB J)
A C D E F G H J
B
IRIG -B
TX
RX
Optional fibre optic Current and voltage Digital input connections Rear comms port
connection input terminals (Terminal blocks D & E) (RS485) (TB J)
(Terminal block A) (Terminal block C) P3024ENa
FIGURE 2B - RELAY REAR VIEW 60 TE

Page 8/24 MiCOM P441/P442 & P444
Programmable Power supply

Optional
digital outputs (relays) connections connection
IRIG-B board (Terminal block N)
(Terminal blocks J, K, L & M)
A B C D E F G H J K L M N
1
1 2 3 19
2
3
3
3
3
4 5 6 20
4
4
4
5
5
IRIG-B
6
7 8 9 21
7
7
8
8
9
9
10 11 12 22
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
13
13
13
13
13 14 15 23
13
13
13
13
TX
RX
14
14
14
14
14
14
14
14
15
15
15
15
15
15
15
15
16 17 18 24
16
16
16
16
16
16
16
16
17
17
17
17
17
17
17
17
18
18
18
18
18
18
18
18
Optional fibre 1A/5A Programmable
optic connection Current and voltage digital input Rear comms port
IEC60870-5-103 input terminals connections (RS485)
(VDEW) (Terminal block C) (Terminal blocks D, E & F) P3025ENa
FIGURE 2C - RELAY REAR VIEW 80 TE

Refer to the wiring diagram in chapter P44x/EN CO for complete connection details.
(for 2nd rear port in model 42 or 44)
MiCOM P441/P442 & P444 Page 9/24
3.2 Introduction to the user interfaces and settings options

The relay has three user interfaces:
• the front panel user interface via the LCD and keypad.
• the front port which supports Courier communication.
• the rear port which supports one protocol of either Courier, Modbus,
IEC 60870-5-103 or DNP3.0. The protocol for the rear port must be specified when the
relay is ordered.
The measurement information and relay settings which can be accessed from the three
interfaces are summarised in Table 1.
Keypad Courier Modbus IEC870-5- DNP3.0

/LCD 103
Display & modification of all
settings
• • •
Digital I/O signal status
• • • • •
Display/extraction of
measurements
• • • • •
Display/extraction of fault records
• • •
Extraction of disturbance records
• •
Programmable scheme logic
settings
•
Reset of fault & alarm records
• • • • •
Clear event & fault records
• • • •
Time synchronisation
• • •
Control commands
• • • • •
TABLE 1
Page 10/24 MiCOM P441/P442 & P444
3.3 Menu structure

The relay’s menu is arranged in a tabular structure. Each setting in the menu is referred to
as a cell, and each cell in the menu may be accessed by reference to a row and column
address. The settings are arranged so that each column contains related settings, for
example all of the disturbance recorder settings are contained within the same column. As
shown in figure 3, the top row of each column contains the heading which describes the
settings contained within that column. Movement between the columns of the menu can only
be made at the column heading level. A complete list of all of the menu settings is given in
Appendix A of the manual.
Column header Up to 4 protection setting groups
System data View records Overcurrent Earth fault
Column
data
settings
Control & support Group 1

Repeated for Groups 2, 3, 4
P4003ENa
FIGURE 3 - MENU STRUCTURE

All of the settings in the menu fall into one of three categories: protection settings,
disturbance recorder settings, or control and support (C&S) settings. One of two different
methods is used to change a setting depending on which category the setting falls into.
Control and support settings are stored and used by the relay immediately after they are
entered. For either protection settings or disturbance recorder settings, the relay stores the
new setting values in a temporary ‘scratchpad’. It activates all the new settings together, but
only after it has been confirmed that the new settings are to be adopted. This technique is
employed to provide extra security, and so that several setting changes that are made within
a group of protection settings will all take effect at the same time.
MiCOM P441/P442 & P444 Page 11/24
3.3.1 Protection settings

The protection settings include the following items:
• protection element settings
• scheme logic settings
• auto-reclose and check synchronisation settings (where appropriate)*∗
• fault locator settings (where appropriate)*

There are four groups of protection settings, with each group containing the same setting
cells. One group of protection settings is selected as the active group, and is used by the
protection elements.
3.3.2 Disturbance recorder settings
The disturbance recorder settings include the record duration and trigger position, selection
of analogue and digital signals to record, and the signal sources that trigger the recording.
3.3.3 Control and support settings
The control and support settings include:
• relay configuration settings
• open/close circuit breaker*
• CT & VT ratio settings*
• reset LEDs
• active protection setting group
• password & language settings
• circuit breaker control & monitoring settings*
• communications settings
• measurement settings
• event & fault record settings
• user interface settings
• commissioning settings
∗
may vary according to relay type/model
Page 12/24 MiCOM P441/P442 & P444
3.4 Password protection

The menu structure contains three levels of access. The level of access that is enabled
determines which of the relay’s settings can be changed and is controlled by entry of two
different passwords. The levels of access are summarised in Table 2.
Access level Operations enabled

Level 0 Read access to all settings, alarms, event records
No password required and fault records
Level 1 As level 0 plus:
Password 1 or 2 Control commands, e.g.
circuit breaker open/close.
Reset of fault and alarm conditions.
Reset LEDs.
Clearing of event and fault records.
Level 2 Password 2 required
As level 1 plus:
All other settings.
TABLE 2
Each of the two passwords are 4 characters of upper case text. The factory default for both
passwords is AAAA. Each password is user-changeable once it has been correctly entered.
Entry of the password is achieved either by a prompt when a setting change is attempted, or
by moving to the ‘Password’ cell in the ‘System data’ column of the menu. The level of
access is independently enabled for each interface, that is to say if level 2 access is enabled
for the rear communication port, the front panel access will remain at level 0 unless the
relevant password is entered at the front panel. The access level enabled by the password
entry will time-out independently for each interface after a period of inactivity and revert to
the default level. If the passwords are lost an emergency password can be supplied - contact
AREVA with the relay’s serial number. The current level of access enabled for an interface
can be determined by examining the 'Access level' cell in the 'System data' column, the
access level for the front panel User Interface (UI), can also be found as one of the default
display options.
The relay is supplied with a default access level of 2, such that no password is required to
change any of the relay settings. It is also possible to set the default menu access level to
either level 0 or level1, preventing write access to the relay settings without the correct
password. The default menu access level is set in the ‘Password control’ cell which is found
in the ‘System data’ column of the menu (note that this setting can only be changed when
level 2 access is enabled).
3.5 Relay configuration
The relay is a multi-function device which supports numerous different protection, control
and communication features. In order to simplify the setting of the relay, there is a
configuration settings column which can be used to enable or disable many of the functions
of the relay. The settings associated with any function that is disabled are made invisible, i.e.
they are not shown in the menu. To disable a function change the relevant cell in the
‘Configuration’ column from ‘Enabled’ to ‘Disabled’.
The configuration column controls which of the four protection settings groups is selected as
active through the ‘Active settings’ cell. A protection setting group can also be disabled in the
configuration column, provided it is not the present active group. Similarly, a disabled setting
group cannot be set as the active group.
The column also allows all of the setting values in one group of protection settings to be
copied to another group.
To do this firstly set the ‘Copy from’ cell to the protection setting group to be copied, then set
the ‘Copy to’ cell to the protection group where the copy is to be placed. The copied settings
are initially placed in the temporary scratchpad, and will only be used by the relay following
confirmation.
MiCOM P441/P442 & P444 Page 13/24
To restore the default values to the settings in any protection settings group, set the ‘Restore
defaults’ cell to the relevant group number. Alternatively it is possible to set the ‘Restore
defaults’ cell to ‘All settings’ to restore the default values to all of the relay’s settings, not just
the protection groups’ settings. The default settings will initially be placed in the scratchpad
and will only be used by the relay after they have been confirmed. Note that restoring
defaults to all settings includes the rear communication port settings, which may result in
communication via the rear port being disrupted if the new (default) settings do not match
those of the master station.
3.6 Front panel user interface (keypad and LCD)
When the keypad is exposed it provides full access to the menu options of the relay, with the
information displayed on the LCD.
The ', (, ", # and $ keys which are used for menu navigation and setting value changes
include an auto-repeat function that comes into operation if any of these keys are held
continually pressed. This can be used to speed up both setting value changes and menu
navigation; the longer the key is held depressed, the faster the rate of change or movement
becomes.
System Other default displays

3-phase voltage
frequency
Alarm messages
Date and time

C
C
Column 1 Column 2 Column n

System data View records Group 4
Overcurrent
Data 1.1 Data 2.1 Data n.1

Language Last record I>1 function
C
Note: The C key will return
to column header
Data 1.2 Data 2.2 from any menu cell Data n.2
Password Time and date I>1 directional
Other setting Other setting Other setting

cells in cells in cells in
column 1 column 2 column n
Data 1.n Data 2.n Data n.n

Password C - A voltage
level 2
I> char angle
P0105ENa
FIGURE 4 - FRONT PANEL USER INTERFACE

Page 14/24 MiCOM P441/P442 & P444
3.6.1 Default display and menu time-out

The front panel menu has a selectable default display. The relay will time-out and return to
the default display and turn the LCD backlight off after 15 minutes of keypad inactivity. If this
happens any setting changes which have not been confirmed will be lost and the original
setting values maintained.
The contents of the default display can be selected from the following options: 3-phase and
neutral current, 3-phase voltage, power, system frequency, date and time, relay description,
or a user-defined plant reference*. The default display is selected with the ‘Default display’
cell of the ‘Measure’t setup’ column. Also, from the default display the different default
display options can be scrolled through using the ! and " keys. However the menu selected
default display will be restored following the menu time-out elapsing. Whenever there is an
uncleared alarm present in the relay (e.g. fault record, protection alarm, control alarm etc.)
the default display will be replaced by:
Alarms/Faults
Present
Entry to the menu structure of the relay is made from the default display and is not affected if
the display is showing the ‘Alarms/Faults present’ message.
3.6.2 Menu navigation and setting browsing
The menu can be browsed using the four arrow keys, following the structure shown in figure
4. Thus, starting at the default display the # key will display the first column heading. To
select the required column heading use the ( and " keys. The setting data contained in the
column can then be viewed by using the $ and # keys. It is possible to return to the column
header either by holding the [up arrow symbol] key down or by a single press of the clear key
!. It is only possible to move across columns at the column heading level. To return to the
default display press the # key or the clear key ! from any of the column headings. It is not
possible to go straight to the default display from within one of the column cells using the
auto-repeat facility of the # key, as the auto-repeat will stop at the column heading. To
move to the default display, the # key must be released and pressed again.
3.6.3 Password entry
When entry of a password is required the following prompt will appear:
Enter password
**** Level 1
NOTE: The password required to edit the setting is the prompt as shown
above
A flashing cursor will indicate which character field of the password may be changed. Press
the # and $ keys to vary each character between A and Z. To move between the
character fields of the password, use the ( and " keys. The password is confirmed by
pressing the enter key %. The display will revert to ‘Enter Password’ if an incorrect password
is entered. At this point a message will be displayed indicating whether a correct password
has been entered and if so what level of access has been unlocked. If this level is sufficient
to edit the selected setting then the display will return to the setting page to allow the edit to
continue. If the correct level of password has not been entered then the password prompt
page will be returned to. To escape from this prompt press the clear key !. Alternatively, the
password can be entered using the ‘Password’ cell of the ‘System data’ column.
For the front panel user interface the password protected access will revert to the default
access level after a keypad inactivity time-out of 15 minutes. It is possible to manually reset
the password protection to the default level by moving to the ‘Password’ menu cell in the
‘System data’ column and pressing the clear key ! instead of entering a password.
MiCOM P441/P442 & P444 Page 15/24
3.6.4 Reading and clearing of alarm messages and fault records

The presence of one or more alarm messages will be indicated by the default display and by
the yellow alarm LED flashing. The alarm messages can either be self-resetting or latched,
in which case they must be cleared manually. To view the alarm messages press the read
key &. When all alarms have been viewed, but not cleared, the alarm LED will change from
flashing to constant illumination and the latest fault record will be displayed (if there is one).
To scroll through the pages of this use the & key. When all pages of the fault record have
been viewed, the following prompt will appear:
Press clear to
reset alarms
To clear all alarm messages press !; to return to the alarms/faults present display and
leave the alarms uncleared, press &. Depending on the password configuration settings, it
may be necessary to enter a password before the alarm messages can be cleared (see
section on password entry). When the alarms have been cleared the yellow alarm LED will
extinguish, as will the red trip LED if it was illuminated following a trip.
Alternatively it is possible to accelerate the procedure, once the alarm viewer has been
entered using the & key, the ! key can be pressed, this will move the display straight to the
fault record. Pressing ! again will move straight to the alarm reset prompt where pressing
! once more will clear all alarms.
3.6.5 Setting changes
To change the value of a setting, first navigate the menu to display the relevant cell. To
change the cell value press the enter key % which will bring up a flashing cursor on the LCD
to indicate that the value can be changed. This will only happen if the appropriate password
has been entered, otherwise the prompt to enter a password will appear. The setting value
can then be changed by pressing the or " keys. If the setting to be changed is a binary value
or a text string, the required bit or character to be changed must first be selected using the
' and " keys. When the desired new value has been reached it is confirmed as the new
setting value by pressing %. Alternatively, the new value will be discarded either if the clear
button ! is pressed or if the menu time-out occurs.
For protection group settings and disturbance recorder settings, the changes must be
confirmed before they are used by the relay. To do this, when all required changes have
been entered, return to the column heading level and press the key. Prior to returning to the
default display the following prompt will be given:
Update settings?
Enter or clear
Pressing % will result in the new settings being adopted, pressing ! will cause the relay to
discard the newly entered values. It should be noted that, the setting values will also be
discarded if the menu time out occurs before the setting changes have been confirmed.
Control and support settings will be updated immediately after they are entered, without
‘Update settings?’ prompt.
Page 16/24 MiCOM P441/P442 & P444
3.7 Front communication port user interface

The front communication port is provided by a 9-pin female D-type connector located under
the bottom hinged cover. It provides EIA(RS)232 serial data communication and is intended
for use with a PC locally to the relay (up to 15m distance) as shown in figure 5. This port
supports the Courier communication protocol only. Courier is the communication language
developed by AREVA T&D Protection & Control to allow communication with its range of
protection relays. The front port is particularly designed for use with the relay settings
program MiCOM S1 which is a Windows 95/NT based software package.
MiCOM relay
Laptop
SK 2
25 pin
download/monitor port
9 pin
Battery front comms port Serial communication port
(COM 1 or COM 2)
Serial data connector
(up to 15m) P0107ENa
FIGURE 5 - FRONT PORT CONNECTION

The relay is a Data Communication Equipment (DCE) device. Thus the pin connections of
the relay’s 9-pin front port are as follows:
Pin no. 2 Tx Transmit data
Pin no. 3 Rx Receive data
Pin no. 5 0V Zero volts common
MiCOM P441/P442 & P444 Page 17/24
None of the other pins are connected in the relay. The relay should be connected to the
serial port of a PC, usually called COM1 or COM2. PCs are normally Data Terminal
Equipment (DTE) devices which have a serial port pin connection as below (if in doubt check
your PC manual):
25 Way 9 Way
Pin no. 3 2 Rx Receive data
Pin no. 2 3 Tx Transmit data
Pin no. 7 5 0V Zero volts common
For successful data communication, the Tx pin on the relay must be connected to the Rx pin
on the PC, and the Rx pin on the relay must be connected to the Tx pin on the PC, as shown
in figure 6. Therefore, providing that the PC is a DTE with pin connections as given above, a
‘straight through’ serial connector is required, i.e. one that connects pin 2 to pin 2, pin 3 to
pin 3, and pin 5 to pin 5. Note that a common cause of difficulty with serial data
communication is connecting Tx to Tx and Rx to Rx. This could happen if a ‘cross-over’
serial connector is used, i.e. one that connects pin 2 to pin 3, and pin 3 to pin 2, or if the PC
has the same pin configuration as the relay.
PC
MiCOM relay
DCE Serial data connector DTE

Pin 2 Tx Pin 2 Tx
Pin 3 Rx Pin 3 Rx
Pin 5 0V Pin 5 0V
Note: PC connection shown assuming 9 Way serial port

P0108ENa
FIGURE 6 - PC – RELAY SIGNAL CONNECTION

Having made the physical connection from the relay to the PC, the PC’s communication
settings must be configured to match those of the relay. The relay’s communication settings
for the front port are fixed as shown in the table below:
Protocol Courier
Baud rate 19,200 bits/s
Courier address 1
Message format 11 bit - 1 start bit, 8 data bits, 1 parity bit (even parity), 1 stop bit
The inactivity timer for the front port is set at 15 minutes. This controls how long the relay will
maintain its level of password access on the front port. If no messages are received on the
front port for 15 minutes then any password access level that has been enabled will be
revoked.
Page 18/24 MiCOM P441/P442 & P444
3.8 Rear communication port user interface

The rear port can support one of four communication protocols (Courier, Modbus, DNP3.0,
IEC 60870-5-103), the choice of which must be made when the relay is ordered. The rear
communication port is provided by a 3-terminal screw connector located on the back of the
relay. See Appendix B for details of the connection terminals. The rear port provides K-
Bus/EIA(RS)485 serial data communication and is intended for use with a permanently-wired
connection to a remote control centre. Of the three connections, two are for the signal
connection, and the other is for the earth shield of the cable. When the K-Bus option is
selected for the rear port, the two signal connections are not polarity conscious, however for
Modbus, IEC 60870-5-103 and DNP3.0 care must be taken to observe the correct polarity.
The protocol provided by the relay is indicated in the relay menu in the ‘Communications’
column. Using the keypad and LCD, firstly check that the ‘Comms settings’ cell in the
‘Configuration’ column is set to ‘Visible’, then move to the ‘Communications’ column. The
first cell down the column shows the communication protocol being used by the rear port.
3.8.1 Courier communication
Courier is the communication language developed by AREVA T&D Energy Automation &
Information to allow remote interrogation of its range of protection relays.
Courier works on a master/slave basis where the slave units contain information in the form
of a database, and respond with information from the database when it is requested by a
master unit.
The relay is a slave unit which is designed to be used with a Courier master unit such as
MiCOM S1, MiCOM S10, PAS&T or a SCADA system.
MiCOM S1 is a Windows NT4.0/95 compatible software package which is specifically
designed for setting changes with the relay.
To use the rear port to communicate with a PC-based master station using Courier, a KITZ
K-Bus to EIA(RS)232 protocol converter is required. This unit is available from AREVA T&D
Energy Automation & Information. A typical connection arrangement is shown in figure 7. For
more detailed information on other possible connection arrangements refer to the manual for
the Courier master station software and the manual for the KITZ protocol converter. Each
spur of the K-Bus twisted pair wiring can be up to 1000m in length and have up to 32 relays
connected to it.
MiCOM P441/P442 & P444 Page 19/24
Twisted pair 'K-Bus' RS485 communications link
MiCOM relay MiCOM relay MiCOM relay
RS232 K-Bus
PC
KITZ protocol
PC serial port converter
Modem
Public switched Courier master station

telephone network eg. substation control room
PC
Modem
Remote Courier master station

eg. area control center P0109ENa
FIGURE 7 - REMOTE COMMUNICATION CONNECTION ARRANGEMENTS

Having made the physical connection to the relay, the relay’s communication settings must
be configured. To do this use the keypad and LCD user interface.
In the relay menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is
set to ‘Visible’, then move to the ‘Communications’ column. Only two settings apply to the
rear port using Courier, the relay’s address and the inactivity timer. Synchronous
communication is used at a fixed baud rate of 64kbits/s.
Page 20/24 MiCOM P441/P442 & P444
Move down the ‘Communications’ column from the column heading to the first cell down
which indicates the communication protocol:
Protocol
Courier
The next cell down the column controls the address of the relay:
Remote address
1
Since up to 32 relays can be connected to one K-bus spur, as indicated in figure 7, it is

necessary for each relay to have a unique address so that messages from the master control
station are accepted by one relay only. Courier uses an integer number between 0 and 254
for the relay address which is set with this cell. It is important that no two relays have the
same Courier address. The Courier address is then used by the master station to
communicate with the relay.
The next cell down controls the inactivity timer:
Inactivity timer
10.00 mins
The inactivity timer controls how long the relay will wait without receiving any messages on
the rear port before it reverts to its default state, including revoking any password access
that was enabled. For the rear port this can be set between 1 and 30 minutes.
Note that protection and disturbance recorder settings that are modified using an on-line
editor such as PAS&T must be confirmed with a write to the ‘Save changes’ cell of the
‘Configuration’ column. Off-line editors such as MiCOM S1 do not require this action for the
setting changes to take effect.
3.8.2 Modbus communication
Modbus is a master/slave communication protocol which can be used for network control. In
a similar fashion to Courier, the system works by the master device initiating all actions and
the slave devices, (the relays), responding to the master by supplying the requested data or
by taking the requested action.
Modbus communication is achieved via a twisted pair connection to the rear port and can be
used over a distance of 1000m with up to 32 slave devices.
To use the rear port with Modbus communication, the relay’s communication settings must
be configured. To do this use the keypad and LCD user interface.
In the relay menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is
set to ‘Visible’, then move to the ‘Communications’ column.
Four settings apply to the rear port using Modbus which are described below. Move down
the ‘Communications’ column from the column heading to the first cell down which indicates
the communication protocol:
Protocol
Modbus
The next cell down controls the Modbus address of the relay:
Modbus address
23
Up to 32 relays can be connected to one Modbus spur, and therefore it is necessary for each
relay to have a unique address so that messages from the master control station are
accepted by one relay only. Modbus uses an integer number between 1 and 247 for the
relay address. It is important that no two relays have the same Modbus address. The
Modbus address is then used by the master station to communicate with the relay.
MiCOM P441/P442 & P444 Page 21/24
The next cell down controls the inactivity timer:
Inactivity timer
10.00 mins
The inactivity timer controls how long the relay will wait without receiving any messages on
The next cell down the column controls the baud rate to be used:
Baud rate
9600 bits/s
Modbus communication is asynchronous. Three baud rates are supported by the relay,
‘9600 bits/s’, ‘19200 bits/s’ and ‘38400 bits/s’. It is important that whatever baud rate is
selected on the relay is the same as that set on the Modbus master station.
The next cell down controls the parity format used in the data frames:
Parity
None
The parity can be set to be one of ‘None’, ‘Odd’ or ‘Even’. It is important that whatever parity
format is selected on the relay is the same as that set on the Modbus master station.
3.8.3 IEC 60870-5 CS 103 communication
The IEC specification IEC 60870-5-103: Telecontrol Equipment and Systems, Part 5:
Transmission Protocols Section 103 defines the use of standards IEC 60870-5-1 to
IEC 60870-5-5 to perform communication with protection equipment. The standard
configuration for the IEC 60870-5-103 protocol is to use a twisted pair connection over
distances up to 1000m. As an option for IEC 60870-5-103, the rear port can be specified to
use a fibre optic connection for direct connection to a master station. The relay operates as a
slave in the system, responding to commands from a master station. The method of
communication uses standardised messages which are based on the VDEW communication
protocol.
To use the rear port with IEC 60870-5-103 communication, the relay’s communication
settings must be configured. To do this use the keypad and LCD user interface. In the relay
menu firstly check that the ‘Comms settings’ cell in the ‘Configuration’ column is set to
‘Visible’, then move to the ‘Communications’ column. Four settings apply to the rear port
using IEC 60870-5-103 which are described below. Move down the ‘Communications’
column from the column heading to the first cell which indicates the communication protocol:
Protocol
IEC 60870-5-103
The next cell down controls the IEC 60870-5-103 address of the relay:
Remote address
162
Up to 32 relays can be connected to one IEC 60870-5-103 spur, and therefore it is

station are accepted by one relay only. IEC 60870-5-103 uses an integer number between 0
and 254 for the relay address. It is important that no two relays have the same
IEC 60870-5-103 address. The IEC 60870-5-103 address is then used by the master station
to communicate with the relay.
Page 22/24 MiCOM P441/P442 & P444
Baud rate
9600 bits/s
IEC 60870-5-103 communication is asynchronous. Two baud rates are supported by the
relay, ‘9600 bits/s’ and ‘19200 bits/s’. It is important that whatever baud rate is selected on
the relay is the same as that set on the IEC 60870-5-103 master station.
The next cell down controls the period between IEC 60870-5-103 measurements:
Measure’t period
30.00 s
The IEC 60870-5-103 protocol allows the relay to supply measurements at regular intervals.
The interval between measurements is controlled by this cell, and can be set between 1 and
60 seconds.
The next cell down the column controls the physical media used for the communication:
Physical link
EIA(RS)485
The default setting is to select the electrical EIA(RS)485 connection. If the optional fibre optic
connectors are fitted to the relay, then this setting can be changed to ‘Fibre optic’.
The next cell down can be used to define the primary function type for this interface, where
this is not explicitly defined for the application by the IEC 60870-5-103 protocol*.
Function type
226
3.8.4 DNP 3.0 Communication

The DNP 3.0 protocol is defined and administered by the DNP User Group. Information
about the user group, DNP 3.0 in general and protocol specifications can be found on their
website: www.dnp.org
The relay operates as a DNP 3.0 slave and supports subset level 2 of the protocol plus some
of the features from level 3. DNP 3.0 communication is achieved via a twisted pair
connection to the rear port and can be used over a distance of 1000m with up to 32 slave
devices.
To use the rear port with DNP 3.0 communication, the relay’s communication settings must
be configured. To do this use the keypad and LCD user interface. In the relay menu firstly
check that the ‘Comms setting’ cell in the ‘Configuration’ column is set to ‘Visible’, then move
to the ‘Communications’ column. Four settings apply to the rear port using DNP 3.0, which
are described below. Move down the ‘Communications’ column from the column heading to
the first cell which indicates the communications protocol:
Protocol
DNP 3.0
The next cell controls the DNP 3.0 address of the relay:
DNP 3.0 address

232
Upto 32 relays can be connected to one DNP 3.0 spur, and therefore it is necessary for each
relay to have a unique address so that messages from the master control station are
accepted by only one relay. DNP 3.0 uses a decimal number between 1 and 65519 for the
relay address. It is important that no two relays have the same DNP 3.0 address.
The DNP 3.0 address is then used by the master station to communicate with the relay.
MiCOM P441/P442 & P444 Page 23/24
Baud rate
9600 bits/s
DNP 3.0 communication is asynchronous. Six baud rates are supported by the relay
‘1200bits/s’, ‘2400bits/s’, ‘4800bits/s’, ’9600bits/s’, ‘19200bits/s’ and ‘38400bits/s’. It is
important that whatever baud rate is selected on the relay is the same as that set on the
DNP 3.0 master station.
The next cell down the column controls the parity format used in the data frames:
Parity
None
The parity can be set to be one of ‘None’, ‘Odd’ or ‘Even’. It is important that whatever parity
format is selected on the relay is the same as that set on the DNP 3.0 master station.
The next cell down the column sets the time synchronisation request from the master by the
relay:
Time Synch
Enabled
The time synch can be set to either enabled or disabled. If enabled it allows the DNP 3.0
master to synchronise the time.
3.9 Second rear Communication Port
For relays with Courier, Modbus, IEC60870-5-103 or DNP3 protocol on the first rear
communications port there is the hardware option of a second rear communications port,
(P442 and P444 only) which will run the Courier language. This can be used over one of
three physical links: twisted pair K-Bus (non polarity sensitive), twisted pair EIA(RS)485
(connection polarity sensitive) or EIA(RS)232.
The settings for this port are located immediately below the ones for the first port as
described in previous sections of this chapter. Move down the settings unit the following sub
heading is displayed.
REAR PORT2 (RP2)
The next cell down indicates the language, which is fixed at Courier for RP2.
RP2 Protocol
Courier
The next cell down indicates the status of the hardware, e.g.
RP2 Card Status

EIA232 OK
The next cell allows for selection of the port configuration.
RP2 Port Config

EIA232
The port can be configured for EIA(RS)232, EIA(RS)485 or K-Bus.

In the case of EIA(RS)232 and EIA(RS)485 the next cell selects the communication mode.
RP2 Comms Mode

IEC60870 FT1.2
Page 24/24 MiCOM P441/P442 & P444
The choice is either IEC60870 FT1.2 for normal operation with 11-bit modems, or 10-bit no
parity.
The next cell down controls the comms port address.
RP2 Address
255
Since up to 32 relays can be connected to one K-bus spur, as indicated in figure 7, it is

station are accepted by one relay only. Courier uses a integer number between 0 and 254
for the relay address which is set with this cell. It is important that no two relays have the
same Courier address. The Courier address is then use by the master station to
communicate with the relay.
The next cell down controls how long the relay will wait without receiving any massages on
In the case of EIA(RS)232 and EIA(RS)485 the next cell down controls the baud rate. For K-
Bus the baud rate is fixed at 64kbit/second between the relay and the KITZ interface at the
end of the relay spur.
RP2 Baud Rate

19200
Courier communications is asynchronous. Three baud rates are supported by the relay,
‘9600 bits/s’, ‘19200 bits/s’ and ‘38400 bits/s’.
Relay Description P44x/EN HW/E33
MiCOM P441/P442 & P444
RELAY DESCRIPTION
MiCOM P441/P442 & P444 Page 1/44
CONTENT
1. RELAY SYSTEM OVERVIEW 5

1.1 Hardware overview 5
1.1.1 Power supply module 5
1.1.2 Main processor board 5
1.1.3 Co-processor board 5
1.1.4 Input module 5
1.1.5 Input and output boards 5
1.1.6 IRIG-B board (P442 and P444 only) 5
1.2 Software overview 7
1.2.1 Real-time operating system 7
1.2.2 System services software 7
1.2.3 Platform software 7
1.2.4 Protection & control software 7
1.2.5 Disturbance Recorder 7
2. HARDWARE MODULES 8
2.1 Processor board 8
2.2 Co-processor board 8
2.3 Internal communication buses 8
2.4 Input module 9
2.4.1 Transformer board 9
2.4.2 Input board 9
2.4.3 Universal opto isolated logic inputs 9
2.5 Power supply module (including output relays) 10
2.5.1 Power supply board (including RS485 communication interface) 11
2.5.2 Output relay board 11
2.6 IRIG-B board (P442 and P444 only) 11
2.7 2nd rear communication and InterMiCOM teleprotection board (optional) 11
2.8 Mechanical layout 12
3. RELAY SOFTWARE 13
3.1 Real-time operating system 13
3.2 System services software 13
3.3 Platform software 14
3.3.1 Record logging 14
3.3.2 Settings database 14
3.3.3 Database interface 14
P44x/EN HW/E33 Relay Description
Page 2/44 MiCOM P441/P442 & P444
3.4 Protection and control software 14

3.4.1 Overview - protection and control scheduling 15
3.4.2 Signal processing 15
3.4.3 Programmable scheme logic 16
3.4.4 Event and Fault Recording 16
3.4.5 Disturbance recorder 16
3.4.6 Fault locator 16
4. DISTANCE ALGORITHMS 17
4.1 Distance and Resistance Measurement 17
4.1.1 Phase-to-earth loop impedance 19
4.1.2 Impedance measurement algorithms work with instantaneous values (current and voltage).20
4.1.3 Phase-to-phase loop impedance 20
4.2 "Deltas" Algorithms 21
4.2.1 Fault Modelling 21
4.2.2 Detecting a Transition 23
4.2.3 Confirmation 26
4.2.4 Directional Decision 26
4.2.5 Phase Selection 27
4.2.6 Summary 27
4.3 "Conventional" Algorithms 28
4.3.1 Convergence Analysis 29
4.3.2 Start-Up 29
4.3.3 Phase Selection 30
4.3.4 Directional Decision 31
4.3.5 Directional Decision during SOTF/TOR (Switch On To Fault/Trip On Reclose) 31
4.4 Faulted Zone Decision 32
4.5 Tripping Logic 33
4.6 Fault Locator 34
4.6.1 Selecting the fault location data 35
4.6.2 Processing algorithms 35
4.7 Power swing detection 36
4.7.1 Power swing detection 36
4.7.2 Line in one pole open condition (during single-pole trip) 37
4.7.3 Conditions for isolating lines 37
4.7.4 Tripping logic 37
4.7.5 Fault Detection after Single-phase Tripping (one-pole-open condition) 38
4.8 Double Circuit Lines 38
MiCOM P441/P442 & P444 Page 3/44
4.9 DEF Protection Against High Resistance Ground Faults 40

4.9.1 High Resistance Ground Fault Detection 40
4.9.2 Directional determination 40
4.9.3 Phase selection 40
4.9.4 Tripping Logic 41
4.9.5 SBEF – Stand-By earth fault (not communication-aided) 42
5. SELF TESTING & DIAGNOSTICS 43

5.1 Start-up self-testing 43
5.1.1 System boot 43
5.1.2 Initialisation software 43
5.1.3 Platform software initialisation & monitoring 44
5.2 Continuous self-testing 44
Page 4/44 MiCOM P441/P442 & P444
BLANK PAGE
MiCOM P441/P442 & P444 Page 5/44
1. RELAY SYSTEM OVERVIEW

1.1 Hardware overview
The relay hardware is based on a modular design whereby the relay is made up of several
modules which are drawn from a standard range. Some modules are essential while others
are optional depending on the user’s requirements.
The different modules that can be present in the relay are as follows:
1.1.1 Power supply module
The power supply module provides a power supply to all of the other modules in the relay, at
three different voltage levels. The power supply board also provides the RS485 electrical
connection for the rear communication port. On a second board the power supply module
contains relays which provide the output contacts.
1.1.2 Main processor board
The processor board performs most of the calculations for the relay (fixed and
programmable scheme logic, protection functions other than distance protection) and
controls the operation of all other modules within the relay. The processor board also
contains and controls the user interfaces (LCD, LEDs, keypad and communication
interfaces).
1.1.3 Co-processor board
The co-processor board manages the acquisition of analogue quantities, filters them and
calculates the thresholds used by the protection functions. It also processes the distance
algorithms.
1.1.4 Input module
The input module converts the information contained in the analogue and digital input signals
into a format suitable for the co-processor board. The standard input module consists of two
boards: a transformer board to provide electrical isolation and a main input board which
provides analogue to digital conversion and the isolated digital inputs.
1.1.5 Input and output boards
P441 P442 P444

Opto-inputs 8 x UNI(1) 16 x UNI(1) 24 x UNI(1)
Relay outputs 6 N/O 9 N/O 24 N/O
8 C/O 12 C/O 8 C/O
Universal voltage range opto inputs N/O – normally open

C/O – change over
1.1.6 IRIG-B board (P442 and P444 only)
This board, which is optional, can be used where an IRIG-B signal is available to provide an
accurate time reference for the relay. There is also an option on this board to specify a fibre
optic rear communication port, for use with IEC60870 communication only.
All modules are connected by a parallel data and address bus which allows the processor
board to send and receive information to and from the other modules as required. There is
also a separate serial data bus for conveying sample data from the input module to the
processor. figure 1 shows the modules of the relay and the flow of information between
them.
Page 6/44 MiCOM P441/P442 & P444
Present values CPU code & data,

Alarm, event, fault, Default settings &
of all setting
disturbance & parameters, language text,
settings database data
maintenance record software code
Battery Flash
backed-up E²PROM SRAM
EPROM
SRAM
Front LCD panel RS232 Front comms port
CPU
Parallel test port
LEDs Main processor board
Timing data
Comms between
IRIG-B signal main & coprocessor CPU code & data
IRIG-B board boards
optional
Fibre optic
rear comms
port optional
FPGA SRAM
CPU
Serial data bus
(sample data)
Coprocessor board
Power supply, rear comms

data, output relay status Parallel data bus
Digital input values
Output relay contacts (x14 or x21 or x32)
Digital inputs (x8 or x16 or x24)

Opto-isolated
Output relays
inputs
Relay board ADC Input board
Power supply (3 voltages),

rear comms data Analogue input signals
Power supply board Transformer board
Power Watchdog Field Rear RS485

Current & voltage inputs (6 to 8)
supply contacts voltage communication port
P3026ENb
FIGURE 1 - RELAY MODULES AND INFORMATION FLOW

MiCOM P441/P442 & P444 Page 7/44
1.2 Software overview

The software for the relay can be conceptually split into four elements: the real-time
operating system, the system services software, the platform software and the protection
and control software. These four elements are not distinguishable to the user, and are all
processed by the same processor board. The distinction between the four parts of the
software is made purely for the purpose of explanation here:
1.2.1 Real-time operating system
The real time operating system is used to provide a framework for the different parts of the
relay’s software to operate within. To this end the software is split into tasks. The real-time
operating system is responsible for scheduling the processing of these tasks such that they
are carried out in the time available and in the desired order of priority.
The operating system is also responsible for the exchange of information between tasks, in
the form of messages.
1.2.2 System services software
The system services software provides the low-level control of the relay hardware. For
example, the system services software controls the boot of the relay’s software from the non-
volatile flash EPROM memory at power-on, and provides driver software for the user
interface via the LCD and keypad, and via the serial communication ports. The system
services software provides an interface layer between the control of the relay’s hardware and
the rest of the relay software.
1.2.3 Platform software
The platform software deals with the management of the relay settings, the user interfaces
and logging of event, alarm, fault and maintenance records. All of the relay settings are
stored in a database within the relay which provides direct compatibility with Courier
communications. For all other interfaces (i.e. the front panel keypad and LCD interface,
Modbus and IEC60870-5-103) the platform software converts the information from the
database into the format required. The platform software notifies the protection & control
software of all setting changes and logs data as specified by the protection & control
software.
1.2.4 Protection & control software
The protection and control software performs the calculations for all of the protection
algorithms of the relay. This includes digital signal processing such as Fourier filtering and
ancillary tasks such as the measurements. The protection & control software interfaces with
the platform software for settings changes and logging of records, and with the system
services software for acquisition of sample data and access to output relays and digital opto-
isolated inputs.
1.2.5 Disturbance Recorder
The disturbance recorder software is passed the sampled analogue values and logic signals
from the protection and control software. This software compresses the data to allow a
greater number of records to be stored. The platform software interfaces to the disturbance
recorder to allow extraction of the stored records.
Page 8/44 MiCOM P441/P442 & P444
2. HARDWARE MODULES
The relay is based on a modular hardware design where each module performs a separate
function within the relay operation. This section describes the functional operation of the
various hardware modules.
2.1 Processor board
The relay is based around a TMS320C32 floating point, 32-bit digital signal processor (DSP)
operating at a clock frequency of 20MHz. This processor performs all of the calculations for
the relay, including the protection functions, control of the data communication and user
interfaces including the operation of the LCD, keypad and LEDs.
The processor board is located directly behind the relay’s front panel which allows the LCD
and LEDs to be mounted on the processor board along with the front panel communication
ports. These comprise the 9-pin D-connector for RS232 serial communications (e.g. using
MiCOM S1 and Courier communications) and the 25-pin D-connector relay test port for
parallel communication. All serial communication is handled using a two-channel 85C30
serial communications controller (SCC).
The memory provided on the main processor board is split into two categories, volatile and
non-volatile: the volatile memory is fast access (zero wait state) SRAM which is used for the
storage and execution of the processor software, and data storage as required during the
processor’s calculations. The non-volatile memory is sub-divided into 3 groups: 2MB of flash
memory for non-volatile storage of software code and text together with default settings,
256kB of battery backed-up SRAM for the storage of disturbance, event, fault and
maintenance record data and 32kB of E2PROM memory for the storage of configuration
data, including the present setting values.
2.2 Co-processor board
A second processor board is used in the relay for the processing of the current differential
protection algorithms. The processor used on the second board is the same as that used on
the main processor board. The second processor board has provision for fast access (zero
wait state) SRAM for use with both program and data memory storage. This memory can be
accessed by the main processor board via the parallel bus, and this route is used at power-
on to download the software for the second processor from the flash memory on the main
processor board. Further communication between the two processor boards is achieved via
interrupts and the shared SRAM. The serial bus carrying the sample data is also connected
to the co-processor board, using the processor’s built-in serial port, as on the main processor
board.
The co-processor board also handles all communication with the remote differential relay(s).
This is achieved via optical fibre communications and hence the co-processor board holds
the optical modules to transmit and receive data over the fibre links.
From software version B1.0, coprocessor board woks at 150Mhz.
2.3 Internal communication buses
The relay has two internal buses for the communication of data between different modules.
The main bus is a parallel link which is part of a 64-way ribbon cable. The ribbon cable
carries the data and address bus signals in addition to control signals and all power supply
lines. Operation of the bus is driven by the main processor board which operates as a
master while all other modules within the relay are slaves.
The second bus is a serial link which is used exclusively for communicating the digital
sample values from the input module to the main processor board. The DSP processor has a
built-in serial port which is used to read the sample data from the serial bus. The serial bus is
also carried on the 64-way ribbon cable.
MiCOM P441/P442 & P444 Page 9/44
2.4 Input module

The input module provides the interface between the relay processor board and the
analogue and digital signals coming into the relay. The input module consist of two PCBs;
the main input board and a transformer board. The P441, P442 and P444 relays provide
three voltage inputs and four current inputs. They also provide an additional voltage input for
the check sync function.
2.4.1 Transformer board
The transformer board holds up to four voltage transformers (VTs) and up to five current
transformers (CTs). The current inputs will accept either 1A or 5A nominal current (menu and
wiring options) and the nominal voltage input is 110V.
The transformers are used both to step-down the currents and voltages to levels appropriate
to the relay’s electronic circuitry and to provide effective isolation between the relay and the
power system. The connection arrangements of both the current and voltage transformer
secondaries provide differential input signals to the main input board to reduce noise.
2.4.2 Input board
The main input board is shown as a block diagram in figure 2. It provides the circuitry for the
digital input signals and the analogue-to-digital conversion for the analogue signals. Hence it
takes the differential analogue signals from the CTs and VTs on the transformer board(s),
converts these to digital samples and transmits the samples to the processor board via the
serial data bus. On the input board the analogue signals are passed through an anti-alias
filter before being multiplexed into a single analogue-to-digital converter chip. The A – D
converter provides 16-bit resolution and a serial data stream output. The digital input signals
are opto isolated on this board to prevent excessive voltages on these inputs causing
damage to the relay's internal circuitry.
2.4.3 Universal opto isolated logic inputs
The P441, P442 and P444 relays are fitted with universal opto isolated logic inputs that can
be programmed for the nominal battery voltage of the circuit of which they are a part. i.e.
thereby allowing different voltages for different circuits e.g. signalling, tripping. They
nominally provide a Logic 1 or On value for Voltages ≥80% of the set voltage and a Logic 0
or Off value for the voltages ≤60% of the set voltage. This lower value eliminates fleeting
pickups that may occur during a battery earth fault, when stray capacitance may present up
to 50% of battery voltage across an input. Each input also has selectable filtering which can
be utilised. This allows use of a pre-set filter of ½ cycle which renders the input immune to
induced noise on the wiring: although this method is secure it can be slow, particularly for
intertripping. This can be improved by switching off the ½ cycle filter in which case one of the
following methods to reduce ac noise should be considered. The first method is to use
double pole switching on the input, the second is to use screened twisted cable on the input
circuit. (See also section 6.2 chapter P44x/EN AP for the hysteresis values of universal
optos).
Page 10/44 MiCOM P441/P442 & P444
Up to 5 current inputs 3/4 voltage inputs
Up to 5
CT
CT
VT
VT
4
Transformer board
Input board
Up to 5
Anti-alias filters
single
single
single
single
Diffn
Diffn
Diffn
Diffn
to
to
to
to
4
Up to 5
pass
pass
filter
filter
pass
pass
filter
filter
Low
Low
Low
Low
4
16:1
Multiplexer
isolator
Optical
Noise
filter
Buffer
8 digital inputs
16-bit
ADC
Sample
control
Interface
Calibration
Serial
E²PROM
isolator
Optical
Noise
filter
processor board
Trigger from
data bus
Serial sample
Parallel bus
Buffer
Parallel bus
P3027ENa
FIGURE 2 - MAIN INPUT BOARD

The other function of the input board is to read the state of the signals present on the digital
inputs and present this to the parallel data bus for processing. The input board holds 8
optical isolators for the connection of up to eight digital input signals. The opto-isolators are
used with the digital signals for the same reason as the transformers with the analogue
signals; to isolate the relay’s electronics from the power system environment. A 48V ‘field
voltage’ supply is provided at the back of the relay for use in driving the digital opto-inputs.
The input board provides some hardware filtering of the digital signals to remove unwanted
noise before buffering the signals for reading on the parallel data bus. Depending on the
relay model, more than 8 digital input signals can be accepted by the relay. This is achieved
by the use of an additional opto-board which contains the same provision for 8 isolated
digital inputs as the main input board, but does not contain any of the circuits for analogue
signals which are provided on the main input board.
2.5 Power supply module (including output relays)
The power supply module contains two PCBs, one for the power supply unit itself and the
other for the output relays. The power supply board also contains the input and output
hardware for the rear communication port which provides an RS485 communication
interface.
MiCOM P441/P442 & P444 Page 11/44
2.5.1 Power supply board (including RS485 communication interface)

One of three different configurations of the power supply board can be fitted to the relay.
This will be specified at the time of order and depends on the nature of the supply voltage
that will be connected to the relay. The three options are shown in table 1 below.
Nominal dc range Nominal ac range

24 – 48V dc only
48 – 110V 30 – 100V rms
110 – 250V 100 – 240V rms
TABLE 1 - POWER SUPPLY OPTIONS

The output from all versions of the power supply module are used to provide isolated power
supply rails to all of the other modules within the relay. Three voltage levels are used within
the relay, 5.1V for all of the digital circuits, •16V for the analogue electronics, e.g. on the
input board, and 22V for driving the output relay coils. All power supply voltages including
the 0V earth line are distributed around the relay via the 64-way ribbon cable. One further
voltage level is provided by the power supply board which is the field voltage of 48V. This is
brought out to terminals on the back of the relay so that it can be used to drive the optically
isolated digital inputs.
The two other functions provided by the power supply board are the RS485 communications
interface and the watchdog contacts for the relay. The RS485 interface is used with the
relay’s rear communication port to provide communication using one of either Courier,
Modbus or IEC60870-5-103 protocols. The RS485 hardware supports half-duplex
communication and provides optical isolation of the serial data being transmitted and
received.
All internal communication of data from the power supply board is conducted via the output
relay board which is connected to the parallel bus.
The watchdog facility provides two output relay contacts, one normally open and one
normally closed which are driven by the processor board. These are provided to give an
indication that the relay is in a healthy state.
2.5.2 Output relay board
The output relay board holds seven relays, three with normally open contacts and four with
changeover contacts. The relays are driven from the 22V power supply line. The relays’ state
is written to or read from using the parallel data bus. Depending on the relay model seven
additional output contacts may be provided, through the use of up to three extra relay
boards.
2.6 IRIG-B board (P442 and P444 only)
The IRIG-B board is an order option which can be fitted to provide an accurate timing
reference for the relay. This can be used wherever an IRIG-B signal is available. The IRIG-B
signal is connected to the board via a BNC connector on the back of the relay. The timing
information is used to synchronise the relay’s internal real-time clock to an accuracy of 1ms.
The internal clock is then used for the time tagging of the event, fault maintenance and
disturbance records.
The IRIG-B board can also be specified with a fibre optic transmitter/receiver which can be
used for the rear communication port instead of the RS485 electrical connection (IEC60870
only).
2.7 2nd rear communication and InterMiCOM teleprotection board (optional)
On ordring this board within a relay, both 2nd rear communications K-Bus and InterMiCOM
(available in next version C1.0) will become connection and settings options. The user may
then either one, or both, as demanded by the installation.
SK4 : The second rear communications port runs the courier language. This can be used
over one of three physical links : twisted pair K-Bus (non polarity sensitive), twisted pai
EIA(RS)485 (connection polarity sensitive) or EIA(RS)232.
Page 12/44 MiCOM P441/P442 & P444
SK4 : The InterMiCOM board (available with next version C1.0) is used to connect to an
EIA(RS)232 link, allowing up to eight programmable signalling bits to be transferred from/to
the remote line end relay. A suitable EIA(RS)232 link must exist between the two line ends,
for example a MODEM, or via a compatible multiplexer (check compatibility before ordering
the relay).
The second rear comms/InterMiCOM board, and IRIG-B board are mutually exclusive since
they use the same hardware slot. For this reason two versions of second rear comms board
are available ; one with an IRIG-B input and one without. (See also the Cortec code in
P44x/EN BR).
2.8 Mechanical layout
The case materials of the relay are constructed from pre-finished steel which has a
conductive covering of aluminium and zinc. This provides good earthing at all joints giving a
low impedance path to earth which is essential for performance in the presence of external
noise. The boards and modules use a multi-point earthing strategy to improve the immunity
to external noise and minimise the effect of circuit noise. Ground planes are used on boards
to reduce impedance paths and spring clips are used to ground the module metalwork.
Heavy duty terminal blocks are used at the rear of the relay for the current and voltage signal
connections. Medium duty terminal blocks are used for the digital logic input signals, the
output relay contacts, the power supply and the rear communication port. A BNC connector
is used for the optional IRIG-B signal. 9-pin and 25-pin female D-connectors are used at the
front of the relay for data communication.
Inside the relay the PCBs plug into the connector blocks at the rear, and can be removed
from the front of the relay only. The connector blocks to the relay’s CT inputs are provided
with internal shorting links inside the relay which will automatically short the current
transformer circuits before they are broken when the board is removed.
The front panel consists of a membrane keypad with tactile dome keys, an LCD and 12
LEDs mounted on an aluminium backing plate.
MiCOM P441/P442 & P444 Page 13/44
3. RELAY SOFTWARE
The relay software was introduced in the overview of the relay at the start of this chapter.
The software can be considered to be made up of four sections:
• the real-time operating system
• the system services software
• the platform software
• the protection & control software

This section describes in detail the latter two of these, the platform software and the
protection & control software, which between them control the functional behaviour of the
relay. figure 3 shows the structure of the relay software.
Protection & Control

Software Measurements and event, fault
& disturbance records
Disturbance
recorder task
Programables & Protection task

fixed scheme logic
Platform Software
Fourier signal Protection Event, fault, Remote

processing disturbance, communications
algorithms Protection & control settings maintenance record interface -
logging CEI 60870-5-103
Supervisor task
Settings Remote
database communications
interface - Modbus
Sampling function -
copies samples into Control of output contacts and Front panel Local & Remote
2 cycle buffer programmable LEDs interface - LCD & communications
keypad interface - Courier
Sample data & digital Control of interfaces to keypad, LCD,

logic input LEDs, front & rear comms ports.
Self-checking maintenance records
System services software
Relay hardware
P0128ENa
FIGURE 3 - RELAY SOFTWARE STRUCTURE

3.1 Real-time operating system
The software is split into tasks; the real-time operating system is used to schedule the
processing of the tasks to ensure that they are processed in the time available and in the
desired order of priority. The operating system is also responsible in part for controlling the
communication between the software tasks through the use of operating system messages.
3.2 System services software
As shown in figure 3, the system services software provides the interface between the
relay’s hardware and the higher-level functionality of the platform software and the protection
& control software. For example, the system services software provides drivers for items
such as the LCD display, the keypad and the remote communication ports, and controls the
boot of the processor and downloading of the processor code into SRAM from non-volatile
flash EPROM at power up.
Page 14/44 MiCOM P441/P442 & P444
3.3 Platform software

The platform software has three main functions:
• to control the logging of records that are generated by the protection software,
including alarms and event, fault, and maintenance records.
• to store and maintain a database of all of the relay’s settings in non-volatile memory.
• to provide the internal interface between the settings database and each of the relay’s
user interfaces, i.e. the front panel interface and the front and rear communication
ports, using whichever communication protocol has been specified (Courier, Modbus,
IEC60870-5-103).
3.3.1 Record logging
The logging function is provided to store all alarms, events, faults and maintenance records.
The records for all of these incidents are logged in battery backed-up SRAM in order to
provide a non-volatile log of what has happened. The relay maintains four logs: one each for
up to 32 alarms, 250 event records, 5 fault records and 5 maintenance records. The logs are
maintained such that the oldest record is overwritten with the newest record. The logging
function can be initiated from the protection software or the platform software is responsible
for logging of a maintenance record in the event of a relay failure. This includes errors that
have been detected by the platform software itself or error that are detected by either the
system services or the protection software function. See also the section on supervision and
diagnostics later in this chapter.
3.3.2 Settings database
The settings database contains all of the settings and data for the relay, including the
protection, disturbance recorder and control & support settings. The settings are maintained
in non-volatile E2PROM memory. The platform software’s management of the settings
database includes the responsibility of ensuring that only one user interface modifies the
settings of the database at any one time. This feature is employed to avoid conflict between
different parts of the software during a setting change. For changes to protection settings
and disturbance recorder settings, the platform software operates a ‘scratchpad’ in SRAM
memory. This allows a number of setting changes to be applied to the protection elements,
disturbance recorder and saved in the database in E2PROM. (See also chapter 1 on the
user interface). If a setting change affects the protection & control task, the database advises
it of the new values.
3.3.3 Database interface
The other function of the platform software is to implement the relay’s internal interface
between the database and each of the relay’s user interfaces. The database of settings and
measurements must be accessible from all of the relay’s user interfaces to allow read and
modify operations. The platform software presents the data in the appropriate format for
each user interface.
3.4 Protection and control software
The protection and control software task is responsible for processing all of the protection
elements and measurement functions of the relay. To achieve this it has to communicate
with both the system services software and the platform software as well as organise its own
operations. The protection software has the highest priority of any of the software tasks in
the relay in order to provide the fastest possible protection response. The protection &
control software has a supervisor task which controls the start-up of the task and deals with
the exchange of messages between the task and the platform software.
MiCOM P441/P442 & P444 Page 15/44
3.4.1 Overview - protection and control scheduling

After initialisation at start-up, the protection and control task is suspended until there are
sufficient samples available for it to process. The acquisition of samples is controlled by a
‘sampling function’ which is called by the system services software and takes each set of
new samples from the input module and stores them in a two-cycle buffer. The protection
and control software resumes execution when the number of unprocessed samples in the
buffer reaches a certain number. For the P140 feeder protection relay, the protection task is
executed twice per cycle, i.e. after every 12 samples for the sample rate of 24 samples per
power cycle used by the relay. The protection and control software is suspended again when
all of its processing on a set of samples is complete. This allows operations by other
software tasks to take place.
3.4.2 Signal processing
The sampling function provides filtering of the digital input signals from the opto-isolators and
frequency tracking of the analogue signals. The digital inputs are checked against their
previous value over a period of half a cycle. Hence a change in the state of one of the inputs
must be maintained over at least half a cycle before it is registered with the protection and
control software.
12 Samples per Cycle
I Transformation & LOW PASS ONE-SAMPLE If

ANTI-ALIASING SUB-SAMPLE
Low Pass Filter FILTER FILTER DELAY 1/2
A-D
DFT
Converter I'f
FIR SUB-SAMPLE
DERIVATOR 1/2
24 Samples
per Cycle
V Transformation & ANTI-ALIASING LOW PASS ONE-SAMPLE SUB-SAMPLE V
Low Pass Filter FILTER FILTER DELAY 1/2
FIR = Impulse Finite Response Filter

P3029ENa
FIGURE 4 - SIGNAL ACQUISITION AND PROCESSING

The frequency tracking of the analogue input signals is achieved by a recursive Fourier
algorithm which is applied to one of the input signals, and works by detecting a change in the
measured signal’s phase angle. The calculated value of the frequency is used to modify the
sample rate being used by the input module so as to achieve a constant sample rate of 24
samples per cycle of the power waveform. The value of the frequency is also stored for use
by the protection and control task.
When the protection and control task is re-started by the sampling function, it calculates the
Fourier components for the analogue signals. The Fourier components are calculated using
a one-cycle, 24-sample Discrete Fourier Transform (DFT). The DFT is always calculated
using the last cycle of samples from the 2-cycle buffer, i.e. the most recent data is used. The
DFT used in this way extracts the power frequency fundamental component from the signal
and produces the magnitude and phase angle of the fundamental in rectangular component
format. The DFT provides an accurate measurement of the fundamental frequency
component, and effective filtering of harmonic frequencies and noise. This performance is
achieved in conjunction with the relay input module which provides hardware anti-alias
filtering to attenuate frequencies above the half sample rate, and frequency tracking to
maintain a sample rate of 24 samples per cycle. The Fourier components of the input current
and voltage signals are stored in memory so that they can be accessed by all of the
protection elements’ algorithms. The samples from the input module are also used in an
unprocessed form by the disturbance recorder for waveform recording and to calculate true
rms values of current, voltage and power for metering purposes.
Page 16/44 MiCOM P441/P442 & P444
3.4.3 Programmable scheme logic

The purpose of the programmable scheme logic (PSL) is to allow the relay user to configure
an individual protection scheme to suit their own particular application. This is achieved
through the use of programmable logic gates and delay timers.
The input to the PSL is any combination of the status of the digital input signals from the
opto-isolators on the input board, the outputs of the protection elements, e.g. protection
starts and trips, and the outputs of the fixed protection scheme logic. The fixed scheme logic
provides the relay’s standard protection schemes. The PSL itself consists of software logic
gates and timers. The logic gates can be programmed to perform a range of different logic
functions and can accept any number of inputs. The timers are used either to create a
programmable delay, and/or to condition the logic outputs, e.g. to create a pulse of fixed
duration on the output regardless of the length of the pulse on the input. The outputs of the
PSL are the LEDs on the front panel of the relay and the output contacts at the rear.
The execution of the PSL logic is event driven; the logic is processed whenever any of its
inputs change, for example as a result of a change in one of the digital input signals or a trip
output from a protection element. Also, only the part of the PSL logic that is affected by the
particular input change that has occurred is processed. This reduces the amount of
processing time that is used by the PSL. The protection and control software updates the
logic delay timers and checks for a change in the PSL input signals every time it runs.
This system provides flexibility for the user to create their own scheme logic design.
However, it also means that the PSL can be configured into a very complex system, and
because of this setting of the PSL is implemented through the PC support MiCOM S1.
3.4.4 Event and Fault Recording
A change in any digital input signal or protection element output signal causes an event
record to be created. When this happens, the protection and control task sends a message
to the supervisor task to indicate that an event is available to be processed and writes the
event data to a fast buffer in SRAM which is controlled by the supervisor task. When the
supervisor task receives either an event or fault record message, it instructs the platform
software to create the appropriate log in battery backed-up SRAM. The operation of the
record logging to battery backed-up SRAM is slower than the supervisor’s buffer. This
means that the protection software is not delayed waiting for the records to be logged by the
platform software. However, in the rare case when a large number of records to be logged
are created in a short period of time, it is possible that some will be lost if the supervisor’s
buffer is full before the platform software is able to create a new log in battery backed-up
SRAM. If this occurs then an event is logged to indicate this loss of information.
3.4.5 Disturbance recorder
The disturbance recorder operates as a separate task from the protection and control task. It
can record the waveforms for up to 8 analogue channels and the values of up to 32 digital
signals. The recording time is user selectable up to a maximum of 10 seconds. The
disturbance recorder is supplied with data by the protection and control task once per cycle.
The disturbance recorder collates the data that it receives into the required length
disturbance record. It attempts to limit the demands it places on memory space by saving the
analogue data in compressed format whenever possible. This is done by detecting changes
in the analogue input signals and compressing the recording of the waveform when it is in a
steady-state condition. The compressed disturbance records can be decompressed by
MiCOM S1 which can also store the data in COMTRADE format, thus allowing the use of
other packages to view the recorded data.
3.4.6 Fault locator
The fault locator task is also separate from the protection and control task. The fault locator
is invoked by the protection and control task when a fault is detected. The fault locator uses
a 12-cycle buffer of the analogue input signals and returns the calculated location of the fault
to the protection and control task wich includes it in the fault record for the fault. When the
fault record is complete (i.e. includes the fault location), the protection and control task can
send a message to the supervisor task to log the fault record.
MiCOM P441/P442 & P444 Page 17/44
4. DISTANCE ALGORITHMS
The operation is based on the combined use of two types of algorithms:
• "Deltas" algorithms using the superimposed current and voltage values that are
characteristic of a fault. These are used for phase selection and directional
determination. The fault distance calculation is performed by the "impedance
measurement algorithms ” using Gauss-Seidel.
• "Conventional" algorithms using the impedance values measured while the fault
occurs. These are also used for phase selection and directional determination.
The fault distance calculation is performed by the "impedance measurement
algorithms." Using Gauss-Seidel.
The "Deltas" algorithms have priority over the "Conventional" algorithms if they have been
started first. The latter are actuated only if "Deltas" algorithms have not been able to clear
the fault within two cycles of its detection.
4.1 Distance and Resistance Measurement
MiCOM P44x distance protection is a full scheme distance relay. To measure the distance
and apparent resistance of a fault, the following equation is solved on the loop with a fault:
IL I
R
Z SL (n).ZL (1-n).ZL Z SR
Relay Relay
VL VR
RF I F = I + I'
Local Remote
Source Source
V L = (ZL x I x D)+ RF x IF
= ((r +jx) x I x D) +RF x IF where
V L = local terminal relay voltage
r = line resistance (ohm/mile)
x = line reactance (ohm/mile)
IF = current flowing in the fault (I + I')
I = current measured by the relay on the faulty phase
= current flowing into the fault from local terminal
I' = current flowing into the fault from remote terminal
D = fault location (permile or km from relay to the fault)
R = fault resistance
R F = apparent fault resistance at relay; R x (1 + I'/I)
Assumed Fault Currents:

For Phase to Ground Faults (ex., A-N), IF = 3 I0 for 40ms, then IA after 40 ms
For Phase to Phase Faults (ex., A-B), IF =IAB
P3030ENa
FIGURE 5 - DISTANCE AND FAULT RESISTANCE ESTIMATION

The impedance measurements are used by High Speed and Conventional Algorithms.
Page 18/44 MiCOM P441/P442 & P444
The following describes how to solve the above equation (determination of D fault distance
and R fault resistance). The line model used will be the 3×3 matrix of the line impedance
(resistive and inductive) of the three phases, and mutual values between phases.
Raa + jω Laa Rab + jω Lab Rac + jω Lac
Rab + jω Lab Rbb + jω Lbb Rbc + jω Lbc
Rac + jω Lac Rbc + jω Lbc Rcc + jω Lcc

Where:
Raa=Rbb=Rcc and Rab=Rbc=Rac
2. X 1 + X 0 X 0 − X1
ωLaa = ωLbb = ωLcc = ωLab = ωLbc = ωLac =
3 and 3
and
X1 : positive sequence reactance
X0 : zero-sequence reactance
The line model is obtained from the positive and zero-sequence impedance. The use of four
different residual compensation factor settings is permitted on the relay, as follows:
kZ1: residual compensation factor used to calculate faults in zones 1 and 1X.
kZ2: residual compensation factor used to calculate faults in zone 2.
kZp: residual compensation factor used to calculate faults in zone p.
kZ3/4: residual compensation factor used to calculate faults in zones 3 and 4.
The solutions "Dfault " and "Rfault " are obtained by solving the system of equations (one
equation per step of the calculation) using the Gauss Seidel method.
n n
∑ (VL.Ifault ) − Dfault.( n − 1).∑ (Z 1.IL.IFault )

n0 n0
n
∑ (I
n0
fault )²
R fault (n) =
n n
∑ (V
n0
L. Z 1. IL ) − Rfault.( n − 1).∑ ( Z 1. IL.IFault )
n0
n
∑ (Z .I )²
n0
1 L
Dfault (n) =
Rfault and Dfault are computed for every sample (12 samples per cycle).
With IL equal to Iα+k0.3 x I0 for phase-to-earth loop or IL equal to Iαβ for phase-to-phase
loop.
MiCOM P441/P442 & P444 Page 19/44
4.1.1 Phase-to-earth loop impedance
Zs i Z1 X / Phase R Fault / (1+k 0)

C
Z1
Zs iB Z1
Z Fault
Zs iA Z1
R / Phase
VCN VBN VAN kS ZS VA VB VC k0 Z1 RFault
Location
of Distance Relay
P3031ENa
FIGURE 6 - PHASE-TO-EARTH LOOP IMPEDANCE

The impedance model for the phase-to-earth loop is :
VαN = Z1 x Dfault x (Iα + kO x 3 I0) + Rfault x Ifault
with α = phase A, B or C
The model for the current IF circulating in the fault is (3 x I0) during the first 40 ms and then
Iα.
The (3 x I0) current is used for the first 40 milliseconds to model the fault current, thus
eliminating the load current before the circuit breakers are operated during the 40ms (one
pole tripping). After the 40ms, the phase current is used.
VAN = Z1.Dfault.(IA+k0.3xI0)+Rfault.Ifault
VBN = Z1.Dfault.(IB+k0.3xI0)+Rfault.Ifault
VCN = Z1.Dfault.(IC+k0.3xI0)+Rfault.Ifault
x 4 kO residual compensation factors
= 12 phase-to-earth loops are continuously monitored and computed for each samples.
Page 20/44 MiCOM P441/P442 & P444
VαN = Z1.Dfault.(Iα + k0.3I0) + Rfault.Ifault

Z0–Z1
VαN = Z1.Dfault.(Iα + .3I0) + Rfault.Ifault
3
R0–R1 + j.(X0–X1)
VαN = (R1+j.X1).Dfault.(Iα + .3I0) + Rfault.Ifault
3.(R1-jX1)
R0–R1 + j.(X0–X1)
VαN = (R1+j.X1).Dfault.Iα + .Dfault.3I0 + Rfault.Ifault
3
R0–R1 j.(X0–X1)
VαN = R1.Dfault.Iα + .Dfault.3I0 + j.X1. Dfault.Iα + .Dfault.3I0 + Rfault.Ifault
3 3
R0–R1 j.(X0–X1)
VαN = R1.Dfault.Iα + .Dfault.3I0 + j.X1. Dfault.Iα + .Dfault.(IA+IB+IC) + Rfault.Ifault
3 3
R0–R1 j.(X0+2.X1) j.(X0–X1)

VAN = R1.Dfault.IA + .Dfault.3I0 + .Dfault.IA + .Dfault.(IB+IC) + Rfault.Ifault
3 3 3
R0–R1 (X +2.X1) dI (X –X ) dI (X –X ) dI
VAN = R1.Dfault.IA + .Dfault.3I0 + 0 .Dfault. A + 0 1 .Dfault. B + 0 1 .Dfault. C + Rfault.Ifault
3 3 dt 3 dt 3 dt
R0–R1 dI dI dI
VAN = R1.Dfault.IA + .Dfault.3I0 + LAA.Dfault. A + LAB.Dfault. B + LAC.Dfault. C + Rfault.Ifault
3 dt dt dt
R0–R1 dI dI dI
VBN = R1.Dfault.IB + .Dfault.3I0 + LAB.Dfault. A + LBB.Dfault. B + LBC.Dfault. C + Rfault.Ifault
3 dt dt dt
R0–R1 dI dI dI
VCN = R1.Dfault.IC + .Dfault.3I0 + LAC.Dfault. A + LBC.Dfault. B + LCC.Dfault. C + Rfault.Ifault
3 dt dt dt
4.1.2 Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.1.3 Phase-to-phase loop impedance
Zs i Z1 X / Phase R Fault/ 2
C
Z1
Zs iB Z1
Z Fault
Zs iA Z1 RFault
R / Phase
VCN VBN VAN VC
Location
of Distance Relay P3032ENa
FIGURE 7 - PHASE-TO-PHASE LOOP IMPEDANCE

The impedance model for the phase-to-phase loop is :
Vαβ = ZL x Dfault x Iαβ + Rfault /2 x Ifault
with αβ = phase AB, BC or CA

MiCOM P441/P442 & P444 Page 21/44
The model for the current Ifault circulating in the fault Iαβ.
VAB = 2Z1.Dfault.IAB + Rfault.Ifault
VBC = 2Z1.Dfault.IBC + Rfault.Ifault
VCA = 2Z1.Dfault.ICA + Rfault.Ifault
= 3 phase-to-phase loops are continuously monitored and computed for each sample.
Vαβ = 2Z1.Dfault.Iαβ + Rfault.Ifault
Vαβ = 2(R1 + j. X1).Dfault.Iαβ + Rfault.Ifault
Vαβ = 2R1.Dfault.Iαβ + 2j. X1.Dfault.Iαβ + Rfault.Ifault
dIαβ
Vαβ = 2R1.Dfault.Iαβ + 2X1.Dfault. + Rfault.Ifault
dt
dIA dI dI R
VAB = R1.Dfault.(IA – IB) + (LAA–LAB).Dfault. + (LAB–LBB).Dfault. B + (LAC–LBC).Dfault. C + fault.Ifault
dt dt dt 2
dIA dI dI R
VBC = R1.Dfault.(IB – IC) + (LAB–LAC).Dfault. + (LBB–LBC).Dfault. B + (LBC–LCC).Dfault. C + fault.Ifault
dt dt dt 2
dIA dI dI R
VCA = R1.Dfault.(IC – IA) + (LAC–LAA).Dfault. + (LBC–LAB).Dfault. B + (LCC–LAC).Dfault. C + fault.Ifault
dt dt dt 2
Impedance measurement algorithms work with instantaneous values (current and voltage).
Derivative current value (dI/dt) is obtained by using FIR filter.
4.2 "Deltas" Algorithms
The patented high-speed algorithm has been proven with 10 years of service at all voltage
levels from MV to EHV networks. The P440 relay has ultimate reliability of phase selection
and directional decision far superior to standard distance techniques using superimposed
algorithms. These algorithms or delta algorithms are based on transient components and
they are used for the following functions:
Detection of the fault
By comparing the superimposed values to a threshold which is low enough to be crossed
when a fault occurs and high enough not to be crossed during normal switching outside of
the protected zones.
Establishing the fault direction
Only a fault can generate superimposed values; therefore, it is possible to determine
direction by measuring the transit direction of the superimposed energy.
Phase selection
As the superimposed values no longer include the load currents, it is possible to make high-
speed phase selection.
4.2.1 Fault Modelling
Consider a stable network status-the steady-state load flow prior to any start. When a fault
occurs, a new network is established. If there is no other modification, the differences
between the two networks (before and after the fault) are caused by the fault. The network
after the fault is equivalent to the sum of the values of the status before the fault and the
values characteristic of the fault. The fault acts as a source for the latter, and the sources
act as passive impedance in this case.
Page 22/44 MiCOM P441/P442 & P444
VR IR VR IR
R F R F
ZS ZL ZL ZR
Relay Relay
V F (prefault voltage)
V R = Voltage at Relay Location
I R = Current at Relay Location
Unfaulted Network (steady state prefault conditions)
VR' I R' VR' I R'

R F R F
ZS ZL ZL ZR
Relay Relay
RF
V R ' = Voltage at Relay Location
I R ' = Current at Relay Location
Faulted Network (steady state)
VR IR VR IR
R F R F
ZS ZL ZL ZR
Relay Relay
-V F
V R= Voltage at Relay Location
I R= Current at Relay Location RF
Fault Inception
P3033ENa
FIGURE 8 - PRE, FAULT AND FAULT INCEPTION VALUE

Network Status Monitoring
The network status is monitored continuously to determine whether the "Deltas" algorithms
may be used. To do so, the network must be "healthy," which is characterised by the
following:
• The circuit breaker(s) should be closed just prior to fault inception (2 cycles of healthy
pre-fault data should be stored) – the line is energised from one or both ends,
• The source characteristics should not change noticeably (there is no power swing or
out-of-step detected).
• Power System Frequency is being measured and tracked (24 samples per cycle at 50
or 60Hz).
MiCOM P441/P442 & P444 Page 23/44
No fault is detected :
• all nominal phase voltages are between 70% and 130% of the nominal value.
• the residual voltage (3.V0) is less than 10% of the nominal value
• the residual current (3.I0) is less than 10% of the nominal value + 3.3% of the
maximum load current flowing on the line
The measured loop impedance are outside the characteristic, when these requirements are
fulfilled, the superimposed values are used to determine the fault inception (start), faulty
phase selection and fault direction. The network is then said to be "healthy" before the fault
occurrence.
4.2.2 Detecting a Transition
In order to detect a transition, the MiCOM P441, P442 and P444 compares sampled current
and voltage values at the instant "t" with the values predicted from those stored in the
memory one period and two periods earlier.
2T
G
G = Current or Voltage
T
G(t)
G(t-2T) G(t-T)
Gp(t)
Time
t-2T t-T t
P3034ENa
FIGURE 9 - TRANSITION DETECTION

Gp(t) = 2G(t-T) - G(t-2T) where Gp(t) are the predicted values of either the sampled current
or voltage
A transition is detected on one of the current or voltage input values if the absolute value of
(G(t) - Gp(t)) exceeds a threshold of 0.2 x IN (nominal current) or 0.1 x UN / √3 = 0.1x VN
(nominal voltage)
With: U = line-to-line voltage
V = line-to-ground voltage = U / √3
G(t) = G(t) - Gp(t) is the transition value of the reading G.
The high-speed algorithms will be started if ∆U OR ∆I is detected on one sample.

Page 24/44 MiCOM P441/P442 & P444
Example: isolated AC fault

MiCOM P441/P442 & P444 Page 25/44

Page 26/44 MiCOM P441/P442 & P444
4.2.3 Confirmation
In order to eliminate the transitions generated by possible operations or by high frequencies,
the transition detected over a succession of three sampled values is confirmed by checking
for at least one loop for which the two following conditions are met:
• ∆ V > threshold V, where threshold V = 0.1 Un /√3 = 0.1 Vn

and
• ∆ I > threshold l, where threshold I= 0.2 In.
The start-up of the high-speed algorithms will be confirmed if ∆U AND ∆I are detected on
three consecutive samples.
4.2.4 Directional Decision
The "Delta" detection of the fault direction is determined from the sign of the energy per
Phase for the transition values characterising the fault.
VR
IR
F
ZS ZL ZL ZR
Relay
-V F
I R = Current at Relay Location RF
Forward Fault
VR
IR
R
ZS ZL ZL ZR
Relay
-V F
I R = Current at Relay Location RF
Reverse Fault
P3035ENa
FIGURE 10 - DIRECTIONAL DETERMINATION USING SUPERIMPOSED VALUES

To do this, the following sum per phase is calculated:
ni ≥ n 0 + 5 ni ≥ n 0 + 5 ni ≥ n 0 + 5
SA = ∑n0
(∆VANi . ∆IA i ) SB = ∑n0
(∆VBNi . ∆IB i ) SC = ∑ (∆V
n0
CNi . ∆ICi )
Where no is the instant at which the fault is detected, ni is the instant of the calculation and S
is the calculated transition energy.
If the fault is in the forward direction, then S i <0 (i = A, B or C phase).
If the fault is in the reverse direction, then S i >0.
The directional criterion is valid if
S >5 x (10% x Vn x 20% x In x cos (85° )
This sum is calculated on five successive samples.
RCA angle of the delta algorithms is equal to 60° (-30°) if the protected line is not serie
compensated (else RCA is equal to 0°).
MiCOM P441/P442 & P444 Page 27/44
4.2.5 Phase Selection

Phase selection is made on the basis of a comparison between the transition values for the
derivatives of currents IA, IB and IC:
∆I'A, ∆I'B, ∆I'C, ∆I'AB, ∆I'BC, ∆I'CA

NOTE: The derivatives of the currents are used to eliminate the effects of the
DC current component.
Hence:
ni ≥ n 0 + 4 ni ≥ n 0 + 4
SAN = ∑ (∆I ' A i )²
n0
SAB = ∑ (∆I '
n0
ABi )²
ni ≥ n 0 + 4 ni ≥ n 0 + 4
SBN = ∑ (∆I ' Bi )²
n0
SBC = ∑ (∆I '
n0
BC i )²
ni ≥ n 0 + 4 ni ≥ n 0 + 4
SCN = ∑ (∆I ' C i )²
n0
SCA = ∑ (∆I '
n0
CAi )²
The phase selection is valid if the sum (SAB+SBC+SCA) is higher than a threshold. This
sum is not valid if the positive sequence impedance on the source side is far higher than the
zero sequence impedance. In this case, the conventional algorithms are used to select the
faulted phase(s).
Sums on one-phase and two-phase loops are performed. The relative magnitudes of these
sums determine the faulted phase(s).
For examples, assume :
If SAB<SBC<SCA and If SAB<<SBC, the fault has had little effect on the loop A to B. If
SAN<SBN<SCN , the fault declared as single phase fault C.
If the fault is not detected as single-phase by the previous criterion, the fault conditions are
multi-phase.
If SAN<SBN<SCN and If SAB<<SBC, the fault is B to C.
If SAN<SBN<SCN and If SAB•SBC•SCA and if SAN•SBN•SCN, the fault is three-phase (the
fault occurs on the three phases).
4.2.6 Summary
A transition is detected if ∆I > 20% x In or ∆V >10% x Vn

Then three tasks are starting in parallel:
• Fault confirmation : ∆I and ∆V (3 consecutive samples)
• Faulty phase selection (4 consecutive samples)
• Fault directional decision (5 consecutive samples)

Page 28/44 MiCOM P441/P442 & P444
Confirmation
Phase selection
Start Directional decision
P3036ENa
FIGURE 11 - DELTAS ALGORITHMS

High speed algorithms are used only during the first 2 cycles following a fault detection.
4.3 "Conventional" Algorithms
These algorithms do not use the superimposed values but use the impedance values
measured under fault conditions. They are based on fault distance and resistance
measurements.
They are used in the following circumstances:
• The condition before the fault could not be modelled.
• The superimposed values are not exclusively generated by the fault.

This may be true if the following occurs:
• A breaker closing occurs during a fault. By SOTF, only the Conventional Algorithms
can be used as there are not 2 cycles of healthy network stored.
• The fault is not recent and so the operating conditions of the generators have
changed, or corrective action has been taken, i.e., opening the circuit breakers. This
occurs generally after the first trip. High Speed algorithms are used only during the
first 2 cycles after the fault detection.
• operating conditions are not linear.

The conventional algorithms are also suited to detect low current faults that do not have the
required changes in current and voltage for the "high-speed" (superimposed) algorithms.
Therefore, their use assures improved coverage.
The "Conventional" algorithms run continuously with "high-speed" algorithms. If the "high
speed" algorithms cannot declare faulted phase(s) and direction, the conventional algorithms
will.
NOTE: The distance measurement of the fault is taken on the loop selected
by the "high-speed" or "conventional" phase selection algorithms.
This measurement uses the fault values.
MiCOM P441/P442 & P444 Page 29/44
4.3.1 Convergence Analysis

This analysis is based on the measurements of distance and resistance of the fault. These
measurements are taken on each single-phase and two-phase loops. They determine the
convergence of these loops within a parallelogram-shaped, start-up characteristic.
L = line length in km or mile s

D3 = Z3/Zd x L = X3
D4 = Zd x L = X4 Dlim = X3
For multi phase fault :

θ = argument of Z1 (positive sequenceimpedance)
For single phase fault :
θ = argument of (2Z 1 + Z 01 )/3

1
for zone 1 d
θ2 = argument of (2Z 1 + Z 02)/3
-R R R
for zone 2, etc... lim lim
-D = X4
lim
P3037ENa
FIGURE 12 - START-UP CHARACTERISTIC

Let Rlim and Dlim be the limits of the starting characteristic.
The pair of solutions (Dfault (n-1), Rfault (n-1)) and (D fault (n), R fault (n)):
• Rfault (n-1)< Rlim, and Rfault (n)< Rlim, and Rfault (n-1) - Rfault (n)< 10% x Rlim
• Dfault (n-1)< Dlim and Dfault (n) < Dlim and Dfault (n-1) - Dfault (n) < 10% x Dlim
with Rlim being the resistance limit for the single and multi phase faults. This convergence is
dependent on the equations not being collinear thus allowing the terms in Dfault and Rfault
to be discriminated.
Theoretically, zone limits are Z3, Z4, +/- R3G-R4G or +/- R3Ph-R4Ph, if zones 3 and 4 are
enabled. The slope of the characteristic mimics the characteristic of the line.
To model the fault current:
• Two-phase loops: the values (IA - IB), (IB - IC), or (IC - IA) are used.
• Single-phase loops: (IA+ k0.3 x I0), (IB + k0.3 x I0), or (IC + k0.3 x I0) are used.
The results of these algorithms are mainly used as a backup; therefore, the circuit breaker
located at the other end is assumed to be open.
4.3.2 Start-Up
Start-up is initiated when at least one of the six measuring loops converges within the
characteristic (ZAN, ZBN, ZCN, ZAB, ZBC, ZCA).
Page 30/44 MiCOM P441/P442 & P444
4.3.3 Phase Selection

If the fault currents are high enough with respect to the maximum load currents current-
based phase selection is used; if not, impedance-based phase selection is required.
Current Phase Selection
Amplitudes I'A, I'B, I'C are derived from the measured three-phase currents IA, IB, IC.
These values are then compared to each other and to the two thresholds S1 and S2:
• First threshold is S1= 3 x I'N
• Second threshold is S2 = 5 x I' N

Example:
If I'A< I'B < I' C:
• If I'C > S2 and I'A > S1, the fault is three-phase.
• If I'C > S2, I'B > S1 and I'A < S1, the fault is two-phase, on phases B and C.
• If I'C > S2 and I'B < S1, the fault is single-phase, on phase C.
• If I'C < S2, the current phase selection cannot be used. Impedance phase selection
should then be used.
Impedance Phase Selection
Impedance phase selection is obtained by checking the convergence of the various
measuring loops within the start-up characteristic, as follows:
− T = Presence of zero-sequence voltage or current(Logical Information : 0 or 1).
− ZAN = Convergence within the characteristic of the loop A (Logical Information).
− ZBN = Convergence within the characteristic of the loop B (Logical Information).
− ZCN = Convergence within the characteristic of the loop C (Logical Information).
− ZAB = Convergence within the characteristic of the loop AB (Logical Information).
− ZBC = Convergence within the characteristic of the loop BC (Logical Information).
− ZCA = Convergence within the characteristic of the loop CA (Logical Information).

In addition, the following are also defined:
• RAN = ZAN x ZBC with ZBC = convergence within the characteristic of the loop
BC (Logical Information).
• RBN = ZBN x ZCA with ZCA = convergence within the characteristic of the loop
CA (Logical Information).
• RCN = ZCN x ZAB with ZAB = convergence within the characteristic of the loop
AB (Logical Information).
• RAB = ZAB x ZCN with ZCN = convergence within the characteristic of the loop
C (Logical Information).
• RBC = ZBC x ZAN with ZAN = convergence within the characteristic of the loop
A (Logical Information).
• RCA = ZCA x ZBN with ZBN= convergence within the characteristic of the loop
B (Logical Information).
MiCOM P441/P442 & P444 Page 31/44
Following are the different phase selections:
• SAN = T x RAN x RBN x RCN single-phase A to ground fault
• SBN = T x RBN x RAN x RCN single-phase B to ground fault
• SCN = T x RCN x RBN x RCN single-phase C to ground fault
• SABN = T x RAB x ZAN x ZBN double-phase A to B to ground fault
• SBCN = T x RBC x ZBN x ZCN double-phase B to C to ground fault
• SCAN = T x RCA x ZAN x ZCN double-phase C to A to ground fault
• SAB = T x RAB x RBC x RCA double-phase A to B fault
• BC = T x RBC x RAB x RCA double-phase B to C fault
• CA = T x RCA x RAB x RBC double-phase B to C fault
• SABC = ZAN x ZBN x ZCN x ZAB x ZBC x ZCA three-phase fault

For a three-phase fault, the fault resistance of one of the two-phase loops is less than half of
the fault resistances of the other two-phase loops, it will be used for the directional and
distance measuring function. If not, the loop AB will be used.
NOTE: Impedance phase selection is used only if current phase selection is
unable to make a decision.
4.3.4 Directional Decision
The fault direction is defined on the basis of the calculation of the phase shift between the
stored voltage and the derivative of a current. The current and the voltage used are those of
the measuring loop(s) defined by the phase selection.
For the two-phase loops, the calculation of the phase shift between the stored voltage and
the derivative of the current on the faulty two-phases.
For the single-phase loops, the calculation of the phase shift between the stored voltage and
the current (I'x + k0 . 3 x I'0), where:
I'x = derivative of current on the faulted single-phase where x = A, B, or C
3 x I’0 = derivative of residual current
k0 = ground compensation factor, where for example k01 = (Z0–Z1)/3Z1
The directional angle is fixed between-30° and +150° (RCA =60°).
4.3.5 Directional Decision during SOTF/TOR (Switch On To Fault/Trip On Reclose)
The directional information is calculated from the stored voltage values if the network is
detected as healthy. The calculations vary depending on the type of fault, i.e., single-phase
or multiphase.
If the network frequency cannot be measured and tracked, the directional element cannot be
calculated from the stored voltage. A zero sequence directional will be calculated if there are
enough zero-sequence voltage and current. If the zero-sequence directional is not valid, a
negative-sequence directional will be calculated if there are enough negative sequence
voltage and current. If both directional cannot be calculated, the directional element will be
forced forward.
Page 32/44 MiCOM P441/P442 & P444
Single-phase fault
The reference voltage is stored in memory when the fault appears. When the fault is
eliminated by single-phase tripping, the high-speed single-phase auto-reclose (HSAR) is
started.
If a fault appears less than three cycles after the AR starts, the stored voltage value remains
valid as the reference and is used to calculate direction.
If no fault appears during the three cycles after the AR starts, the reference voltage value
becomes that of one of the healthy phases.
If a fault appears during the continuation of the AR cycle or reclosure occurs, the stored
voltage value remains valid for 10 seconds.
If a stored voltage does not exist (SOTF) when one or more loops are convergent within the
start-up characteristic, the directional is forced forward and the trip is instantaneous (if
“SOTF All Zones “ is set or according to the zone location if SOTF Zone 2, etc. is set). If the
settable switch on to fault current threshold I>3 is exceeded on reclosure, the relay
instantaneously trips three-phase.
Two-phase or three-phase fault
The reference voltage is stored in memory when the fault appears. When the fault is
cleared, the stored voltage value remains valid for 10 seconds. If reclosure occurs during
these 10 seconds, the direction is calculated using the stored voltage value.
If a stored voltage does not exist when one or more loops are convergent within the start-up
characteristic, the forward direction is forced and the trip is instantaneous when protection
starts (SOTF All Zones). If the switch on to fault current threshold I>3 is exceeded on
reclosure, the relay trips instantaneously three-phase (TOR All Zones).
The distance element trips immediately as soon as one or more loops converge within the
start-up characteristic during SOTF (SOTF All Zones).
Other modes can be selected to trip selectively by SOFT or TOR according to the fault
location (SOTF Zone 1, SOTF Zone 2, etc., TOR Zone 1, TOR Zone 2, etc. depending from
the software version - from V3.1 available) – (See section 2.12, in chapter P44x/EN AP).
4.4 Faulted Zone Decision
The Decision of the faulted zone is determined by either the zone "Deltas" or "Conventional"
algorithms.
The zones are defined for a convergence between the Dfault and Rfault limits related to
each zone. So, the solution pair (Rfault, Dfault) is said to be convergent if:
• Rfault (n-1) < Rfault (i) and Rfault (n) < Rfault (i) and |Rfault (n-1) – Rfault (n)| < 10% x
Rfault (i)
• Dfault (n-1) < Dfault (i) and Dfault (n) < Dfault (i) and |Dfault (n-1) - Dfault (n)| < k% x
Dfault (i)
where .
k= 5% for zones 1 and 1X
and
10% for other zones Z2, Z3, Zp and Z4.
i=1, 1X, 2, p, 3 and 4.
MiCOM P441/P442 & P444 Page 33/44
Z1
2 1 0
3
4..
R
P3028ENa
FIGURE 13 - PHASE-TO-EARTH LOOP IMPEDANCE

4.5 Tripping Logic
Three tripping modes can be selected (in MiCOM S1: Distance Scheme\Trip Mode):
One-pole trip at T1 (if “1P. Z1 & CR” is set): Single-phase trip for fault in zone 1 at T1 and
Pilot Aided trip at T1. All other zones trip three-phase at their respective times for any fault
types (∅-G, ∅-∅, ∅-∅-G, ∅-∅-∅, ∅-∅-∅-G).
One-pole trip at T1 and T2 (if “1P. Z1Z2 & CR” is set): Single-phase trip for Z1 at T1, Pilot
Aided trip at T1, and Z2 at T2. All other zones trip three-phase at their respective times for
any fault types (∅-G, ∅-∅, ∅-∅-G, ∅-∅-∅, ∅-∅-∅-G). See section 2.8.2.5 chapter AP
(Tripping Mode).
Three- pole trip for all zones (Forces 3 poles): Three-phase trip for all zones at their
respective times for any fault types (∅-G, ∅-∅, ∅-∅-G, ∅-∅-∅, ∅-∅-∅-G). Pilot aided
trips will be three-phase with times corresponding to the pilot logic applied.
Zone Time
Z1 T1
Z1X T1
Z2 T2
Zp Tp
Z3 T3
Z4 T4
There are five time delays associated with the six zones present. Zone 1 and extended zone
1 have the same time delay.
Page 34/44 MiCOM P441/P442 & P444
4.6 Fault Locator

The relay has an integral fault locator that uses information from the current and voltage
inputs to provide a distance to fault measurement. The fault locator measures the distance
by applying the same distance calculation principle as that used for the fault-clearing,
distance-measurement algorithm.
The dedicated fault locator measurement is more accurate as it is based on a greater
number of samples, and it uses the fault currents Ifault as models, as shown below:
• For a single-phase fault AN : Ifault∆ (IA – I0)
BN : Ifault∆ (IB – I0)
CN : Ifault∆ (IC – I0)
• For a two-phase fault AB : Ifault∆ (IA–IB)
BC : Ifault∆ (IB–IC)
CA : Ifault∆ (IC–IA)
• For a three-phase fault ABC : Ifault∆ (IA–IB)

The sampled data from the analogue input circuits is written to a cyclic buffer until a fault
condition is detected. The data in the input buffer is then held to allow the fault calculation to
be made. When the fault calculation is complete the fault location information is available in
the relay fault record.
When applied to parallel circuits mutual flux coupling can alter the impedance seen by the
fault locator. The coupling will contain positive, negative and zero sequence components. In
practice the positive and negative sequence coupling is insignificant. The effect on the fault
locator of the zero sequence mutual coupling can be eliminated by using the mutual
compensation feature provided. This requires that the residual current on the parallel line is
measured, as shown in Appendix B.
The calculation for single phase loop is based on the following equation:
R0–R1 dI dI dI dI
VAN = R1.Dfault.IA + .Dfault.3I0 + LAA.Dfault. A + LAB.Dfault. B + LAC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt
R0–R1 dI dI dI dI
VBN = R1.Dfault.IB + .Dfault.3I0 + LAB.Dfault. A + LBB.Dfault. B + LBC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt
R0–R1 dI dI dI dI
VCN = R1.Dfault.IC + .Dfault.3I0 + LAC.Dfault. A + LBC.Dfault. B + LCC.Dfault. C + Rfault.Ifault + Rm.Im + Lm. m
3 dt dt dt dt
With:
Rm: zero-sequence mutual resistance
Lm: zero-sequence mutual inductance
Im: zero-sequence mutual current
Ifault: fault current = ∆I – I0

The calculation for phase-to-phase loop is based on the following equation:
dIA dI dI R
VAB = R1.Dfault.(IA – IB) + (LAA – LAB).Dfault. + (LAB – LBB).Dfault. B + (LAC – LBC).Dfault. C + fault.Ifault
dt dt dt 2
dIA dI dI R
VBC = R1.Dfault.(IB – IC) + (LAB – LAC).Dfault. + (LBB – LBC).Dfault. B + (LBC – LCC).Dfault. C + fault.Ifault
dt dt dt 2
dIA dI dI R
VAC = R1.Dfault.(IC – IA) + (LAC – LAA).Dfault. + (LBC – LAB).Dfault. B + (LCC – LAC).Dfault. C + fault.Ifault
dt dt dt 2
MiCOM P441/P442 & P444 Page 35/44
With:
Ifault= ∆I (∆I = ∆I' - ∆I")
∆IA - ∆IB
∆IB - ∆IC
∆IC - ∆IA
4.6.1 Selecting the fault location data
Selection of the analogue data that is used depends on
• How the fault is processed by the algorithms.
• The line model.

4.6.2 Processing algorithms
Distance to fault calculation will use the high speed algorithms if
• A fault is detected by the high-speed algorithms
• The tripping occurred within the T1 or T2 time delays
• The distance to the fault is less than 105% of the line.

In this case, the distance to fault saved in the fault report will be displayed as:
Distance to the fault = 24.48 km (L) accuracy 3%
If all three of these conditions are not met, the distance to fault value will be the same value
used by the distance protection. The format of the display will then be as follows:
Distance to the fault = 31.02 km accuracy 5%
NOTE: The more accurate fault location will be post scripted with an (L). This
will occur when conditions are favourable for using the more accurate
algorithm for distance to fault calculation.
4.6.2.1 Line Model Selection
The fault locator can distinguish between two types of line, as follows:
• Single lines.
• Parallel lines with mutual coupling.

Mutual coupling between transmission lines is common on power systems. Significant
effects on distance relay operation during faults involving ground may occur. Typically, the
positive and negative, mutual-sequence impedance are negligible, but zero-sequence
mutual coupling may be large, and either must be factored onto the settings, or
accommodated by measurement of parallel, mutually-coupled lines residual (ground)
current, where zero-sequence current information is available. The value of the residual
currents from parallel lines is then integrated into the distance measurement equation.
The relay is capable of measuring and using mutually coupled residual current information
from parallel lines. The mutual current is measured by a dedicated analogue input.
Page 36/44 MiCOM P441/P442 & P444
4.7 Power swing detection

Power swings are caused by a lack of stability in the network with sudden load fluctuations.
A power swing may cause the two sources connected by the protected line to go out of step
(loose synchronism) with each other.
The power swing detection element may be used to selectively prevent when the measured
impedance point moves into the start-up characteristic from a power swing and still allows
tripping for a fault (fault evolving during a power swing). The power swing detection element
may also be used to selectively trip once an out-of-step condition has been declared.
figure 14 illustrates the characteristics of power swing.
Powerswing Z3
Boundary Stable R
Characteristic Unstable
Swing Swing
Z4
P3038ENa
FIGURE 14 - POWER SWING

4.7.1 Power swing detection
The power swing detection element is used to detect a stable power swing or loss of
synchronism condition (out-of-step) as it passes through near the loop convergence (start-
up) characteristic (Z3 and Z4 if enabled). Power swing detection is based on the status of
the line to be protected:
Power swings are characterised by the simultaneous appearance of three impedance points
in the start-up zone, passing through the power swing boundary ∆R/∆X .Their speed of entry
(passing through the resistance limits that define the power swing detector) is slower than
that in the case of three-phase faults, which is instantaneous.
The P44x does not differentiate a stable power swing from loss of synchronism condition.
A power swing is detected and declared if:
• At least one single-phase impedance is within the start-up zone after having crossed
the power swing band in more than 5 ms.
• The three impedance points have been in the power swing band for more than 5 ms.
• At least two poles of the breaker are closed (impedance measurement possible on two
phases).
MiCOM P441/P442 & P444 Page 37/44
4.7.2 Line in one pole open condition (during single-pole trip)

In this case, the power swing only occurs on two phases. A power swing is detected if:
• At least one single-phase impedance is within the start-up zone after having crossed
the power swing band in more than 5ms.
• The two impedance points have been in the power swing band for more than 5 ms.
NOTE: During an open-pole condition, the P44x monitors the power swing on
two single-phase loops. No external information is needed if the
voltage transformers are on the line side. If the voltage transformers
are on the bus side, the «pole discrepancy» signal should be used.
The «pole discrepancy» input represents a «one-circuit-breaker-pole-
open» condition.
4.7.3 Conditions for isolating lines
If there is a power swing, it may be necessary to trip and disconnect the two out-of-step
sources. There are various tripping and blocking options available that are used to select if
the line is tripped for power swings or not.
The selective blocking of remote zones allows the P44x to separate the network near the
electrical zero by tripping zone 1 only. Therefore, in the example given in figure 15, the relay
D trips out.
Electrical
Zero
A B C D E F
Relay set for out-of-step tripping,

zone 1.
P3039ENa
FIGURE 15 - SELECTIVE PROTECTION BLOCKING

4.7.4 Tripping logic
Depending on the blocking or unblocking selected, the P44x will trip or block as the swing
(stable or unstable) passes through the zones.
NOTE: If selected, tripping will occur if the impedance stays in any zone
longer than its time delay.
There is a master unblocking timer that is used to override any blocked zone (unblocking
time delay). This is used to separate the sources (open the breaker, 3-phase trip) in the
event that a block was taking place, and the impedance remained in the blocked zone for a
relatively long time. This would be indicative of a serious overcurrent condition as a result of
too great a power transfer after a disturbance (a power swing that does not pass through or
recover). If the impedance point moves out of the start-up characteristic again before the
time delay expires, a trip is not issued and the adjustable time delay is reset.
Unblocking the Zones Blocked due to Faults
In order to protect the network against a fault that may occur during power swing, blocking
signals can be stopped when current thresholds are exceeded. The adjustable unblocking
current thresholds are
• A residual current threshold equal to 0.1 In + (kr x Imax(t)).
• A negative-sequence current threshold equal to 0.1 In + (ki x Imax(t)).
• A phase current threshold: IMAX.

Page 38/44 MiCOM P441/P442 & P444
Where:
kr = an adjustable coefficient for residual or zero sequence current (3 x I0),
ki: = an adjustable coefficient for negative sequence current (I2),
Imax(t): maximum instantaneous current detected on one phase (A, B or C),
IN: nominal current
4.7.5 Fault Detection after Single-phase Tripping (one-pole-open condition)
After a circuit breaker pole has opened, there is no current and voltage on the applicable
phase, which allows the protection unit to detect whether a one-pole cycle of the voltage
transformer are on a line side.
The reception of «poles discrepancy» input signal allows the protection unit to detect one-
pole-open condition blocking if the voltage transformer is on the bus side.
If another fault appears during a one-pole cycle or just after the voltage has been restored on
the applicable phase, direction is defined and phase selection performed.
4.8 Double Circuit Lines
Double circuit lines must be taken into account in the operating principle of the protection
scheme to avoid unwanted tripping of «sound» phases, which could be the result of an
excessively general phase selection.
Phase selection for an inter-circuit fault
During a two-phase fault selection, for example on loop AB, the P44x checks direction on the
two adjacent ground loops, (A to Neutral and B to Neutral). The direction is determined
using either the conventional algorithm or the high-speed algorithm (using superimposed
quantities), depending on fault severity. If superimposed components are used, the
transient (fault) energy is summated phase by phase.
n
∑ (∆V
n
FaultDirec tionLoop _ AN = ∑ (∆V AN .∆I A ) FaultDirectionLoop_ BN = BN.∆IB )
n0 and n0
Z1 AN fault Z1 BN fault
AN Trip single pole Trip single pole

BN
P3040ENa
The directions of the two adjacent ground loops are compared, as follows:
• If the two directions are forward, the fault is a two-phase fault on the protected line.
• If only one of the directions is forward, for instance Sa, the fault is single-phase
(A to Neutral) on the protected line.
• If the two directions are reverse, the fault is not on the protected line.
MiCOM P441/P442 & P444 Page 39/44
Protection against Current Reversal (Transient Blocking)

When a fault occurs on a line, which is parallel to the protected line, the pilot schemes on the
protected line may be subjected current reversals from sequential clearing on the parallel
line. A fault on the parallel line may start by appearing external to the protected line in the
reverse direction, and then, after a sequential operation of one of the parallel line breakers,
the fault appears forward. This situation can affect security of certain pilot schemes on the
protected line.
Reverse Forward
3 4
3 4
Weak 1 2 Strong
Source Forward Forward Source
1 2
All breakers closed
Relay 3 senses reverse current
3 4
Forward Reverse
3 4
Weak 1 2 Strong
Source Source
1 Forward 2
Breaker 1 opens
Relay 3 senses forward current
P3041ENa
FIGURE 16 - DIRECTION REVERSAL FROM SEQUENTIAL CLEARING OF PARALLEL LINES

The P44x provides protection against the effects of this phenomenon by employing transient
blocking. An adjustable timer is available that will block direct and permissive transfer trip
signals from being used in the P44x logic, and will also block the P44x from sending direct or
permissive transfer trip signals. This timer is designated as «Reverse Guard Timer».
This provides protection against fault current reversal and will still allow fast tripping in the
event of faults occurring in zone 1, if zone 1 is independent (not used as overreach zone).
Page 40/44 MiCOM P441/P442 & P444
4.9 DEF Protection Against High Resistance Ground Faults

Protection against high-resistance ground faults, also called DEF (Directional Earth Fault), is
used to protect the network against highly resistive faults. High resistance faults may not be
detected by distance protection. DEF Protection can be applied in one of the two following
modes: faults using the following:
• The main operating mode, directional comparison protection uses the signalling
channel and is a communication-aided scheme.
• In backup-operating mode SBEF (Stand-By Earth Fault), an inverse/definite time

ground overcurrent element with 2 stages is selectable. A communication channel is
not used - OR – a zero sequence power with IDMT Time Delay (see section 5 in
chapter P44x/EN AP)
Both the main and backup mode can use different methods for fault detection and directional
determination (negative or zero sequence polarisation, RCA angle settable for backup SBEF
protection, etc.)
The use of Aided-Trip logic in conjunction with the DEF element allows faster trip times, and
can facilitate single-phase tripping if single-phase tripping is applied to the breaker.
The DEF directional comparison protection may be applied on the same signal channel as
the distance protection, or it may be applied on an independent channel (facility to use two
different aided-trip logic for distance or DEF element).
When used on the same signalling channel as the distance protection, if the distance
protection picks up, it has priority (the output from the DEF element is blocked from asserting
the Carrier Send common output).
The use of directional comparison protection with an independent signalling channel allows
the distance functions and DEF function to operate in parallel. Each function is routed to its
own Carrier Send output. If a ground fault is present where both the distance and DEF
elements pick up, the faster of the two functions will perform the trip.
4.9.1 High Resistance Ground Fault Detection
A high resistance fault is detected when residual or zero sequence voltage (3V0), and
current thresholds are exceeded or using the high speed algorithms:
• ∆I ≥ 0.05 IN
• ∆V ≥ 0.1 VN (L-G)
A fault is confirmed if these thresholds are exceeded for more then 1 ½ cycles
4.9.2 Directional determination
The fault direction is determined by measuring the angle between the residual voltage and
the residual current derivative. The fault is forward if the angle is between –14° and +166°.
A negative or zero sequence polarisation is selectable in order to determinate the earth fault
direction.
4.9.3 Phase selection
The phase is selected in the same way as for distance protection except that the current
threshold is reduced (∆I ≥ 5% x IN and ∆V ≥ 10% x VN)
NOTE: If the phase has not been selected within one cycle, a three-phase
selection is made automatically.
MiCOM P441/P442 & P444 Page 41/44
4.9.4 Tripping Logic

Legend For Tripping Logic Diagrams (DEF)
Abbreviation Definition
Vr> Threshold of residual or zero sequence voltage (3Vo)
Ied Threshold of residual current for forward fault
Forward Forward directional with zero/negative sequence polarisation
Reverse Reverse directional with zero/negative sequence polarisation
DEF blocking Blocking of DEF element
Carrier Receive DEF Carrier received for the principal line protected (same channel as
distance protection)
Iev Threshold of residual current (0.6 x Ied)
Tripping mode Single or three-phase tripping (selectable)
Z< starting Convergence at least 1 of 6 loops within the tripping
characteristic (internal starting of the distance element)
t_cycle Additional time delay (150ms) of 1 pole AR cycle
t_delay Tripping time delay
t_trans Carrier Send delay settable
Forward Startup
Vr>threshold
Ied threshold
Forward decision & & Carrier Send DEF
Reverse decision &
Blocking DEF
Carrier Received DEF &
Single phase selection & Single Phase Trip

0
Iev threshold
T
t-delay Single
Reverse decision
Vr>threshold
& & Reversal Startup
Tripping mode
1 pole dead 0
1
T
Z< starting t-cycle
&
Independant & Three Phase Trip
channels DIST/DEF
Three
2 Pole or 3 Pole Selection 1
P3042ENa
FIGURE 17 - DIRECTIONAL COMPARISON PROTECTION PERMISSIVE SCHEME

Page 42/44 MiCOM P441/P442 & P444
Forward Startup
Vr>threshold
Ied threshold 0
Forward decision & & &
Reverse decision T
t-trans
Carrier Received DEF

&
Blocking DEF
Single phase selection & Single Phase Trip
0
Iev threshold
T
t-delay Single
& Blocking Carrier Send

Reverse decision
Vr>threshold
&
Tripping Mode
& Reversal Startup
1 pole dead 0
1
T
Z< starting t-cycle
&
Independant & Three Phase Trip
channels DIST/DEF
Three
2 Pole or 3 Pole Selection 1
P3043ENa
FIGURE 18 - DIRECTIONAL COMPARISON PROTECTION BLOCKING SCHEME

If the DEF directional comparison transmission is selected on the same channel that is used
to transmit distance aided-trip messages, the DEF will have the same tripping logic as the
main protection (permissive or blocking).
4.9.5 SBEF – Stand-By earth fault (not communication-aided)
This protection trips the local breaker directly, without a aided-trip signal, if a high resistance
fault remains after a time delay. The time delay varies inversely with the value of the fault
current. The selectable inverse time curves comply with the ANSI and IEC standards (see
Appendix A).
This protection three-pole trips and can block autoreclosing.
CTS Block
&
IN>x start
& SBEF
Slow VTS
Block
& Directional
Check
Trip
Vx > Vs & IDMT/DT
Ix > Is
SBEF Timer Block

P3044ENa
FIGURE 19 - SBEF – STAND-BY EARTH FAULT

MiCOM P441/P442 & P444 Page 43/44
5. SELF TESTING & DIAGNOSTICS

The relay includes a number of self-monitoring functions to check the operation of its
hardware and software when it is in service. These are included so that if an error or fault
occurs within the relay’s hardware or software, the relay is able to detect and report the
problem and attempt to resolve it by performing a re-boot. This involves the relay being out
of service for a short period of time which is indicated by the ‘Healthy’ LED on the front of the
relay being extinguished and the watchdog contact at the rear operating. If the restart fails to
resolve the problem, then the relay will take itself permanently out of service. Again this will
be indicated by the LED and watchdog contact.
If a problem is detected by the self-monitoring functions, the relay attempts to store a
maintenance record in battery backed-up SRAM to allow the nature of the problem to be
notified to the user.
The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which
is performed when the relay is booted-up, e.g. at power-on, and secondly a continuous self-
checking operation which checks the operation of the relay’s critical functions whilst it is in
service.
5.1 Start-up self-testing
The self-testing which is carried out when the relay is started takes a few seconds to
complete, during which time the relay’s protection is unavailable. This is signalled by the
‘Healthy’ LED on the front of the relay which will illuminate when the relay has passed all of
the tests and entered operation. If the testing detects a problem, the relay will remain out of
service until it is manually restored to working order.
The operations that are performed at start-up are as follows:
5.1.1 System boot
The integrity of the flash EPROM memory is verified using a checksum before the program
code and data stored in it is copied into SRAM to be used for execution by the processor.
When the copy has been completed the data then held in SRAM is compared to that in the
flash EPROM to ensure that the two are the same and that no errors have occurred in the
transfer of data from flash EPROM to SRAM. The entry point of the software code in SRAM
is then called which is the relay initialisation code.
5.1.2 Initialisation software
The initialisation process includes the operations of initialising the processor registers and
interrupts, starting the watchdog timers (used by the hardware to determine whether the
software is still running), starting the real-time operating system and creating and starting the
supervisor task. In the course of the initialisation process the relay checks:
• the status of the battery.
• the integrity of the battery backed-up SRAM that is used to store event, fault and
disturbance records.
• the voltage level of the field voltage supply which is used to drive the opto-isolated
inputs.
• the operation of the LCD controller.
• the watchdog operation.

At the conclusion of the initialisation software the supervisor task begins the process of
starting the platform software.
Page 44/44 MiCOM P441/P442 & P444
5.1.3 Platform software initialisation & monitoring

In starting the platform software, the relay checks the integrity of the data held in E2PROM
with a checksum, the operation of the real-time clock, and the IRIG-B board if fitted. The final
test that is made concerns the input and output of data; the presence and healthy condition
of the input board is checked and the analogue data acquisition system is checked through
sampling the reference voltage.
At the successful conclusion of all of these tests the relay is entered into service and the
protection started-up.
5.2 Continuous self-testing
When the relay is in service, it continually checks the operation of the critical parts of its
hardware and software. The checking is carried out by the system services software (see
section on relay software earlier in this chapter) and the results reported to the platform
software. The functions that are checked are as follows:
• the flash EPROM containing all program code and language text is verified by a
checksum.
• the code and constant data held in SRAM is checked against the corresponding data
in flash EPROM to check for data corruption.
• the SRAM containing all data other than the code and constant data is verified with a
checksum.
• the E2PROM containing setting values is verified by a checksum.
• the battery status.
• the level of the field voltage.
• the integrity of the digital signal I/O data from the opto-isolated inputs and the relay
contacts is checked by the data acquisition function every time it is executed. The
operation of the analogue data acquisition system is continuously checked by the
acquisition function every time it is executed, by means of sampling the reference
voltages.
• the operation of the IRIG-B board is checked, where it is fitted, by the software that
reads the time and date from the board.
In the unlikely event that one of the checks detects an error within the relay’s subsystems,
the platform software is notified and it will attempt to log a maintenance record in battery
backed-up SRAM. If the problem is with the battery status or the IRIG-B board, the relay will
continue in operation. However, for problems detected in any other area the relay will initiate
a shutdown and re-boot. This will result in a period of up to 5 seconds when the protection is
unavailable, but the complete restart of the relay including all initialisations should clear most
problems that could occur. As described above, an integral part of the start-up procedure is a
thorough diagnostic self-check. If this detects the same problem that caused the relay to
restart, i.e. the restart has not cleared the problem, then the relay will take itself permanently
out of service. This is indicated by the ‘Healthy’ LED on the front of the relay, which will
extinguish, and the watchdog contact which will operate.
Application Notes P44x/EN AP/E33
MiCOM P441/P442 & P444
APPLICATION NOTES
MiCOM P441/P442 & P444 Page 1/220
CONTENT
1. INTRODUCTION 7
1.1 Protection of overhead lines and cable circuits 7
1.2 MiCOM distance relay 7
1.2.1 Protection Features 8
1.2.2 Non-Protection Features 9
1.2.3 Additional Features for the P441 Relay Model 9
1.3 Remark 10
2. APPLICATION OF INDIVIDUAL PROTECTION FUNCTIONS 11

2.1 Configuration column 11
2.2 Phase fault distance protection 12
2.3 Earth fault distance protection 13
2.4 Consistency between zones 14
2.5 General Distance Trip logic 15
2.5.1 Equation 15
2.5.2 Inputs 15
2.5.3 Outputs 16
2.6 Type of trip 16
2.6.1 Inputs 16
2.6.2 Outputs 16
2.7 Distance zone settings 16
2.7.1 Settings table 17
2.7.2 Zone Logic Applied 19
2.7.3 Zone Reaches 22
2.7.4 Zone Time Delay Settings 24
2.7.5 Residual Compensation for Earth Fault Elements 24
2.7.6 Resistive Reach Calculation - Phase Fault Elements 25
2.7.7 Resistive Reach Calculation - Earth Fault Elements 27
2.7.8 Effects of Mutual Coupling on Distance Settings 27
2.7.9 Effect of Mutual Coupling on Zone 1 Setting 27
2.7.10 Effect of Mutual Coupling on Zone 2 Setting 28
2.8 Distance protection schemes 29
2.8.1 Settings 30
2.8.2 Carrier send & Trip logic 31
2.8.3 The Basic Scheme 33
2.8.4 Zone 1 Extension Scheme 36
2.8.5 Loss of Load Accelerated Tripping (LoL) 38
P44x/EN AP/E33 Application Notes
Page 2/220 MiCOM P441/P442 & P444
2.9 Channel-aided distance schemes 41

2.9.1 Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd 41
2.9.2 Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1 44
2.9.3 Permissive Overreach Schemes Weak Infeed Features 46
2.9.4 Permissive Scheme Unblocking Logic 49
2.9.5 Blocking Schemes BOP Z2 and BOP Z1 53
2.10 Distance schemes current reversal guard logic 56
2.10.1 Permissive Overreach Schemes Current Reversal Guard 56
2.10.2 Blocking Scheme Current Reversal Guard 56
2.11 Distance schemes in the “open” programming mode 57
2.12 Switch On To Fault and Trip On Reclose protection 57
2.12.1 Initiating TOR/SOTF Protection 59
2.12.2 TOR-SOTF Trip Logic 61
2.12.3 Switch on to Fault and Trip on Reclose by I>3 Overcurrent Element (not filtered for
inruch current): 63
2.12.4 Switch on to Fault and Trip on Reclose by Level Detectors 63
2.12.5 Setting Guidelines 65
2.12.6 Inputs /Outputs in SOTF-TOR DDB Logic 66
2.13 Power swing blocking (PSB) 67
2.13.1 The Power Swing Blocking Element 68
2.13.2 Unblocking of the Relay for Faults During Power Swings 69
2.13.3 Typical Current Settings 72
2.13.4 Removal of PSB to Allow Tripping for Prolonged Power Swings 72
2.14 Directional and non-directional overcurrent protection 72
2.14.1 Application of Timer Hold Facility 75
2.14.2 Directional Overcurrent Protection 75
2.14.3 Time Delay VTS 75
2.15 Negative sequence overcurrent protection (NPS) 78
2.15.2 Negative phase sequence current threshold, ‘I2> Current Set’ 79
2.15.3 Time Delay for the Negative Phase Sequence Overcurrent Element, ‘I2> Time Delay’ 79
2.15.4 Directionalising the Negative Phase Sequence Overcurrent Element 79
2.16 Broken conductor detection 80
2.16.2 Example Setting 81
2.17 Directional and non-directional earth fault protection 82
2.17.1 Directional Earth Fault Protection (DEF) 84
2.17.2 Application of Zero Sequence Polarising 84
2.17.3 Application of Negative Sequence Polarising 85
MiCOM P441/P442 & P444 Page 3/220
2.18 Aided DEF protection schemes 85

2.18.1 Polarising the Directional Decision 86
2.18.2 Aided DEF Permissive Overreach Scheme 87
2.18.3 Aided DEF Blocking Scheme 88
2.19 Undervoltage protection 90
2.20 Overvoltage protection 91
2.21 Circuit breaker fail protection (CBF) 92
2.21.1 Breaker Failure Protection Configurations 92
2.21.2 Reset Mechanisms for Breaker Fail Timers 94
2.21.3 Typical settings 98
3. OTHER PROTECTION CONSIDERATIONS-SETTINGS EXAMPLE 99

3.1 Distance Protection Setting Example 99
3.1.1 Objective 99
3.1.2 System Data 99
3.1.3 Relay Settings 99
3.1.4 Line Impedance 99
3.1.5 Zone 1 Phase Reach Settings 100
3.1.8 Zone 4 Reverse Settings with no Weak Infeed Logic Selected 100
3.1.9 Zone 4 Reverse Settings with Weak Infeed Logic Selected 100
3.1.10 Residual Compensation for Earth Fault Elements 101
3.1.11 Resistive Reach Calculations 101
3.1.12 Power Swing Band 102
3.1.13 Current Reversal Guard 102
3.1.14 Instantaneous Overcurrent Protection 102
3.2 Teed feeder protection 103
3.2.1 The Apparent Impedance Seen by the Distance Elements 103
3.2.2 Permissive Overreach Schemes 103
3.2.3 Permissive Underreach Schemes 104
3.2.4 Blocking Schemes 105
3.3 Alternative setting groups 105
3.3.1 Selection of Setting Groups 106
4. APPLICATION OF NON-PROTECTION FUNCTIONS 108

4.1 Fault locator 108
4.1.1 Mutual Coupling 109
Page 4/220 MiCOM P441/P442 & P444
4.2 Voltage transformer supervision (VTS) – Main VT for minZ measurement 110
4.2.1 VTS logic description 110
4.2.2 The internal detection FUSE Failure condition 112
4.2.3 Fuse Failure Alarm reset 112
4.2.4 Loss of One or Two Phase Voltages 113
4.2.5 Loss of All Three Phase Voltages Under Load Conditions 113
4.2.6 Absence of Three Phase Voltages Upon Line Energisation 113
4.2.7 Menu Settings 114
4.2.8 INPUT / OUTPUT used in VTS logic: 115
4.3 Current Transformer Supervision (CTS) 115
4.3.1 The CT Supervision Feature 115
4.3.2 Setting the CT Supervision Element 116
4.4 Check synchronisation 116
4.4.1 Dead Busbar and Dead Line 118
4.4.2 Live Busbar and Dead Line 118
4.4.3 Dead Busbar and Live Line 118
4.4.4 Check Synchronism Settings 119
4.4.5 Logic inputs / Outputs from synchrocheck function 123
4.5 Autorecloser 125
4.5.1 Autorecloser Functional Description 125
4.5.2 Benefits of Autoreclosure 127
4.5.3 Auto-reclose logic operating sequence 128
4.5.4 Scheme for Three Phase Trips 134
4.5.5 Scheme for Single Pole Trips 134
4.5.6 Logical Inputs used by the Autoreclose logic 136
4.5.7 Logical Outputs generated by the Autoreclose logic 142
4.5.9 Choice of Protection Elements to Initiate Autoreclosure 149
4.5.10 Number of Shots 149
4.5.11 Dead Timer Setting 150
4.5.12 De-Ionising Time 150
4.5.13 Reclaim Timer Setting 151
4.6 Circuit breaker state monitoring 152
4.6.1 Circuit Breaker State Monitoring Features 152
4.6.2 Inputs / outputs DDB for CB logic: 156
4.7 Circuit breaker condition monitoring 157
4.7.1 Circuit Breaker Condition Monitoring Features 157
4.7.2 Setting guidelines 159
4.7.3 Setting the Number of Operations Thresholds 159
4.7.4 Setting the Operating Time Thresholds 160
4.7.5 Setting the Excessive Fault Frequency Thresholds 160
4.7.6 Inputs/Outputs for CB Monitoring logic 160
MiCOM P441/P442 & P444 Page 5/220
4.8 Circuit Breaker Control 161

4.9 Event Recorder 165
4.9.1 Change of state of opto-isolated inputs. 167
4.9.2 Change of state of one or more output relay contacts. 167
4.9.3 Relay Alarm conditions. 168
4.9.4 Protection Element Starts and Trips 168
4.9.5 General Events 168
4.9.6 Fault Records 169
4.9.7 Maintenance Reports 169
4.9.8 Setting Changes 169
4.9.9 Resetting of Event / Fault Records 169
4.9.10 Viewing Event Records via MiCOM S1 Support Software 170
4.10 Disturbance recorder 171
5. NEW ADDITIONAL FUNCTIONS – VERSION C1.X 175

5.1 Maximum of Residual Power Protection – Zero Sequence Power Protection 175
5.1.1 Function description 175
5.1.2 Settings & DDB cells assigned to zero sequence power (ZSP) function 177
5.2 Capacitive Voltage Transformers Supervision (CVT) 178
5.2.1 Function description 178
5.2.2 Settings & DDB cells assigned to Capacitive Voltage Transformers Supervision
(CVT) function 179
6. PROGRAMMABLE SCHEME LOGIC DEFAULT SETTINGS 180

6.1 HOW TO USE PSL Editor? 180
6.2 Logic input mapping 182
6.3 Relay output contact mapping 185
6.4 Relay output conditioning 186
6.5 Programmable led output mapping 188
6.6 Fault recorder trigger 188
7. CURRENT TRANSFORMER REQUIREMENTS 189

7.1 CT Knee Point Voltage for Phase Fault Distance Protection 189
7.2 CT Knee Point Voltage for Earth Fault Distance Protection 189
7.3 Recommended CT classes (British and IEC) 189
7.4 Determining Vk for an IEEE “C" class CT 189
8. DDB DESCRIPTION FOR ALL TYPES P441/P442 & P444 MODELS 189
Page 6/220 MiCOM P441/P442 & P444
BLANK PAGE
MiCOM P441/P442 & P444 Page 7/220
1. INTRODUCTION
1.1 Protection of overhead lines and cable circuits
Overhead lines are amongst the most fault susceptible items of plant in a modern power
system. It is therefore essential that the protection associated with them provides secure
and reliable operation. For distribution systems, continuity of supply is of para mount
importance. The majority of faults on overhead lines are transient or semi-permanent in
nature, and multi-shot autoreclose cycles are commonly used in conjunction with
instantaneous tripping elements to increase system availability. Thus, high speed, fault
clearance is often a fundamental requirement of any protection scheme on a distribution
network. The protection requirements for sub-transmission and higher voltage systems must
also take into account system stability. Where systems are not highly interconnected the
use of single phase tripping and high speed autoreclosure is commonly used. This in turn
dictates the need for high speed protection to reduce overall fault clearance times.
Underground cables are vulnerable to mechanical damage, such as disturbance by
construction work or ground subsidence. Also, faults can be caused by ingress of ground
moisture into the cable insulation, or its buried joints. Fast fault clearance is essential to limit
extensive damage, and avoid the risk of fire, etc.
Many power systems use earthing arrangements designed to limit the passage of earth fault
current. Methods such as resistance earthing make the detection of earth faults difficult.
Special protection elements are often used to meet such onerous protection requirements.
Physical distance must also be taken into account. Overhead lines can be hundreds of
kilometres in length. If high speed, discriminative protection is to be applied it will be
necessary to transfer information between the line ends. This not only puts the onus on the
security of signalling equipment but also on the protection in the event of loss of this signal.
Thus, backup protection is an important feature of any protection scheme. In the event of
equipment failure, maybe of signalling equipment or switchgear, it is necessary to provide
alternative forms of fault clearance. It is desirable to provide backup protection which can
operate with minimum time delay and yet discriminate with the main protection and
protection elsewhere on the system.
1.2 MiCOM distance relay
MiCOM relays are a range of products from T&D EAI. Using advanced numerical
technology, MiCOM relays include devices designed for application to a wide range of power
system plant such as motors, generators, feeders, overhead lines and cables.
Each relay is designed around a common hardware and software platform in order to
achieve a high degree of commonality between products. One such product in the range is
the series of distance relays. The relay series has been designed to cater for the protection
of a wide range of overhead lines and underground cables from distribution to transmission
voltage levels.
The relay also includes a comprehensive range of non-protection features to aid with power
system diagnosis and fault analysis. All these features can be accessed remotely from one
of the relays remote serial communications options.
Page 8/220 MiCOM P441/P442 & P444
1.2.1 Protection Features

The distance relays offer a comprehensive range of protection functions, for application to
many overhead line and underground cable circuits. There are 3 separate models available,
the P441, P442 and P444. The P442 and P444 models can provide single and three pole
tripping. The P441 model provides three pole tripping only. The protection features of each
model are summarised below:
• 21G/21P : Phase and earth fault distance protection, each with up to 5 independent
zones of protection. Standard and customised signalling schemes are available to
give fast fault clearance for the whole of the protected line or cable.
• 50/51 : Instantaneous and time delayed overcurrent protection - Four elements are
available, with independent directional control for the 1st and 2nd element. The fourth
element can be configured for stub bus protection in 1½ circuit breaker arrangements.
The 3rd element can be used for SOFT/TOR logic.
• 50N/51N : Instantaneous and time delayed neutral overcurrent protection. Two

element are available and four threshold from next version C1.0 (model 020G or
020H).
• 67N : Directional earth fault protection (DEF) - This can be configured for channel
aided protection, plus two elements are available for backup DEF.
• 32N : Maximum of Residual Power Protection - Zero sequence Power Protection
This element can provide protection element for high resistance fault, eliminated
without communication channel.
• 27 : Undervoltage Protection - Two stage, configurable to measure either phase to
phase or phase to neutral voltage. Stage 1 may be selected as either IDMT or DT and
stage 2 is DT only.
• 59 : Overvoltage Protection - Two stage, configurable to measure either phase to
phase or phase to neutral voltage. Stage 1 may be selected as either IDMT or DT and
stage 2 is DT only.
• 67/46 : Directional or non-directional negative sequence overcurrent protection - This
element can provide backup protection for many unbalanced fault conditions.
• 50/27 : Switch on to fault (SOTF) protection - These settings enhance the protection
applied for manual circuit breaker closure.
• 50/27 :Trip on reclose (TOR) protection - These settings enhance the protection
applied on autoreclosure of the circuit breaker.
• 78 : Power swing blocking - Selective blocking of distance protection zones ensures
stability during the power swings experienced on sub-transmission and transmission
systems. From version C1.0, the relay can differentiate between a stable power swing
and a loss of synchronism (out of steps).
• VTS : Voltage transformer supervision (VTS). To detect VT fuse failures. This
prevents maloperation of voltage dependent protection on AC voltage input failure.
• CTS : Current transformer supervision - To raise an alarm should one or more of the
connections from the phase CTs become faulty.
• 46 BC : Broken conductor detection - To detect network faults such as open circuits,
where a conductor may be broken but not in contact with another conductor or the
earth.
• 50 BF : Circuit breaker failure protection - Generally set to backtrip upstream circuit
breakers, should the circuit breaker at the protected terminal fail to trip. Two stages
are provided.
MiCOM P441/P442 & P444 Page 9/220
1.2.2 Non-Protection Features

The P441, P442 and P444 relays have the following non-protection features:
• 79/25 : Autoreclosure with Check synchronism - This permits up to 4 reclose shots,

with voltage synchronism, differential voltage, live line/dead bus, and dead bus/live
line interlocking available. Check synchronism is optional.
• Measurements - Selected measurement values polled at the line/cable terminal,

available for display on the relay or accessed from the serial communications facility.
• Fault/Event/Disturbance Records - Available from the serial communications or on

the relay display (fault and event records only).
• Distance to fault locator - Reading in km, miles or % of line length.
• Four Setting Groups - Independent setting groups to cater for alternative power
system arrangements or customer specific applications.
• Remote Serial Communications - To allow remote access to the relays. The following
communications protocols are supported: Courier, MODBUS, IEC60870-5/103 and
DNP3 (UCA2 soon available).
• Continuous Self Monitoring - Power on diagnostics and self checking routines to

provide maximum relay reliability and availability.
• Circuit Breaker State Monitoring - Provides indication of any discrepancy between

circuit breaker auxiliary contacts.
• Circuit Breaker Control - Opening and closing of the circuit breaker can be achieved
either locally via the user interface / opto inputs, or remotely via serial
communications.
• Circuit Breaker Condition Monitoring - Provides records / alarm outputs regarding the
number of CB operations, sum of the interrupted current and the breaker operating
time.
• Commissioning Test Facilities.

1.2.3 Additional Features for the P441 Relay Model
• 8 Logic Inputs - For monitoring of the circuit breaker and other plant status.
• 14 Output relay contacts - For tripping, alarming, status indication and remote
control.
• Single pole tripping and autoreclose.
• Real Time Clock Synchronisation - Time synchronisation is possible from the relay
IRIG-B input. (IRIG-B must be specified as an option at time of order).
• Fibre optic converter for IEC60870-5/103 communication (optional).
• Second rear port in COURIER Protocol (KBus/RS232/RS485)
control.
Page 10/220 MiCOM P441/P442 & P444
• Single pole tripping and autoreclose.
• Real Time Clock Synchronisation - Time synchronisation is possible from the relay
IRIG-B input. (IRIG-B must be specified as an option at time of order).
• Fibre optic converter for IEC60870-5/103 communication (optional).
• Second rear port in COURIER Protocol (KBus/RS232/RS485)
control.
1.3 Remark
The PSL screen copy extracted from S1, uses the different types of model P44x (07, 09…).
(See the DDB equivalent table with the different model number).
Example : check synch OK (model 07) = DDB204
check synch OK (model 09) = DDB236
MiCOM P441/P442 & P444 Page 11/220
2. APPLICATION OF INDIVIDUAL PROTECTION FUNCTIONS

The following sections detail the individual protection functions in addition to where and how
they may be applied. Each section also gives an extract from the respective menu columns
to demonstrate how the settings are applied to the relay.
The P441, P442 and P444 relays each include a column in the menu called the
‘CONFIGURATION’ column. As this affects the operation of each of the individual protection
functions, it is described in the following section.
2.1 Configuration column
The following table shows the Configuration column:-
Menu text Default setting Available settings

CONFIGURATION
Restore Defaults No Operation No Operation
All Settings
Setting Group 1
Setting Group 2
Setting Group 3
Setting Group 4
Setting Group Select via Menu Select via Menu
Select via Optos
Active Settings Group 1 Group1
Group 2
Group 3
Group 4
Save Changes No Operation No Operation
Save
Abort
Copy From Group 1 Group1,2,3 or 4
Copy To No Operation No Operation
Group1,2,3 or 4
Setting Group 1 Enabled Enabled or Disabled
Setting Group 2 Disabled Enabled or Disabled
Distance Enabled Enabled or Disabled
Power Swing Enabled Enabled or Disabled
Back-up I> Disabled Enabled or Disabled
Neg Sequence O/C Disabled Enabled or Disabled
Broken Conductor Disabled Enabled or Disabled
Earth Fault O/C Disabled Enabled or Disabled
Aided DEF Enabled Enabled or Disabled
Zero Seq. power (*) Disabled Enabled or Disabled
Volt Protection Disabled Enabled or Disabled
CB Fail & I< Enabled Enabled or Disabled
Supervision Enabled Enabled or Disabled
System Checks Disabled Enabled or Disabled
Page 12/220 MiCOM P441/P442 & P444
Menu text Default setting Available settings

Internal A/R Disabled Enabled or Disabled
Input Labels Visible Invisible or Visible
Output Labels Visible Invisible or Visible
CT & VT Ratios Visible Invisible or Visible
Event Recorder Invisible Invisible or Visible
Disturb Recorder Invisible Invisible or Visible
Measure’t Setup Invisible Invisible or Visible
Comms Settings Visible Invisible or Visible
Commission Tests Visible Invisible or Visible
Setting Values Primary Primary or Secondary
(*) from B1.0

The aim of the Configuration column is to allow general configuration of the relay from a
single point in the menu. Any of the functions that are disabled or made invisible from this
column do not then appear within the main relay menu.
2.2 Phase fault distance protection
The P441, P442 and P444 relays have 5 zones of phase fault protection, as shown in the
impedance plot Figure 1 below.
X( /phase)
ZONE 3
ZONE P
ZONE 2
ZONE 1X
ZONE 1
R1Ph/2 R2Ph/2 RpPh/2 R3Ph/2 = R4Ph/2 R ( /phase)
ZONE 4
P0470ENa
FIGURE 1 – PHASE/PHASE FAULT QUADRILATERAL CHARACTERISTICS ( /PHASE SCHEME)

Remarks: 1. R limit value in MiCOM S1, are in ohms loop.
2. In a Ω/phase scheme the R value must be divided by 2 (for
phase/phase diagram).
3. The angle of the start element (Quad) is the angle of the
positive impedance of the line (value adjusted in the settings)
MiCOM P441/P442 & P444 Page 13/220
All phase fault protection elements are quadrilateral shaped, and are directionalied as
follows:
• Zones 1, 2 and 3 - Directional forward zones, as used in conventional three zone

distance schemes. Note that Zone 1 can be extended to Zone 1X when required in
zone 1 extension schemes (see page 17 §2.5.2).
• Zone P - Programmable. Selectable in MiCOM S1 (Distance scheme\Fault type) as

a directional forward or reverse zone.
• Zone 4 - Directional reverse zone. Note that zone 3 and zone 4 can be set with
same Rloop value to provide a general start of the relay.
Remark: If any zone i presents a Rloop i bigger than R3=R4, the limit of the
start is always given by R3. See also the "Commissioning Test"
chapter.
2.3 Earth fault distance protection
The P441, P442 and P444 relays have 5 zones of earth (ground) fault protection, as shown
in the earth loop impedance plot Figure 2 below.
Type of fault can be selected in MiCOM S1 (only Phase/Phase or P/P & P/Ground)
X( /phase)
ZONE 3
ZONE P (Programmable)
ZONE 2
ZONE 1X
ZONE 1
R1G R2G RpG R3G = R4G

1+KZ 1+KZ 1+KZ 1+KZ 1+KZ
1 2 p 3/4 3/4 R( /phase)
ZONE P Reverse
ZONE 4
P0471ENa
FIGURE 2 – PHASE/GROUND FAULT QUADRILATERAL CHARACTERISTICS ( /PHASE SCHEME)
Remarks: 1. In a Ω/phase scheme the R value must be divided by 1+KZ (for

phase/ground diagram)
2. The angle of the start element (Quad) is the angle of the
2Z1+Z0 (Z1: positive sequence Z, Z0: zero sequence Z)
3. See calculation of KZ in section 2.6.5.
Page 14/220 MiCOM P441/P442 & P444
All earth fault protection elements are quadrilateral shaped, and are directionalised as per
the phase fault elements. The reaches of the earth fault elements use residual
compensation of the corresponding phase fault reach. The residual compensation factors
are as follows:
• kZ1 - For zone 1 (and zone 1X);
• kZ2 - For zone 2;
• kZ3/4 - Shared by zones 3 and 4;
• kZp - For zone P.

2.4 Consistency between zones
In order to understand how the different distance zones interact the parameters below
should be considered:
• If Zp is a forward zone
− Z1 ! Z2 < Zp < Z3
− tZ1 < tZ2 < tZp < tZ3
− R1G < R2G < RpG < R3G = R4G
− R1Ph < R1extPh < R2Ph < RpPh < R3Ph
• If Zp is a reverse zone
− Z1 < Z2 < Z3
− Zp > Z4
− tZ1 < tZ2 < tZ3
− tZp < tZ4
− R1G < R2G < R3G
− RpG < R3G = R4G
− R1Ph < R2Ph < R3Ph
− RpPh < R3Ph = R4Ph
− R3G < UN / (1.2 X √3 IN)
− R3Ph < UN / (1.2 X √3 IN)
Remarks: 1. If Z3 is disabled, the forward limit element becomes the
smaller zone Z2- (or Zp if selected forward)
2. If Z4 is disabled, the directional limit for the forward zone is: 30°
(since version A4.0)
3. For older version than A4.0, the directional limit is: 0° (when Z4
is selected: disable).
Conventional rules are used as follows:
− Distance Timers are initiated as soon as the relay has picked up – CVMR pickup
distance
(CVMR = Start & Convergence)
− The minimum tripping time even with Carrier received is T1
− Zone 4 is always Reverse
MiCOM P441/P442 & P444 Page 15/220
2.5 General Distance Trip logic

2.5.1 Equation
Z1'.T1. BZ1 . PZ1

+ Z1x'.(None + Z1xSiAnomTac.UNB_Alarm).[ T1. INP_Z1EXT]
+ UNB_CR.T1.[ PZ1.Z1'+PZ2.Z2'+PFwd.Aval’]
+ UNB_CR .T1.(Tp +INP_COS(*)).[ Z1'.BZ1 + (Z2'.BZ2. INP_COS (*)])
+ T2 [ Z2' + PZ1.Z1' + BZ1.Z1']
+ Z3'.T3
+ Zp' .Tzp
+ Z4'.T4
[(*) from version A2.10 & A3.1]
(See Figure 3 in section 2.7.2.1- Z’ logic description)
Remarks: 4. In case of COS (carrier out of service), the logic swap back to a
basic scheme.
5. In the column Data Type:"Configuration" means MiCOM S1 Setting
(the parameter is present in the settings).
With the inputs/outputs described above:
2.5.2 Inputs
Data Type Description

T1 to T4 Internal logic Elapse of Distance Timer 1 to 4 (T1/T2/T3/TZp/T4)
Tp Internal logic Elapse of transmission time in blocking scheme
Z1' to Z4' (*) Internal logic Detection of fault in zones 1 to 4
(lock out by PSWing or Rev Guard) – See figure 3 section
2.7.21
Forward’ Internal logic Fwd Fault Detection l (lockout by reversal guard)
UNB_CR Internal logic Carrier Received
INP_COS TS Opto Carrier Out of Service
CSZ1 Configuration Carrier send in case of zone 1 decision
CSZ2 Configuration Carrier send in case of zone 2 decision
CSZ4 Configuration Carrier send in case of zone 4 decision (Reverse)
None Configuration Scheme without carrier
PZ1 Configuration Permissive scheme Z1
PZ2 Configuration Permissive scheme Z2
PFwd Configuration Permissive Scheme with directional Fwd
BZ1 Configuration Blocking scheme Z1
BZ2 Configuration Blocking scheme Z2
INP_Z1EXT Internal logic Zone extension (digital input assigned to an opto by
dedicated PSL)
Z1xChannel Fail Configuration Z1x logic enabled if channel fail detected (Carrier out of
service = COS)
UNBAlarm Internal logic Carrier Out Of Service
(*) the use of an apostrophe in the above logic (Z'1) is explained in section 2.7.2.1 Figure 3
Page 16/220 MiCOM P441/P442 & P444
2.5.3 Outputs

PDist_Dec Internal logic Distance protection Trip
2.6 Type of trip
Single Pole Z1 Single pole Z2 T1 T2 Tzp T3 T4

0 1 1 1 3 3 3
1 0 1 3 3 3 3
0 0 3 3 3 3 3
1 : Trip 1P if selected in MiCOM S1 otherwise trip 3P

3 : Trip 3P
2.6.1 Inputs

INP_Dist_Timer_Block TS opto Input for blocking the distance function
Single Pole T1 Configuration Trip 1pole at T1 – 3P in other cases
Single Pole T1 & T2 Configuration Trip 1pole at T1 /T2 – 3P in other cases
PDist_Trip Internal Logic Trip by Distance protection
T1 to T4 Internal Logic End of distance timer by Zone
Fault A Internal Logic Phase A selection
Fault B Internal Logic Phase B selection
Fault C Internal Logic Phase C selection
2.6.2 Outputs

PDist_Trip A Internal Logic Trip Order phase A
PDist_Trip B Internal Logic Trip Order phase B
PDist_Trip C Internal Logic Trip Order phase C
2.7 Distance zone settings

NOTE: Individual distance protection zones can be enabled or disabled by
means of the Zone Status function links. Setting the relevant bit to 1
will enable that zone, setting bits to 0 will disable that distance
zones. Note that zone 1 is always enabled, and that zones 2 and 4
will need to be enabled if required for use in channel aided schemes.
MiCOM P441/P442 & P444 Page 17/220
Remarks: 1. .Z3 disable means Fwd start becomes Zp

.Z3 & Zp Fwd disable means Fwd start becomes Z2
.Z3 & Zp Fwd & Z2 disable means Fwd start becomes Z1
2. Z4 disable (see remark 1/2/3 in section 2.4)
2.7.1 Settings table
Menu text Default setting Setting range Step size

Min Max
GROUP 1
DISTANCE ELEMENTS
LINE SETTING
Line Length 1000 km 0.3 km 1000 km 0.010 km
(625 miles) (0.2 mile) (625 miles) (0.005 mile)
Line Impedance 12/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
Line Angle 70° –90° +90° 0.1°
Zone Setting
Zone Status 00011111 Bit 0: Z1X Enable, Bit 1: Z2 Enable,
Bit 2: Zone P Enable, Bit 3: Z3 Enable,
Bit 4: Z4 Enable.
KZ1 Res Comp 1 0 7 0.001
KZ1 Angle 0° 0° 360° 0.1°
Z1 10/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
Z1X 15/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R1G 10/In Ω 0 400/In Ω 0.01/In Ω
R1Ph 10/In Ω 0 400/In Ω 0.01/In Ω
tZ1 0 0 10s 0.002s
KZ2 Res Comp 1 0 7 0.001
KZ2 Angle 0° 0° 360° 0.1°
Z2 20/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R2G 20/In Ω 0 400/In Ω 0.01/In Ω
R2Ph 20/In Ω 0 400/In Ω 0.01/In Ω
tZ2 0.2s 0 10s 0.01s
KZ3/4 Res Comp 1 0 7 0.01
Page 18/220 MiCOM P441/P442 & P444

Min Max
KZ3/4 Angle 0° 0° 360° 0.1°
Z3 30/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
R3G - R4G 30/In Ω 0 400/In Ω 0.01/In Ω
R3Ph - R4Ph 30/In Ω 0 400/In Ω 0.01/In Ω
tZ3 0.6s 0 10s 0.01s
Z4 40/In Ω 0.001/In Ω 500/In Ω 0.01/In Ω
tZ4 1s 0 10s 0.01s
Zone P - Direct. Directional Fwd Directional Fwd or Directional Rev
KZp Res Comp 1 0 7 0.001
KZp Angle 0° 0° 360° 0.1°
Zp 25/In Ω 0.001/In Ω 500/In Ω 0.001/In Ω
RpG 25/In Ω 0 400/In Ω 0.01/In Ω
RpPh 25/In Ω 0 400/In Ω 0.01/In Ω
tZp 0.4s 0 10s 0.01s
Serial Cmp.line (*) Disable Enable Disable
Overlap Z Mode (*) Disable Enable Disable
Fault Locator
KZm Mutual Comp 0 0 7 0.001
KZm Angle 0° 0° 360° 0.1°
(*) Serial Cmp. Line Enabled

(*) Overlap Z Mode Enabled
(*) These parameters are available from version A4.0 onwards
• Serial Compensated Line : If enabled, the Directional used in the Deltas Algorithms is
set at 90°
(Fwd = Quad1&4 / Rev = Quad 2&3)
REV FWD
REV FWD
P0472ENa
MiCOM P441/P442 & P444 Page 19/220
• If disable, the Directional of the Deltas algorithms is set at -30° like conventional
algorithms
FWD FWD
R
REV FWD
REV -30˚
P0473ENa
• Overlap Z Mode: If enable, for a fault in Zp (fwd), then Z1 & Z2 will be displayed in
LCD/Events/Drec – The internal logic is not modified
2.7.2 Zone Logic Applied
Normally the zone logic used by the distance algorithm is as below:
Z1'
Z2'
Z4'
P0462XXa
(with overlap logic the Z2 will cover also the Z1)

2.7.2.1 Zone Logic
The relay internal logic will modify the zones & directionality under the following conditions:
• Power swing detection
• Settings about blocking logic during Power swing
• Reversal Guard Timer
• Type of Logical transmission scheme

For Power swing, two signals are considered:
• Presence of Power swing
• Unblocking during power swing

During Power swing the zones are blocked; but can be unblocked with:
• Start of unblocking logic
• Unblocking logic enable in MiCOM S1 on the concerned zone or all zones

During the Reversal guard logic (in case of parallel lines), the reverse directional decision is
latched (until that timer is issued) from the switch from Reverse to Forward (for distance
scheme with Z1>ZL).
Page 20/220 MiCOM P441/P442 & P444
Z1x
& Z1x'
unblock PS ≥1
in Z1
Z1<ZL &
≥1
1
& Z1'
Z1
Reversal
Guard
&
PermZ2
≥1
Power
Swing
≥1 & Z2'
Unblock PS
≥1 unblock PS
in Z2
Z2
&
PermFwd
≥1 Forward'
&
Forward
unblock PS ≥1
in Z3
& Z3'
Z3 Z2'
unblock PS
in Z4 ≥1
Z4 & Z4'
Zp_Fwd
&
unblock PS
in Zp
≥1
Zp'
Zp &
Reverse
Reverse'
≥1
P0474ENa
FIGURE 3 - ZONES UNBLOCKING/BLOCKING LOGIC WITH POWER SWING OR REVERSAL GUARD

MiCOM P441/P442 & P444 Page 21/220
2.7.2.2 Inputs

Z1 Internal Logic Fault detected in zone 1
Z1x Internal Logic Fault detected in zone 1 extended
Zp Internal Logic Fault detected in zone p
Forward Internal Logic FWD Fault Detected
Reverse Internal Logic REV Fault Detected
Reversal Guard Internal Logic Reversal guard
Unblock PS Internal Logic Unblocking Power Swing
Power Swing Internal Logic Power Swing Detected
INP_Distance_Timer_block TS opto Zones blocked by external input (*)
Unblock Z1 Configuration Unblocking Pswing with Z1
Unblock Zp Configuration Unblocking Pswing with Zp
Zp_Fwd Configuration Directional Zp set Forward
Z1<ZL Configuration Internal Configuration which determine that Z1
is lower than the length of the line ZL
Perm Z2 Configuration Type of logical distance scheme
(PUP Z2– POP Z2) (**)
Perm Fwd Configuration Type of logical distance scheme
(PUP Fwd)
Block Z1 Configuration Type of logical distance scheme
(BOP Z1)
Block Z2 Configuration Type of logical distance scheme
(BOP Z2)
Remarks: *. Usefull for dedicated logic designed in PSL

Facility in Commissioning Test
**. For Aided Distace Scheme – See description in the TRIP
LOGIC Table (section 2.8.2.4)
Page 22/220 MiCOM P441/P442 & P444
2.7.2.3 Outputs

Z1x’ Internal Logic Fault detected in zone 1 extended
Z1’ Internal Logic Fault detected in zone 1
Zp’ Internal Logic Fault detected in zone p
Forward’ Internal Logic Fault Detected in Forward Direction
Reverse’ Internal Logic Fault Detected in Reverse Direction
For guidance on Line Length, Line Impedance, kZm Mutual Compensation and kZm mutual
compensation Angle settings, refer to section 4.1.
2.7.3 Zone Reaches
All impedance reaches for phase fault protection are calculated in polar form: Z ∠θ, where Z
is the reach in ohms, and θ is the line angle setting in degrees, common to all zones.
The line parameters can be adjusted in polar or rectangular mode to give the total positive
impedance of the protected line:
Remark: Z limit in MiCOM S1 are adjusted for Ω/phase

MiCOM P441/P442 & P444 Page 23/220
• The zone 1 elements of a distance relay should be set to cover as much of the
protected line as possible, allowing instantaneous tripping for as many faults as
possible. In most applications the zone 1 reach (Z1) should not be able to respond to
faults beyond the protected line. For an underreaching application the zone 1 reach
must therefore be set to account for any possible overreaching errors. These errors
come from the relay, the VTs and CTs and inaccurate line impedance data. It is
therefore recommended that the reach of the zone 1 distance elements is restricted to
80 - 85% of the protected line impedance (positive phase sequence line impedance),
with zone 2 elements set to cover the final 20% of the line. (Note: Two of the channel
aided distance schemes described later, schemes POP Z1 and BOP Z1 use
overreaching zone 1 elements, and the previous setting recommendation does not
apply).
• The zone 2 elements should be set to cover the 20% of the line not covered by zone
1. Allowing for underreaching errors, the zone 2 reach (Z2) should be set in excess of
120% of the protected line impedance for all fault conditions. Where aided tripping
schemes are used, fast operation of the zone 2 elements is required. It is therefore
beneficial to set zone 2 to reach as far as possible, such that faults on the protected
line are well within reach. A constraining requirement is that, where possible, zone 2
does not reach beyond the zone 1 reach of adjacent line protection. Where this is not
possible, it is necessary to time grade zone 2 elements of relays on adjacent lines.
For this reason the zone 2 reach should be set to cover ≤50% of the shortest adjacent
line impedance, if possible. When setting zone 2 earth fault elements on parallel
circuits, the effects of zero sequence mutual coupling will need to be accounted for.
The mutual coupling will result in the Zone 2 ground fault elements underreaching. To
ensure adequate coverage an extended reach setting may be required, this is covered
in Section 2.7.7.
• The zone 3 elements would usually be used to provide overall back-up protection for
adjacent circuits. The zone 3 reach (Z3) is therefore set to approximately 120% of the
combined impedance of the protected line plus the longest adjacent line. A higher
apparent impedance of the adjacent line may need to be allowed where fault current
can be fed from multiple sources or flow via parallel paths.
• Zone P is a reversible directional zone. The setting chosen for zone P, if used at all,
will depend upon its application. Typical applications include its use as an additional
time delayed zone or as a reverse back-up protection zone for busbars and
transformers. Use of zone P as an additional forward zone of protection may be
required by some users to line up with any existing practice of using more than three
forward zones of distance protection. Zone P may also be useful for dealing with some
mutual coupling effects when protecting a double circuit line, which will be discussed
in section 2.7.7.
• The zone 4 elements would typically provide back-up protection for the local busbar,
where the offset reach is set to 25% of the zone 1 reach of the relay for short lines
(<30km) or 10% of the zone 1 reach for long lines. Setting zone 4 in this way would
also satisfy the requirements for Switch on to Fault, and Trip on Reclose protection, as
described in later sections. Where zone 4 is used to provide reverse directional
decisions for Blocking or Permissive Overreach schemes, zone 4 must reach further
behind the relay than zone 2 for the remote relay. This can be achieved by setting:
Z4 ≥ ((Remote zone 2 reach) x 120%) minus the protected line impedance.
Page 24/220 MiCOM P441/P442 & P444
2.7.4 Zone Time Delay Settings

(initiated with CVMR (General start convergency))
• The zone 1 time delay (tZ1) is generally set to zero, giving instantaneous operation.
However, a time delay might be employed in cases where a large transient DC
component is expected in the fault current, and older circuit breakers may be unable
to break the current until zero crossings appear.
• The zone 2 time delay (tZ2) is set to co-ordinate with zone 1 fault clearance time for
adjacent lines. The total fault clearance time will consist of the downstream zone 1
operating time plus the associated breaker operating time. Allowance must also be
made for the zone 2 elements to reset following clearance of an adjacent line fault and
also for a safety margin. A typical minimum zone 2 time delay is of the order of
200ms. This time may have to be adjusted where the relay is required to grade with
other zone 2 protection or slower forms of back-up protection for adjacent circuits.
• The zone 3 time delay (tZ3) is typically set with the same considerations made for the
zone 2 time delay, except that the delay needs to co-ordinate with the downstream
zone 2 fault clearance. A typical minimum zone 3 operating time would be in the
region of 400ms. Again, this may need to be modified to co-ordinate with slower forms
of back-up protection for adjacent circuits.
• The zone 4 time delay (tZ4) needs to co-ordinate with any protection for adjacent lines
in the relay’s reverse direction. If zone 4 is required merely for use in a Blocking
scheme, tZ4 may be set high.
Remark: In MiCOM S1, timers settable are: tZi but in the DDB corresponding
cells are: Ti
2.7.5 Residual Compensation for Earth Fault Elements
For earth faults, residual current (derived as the vector sum of phase current inputs
(Ia + Ib + Ic) is assumed to flow in the residual path of the earth loop circuit. Thus, the earth
loop reach of any zone must generally be extended by a multiplication factor of (1 + kZ0)
compared to the positive sequence reach for the corresponding phase fault element. kZ0 is
designated as the residual compensation factor, and is calculated as:
kZ0 Res. Comp, kZ0 = (Z0 – Z1) / 3.Z1 Ie: As a ratio.
kZ0 Angle, ∠kZ0 = ∠ (Z0 – Z1) / 3.Z1 Set in degrees.
Where:
Z1 = Positive sequence impedance for the line or cable;
Z0 = Zero sequence impedance for the line or cable.
kZ0 CALCULATION DESCRIPTION
If we consider a phase to ground fault AN with analog values VA and IA.
Using symetrical components, VA is described as above:
(1) VA = V1 + V2 + V0 = Z1I1 + Z2I2 + Z0I0
Z2 = Z1 (for a line or a cable)
(2) VA = Z1 (I1 + I2) + Z0I0
we can write also: IA = I1 + I2 +I0
(3) (I1 + I2) = IA – I0
with (3) in (2) we obtain:
(4) VA = Z1 (IA – I0) + Z0I0
The physical fault current is IR = 3I0 – if put in (4) – we obtain:
VA = Z1 [IA – IR/3 + Z0IR/3Z1] = Z1 [IA + IR (Z0–Z1)/3Z1]
but: (Z0 – Z1)/3Z1 = kZ0
MiCOM P441/P442 & P444 Page 25/220
(5) VA = Z1 [IA + kZ0 IR]

(6) Z1 = VA/(IA + kZ0 IR)
Particular case
Resistive fault
(7) VA = Z1 [IA + kZ0 IR] + Rdef. Idef (Rdef = Rloop)
To determine the distance, Z1 term is extracted.
(8) Z1 = (VA – Rdef. Idef)/(IA + kZ0 IR)
with
Rdef: fault resistance (loop)
Idef: current crossing the fault resistance
Open line:
Ifault = IR = IA
(9) VA = Z1 IA (1 + kZ0) + Rfault IA
(10) Z1 = (VA/IA – Rfault)/(1 + kZ0)
The impedance detected will be:
Z = Z1 (1 + kZ0) + Rfault
That is the form used for the result of Z measured with injector providing U, I, ϕ
Separate compensation for each zone (KZ1, KZ2, KZ3/4 and KZp) allows more accurate
earth fault reach control for elements which are set to overreach the protected line, such that
they cover other circuits which may have different zero sequence to positive sequence
impedance ratios (Example: underground cable & overhead line in the protected line).
2.7.6 Resistive Reach Calculation - Phase Fault Elements
In MiCOM S1 all resistances are set per loop
The P441, P442 and P444 relays have quadrilateral distance elements, thus the resistive
reach (RPh) is set independently of the impedance reach along the protected line/cable.
RPh defines the maximum amount of fault resistance additional to the line impedance for
which a distance zone will trip, regardless of the location of the fault within the zone. Thus,
the right hand and left hand resistive reach constraints of each zone are displaced by +RPh
and -RPh either side of the characteristic impedance of the line, respectively. RPh is
generally set on a per zone basis, using R1Ph, R2Ph and RpPh. Note that zones 3 and 4
share the resistive reach R3Ph-R4Ph.
When the relay is set in primary impedance terms, RPh must be set to cover the maximum
expected phase-to-phase fault resistance. In general, RPh must be set greater than the
maximum fault arc resistance for a phase-phase fault, calculated as follows:
Ra = (28710 x L) / If1.4
RPh ≥ Ra
Where:
If = Minimum expected phase-phase fault current (A);
L = Maximum phase conductor separation (m);
Ra = Arc resistance, calculated from the van Warrington formula (Ω).

Page 26/220 MiCOM P441/P442 & P444
Typical figures for Ra are given in Table 1 below, for different values of minimum expected
phase fault current.
Conductor Typical system If = 1kA If = 5kA If = 10kA

spacing (m) voltage (kV)
2 33 3.6Ω 0.4Ω 0.2Ω
5 110 9.1Ω 1.0Ω 0.4Ω
8 220 14.5Ω 1.5Ω 0.6Ω
TABLE 1 - TYPICAL ARC RESISTANCES CALCULATED USING THE VAN WARRINGTON FORMULA
The maximum phase fault resistive reach must be limited to avoid load encroachment trips.
Thus, R3Ph and other phase fault resistive reach settings must be set to avoid the heaviest
allowable loading on the feeder. An example is shown in Figure 3 below, where the worst
case loading has been determined as point “Z”, calculated from:
Impedance magnitude, Z = kV2 / MVA
Leading phase angle, ∠Z = cos–1 (PF)

Where:
kV = Rated line voltage (kV);
MVA = Maximum loading, taking the short term overloading during out ages of
parallel circuits (MVA);
PF = Worst case lagging power factor.
Zone 3
∆R
R3PG-R4PG
Z
LOAD
Zone 4
P0475ENa
FIGURE 4 - RESISTIVE REACHES FOR LOAD AVOIDANCE

As shown in the Figure, R3Ph-R4Ph is set such as to avoid point Z by a suitable margin.
Zone 3 must never reach more than 80% of the distance from the line characteristic
impedance (shown dotted), towards Z. However, where power swing blocking is used, a
larger impedance (including ∆R) characteristic surrounds zones 3 and 4, and it is essential
also that load does not encroach upon this characteristic. For this reason, R3Ph would be
set ≤ 60% of the distance from the line characteristic impedance towards Z. A setting
between the calculated minimum and maximum should be applied.
R/Z ratio: For best zone reach accuracy, the resistive reach of each zone would not normally
be set greater than 10 times the corresponding zone reach. This avoids relay overreach or
underreach where the protected line is exporting or importing power at the instant of fault
inception. The resistive reach of any other zone cannot be set greater than R3Ph, and
where zone 4 is used to provide reverse directional decisions for Blocking or Permissive
Overreach schemes, the zone 2 elements used in the scheme must satisfy R2Ph ≤ (R3Ph-
R4Ph) x 80%.
MiCOM P441/P442 & P444 Page 27/220
2.7.7 Resistive Reach Calculation - Earth Fault Elements

The resistive reach setting of the relay earth fault elements (RG) should be set to cover the
desired level of earth fault resistance, but to avoid operation with minimum load impedance.
Fault resistance would comprise arc-resistance and tower footing resistance. In addition, for
best reach accuracy, the resistive reach of any zone of the relay would not normally be
greater than 10 times the corresponding earth loop reach.
EXPERT SECTION
As shown in Figure 4 (section 2.7.6), R3G – R4G is set such as to avoid point Z (minimum
load impedance) by a suitable margin.
R3G – R4G ≤ 80% Z minimum load impedance

Umin/√3
≤ 80%
1,2 x Imax
• Umin: minimum phase/phase voltage in normal condition without fault
• Imax: maximum load current in normal condition without fault

However, where Power Swing blocking is used, a larger impedance surrounds zone 3 and
zone 4, and it is essential also, that load does not encroach upon the characteristic.
[(R3G – R4G) – ∆R] ≤ 80% Z min load
With ∆R = 0,032 x ∆f x R load min

∆f: power swing frequency
R load min: minimum load resistance
A typical resistive reach coverage would be 40Ω on the primary system. The same load
impedance as in section 2.4.4 must be avoided. Thus R3G is set such as to avoid point Z by
a suitable margin. Zone 3 must never reach more than 80% of the distance from the line
characteristic impedance (shown dotted in Figure 3), towards Z.
For high resistance earth faults, the situation may arise where no distance elements could
operate. In this case it will be necessary to provide supplementary earth fault protection, for
example using the relay Channel Aided DEF protection.
2.7.8 Effects of Mutual Coupling on Distance Settings
Where overhead lines are connected in parallel or run in close proximity for the whole or part
of their length, mutual coupling exists between the two circuits. The positive and negative
sequence coupling is small and can be neglected. The zero sequence coupling is more
significant and will affect relay measurement during earth faults with parallel line operation.
Zero sequence mutual coupling will cause a distance relay to underreach or overreach,
depending on the direction of zero sequence current flow in the parallel line. However, it can
be shown that this underreach or overreach will not affect relay discrimination during parallel
line operation (ie. it is not be possible to overreach for faults beyond the protected line and
neither will it be possible to underreach to such a degree that no zone 1 overlap exists). A
channel-aided scheme will therefore still respond to faults within the protected line and
remain secure during external faults. Some applications exist, however, where the effects of
mutual coupling should be addressed.
2.7.9 Effect of Mutual Coupling on Zone 1 Setting
For the case shown in Figure 5, where one circuit of a parallel line is out of service and
earthed at both ends, an earth fault at the remote bus may result in incorrect operation of the
zone 1 earth fault elements. It may be desirable to reduce the zone 1 earth loop reach for
this application. This can be achieved using an alternative setting group within the relay, in
which the residual compensation factor kZ1 is set at a lower value than normal (typically ≤
80% of normal kZ1).
Page 28/220 MiCOM P441/P442 & P444
Z1 G/F (Optional)
Z1 G/F (Normal)
ZMO
P3048ENa
FIGURE 5 - ZONE 1 REACH CONSIDERATIONS

2.7.10 Effect of Mutual Coupling on Zone 2 Setting
If the double circuit line to be protected is long and there is a relatively short adjacent line, it
is difficult to set the reach of the zone 2 elements to cover 120% of the protected line
impedance for all faults, but not more than 50% of the adjacent line. This problem can be
exacerbated when a significant additional allowance has to be made for the zero-sequence
mutual impedance in the case of earth faults (see Section 2.4.6). For parallel circuit
operation the relay Zone 2 earth fault elements will tend to underreach. Therefore, it is
desirable to boost the setting of the earth fault elements such that they will have a
comparable reach to the phase fault elements. Increasing the residual compensation factor
kZ2 for zone 2 will ensure adequate fault coverage.
Under single circuit operation, no mutual coupling exists, and the zone 2 earth fault elements
may overreach beyond 50% of the adjacent line, necessitating time discrimination with other
Zone 2 elements. Therefore, it is desirable to reduce the earth fault settings to that of the
phase fault elements for single circuit operation, as shown in Figure 5. Changing between
appropriate settings can be achieved by using the alternative setting groups available in the
relay series relays.
Z2 ' Boost ' G/F

Z2 PH
ZMO
(i) Group 1
Z2 ' Reduced ' G/F

Z2 PH
(ii) Group 2 P3049ENa
FIGURE 6 - MUTUAL COUPLING EXAMPLE - ZONE 2 REACH CONSIDERATIONS

MiCOM P441/P442 & P444 Page 29/220
2.8 Distance protection schemes

The option of using separate channels for DEF aided tripping, and distance protection
schemes, is offered in the P441, P442 and P444 relays. Alternatively, the aided DEF
protection can share the distance protection signalling channel, and the same scheme logic.
In this case a permissive overreach or blocking distance scheme must be used. The aided
tripping schemes can perform single pole tripping. The relays include basic five-zone
distance scheme logic for stand-alone operation (where no signalling channel is available)
and logic for a number of optional additional schemes. The features of the basic scheme will
be available whether or not an additional scheme has been selected.
Page 30/220 MiCOM P441/P442 & P444
2.8.1 Settings

Min Max
Group 1
Distance schemes
Program Mode Standard Scheme Standard Scheme
Open Scheme
Standard Mode Basic + Z1X Basic + Z1X, POP Z1,
POP Z2, PUP Z2, PUP Fwd, BOP Z1,
BOP Z2.
Fault Type Both Enabled Phase to Ground Fault Enabled,
Phase to Phase Fault Enabled,
Both Enabled.
Trip Mode Force 3 Poles Force 3 Poles,
1 Pole Z1 & CR,
1 Pole Z1 Z2 & CR.
Sig. Send Zone None None, CsZ1, CsZ2, CsZ4.
Dist CR None None, PermZ1, PermZ2, PermFwd, BlkZ1,
BlkZ2.
Tp 0.02s 0 1s 0.002s
tReversal Guard 0.02s 0 0.15s 0.002s
Unblocking Logic None None, Loss of Guard, Loss of Carrier.
TOR-SOTF Mode 00000000110000 Bit 0: TOR Z1
Bit 1: TOR Z2
Bit 2: TOR Z3
Bit 3: TOR All Zones
Bit 4: TOR Dist. Scheme
Bit 5: SOFT All Zones
Bit 6: SOFT Lev. Det.
Bit 7: SOFT Z1
Bit 8: SOFT Z2
Bit 9: SOFT Z3
Bit 0A: SOFT Z1 + Rev
Bit 0B: SOFT Z2 + Rev
Bit 0C: SOFT Dist. Scheme
Bit 0D: SOFT Disable
Z1 Ext. on Chan. Fail Disabled Disabled or Enabled
Weak Infeed
WI: Mode Status Disabled Disabled, Echo, WI Trip & Echo.
WI: Single Pole Trip Disabled Disabled or Enabled
WI: V< Thres. 45V 10V 70V 5V
WI: Trip Time Delay 0.06s 0 1s 0.002s
Loss of Load
LoL: Mode Status Disabled Disabled or Enabled
LoL: Chan. Fail Disabled Disabled or Enabled
LoL: I< 0.5 x In 0.05 x In 1 x In 0.05 x In
LoL: Window 0.04s 0.01s 0.1s 0.01s
MiCOM P441/P442 & P444 Page 31/220
2.8.2 Carrier send & Trip logic

2.8.2.1 Carrier send can be triggered by
• Zone1 (CSZ1)
• Zone2 (CSZ2)
• Zone4 Reverse (CSZ4)

Remarks: 1. CSZ1 means: "carrier send if Z1 detected"
2. The carrier send in Z4 is managed by "Reverse", instead of Z4
(because Reverse decision starts quicker than Z4).
The zones decision logic is described as below:
Z1'
Z2'
Z4' Z2'(*)
P0476XXa
Remark: Z2'(*) if overlapping zone enabled in MiCOM S1

PDist-CS = (Z1' + Z2').CSZ2 + Z1'.CSZ1 + Reverse.CSZ4 + WI_CS
The complete logic – with DEF integrated is:
CS = PDist_CS + ( Share_Logic Share_Logic_DEF. DEF_CS) → logic with canal shared

CS_DEF = Not Share_Logic_DEF. DEF_CS → logic with canal independent
(There is a 10ms delay in drop of on the carried send to avoid a logic race between this
signal and the zone pick up.)
2.8.2.2 Inputs

CSZ1 Configuration Carrier send for zone 1
CSZ2 Configuration Carrier send for zone 2
CSZ4 Configuration Carrier send for zone 4 (reverse)
Not Share_Logic_DEF Configuration DEF channel independent
Reverse' Internal Logic Fault detected Reverse
Z1' to Z4' Internal Logic Zone 1 to 4 decision
(blocked by Pswing or Rguard)
WI_CS Internal Logic Winfeed carrier send (Echo)
DEF_CS Internal Logic DEF carrier send
Page 32/220 MiCOM P441/P442 & P444
2.8.2.3 Outputs

CS Internal Logic Main channel Carrier send
CS_DEF Internal Logic DEF channel Carrier send
2.8.2.4 Trip logic
IEC Standard Carrier Trip Logic Application Setting

Send MiCOM
448.15.13 PUR Z1 Z2.CR.T1 + Z1T1 + Z2.T2 + Z3T3... Z1 = 80% ZL PUP Z2
(LFZR)
or AUP
PUR2 Z2 Z2.CR.T1 + Z1.T1 + Z2.T2 + Z3T3... Z1 = 80% ZL POP Z2
POR2
(LFZR)
448.15.14 BOR1 or Z4 Z1. CR .T1.Tp + Z1.T2 + Z2T2 + Z3T3... Z1 > ZL BOP Z1
BOP
BOR2 Z4 Z2. CR .T1.Tp + Z1.T1 + Z2.T2 + Z3.T3... Z1 = 80% ZL BOP Z2
BLOCK2
(LFZR)
448.15.11 PUP or Z1 Fwd.CR.T1 + Z1.T1 + Z2.T2 +... Z1 = 80% ZL PUP Fwd
PUTT
448.15.16 POR1 or Z1 Z1.CR.T1 + Z1.T2 Z1 > ZL POP Z1
POP or Z2.T2 + Z3.T3...
POTT
2.8.2.5 Tripping modes

The tripping mode is settable (Distance scheme\Trip mode):
− Force 3P : Trip 3P in all cases
− 1PZ1 & CR : Trip 1Pole in T1 for fault in Z1 and also in case of Carrier Received
(aided Trip)
− 1PZ1, Z2 & CR : Trip 1Pole for T1 & T2 in T1 for fault in Z1 and CR (aided Trip) and
also in Z2 with CR
Several defined aided trip logic can be selected or an open logic can be designed by user
(see also section 4.5 from chapter P44x/EN HW).
MiCOM P441/P442 & P444 Page 33/220
Unblocking Basic
+
Aided
Schemes
+
Weak-Infeed
Trip
Distance
Protection
PSB
TOR
+ SOTF
RVG
LOL
PSB: Power swing blocking

RVG: Reversal guard
LOL: Loss of load
P0477ENa
FIGURE 7 - MIMIC DIAGRAM

The zones unblocking/blocking logic with Power swing or Reversal guard is managed as
explained in the scheme: Figure 3 (section 2.7)
• The unblocking function if enabled, carries out a function similar to Carrier receive
logic. (see explanations in section 2.9.4)
• Weak infeed allows for the case where there may be no zone pick up from local end.
• TOR & SOTF applies specific logic in case of manual closing or AR closing logic.
• Trip Distance Protection manages the Trip order regarding the distance algorithm
outputs, the type of trip1P or 3P, the distance timers, and the logic datas such as
power swing blocking.
• Loss of Load manages a specific logic for tripping 3P in Z2 accelerated without carrier.
2.8.3 The Basic Scheme
The Basic distance scheme is suitable for applications where no signalling channel is
available. Zones 1, 2 and 3 are set as described in Sections 2.7.3 to 2.7.10. In general
zones 1 and 2 provide main protection for the line or cable as shown in Figure 9 below, with
zone 3 reaching further to provide back up protection for faults on adjacent circuits.
Page 34/220 MiCOM P441/P442 & P444
FIGURE 8 - SETTINGS IN MiCOM S1(GROUP1\DISTANCE SCHEME\STANDARD MODE)

– 6 DIFFERENTS SETTABLE SCHEMES –
Z2A
ZL
A Z1A B
Z1B
Z2B
P3050XXa
FIGURE 9 - MAIN PROTECTION IN THE BASIC SCHEME (NO REQUIREMENT FOR SIGNALLING
CHANNEL)
Key:
A, B = Relay locations;
ZL = Impedance of the protected line.
MiCOM P441/P442 & P444 Page 35/220
Protection A Protection B
Z1' Z1'
& &
T1
tZ1 T1
tZ1
Z2' Z2'
& &
T2
tZ2 T2
tZ2
Trip Trip
Z3' Z3'
T3
tZ3
& ≥1 ≥1 &
T3
tZ3
Zp' Zp'
& &
Tzp
tZp Tzp
tZp
Z4' Z4'
& &
T4
tZ4 T4
tZ4
P0543ENa
FIGURE 10 - LOGIC DIAGRAM FOR THE BASIC SCHEME

Figure 10 shows the tripping logic for the Basic scheme. Note that for the P441, P442 and
P444 relays, zone timers tZ1 to tZ4 are started at the instant of fault detection, which is why
they are shown as a parallel process to the distance zones. The use of an apostrophe in the
logic (eg. the ‘ in Z1’) indicates that protection zones are stabilised to avoid maloperation for
transformer magnetising inrush current. The method used to achieve stability is based on
second harmonic current detection.
The Basic scheme incorporates the following features :
Instantaneous zone 1 tripping. Alternatively, zone 1 can have an optional time delay of 0 to
10s.
Time delayed tripping by zones 2, 3, 4 and P. Each with a time delay set between 0 and
10s.
The Basic scheme is suitable for single or double circuit lines fed from one or both ends.
The limitation of the Basic scheme is that faults in the end 20% sections of the line will be
cleared after the zone 2 time delay. Where no signalling channel is available, then improved
fault clearance times can be achieved through the use of a zone 1 extension scheme or by
using loss of load logic, as described below. Under certain conditions however, these two
schemes will still result in time delayed tripping. Where high speed protection is required
over the entire line, then a channel aided scheme will have to be employed.
Page 36/220 MiCOM P441/P442 & P444
2.8.4 Zone 1 Extension Scheme

Auto-reclosure is widely used on radial overhead line circuits to re-establish supply following
a transient fault. A Zone 1 extension scheme may therefore be applied to a radial overhead
feeder to provide high speed protection for transient faults along the whole of the protected
line. Figure 11 shows the alternative reach selections for zone 1: Z1 or the extended reach
Z1X.
Z1 Extension (A)
ZL
A Z1A B
Z1B
Z1 Extension (B)
P3052ENa
FIGURE 11 - ZONE 1 EXTENSION SCHEME DEFINIED AS DESCRIBED ABOVE:

Z1 < Z1X < Z2 or Z1 < Z2 < Z1X
(with Z1 < ZL < Z1X)
In this scheme, zone 1X is enabled and set to overreach the protected line. A fault on the
line, including one in the end 20% not covered by zone 1, will now result in instantaneous
tripping followed by autoreclosure. Zone 1X has resistive reaches and residual
compensation similar to zone 1. The autorecloser in the relay is used to inhibit tripping from
zone 1X such that upon reclosure the relay will operate with Basic scheme logic only, to co-
ordinate with downstream protection for permanent faults. Thus, transient faults on the line
will be cleared instantaneously, which will reduce the probability of a transient fault becoming
permanent. The scheme can, however, operate for some faults on an adjacent line,
although this will be followed by autoreclosure with correct protection discrimination.
Increased circuit breaker operations would occur, together with transient loss of supply to a
substation.
The time delays associated with extended zone Z1X are shown in Table 2 below:
Scenario Z1X Time Delay

First fault trip = tZ1
Fault trip for persistent fault on autoreclose = tZ2
TABLE 2 - TRIP TIME DELAYS ASSOCIATED WITH ZONE 1X

The Zone 1 Extension scheme is selected by setting the Z1X Enable bit in the Zone Status
function links to 1.
FIGURE 12 – SETTINGS IN MiCOM S1 (GROUP1\DISTANCE SCHEME\ZONE STATUS)

MiCOM P441/P442 & P444 Page 37/220
Remark: To enable the Z1X logic, the DDB "Z1X extension" cell must be linked
in the PSL (opto/reclaim time…)
FIGURE 13 - DISTANCE SCHEME WITHOUT CARRIER & Z1 EXTENDED
Z1'
&
T1
INP_Z1EXT &
None
& >1
Z1x'
T2
Z1X channel fail & & PDist_Trip
Z2'
UNB_Alarm ≥1
Z3'
&
T3
Zp'
&
Tzp
Z4'
&
T4
P0478ENa
FIGURE 14 – Z1X TRIP LOGIC

(Z1X can be used as well as the default scheme logic in case of UNB _Alarm-carrier out of
service (See unblocking logic – section 2.9.4))
2.8.4.1 Inputs

None Configuration No distance scheme (basic scheme)
INP_Z1EXT Digital input Input for Z1 extended
Z1x channel fail Configuration Z1X extension enabled on channel fail (UNB-CR.
see Mode loss of guard or Loss of carrier)
UNB_Alarm Internal logic (See Unblocking logic)
Z1x’ Internal logic Z1X Decision (lock out by Power Swing)
Z1’ Internal logic Z1 Decision (lock out by Power Swing)
Page 38/220 MiCOM P441/P442 & P444

Zp’ Internal logic Zp Decision (lock out by Power Swing)
T1 Internal logic Elapse of distance timer 1
Tzp Internal logic Elapse of distance timer p
2.8.4.2 Outputs

PDist_Dec Internal logic Trip order by Distance Protection
2.8.5 Loss of Load Accelerated Tripping (LoL)

The loss of load accelerated trip logic is shown in Figure 15. The loss of load logic provides
fast fault clearance for faults over the whole of a double end fed protected circuit for all types
of fault, except three phase. The scheme has the advantage of not requiring a signalling
channel. Alternatively, the logic can be chosen to be enabled when the channel associated
with an aided scheme has failed. This failure is detected by permissive scheme unblocking
logic, or a Channel Out of Service (COS) opto input.
Any fault located within the reach of Zone 1 will result in fast tripping of the local circuit
breaker. For an end zone fault with remote infeed, the remote breaker will be tripped in
Zone 1 by the remote relay and the local relay can recognise this by detecting the loss of
load current in the healthy phases. This, coupled with operation of a Zone 2 comparator
causes tripping of the local circuit breaker.
Before an accelerated trip can occur, load current must have been detected prior to the fault.
The loss of load current opens a window during which time a trip will occur if a Zone 2
comparator operates. A typical setting for this window is 40ms as shown in Figure 15,
although this can be altered in the menu LoL: Window cell. The accelerated trip is delayed
by 18ms to prevent initiation of a loss of load trip due to circuit breaker pole discrepancy
occurring for clearance of an external fault. The local fault clearance time can be deduced
as follows :
t = Z1d + 2CB + LDr + 18ms
Where:
Z1d = maximum downstream zone 1 trip time
CB = Breaker operating time
LDr = Upstream level detector (LoL: I<) reset time
For circuits with load tapped off the protected line, care must be taken in setting the loss of
load feature to ensure that the I< level detector setting is above the tapped load current.
When selected, the loss of load feature operates in conjunction with the main distance
scheme that is selected. In this way it provides high speed clearance for end zone faults
when the Basic scheme is selected or, with permissive signal aided tripping schemes, it
provides high speed back-up clearance for end zone faults if the channel fails.
Note that loss of load tripping is only available where 3 pole tripping is used.
MiCOM P441/P442 & P444 Page 39/220
Z2
Z1
Z1 Z1
Z1
Z2
LOL-A
LOL-B
&
LOL-C
18ms
0 & Trip
40ms 0
&
Z2
1
P3053ENa
FIGURE 15 - LOSS-OF-LOAD ACCELERATED TRIP SCHEME

2.8.5.1 Inputs

Activ_LOL Configuration Loss of Load activated (LOL)
TRIP_Any Internal Logic Any trip (internal or external)
LOL. channel fail Configuration LOL enabled on channel fail (alarm carrier)
Force_3P_Dist Internal Logic Force Trip 3P in Distance Logic
Force_3P_DEF Configuration Force Trip 3P in DEF Logic
Activ_WI Configuration Weak-infeed activated (Trip & Echo)
WI_1pTrip Configuration WI 1Pole trip
PZ1, PZ2, PFwd, None Configuration Underreach scheme : Z1 < ZL
PZ1: permissive underreach Z1
PZ2: permissive underreach Z2
PFwd: permissive underreach forward
None: no distance scheme (basic scheme)
Z1<ZL Configuration Underreach scheme in Z1
UNB_CR_Alarm Internal Logic Carrier out of service Alarm
LOL Wind Configuration Activated time window for Loss Of Load logic
IA_LOL< Internal Logic Threshold I< for phase A in LOL logic
IB_LOL< Internal Logic Threshold I< for phase B in LOL logic
IC_LOL< Internal Logic Threshold I< for phase C in LOL logic
Flt A Internal Logic Faulty Phase A
Flt B Internal Logic Faulty Phase B
Flt C Internal Logic Faulty Phase C
Flt AB Internal Logic Faulty Phase AB
Flt BC Internal Logic Faulty Phase BC
Flt AC Internal Logic Faulty Phase AC
Z2' Internal Logic Fault in Z2 (lockout by Pswing or RGuard)
Page 40/220 MiCOM P441/P442 & P444
2.8.5.2 Outputs

LOL_Trip3p Internal Logic 3P Trip by LOL logic
Activ_LOL
TRIP _Any
Force_3P_Dist Yes
Force3P_DEF 3p &
Activ WI = WI/echo &
WI_1pTrip = No
LOL. channel fail
UNB_CR_Alarm
&
&
PZ1, PZ2, PFwd ≥1
Z1<ZL
None
S
&
0 Q
R
T
LOL Wind
&
IA_LOL<
&
IB_LOL<
IC_LOL< &
≥1 T
Flt A & 0 S
LOL_Trip3P
Q
18 ms R
Flt B &
Flt C
Flt AB
&
Flt BC
Flt AC
&
Z2'
P0479ENa
FIGURE 16 – LOSS OF LOAD TRIP LOGIC

MiCOM P441/P442 & P444 Page 41/220
2.9 Channel-aided distance schemes

The following channel aided distance tripping schemes are available when the Standard
program mode is selected:
• Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd;
• Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1;
• Weak infeed logic to supplement permissive overreach schemes;
• Unblocking logic to supplement permissive schemes;
• Blocking Schemes BOP Z2 and BOP Z1;
• Current reversal guard logic to prevent maloperation of any overreaching zone used in
a channel aided scheme, when fault clearance is in progress on the parallel circuit of a
double circuit line.
2.9.1 Permissive Underreach Transfer Trip Schemes PUP Z2 and PUP Fwd
To provide fast fault clearance for all faults, both transient and permanent, along the length
of the protected circuit, it is necessary to use a signal aided tripping scheme. The simplest
of these is the permissive underreach protection scheme (PUP), of which two variants are
offered in the P441, P442 and P444 relays. The channel for a PUP scheme is keyed by
operation of the underreaching zone 1 elements of the relay. If the remote relay has
detected a forward fault upon receipt of this signal, the relay will operate with no additional
delay. Faults in the last 20% of the protected line are therefore cleared with no intentional
time delay.
Listed below are some of the main features/requirements for a permissive underreaching
scheme:
• Only a simplex signalling channel is required.
• The scheme has a high degree of security since the signalling channel is only keyed
for faults within the protected line.
• If the remote terminal of a line is open then faults in the remote 20% of the line will be
cleared via the zone 2 time delay of the local relay.
• If there is a weak or zero infeed from the remote line end, (ie. current below the relay
sensitivity), then faults in the remote 20% of the line will be cleared via the zone 2 time
delay of the local relay.
• If the signalling channel fails, Basic distance scheme tripping will be available.
Z2A
ZL
A Z1A B
Z1B
Z2B
P3054XXa
FIGURE 17 - ZONE 1 AND 2 REACHES FOR PERMISSIVE UNDERREACH SCHEMES

Page 42/220 MiCOM P441/P442 & P444
2.9.1.1 Permissive Underreach Protection, Accelerating Zone 2 (PUP Z2)

This scheme is similar to that used in the other AREVA distance relays, allowing an
instantaneous Z2 trip on receipt of the signal from the remote end protection. Figure 11
shows the simplified scheme logic.
Send logic: Zone 1

Permissive trip logic: Zone 2 plus Channel Received.
Signal Signal
Send Z1' Send Z1'
Z1' Z1'
tZ1 & & tZ1
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
& &
tZp tZp
Z4'
≥1 Trip Trip
≥1 Z4'
& &
tZ4 tZ4
tZ2 tZ2
& &
Z2' Z2'
&
&
P3055ENa
FIGURE 18 - THE PUP Z2 PERMISSIVE UNDERREACH SCHEME

(SEE TRIP LOGIC TABLE IN SECTION 2.8.2.4)
MiCOM P441/P442 & P444 Page 43/220
2.9.1.2 Permissive Underreach Protection Tripping via Forward Start (PUP Fwd)
This scheme is similar to that used in the AREVA EPAC and PXLN relays, allowing an
instantaneous Z2 or Z3 trip on receipt of the signal from the remote end protection. Figure
19 shows the simplified scheme logic.
Send logic: Zone 1

Permissive trip logic: Underimpedance Start within any Forward Distance Zone, plus
Channel Received.
Signal Protection A Protection B Signal

Send Z1' Send Z1'
Z1' Z1'
tZ1 & & tZ1
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
tZp & &
tZp
Trip
Z4' ≥1
Trip
≥1
Z4'
&
tZ4 & tZ4
tZ2
tZ2
&
Z2' & Z2'
Fwd' Fwd'
<Z & & <Z
P3056ENa
FIGURE 19 - THE PUP FWD PERMISSIVE UNDERREACH SCHEME

Key:
Fwd = Forward fault detection;
<Z = Underimpedance start by Z2 or Z3.
Page 44/220 MiCOM P441/P442 & P444
2.9.2 Permissive Overreach Transfer Trip Schemes POP Z2 and POP Z1

The P441, P442 and P444 relays offer two variants of permissive overreach protection
schemes (POP), having the following common features/requirements:
• The scheme requires a duplex signalling channel to prevent possible relay

maloperation due to spurious keying of the signalling equipment. This is necessary
due to the fact that the signalling channel is keyed for faults external to the protected
line.
• The POP Z2 scheme may be more advantageous than permissive underreach

schemes for the protection of short transmission lines, since the resistive coverage of
the Zone 2 elements may be greater than that of the Zone 1 elements.
• Current reversal guard logic is used to prevent healthy line protection maloperation for
the high speed current reversals experienced in double circuit lines, caused by
sequential opening of circuit breakers.
• If the signalling channel fails, Basic distance scheme tripping will be available.
2.9.2.1 Permissive Overreach Protection with Overreaching Zone 2 (POP Z2)
This scheme is similar to that used in the AREVA LFZP and LFZR relays. Figure 20 shows
the zone reaches, and Figure 21 the simplified scheme logic. The signalling channel is
keyed from operation of the overreaching zone 2 elements of the relay. If the remote relay
has picked up in zone 2, then it will operate with no additional delay upon receipt of this
signal. The POP Z2 scheme also uses the reverse looking zone 4 of the relay as a reverse
fault detector. This is used in the current reversal logic and in the optional weak infeed echo
feature.
Send logic: Zone 2

Z2A
ZL
A Z1A B
Z1B
Z2B
P3054XXa
FIGURE 20 - MAIN PROTECTION IN THE POP Z2 SCHEME

MiCOM P441/P442 & P444 Page 45/220
Protection A Protection B Signal

Signal
Send Z2' Send Z2'
Z1' Z1'
tZ1 tZ1
& &
Z3' Z3'
tZ3 & & tZ3
Zp' Zp'
tZp & & tZp

Trip Trip
Z4'
≥1 ≥1
Z4'
tZ4 & & tZ4
tZ2 tZ2
& &
Z2' Z2'
& &
P3058ENa
FIGURE 21 - LOGIC DIAGRAM FOR THE POP Z2 SCHEME

2.9.2.2 Permissive Overreach Protection with Overreaching Zone 1 (POP Z1)
This scheme is similar to that used in the AREVA EPAC and PXLN relays. Figure 22 shows
keyed from operation of zone 1 elements set to overreach the protected line. If the remote
relay has picked up in zone 1, then it will operate with no additional delay upon receipt of this
signal. The POP Z1 scheme also uses the reverse looking zone 4 of the relay as a reverse
fault detector. This is used in the current reversal logic and in the optional weak infeed echo
feature.
NOTE: Should the signalling channel fail, the fastest tripping in the Basic
scheme will be subject to the tZ2 time delay.
Send logic: Zone 1

Z2A
Z1A
A ZL B
Z1B
Z2B
P3059XXa
FIGURE 22 - MAIN PROTECTION IN THE POP Z1 SCHEME

Page 46/220 MiCOM P441/P442 & P444

Send Z1' Send Z1'
Z2' Z2'
& & tZ2

tZ2
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
tZp & &

tZp
Z4' ≥1 Trip Trip ≥1

Z4'
&
tZ4 & tZ4
&
&
Z1' Z1'
& &
tZ1 tZ1
P3060ENa
FIGURE 23 - LOGIC DIAGRAM FOR THE POP Z1 SCHEME

2.9.3 Permissive Overreach Schemes Weak Infeed Features
Weak infeed logic can be enabled to run in parallel with all the permissive schemes. Two
options are available: WI Echo, and WI Tripping.
NOTE: The 2 modes are blocked during Fuse failure conditions.
Power swing detection
Def_Reverse
Reverse
0 &
Distance start
T
FFUS_Confirmed 150 ms
WI Logic confirmed
0
UNB_CR T
60 ms &
Pulse
Timer
200 ms
Activ_WI Echo or WI/echo
P0480ENa
FIGURE 24 - WEAK INFEED MODE ACTIVATION LOGIC

MiCOM P441/P442 & P444 Page 47/220
• Weak Infeed Echo

For permissive schemes, a signal would only be sent if the required signal send zone were
to detect a fault. However, the fault current infeed at one line end may be so low as to be
insufficient to operate any distance zones, and risks a failure to send the signal. Also, if one
circuit breaker had already been left open, the current infeed would be zero. These are
termed weak infeed conditions, and may result in slow fault clearance at the strong infeed
line end (tripping after time tZ2). To avoid this slow tripping, the weak infeed relay can be
set to “echo” back any channel received to the strong infeed relay (ie. to immediately send a
signal once a signal has been received). This allows the strong infeed relay to trip
instantaneously in its permissive trip zone. The additional signal send logic is:
WI logic
& WI_CS
UNB_CR
Echo send:
(NB: For UNB_CR explanation see Unblocking logic in next section 2.9.4)
• Weak Infeed Tripping

Weak infeed echo logic ensures an aided trip at the strong infeed terminal but not at the
weak infeed. The P441, P442 and P444 relays also have a setting option to allow tripping of
the weak infeed circuit breaker of a faulted line.
Three undervoltage elements, Va<, Vb< and Vc< are used to detect the line fault at the weak
infeed terminal, with a common setting typically 70% of rated phase-neutral voltage. This
voltage check prevents tripping during spurious operations of the channel or during channel
testing.
VA<_WI
& WI_A
CB 52a_phA
& FLT_A
VB<_WI
& WI_B
CB 52a_phB
& FLT_B
VC<_WI
& WI_C
CB 52a_phC
UNB_CR & FLT_B

P0481ENa
FIGURE 25 - WEAK INFEED PHASE SELECTION LOGIC

UNB_CR is used as a filter to avoid a permanent phase selection which could be maintained
if Cbaux signals are not mapped in the PSL (when line is opened).
Page 48/220 MiCOM P441/P442 & P444
The additional weak infeed trip logic is:

Weak infeed trip: No Distance Zone Operation, plus reverse directional decision, plus
V<, plus Channel Received.
Weak infeed tripping is time delayed according to the WI:
Trip Time Delay value, usually set at 60ms. Due to the use of phase segregated
undervoltage elements, single pole tripping can be enabled for WI trips if required. If single
pole tripping is disabled a three pole trip will result after the time delay.
WI_A
WI_B ≥1
≥1 WI_PhaseA
WI_C &
WI/echo
Activ_WI
Trip1P_WI Yes
≥1 WI_PhaseB
&
&
≥1 WI_PhaseC
&
P0482ENa
FIGURE 26 – WEAK INFEED TRIP DECISION LOGIC
WI_Phase A
T
WI_Phase B ≥1 0
TtripWI
WI_Phase C
& WI_TripA
& WI_TripB
& WI_TripC
Autor_WI
P0531ENa
FIGURE 27 - WEAK INFEED TRIP LOGIC

MiCOM P441/P442 & P444 Page 49/220
2.9.3.1 Inputs

Activ_WI Configuration Weak infeed mode selection (Disable, Echo,
WI/echo)
Trip1P_WI Configuration Trip 1P in Weak infeed mode
Any Pole Dead Internal Logical Minimum 1 pole is open
Distance start Internal Logical Convergency of any impedance Loop – start of
distance
Reverse Internal Logical Fault detected in Reverse direction
FFUS_Confirmed Internal Logical Fuse Failure confirmed
Power swing Internal Logical Power swing detection
UNB_CR Internal Logical Carrier Received
VA<_WI Internal Logical Phase A selection by WI
VB<_WI Internal Logical Phase B selection by WI
VC<_WI Internal Logical Phase C selection by WI
CB52a_A, CB52a_B, Internal Logical Dead Pole by phase A/B/C
CB52a_C (detected by interlocking contacts 52a/52b)
TtripWI Configuration Weak-Infeed Trip Timer
2.9.3.2 Outputs

WI_CS Internal Logical Carrier Send (echo)
WI_TripA Internal Logical Trip Phase A by WI logic
WI_TripB Internal Logical Trip Phase A by WI logic
WI_TripC Internal Logical Trip Phase A by WI logic
2.9.4 Permissive Scheme Unblocking Logic

Two modes of unblocking logic are available for use with permissive schemes, (Blocking
schemes are excluded).
The unblocking logic creates the : "UNB_Alarm" and the : "UNB_CR" signals, which depend
upon:
• Inputs signals [binary inputs: CR (Carrier Receive) COS (Carrier Out of Service)]
• Settings used for the distance channel & DEF aided trip channel
• Shared or independent logic between DEF & Distance
• Carrier Out of Service detected

Different modes are selectable :
• None (basic mode)
• Loss of Guard mode
• Loss of Carrier mode

Page 50/220 MiCOM P441/P442 & P444
Two types of carrier received signals are used:
• Carrier received (INP_CR - binary input)
• Carrier Out of Service (INP_COS - binary input for distance logic) and
(INP_COS_DEF - binary input for DEF logic)
2.9.4.1 None
The status of opto is copied directly :
UNB_ALARM = INP_COS + INP_COS_DEF

UNB_CR = INP_CR
UNB_CR_DEF = INP_CR_DEF
2.9.4.2 Loss of Guard Mode
This mode is designed for use with frequency shift keyed (FSK) power line carrier
communications. When the protected line is healthy a guard frequency is sent between line
ends, to verify that the channel is in service. However, when a line fault occurs and a
permissive trip signal must be sent over the line, the power line carrier frequency is shifted to
a new (trip) frequency. Thus, distance relays should receive either the guard, or trip
frequency, but not both together. With any permissive scheme, the PLC communications
are transmitted over the power line which may contain a fault. So, for certain fault types the
line fault can attenuate the PLC signals, so that the permissive signal is lost and not received
at the other line end. To overcome this problem, when the guard is lost and no “trip”
frequency is received, the relay opens a window of time during which the permissive scheme
logic acts as though a “trip” signal had been received. Two opto inputs to the relay need to
be assigned, one is the Channel Receive opto, the second is designated Loss of Guard (the
inverse function to guard received). The function logic is summarised in Table 3.
MiCOM P441/P442 & P444 Page 51/220
System Permissive Loss of Permissive Trip Alarm

Condition Channel Guard Allowed Generated
Received
Healthy Line No No No No
Internal Line Fault Yes Yes Yes No
Unblock No Yes Yes, during a Yes, delayed on
150ms window pickup by 150ms
Signalling Yes No No Yes, delayed on
Anomaly pickup by 150ms
TABLE 3 - LOGIC FOR THE LOSS OF GUARD FUNCTION

The window of time during which the unblocking logic is enabled starts 10ms after the guard
signal is lost, and continues for 150ms. The 10ms delay gives time for the signalling
equipment to change frequency as in normal operation.
For the duration of any alarm condition, zone 1 extension logic will be invoked if the option
Z1 Ext on Chan. Fail has been Enabled.
150 ms
0
S
=1 Q UNB Alarm
R
Pulse Timer
Indicates by digital input
200 ms
the Loss of guard
INP COS
&
INP CR
≥1 UNB CR
10 ms
0
S
&
Q
R
Pulse Timer
150 ms
P3061ENa
FIGURE 28 - LOSS OF GUARD LOGIC
INP_CR INP_COS UNB_CR UNB_Alarm

0 0 0 0
1 1 1 0
0 1 1 (Window) 1 (delayed)
1 0 0 1 (delayed)
Page 52/220 MiCOM P441/P442 & P444
2.9.4.3 Loss of Carrier

In this mode the signalling equipment used is such that a carrier/data messages are
continuously transmitted across the channel, when in service. For a permissive trip signal to
be sent, additional information is contained in the carrier (eg. a trip bit is set), such that both
the carrier and permissive trip are normally received together. Should the carrier be lost at
any time, the relay must open the unblocking window, in case a line fault has also affected
the signalling channel. Two opto inputs to the relay need to be assigned, one is the Channel
Receive opto, the second is designated Loss of Carrier (the inverse function to carrier
received). The function logic is summarised in Table 4.
System Permissive Loss of Permissive Trip Alarm

Condition Channel Guard Allowed Generated
Received
Healthy Line No No No No
Internal Line Fault Yes No Yes No
Unblock No Yes Yes, during a Yes, delayed on
150ms window pickup by 150ms
Signalling No Yes No Yes, delayed on
Anomaly pickup by 150ms
TABLE 4 - LOGIC FOR THE LOSS OF CARRIER FUNCTION

The window of time during which the unblocking logic is enabled starts 10ms after the guard
signal is lost, and continues for 150ms.
For the duration of any alarm condition, zone 1 extension logic will be invoked if the option
Z1 Ext on Chan. Fail has been Enabled.
150 ms
0 S
Q UNB Alarm
R
Pulse Timer
Indicates by digital input 200 ms

the Loss of Carrier
INP COS
&
UNB CR
INP CR ≥1
10 ms
0
S
&
Q
R
Pulse Timer
150 ms
P3062ENa
FIGURE 29 - LOSS OF CARRIER

MiCOM P441/P442 & P444 Page 53/220
INP_CR INP_COS UNB_CR UNB_Alarm

0 0 0 0
0 1 1 (Window) 1 (delayed)
1 0 1 0
1 1 0 1 (delayed)
NOTE: For DEF the logic will used depende upon which settings are enabled:
• Same channel (shared)

In this case, the DEF channel is the Main Distance channel signal (the scheme & contacts of
carrier received will be identical)
• Independent channel (2 Different channels) – (2 independent contacts)

2.9.4.4 Inputs

INP_CR Digital input Distance channel carrier received
INP_CR_DEF Digital input DEF channel carrier received
INP_COS Digital input Carrier Out of Service - Distance channel
INP_COS_DEF Digital input Carrier Out of Service – DEF channel
2.9.4.5 Outputs

UNB_CR internal logic Internal carrier received – Distance channel
UNB_CR _DEF internal logic Internal carrier received – DEF channel
UNB_Alarm internal logic Alarm channel Main & DEF
2.9.5 Blocking Schemes BOP Z2 and BOP Z1

The P441, P442 and P444 relays offer two variants of blocking overreach protection
schemes (BOP). With a blocking scheme, the signalling channel is keyed from the reverse
looking zone 4 element, which is used to block fast tripping at the remote line end. Features
are as follows:
• BOP schemes require only a simplex signalling channel.
• Reverse looking Zone 4 is used to send a blocking signal to the remote end to prevent
unwanted tripping.
• When a simplex channel is used, a BOP scheme can easily be applied to a multi-
terminal line provided that outfeed does not occur for any internal faults.
• The blocking signal is transmitted over a healthy line, and so there are no problems
associated with power line carrier signalling equipment.
• BOP schemes provides similar resistive coverage to the permissive overreach

schemes.
• Fast tripping will occur at a strong source line end, for faults along the protected line
section, even if there is weak or zero infeed at the other end of the protected line.
• If a line terminal is open, fast tripping will still occur for faults along the whole of the
protected line length.
• If the signalling channel fails to send a blocking signal during a fault, fast tripping will
occur for faults along the whole of the protected line, but also for some faults within
the next line section.
Page 54/220 MiCOM P441/P442 & P444
• If the signalling channel is taken out of service, the relay will operate in the
conventional Basic mode.
• A current reversal guard timer is included in the signal send logic to prevent unwanted
trips of the relay on the healthy circuit, during current reversal situations on a parallel
circuit.
• To allow time for a blocking signal to arrive, a short time delay on aided tripping, Tp,
must be used, as follows:
Recommended Tp setting = Max. signalling channel operating time + 14ms
2.9.5.1 Blocking Overreach Protection with Overreaching Zone 2 (BOP Z2)
This scheme is similar to that used in the other ALSTOM distance relays. Figure 30 shows
keyed from operation of the reverse zone 4 elements of the relay. If the remote relay has
picked up in zone 2, then it will operate after the Tp delay if no block is received.
Send logic: Reverse Zone 4

Trip logic: Zone 2, plus Channel NOT Received, delayed by Tp.
Z4A Z2A
ZL
A Z1A B
Z1B Z4B
Z2B
P3063XXa
FIGURE 30 - MAIN PROTECTION IN THE BOP Z2 SCHEME
Signal
Emission Signal
Emission
Send Z4'
Téléac Send Z4'
Téléac
Z1' Z1'
tZ1 & & tZ1

T1 T1
Z3' Z3'
& &
tZ3
T3 tZ3
T3
Zp' Zp'
& &
tZp
Tzp tZp
Trip Tzp
≥1 Trip ≥1
Z4' Z4'
& &
tZ4
T4 tZ4
T4
Tp Tp
& &
Z2' Z2'
tZ2
T2 & & tZ2
T2
P0533ENa
FIGURE 31 - LOGIC DIAGRAM FOR THE BOP Z2 SCHEME

MiCOM P441/P442 & P444 Page 55/220
2.9.5.2 Blocking Overreach Protection with Overreaching Zone 1 (BOP Z1)

This scheme is similar to that used in the AREVA EPAC and PXLN relays. Figure 32 shows
keyed from operation of the reverse zone 4 elements of the relay. If the remote relay has
picked up in overreaching zone 1, then it will operate after the Tp delay if no block is
received.
NOTE: The fastest tripping is always subject to the Tp delay.
Send logic: Reverse Zone 4

Trip logic: Zone 1, plus Channel NOT Received, delayed by Tp.
Z4A Z2A
Z1A
A ZL B
Z1B
Z4B
Z2B
P3065XXa
FIGURE 32 - MAIN PROTECTION IN THE BOP Z1 SCHEME

Send Z4' Send Z4'
Z2' Z2'
tZ2 & & tZ2
Z3' Z3'
& &
tZ3 tZ3
Zp' Zp'
& &
tZp tZp
≥1 Trip Trip ≥1
Z4' Z4'
& &
tZ4 tZ4
&
&
Z1' Z1'
tZ1 tZ1
& &
Tp Tp
P3066ENa
FIGURE 33 - LOGIC DIAGRAM FOR THE BOP Z1 SCHEME

Page 56/220 MiCOM P441/P442 & P444
2.10 Distance schemes current reversal guard logic

For double circuit lines, the fault current direction can change in one circuit when circuit
breakers open sequentially to clear the fault on the parallel circuit. The change in current
direction causes the overreaching distance elements to see the fault in the opposite direction
to the direction in which the fault was initially detected (settings of these elements exceed
150% of the line impedance at each terminal). The race between operation and resetting of
the overreaching distance elements at each line terminal can cause the Permissive
Overreach, and Blocking schemes to trip the healthy line. A system configuration that could
result in current reversals is shown in Figure 34. For a fault on line L1 close to circuit
breaker B, as circuit breaker B trips it causes the direction of current flow in line L2 to
reverse.
t2(C) t2(D)
Fault Fault
A L1 B A L1 B
Strong Weak
source C L2 D source C L2 D
Note how after circuit breaker B on line L1 opens

the direction of current flow in line L2 is reversed.
P3067ENa
FIGURE 34 - CURRENT REVERSAL IN DOUBLE CIRCUIT LINES

(See the zone’ description in section 2.4 – unblock/blocking logical scheme)
2.10.1 Permissive Overreach Schemes Current Reversal Guard
The current reversal guard incorporated in the POP scheme logic is initiated when the
reverse looking Zone 4 elements operate on a healthy line. Once the reverse looking Zone 4
elements have operated, the relay’s permissive trip logic and signal send logic are inhibited
at substation D (Figure 34). The reset of the current reversal guard timer is initiated when
the reverse looking Zone 4 resets. A time delay tREVERSAL GUARD is required in case the
overreaching trip element at end D operates before the signal send from the relay at end C
has reset. Otherwise this would cause the relay at D to over trip. Permissive tripping for the
relays at D and C substations is enabled again, once the faulted line is isolated and the
current reversal guard time has expired. The recommended setting is:
tREVERSAL GUARD = Maximum signalling channel reset time + 35ms.
2.10.2 Blocking Scheme Current Reversal Guard
The current reversal guard incorporated in the BOP scheme logic is initiated when a blocking
signal is received to inhibit the channel-aided trip. When the current reverses and the
reverse looking Zone 4 elements reset, the blocking signal is maintained by the timer
tREVERSAL GUARD. Thus referring to Figure 34, the relays in the healthy line are
prevented from over tripping due to the sequential opening of the circuit breakers in the
faulted line. After the faulty line is isolated, the reverse-looking Zone 4 elements at
substation C and the forward looking elements at substation D will reset. The recommended
setting is:
Where Duplex signalling channels are used:
tREVERSAL GUARD = Maximum signalling channel operating time + 14ms.
Where Simplex signalling channels are used:
tREVERSAL GUARD = Maximum signalling channel operating time -
minimum signalling channel reset time + 14ms.
MiCOM P441/P442 & P444 Page 57/220
2.11 Distance schemes in the “open” programming mode

When a scheme is required which is not covered in the Standard modes above, the Open
programming mode can be selected. The user then has the facility to decide which distance
relay zone is to be used to key the signalling channel, and what type of aided scheme runs
when the channel is received. The signal send zone options are shown in Table 5, and the
aided scheme options on channel receipt are shown in Table 6.
Setting Signal Send Zone Function

None No Signal Send To configure a Basic scheme.
CsZ1 Zone 1 To configure a Permissive scheme.
CsZ2 Zone 2 To configure a Permissive scheme.
CsZ4 Zone 4 To configure a Blocking scheme.
TABLE 5 - SIGNAL SEND ZONES IN OPEN SCHEMES
Setting Aided Scheme Function

None None To configure a Basic scheme.
PermZ1 To configure a Permissive scheme where Zone 1 can only trip if a
channel is received.
PermZ2 To configure a Permissive scheme where Zone 2 can trip without
waiting for tZ2 timeout if a channel is received.
PermFwd To configure a Permissive scheme where any forward distance zone
start will cause an aided trip if a channel is received.
BlkZ1 To configure a Blocking scheme where Zone 1 can only trip if a
channel is NOT received.
BlkZ2 To configure a Blocking scheme where Zone 2 can trip without waiting
for tZ2 timeout if a channel is NOT received.
TABLE 6 - AIDED SCHEME OPTIONS ON CHANNEL RECEIPT

Where appropriate, the tREVERSAL GUARD and Tp timer (in case of blocking scheme for
covering the time transmission) settings will appear in the relay menu. Further customising
of distance schemes can be achieved using the Programmable Scheme Logic to condition
send and receive logic.
2.12 Switch On To Fault and Trip On Reclose protection
Switch on to fault protection (SOTF) is provided for high speed clearance of any detected
fault immediately following manual closure of the circuit breaker. SOTF protection remains
enabled for 500ms following circuit breaker closure, detected via the CB Man Close input or
CB close with CB control or Internal detection with all pole dead (see Figure 37), or for the
duration of the close pulse on internal detection.
[Instantaneous three pole tripping (and auto-reclose blocking) can be also selected (AR lock
out by BAR Figure 80 in AR section)– See BAR logic in Figure 80 AR description section].
Trip on reclose protection (TOR) is provided for high speed clearance of any detected fault
immediately following autoreclosure of the circuit breaker.
Instantaneous three pole tripping (TOR logic) can be selected for faults detected by various
elements, (See MiCOM S1 settings description above). TOR protection remains enabled for
500ms following circuit breaker closure. The use of a TOR scheme is usually advantageous
for most distance schemes, since a persistent fault at the remote end of the line can be
cleared instantaneously after reclosure of the breaker, rather than after the zone 2 time
delay.
The options for SOTF and TOR are found in the “Distance Schemes” menu.
Page 58/220 MiCOM P441/P442 & P444
(7 additional settable bits are available from version A3.1)

and are as shown below:

Min Max
GROUP 1
DISTANCE SCHEMES
TOR-SOTF Mode Bit 0: TOR Z1 Enabled,
Bit 1:TOR Z2 Enabled,
Bit 2: TOR Z3 Enabled,
Bit 3:TOR All Zones,
TOR
Bit 4:TOR Dist. Scheme .
Dist scheme
14 bits
Bit 0 to 4 Bit 5 : SOTF All Zones
Default: bit 4 Bit 6 : SOTF Lev. Detect.
From version A3.1:

Bit 7 : SOTF Z1 Enabled
Bit 8 : SOTF Z2 Enabled
SOTF all Zones Bit 9 : SOTF Z3 Enabled
Bit 5 to D
Bit A: SOTF Z1+Rev
Default: bit 5
Bit B: SOTF Z2+Rev
Bit C: SOTF Dist. Scheme
Bit D: SOTF Disable
SOTF Delay 110sec 10sec 3600sec 1 sec
MiCOM P441/P442 & P444 Page 59/220
2.12.1 Initiating TOR/SOTF Protection

SOTF/TOR Activated
2 signals are issued from the logic: TOR Enable - SOTF Enable (See DDB description in
appendix from that chapter). There is a difference between them due to the AR (internal or
external) which must be blocked in SOTF logic.
The detection of open pole is based on the activation of : Any Pole Dead (at least one pole
opened). It is a OR logic between the internal analog detection (level detectors) or the
external detection (given by CB status : 52A/52B, which is requested in case of VT Bus
side).
The Dead pole Level Detectors V< and I< per phase are settable as described belows:
− V< is either a fixed threshold 20% Vn or equal to V Dead Line threshold of the check
synchro function if enabled, (default value for V< dead line = 20% VN)
− I< is either a fixed threshold of 5% In or equal to the I< threshold of the Breaker
Failure protection (default value for I< CB fail = 5% IN).
TOR Enable logic is activated in 2 cases :
1. When internal AR is activated or when the reclaim signal from an external AR is
connected to a digital input (opto):
As soon as the reclaim time starts, the « TOR Enable » is activated . It will be reset at the
end of the internal or external reclaim time.
2. Without any reclaim time (internal AR disabled or external opto input Reclaim Time not
assigned in the PSL):
TOR Enable will be activated during a 200 ms time window, following the detection of pole
dead detection. The TOR logic will be reset (TOR Enable) ONLY 500 ms after the drop off of
any pole dead detection.
This behaviour has been designed to avoid any maloperation on a parallel line, in case of an
incorrect Any Pole Dead detection performed by the internal level detectors (Ex: Fault front
of Busbar on a parallel line and weak source on the other end of the line)
A delay of 200ms will allow the adjacent line to be tripped and the level detectors will then
reset the timer :
• TOR protection logic is enabled any time that any circuit breaker pole has been open
longer than 200ms but not longer than 110s default value (ie. First shot autoreclosure
is in progress)- the timer is configurable from version A3.0 /allows variation of the
duration when dead pole is detected before the internal logic detects line dead and
activates the SOTF logic and also where the relay logic detects that further delayed
autoreclose shots are in progress.
Trip
Reclosing
Any Pole Dead
200 ms 500 ms
TOR Enable
P0532ENa
• SOTF protection is enabled any time that the circuit breaker has been open 3 pole for
longer than 110s, that timer is configurable from version A3.0 /allows variation of the
duration when dead pole is detected before the internal logic detects line dead and
activates the SOTF logic and autoreclosure is not in progress. Thus, SOTF protection
is enabled for manual reclosures, not for autoreclosure.
Page 60/220 MiCOM P441/P442 & P444
SOTF Enable logic is activated in 2 cases:
1. If no external closing command (manual or by remote communication via control

system) is present :
When the internal levels detectors have detected a three pole open for more than 110 s
(settable from A3.0); as soon as all poles are closed, then SOTF is enabled for 500 ms and
then reset,
2. When an external closing command (manual or by remote communication via control

system) is present:
The SOTF logic is activated immediately. As soon as all the poles are closed (after the
external closing order if a synchro condition is used in the PSL); SOTF is enable for
500msec and then is reset.
AR_RECLAIM
Pulse
>1
T
INP_RECLAIM >1 TOR Enable
500 ms
1P or 3P AR
INP_RECLAIM >1
Assigned
T
& 0
200 ms S
Q
>1
>1 R
Any Pole Dead 0
T
500 ms
>1
R
T Q SOTF Enable
All Pole Dead
0 S
>1
TSOTF Enable &
(by default:110 s)
SOTF HS
CBC_Closing Order
CB_Control &
activated
&
INP_CB_Man_Close
P0485ENa
FIGURE 35 – SOTF/TOR LOGIC - START

MiCOM P441/P442 & P444 Page 61/220
2.12.2 TOR-SOTF Trip Logic

During the TOR/SOTF 500ms window, individual distance protection zones can be enabled
or disabled by means of the TOR-SOTF Mode function links. Setting the relevant bit to 1 will
enable that zone, setting bits to 0 will disable distance zones. When enabled (Bit = 1), the
zones will trip without waiting for their usual time delays. Thus tripping can even occur for
close-up three phase short circuits where line connected VTs are used, and memory voltage
for a directional decision is unavailable. Setting “All Zones Enabled” allows instantaneous
tripping to occur for all faults within the trip characteristic shown in Figure 36 below. Note,
the TOR/SOTF element has second harmonic current detection, to avoid maloperation
where power transformers are connected in-zone, and inrush current would otherwise cause
problems. Harmonic blocking of distance zones occurs when the magnitude of the second
harmonic current exceeds 25% of the fundamental.
Zone 4
Zone 3
Directional
line (not used)
P0535ENa
FIGURE 36 - “ALL ZONES” DISTANCE CHARACTERISTIC AVAILABLE FOR SOTF/TOR TRIPPING

Test results from different settings selected in MiCOM S1.
WARNING: MiCOM S1 DOES NOT DYNAMICALLY CHANGE THE SETTINGS, AND
ONE SETTING MAY AFFECT ANOTHER.
SOTF Z2: means that an instantaneous 3 poles trip will occur for fault in Z1 or Z2 without
waiting for the issue of the distance timer T1 or T2 only in case Z2 or Z1 are detected by the
logic.
T0 = instantaneous Trip
Ts = Trip at the end of SOTF time window (500ms)
T1 = 0, T2=200ms, Tzp=400ms, T3=600ms, T4=1s (Distance timer).
The fault is maintained with a duration bigger than the 500msec SOTF time, until a trip
occurs.
Page 62/220 MiCOM P441/P442 & P444
SOTF Trip logic results
Type of Fault Fault in Z1 Fault in Z2 Fault in Zp Fault in Zp Fault in Z3 Fault in Z4

Fwd Rev
SOTF selected Logic
SOTF All Zone SOTF trip SOTF trip SOTF trip Same result SOTF trip SOTF trip
(Zp Fwd) T0 T0 T0 if Zp Rev T0 T0
T0
SOTF Z1 SOTF trip DIST trip DIST trip x DIST trip DIST trip
(Zp Fwd) T0 T2 TZp T3 T4
SOTF Z2 SOTF trip SOTF trip DIST trip x DIST trip DIST trip
(Zp Fwd) T0 T0 TZp T3 T4
SOTF Z3 SOTF trip SOTF trip SOTF trip x SOTF trip DIST trip
(Zp Fwd) T0 T0 T0 T0 T4
SOTF Z1+Rev (Zp Fwd) SOTF trip DIST trip DIST trip x DIST trip SOTF trip
T0 T2 TZp T3 T0
SOTF Z2+Rev (Zp Fwd) SOTF trip SOTF trip DIST trip x DIST trip SOTF trip
T0 T0 TZp T3 T0
SOTF Z1+Rev (Zp Rev) SOTF trip DIST trip x SOTF trip DIST trip DIST trip
T0 T2 T0 T3 T4
SOTF Z2+Rev (Zp Rev) SOTF trip SOTF trip x SOTF trip DIST trip DIST trip
T0 T0 T0 T3 T4
SOTF Dist. Sch. (Zp fwd) SOTF trip SOTF trip SOTF trip x SOTF trip SOTF trip
(With a 3Plogic) T1 T2 TZp T3 T4
SOTF Disable DIST trip DIST trip DIST trip x DIST trip DIST trip
(Distance scheme & 1P) T1* T2 TZp* T3 T4
No setting in SOTF DIST trip DIST trip DIST trip x DIST trip DIST trip
(All Bits at 0) & No I>3 T1* T2 TZp T3 T4
Level detectors SOTF trip SOTF trip SOTF trip x SOTF trip SOTF trip
T0 T0 T0 T0 T0
*No Ban Tri: Distance trip logic is applied without any 3P trip logic forced by SOTF.
TOR Trip logic results
Type of Fault Fault in Z1 Fault in Z2 Fault in Zp Fault in Zp Fault in Z3 Fault in Z4

Fwd Rev
TOR selected Logic
TOR All Zone TOR trip TOR trip TOR trip TOR trip TOR trip TOR trip
(Zp Fwd) T0 T0 T0 T0 T0 T0
TOR Z1 Enabled TOR trip Dist trip Dist trip Dist trip Dist trip Dist trip
(Zp Fwd) T0 T2 Tp Tp T3 T4
TOR Z2 Enabled TOR trip TOR trip Dist trip Dist trip Dist trip Dist trip
(Zp Fwd) T0 T0 Tp Tp T3 T4
TOR Z3 Enabled TOR trip TOR trip TOR trip Dist trip TOR trip Dist trip
(Zp Fwd) T0 T0 T0 Tp T0 T4
TOR Dist.Scheme Dist trip Dist trip Dist trip Dist trip Dist trip Dist trip
(logic POP/PUP) T1 T2 Tp Tp T3 T4
MiCOM P441/P442 & P444 Page 63/220
2.12.3 Switch on to Fault and Trip on Reclose by I>3 Overcurrent Element (not filtered for inruch
current):
Inside the 500 ms time window initiated by SOTF/TOR logic, an instantaneous 3 phases trip
logic will be issued, if a faulty current is measured over the I>3 threshold value (adjusted in
MiCOM S1).
After the 500 ms TOR/SOTF time windows has ended, the I>3 overcurrent element remains
in service with a trip time delay equal to the setting I>3 Time Delay. This element would trip
for close-up high current faults, such as those where maintenance earth clamps are
inadvertently left in position on line energisation.
2.12.4 Switch on to Fault and Trip on Reclose by Level Detectors
TOR/SOTF level detectors (Bit6 in SOTF logic), allows an instantaneous 3 phases tripping
from any low set I< level detector, provided that its corresponding Live Line level detector
has not picked up within 20ms. When closing a circuit breaker to energize a healthy line,
current would normally be detected above setting, but no trip results as the system voltage
rapidly recovers to near nominal. Only when a line fault is present will the voltage fail to
recover, resulting in a trip.
• SOTF/TOR trip by level detectors per phase: If Vphase< 70% Vn AND if Iphase> 5% In
during 20 ms (to avoid any maloperation due to unstable contact during reclosing
order), an instantaneous trip order is issued.
Page 64/220 MiCOM P441/P442 & P444
The logic diagram for this, and other modes of TOR/SOTF protection is shown in Figure 37:
T
Va > & 0 & TOC A
Ia < 20 ms
Vb >
T
& 0 & TOC B
Ib <
20 ms
Vc > T
& 0 & TOC C
Ic <
20 ms
SOTF LD Enable LD Enable
SOTF All Zones Enable

&
All Zones
SOTF Z1 Enable
&
≥1
Z1 &
SOTF Z1 + rev Enable &
Zp
&
Z4
1
Zp Reverse &
SOTF Z2 + rev Enable &
Z1+Z2
&
SOTF Z2 Enable
≥1 SOTF/TOR trip
SOTF Z3 Enable
&
Z1+Z2+Z3
PHOC_Start_3Ph_I>3
SOTF Enable
TOR Z1 Enable
&
Z1
TOR Z2 Enable
Z1+Z2 &
TOR Z3 Enable
& ≥1
Z1+Z2+Z3
&
TOR All Zones Enable
&
All Zones
Dist. Scheme Enable

&
Dist Trip
TOR Enable
P0486ENa
FIGURE 37 - SWITCH ON TO FAULT AND TRIP ON RECLOSE LOGIC DIAGRAM

MiCOM P441/P442 & P444 Page 65/220
2.12.5 Setting Guidelines
• When the overcurrent option is enabled, the I>3 current setting applied should be
above load current, and > 35% of peak magnetising inrush current for any connected
transformers as this element has no second harmonic blocking. Setting guidelines for
the I>3 element are shown in more detail in Table below.
• When a Zone 1 Extension scheme is used along with autoreclosure, it must be

ensured that only Zone 1 distance protection can trip instantaneously for TOR.
Typically, TOR-SOTF Mode bit 0 only would be set to “1”. Also the I>3 element must
be disabled to avoid overreaching trips by level detectors.
2.12.5.1 Inputs

Ia<, Ib<, Ic< Internal Logic No current detected (I< threshold, by default 5% In
or I< CB fail)
Dist Trip Internal Logic Trip by Distance logic
AR_RECLAIM Internal Logic Internal AR reclaim in progress
INP_RECLAIM Digital Input External AR in progress (by opto)
CBC_closing order Internal Logic Closing order in progress by CB Control
INP_CB_Man_Close Digital Input CB Closing order (by opto)
CB Control activated Configuration CB control activated
1P or 3 P AR Configuration 1P or 3P AR enabled
TOR Zi Enable Configuration TOR logic enabled in case of fault in Zi
TOR All Zones Enable Configuration TOR logic enabled in case for all zones (Distance
Start)
Dist. Scheme Enable Configuration Distance scheme aided Trip logic applied
SOTF LD Enable Configuration Levels detectors in SOTF activated
SOTF All Zones Enable Configuration SOTF logic enabled for all zones (Distance Start)
Va>, Vb>, Vc> Internal Logic Live Voltage detected ( V Live Line threshold, fixed
at 70% Vn)
Valid_stx_PHOC Configuration Threshold I>3 must be activated
PHOC_Start_3Ph_I>3 Internal Logic Detection by I>3 overcurrents (not filtered by
INRUSH.)
Z1, Z2, Z3, all zones Internal Logic Zones Detected
2.12.5.2 Outputs

TOC_A Internal Logic Trip phase A by TOR /SOTF
TOC_B Internal Logic Trip phase B by TOR /SOTF
TOC_C Internal Logic Trip phase C by TOR /SOTF
SOTF/TOR trip Internal Logic Trip by SOTF (manual close) or TOR (AR close)
logic
Page 66/220 MiCOM P441/P442 & P444
2.12.6 Inputs /Outputs in SOTF-TOR DDB Logic

See also, DDB description in appendix of the same section.
2.12.6.1 Inputs
Man Close CB
Digital input (opto) 6 is assigned by default PSL to "Man Close CB"
The DDB Man Close CB if assigned to an opto input in PSL and when energized, will initiate
the internal SOTF logic enable (see Figure 35) without CB control.
If CB control is activated SOTF will be enable by internal detection (CB closing order
managed by CB control)
AR Reclaim
The DDB AR Reclaim if assigned to an opto input in PSL and when energized, will start the
internal logic TOR enable (see Figure 35).- (External AR logic applied).
CB aux A
CB aux B
CB aux C
The DDB CB Aux if assigned to an opto input in PSL and when energized, will be used for
Any pole dead & All pole dead internal detection
2.12.6.2 Outputs
SOTF Enable
The DDB SOTF Enable if assigned in PSL, indicates that SOTF logic is enabled in the relay
– see logic description in Figure 37
TOR Enable
The DDB TOR Enable if assigned in PSL, indicates that TOR logic is activated in the relay -
see logic description in Figure 37
TOC Start A
The DDB TOC Start A if assigned in PSL, indicates a Tripping order on phase A issued by
the SOTF levels detectors - see Figure 37
TOC Start B
The DDB TOC Start B if assigned in PSL, indicates a Tripping order on phase B issued by
TOC Start C
The DDB TOC Start C if assigned in PSL, indicates a Tripping order on phase C issued by
Any Pole Dead

The DDB Any Pole Dead if assigned in PSL, indicates that at least one pole is opened
MiCOM P441/P442 & P444 Page 67/220
All Pole Dead

The DDB All Pole Dead if assigned in PSL, indicates all pole are dead (All 3 poles are
opened)
SOTF/TOR Trip
The DDB SOTF/TOR Trip if assigned in PSL, indicates a 3poles trip by TOR or SOTF logic -
see Figure 37
2.13 Power swing blocking (PSB)
Power swings are oscillations in power flow which can follow a power system disturbance.
They can be caused by sudden removal of faults, loss of synchronism across a power
system or changes in direction of power flow as a result of switching. Such disturbances can
cause generators on the system to accelerate or decelerate to adapt to new power flow
conditions, which in turn leads to power swinging. A power swing may cause the impedance
presented to a distance relay to move away from the normal load area and into one or more
of its tripping characteristics. In the case of a stable power swing it is important that the relay
should not trip. The relay should also not trip during loss of stability since there may be a
utility strategy for controlled system break up during such an event.

Min Max
GROUP 1
POWER SWING
Delta R 0.5/In Ω 0 400/In Ω 0.01/In Ω
Delta X 0.5/In Ω 0 400/In Ω 0.01/In Ω
IN > Status Enabled Disabled or Enabled
IN > (% Imax) 40% 10% 100% 1%
I2 > Status Enabled Disabled or Enabled
I2 > (% Imax) 30% 10% 100% 1%
Imax line > Status Enabled Disabled or Enabled
Imax line > 3 x In 1 x In 20 x In 0.01 x In
Unblocking Time delay 30s 0 30s 0.1s
Blocking Zones 00000000 Bit 0: Z1/Z1X Block, Bit 1: Z2 Block,
Bit 2: Z3 Block, Bit 3: Zp Block.
Page 68/220 MiCOM P441/P442 & P444
2.13.1 The Power Swing Blocking Element

PSB can be disabled on distribution systems, where power swings would not normally be
experienced.
Operation of the PSB element is menu selectable to block the operation of any or all of the
distance zones (including aided trip logic) or to provide indication of the swing only. The
Blocked Zones function links are set to 1 to block zone tripping, or set to 0 to allow tripping
as normal. Power swing detection uses a ∆R (resistive) and ∆X (reactive) impedance band
which surrounds the entire phase fault trip characteristic. This band is shown in Figure 38
below:
∆X
Zone 3
Power
swing
∆R ∆R bundary
Zone 4
∆X
P3068ENa
FIGURE 38 - POWER SWING DETECTION CHARACTERISTICS
FIGURE 39 - POWER SWING SETTINGS (SET HIGHZONE IS LOCKED OUT)

MiCOM P441/P442 & P444 Page 69/220
A fault on the system results in the measured impedance rapidly crossing the ∆R band, en
route to a tripping zone. Power swings follow a much slower impedance locus. A power
swing is detected where all three phase-phase measured impedances have remained within
the ∆R band for at least 5ms, and have taken longer than 5ms to reach the trip characteristic
(the trip characteristic boundary is defined by zones 3 and 4). PSB is indicated on reaching
zone 3 or zone 4. Typically, the ∆R and ∆X band settings are both set with: 0.032 x ∆f x
Rmin load.
NOTE: ∆f = Power swing frequency

2.13.2 Unblocking of the Relay for Faults During Power Swings
The relay can operate normally for any fault occurring during a power swing, as there are
three selectable conditions which can unblock the relay:
A biased residual current threshold is exceeded - this allows tripping for earth faults
occurring during a power swing. The bias is set as: Ir> (as a percentage of the highest
measured current on any phase), with the threshold always subject to a minimum of 0.1 x In.
Thus the residual current threshold is:
IN > 0.1 In + ( (IN> / 100) . (I maximum) ).
A biased negative sequence current threshold is exceeded - this allows tripping for phase-
phase faults occurring during a power swing. The bias is set as: I2> (as a percentage of the
highest measured current on any phase), with the threshold always subject to a minimum of
0.1 x In. Thus the negative sequence current threshold is:
I2 > 0.1 In + ( (I2> / 100) . (I maximum) ).
A phase current threshold is exceeded - this allows tripping for three-phase faults occurring
during a power swing. The threshold is set as: Imax line> (in A).
Page 70/220 MiCOM P441/P442 & P444
AnyPoleDead
Loop AN detected
≥1 &
S ≥2
in PS bundary ∆t
Q S
≥1 R Q PS loop AN
≥1
Tunb &
Loop BN detected ≥1
in PS bundary S
∆t
Q S
≥1 R Q PS loop BN
Tunb
≥1
Loop CN detected
in PS bundary S
Q
∆t
S ≥1 & S
≥1 R Q PS loop CN Q
Power Swing Detection
R
R
Tunb
Inrush AN
Inrush BN
Inrush CN
Fault clear ≥1
Healthy Network
All Pole Dead

& /Fuse Failure confirmed
PS disabled
Iphase>(Imax line>) S
Q
Unblocking Imax disabled R
∆ Tunblk
IN> threshold S
≥1 S
Q
R
Unblocking IN disabled Q
Power Swing unblocking
∆Tunblk ≥1 R
I2> threshold S
Q
R
Unblocking I2> disabled
P0488ENa
FIGURE 40 – POWER SWING DETECTION & UNBLOCKING LOGIC

MiCOM P441/P442 & P444 Page 71/220
Z1x
& Z1x'
Unblock Z1
≥1
Z1'
Z1 &
Power Swing Detection Unblock Z2

≥1 ≥1
Unblocking Power Swing Z2'
&
Z2
Unblock Z3
≥1
Z3'
&
Z3
≥1
Zp_Fwd Zp'
& &
Unblock Zp
Zp
P0489ENa
FIGURE 41 - DISTANCE PROTECTION BLOCK/UNBLOCKING LOGIC

∆R Configuration 0.1/In to 250/In by step 0.01/In
∆X Configuration 0.1/In to 250/In by step de 0.01/In
∆Tunbk Configuration 0 to 60 s by step de 1 s.
Imax> Configuration 1 to 20 In by step de 0.01
IN> Configuration 0.1In + 10 to 100 % of Imax>
I2> Configuration 0.1In + 10 to 100 % of Imax>
Unblock Z1 Configuration 0 => Z1 blocked during PSwing
1 => Z1 unblocked during PSwing
Unblock Zp Configuration 0 => Zp blocked during PSwing
1 => Zp unblocked during PSwing
Page 72/220 MiCOM P441/P442 & P444
2.13.3 Typical Current Settings

The three current thresholds must be set above the maximum expected residual current
unbalance, the maximum negative sequence unbalance, and the maximum expected power
swing current. Generally, the power swing current will not exceed 2.In. Typical setting limits
are given in Table 7 and Table 8 below:
Parameter Minimum Setting (to avoid Maximum Setting (to ensure Typical
maloperation for asymmetry unblocking for line faults) Setting
in power swing currents)
IN> > 30% < 100% 40%
I2> > 10% < 50% 30%
TABLE 7 - BIAS THRESHOLDS TO UNBLOCK PSB FOR LINE FAULTS
Parameter Minimum Setting Maximum Setting

Imax line> 1.2 x (maximum power swing 0.8 x (minimum phase fault current level)
current)
TABLE 8 - PHASE CURRENT THRESHOLD TO UNBLOCK PSB FOR LINE FAULTS

2.13.4 Removal of PSB to Allow Tripping for Prolonged Power Swings
It is possible to limit the time for which blocking of any distance protection zones is applied.
Thus, certain locations on the power system can be designated as split points, where circuit
breakers will trip three pole should a power swing fail to stabilise. Power swing blocking is
automatically removed after the Unblocking Delay with typical settings:
− 30s if a near permanent block is required;
− 2s if unblocking is required to split the system.

2.14 Directional and non-directional overcurrent protection
The overcurrent protection included in the P441, P442 and P444 relays provides two stage
non-directional / directional three phase overcurrent protection and two non directional
stages (I>3 and I>4), with independent time delay characteristics. One or more stages may
be enabled, in order to complement the relay distance protection. All overcurrent and
directional settings apply to all three phases but are independent for each of the four stages.
The first two stages of overcurrent protection, I>1 and I>2 have time delayed characteristics
which are selectable between inverse definite minimum time (IDMT), or definite time (DT).
The third and fourth overcurrent stages can be set as follows:
I>3 - The third element is fixed as non-directional, for instantaneous or definite time delayed
tripping. This element can be permanently enabled, or enabled only for Switch on to Fault
(SOTF) or Trip on Reclose (TOR). It is also used to detect close-up faults (in SOTF/TOR
tripping logic no timer is applied).
I>4 - The fourth element is only used for stub bus protection, where it is fixed as non-
directional, and only enabled when the opto-input Stub Bus Isolator Open (Stub Bus
Enable) is energised.
All the stages trip three-phase only. (Could be used for back up protection during a VTS
logic)
The following Table shows the relay menu for overcurrent protection, including the available
setting ranges and factory defaults. Note that all tripping via overcurrent protection is three
pole.
MiCOM P441/P442 & P444 Page 73/220

Min Max
GROUP 1
BACK-UP I>
I>1 Function DT Disabled, DT, IEC S Inverse, IEC V
Inverse, IEC E Inverse, UK LT Inverse,
IEEE M Inverse, IEEE V Inverse, IEEE E
Inverse, US Inverse, US ST Inverse
I>1 Direction Directional Fwd Non-Directional, Directional Fwd,
Directional Rev
I>1 VTS Block Non-Directional Block, Non-Directional
I>1 Current Set 1.5 x In 0.08 x In 4.0 x In 0.01 x In
I>1 Time Delay 1s 0 100s 0.01s
I>1 Time Delay VTS 0.2s 0 100s 0.01s
I>1 TMS 1 0.025 1.2 0.025
I>1 Time Dial 7 0.5 15 0.1
I>1 Reset Char DT DT or Inverse
I>1 tRESET 0 0 100s 0.01s
I>2 Function DT Disabled, DT, IEC S Inverse, IEC V
I>2 Direction Non Directional Non-Directional, Directional Fwd,
Directional Rev
I>2 VTS Block Non-Directional Block, Non-Directional
I>2 Current Set 2 x In 0.08 x In 4.0 x In 0.01 x In
I>2 Time Delay 2s 0 100s 0.01s
I>2 Time Delay VTS 2s 0 100s 0.01s
I>2 TMS 1 0.025 1.2 0.025
I>2 Time Dial 7 0.5 15 0.1
I>2 Reset Char DT DT or Inverse
I>2 tRESET 0 0 100s 0.01s
I>3 Status Enabled Disabled or Enabled
I>3 Current Set 3 x In 0.08 x In 32 x In 0.01xIn
I>3 Time Delay 3s 0s 100s 0.01s
I>4 Status Disabled Disabled or Enabled
I>4 Current Set 4 x In 0.08 x In 32 x In 0.01xIn
I>4 Time Delay 4s 0s 100s 0.01s
Page 74/220 MiCOM P441/P442 & P444
The inverse time delayed characteristics listed above, comply with the following formula:
t=T× + L
K
(I/Is) α
–1 
Where:
t = operation time
K = constant
I = measured current
Is = current threshold setting
α = constant
L = ANSI/IEEE constant (zero for IEC curves)
T = Time multiplier Setting
Curve description Standard K constant α constant L constant

Standard Inverse IEC 0.14 0.02 0
Very Inverse IEC 13.5 1 0
Extremely Inverse IEC 80 2 0
Long Time Inverse UK 120 1 0
Moderately Inverse IEEE 0.0515 0.02 0.0114
Very Inverse IEEE 19.61 2 0.491
Extremely Inverse IEEE 28.2 2 0.1217
Inverse US 5.95 2 0.18
Short Time Inverse US 0.02394 0.02 0.1694
Note that the IEEE and US curves are set differently to the IEC/UK curves, with regard to the
time setting. A time multiplier setting (TMS) is used to adjust the operating time of the IEC
curves, whereas a time dial setting is employed for the IEEE/US curves. Both the TMS and
Time Dial settings act as multipliers on the basic characteristics but the scaling of the time
dial is 10 times that of the TMS, as shown in the previous menu. The menu is arranged such
that if an IEC/UK curve is selected, the I> Time Dial cell is not visible and vice versa for the
TMS setting.
MiCOM P441/P442 & P444 Page 75/220
2.14.1 Application of Timer Hold Facility

The first two stages of overcurrent protection in the P441, P442 and P444 relays are
provided with a timer hold facility, which may either be set to zero or to a definite time value.
(Note that if an IEEE/US operate curve is selected, the reset characteristic may be set to
either definite or inverse time in cell I>1 Reset Char; otherwise this setting cell is not visible
in the menu). Setting of the timer to zero means that the overcurrent timer for that stage will
reset instantaneously once the current falls below 95% of the current setting. Setting of the
hold timer to a value other than zero, delays the resetting of the protection element timers for
this period. This may be useful in certain applications, for example when grading with
upstream electromechanical overcurrent relays which have inherent reset time delays.
Another possible situation where the timer hold facility may be used to reduce fault clearance
times is where intermittent faults may be experienced. An example of this may occur in a
plastic insulated cable. In this application it is possible that the fault energy melts and reseals
the cable insulation, thereby extinguishing the fault. This process repeats to give a
succession of fault current pulses, each of increasing duration with reducing intervals
between the pulses, until the fault becomes permanent.
When the reset time of the overcurrent relay is instantaneous the relay may not trip until the
fault becomes permanent. By using the timer hold facility the relay will integrate the fault
current pulses, thereby reducing fault clearance time.
Note that the timer hold facility should not be used where high speed autoreclose with short
dead times are set.
The timer hold facility can be found for the first and second overcurrent stages as settings
I>1 tRESET and I>2 tRESET. Note that this cell is not visible if an inverse time reset
characteristic has been selected, as the reset time is then determined by the programmed
time dial setting.
2.14.2 Directional Overcurrent Protection
If fault current can flow in both directions through a relay location, it is necessary to add
directional control to the overcurrent relays in order to obtain correct discrimination. Typical
systems which require such protection are parallel feeders and ring main systems. Where
I>1 or I>2 stages are directionalised, no characteristic angle needs to be set as the relay
uses the same directionalising technique as for the distance zones (fixed superimposed
power technique).
2.14.3 Time Delay VTS
Should the Voltage Transformer Supervision function detect an ac voltage input failure to the
relay, such as due to a VT fuse blow, this will affect operation of voltage dependent
protection elements. Distance protection will not be able to make a forward or reverse
decision, and so will be blocked. As the I>1 and I>2 overcurrent elements in the relay use
the same directionalising technique as for the distance zones, any directional zones would
be unable to trip.
To maintain protection during periods of VTS detected failure, the relay allows an I> Time
Delay VTS to be applied to the I>1 and I>2 elements. On VTS pickup, both elements are
forced to have non-directional operation, and are subject to their revised definite time delay.
I>1 and I>2 Overcurrent Protection
When applying the overcurrent or directional overcurrent protection provided in the P441,
P442 and P444 relays, standard principles should be applied in calculating the necessary
current and time settings for co-ordination. For more detailed information regarding
overcurrent relay co-ordination, reference should be made to AREVA’s ‘Protective relay
Application Guide’ - Chapter 9. In general, where overcurrent elements are set, these
should also be set to time discriminate with downstream and reverse distance protection.
The I>1 and I>2 elements are continuously active. However tripping is blocked if the
distance protection function starts. An example is shown in Figure 42.
Page 76/220 MiCOM P441/P442 & P444
Time
I>1
I>2
Z3,tZ3
Z4, tZ4
Zp,tZp
Z2,tZ2
Reverse Z1,tZ1 Forward
P3069ENa
FIGURE 42 - TIME GRADING OVERCURRENT PROTECTION WITH DISTANCE PROTECTION (DT

EXAMPLE)
I>1 and I>2 Time Delay VTS
The I>1 and I>2 overcurrent elements should be set to mimic operation of distance
protection during VTS pickup. This requires I>1 and I>2 current settings to be calculated to
approximate to distance zone reaches, although operating non-directional. If fast protection
is the main priority then a time delay of zero or equal to tZ2 could be used. If parallel
current-based main protection is used alongside the relay, and protection discrimination
remains the priority, then a DT setting greater than that for the distance zones should be
used. An example is shown in Figure 43.
I phase
I 1>
Trip
I 2>
No trip
t
tI1> tI2> P0483ENa
FIGURE 43 - TRIPPING LOGIC FOR PHASE OVERCURRENT PROTECTION

I>3 Highset Overcurrent and Switch on to Fault Protection
The I>3 overcurrent element of the P441, P442 and P444 relays can be Enabled as an
instantaneous highset just during the TOR/SOTF period. After this period has ended, the
element remains in service with a trip time delay setting I>3 Time Delay. This element
would trip for close-up high current faults, such as those where maintenance earth clamps
are inadvertently left in position on line energisation.
The I>3 current setting applied should be above load current, and > 35% of peak
magnetising inrush current for any connected transformers as this element has no second
harmonic blocking. If a high current setting is chosen, such that the I>3 element will not
overreach the protected line, then the I>3 Time Delay can be set to zero. It should also be
verified that the remote source is not sufficiently strong to cause element pickup for a close-
up reverse fault.
MiCOM P441/P442 & P444 Page 77/220
If a low current setting is chosen, I>3 will need to discriminate with local and remote distance
protection. This principle is shown in Table 9.
I>3 Current Setting Instantaneous Function After Time Delay Required

TOR/SOTF Function TOR/SOTF Period
Above load and inrush Yes - sensitive. Time delayed backup Longer than tZ3 to
current but LOW protection. grade with distance
protection.
HIGH, ≥ 120% of max. Yes - may detect Instantaneous I>3 Time Delay = 0.
fault current for a fault at high current close- highset to detect (Note #.)
the remote line terminal up faults. close-up faults.
and max. reverse fault
current
TABLE 9 - CURRENT AND TIME DELAY SETTINGS FOR THE I>3 ELEMENT
Key:
As the instantaneous highset trips three pole it is recommended that the I>3 Time
Delay is set ≥ tZ2 in single pole tripping schemes, to allow operation of the correct
single pole autoreclose cycle.
I>4 Stub Bus Protection
When the protected line is switched from a breaker and a half arrangement it is possible to
use the I>4 overcurrent element to provide stub bus protection. When stub bus protection is
selected in the relay menu, the element is only enabled when the opto-input Stub Bus
Isolator Open (Stub Bus Enable) is energised. Thus, a set of 52b auxiliary contacts (closed
when the isolator is open) are required.
I>4 Element: Stub Bus Protection

Busbar 1
VT
V=0
Protection's blocking using VTs
I>0
Open isolator
Stub Bus Protection : I >4
Busbar 2
P0536ENa
Although this element would not need to discriminate with load current, it is still common
practice to apply a high current setting. This avoids maloperation for heavy through fault
currents, where mismatched CT saturation could present a spill current to the relay. The I>4
element would normally be set instantaneous, t>4 = 0s.
Page 78/220 MiCOM P441/P442 & P444
2.15 Negative sequence overcurrent protection (NPS)

When applying traditional phase overcurrent protection, the overcurrent elements must be
set higher than maximum load current, thereby limiting the element’s sensitivity. Most
protection schemes also use an earth fault element operating from residual current, which
improves sensitivity for earth faults. However, certain faults may arise which can remain
undetected by such schemes.
Any unbalanced fault condition will produce negative sequence current of some magnitude.
Thus, a negative phase sequence overcurrent element can operate for both phase-to-phase
and phase to earth faults.
The following section describes how negative phase sequence overcurrent protection may
be applied in conjunction with standard overcurrent and earth fault protection in order to
alleviate some less common application difficulties.
• Negative phase sequence overcurrent elements give greater sensitivity to resistive

phase-to-phase faults, where phase overcurrent elements may not operate.
• In certain applications, residual current may not be detected by an earth fault relay
due to the system configuration. For example, an earth fault relay applied on the delta
side of a delta-star transformer is unable to detect earth faults on the star side.
However, negative sequence current will be present on both sides of the transformer
for any fault condition, irrespective of the transformer configuration. Therefore, an
negative phase sequence overcurrent element may be employed to provide time-
delayed back-up protection for any uncleared asymmetrical faults downstream.
• Where rotating machines are protected by fuses, loss of a fuse produces a large
amount of negative sequence current. This is a dangerous condition for the machine
due to the heating effects of negative phase sequence current and hence an upstream
negative phase sequence overcurrent element may be applied to provide back-up
protection for dedicated motor protection relays.
• It may be required to simply alarm for the presence of negative phase sequence
currents on the system. Operators may then investigate the cause of the unbalance.
The negative phase sequence overcurrent element has a current pick up setting ‘I2> Current
Set’, and is time delayed in operation by the adjustable timer ‘I2> Time Delay’. The user
may choose to directionalise operation of the element, for either forward or reverse fault
protection for which a suitable relay characteristic angle may be set. Alternatively, the
element may be set as non-directional.
The relay menu for the negative sequence overcurrent element is shown below:
NEG SEQ O/C Default Min Max Step

I2> Status Enabled Disabled, Enabled
I2> Directional Non-Directional Non-Directional, Directional Fwd, Directional Rev
I2> VTS Non-Directionel Block, Non-Directional
I2> Current Set 0.2In 0.08In 4In 0.01In
I2> Time Delay 10s 0s 100s 0.01s
I2> Char Angle –45° –95° +95° 1°
MiCOM P441/P442 & P444 Page 79/220
2.15.2 Negative phase sequence current threshold, ‘I2> Current Set’

The current pick-up threshold must be set higher than the negative phase sequence current
due to the maximum normal load unbalance on the system. This can be set practically at the
commissioning stage, making use of the relay measurement function to display the standing
negative phase sequence current, and setting at least 20% above this figure.
Where the negative phase sequence element is required to operate for specific uncleared
asymmetric faults, a precise threshold setting would have to be based upon an individual
fault analysis for that particular system due to the complexities involved. However, to ensure
operation of the protection, the current pick-up setting must be set approximately 20% below
the lowest calculated negative phase sequence fault current contribution to a specific remote
fault condition.
Note that in practice, if the required fault study information is unavailable, the setting must
adhere to the minimum threshold previously outlined, employing a suitable time delay for co-
ordination with downstream devices. This is vital to prevent unnecessary interruption of the
supply resulting from inadvertent operation of this element.
2.15.3 Time Delay for the Negative Phase Sequence Overcurrent Element, ‘I2> Time Delay’
As stated above, correct setting of the time delay for this function is vital. It should also be
noted that this element is applied primarily to provide back-up protection to other protective
devices or to provide an alarm. Hence, in practice, it would be associated with a long time
delay.
It must be ensured that the time delay is set greater than the operating time of any other
protective device (at minimum fault level) on the system which may respond to unbalanced
faults, such as:
• Phase overcurrent elements
• Earth fault elements
• Broken conductor elements
• Negative phase sequence influenced thermal elements

2.15.4 Directionalising the Negative Phase Sequence Overcurrent Element
Where negative phase sequence current may flow in either direction through a relay location,
such as parallel lines or ring main systems, directional control of the element should be
employed.
Directionality is achieved by comparison of the angle between the negative phase sequence
voltage and the negative phase sequence current and the element may be selected to
operate in either the forward or reverse direction. A suitable relay characteristic angle setting
(I2> Char Angle) is chosen to provide optimum performance. This setting should be set
equal to the phase angle of the negative sequence current with respect to the inverted
negative sequence voltage (- V2), in order to be at the centre of the directional characteristic.
The angle that occurs between V2 and I2 under fault conditions is directly dependent upon
the negative sequence source impedance of the system. However, typical settings for the
element are as follows:
• For a transmission system the RCA should be set equal to -60°
• For a distribution system the RCA should be set equal to -45°

Page 80/220 MiCOM P441/P442 & P444
2.16 Broken conductor detection

The majority of faults on a power system occur between one phase and ground or two
phases and ground. These are known as shunt faults and arise from lightning discharges
and other overvoltages which initiate flashovers. Alternatively, they may arise from other
causes such as birds on overhead lines or mechanical damage to cables etc. Such faults
result in an appreciable increase in current and hence in the majority of applications are
easily detectable.
Another type of unbalanced fault which can occur on the system is the series or open circuit
fault. These can arise from broken conductors, maloperation of single phase switchgear, or
the operation of fuses. Series faults will not cause an increase in phase current on the
system and hence are not readily detectable by standard overcurrent relays. However, they
will produce an unbalance and a resultant level of negative phase sequence current, which
can be detected.
It is possible to apply a negative phase sequence overcurrent relay to detect the above
condition. However, on a lightly loaded line, the negative sequence current resulting from a
series fault condition may be very close to, or less than, the full load steady state unbalance
arising from CT errors, load unbalance etc. A negative sequence element therefore would
not operate at low load levels.
The relay incorporates an element which measures the ratio of negative to positive phase
sequence current (I2/I1). This will be affected to a lesser extent than the measurement of
negative sequence current alone, since the ratio is approximately constant with variations in
load current. Hence, a more sensitive setting may be achieved.
The sequence network connection diagram for an open circuit fault is detailed in Figure 1.
From this, it can be seen that when a conductor open circuit occurs, current from the positive
sequence network will be series injected into the negative and zero sequence networks
across the break.
In the case of a single point earthed power system, there will be little zero sequence current
flow and the ratio of I2/I1 that flows in the protected circuit will approach 100%. In the case of
a multiple earthed power system (assuming equal impedances in each sequence network),
the ratio I2/I1 will be 50%.
It is possible to calculate the ratio of I2/I1 that will occur for varying system impedances, by
referring to the following equations:-
E (Z + Z )
I1F = Z Z +g Z 2Z + 0Z Z
1 2 1 0 2 0
–E Z
I2F = Z Z + Z Zg 0+ Z Z
1 2 1 0 2 0
Where:
Eg = System Voltage
Z0 = Zero sequence impedance
Z1 = Positive sequence impedance
Z2 = Negative sequence impedance
Therefore:
I2F Z0
=
I1F Z0 + Z2
MiCOM P441/P442 & P444 Page 81/220
It follows that, for an open circuit in a particular part of the system, I2/I1 can be determined
from the ratio of zero sequence to negative sequence impedance. It must be noted however,
that this ratio may vary depending upon the fault location. It is desirable therefore to apply as
sensitive a setting as possible. In practice, this minimum setting is governed by the levels of
standing negative phase sequence current present on the system. This can be determined
from a system study, or by making use of the relay measurement facilities at the
commissioning stage. If the latter method is adopted, it is important to take the
measurements during maximum system load conditions, to ensure that all single phase
loads are accounted for.
Note that a minimum value of 8% negative phase sequence current is required for
successful relay operation.
Since sensitive settings have been employed, it can be expected that the element will
operate for any unbalance condition occurring on the system (for example, during a single
pole autoreclose cycle). Hence, a long time delay is necessary to ensure co-ordination with
other protective devices. A 60 second time delay setting may be typical.
The following table shows the relay menu for the Broken Conductor protection, including the
available setting ranges and factory defaults:-

Min Max
GROUP 1
BROKEN CONDUCTOR
Broken Conductor Enabled Enabled/Disabled N/A
I2/I1 0.2 0.2 1 0.01
I2/I1 Time Delay 60 0s 100s 1s
I2/I1 Trip Disabled* Enabled Disabled N/A
* If disabled, only a Broken Conductor Alarm is possible.

2.16.2 Example Setting
The following information was recorded by the relay during commissioning;
Ifull load = 1000A
I2 = 100A
therefore the quiescent I2/I1 ratio is given by;
I2/I1 = 100/1000 = 0.05
To allow for tolerances and load variations a setting of 200% of this value may be typical:
Therefore set I2/I1 = 0.2
Set I2/I1 Time Delay = 60s to allow adequate time for short circuit fault clearance by time
delayed protections.
Page 82/220 MiCOM P441/P442 & P444
2.17 Directional and non-directional earth fault protection

Three elements of earth fault protection are available, as follows:
• IN> element - Channel aided directional earth fault protection;
• IN>1 element - Directional or non-directional protection, definite time

(DT) or IDMT time-delayed.
• IN>2 element - Directional or non-directional, DT delayed.

The IN> element may only be used as part of a channel-aided scheme, and is fully described
in the Aided DEF section of the Application Notes which follow.
The IN>1 and IN>2 backup elements always trip three pole, and have an optional timer hold
facility on reset, as per the phase fault elements. (The IN> element can be selected to trip
single and/or three pole). All Earth Fault overcurrent elements operate from a residual
current quantity which is derived internally from the summation of the three phase currents.
The following table shows the relay menu for the Earth Fault protection, including the
available setting ranges and factory defaults.

Min Max
GROUP 1
EARTH FAULT O/C
IN>1 Function DT Disabled, DT, IEC S Inverse, IEC V
IN>1 Directional Directional Fwd Non-Directional, Directional Fwd,
Directional Rev
IN>1 VTS Block Non directional Block or Non directional
IN>1 Current Set 0.2 x In 0.08 x In 4.0 x In 0.01 x In
IN>1 Time Delay 1s 0 200s 0.01s
IN>1 Time Delay VTS 0.2s 0 200s 0.01s
IN>1 TMS 1 0.025 1.2 0.025
IN>1 Time Dial 7 0.5 15 0.1
IN>1 Reset Char DT DT or Inverse
IN>1 tRESET 0 0 100s 0.01s
IN>2 Status Enabled Disabled or Enabled
IN>2 Directional Non Directional Non-Directional, Directional Fwd,
Directional Rev
IN>2 VTS Block Non directional Block or Non directional
IN>2 Current Set 0.3 x In 0.08 x In 32 x In 0.01 x In
IN>2 Time Delay 2s 0 200s 0.01s
IN>2 Time Delay VTS 2s 0 200s 0.01s
IN> DIRECTIONAL
IN> Char Angle –45° –95° 95° 1°
Polarisation Zero Sequence Zero Sequence or Negative Sequence
MiCOM P441/P442 & P444 Page 83/220
Note that the elements are set in terms of residual current, which is three times the
magnitude of zero sequence current (Ires = 3I0). The IDMT time delay characteristics
available for the IN>1 element, and the grading principles used will be as per the phase fault
overcurrent elements.
To maintain protection during periods of VTS detected failure, the relay allows an IN> Time
Delay VTS to be applied to the IN>1 and IN>2 elements. On VTS pickup, both elements are
forced to have non-directional operation, and are subject to their revised definite time delay.
V2
I2
Negative sequence
Polarisation Directional SBEF Fwd
VN Residual zero
Calculation SBEF Rev
sequence Polarisation
IN
IN IN> IN> Pick-up
IN> Pick-up
CTS Blocking IDMT/DT IN> Trip

Any Pole Dead &
IN> Timer Block
IN> Pick-up
CTS Blocking
Any Pole Dead

&
IN> Timer Block & IDMT/DT
SBEF Fwd Directionnal

Check
SBEF Rev
& >1 IN> Trip
MCB/VTS Line
IN> TD VTS
&
0
P0490ENa
FIGURE 44 - SBEF CALCULATION & LOGIC

Page 84/220 MiCOM P441/P442 & P444
CTS Block
SBEF Start
SBEF
Overcurrent
SBEF
IDMT/DT
Trip SBEF Trip
SBEF Timer Block
P0484ENa
FIGURE 45 - LOGIC WITHOUT DIRECTIONALITY
CTS Block
SBEF
Overcurrent SBEF Start
Slow VTS
Block Directional
Check
Vx > Vs
Ix > Is
IDMT/DT
SBEF Trip
SBEF Timer Block
P0533ENa
FIGURE 46 - LOGIC WITH DIRECTIONALITY

2.17.1 Directional Earth Fault Protection (DEF)
The method of directional polarising selected is common to all directional earth fault
elements, including the channel-aided element. There are two options available in the relay
menu:
• Zero sequence polarising - The relay performs a directional decision by comparing
the phase angle of the residual current with respect to the inverted residual voltage:
(–Vres = –(Va + Vb + Vc)) derived by the relay.
• Negative sequence polarising - The relay performs a directional decision by

comparing the phase angle of the derived negative sequence current with respect to
the derived negative sequence voltage.
NOTE: Even though the directional decision is based on the phase
relationship of I2 with respect to V2, the operating current quantity for
DEF elements remains the derived residual current.
2.17.2 Application of Zero Sequence Polarising
This is the conventional option, applied where there is not significant mutual coupling with a
parallel line, and where the power system is not solidly earthed close to the relay location.
As residual voltage is generated during earth fault conditions, this quantity is commonly used
to polarise DEF elements. The relay internally derives this voltage from the 3 phase voltage
input which must be supplied from either a 5-limb or three single phase VT’s. These types of
VT design allow the passage of residual flux and consequently permit the relay to derive the
required residual voltage. In addition, the primary star point of the VT must be earthed. A
three limb VT has no path for residual flux and is therefore incompatible with the use of zero
sequence polarising.
The required characteristic angle settings for DEF will differ depending on the application.
Typical characteristic angle settings are as follows:
• Resistance earthed systems generally use a 0° RCA setting. This means that for a
forward earth fault, the residual current is expected to be approximately in phase with
the inverted residual voltage (-Vres).
MiCOM P441/P442 & P444 Page 85/220
• When protecting solidly-earthed distribution systems or cable feeders, a -45° RCA

setting should be set.
• When protecting solidly-earthed transmission systems, a -60° RCA setting should be

set.
2.17.3 Application of Negative Sequence Polarising
In certain applications, the use of residual voltage polarisation of DEF may either be not
possible to achieve, or problematic. An example of the former case would be where a
suitable type of VT was unavailable, for example if only a three limb VT were fitted. An
example of the latter case would be an HV/EHV parallel line application where problems with
zero sequence mutual coupling may exist. In either of these situations, the problem may be
solved by the use of negative phase sequence (nps) quantities for polarisation. This method
determines the fault direction by comparison of nps voltage with nps current. The operate
quantity, however, is still residual current.
When negative sequence polarising is used, the relay requires that the Characteristic Angle
is set. The Application Notes section for the Negative Sequence Overcurrent Protection
better describes how the angle is calculated - typically set at - 45° (I2 lags (-V2)).
2.18 Aided DEF protection schemes
The option of using separate channels for DEF aided tripping, and distance protection
schemes, is offered in the P441, P442 and P444 relays. When a separate channel for DEF
is used, the above DEF schemes are independently selectable. When a common signalling
channel is employed, the distance and DEF must Share a common scheme. In this case a
permissive overreach or blocking distance scheme must be used. The aided tripping
schemes can perform single pole tripping. The relay has aided scheme settings as shown in
the following table:

Min Max
GROUP 1
AIDED D.E.F.
Aided DEF Status Enabled Disabled or Enabled
Polarisation Zero Sequence Zero Sequence or Negative Sequence
V> Voltage Set 1V 0.5V 20V 0.01V
IN Forward 0.1 x In 0.05 x In 4 x In 0.01 x In
Time Delay 0 0 10s 0.1s
Scheme Logic Shared Shared, Blocking or Permissive
Tripping Three Phase Three Phase or Single Phase
FIGURE 47 - MiCOM S1 SETTINGS

Page 86/220 MiCOM P441/P442 & P444
Opto label 01 DIST. CR DIST CS Relay Label 01
Opto Label 02 DEF. CR DEF CS Relay Label 02

P0534ENa
FIGURE 48 - PSL REQUIRED TO ACTIVATE DEF LOGIC WITH AN INDEPENDANT CHANNEL
Opto label 01 DIST. CR DIST CS

>1 Relay label 01
DEF. CR DEF CS
P0544ENa
FIGURE 49 - PSL REQUIRED TO ACTIVATE DEF LOGIC WITH SHARED CHANNEL
V2
Negative
I2 Polarisation Directionnal DEF Fwd
VN Residual
Calculation DEF Rev
Polarisation
IN
Negative
V2 Polarisation
V> DEF V>
Residual
VN Polarisation
INRev>
IN IN>
INRev = 0.6*INFwd
INFwd>
P0545ENa
FIGURE 50 - DEF CALCULATION

NOTE: The DEF is blocked in case of VTS or CTS
2.18.1 Polarising the Directional Decision
The relative advantages of zero sequence and negative sequence polarising are outlined on
the previous page. Note how the polarising chosen for aided DEF is independent of that
chosen for backup earth fault elements.
The relay has a V> threshold which defines the minimum residual voltage required to enable
an aided DEF directional decision to be made. A residual voltage measured below this
setting would block the directional decision, and hence there would be no tripping from the
scheme. The V> threshold is set above the standing residual voltage on the protected
system, to avoid operation for typical power system imbalance and voltage transformer
errors. In practice, the typical zero sequence voltage on a healthy system can be as high as
1% (ie: 3% residual), and the VT error could be 1% per phase. This could equate to an
overall error of up to 5% of phase-neutral voltage, although a setting between 2% and 4% is
typical. On high resistance earthed and insulated neutral systems the settings might need to
be as high as 10% or 20% of phase-neutral voltage, respectively.
When negative sequence polarising is set, the V> threshold becomes a V2> negative
sequence voltage detector.
The characteristic angle for aided DEF protection is fixed at –14°, suitable for protecting all
solidly-earthed and resistance earthed systems.
MiCOM P441/P442 & P444 Page 87/220
FWD FWD
R
-14˚
REV REV
P0491ENa
2.18.2 Aided DEF Permissive Overreach Scheme
DEF Fwd
IN Fwd>
DEF V>
DEF Timer Block
Reversal Guard & DEF CS
0
Any Pole Dead
150 ms
T
& DEF Trip
IN Rev>
0
t_delay
UNB CR DEF
P0546ENa
FIGURE 51 - INDEPENDANT CHANNEL – PERMISSIVE SCHEME
DEF Fwd
IN Fwd>
DEF V>
DEF Timer Block
Reversal Guard & DEF CS
Any Pole Dead 0

>1
Any DIST Start 150 ms
& DEF Trip
T
IN Rev>
0
t_delay
UNB CR DEF
P0547ENa
FIGURE 52 - SHARED CHANNEL – PERMISSIVE SCHEME

This scheme is similar to that used in the AREVA LFZP, LFZR, EPAC and PXLN relays.
Figure 53 shows the element reaches, and Figure 54 the simplified scheme logic. The
signalling channel is keyed from operation of the forward IN> DEF element of the relay. If
the remote relay has also detected a forward fault, then it will operate with no additional
delay upon receipt of this signal.
Send logic: IN> Forward pickup
Permissive trip logic: IN> Forward plus Channel Received.
Page 88/220 MiCOM P441/P442 & P444
IN> Fwd (A)

ZL
A B
IN> Fwd (B)
P3070ENa
FIGURE 53 - THE DEF PERMISSIVE SCHEME
FIGURE 54 - LOGIC DIAGRAM FOR THE DEF PERMISSIVE SCHEME

The scheme has the same features/requirements as the corresponding distance scheme
and provides sensitive protection for high resistance earth faults.
Where “t” is shown in the diagram this signifies the time delay associated with an element,
noting that the Time Delay for a permissive scheme aided trip would normally be set to zero.
2.18.3 Aided DEF Blocking Scheme
This scheme is similar to that used in the AREVA LFZP, LFZR, EPAC and PXLN relays.
Figure 57 shows the element reaches, and Figure 58 the simplified scheme logic. The
signalling channel is keyed from operation of the reverse DEF element of the relay. If the
remote relay forward IN> element has picked up, then it will operate after the set Time Delay
if no block is received.
DEF Fwd
IN Fwd>
Tp
DEF V> 0
Reversal Guard
IN Rev>
T
& & DEF Trip
0
0 t_delay
Any Pole Dead
150 ms
DEF Timer Block
UNB CR DEF
DEF Rev
& DEF CS
IN Rev>
DEF V>
P0548ENa
FIGURE 55 - INDEPENDANT CHANNEL – BLOCKING SCHEME

MiCOM P441/P442 & P444 Page 89/220
DEF Fwd
IN Fwd>
DEF V>
Reversal Guard 0
IN Rev>
T
& Tp
0
Any Pole Dead t_delay

0
Any DIST Start

>1 150 ms
DEF Timer Block

& DEF Trip
UNB CR DEF
DEF Rev
IN Rev>
& DEF CS
DEF V>
P0549ENa
FIGURE 56 - SHARED CHANNEL – BLOCKING SCHEME

Send logic: DEF Reverse
Trip logic: IN> Forward, plus Channel NOT Received, with small set delay.
IN> Fwd (A)

IN> Rev (A)
ZL
A B
IN> Fwd (B)

IN> Rev (B)
P0550ENa
FIGURE 57 - THE DEF BLOCKING SCHEME

Send IN> Send IN>
Reverse Reverse
IN>1 t t IN>1
0 0
Trip Trip
IN>2 t
0 >1 >1 0
t IN>2
IN > & t t IN>

Forward 0 0 &
Forward
P0551ENa
FIGURE 58 - LOGIC DIAGRAM FOR THE DEF BLOCKING SCHEME

The scheme has the same features/requirements as the corresponding distance scheme
and provides sensitive protection for high resistance earth faults.
Where “t” is shown in the diagram this signifies the time delay associated with an element.
To allow time for a blocking signal to arrive, a short time delay on aided tripping must be
used. The recommended Time Delay setting = max. signalling channel operating time +
14ms.
Page 90/220 MiCOM P441/P442 & P444
2.19 Undervoltage protection

Undervoltage conditions may occur on a power system for a variety of reasons, some of
which are outlined below:-
• Increased system loading. Generally, some corrective action would be taken by

voltage regulating equipment such as AVR’s or On Load Tap Changers, in order to
bring the system voltage back to it’s nominal value. If the regulating equipment is
unsuccessful in restoring healthy system voltage, then tripping by means of an
undervoltage relay will be required following a suitable time delay.
• Faults occurring on the power system result in a reduction in voltage of the phases
involved in the fault. The proportion by which the voltage decreases is directly
dependent upon the type of fault, method of system earthing and its location with
respect to the relaying point. Consequently, co-ordination with other voltage and
current-based protection devices is essential in order to achieve correct discrimination.
This function will be blocked with VTS logic or could be disabled if CB open.
Both the under and overvoltage protection functions can be found in the relay menu “Volt
Protection”. The following table shows the undervoltage section of this menu along with the
available setting ranges and factory defaults.

Min Max
GROUP 1
VOLT Protection
V< & V> MODE 0 V<1 Trip, V<2 Trip, V>1 Trip, V>2 Trip
UNDER VOLTAGE
V< Measur't Mode Phase-Neutral Phase-phase or Phase-neutral
V<1 Function DT Disabled, DT pr IDMT
V<1 Voltage Set 50V 10V 120V 1V
V<1 Time Delay 10s 0s 100s 0.01s
V<1 TMS 1 0.5 100 0.5
V<2 Status Disabled Disabled or Enabled
V<2 Voltage Set 38V 10V 120V 1V
V<2 Time Delay 5s 0s 100s 0.01s
As can be seen from the menu, the undervoltage protection included within the P441, P442
and P444 relays consists of two independent stages. These are configurable as either
phase to phase or phase to neutral measuring within the V< Measur’t Mode cell.
Stage 1 may be selected as either IDMT, DT or disabled, within the V<1 Function cell.
Stage 2 is DT only and is enabled/disabled in the V<2 Status cell.
Two stages are included to provide both alarm and trip stages, where required.
Alternatively, different time settings may be required depending upon the severity of the
voltage dip.
The IDMT characteristic available on the first stage is defined by the following formula:
K
t=
1–M
Where:
K = Time Multiplier Setting (TMS)
T = Operating Time in Seconds
M = Measured Voltage / relay Setting Voltage (V<)
MiCOM P441/P442 & P444 Page 91/220

In the majority of applications, undervoltage protection is not required to operate during
system earth fault conditions. If this is the case, the element should be selected in the menu
to operate from a phase to phase voltage measurement, as this quantity is less affected by
single phase voltage depressions due to earth faults.
The voltage threshold setting for the undervoltage protection should be set at some value
below the voltage excursions which may be expected under normal system operating
conditions. This threshold is dependent upon the system in question but typical healthy
system voltage excursions may be in the order of -10% of nominal value.
Similar comments apply with regard to a time setting for this element, i.e. the required time
delay is dependent upon the time for which the system is able to withstand a depressed
voltage.
2.20 Overvoltage protection
Undervoltage conditions may occur on a power system for a variety of reasons, some of
which are outlined below:-
• Under conditions of load rejection, the supply voltage will increase in magnitude. This
situation would normally be rectified by voltage regulating equipment such as AVRs or
on-load tap changers. However, failure of this equipment to bring the system voltage
back within prescribed limits leaves the system with an overvoltage condition which
must be cleared in order to preserve the life of the system insulation. Hence,
overvoltage protection which is suitably time delayed to allow for normal regulator
action, may be applied.
• During earth fault conditions on a power system there may be an increase in the
healthy phase voltages. Ideally, the system should be designed to withstand such
overvoltages for a defined period of time.
As previously stated, both the over and undervoltage protection functions can be found in the
relay menu “Volt Protection”. The following table shows the overvoltage section of this menu
along with the available setting ranges and factory defaults.

Min Max
Group 1
Volt protection
V> Measur't Mode Phase-Neutral Phase-phase or Phase-neutral
V>1 Function DT Disabled, DT pr IDMT
V>1 Voltage Set 75V 60V 185V 1V
V>1 Time Delay 10s 0s 100s 0.01s
V>1 TMS 1 0.5 100 0.5
V>2 Status Enabled Disabled or Enabled
V>2 Voltage Set 90V 60V 185V 1V
V>2 Time Delay 0.5s 0s 100s 0.01s
As can be seen, the setting cells for the overvoltage protection are identical to those
previously described for the undervoltage protection. The IDMT characteristic available on
the first stage is defined by the following formula:
t = K / (M - 1)
Where:
K = Time Multiplier Setting
T = Operating Time in Seconds
M = Measured Voltage / relay Setting Voltage (V>)
Page 92/220 MiCOM P441/P442 & P444

The inclusion of the two stages and their respective operating characteristics allows for a
number of possible applications;
• Use of the IDMT characteristic gives the option of a longer time delay if the
overvoltage condition is only slight but results in a fast trip for a severe overvoltage. As
the voltage settings for both of the stages are independent, the second stage could
then be set lower than the first to provide a time delayed alarm stage if required.
• Alternatively, if preferred, both stages could be set to definite time and configured to
provide the required alarm and trip stages.
• If only one stage of overvoltage protection is required, or if the element is required to

provide an alarm only, the remaining stage may be disabled within the relay menu.
This type of protection must be co-ordinated with any other overvoltage relays at other
locations on the system. This should be carried out in a similar manner to that used for
grading current operated devices.
2.21 Circuit breaker fail protection (CBF)
Following inception of a fault one or more main protection devices will operate and issue a
trip output to the circuit breaker(s) associated with the faulted circuit. Operation of the circuit
breaker is essential to isolate the fault, and prevent damage / further damage to the power
system. For transmission/sub-transmission systems, slow fault clearance can also threaten
system stability. It is therefore common practice to install circuit breaker failure protection,
which monitors that the circuit breaker has opened within a reasonable time. If the fault
current has not been interrupted following a set time delay from circuit breaker trip initiation,
breaker failure protection (CBF) will operate.
CBF operation can be used to backtrip upstream circuit breakers to ensure that the fault is
isolated correctly. CBF operation can also reset all start output contacts, ensuring that any
blocks asserted on upstream protection are removed.
2.21.1 Breaker Failure Protection Configurations
The phase selection must be performed by creating dedicated PSL.
The circuit breaker failure protection incorporates two timers, ‘CB Fail 1 Timer’ and ‘CB Fail 2
Timer’, allowing configuration for the following scenarios:
MiCOM P441/P442 & P444 Page 93/220
Enable tBF1
CBF1_Status
& 0
tBF1 Trip 3Ph
Pulsed output latched in UI
>1
tBF1
Breaker
Any Internal Trip A
0
& 0
>1 Fail
1
Alarm
2
3 4 tBF2 - tBF1
S
Ia<
0
Q
tBF1 & 0
tBF2 Trip 3Ph
&
1
R
2 0
4
>1
3
0
1
2 S CBF2_Status Enable
Q
>1
3 4
Any Internal Trip A
& 0 R
Non Current Prot Trip 1
2
3 4
CBA_A
Setting:
Non I Trip
Reset:
0) I< Only
1) /Trip & I<
2) CB & I<
3) Disable
4) /Trip or I<
External Trip A 1
2
S
3 4 Q
R
Ia< 1
0
>1
&
2
3 4
Setting:
Ext. Trip
>1 Reset:
0) I< Only
1) /Trip & I<
2) CB & I<
CBA_A
& 3) Disable
4) /Trip or I<
Any Internal Trip B
Ib<
PHASE B
Non Current Prot Trip Same logic as A
CBA_B
phase
WI Trip A
External Trip B
WI Trip B
WI Trip C
V<1 Trip >1 Non Current Prot Trip
V<2 Trip
Any Internal Trip C
V>1 Trip
Ic< PHASE C
V>2 Trip
Non Current Prot Trip Same logic as A
phase
CBA_C
External Trip C P0552ENa
FIGURE 59 - CB FAIL GENERAL LOGIC
• Simple CBF, where only ‘CB Fail 1 Timer’ is enabled. For any protection trip, the ‘CB
Fail 1 Timer’ is started, and normally reset when the circuit breaker opens to isolate
the fault. If breaker opening is not detected, ‘CB Fail 1 Timer’ times out and closes an
output contact assigned to breaker fail (using the programmable scheme logic). This
contact is used to backtrip upstream switchgear, generally tripping all infeeds
connected to the same busbar section.
• A re-tripping scheme, plus delayed backtripping. Here, ‘CB Fail 1 Timer’ is used to
route a trip to a second trip circuit of the same circuit breaker. This requires
duplicated circuit breaker trip coils, and is known as re-tripping. Should re-tripping fail
to open the circuit breaker, a backtrip may be issued following an additional time
delay. The backtrip uses ‘CB Fail 2 Timer’, which is also started at the instant of the
initial protection element trip.
Page 94/220 MiCOM P441/P442 & P444
CBF elements ‘CB Fail 1 Timer’ and ‘CB Fail 2 Timer’ can be configured to operate for trips
triggered by protection elements within the relay or via an external protection trip. The latter
is achieved by allocating one of the relay opto-isolated inputs to ‘External Trip’ using the
programmable scheme logic.
2.21.2 Reset Mechanisms for Breaker Fail Timers
It is common practice to use low set undercurrent elements in protection relays to indicate
that circuit breaker poles have interrupted the fault or load current, as required. This covers
the following situations:
• Where circuit breaker auxiliary contacts are defective, or cannot be relied upon to
definitely indicate that the breaker has tripped.
• Where a circuit breaker has started to open but has become jammed. This may result
in continued arcing at the primary contacts, with an additional arcing resistance in the
fault current path. Should this resistance severely limit fault current, the initiating
protection element may reset. Thus, reset of the element may not give a reliable
indication that the circuit breaker has opened fully.
For any protection function requiring current to operate, the relay uses operation of
undercurrent elements (I<) to detect that the necessary circuit breaker poles have tripped
and reset the CB fail timers. However, the undercurrent elements may not be reliable
methods of resetting circuit breaker fail in all applications. For example:
• Where non-current operated protection, such as under/overvoltage or

under/overfrequency, derives measurements from a line connected voltage
transformer. Here, I< only gives a reliable reset method if the protected circuit would
always have load current flowing. Detecting drop-off of the initiating protection
element might be a more reliable method. (in that case setting will be : "Prot. Reset or
I<")
• Where non-current operated protection, such as under/overvoltage or

under/overfrequency, derives measurements from a busbar connected voltage
transformer. Again using I< would rely upon the feeder normally being loaded. Also,
tripping the circuit breaker may not remove the initiating condition from the busbar,
and hence drop-off of the protection element may not occur. In such cases, the
position of the circuit breaker auxiliary contacts may give the best reset method.
MiCOM P441/P442 & P444 Page 95/220
Pole Live Pole Dead
+ + +
I< T
T
- - -
Pole Live Pole Dead

+ + +
I< T
- - -
P0553ENa
FIGURE 60 - ALGORITHM FOR POLE DEAD DETECTION

Description of open pole detection algorithm :
Each half period after zero crossing of current, the algorithm detects if the current is bigger
than the I< threshold. If yes, then the detection timer is restarted, if it is lower than the
adjusted value nothing is done.
At the end of the detection timer, open pole decision is given by the algorithm.
Timer value given by: (Number of Samples/2 + 2) * ((1/Freq)/Number of Samples)
With:
T = 13,3 ms (50 Hz) T = 11,1 ms (60 Hz)
The current used is the unfiltered current (only the analog lowPass )
Example:
In the first example, the current line is interrupted by the CB opening.
The detection is confirmed 3 ms after the pole is opened.
In the second example, some residual current remains due to the CT; The detection is
confirmed 12 / 15 msec after the pole is opened.
Page 96/220 MiCOM P441/P442 & P444
2.21.2.1 Inputs

CBF1_Status Configuration Breaker Failure 1 activated
CBF2_Status Configuration Breaker Failure 2 activated
CBF1_Timer Configuration Timer Breaker Failure 1
CBF2_Timer Configuration Timer Breaker Failure 2
CBF1_Reset Configuration Type of reset (current, CB status, interlocks).
CBF2_Reset Configuration Type of reset (current, CB Status, interlocks).
CBF_I< Configuration Dead Pole threshold detection
Any Trip A Internal Logic Trip phase A by internal or external protection
function
Any Trip B Internal Logic Trip phase B by internal or external protection
function
Any Trip C Internal Logic Trip phase C by internal or external protection
function
CB 52a_A Internal Logic CB Pole A opened
CB 52a_B Internal Logic CB Pole B opened
CB 52a_C Internal Logic CB Pole C opened
Ia<, Ib<, Ic< Internal Logic Under-current detection for dead pole
2.21.2.2 Outputs

CBF1_Trip_3p Internal Logic Trip 3P CB fail by TBF1
CBF2_Trip_3p Internal Logic Trip 3P CB fail by TBF2
CB Fail Alarm Internal Logic CB Fail alarm
Resetting of the CBF is possible from a breaker open indication (from the relay’s pole dead
logic) or from a protection reset. In these cases resetting is only allowed provided the
undercurrent elements have also reset. The resetting options are summarised in the
following table.
MiCOM P441/P442 & P444 Page 97/220
Initiation CB fail timer reset mechanism

(Menu selectable)
Current based protection - The resetting mechanism is fixed.
(eg. 50/51/46/21/87..) [IA< operates] &
[IB< operates] &
[IC< operates] &
[IN< operates]
Non-current based protection Three options are available. The user can select from
(eg. 27/59/81/32L..) the following options.
[All I< and IN< elements operate]
[Protection element reset] AND [All I< and IN<
elements operate]
CB open (all 3 poles) AND [All I< and IN< elements
operate]
External protection - Three options are available. The user can select any or
all of the options.
[All I< and IN< elements operate]
[External trip reset] AND [All I< and IN< elements
operate]
CB open (all 3 poles) AND [All I< and IN< elements
operate]
The selection in the relay menu is grouped as follows:

Min Max
CB FAIL & I<
BREAKER FAIL
CB Fail 1 Status Enabled Enabled, Disabled
CB Fail 1 Timer 0.2s 0s 10s 0.01s
CB Fail 2 Status Disabled Enabled, Disabled
CB Fail 2 Timer 0.4s 0s 10s 0.01s
CBF Non I Reset CB Open & I< I< Only, CB Open & I<, Prot Reset & I<,
Prot Reset or I<, Disable
CBF Ext Reset CB Open & I< I< Only, CB Open & I<, Prot Reset & I<,
Prot Reset or I<, Disable
UNDER CURRENT
I< Current Set 0.05In 0.05In 3.2In 0.01In
The ‘CBF Blocks I>‘ and ‘CBF Blocks IN>‘ settings are used to remove starts issued from the
overcurrent and earth elements respectively following a breaker fail time out. The start is
removed when the cell is set to Enabled.
Page 98/220 MiCOM P441/P442 & P444
2.21.3 Typical settings

2.21.3.1 Breaker Fail Timer Settings
Typical timer settings to use are as follows:
CB Fail Reset Mechanism tBF time delay Typical delay for 2½ cycle
circuit breaker
Initiating element reset CB interrupting time + element 50 + 50 + 10 + 50
reset time (max.) + error in tBF = 160 ms
timer + safety margin
CB open CB auxiliary contacts 50 + 10 + 50
opening/closing time (max.) + = 110 ms
error in tBF timer + safety
margin
Undercurrent elements CB interrupting time + 50 + 25 + 50
undercurrent element operating = 125 ms
time (max.) + safety margin
Note that all CB Fail resetting involves the operation of the undercurrent elements. Where
element reset or CB open resetting is used the undercurrent time setting should still be used
if this proves to be the worst case.
The examples above consider direct tripping of a 2½ cycle circuit breaker. Note that where
auxiliary tripping relays are used, an additional 10-15 ms must be added to allow for trip
relay operation.
2.21.3.2 Breaker Fail Undercurrent Settings
The phase undercurrent settings (I<) must be set less than load current, to ensure that I<
operation indicates that the circuit breaker pole is open. A typical setting for overhead line or
cable circuits is 20% In, with 5% In common for generator circuit breaker CBF.
MiCOM P441/P442 & P444 Page 99/220
3. OTHER PROTECTION CONSIDERATIONS-SETTINGS EXAMPLE

3.1 Distance Protection Setting Example
3.1.1 Objective
To protect the 100Km double circuit line between Green Valley and Blue River substations
using relay protection in the POP Z2 Permissive Overreach mode and to set the relay at
Green Valley substation, shown in Figure 61.
Tiger Bay Green valley

Blue River Rocky bay
80 Km
100 Km 60 Km
System Data
Green Valley - Blue River transmission line 21 21
System voltage 230kv
System grounding solid
CT ratio 1200/5
VT ratio 230000/115
Line length 100km
Line impedance
Z1 = 0.089 + J0.476 OHM/km
Z0 = 0.426 + J1.576 OHM/km
Faults levels
Green Valley substation busbars maximum 5000MVA, minimum 2000MVA
Blue River substation busbars maximum 3000MVA, minimum 1000MVA P3074ENa
FIGURE 61 - SYSTEM ASSUMED FOR WORKED EXAMPLE

3.1.2 System Data
Line length: 100Km
Line impedances: Z = 0.089 + j0.476 = 0.484 / 79.4° Ω/km

1
Z = 0.426 + j1.576 = 1.632 / 74.8° Ω/km

0
Z /Z1 = 3.372 / -4.6°

0
CT ratio: 1 200 / 5
VT ratio: 230 000 / 115
3.1.3 Relay Settings
It is assumed that Zone 1 Extension is not used and that only three forward zones are
required. Settings on the relay can be performed in primary or secondary quantities and
impedances can be expressed as either polar or rectangular quantities (menu selectable).
For the purposes of this example, secondary quantities are used.
3.1.4 Line Impedance
1200 / 5
Ratio of secondary to primary impedance = = 0.12
230000 / 115
Line impedance secondary = ratio CT/VT x line impedance primary.
Line Impedance = 100 x 0.484 / 79.4° (primary) x 0.12
= 5.81 / 79.4° Ω secondary.
Relay Line Angle settings -90° to 90° in 1° steps. Therefore, select Line Angle = 80° for
convenience.
Therefore set Line Impedance and Line Angle: = 5.81 / 80° Ω secondary.
Page 100/220 MiCOM P441/P442 & P444
3.1.5 Zone 1 Phase Reach Settings

Required Zone 1 reach is to be 80% of the line impedance between Green Valley and Blue
River substations.
Required Zone 1 reach = 0.8 x 100 x 0.484 / 79.4° x 0.12
Z1 = 4.64 / 79.4° Ω secondary.

Z2 = 100 x 0.484 / 79.4° + 50% x 60 x 0.484 / 79.4°
The Line Angle = 80°.
Therefore actual Zone 1 reach, Z1 = 4.64 / 80° Ω secondary.

Required Zone 2 impedance =
(Green Valley-Blue River) line impedance + 50% (Blue River-Rocky Bay) line impedance
Z2 = (100+30) x 0.484 / 79.4° x 0.12
= 7.56 / 79.4° Ω secondary.
The Line Angle = 80°.
Actual Zone 2 reach setting = 7.56 / 80° Ω secondary

Required Zone 3 forward reach =
(Green Valley-Blue River + Blue River-Rocky Bay) x 1.2
= (100+60) x 1.2 x 0.484 / 79.4° x 0.12
Z3 = 11.15 / 79.4° ohms secondary
Actual Zone 3 forward reach setting = 11.16 / 80° ohms secondary

3.1.8 Zone 4 Reverse Settings with no Weak Infeed Logic Selected
Required Zone 4 reverse reach impedance = Typically 10% Zone 1 reach
= 0.1 x 4.64 / 79.4°
Z4 = 0.464 / 79.4°
Actual Zone 4 reverse reach setting = 0.46 / 80° ohms secondary

3.1.9 Zone 4 Reverse Settings with Weak Infeed Logic Selected
Where zone 4 is used to provide reverse directional decisions for Blocking or Permissive
Overreach schemes, zone 4 must reach further behind the relay than zone 2 for the remote
relay. This can be achieved by setting: Z4 ≥ ((Remote zone 2 reach) x 120%) minus the
protected line impedance:
Remote Zone 2 reach =
(Blue River-Green Valley) line impedance + 50% (Green Valley-Tiger Bay) line impedance
= (100+40) x 0.484 / 79.4° x 0.12
= 8.13 / 79.4° Ω secondary.
Z4 ≥ ((8.13 / 79.4°) x 120%) - (5.81 / 79.4°)
= 3.95 / 79.4°
Minimum zone 4 reverse reach setting = 3.96 / 80° ohms secondary

MiCOM P441/P442 & P444 Page 101/220
3.1.10 Residual Compensation for Earth Fault Elements

The residual compensation factor can be applied independently to certain zones if required.
This feature is useful where line impedance characteristics change between sections or
where hybrid circuits are used. In this example, the line impedance characteristics do not
change and as such a common KZ0 factor can be applied to each zone. This is set as a
ratio “kZ0 Res. Comp”, and an angle “kZ0 Angle”:
kZ0 Res. Comp, kZ0 = (Z0 - Z1) / 3.Z1 Ie: As a ratio.
kZ0 Angle, ∠kZ0 = ∠ (Z0 - Z1) / 3.Z1 Set in degrees.

Z -Z = (0.426 + j1.576) - (0.089 + j0.476)
L0 L1
= 0.337 + j1.1
= 1.15 / 72.9°
1.15 / 72.9°
kZ0 = = 0.79 / –6.5°
3 × 0.484 / 79.4°
Therefore, select:
kZ0 Res. Comp = 0.79 (Set for kZ1, kZ2, kZp, kZ4).
kZ0 Angle = –6.5° (Set for kZ1, kZ2, kZp, kZ4).
3.1.11 Resistive Reach Calculations
All distance elements must avoid the heaviest system loading. Taking the 5A CT secondary
rating as a guide to the maximum load current, the minimum load impedance presented to
the relay would be:
Vn (phase-neutral) / In = (115 / √3) / 5 = 13.3 Ω (secondary)

Typically, phase fault distance zones would avoid the minimum load impedance by a margin
of ≥40% if possible (bearing in mind that the power swing characteristic surrounds the
tripping zones), earth fault zones would use a ≥20% margin. This allows maximum resistive
reaches of 7.9Ω, and 10.6Ω, respectively.
From Table 1 (see §2.4.4), taking a required primary resistive coverage of 14.5Ω for phase
faults, and assuming a typical earth fault coverage of 40Ω, the minimum secondary reaches
become:
RPh (min) = 14.5 x 0.12 = 1.74Ω (secondary);
RG (min) = 40 x 0.12 = 4.8Ω (secondary).

Resistive reaches could be chosen between the calculated values as shown in Table 10.
The zone 2 elements satisfy R2Ph ≤ (R3Ph x 80%), and R2G ≤ (R3G x 80%).
Minimum Maximum Zone 1 Zone 2 Zones 3 & 4

Phase (RPh) Ω 1.74 7.9 R1Ph = 3 R1Ph = 4 R3Ph-4Ph = 8
Earth (RG) Ω 4.8 10.6 R1G = 5 R1G = 6 R3G-4G = 10
TABLE 10 - SELECTION OF RESISTIVE REACHES
R3Ph-R4Ph should be set ≤ 80% Z minimum load – ∆R.

Page 102/220 MiCOM P441/P442 & P444
3.1.12 Power Swing Band
Typically, the ∆R and ∆X band settings are both set between 10 - 30% of R3Ph. This gives
a secondary impedance between 0.6 and 1.8Ω. For convenience, 1.0Ω could be set.
The width of the power swing band is calculated as follows:
∆R = 1.3 × tan(π × ∆f × ∆t) × RLOAD

Assuming that the load corresponds to 60° angles between sources and if the resistive reach
is set so that Rlim = RLOAD/2, the following is obtained:
∆R = 0.032 × ∆f × RLOAD
To ensure that a power swing frequency of 5 Hz is detected, the following is obtained:
∆R = 0.16 × RLOAD
Where:
∆R width of the power swing detection band
∆f power swing frequency (fA – fB)

Rlim resistive reach of the starting characteristic (=R3ph-R4ph)
Z network impedance corresponding to the sum of the reverse (Z4) and
forward (Z3) impedances
RLOAD load resistance
3.1.13 Current Reversal Guard
The current reversal guard timer available with POP schemes needs a non-zero setting
when the reach of the zone 2 elements is greater than 1.5 times the impedance of the
protected line. In this example, their reach is only 1.3 times the protected line impedance.
Therefore, current reversal guard logic does not need to be used and the recommended
settings for scheme timers are:
tREVERSAL GUARD = 0
Tp = 98ms (typical).
3.1.14 Instantaneous Overcurrent Protection
To provide parallel high-speed fault clearance to the distance protection, it is possible to use
the I>3 element as an instantaneous highset. It must be ensured that the element will only
respond to faults on the protected line. The worst case scenario for this is when only one of
the parallel lines is in service.
Two cases must be considered. The first case is a fault at Blue River substation with the
relay seeing fault current contribution via Green Valley. The second case is a fault at Green
Valley with the relay seeing fault current contribution via Blue River.
Case 1:
Source Impedance = 2302 / 5000 = 10.58Ω
Line Impedance = 48.4Ω
Fault current seen by relay = (230000 / √3) / (10.58 + 48.4)

= 2251A
MiCOM P441/P442 & P444 Page 103/220
Case 2:
Source Impedance = 2302 / 3000 = 17.63Ω
Line Impedance = 48.4Ω
Fault current seen by relay = (230000 / √3) / (17.63 + 48.4)

= 2011A
The overcurrent setting must be in excess of 2251A. To provide an adequate safety margin
a setting ≥120% the minimum calculated should be chosen, say 2800A.
3.2 Teed feeder protection
The application of distance relays to three terminal lines is fairly common. However, several
problems arise when applying distance protection to three terminal lines.
3.2.1 The Apparent Impedance Seen by the Distance Elements
Figure 62 shows a typical three terminal line arrangement. For a fault at the busbars of
terminal B the impedance seen by a relay at terminal A will be equal to :
Za = Zat + Zbt + [ Zbt.(Ic/Ia) ]
Relay A will underreach for faults beyond the tee-point with infeed from terminal C. When
terminal C is a relatively strong source, the underreaching effect can be substantial. For a
zone 2 element set to 120% of the protected line, this effect may result in non-operation of
the element for internal faults. This not only effects time delayed zone 2 tripping but also
channel-aided schemes. Where infeed is present, it will be necessary for Zone 2 elements
at all line terminals to overreach both remote terminals with allowance for the effect of tee-
point infeed. Zone 1 elements must be set to underreach the true impedance to the nearest
terminal without infeed. Both these requirements can be met through use of the alternative
setting groups in the P441, P442 and P444 relays.
A Ia Ib B
Zat Zbt
Ic
Zct
C
Va = Ia Zat + Ib Zbt Impedance seen by relay A = Va
Ia
Ib = Ia + Ic Za = Zat + Zbt + Ic Zbt
Ia
Va = Ia Zat + Ia Zbt + Ic Zbt
P3075ENa
FIGURE 62 - TEED FEEDER APPLICATION - APPARENT IMPEDANCES SEEN BY RELAY

3.2.2 Permissive Overreach Schemes
To ensure operation for internal faults in a POP scheme, the relays at the three terminals
should be able to see a fault at any point within the protected feeder. This may demand very
large zone 2 reach settings to deal with the apparent impedances seen by the relays.
A POP scheme requires the use of two signalling channels. A permissive trip can only be
issued upon operation of zone 2 and receipt of a signal from both remote line ends. The
requirement for an 'AND' function of received signals must be realised through use of contact
logic external to the relay, or the internal Programmable Scheme Logic. Although a POP
scheme can be applied to a three terminal line, the signalling requirements make its use
unattractive.
Page 104/220 MiCOM P441/P442 & P444
3.2.3 Permissive Underreach Schemes

For a PUP scheme, the signalling channel is only keyed for internal faults. Permissive
tripping is allowed for operation of zone 2 plus receipt of a signal from either remote line end.
This makes the signalling channel requirements for a PUP scheme less demanding than for
a POP scheme. A common power line carrier (PLC) signalling channel or a triangulated
signalling arrangement can be used. This makes the use of a PUP scheme for a teed feeder
a more attractive alternative than use of a POP scheme.
The channel is keyed from operation of zone 1 tripping elements. Provided at least one
zone 1 element can see an internal fault then aided tripping will occur at the other terminals if
the overreaching zone 2 setting requirement has been met. There are however two cases
where this is not possible:
Figure 63 (i) shows the case where a short tee is connected close to another terminal. In
this case, zone 1 elements set to 80% of the shortest relative feeder length do not overlap.
This leaves a section not covered by any zone 1 element. Any fault in this section would
result in zone 2 time delayed tripping.
Figure 63 (ii) shows an example where terminal 'C' has no infeed. Faults close to this
terminal will not operate the relay at 'C' and hence the fault will be cleared by the zone 2
time-delayed elements of the relays at 'A' and 'B'.
Figure 63 (iii) illustrates a further difficulty for a PUP scheme. In this example current is
outfeed from terminal 'C' for an internal fault. The relay at 'C' will therefore see the fault as
reverse and not operate until the breaker at 'B' has opened; i.e. sequential tripping will occur.
(i) A B
Z1A Z1C
= area where no zone 1 overlap exists
C
(ii) A B
Z1A Z1B
Fault Fault seen by A & B in zone 2
C
No infeed
(iii) A B
Relay at C sees reverse fault until B opens

P3076ENa
FIGURE 63 - TEED FEEDER APPLICATIONS

MiCOM P441/P442 & P444 Page 105/220
3.2.4 Blocking Schemes

Blocking schemes are particularly suited to the protection of teed feeders, since high speed
operation can be achieved where there is no current infeed from one or more terminals. The
scheme also has the advantage that only a common simplex channel or a triangulated
simplex channel is required.
The major disadvantage of blocking schemes is highlighted in Figure 63 (iii) where fault
current is outfeed from a terminal for an internal fault condition. relay 'C' sees a reverse fault
condition. This results in a blocking signal being sent to the two remote line ends, preventing
tripping until the normal zone 2 time delay has expired.
3.3 Alternative setting groups
The P441, P442 and P444 relays can store up to four independent groups of settings. The
active group is selected either locally via the menu or remotely via the serial
communications. The ability to quickly reconfigure the relay to a new setting group may be
desirable if changes to the system configuration demand new protection settings. Typical
examples where this feature can be used include:
Single bus installations with a transfer bus;
Double bus installations, with or without a separate transfer bus, where the transfer circuit
breaker or bus coupler might be used to take up the duties of any feeder circuit breaker
when both the feeder circuit breaker and the current transformers are by-passed.
In the case of a double bus installation, it is usual for bus 1 to be referred to as the main bus
and bus 2 as the reserve bus, and for any bypass circuit isolator to be connected to bus 2 as
shown in Figure 64. This arrangement avoids the need for a current polarity reversing switch
that would be required if both buses were to be used for by-pass purposes. The standby
relay, associated with the transfer circuit breaker or the bus coupler, can be programmed
with the individual setting required for each of the outgoing feeders. For bypass operation
the appropriate setting group can be selected as required. This facility is extremely useful in
the case of unattended substations where all of the switching can be controlled remotely.
Main bus (1)
Reserve bus (2)
21
P440
21 21
Feeder 1 Feeder 2
P3077ENa
FIGURE 64 - TYPICAL DOUBLE BUS INSTALLATION WITH BYPASS FACILITIES

A further use for this feature is the ability to provide alternative settings for teed feeders or
double circuit lines with mutual coupling. Similar alternative settings could be required to
cover different operating criteria in the event of the channel failing, or an alternative system
configuration (ie. lines being switched in or out).
Page 106/220 MiCOM P441/P442 & P444
3.3.1 Selection of Setting Groups

Setting groups can be changed by one of two methods selectable by MiCOM S1:
• Automatic group selection by changes in state of two opto-isolated inputs, assigned as

Setting Group Change bit 0 (opto 1), and Setting Group Change bit 1 (opto 2), as
shown in Table 11 below. The new setting group binary code must be maintained for
2 seconds before a group change is implemented, thus rejecting spurious induced
interference.(See also hysteresis value for level logic 0 & level logic 1 in section 6.1 of
this chapter).
When this selection is chosen, the two opto-isolated inputs assigned to this function
will be opto inputs 1 and 2 and they must not be connected to any output signal
in the PSL. Special care should be take into account to avoid use them for another
purpose (i.e in the default PSL they have been used for another functions: DIST/DEF
Chan. Recv. For opto 1 and DIST/DEF carrier out of service).
• Default PSL: To enable the setting group via binary inpputs, the opto input 1 and 2
must be removed from the PSL.
(If assigned in the PSL, instead of Dist DEF Carrier Receive Logic Start, a setting
group change will occur)
Note that each setting group has its own dedicated PSL, which should be configured and
sent to the relay independently)
MiCOM P441/P442 & P444 Page 107/220
• Or using the relay operator interface / remote communications. Should the user issue
a menu command to change group, the relay will transfer to that settings group, and
then ignore future changes in state of the bit 0 and bit 1 opto-inputs. Thus, the user is
given greater priority than automatic setting group selection.
Binary State of SG Change bit 1 Binary State of SG Change bit 0 Setting Group
Activated
Opto 2 Opto 1
0 0 1
0 1 2
1 0 3
1 1 4
TABLE 11 - SETTING GROUP SELECTION

REMINDER : IF SELECTED IN THE MENU (CHANGEMENT GROUPS BY OPTOS),
OPTO 1 & 2 MUST BE REMOVED FROM THE PSL (THEY ARE
DEDICATED FOR GROUPS SELECTION ONLY)
Page 108/220 MiCOM P441/P442 & P444
4. APPLICATION OF NON-PROTECTION FUNCTIONS

4.1 Fault locator
The relay has an integral fault locator that uses information from the current and voltage
inputs to provide a distance to fault measurement. The sampled data from the analogue
input circuits is written to a cyclic buffer until a fault condition is detected. The data in the
input buffer is then held to allow the fault calculation to be made. When the fault calculation
is complete the fault location information is available in the relay fault record.
When calculated the fault location can be found in the fault record under the
VIEW RECORDS column in the Fault Location cells. Distance to fault is available in km,
miles, impedance or percentage of line length. The fault locator can store data for up to five
faults. This ensures that fault location can be calculated for all shots on a typical multiple
reclose sequence, whilst also retaining data for at least the previous fault.
FIGURE 65 - FAULT LOCATION INFORMATION INCLUDED IN AN EVENT:

MiCOM P441/P442 & P444 Page 109/220
The following table shows the relay menu for the fault locator, including the available setting
ranges and factory defaults:-

Min Max
GROUP 1
DISTANCE ELEMENTS
LINE SETTING
Line Length 1000 km 0.3 km 1000 km 0.015 km
(625 miles) (0.2 mile) (625 miles) (0.005 mile)
Line Impedance 12 / In Ω 0.001 / In Ω 500 / In Ω 0.001 / In Ω
Line Angle 70° –90° +90° 0.1°
FAULT LOCATOR
kZm Mutual Comp 0 0 7 0.01
kZm Angle 0° 0° +360° 1°
4.1.1 Mutual Coupling

When applied to parallel circuits mutual flux coupling can alter the impedance seen by the
fault locator. The coupling will contain positive, negative and zero sequence components. In
practice the positive and negative sequence coupling is insignificant. The effect on the fault
locator of the zero sequence mutual coupling can be eliminated by using the mutual
compensation feature provided. This requires that the residual current on the parallel line is
measured, as shown in Appendix B. It is extremely important that the polarity of connection
for the mutual CT input is correct, as shown.
The system assumed for the distance protection worked example will be used here, refer to
section 3.1. The Green Valley – Blue River line is considered.
Line length: 100Km
CT ratio: 1 200 / 5
VT ratio: 230 000 / 115
Line impedances: Z = 0.089 + j0.476 = 0.484 / 79.4° Ω/km

1
ZM = 0.107 + j0.571 = 0.581 / 79.4° Ω/km (Mutual)

0
1200 / 5
Ratio of secondary to primary impedance = = 0.12
230000 / 115
Line Impedance = 100 x 0.484 / 79.4° x 0.12
= 5.81 / 79.4° Ω secondary.
Relay Line Angle settings 0° to 360° in 1° steps. Therefore, select Line Angle = 80° for
convenience.
Page 110/220 MiCOM P441/P442 & P444
Therefore set Line Impedance and Line Angle: = 5.81 / 80° Ω (secondary).
No residual compensation needs to be set for the fault locator, as the relay automatically
uses the kZ0 factor applicable to the distance zone which tripped.
Should a CT residual input be available for the parallel line, mutual compensation could be
set as follows:
kZm Mutual Comp, kZm = ZM0 / 3.Z1 Ie: As a ratio.
kZm Angle, ∠kZm = ∠ ZM0 / 3.Z1 Set in degrees.

The CT ratio for the mutual compensation may be different from the Line CT ratio. However,
for this example we will assume that they are identical.
kZm = ZM0 / 3.Z1 = 0.581 / 79.4° / (3 x 0.484 / 79.4°)
= 0.40 / 0°
Therefore set kZm Mutual Comp = 0.40
kZm Angle = 0°
4.2 Voltage transformer supervision (VTS) – Main VT for minZ measurement
4.2.1 VTS logic description
The voltage transformer supervision (VTS) feature is used to detect failure of the analog ac
voltage inputs to the relay. This may be caused by internal voltage transformer faults,
overloading, or faults on the interconnecting wiring to relays. This usually results in one or
more VT fuses blowing. Following a failure of the ac voltage input there would be a
misrepresentation of the phase voltages on the power system, as measured by the relay,
which may result in maloperation of the distance element.
The VTS logic in the relay is designed to detect the voltage failure (with internal thresholds or
external opto input), and automatically adjust the configuration of protection elements
(Distance element is blocked but may be unblocked on I1,I2 or I0 conditions in case of fault
during VTS conditions) whose stability would otherwise be compromised (Distance, DEF,
Weak infeed, Directionnal phase current& all directional elements used in the internal logic).
A settable time-delayed alarm output is also available (min1sec to Max 20sec).
The condition of this alarm is given by:
FFUS_Confirmed = (Fuse_Failure And VTS Timer) Or INP_FFUS_Line
INP_F.Failure_Line
VN >F.Failure
I2 >F.Failure
&
≥1
VTS Time
I0 >F.Failure ≥1 delay
S
I >F.Failure Q FFUS_Confirmed
R
∆I>F.Failure Fuse_Failure
Any_pole_dead S
& R
Q
Healthy network
V<F.Failure
≥1
All Pole Dead
P0530ENa
FIGURE 66 - VTS LOGIC

(SEE ALSO DDB DESCRIPTION IN THE END OF THAT SECTION)
MiCOM P441/P442 & P444 Page 111/220
FIGURE 67 - VT SUPERVISION: VTS SETTINGS IN MiCOM S1
• VTS Timer: A settable alarm from 1 to 20s by step of 1s gives the possibility to signal
by an alarm the Failure. This alarm is instantaneous in case of opto energized by
external INP FFU signal (issued from contact of MCB). During no load, the timer
covers the duration of Dead time1 HSAR cycle (Vo&/IO in case of no load) which
could be detected as VT failure 1 pole.
• INP_FFUS Line :The external information given by the MCB to the opto input is
secure and will block instantaneously the distance function and the functions which
are use directional element.
FIGURE 68 - DEFAULT PSL EXTRACTED

Where a miniature circuit breaker (MCB) is used to protect the voltage transformer ac output
circuits, it is common to use MCB auxiliary contacts to indicate a three phase output
disconnection. As previously described, it is possible for the VTS logic to operate correctly
without this input. However, this facility has been provided for compatibility with various
utilities current practices. Energising an opto-isolated input assigned to “MCB Open” on the
relay will therefore provide the necessary block.
Fuse failure conditions are confirmed instantaneously if the opto input "INP_FFus line" is
energised and assigned in PSL, or after elapse of the VTS Time delay in case of 1, 2 or 3
phases Fuse Failure.
The confirmed Fuse Failure blocks all protection functions which use the voltage
measurement (Distance, Weak infeed, Directional overcurrent,…). The directional
overcurrent element may be blocked or set to become non directional with dedicated timer
(Time VTS in MiCOM S1)- I>1 or IN>1.
A non confirmed Fuse Failure will be a detection of an internal fuse failure before the timer is
issued. In that case a fault can be detected by the I2>,I0>,I1>, ∆I> criteria and will force the
unblocking functions:
Distance Protection
DEF Protection
Weak-infeed Protection
I> Directional
U>, U<
Page 112/220 MiCOM P441/P442 & P444
4.2.2 The internal detection FUSE Failure condition

Is verified by follows (Fuse Failure not confirmed logic)
(Vr AND /I0 AND /l2 Et /I>) OR (FusFus_tri AND /Any_pole_dead AND V< AND /∆Ι )
Vr>_FFUS : The residual voltage is bigger than a fixed threshold := 0,75Vn
I0>_FFUS : The zero sequence current is bigger than a settable threshold :
From 0.01 to 1.00 In by step of 0.01
I2>_FFUS : The negative sequence current is bigger than a settable threshold
identical to the I0 threshold.
I>_FFUS : The direct current is bigger than a fixed threshold equal to 2,5IN.
V<_FFUS : All the voltages are lower than a settable threshold from 0.05 à 1
Un by step of 0.1
∆Ι>_FFUS : The line currents have a variation bigger than a settable value from
0.01 to 0.5 In by step of 0.01 In
FuseFailure_3P : Parameter in MiCOM S1 which allows the FFU tri pole detection
Any pole dead : Cycle in progress.
• The I0 criteria (zero sequence current threshold) gives the possibility to UNBLOCK the
distance protection in case of phase to ground fault (if the fuse failure has not been yet
confirmed).
• The I2 criteria (negative sequence current threshold) gives the possibility to

UNBLOCK the distance protection in case of insulated phase to phase fault (if the fuse
failure has not been yet confirmed).
• The criteria (V< AND /∆Ι) gives the possibility to detect the 3Poles Fuse Failure(No
more phase voltage and no variation of current) (no specific logic about line
energisation).
4.2.3 Fuse Failure Alarm reset
In case of Fuse Failure confirmed, the condition which manages the Reset are given by :
Fusion_Fusible = 0
And
INP_FFUS_Line = 0
And
/All Pole Dead Or Healthy Network
• All Pole Dead: No current AND no voltage OR CB Opened ((52a) if assigned in PSL)
UN . V0 . I0 . CVMR (convergence) . PSWING
• Healthy Network:
Rated Line voltage AND
No V0 and No I0 AND
No start element AND
No Power Swing
MiCOM P441/P442 & P444 Page 113/220
There are three main aspects to consider regarding the failure of the VT supply. These are
defined below:
1. Loss of one or two phase voltages
2. Loss of all three phase voltages under load conditions
3. Absence of three phase voltages upon line energisation
4.2.4 Loss of One or Two Phase Voltages
The VTS feature within the relay operates on detection of residual voltage without the
presence of zero and negative phase sequence current, and earth fault current (ΣIph). This
gives operation for the loss of one or two phase voltages. Stability of the VTS function is
assured during system fault conditions, by the presence of I0 and/or I2 current. Also, VTS
operation is blocked (and distance element unblocked) when any phase current exceeds 2.5
x In.
Zero Sequence VTS Element:
The thresholds used by the element are:
• Fixed operate threshold: VN ≥ 0.75 x Vn;
• Blocking current thresholds, I0 = I2 = 0 to 1 x In; settable (defaulted to

0.05In),
and Iph = 2.5 x In.
4.2.5 Loss of All Three Phase Voltages Under Load Conditions
Under the loss of all three phase voltages to the relay, there will be no zero phase sequence
quantities present to operate the VTS function. However, under such circumstances, a
collapse of the three phase voltages will occur. If this is detected without a corresponding
change in any of the phase current signals (which would be indicative of a fault), then a VTS
condition will be raised. In practice, the relay detects the presence of superimposed current
signals, which are changes in the current applied to the relay. These signals are generated
by comparison of the present value of the current with that exactly one cycle previously.
Under normal load conditions, the value of superimposed current should therefore be zero.
Under a fault condition a superimposed current signal will be generated which will prevent
operation of the VTS.
The phase voltage level detectors is settable (default value is adjusted at 30V / setting
range : min:10V to Max:70V).
The sensitivity of the superimposed current elements is settable and default value is
adjusted at 0.1In (setting range : 0,01In to 5In).
4.2.6 Absence of Three Phase Voltages Upon Line Energisation

If a VT were inadvertently left isolated prior to line energisation, incorrect operation of voltage
dependent elements could result. The previous VTS element detected three phase VT
failure by absence of all 3 phase voltages with no corresponding change in current. On line
energisation there will, however, be a change in current (as a result of load or line charging
current for example). An alternative method of detecting 3 phase VT failure is therefore
required on line energisation: in that case the SOTF logic is applied.
Page 114/220 MiCOM P441/P442 & P444
4.2.7 Menu Settings

The VTS settings are found in the ‘SUPERVISION’ column of the relay menu. The relevant
settings are detailed below.

Min Max
GROUP 1
SUPERVISION
VT Supervision
VTS Time Delay 5s 1s 20s 1s
VTS I2> & I0> Inhibit 0.05 x In 0 1 x In 0.01 x In
Detect 3P Disabled Enabled
Disabled
Threshold 3P 30V 10V 70V 1V
Delta I> 0.1×In 0.01×In 5×In 0.01×In
The relay responds as follows, on operation of any VTS element:
• VTS alarm indication (delayed by the set Time Delay);
• Instantaneous blocking of distance protection elements (if opto used); and others
protection functions using voltage measurement
• Dedirectionalising of directionalised overcurrent elements with new time delays “I>
VTS”.(if selected)
The VTS block is latched after a user settable time delay ‘VTS Time Delay’. Once the signal
has latched then two methods of resetting are available. (See Reset logic description in
section 4.2.3).
If not blocked the time delay associated can be modified as well (Time VTS):
MiCOM P441/P442 & P444 Page 115/220
4.2.8 INPUT / OUTPUT used in VTS logic:

4.2.8.1 Inputs
MCB/VTS Line
The DDB:MCB/VTS Line if linked to an opto in the PSL and when energized, informs the
P44X about an internal maloperation from the VT used for the impedance measurement
reference. (Line in this case means Main VT ref measurement / even if the main VT is on the
bus side and the Synchro VT is on the line side).
MCB/VTS Bus
The DDB:MCB/VTS Bus if linked to an opto in the PSL and when energized, informs the
P44X about an internal maloperation from the VT used for synchrocheck control (See
CheckSync logic in section 4.4).
4.2.8.2 Outputs
VTS Fast
Set high for internal FFAilure detection made with internal logic.
VTS Fail Alarm

Set high Set highwhen Opto energised (copy of MCB) OR internal FFAilure confirmed at the
end of VTS timer.
Any Pole Dead

The DDB Any Pole Dead if linked in the PSL, indicates that one or more poles is opened.
All Pole Dead

The DDB All Pole Dead if linked in the PSL, indicates all pole are dead (The 3 poles are
open).
4.3 Current Transformer Supervision (CTS)
The current transformer supervision feature is used to detect failure of one or more of the ac
phase current inputs to the relay. Failure of a phase CT or an open circuit of the
interconnecting wiring can result in incorrect operation of any current operated element.
Additionally, interruption in the ac current circuits risks dangerous CT secondary voltages
being generated.
4.3.1 The CT Supervision Feature
The CT supervision feature operates on detection of derived zero sequence current, in the
absence of corresponding derived zero sequence voltage that would normally accompany it.
The voltage transformer connection used must be able to refer zero sequence voltages from
the primary to the secondary side. Thus, this element should only be enabled where the VT
is of five limb construction, or comprises three single phase units, and has the primary star
point earthed.
Operation of the element will produce a time-delayed alarm visible on the LCD and event
record (plus DDB 125: CT Fail Alarm), with an instantaneous block for inhibition of protection
elements. Protection elements operating from derived quantities (Broken Conductor, Earth
Fault, Neg Seq O/C) are always blocked on operation of the CT supervision element.
The following table shows the relay menu for the CT Supervision element, including the
available setting ranges and factory defaults:-
Page 116/220 MiCOM P441/P442 & P444
Menu text Default setting Setting range step size

Min max
GROUP 1
SUPERVISION
CT SUPERVISION
CTS Status Disabled Enabled/Disabled N/A
CTS VN< Inhibit 1 0.5 / 2V 22 / 88V 0.5 / 2V
CTS IN> Set 0.1 0.08 x In 4 x In 0.01 x In
CTS Time Delay 5 0s 10s 1s
4.3.2 Setting the CT Supervision Element
Ir>
Temporisation
& 0<->10sec
Vr<
Calulation Part Logical Part
P0554ENa
The residual voltage setting, CTS VN< Inhibit and the residual current setting, CTS IN> set,
should be set to avoid unwanted operation during healthy system conditions. For example
CTS VN< Inhibit should be set to 120% of the maximum steady state residual voltage. The
CTS IN> set will typically be set below minimum load current. The time-delayed alarm,
CTS Time Delay, is generally set to 5 seconds.
Where the magnitude of residual voltage during an earth fault is unpredictable, the element
be disabled to prevent a protection elements being blocked during fault conditions.
4.3.2.1 Inputs/outputs in CTS logic:
CT Fail Alarm
The DDB cell indicates a CT Fail detected after timer is issued
4.4 Check synchronisation
The check synchronism option is used to qualify reclosure of the circuit breaker so that it can
only occur when the network conditions on the busbar and line side of the open circuit
breaker are acceptable. If a circuit breaker were closed when the two system voltages were
out of synchronism with one another, i.e. a difference in voltage magnitudes or phase angles
existed, the system would be subjected to an unacceptable ‘shock’, resulting in loss of
stability and possible damage to connected machines.
Check synchronising therefore involves monitoring the voltage on both sides of a circuit
breaker and, if both sides are ‘live’, the relative synchronism between the two supplies. Such
checking may be required to be applied for both automatic and manual reclosing of the
circuit breaker and the system conditions which are acceptable may be different in each
case. For this reason, separate check synchronism settings are included within the relay for
both manual and automatic reclosure of the circuit breaker. With manual closure, the CB
close signal is applied into the logic as a pulse to ensure that an operator cannot simply keep
the close signal applied and wait for the system to come into synchronism. This is often
referred to as guard logic and requires the close signal to be released and then re-applied if
the closure is unsuccessful.
MiCOM P441/P442 & P444 Page 117/220
The check synchronising element provides two ‘output’ signals which feed into the manual
CB control and the auto reclose logic respectively. These signals allow reclosure provided
that the relevant check-synch criteria are fulfilled.
Note that if check-synchronising is disabled, the DDB: signal is

automatically asserted and becomes invariant (logical status always forced at 1).
For an interconnected power system, tripping of one line should not cause a significant shift
in the phase relationship of the busbar and line side voltages. Parallel interconnections will
ensure that the two sides remain in synchronism, and that autoreclosure can proceed safely.
However, if the parallel interconnection(s) is/are lost, the frequencies of the two sections of
the split system will begin to slip with respect to each other during the time that the systems
are disconnected. Hence, a live busbar / live line synchronism check prior to reclosing the
breaker ensures that the resulting phase angle displacement, slip frequency and voltage
difference between the busbar and line voltages are all within acceptable limits for the
system. If they are not, closure of the breaker can be inhibited.
The SYSTEM CHECKS menu contains all of the check synchronism settings for auto (“A/R”)
and manual (“Man”) reclosure and is shown in the table below along with the relevant default
settings:-

Min Max
GROUP 1
SYSTEM CHECKS
C/S Check Scheme for A/R 111 Bit 0: Live Bus / Dead Line,
Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
C/S Check Scheme for Man 111 Bit 0: Live Bus / Dead Line,
CB Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
V< Dead Line 13V 5V 30V 1V
V> Live Line 32V 30V 120V 1V
V< Dead Bus 13V 5V 30V 1V
V> Live Bus 32V 30V 120V 1V
Diff Voltage 6.5V 0.5V 40V 0.1V
Diff Frequency 0.05Hz 0.02Hz 1Hz 0.01Hz
Diff Phase 20° 5° 90° 2.5°
Bus-Line Delay 0.2s 0.1s 2s 0.1s
KEY: “Diff” denotes the differential between Line VT and Busbar VT measurements.
− At least one condition of c/s scheme must be selected in the 3 bits, to activate the c/s
check logic.
− Man CB, check sync condition is tallen in account, only if a logic of STF has been
enabled by S1.
− If SOTF is disabled in S1, a dedicated PSL must be created using Deb B (live L or live
B/Dead L) – live/live could not be managed – in that case.
Page 118/220 MiCOM P441/P442 & P444
Note that the combination of the Diff Phase and Bus-Line Delay settings can also be equated
to a differential frequency, as shown below:
• Diff Phase angle set to +/-20°, Bus-Line Delay set to 0.2s.
• The phase angle ‘window’ is therefore 40°, which corresponds to 40/360ths of a

cycle = 0.111 cycle. This equates to a differential frequency of:
0.111 / 0.2 = 0.55 Hz
Thus it is essential that the time delay chosen before an “in synchronism” output can be
given is not too long, otherwise the synchronising conditions will appear more restrictive than
the actual Diff Frequency setting.
The Live Line and Dead Line settings define the thresholds which dictate whether or not the
line or bus is determined as being live or dead by the relay logic. Under conditions where
either the line or bus are dead, check synchronism is not applicable and closure of the
breaker may or may not be acceptable. Hence, setting options are provided which allow for
both manual and auto-reclosure under a variety of live/dead conditions. The following
paragraphs describe where these may be used.
WARNING: THE SETTINGS VOLTAGE IN MiCOM S1 IS ALLWAYS CALCULATED IN
PHASE TO GROUND – EVEN IF PHASE/PHASE REF HAS BEEN
SELECTED.
If the threshold : live line has been set too high – the relay will never detect a healthy
network (as the line voltage is always measured below the voltage threshold). Without live
line condition, the distance protection cannot use the delta algorithms as no prefault
detection has been previously detected.
4.4.1 Dead Busbar and Dead Line
This mode is not integrated in the internal logic, however can be created using a dedicated
PSL:
(This facility with cells (Dead Line/Dead Bus) is available since version A3.0 model 05)
This setting might also be used to allow manual close with specific test conditions on the CB.
4.4.2 Live Busbar and Dead Line
Where a radial feeder is protected, tripping the circuit breaker will isolate the infeed, and the
feeder will be dead. Provided that there is no local generation which can backfeed to
energise the feeder, reclosure for live busbar / dead line conditions is acceptable. This
setting might also be used to allow re-energisation of a faulted feeder in an interconnected
power system, which had been isolated at both line ends. Live busbar / dead line reclosing
allows energising from one end first, which can then be followed by live line / live busbar
reclosure with voltages in synchronism at the remote end.
4.4.3 Dead Busbar and Live Line
If there was a circuit breaker and busbar at the remote end of the radial feeder mentioned
above, the remote breaker might be reclosed for a dead busbar / live line condition.
MiCOM P441/P442 & P444 Page 119/220
4.4.4 Check Synchronism Settings

Depending on the particular system arrangement, the main three phase VT for the relay may
be located on either the busbar or the line. Hence, the relay needs to be programmed with
the location of the main voltage transformer. This is done under the ‘CT & VT RATIOS’
column in the ‘Main VT Location’ cell, which should be programmed as either ‘Line’ or ‘Bus’
to allow the previously described logic to operate correctly. (See DDB description bellow)
Note that the check synch VT input may be driven from either a phase to phase or phase to
neutral voltage. The ‘C/S Input’ cell in the ‘CT & VT RATIOS’ column has the options of A-N,
B-N, C-N, A-B, B-C or C-A, which should therefore be set according to the actual VT
arrangement.
If the VTS feature internal to the relay operates, the check synchronising element is inhibited
from giving an ‘Allow Reclosure’ output. This avoids allowing reclosure in instances where
voltage checks are selected and a VT fuse failure has made voltage checks unreliable.
Measurements of the magnitude angle and delta frequency (slip frequency - since version
A4.0 with model 07) – the rated frequency of network is displayed by default in case of
problem with the delta f calculation : No line voltage or no bus voltage or both of the check-
synch voltage are displayed in the ‘MEASUREMENTS 1’ column.
Individual System Check logic features can be enabled or disabled by means of the C/S
Check Scheme function links. Setting the relevant bit to 1 will enable the logic, setting bits
to 0 will disable that part of the logic. Voltage, frequency, angle and timer thresholds are
shared for both manual and autoreclosure, it is the live/dead line/bus logic which can differ.
Page 120/220 MiCOM P441/P442 & P444
Enable_SYNC
VTS_Slow
1
INP_Fuse Failure Bus
AR_Force_Sync
INP_AR_Cycle_1P S
Q
INP_AR_Reclaim R
INP_AR_Cycle_Conf
1 CHECK
SYNC
INP_AR_Reclaim_Conf 1
Conditions
0 & verified
Any_Pole_Dead &
t 1
&
All_Pole_Dead 200ms
Dead L/Live B
t
V< Dead Line &
0
V> Live Bus 100ms
Live L/Dead B
t
V> Live L &
0
V< Dead B 100ms
Live L/Live B
V> Live B t
0
&
V> Live L
Bus Line Delay
Diff voltage
Diff frequency
Diff phase
P0492ENa
FIGURE 69 – CHECK SYNC LOGIC DESCRIPTION

MiCOM P441/P442 & P444 Page 121/220
X1 X2
b0 i0
b1 i1
sample
T sample
P0493ENa
FIGURE 70 – CALCUL OF FREQUENCY

Frequency tracking is calculated by: freq=1/((X2-X1+ Nbsamples)* Tsamples)
With X1 = b0 /(b0 – b1) et X2 = I0 /(I0 – I1).
Tsamples is the sampling period.
Nbsamples is the number of samples per period (between b1 & i1 (b1 being excluded))
The Line & Bus frequencies are calculated with the same principle (described here after).
Page 122/220 MiCOM P441/P442 & P444
Trailing VLine phase
VLine
VBus
x1 x2
Ta
∆T
y1 y2
Leading VLine phase
VBus
VLine
y2 y3
Ta
∆T
x1 x2
P0494ENa
FIGURE 71 - CALCULATION OF DIFF. PHASE
Phase shift = (∆T/ T) *360
∆T = Ta + (x1-y2)
A phase shift calculation requests a change of sign from both signals.
All the angles will be between 0° and 180°. For a phase shift of 245°,
(360 –245) = 115° will be displayed
MiCOM P441/P442 & P444 Page 123/220
4.4.5 Logic inputs / Outputs from synchrocheck function

4.4.5.1 Logic DDB input from the check sync logic
MCB/VTS Bus
The DDB:MCB/VTS Bus if assigned to an opto input in PSL and when energized, will inform
the P44X about an internal maloperation from the VT used for synchrocheck ref. (BUS in
that case means Checksync ref measurement / even if the main VT is on the bus side and
the Synchro VT is on the line side)
When this opto picks up it will block the internal logic of Synchrocheck.
MCB/VTS Line
The DDB:MCB/VTS Line if assigned to an opto input in PSL and when energized, will inform
the P44X about an internal maloperation from the VT used for impedance measurement ref.
(Line in that case means Main VT ref measurement / even if the main VT are bus side and
the Synchro VT is line side)
When that opto picks up it will block the internal logic of Synchrocheck.
4.4.5.2 Logic DDB outputs issued by the check sync logic
Check Sync OK
Set high when Check Synchro conditions are verified
[Used with AR close in dedicated PSL – "AND" gate : [(AR Close) & (CheckSync OK)]
A/R Force Sync

Simulates the CheckSync control and force the logical DDB output "CheckSync OK" at 1
during a 1 pole or 3 poles high speed AR cycle. Without CheckSync control (See the
explanation in AR description Figure 76 and Figure 106)
V<Dead Line
Set high when the Dead line condition is verified (voltage below the V<Dead Line threshold
value (settable in MiCOM S1) – The measured voltage is always calculated as a single
phase voltage
V>Live Line
Set high when the Live line condition is verified (voltage above the V>Live Line threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref
V<Dead Bus
Set high when the Dead Bus condition is verified (voltage below the V<Dead Bus threshold
V>Live Bus
Set high when the Live Bus condition is verified (voltage above the V>Live Bus threshold
Control No C/S
Set high when the internal Check Sync conditions are not verified
Ext Chk Synch OK

The DDB Ext Chk Synch OK if assigned to an opto input in PSL and when energized,
indicates that Check Sync conditions are verified by an external device – The DDB cell
should be assigned afterwards with an internal AR logic (See also AR description in section
4.5.1).
Page 124/220 MiCOM P441/P442 & P444
WARNING: TO ENSURE THAT THE AR CLOSING COMMAND IS CONTROLED BY

THE CHECK SYNC CONDITIONS, THE ABOVE PSL SHOULD BE SET.
(Different schemes can be created with internal AR & external CSync or internal Csync &
external AR)
Synchro Check : Dead Bus / Dead Line
P0537ENa
FIGURE 72 – CHECK SYNC PSL LOGIC
PSL Output
assigned
Check Sync 1 SYNC
AR_Force_Sync
AR_Fail
AReclose AR_Close
AR_Cycle_1P
AR_Cycle_3P
Closing command
& with check sync
1 conditions verified
CB Control CBC_Recl_3P
CBC_No_Check_Sync
P0495ENa
FIGURE 73 – INTERNAL CHECK SYNC AND INTERNAL AR LOGIC

MiCOM P441/P442 & P444 Page 125/220
External Check Sync 1

Closing command
& with external C. Sync
conditions verified
Output_AR_force_Sync
Output_closing order
P0496ENa
FIGURE 74 - LOGIC WITH EXTERNAL SYNCHRO CHECK
Output_Sync
1
Output_AR_force_Sync External closing order
External with internal C. Sync
AR close order &
conditions verified
Output_AR_Close
1
Output_closing order
P0497ENa
FIGURE 75 - LOGIC WITH EXTERNAL AR

4.5 Autorecloser
4.5.1 Autorecloser Functional Description
The relay autorecloser provides selectable multishot reclosure of the line circuit breaker.
The standard scheme logic is configured to permit control of one circuit breaker.
Autoreclosure of two circuit breakers in a 1½ circuit breaker or mesh corner scheme is not
supported by the standard logic (Dedicated PSL must be created & tested by user). The
autorecloser can be adjusted to perform a single shot, two shot, three shot or four shot cycle.
Dead times for all shots (reclose attempts) are independently adjustable (in MiCOM S1).
Where the relay is configured for single and three pole tripping, the recloser can perform a
high speed (HSAR) single pole reclose shot, for a single phase to earth fault. This single
pole shot may be followed by up to three delayed (DAR) autoreclose shots, each with three
phase tripping and reclosure. For a three pole trip, up to four reclose shots are available in
the same scheme. Where the relay is configured for three pole tripping only, up to four
reclose shots are available, each performing three phase reclosure.
Page 126/220 MiCOM P441/P442 & P444

Min Max
GROUP 1
AUTORECLOSE
AUTORECLOSE MODE
1P Trip Mode Single Single
Single/Three
Single/Three/Three
Single/Three/Three/Three
3P Trip Mode Three Three
Three/Three
Three/Three/Three
Three/Three/Three/Three
1P - Dead Time 1(HSAR) 1s 0.1s 5s 0.01s
3P - Dead Time 1(HSAR) 1s 0.1s 60s 0.01s
Dead Time 2 (DAR) 60s 1s 3600s 1s
Reclaim Time 180s 1s 600s 1s
Close Pulse Time 0.1s 0.1s 10s 0.1s
A/R Inhibit Wind 5s 1s 3600s 1s
(CB healthy application)
C/S on 3P Rcl DT1 Enabled Enabled, Disabled
(Check Sync with HSAR)
AUTORECLOSE
LOCKOUT
Block A/R 11111111 Bit 0: Block at tZ2, Bit 1: Block at tZ3,
11111111 Bit 2: Block at tZp, Bit 3: Block for LoL Trip,
Bit 4: Block for I2> Trip,
Bit 5: Block for I>1 Trip,
Bit 6: Block for I>2 Trip,
(Bit = 1 means AR blocked)
Bit 7: Block for V<1 Trip,
Bit 8: Block for V<2 Trip,
Bit 9: Block for V>1 Trip,
Bit 10: Block for V>2 Trip,
Bit 11: Block for IN>2 Trip,
Bit 12: Block for IN>2 Trip,
Bit 13: Block for Aided DEF Trip.
Discrim. Time 5s 0.1s 5s 0.01s
Remark: 1 PAR or/and 3 PAR logic must be enable in CB control:

MiCOM P441/P442 & P444 Page 127/220
4.5.2 Benefits of Autoreclosure

An analysis of faults on any overhead line network has shown that 80-90% are transient in
nature. Lightning is the most common cause, other possibilities being clashing conductors
and wind blown debris. Such faults can be cleared by the immediate tripping of one or more
circuit breakers to isolate the fault, followed by a reclose cycle for the circuit breakers. As
the faults are generally self clearing ‘non-damage’ faults, a healthy restoration of supply will
result.
The remaining 10 - 20% of faults are either semi-permanent or permanent. A semi-
permanent fault could be caused by a small tree branch falling on the line. The cause of the
fault may not be removed by the immediate tripping of the circuit, but could be burnt
away/thrown clear after several further reclose attempts or “shots”. Thus several time
delayed shots may be required in forest areas.
Permanent faults could be broken conductors, transformer faults or cable faults which must
be located and repaired before the supply can be restored.
In the majority of fault incidents, if the faulty line is immediately tripped out, and time is
allowed for the fault arc to de-ionise, reclosure of the circuit breakers will result in the line
being successfully re-energised, with obvious benefits. The main advantages to be derived
from using autoreclose can be summarised as follows:
• Minimises interruptions in supply to the consumer;
• A high speed trip and reclose cycle clears the fault without threatening system
stability.
When considering feeders which are partly overhead line and partly underground cable, any
decision to install auto-reclosing would be influenced by any data known on the frequency of
transient faults. When a significant proportion of the faults are permanent, the advantages of
auto-reclosing are small, particularly since reclosing on to a faulty cable is likely to aggravate
the damage.
At subtransmission and transmission voltages, utilities often employ single pole tripping for
earth faults, leaving circuit breaker poles on the two unfaulted phases closed. High speed
single phase autoreclosure then follows. The advantages and disadvantages of such single
pole trip/reclose cycles are:
• Synchronising power flows on the unfaulted phases, using the line to maintain
synchronism between remote regions of a relatively weakly interconnected system.
• However, the capacitive current induced from the healthy phases can increase the
time taken to de-ionise fault arcs.
Page 128/220 MiCOM P441/P442 & P444
4.5.3 Auto-reclose logic operating sequence

An autoreclose cycle is internally initiated by operation of a protective element (could be
started by an internal trip or external trip), provided the circuit breaker is closed at the instant
of protection operation. The appropriate dead timer for the shot is started (Dead Time 1, 2, 3
or 4; noting that separate dead times are provided for the first high speed shot of single pole
(1P), and three pole (3P), reclosure). At the end of the dead time, a CB close command of
set duration = Close Pulse is given, (See Figure 76 with AR Close logic) provided system
conditions are suitable. The conditions to be met for closing are that the system voltages
satisfy the internal check synchronism criteria (set in the System Checks section of the relay
menu – and in a dedicated PSL (needs to be created by user – see section 4.2.8), and that
the circuit breaker closing spring, or other energy source, is fully charged indicated from the
DDB: CB Healthy input (Optional application / See Figure 78 and Figure 82 AR inputs).
When the CB has closed the reclaim time (Reclaim Time) starts (See Figure 76 with AR
Close logic). If the circuit breaker has been not retrip, the autoreclose logic is reset at the
end of the reclaim time. The autorecloser is ready again to restart from the first shot a new
cycle again (for future faults). If the protection retrips during the reclaim time, the relay either
advances to the next shot in the programmed autoreclose cycle, or, if all programmed
reclose attempts have been made, goes to lockout.
Trip_1P or Trip_3P
Dead Time_1P or
Dead Time_3P
Close Pulse
AR_Trip_3ph
Reclaim Time
P0555ENa
FIGURE 76 - AR CYCLE – GENERAL DESCRIPTION
AR_Trip_3ph and Reclaim

Time stop with next Trip
Trip_1P or Trip_3P
Dead Time_1P
Dead Time_3P
Close Pulse
AR_Trip_3ph
Reclaim Time
P0556ENa
FIGURE 77 - SUCCESSIVE AR CYCLE – SECOND TRIP ORDER BEFORE RECLAIM TIME IS ISSUED
MiCOM P441/P442 & P444 Page 129/220
(The reclaim time is reset when the reclaim timer adjusted in MiCOM S1 Timer is issued or if
a new trip order 1P or 3P occurs – see Figure 78)
Any Pole Dead
CHECK SYNC OK
R
Q
End of Dead Time 2 AR_Fail
& S
CHECK SYNC 3P HSAR

1
&
End of 3P Dead Time 1
S
& Q AR_Force_Sync
1 R
1
& S
Q AR_RECLAIM
R
AR_Enable 0
& t
1 Reclaim Time
Block AR
1
INP_CBHealthy
1 S
Q AR_Close
TRIP_1P
R
1 0
1
t
TRIP_3P
Close pulse Time
P0498ENa
FIGURE 78 - LOGIC FOR RECLAIM TIME /AR CLOSE / AR FAIL AND AR FORCE_SYNC
(AR FAIL is reseted with 3 pole closed)
Page 130/220 MiCOM P441/P442 & P444
AR_Enable
Block AR
1
AR lock out
inhibit
CBA_Discrepency
& S & AR_lock out
Q
1
R
0
t
End of 1P Dead Time 1 Reclaim
Time
1
S
&
Q
TRIP_1P
1 R
TRIP_3P
Reset TRIP 1P
1
Reset TRIP 3P
TPAR enable
AR_Cycle_1P & S
Q
AR_Discrimination R
TRIP_3P
Reset TRIP 3P 1
& S
Q
R
P0499ENa
FIGURE 79 - INTERNAL LOGIC OF AR LOCK OUT

AR lockout logic picks up by: Block AR (see Figure 80) or AR BAR Shots (see Figure 81)
or Inhibit (see Figure 82) or No pole discrepancy detected at the end of dead time1 (see
Figure 83) or Trip order still present at the end of Dead time or Trip3P issued during 1P cycle
after Discrimination Timer or Trip3P issued during 1P cycle with no 3PAR enable.
MiCOM P441/P442 & P444 Page 131/220
S
Q >1
AR 1P in Prog
>1 &
AR 3P in Prog
BAR_Block_T2 Enable
&
T2
BAR_Block_T3 Enable
&
T3
BAR_Block_Tzp Enable
&
Tzp
T4
BAR_Block_LOL Enable
&
LOL_Trip_3P
BAR_Block_I2 > Enable

&
Trip_I2>
BAR_Block_I> Enable
&
TRIP 3P_I>1
BAR_Block_I>2 Enable
&
TRIP 3P_I>2
BAR_Block_V<1 Enable
&
TRIP 3P_V<1
&
BAR_Block_V<2 Enable
&
>1
TRIP 3P_V<2 >1 Block AR
BAR_Block_V>1 Enable
&
TRIP 3P_V>1
BAR_Block_V>2 Enable
&
TRIP 3P_V>2
BAR_Block_IN>1 Enable
&
SBEF_TRIP 3P_IN>1
BAR_Block_IN>2 Enable
&
SBEF_TRIP 3P_IN>2
BAR_Block_DEF Enable
&
DEF_TripA
DEF_TripB >1
DEF_TripC
BRK_Trip 3P
SOTF_Enable
&
SOTF/TOR trip
PHOC_Trip_3P_I>4
CBF1_Trip_3P
CBF2_Trip_3P
INP_BAR
P0500ENa
FIGURE 80 – BLOCK AR LOGIC
− With AR Lock out (Block AR) activated, the AR does not initiate any additional AR
cycle. If AR lock out picks up during a cycle, the AR close is blocked.
− A dedicated PSL can be created, for performing an AR lock out in case of Fuse
Failure confirmed.
Page 132/220 MiCOM P441/P442 & P444
AR_Enable
SPAR enable
& & S
1 AR lockout_Shots>
Q
R
TRIP_1P
1
Trip counter = &

setting
TRIP_3P
&
TPAR enable
Reset TRIP_1P
1
Reset TRIP_3P
P0501ENa
FIGURE 81 - AR LOCK OUT BY NUMBER OF SHOTS
AR_Enable
End of 1P_Dead Time

1
& S
End of 3P_Dead Time Q t
0 inhibit
R
&
INP_CBHealthy Inhibit Window
P0502ENa
FIGURE 82 - LOGIC OF INHIBIT WINDOW

The inhibit timer is started at the end of dead time if CB healthy is absent
Trip1P
Dead time(1P)
AR_BAR
AR_Trip_3ph
CBA_Discrepency
P0503ENa
FIGURE 83 - POLES DISCREPENCY (CBA-DISC)
Trip1P or Trip 3P
Dead time1 or
Dead time 3P
AR_Close
AR_BAR
P0557ENa
FIGURE 84 - TRIP ORDER STILL PRESENT AT THE END OF DEAD TIME WILL FORCE AR LOCK OUT
(AR _BAR)
MiCOM P441/P442 & P444 Page 133/220
CNF_52b
CNF_52a
&
INP_52a_A &
S
Q
& R
INP_52b_A &
1 CBA_A
&
& & CBA_3P_C
xor
&
INP_52a_B &
S
Q 1 CBA_ANY
& R
INP_52b_B &
1 CBA_B
&
& & CBA_3P
xor
&
INP_52a_C & &
S
Q
& R
INP_52b_C &
1 CBA_C
&
& t
1 0 CBA_Status_Alarm
xor
CBA_Time_Alarm
CBA_Time_Disc
1 t
INP_DISCREPENCY CBA_Disc
0
P0504ENa
FIGURE 85 - LOGICAL CBAUX SCHEME

(CBA_DISC LOGIC FOR AR_BAR (AR LOCK OUT))
CBA TIME DISC=150MSEC FIXED VALUE
Logic of pole dead :
− CBA_A = Pole Dead A
− CBA_3P = All pole Dead
− CBA_3P_C = All pole Live
− CBA_Any = Minimum 1Pole dead

The total number of autoreclosures is shown in the “CB Condition” menu from LCD under
Total Reclosures. Separate counters for single pole and three pole reclosures are available
(See HMI description chapter P44x/EN HI). The counters can be reset to zero with the
Reset Total A/R command; by LCD HMI
Page 134/220 MiCOM P441/P442 & P444
4.5.4 Scheme for Three Phase Trips

The relay allows up to four reclose shots. The scheme is selected in the relay menu as
shown in Table 12:
(The first 3P_HSAR cycle can be controlled by the check Sync logic)
Reclosing Mode Number of Three Phase Shots

3 1
3/3 2
3/3/3 3
3/3/3/3 4
TABLE 12 - RECLOSING SCHEME FOR 3 PHASE TRIPS

4.5.5 Scheme for Single Pole Trips
The relay allows up to four reclose shots, ie. one high speed single pole AR shot (HSAR),
plus up to three delayed (DAR) shots. All DAR shots have three pole operation. The
scheme is selected in the relay menu as follows:
Scheme Number of Single Pole HSAR Shots Number of Three Pole DAR Shots
1 1 None
1/3 1 1
1/3/3 1 2
1/3/3/3 1 3
TABLE 13 - RECLOSING SCHEME FOR SINGLE PHASE TRIPS

Should a single phase fault evolve to affect other phases during the single pole dead time,
the recloser will then move to the appropriate three phase cycle.
When a single pole trip is issued by the relay, a 1 pole AR cycle is initiated. The Dead time1
and Discrimination timer (from version A3.0) are started. If the AR logic detects a single pole
or three poles trip (internal or external) during the discrimination timer, the 1P HSAR cycle is
disabled and replaced by a 3P HSAR cycle, if enable. If no AR 3P is enable in MiCOM S1,
the relay trip 3 poles and AR is blocked. (see Figure 86)
MiCOM P441/P442 & P444 Page 135/220
Trip 1P Trip 3P during Discrimination Timer
Trip_1P or Trip_3P
1P_Dead Time
AR_Discrimination Timer
3P_Dead Time
AR_Trip_3ph
AR_BAR
P0505ENa
FIGURE 86 - FAULT DURING A HSAR 1P CYCLE DURING DISCRIMINATION TIMER

If the AR logic detect a 3 poles trip (internal or external) when the Discrimination Timer is
issued, and during the 1P dead time; the single pole AR cycle is stopped and the relay trip 3
phases and block the AR. (see Figure 87)
Trip 1P Trip 3P after Discrim Timer
Trip_1P or Trip_3P
1P_Dead Time
AR_Discrimination Timer
3P_Dead Time
AR_Trip_3ph
AR_BAR
P0506ENa
FIGURE 87 - FAULT DURING A HSAR 1P CYCLE WHEN DISCRIMINATION TIMER IS ISSUED

- Figure 86 - Figure 87: Evolving fault during AR 1P cycle -
Page 136/220 MiCOM P441/P442 & P444
4.5.6 Logical Inputs used by the Autoreclose logic

Contacts from external equipment (External protection or external synchrocheck or external
AR) may be used to influence the auto-recloser via opto-isolated inputs. Such functions can
be allocated to any of the opto-isolated inputs on the relay via the programmable scheme
logic (Ensure that optos1&2 are not set for setting group change- Otherwise, these optos
cannot be mapped to functions in the PSL). The inputs can be selected to accept either a
normally open or a normally closed contact, programmable via the PSL editor.
SPAR Enable
The DDB SPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted
and recorded to opto8) and when energized, will enable the 1P AR logic (The priority of that
input is higher than the settings done via MiCOM S1 or by front panel - that means the 1P
AR can be disabled even if activated in MiCOM S1; as the opto input is not energized.
(to be valid opto must be energized >1,2 sec).
SPAR
1 AR SPAR enable
INP_SPAR
P0507ENa
FIGURE 88
TPAR Enable
The DDB TPAR Enable if assigned to an opto input in the PSL (in default PSL is inverted
and recorded to opto8) and when energized, will enable the 3P AR logic (The priority is
higher than the settings done via MiCOM S1 or by front panel - that means the 3P AR can be
disabled even if activated in MiCOM S1; as that opto is not energized.
(to be valid opto must be energized >1,2 sec).
TPAR
1 AR TPAR enable
INP_TPAR
P0508ENa
FIGURE 89
NOTE: After a new PSL loaded in the relay (which includes "TPAR" or
"SPAR" cells); it is necessary to transfer again the settings
configuration (from PC to relay) for adjusting the datas in RAM and
EEPROM (otherwise discrepency could appear in the logic status of
AR enable).
A/R Internal
The DDB A/R Internal if assigned to an opto input in the PSL and when energized, will
enable the internal AR logic. This opto input could be connected to an external condition like
the Wdog of protection Main1 – which activates the internal AR of Main 2 (P44x) in case of
internal failure of the Main1.
AR_Internal
SPAR enable & AR_Enable

1
TPAR enable
P0509ENa
FIGURE 90 - AR ACTIVATED CONDITIONS

MiCOM P441/P442 & P444 Page 137/220
A/R 1p in Prog
The DDB A/R 1P in Prog if assigned to an opto input in the PSL and when energized, will
block the internal DEF as an external single pole AR cycle is in progress.
A/R 3p in Prog
The DDB A/R 3P in Prog if assigned to an opto input in the PSL and when energized, will
inform the P44X about the presence of an external 3P cycle.That data could be used in case
of evolving fault
A/R Close
The DDB A/R Close if assigned to an opto input in the PSL and when energized, could be
linked with the internal check sync condition to control the external CB closing command.
A/R Reclaim
The DDB A/R Reclaim if assigned to an opto input in the PSL and when energized, will
inform the protection about an external reclaim time in progress; and will initiate the internal
TOR logic. (That information extension logic, by using a dedicated PSL could be used also
in Z1x.
BAR
Block Autoreclose (via Opto Input or PSL) – see Figure 80.
The DDB: BAR input will block the autoreclose and lockout the AR if in progress. If a single
pole cycle is in progress a three pole trip and lockout will be issued. It can be used when
protection operation without autoreclose is required. A typical example is on a transformer
feeder, where autoreclosing may be initiated from the feeder protection but blocked from the
transformer protection. Similarly, where a circuit breaker low gas pressure or loss of vacuum
alarm occurs during the dead time, autoreclosure, should be blocked – and BAR can be
used to realise that blocking logic.
Ext Chk Synch OK

External Check Synchroniser Used (via Opto Input) – Dedicated PSL required to be
configured.
If an opto input is assigned in the PSL (DDB: Ext Chk Synch OK), the AR close command
will be controlled by an external check synchronism device. The input is energised when the
Check Sync conditions are verified.
CB Healthy
(via Opto Input)
The majority of circuit breakers are only capable of providing one trip-close-trip cycle. It is
necessary to re-establish sufficient energy in the circuit breaker before the CB can be
reclosed. The DDB: CB Healthy input is used to ensure that there is sufficient energy
available to close and trip the CB before initiating a CB close command. If on completion of
the dead time, sufficient energy is not detected by the relay within a period given by the AR
Inhibit Wind window, lockout will result and the CB will remain open (AR BAR Picks up –
see Figure 79) If the CB energy becomes healthy during the time window, autoreclosure will
occur. This check can be disabled by not allocating an opto input. In this case, the DDB cell
“CB Healthy” is considered invariant for the logic of the relay. This will mean that the signal
is always high within the relay (when the logic required a high level) and at 0, if low level is
requested. It is an invariant status for the firmware (Same logic is applied for every optional
opto – if not linked in the PSL these cells are managed as invariant data for internal logic).
Page 138/220 MiCOM P441/P442 & P444
Start of INP_CB_Healthy picks up,

INhWind before issued of INhWind
INhWind
1P Dead Time or
3P Dead Time
INP_CB_Healthly
Close pulse
AR_Trip_3ph
AR_RECLAIM
P0510ENa
FIGURE 91 - CB_HEALTHY IS PRESENT BEFORE INHWIND IS ISSUED
Start of INhWind is
INhWind issued
INhWind
1P_Dead Time or
3P_Dead Time
INP_CB_Healthy
AR_Close
AR_Trip_3ph
AR_BAR
P0511ENa
FIGURE 92 - CB_HEALTHY DID NOT PICKS UP WHEN INHWIND IS ISSUED (AR BAR PICKS UP)
The CB healthy logic is used as a negative logic (due to an inverter in the scheme – see
Figure 82 (logic of inhibit window) but the DDB takes into account the CB healthy as a
positive logic [1=opto energised during inhwind (MiCOM S1 setting) =AR close pulse]
Force 3P Trip
The DDB Force 3P Trip if assigned to an opto input in the PSL and when energized, will
force the internal single phase protection to trip three phases. (external order from Main1 to
Main2 (P44x)) – next Trip will be 3P (Figure 92 & Figure 93)
INP_Trp_3P
1 BAN3
AR_Trip_3Ph
SPAR enable &
AR_internal
P0512ENa
FIGURE 93 – 3P TRIP LOGIC

MiCOM P441/P442 & P444 Page 139/220
Trip_3P_SBEF_IN>1
Trip_3P_SBEF_IN>2
Trip_3P_I2>
TOR_Trip_3P
LOL_Trip_3P
BRK_Trip_3P
Trip_3P_I>1
Trip_3P_I>2 1
Trip_3P_I>3
Trip_3P_I>4
Trip_3P_V<1
Trip_3P_V<2 1
Trip_3P_V>1
Trip_3P_V>2 1 1 TRIP_Any Pole
PW_trip
R
Q
& S Dwell
1 Timer
BAN3
Trip_timer
PDist_Trip_A
Dwell
Weak_Trip_A 1 Trip_A
1
Timer
DEF_Trip_A
80 ms
User_Trip_A
1 TRIP_Any_A
INP_EXTERNAL_ProtA 1
& &
1 TRIP_3Poles
Trip_timer
PDist_Trip_B
Dwell 1
Weak_Trip_B Trip_B
1
Timer
DEF_Trip_B 80 ms
User_Trip_B
1 TRIP_Any_B
1
INP_EXTERNAL_ProtB
& TRIP_1Pole
xor
xor
Trip_timer
PDist_Trip_C
Dwell 1 Trip_C
Weak_Trip_C 1
Timer
DEF_Trip_C
80 ms
User_Trip_C
1 TRIP_Any_C
1
INP_EXTERNAL_ProtC
P0513ENa
FIGURE 94 - GENERAL TRIP LOGIC
Manual Close CB
(via Opto Input, Local or Remote Control)
Manual closure of the circuit breaker will force the autorecloser in a lockout logic, if selected
in the menu (see SOTF logic Figure 35).
Page 140/220 MiCOM P441/P442 & P444
Any fault detected within 500ms of a manual closure will cause an instantaneous three pole
tripping, without autoreclosure (See next Figure 80 BAR logic)
With AR Lock out (AR_BAR) activated, the AR does not initiate any additional AR cycle. If
AR lock out picks up during a cycle, the AR close is blocked.
This prevents excessive circuit breaker operations, which could result in increased circuit
breaker and system damage, when closing onto a fault.
Manual Trip CB
The DDB Force Manual Trip CB if assigned to an opto input in the PSL and when
energized, will inform the protection about an external trip command on the CB by the CB
control function (if activated).
MiCOM P441/P442 & P444 Page 141/220
SUP_Trip_Loc
& Manual/Remote/Local Trip
1
CBC_Local_Control
&
SUP_Close_Loc
SUP_Trip_Rem
&
CBC_Remote_Control
&
SUP_Close_Rem
INP_CB_Trip_Man
&
CBC_Input_Control Manual/Remote/Local Close

1
&
INP_CB_Man_Close
TRIP
& S CBC_Trip_Pulse
CBA_3P_C
Q CBC_Trip_3P
1
R
t
0 &
CBC_Failed_To_Trip
CBA_3P
CLOSE
CBA_Status_Alarm
& S
Q CBC_Close_In_Progress
AR_Cycle_1P R
1
INP_AR_Cycle_1P t
0
1
AR_Cycle_3P 1 CBC_Delay_Close
INP_AR_Cycle_3P & S
Q
CBA_3P R
CBA_Disc
TRIP_Any
1
INP_AR_Close
AR_Close 1 & CBC_ Fail_To_Close

t
0
R
Q CBC_Recl_3P
S CBC_Close_Pulse
CBA_Any
&
INP_CB_Healthy
CBC_Healthy_Window
t
0 & CBC_UnHeathly
CBC_CS_Window
t
0 & CBC_No_Check_Syn
SYNC
P0514ENa
FIGURE 95 - GENERAL CB CONTROL LOGIC

Page 142/220 MiCOM P441/P442 & P444
CB Discrepancy
The DDB CB Discrepancy if assigned to an opto input in the PSL and when energized, will
inform the protection about a pole Discrepancy status. 1 pole opened and two other poles
closed. Must be Set to high logical level before Dead time 1 is issued (see Figure 83) -can
be generated also internally (see Figure 85 and Figure 109 Cbaux logic).
External TripA
External TripB
External TripC
From External Protection Devices (via Opto Inputs)- see General trip logic Figure 94.
Opto inputs are assigned as External Trip A, External Trip B and External Trip C (external
Trip Order issued by main 2 or in order to initiate the internal AR backup protection).
External trip is integrated in the DDB: Any Trip. No Dwell timer is associated as for an
internal trip (see Figure 94: trip logic).
4.5.7 Logical Outputs generated by the Autoreclose logic
The following DDB signals can be masked to a relay contact in the PSL or assigned to a
Monitor Bit in Commissioning Tests, to provide information about the status of the
autoreclose cycle. These are described below, identified by their DDB signal text.
AR Lockout Shot>
Indicates an unsuccessful autoreclose (definitive trip following the last AR shot). The relay
will be driven to lockout and the autoreclose function will be disabled until the lockout
condition has been reset. An alarm, "AR Lockout Shots>" (along with AR Lockout) will be
raised. – (see Figure 79 and Figure 81)
AR Fail
If the check sync conditions are not meet prior to reclose within the time window, an alarm
"AR Fail" will be raised. (see Figure 78)
AR Close
Initiates the reclosing command pulse for the circuit breaker. This output feeds a signal to
the Reclose Time Delay timer, which maintains the assigned reclose contact closed for a
sufficient time period to ensure reliable CB mechanism operation. This DDB signal may also
be useful during relay commissioning to check the operation of the autoreclose cycle.
Where three single pole circuit breakers are used, the AR Close contact will need to
energise the closing circuits for all three breaker poles (or alternatively assign three CB
Close contacts). (See Figure 78)
AR 1P In Prog.
A single pole autoreclose cycle is in progress. This output will remain activated from the
initiating protection trip, until the circuit breaker is closed successfully, or the AR function is
Locked Out, thus indicating that dead time timeout is in progress. This signal may be useful
during relay commissioning to check the operation of the autoreclose cycle.
MiCOM P441/P442 & P444 Page 143/220
SPAR enable
&
TRIP_1P
AR_Cycle_3P S
& Q AR__1P in prog
CBA_Discrepency
R
BAR t
1
0
TRIP_3P 1P Dead Time 1
S
Q AR_Discrimination
R
1 t
0
Discrimination Time
P0515ENa
FIGURE 96 – AR 1 POLE IN PROGRESS LOGIC
AR 3P In Prog.
A three phase autoreclose cycle is in progress. This output will remain activated from the
initiating protection trip, until the circuit breaker is closed successfully, or the AR function is
Locked Out, thus indicating that dead time timeout is in progress. This signal may be useful
during relay commissioning to check the operation of the autoreclose cycle.
HS_AR_3P
1 AR_3P in prog
DAR_3P
P0516ENa
FIGURE 97 - OUTPUT AR 3 POLES IN PROGRESS
AR_1P in prog
Trip counter = 0 &
TPAR enable
&
1 S
TRIP_3P Q HSAR_3P
R
&
AR_discrimination t
0
Block AR Dead Time1

1
P0517ENa
FIGURE 98 - HSAR 3 POLES (HIGH SPEED AR CYCLE 3 POLES)
3Par
&
& S
TRIP_3P
Q DAR_3P
0 < Trip counter < setting R
Block AR t
1
0
Dead Time 2
P0518ENa
FIGURE 99 - DAR 3 POLES (DELAYED AR CYCLE 3 POLES)

Page 144/220 MiCOM P441/P442 & P444
AR 1st in Prog.
DDB: AR 1st in Prog. is used to indicate that the autorecloser is timing out its first dead
time, whether a high speed single pole or three pole shot.
HSAR_3P
1 AR_1st_Cycle
AR_1P in prog
P0519ENa
FIGURE 100 - OUTPUT HSAR (FOR DEAD TIME1)
AR 234 in Prog.
DDB: AR 234 in Prog. is used to indicate that the autorecloser is timing out delayed
autoreclose dead times for shots 2, 3 or 4. Where certain protection elements should not
initiate autoreclosure for DAR shots, the protection element operation is combined with AR
234 in Prog. as a logical AND operation in the Programmable Scheme Logic, and then set to
assert the DDB: BAR input, forcing lockout.
DAR_3P 1 AR_234th_Cycle
P0520ENa
FIGURE 101 - OUTPUT DAR (FOR DEAD TIME2,3,4)
AR Trip 3 Ph
This is an internal logic signal used to condition any protection trip command to the circuit
breaker(s). Where single pole tripping is enabled, fixed logic converts single phase trips for
faults on autoreclosure to three pole trips.
AR_1P in prog
1
AR_3P in prog
&
TRIP_1P
Block AR 1
AR_RECLAIM
&
inhibit 1 AR_Trip_3Ph
AR_Internal
&
SPAR enable
P0521ENa
FIGURE 102 - -AR LOGIC FOR 3P TRIP DECISION
AR Reclaim
Indicates that the reclaim timer following a particular autoreclose shot is timing out. The
DDB: AR Reclaim output would be energised at the same instant as resetting of any Cycle
outputs. AR Reclaim could be used to block low-set instantaneous protection on
autoreclosure, which had not been time-graded with downstream protection. This technique
is commonly used when the downstream devices are fuses, and fuse saving is implemented.
This avoids fuse blows for transient faults. See Figure 78.
MiCOM P441/P442 & P444 Page 145/220
AR Discrim
Start with the trip order.
When a single pole trip is issued by the relay, a 1 pole AR cycle is initiated. The Dead time1
and Discrimination timer (from version A3.0) are started. If the AR logic detects a single pole
or three poles trip (internal or external) during the discrimination timer, the 1P HSAR cycle is
disabled and replaced by a 3P HSAR cycle, if enable. If no AR 3P is enable in MiCOM S1,
the relay trip 3 poles and AR is blocked. (see Figure 86)
If the AR logic detect a 3 poles trip (internal or external) when the Discrimination Timer is
issued, and during the 1P dead time; the single pole AR cycle is stopped and the relay trip 3
phases and block the AR. (see Figure 87 and Figure 96)
SPAR enable
&
TRIP_1P
AR_3P in prog S
& Q AR_1P in prog
CBA_Discrepency
R
Block AR t
1
0
TRIP_3P 1P Dead Time 1
S
Q AR_Discrimination
R
1 t
0
Discrimination Time
P0522ENa
FIGURE 103 – AR DISCRIMINATION LOGIC

See also Figure 86 & Figure 87
The discrimination timer is used to differentiate an evolving fault to a second fault in the
power system or a long operation of the circuit breaker.
Page 146/220 MiCOM P441/P442 & P444
If an evolving occurs during the discrimination timer, the first single pole high speed
AR cycle (1P HSAR) is stopped and removed by a 3 pole high speed AR cycle (3P HSAR)
P0523ENa
FIGURE 104 - DEAD TIME 1P=500MSEC / T DISCRIM=100MSEC

If the evolving fault occurs after the discrimination timer, it is considered like a new fault. The
1P cycle is blocked and the CB is kept opened. (No 3P AR cycle is started) (definitive trip –
3 poles are kept opened) – see Figure 105.
MiCOM P441/P442 & P444 Page 147/220
FIGURE 105
To inhibit the discrimination timer logic (fixed logic) ; the value should be equal to the 1P
cycle dead time. (1P Dead Time 1).
AR Enable
Indicates that the autoreclose function is in service. (See Figure 90)
AR SPAR Enable
Single pole AR is enabled. (See Figure 88)
AR TPAR Enable
Three poles AR is enabled. (See Figure 89)
AR Lockout
If protection operates during the reclaim time, following the final reclose attempt, the relay
will be driven to lockout and the autoreclose function will be disabled until the lockout
condition is reset. This will produce an alarm, AR Lockout. Secondly, the DDB: BAR input
will block autoreclose and cause a lockout if autoreclose is in progress. Lockout will also
occur if the CB energy is low and the CB fails to close. Once the autorecloser is locked out,
it will not function until a Reset Lockout or CB Manual Close command is received
(depending on the Reset Lockout method chosen in CB Monitor Setup).
NOTE: Lockout can also be caused by the CB condition monitoring functions

maintenance lockout, excessive fault frequency lockout, broken
current lockout, CB failed to trip and CB failed to close, manual close
no check synchronism and CB unhealthy. (See Figure 79 & Figure
80)
Page 148/220 MiCOM P441/P442 & P444
A/R Force Sync

Force the Check Sync conditions to high logical level – used for SPAR or TPAR with SYNC
AR3 fast (Enable by MiCOM S1) - signal is reset with AR reclaim
DEC_3P
AR_Cycle_3P
SYNC
AR_Close
AR_Trip_3ph
RECLAIM
AR_Force_Sync
P0558ENa
FIGURE 106 – CHECK SYNC SIGNAL PICK-UP AT THE END OF THE DEAD TIME (AR CYCLE)
DEC_3P
AR_Cycle_3P
SYNC
AR_Close
AR_Trip_3ph
AR_RECLAIM
AR_Fail
AR_Force_Sync
P0559ENa
FIGURE 107 - THE CHECK SYNC SIGNAL IS FORCED AT THE END OF DEAD TIME
(SEE FIGURE 78)
Ext Chk Synch OK

The DDB Ext Chk Synch OK if linked to an opto in a dedicated PSL and when energized,
indicates that external conditions of Synchro are fullfiled – This can be linked afterwards with
an internal AR logic (See also AR description in Figure 76).
Check Sync;OK
(See Checksync logic description – section 4.4.5.2)
V<Dead Line
V>Live Line
V<Dead Bus
MiCOM P441/P442 & P444 Page 149/220
V>Live Bus
Ctrl Cls In Prog

Manual close in progress-using CB control (timer manual closing delay in progress)
Control Trip
CB Trip command by internal CB control
Control Close
CB close command by internal CB control

Should autoreclosure not be required, the function may be Disabled in the relay
Configuration menu. Disabling the autorecloser does not prevent the use of the internal
check synchronism element to supervise manual circuit breaker closing. If the autoreclose
function is Enabled, the setting guidelines now outlined should be read:
4.5.9 Choice of Protection Elements to Initiate Autoreclosure
In most applications, there will be a requirement to reclose for certain types of faults but not
for others. The logic is partly fixed so that autoreclosure is always blocked for any Switch on
to Fault, Stub Bus Protection, Broken Conductor or Zone 4 trip. Autoreclosure will also be
blocked when relay supervision functions detect a Circuit Breaker Failure or Voltage
Transformer/Fuse Failure. All other protection trips will initiate autoreclosure unless blocking
bits are set in the A/R Block function links. Setting the relevant bit to 1 will block
autoreclose initiation (forcing a three pole lockout), setting bits to zero will allow the set
autoreclose cycle to proceed.
When autoreclosure is not required for multiphase faults, DDB signals 2Ph Fault and 3Ph
Fault can be mapped via the PSL in a logical OR combination onto input DDB: BAR. When
blocking is only required for a three phase fault, the DDB signal 3Ph Fault is mapped to BAR
alone. Three phase faults are more likely to be persistent, so many utilities may not wish to
initiate autoreclose in such instances.
4.5.10 Number of Shots
There are no clear-cut rules for defining the number of shots for any particular application. In
order to determine the required number of shots the following factors must be taken into
account:
An important consideration is the ability of the circuit breaker to perform several trip close
operations in quick succession and the effect of these operations on the maintenance period.
The fact that 80 - 90% of faults are transient highlights the advantage of single shot
schemes. If statistical information for the power system shows that a moderate percentage
of faults are semi-permanent, further DAR shots may be used provided that system stability
is not threatened. Note that DAR shots will always be three pole.
Page 150/220 MiCOM P441/P442 & P444
4.5.11 Dead Timer Setting

High speed autoreclose may be required to maintain stability on a network with two or more
power sources. For high speed autoreclose the system disturbance time should be
minimised by using fast protection, <50 ms, such as distance or feeder differential protection
and fast circuit breakers <100 ms. For stability between two sources a system dead time of
<300 ms may typically be required. The minimum system dead time considering just the CB
is the trip mechanism reset time plus the CB closing time.
Minimum relay dead time settings are governed primarily by two factors:
• Time taken for de-ionisation of the fault path;
• Circuit breaker characteristics.

Also it is essential that the protection fully resets during the dead time, so that correct time
discrimination will be maintained after reclosure onto a fault. For high speed autoreclose
instantaneous reset of protection is required.
For highly interconnected systems synchronism is unlikely to be lost by the tripping out of a
single line. Here the best policy may be to adopt longer dead times, to allow time for power
swings on the system resulting from the fault to settle.
4.5.12 De-Ionising Time
The de-ionisation time of a fault arc depends on circuit voltage, conductor spacing, fault
current and duration, wind speed and capacitive coupling from adjacent conductors. As
circuit voltage is generally the most significant, minimum de-ionising times can be specified
as in the Table below.
NOTE: For single pole HSAR, the capacitive current induced from the healthy
phases can increase the time taken to de-ionise fault arcs.
Line Voltage (kV) Minimum De-Energisation Time (s)

66 0.1
110 0.15
132 0.17
220 0.28
275 0.3
400 0.5
TABLE 14 - MINIMUM FAULT ARC DE-IONISING TIME (THREE POLE TRIPPING)

MiCOM P441/P442 & P444 Page 151/220
Example Minimum Dead Time Calculation

The following circuit breaker and system characteristics are to be used:
• CB Operating time (Trip coil energised → Arc interruption): 50ms (a);
• CB Opening + Reset time (Trip coil energised → Trip mechanism reset): 200ms (b);
• Protection reset time: < 80ms (c);
• CB Closing time (Close command → Contacts make): 85ms (d).

De-ionising time for 220kV line:
• 280ms (e) for a three phase trip. (560ms for a single pole trip).
The minimum relay dead time setting is the greater of:
(a) + (c) = 50 + 80 = 130ms, to allow protection reset;
(a) + (e) - (d) = 50 + 280 - 85 = 245ms, to allow de-ionising (three pole);
= 50 + 560 - 85 = 525ms, to allow de-ionising (single pole).
In practice a few additional cycles would be added to allow for tolerances, so 3P Rcl - Dead
Time 1 could be chosen as ≥ 300ms, and 1P Rcl - Dead Time 1 could be chosen as ≥
600ms. The overall system dead time is found by adding (d) to the chosen settings, and
then subtracting (a). (This gives 335ms and 635ms respectively here).
4.5.13 Reclaim Timer Setting
A number of factors influence the choice of the reclaim timer, such as;
• Fault incidence/Past experience - Small reclaim times may be required where there
is a high incidence of recurrent lightning strikes to prevent unnecessary lockout for
transient faults.
• Spring charging time - For high speed autoreclose the reclaim time may be set
longer than the spring charging time. A minimum reclaim time of >5s may be needed
to allow the CB time to recover after a trip and close before it can perform another trip-
close-trip cycle. This time will depend on the duty (rating) of the CB. For delayed
autoreclose there is no need as the dead time can be extended by an extra CB
healthy check AR Inhibit Wind window time if there is insufficient energy in the CB.
• Switchgear Maintenance - Excessive operation resulting from short reclaim times can
mean shorter maintenance intervals.
• The Reclaim Time setting is always set greater than the tZ2 distance zone delay.
Page 152/220 MiCOM P441/P442 & P444
4.6 Circuit breaker state monitoring

An operator at a remote location requires a reliable indication of the state of the switchgear.
Without an indication that each circuit breaker is either open or closed, the operator has
insufficient information to decide on switching operations. The relay incorporates circuit
breaker state monitoring, giving an indication of the position of the circuit breaker, or, if the
state is unknown, an alarm is raised.
4.6.1 Circuit Breaker State Monitoring Features
MiCOM relays can be set to monitor normally open (52a) and normally closed (52b) auxiliary
contacts of the circuit breaker. Under healthy conditions, these contacts will be in opposite
states. Should both sets of contacts be open, this would indicate one of the following
conditions:
• Auxiliary contacts / wiring defective
• Circuit Breaker (CB) is defective
• CB is in isolated position
Should both sets of contacts be closed, only one of the following two conditions would apply:
• Auxiliary contacts / wiring defective
• Circuit Breaker (CB) is defective

If any of the above conditions exist, an alarm will be issued after a 5s time delay. A normally
open / normally closed output contact can be assigned to this function via the programmable
scheme logic (PSL). The time delay is set to avoid unwanted operation during normal
switching duties.
In the PSL CB AUX could be used or not, following the four options:
None
52A (1 or 3 optos if it is a single pole logic)
52B (1 or 3 optos)
Both 52A and 52B (2 optos or 6 optos)
Sol1: One opto used for 52a (3 poles breaker)
Sol2: One opto used for 52b (3 poles breaker)

MiCOM P441/P442 & P444 Page 153/220
Sol3: Two optos used for 52a & 52b (3 poles breaker)
Sol4: Three optos used for 52a (1 pole breaker)
Sol5: Three optos used for 52b (1 pole breaker)
Sol6: Six optos used for 52a &52b (1 pole breaker)
FIGURE 108 – DIFFERENTS OPTOS/CB AUX SCHEMES

Page 154/220 MiCOM P441/P442 & P444
Where ‘None’ is selected no CB status will be available. This will directly affect any function
within the relay that requires this signal, for example CB control, auto-reclose, etc. Where
only 52a is used on its own then the relay will assume a 52b signal from the absence of the
52a signal. Circuit breaker status information will be available in this case but no discrepancy
alarm will be available. The above is also true where only a 52b is used. If both 52a and 52b
are used then status information will be available and in addition a discrepancy alarm will be
possible, according to the following table. 52a and 52b inputs are assigned to relay opto-
isolated inputs via the PSL.
Auxiliary Contact Position CB State Detected Action

52a 52b
Open Closed Breaker Open Circuit breaker healthy
Closed Open Breaker Closed Circuit breaker healthy
Closed Closed CB Failure Alarm raised if the condition
persists for greater than 5s
Open Open State Unknown Alarm raised if the condition
persists for greater than 5s
Where single pole tripping is used (available on P442 and P444) then an open breaker
condition will only be given if all three phases indicate and open condition. Similarly for a
closed breaker condition indication that all three phases are closed must be given. For single
pole tripping applications 52a-A, 52a-B and 52a-C and/or 52b-A, 52b-B and 52b-C inputs
should be used.
With 52a&52b both present, the relay memorizes the last valid status of the 2 inputs
(52a=/52b). If no valid status is present (52a=52b) when the Alarm timer is issued
(value=150 msec), CBA_Status Alarm is activated. See Figure 109.
MiCOM P441/P442 & P444 Page 155/220
CNF_52b
CNF_52a
&
INP_52a_A &
S
Q
& R
INP_52b_A &
1 CBA_A
&
& & CBA_3P_C
xor
&
INP_52a_B &
S
Q 1 CBA_ANY
& R
INP_52b_B &
1 CBA_B
&
& & CBA_3P
xor
&
INP_52a_C & &
S
Q
& R
INP_52b_C &
1 CBA_C
&
CBA_Time_Alarm
& t
1 CBA_Status_Alarm
0
xor
150 ms
CBA_Time_Disc
1 t
INP_DISC CBA_Discrepancy
0
150 ms P0524ENa
FIGURE 109 - LOGICAL SCHEME OF CBAUX

CBA_A = Dead PoleA
CBA_B = Dead PoleB
CBA_C = Dead PoleC
CBA_3P_C = All Pole live
CBA_3P = All Pole Dead
CBA_ANY = Any Pole dead
CBA_Disc = Pole Discrepancy detection
INP_52a_A
INP_52a_A
CBA_A
CBA_STATUS_ALARM
P0525ENa
FIGURE 110 - NON COMPLEMENTARY OF 52a/52b NOT LONG ENOUGH FOR GETTING THE ALARM
Page 156/220 MiCOM P441/P442 & P444
INP_52a_A
INP_52b_A
CBA_A
CBA_STATUS_ALARM
P0526ENa
FIGURE 111 - COMPLEMENTARY OF 52a/52b IS LONG ENOUGH FOR GETTING THE ALARM
INP_52a_A
CBA_A
CBA_STATUS_ALARM
P0527ENa
FIGURE 112 - WITH ONE OPTO 52a- POLE DEAD LOGIC
INP_52b_A
CBA_A
CBA_STATUS_ALARM
P0528ENa
FIGURE 113 - WITH ONE OPTO 52b – POLE DEAD LOGIC

4.6.2 Inputs / outputs DDB for CB logic:
4.6.2.1 Inputs
External TripA
External TripB
External TripC
From External Protection Devices (via Opto Inputs)- see General trip logic Figure 94.
If these optos inputs are assigned as External Trip A, External Trip B and External Trip C
– their change will update the CB Operation counter.
(External trip is integrated in the DDB: Any Trip.No Dwell timer is associated as for an
internal trip. (see Figure 94: trip logic)
CB aux A(52a)
CB aux B(52a)
CB aux C(52a)
CB aux A(52b)
CB aux B(52b)
CB aux C(52b)
The DDB CB Aux if assigned to an opto input in the PSL and when energized, will be used
for Any pole dead & All pole dead internal logic & Discrepency logic
CB Discrepancy
Used for internal CBA_Disc issued by external (opto) or internal detection (CB Aux)
MiCOM P441/P442 & P444 Page 157/220
4.6.2.2 Outputs
CB Status Alarm
Picks up when CB Discrepancy status is detected after CBA timer issued externally by opto
or internally by CB Aux
CB aux A
CB aux B
CB aux C
Pole A+B+C detected Dead pole by internal logic or CB status
Any Pole Dead

The DDB Any Pole Dead if assigned in the PSL, indicates that one or more poles is open
All Pole Dead

The DDB All Pole Dead if assigned in the PSL, indicates that all pole are dead (All 3 poles
are open)
4.7 Circuit breaker condition monitoring
Periodic maintenance of circuit breakers is necessary to ensure that the trip circuit and
mechanism operate correctly, and also that the interrupting capability has not been
compromised due to previous fault interruptions. Generally, such maintenance is based on a
fixed time interval, or a fixed number of fault current interruptions. These methods of
monitoring circuit breaker condition give a rough guide only and can lead to excessive
maintenance.
The relays record various statistics related to each circuit breaker trip operation, allowing a
more accurate assessment of the circuit breaker condition to be determined. These
monitoring features are discussed in the following section.
4.7.1 Circuit Breaker Condition Monitoring Features
For each circuit breaker trip operation the relay records statistics as shown in the following
table taken from the relay menu. The menu cells shown are counter values only. The
Min/Max values in this case show the range of the counter values. These cells can not be
set:

Min Max
CB CONDITION
CB Operations 0 0 10000 1
{3 pole tripping}
CB A Operations 0 0 10000 1
{1 & 3 pole tripping}
CB B Operations 0 0 10000 1
CB C Operations 0 0 10000 1
Total IA Broken 0 0 25000In^ 1
Total IB Broken 0 0 25000In^ 1
Total IC Broken 0 0 25000In^ 1In^
CB Operate Time 0 0 0.5s 0.001
Reset All Values No Yes, No
Page 158/220 MiCOM P441/P442 & P444
The above counters may be reset to zero, for example, following a maintenance inspection
and overhaul.
The following table, detailing the options available for the CB condition monitoring, is taken
from the relay menu. It includes the setup of the current broken facility and those features
which can be set to raise an alarm or CB lockout.

Min Max
CB MONITOR SETUP Default Min Max Step
Broken I^ 2 1 2 0.1
I^ Maintenance Alarm Disabled Alarm Disabled, Alarm Enabled
I^ Maintenance 1000In^ 1In^ 25000In^ 1In^
I^ Lockout Alarm Disabled Alarm Disabled, Alarm Enabled
I^ Lockout 2000In^ 1In^ 25000In^ 1In^
N° CB Ops Maint Alarm Disabled Alarm Disabled, Alarm Enabled
N° CB Ops Maint 10 1 10000 1
N° CB Ops Lock Alarm Disabled Alarm Disabled, Alarm Enabled
N° CB Ops Lock 20 1 10000 1
CB Time Maint Alarm Disabled Alarm Disabled, Alarm Enabled
CB Time Maint 0.1s 0.005s 0.5s 0.001s
CB Time Lockout Alarm Disabled Alarm Disabled, Alarm Enabled
CB Time Lockout 0.2s 0.005s 0.5s 0.001s
Fault Freq Lock Alarm Disabled Alarm Disabled, Alarm Enabled
Fault Freq Count 10 0 9999 1
Fault Freq Time 3600s 0 9999s 1s
The circuit breaker condition monitoring counters will be updated every time the relay issues
a trip command.One counter is incremented by phase,.the highest counter value is
compared to two thresholds values settable (value n):
MiCOM P441/P442 & P444 Page 159/220
Maintenance Alarm or Lock Out Alarm can be generated.

A pre-lock out Alarm is generated at value n-1.
All counters can be re-initiated with the command Reset all values (by HMI)
In cases where the breaker is tripped by an external protection device it is also possible to
update the CB condition monitoring. This is achieved by allocating one of the relays opto-
isolated inputs (via the programmable scheme logic) to accept a trigger from an external
device. The signal that is mapped to the opto is called ‘External TripA or B or C’.
Note that when in Commissioning test mode the CB condition monitoring counters will not be
updated.
4.7.2 Setting guidelines
Setting the Σ I^ Thresholds

Where overhead lines are prone to frequent faults and are protected by oil circuit breakers
(OCB’s), oil changes account for a large proportion of the life cycle cost of the switchgear.
Generally, oil changes are performed at a fixed interval of circuit breaker fault operations.
However, this may result in premature maintenance where fault currents tend to be low, and
hence oil degradation is slower than expected. The Σ I^ counter monitors the cumulative
severity of the duty placed on the interrupter allowing a more accurate assessment of the
circuit breaker condition to be made.
For OCB’s, the dielectric withstand of the oil generally decreases as a function of Σ I2t. This
is where ‘I’ is the fault current broken, and ‘t’ is the arcing time within the interrupter tank (not
the interrupting time). As the arcing time cannot be determined accurately, the relay would
normally be set to monitor the sum of the broken current squared, by setting ‘Broken I^’ = 2.
For other types of circuit breaker, especially those operating on higher voltage systems,
practical evidence suggests that the value of ‘Broken I^’ = 2 may be inappropriate. In such
applications ‘Broken I^’ may be set lower, typically 1.4 or 1.5. An alarm in this instance may
be indicative of the need for gas/vacuum interrupter HV pressure testing, for example.
The setting range for ‘Broken I^’ is variable between 1.0 and 2.0 in 0.1 steps. It is
imperative that any maintenance programme must be fully compliant with the switchgear
manufacturer’s instructions.
4.7.3 Setting the Number of Operations Thresholds
Every operation of a circuit breaker results in some degree of wear for its components.
Thus, routine maintenance, such as oiling of mechanisms, may be based upon the number
of operations. Suitable setting of the maintenance threshold will allow an alarm to be raised,
indicating when preventative maintenance is due. Should maintenance not be carried out,
the relay can be set to lockout the autoreclose function on reaching a second operations
threshold. This prevents further reclosure when the circuit breaker has not been maintained
to the standard demanded by the switchgear manufacturer’s maintenance instructions.
Page 160/220 MiCOM P441/P442 & P444
Certain circuit breakers, such as oil circuit breakers (OCB’s) can only perform a certain
number of fault interruptions before requiring maintenance attention. This is because each
fault interruption causes carbonising of the oil, degrading its dielectric properties. The
maintenance alarm threshold (N° CB Ops Maint) may be set to indicate the requirement for
oil sampling for dielectric testing, or for more comprehensive maintenance. Again, the
lockout threshold (N° CB Ops Lock) may be set to disable autoreclosure when repeated
further fault interruptions could not be guaranteed. This minimises the risk of oil fires or
explosion.
4.7.4 Setting the Operating Time Thresholds
Slow CB operation is also indicative of the need for mechanism maintenance. Therefore,
alarm and lockout thresholds (CB Time Maint / CB Time Lockout) are provided and are
settable in the range of 5 to 500ms. This time is set in relation to the specified interrupting
time of the circuit breaker.
4.7.5 Setting the Excessive Fault Frequency Thresholds
A circuit breaker may be rated to break fault current a set number of times before
maintenance is required. However, successive circuit breaker operations in a short period of
time may result in the need for increased maintenance. For this reason it is possible to set a
frequent operations counter on the relay which allows the number of operations (Fault Freq
Count) over a set time period (Fault Freq Time) to be monitored. A separate alarm and
lockout threshold can be set.
4.7.6 Inputs/Outputs for CB Monitoring logic
4.7.6.1 Inputs
Reset Lock Out

Provides a reset of the CB monitoring lock out (all counters & values are reset)
Reset All Values

Provides a reset of the CB monitoring (all counters & values are reset)
4.7.6.2 Outputs
I^Maint Alarm
An alarm maintenance is issued when the maximum broken current (1st level) calculated by
the CB monitoring function is reached
I^Lock Out Alarm

An alarm Lock Out is issued when the maximum broken current (2nd level) calculated by the
monitoring function is reached
CB Ops Maint
An alarm is issued when the maximum of CB operations is reached [initiated by internal (any
protection function) or external trip (via opto)] (1st level:CB Ops Maint)
CB Ops Lockout
An alarm is issued when the maximum of CB operations is reached [initiated by internal or
external trip] (2nd level:CB Ops Lock)
CB Op Time Maint
An alarm is issued when the operating tripping time on any phase pass over the CB Time
Maint adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic)
CB Op Time Lock
An alarm is issued when the operating tripping time on any phase pass over the CB Time
Lockout adjusted in MiCOM S1 (slowest pole detection calculated by I< from CB Fail logic)
MiCOM P441/P442 & P444 Page 161/220
FF Pre Lockout
An alarm is issued at (n-1) value in the counters of Main lock out or Fault frequency
FF Lock
An alarm is issued at (n) value in the counters of Main lock out or Fault frequency
Lockout Alarm
An alarm is issued with: CBC Unhealthy or CBC No check sync or CBC Fail to close or CBC
fail to trip or FF Lock or CB Op Time Lock or CB Ops Lock
4.8 Circuit Breaker Control
The relay includes the following options for control of a single circuit breaker:
• Local tripping and closing, via the relay menu
• Local tripping and closing, via relay opto-isolated inputs
• Remote tripping and closing, using the relay communications

It is recommended that separate relay output contacts are allocated for remote circuit
breaker control and protection tripping. This enables the control outputs to be selected via a
local/remote selector switch as shown in Figure 114. Where this feature is not required the
same output contact(s) can be used for both protection and remote tripping.
Protection + ve
trip
Remote
control
trip Trip
0
Remote close
control
close
Local
Remote
Trip Close
ve
P3078ENa
FIGURE 114 - REMOTE CONTROL OF CIRCUIT BREAKER

The following table is taken from the relay menu and shows the available settings and
commands associated with circuit breaker control. Depending on the relay model some of
the cells may not be visible:
Page 162/220 MiCOM P441/P442 & P444

Min Max
CB CONTROL
CB Control by Disabled Disabled, Local, Remote, Local+Remote,
Opto, Opto+local, Opto+Remote,
Opto+Rem+local
Close Pulse Time 0.5s 0.1s 10s 0.01s
Trip Pulse Time 0.5s 0.1s 5s 0.01s
Man Close Delay 10s 0.01s 600s 0.01s
Healthy Window 5s 0.01s 9999s 0.01s
C/S Window 5s 0.01s 9999s 0.01s
A/R Single Pole Disabled Disabled, Enabled
{1&3 pole A/R only} {Refer to Autoreclose notes for further
information}
A/R Three Pole Disabled Disabled, Enabled
{Refer to Autoreclose notes for further
information}
If AR Enable in MiCOM S1 (2 additive lines):
(*) For P442 – P444 only

WARNING: Must be enabled for validating the AR function (if TPAR/SPAR optos are
assigned in the PSL, these inputs have a higher priority from the MiCOM S1
settings).
The AR single and three poles mode could be enabled in the menu "CB
control" via MiCOM S1 or by the front panel.
However, if the DDB signals TPAR/SPAR have been assigned in the PSL,
these both inputs have a higher priority and depending of their status, will
enable/disable the single or three poles AR function independing of the
MiCOM S1 or front LCD settings.
Remark: If TPAR is disable, the Dead Time 2 is not used when SPAR logic
manages only 1PAR.
MiCOM P441/P442 & P444 Page 163/220
SUP_Trip_Loc
&
1
CBC_Local_Control
&
SUP_Close_Loc
SUP_Trip_Rem
&
CBC_Remote_Control
&
SUP_Close_Rem
INP_CB_Trip_Man
&
CBC_Input_Control
1
&
INP_CB_Man
& S CBC_Trip_Pulse
CBA_3P_C
Q CBC_Trip_3P
1
R
t
0 &
CBC_Failed_To_Trip
CBA_3P
CBA_Status_Alarm
& S
Q CBC_Close_In_Progress
AR_Cycle_1P R
1
INP_AR_Cycle_1P t
0
1
AR_Cycle_3P 1 CBC_Delay_Close
INP_AR_Cycle_3P & S
Q
CBA_3P R
CBA_Disc
TRIP_Any
1
INP_AR_Close
AR_Close 1 & CBC_ Fail_To_Close

t
0
R
Q CBC_Recl_3P
S CBC_Close_Pulse
CBA_Any
&
INP_CB_Healthy
CBC_Healthy_Window
t
0 & CBC_UnHeathly
CBC_CS_Window
t
0 & CBC_No_Check_Syn
SYNC
P0529ENa
FIGURE 115 - CB CONTROL LOGIC

A manual trip will be authorised if the circuit breaker has been initially closed. Likewise, a
close command can only be issued if the CB is initially open.
Therefor it will be necessary to use the breaker positions 52a and/or 52b contacts via PSL. If
no CB auxiliary contacts are available no CB control (manual or auto) will be possible. (See
the different solutions proposed in the CBAux logic section 4.6.1)
Once a CB Close command is initiated the output contact can be set to operate following a
user defined time delay (‘Man Close Delay’). This would give personnel time to move away
from the circuit breaker following the close command. This time delay will apply to all manual
CB Close commands.
Page 164/220 MiCOM P441/P442 & P444
The length of the trip or close control pulse can be set via the ‘ManualTrip Pulse Time’ and
‘Close Pulse Time’ settings respectively. These should be set long enough to ensure the
breaker has completed its open or close cycle before the pulse has elapsed.
NOTE : The manual close commands for each user interface are found in the
System Data column of the menu.
If an attempt to close the breaker is being made, and a protection trip signal is generated,
the protection trip command overrides the close command.
Where the check synchronism function is set, this can be enabled to supervise manual
circuit breaker close commands. A circuit breaker close output will only be issued if the
check synchronism criteria are satisfied. A user settable time delay is included (‘C/S
Window’) for manual closure with check synchronising. If the checksynch criteria are not
satisfied in this time period following a close command the relay will lockout and alarm.
In addition to a synchronism check before manual reclosure there is also a CB Healthy
check if required. This facility accepts an input to one of the relays opto-isolators to indicate
that the breaker is capable of closing (circuit breaker energy for example). A user settable
time delay is included (‘Healthy Window’) for manual closure with this check. If the CB does
not indicate a healthy condition in this time period following a close command then the relay
will lockout and alarm.
Where auto-reclose is used it may be desirable to block its operation when performing a
manual close. In general, the majority of faults following a manual closure will be permanent
faults and it will be undesirable to auto-reclose. The "man close" input without CB Control
selected OR the "CBClose in progress" with CB control enabled: will initiate the SOTF logic
for which auto-reclose will be disabled following a manual closure of the breaker during
500msec (see SOTF logic in section 2.12.1, Figure 35).
If the CB fails to respond to the control command (indicated by no change in the state of CB
Status inputs) a ‘CB Fail Trip Control’ or ‘CB Fail Close Control’ alarm will be generated
after the relevant trip or close pulses have expired. These alarms can be viewed on the relay
LCD display, remotely via the relay communications, or can be assigned to operate output
contacts for annunciation using the relays programmable scheme logic (PSL).
CBA_3P_C
SUP_Trip OR
INP_CB_Trip_Man
0.1 to 5 Sec
CBC_Trip_3P
CBC_Failed_To_Trip
P0560ENa
FIGURE 116 - STATUS OF CB IS INCORRECT CBA3P C (3POLES ARE CLOSED) STAYS – AN ALARM
IS GENERATED “CB FAIL TO TRIP” (SEE ALSO FIGURE 109 & FIGURE 115)
MiCOM P441/P442 & P444 Page 165/220
CBA_3P
SUP_Close OR
INP_CB_Man
CBC_Close_In_Progress
0 to 60 Sec
0.1 to 10 Sec
CBC_Recl_3P
CBC_ Fail_To_Close
P0561ENa
FIGURE 117 - STATUS OF CB IS INCORRECT CBA3P (3POLES ARE OPENED) STAYS – AN ALARM IS
GENERATED “CB FAIL TO CLOSE” (SEE ALSO FIGURE 109 & FIGURE 115)
Note that the ‘Healthy Window’ timer and ‘C/S Window’ timer set under this menu section are
applicable to manual circuit breaker operations only. These settings are duplicated in the
Auto-reclose menu for Auto-reclose applications.
The ‘Lockout Reset’ and ‘Reset Lockout by’ setting cells in the menu are applicable to CB
Lockouts associated with manual circuit breaker closure, CB Condition monitoring (Number
of circuit breaker operations, for example) and auto-reclose lockouts.
4.9 Event Recorder
The relay records and time tags up to 250 events and stores them in non-volatile (battery
backed up – installed behind the plastic cover in front panel of the relay)) memory. This
enables the system operator to establish the sequence of events that occurred within the
relay following a particular power system condition, switching sequence etc. When the
available space is exhausted, the oldest event is automatically overwritten by the new one
(First in first out).
The real time clock within the relay provides the time tag to each event, to a resolution of
1ms.
The event records are available for viewing either via the frontplate LCD or remotely, via the
communications ports or via MiCOM S1 with a PC. connected to the relay (event extracted
from relay & loaded in PC):
1. Established the communication [ Device\open connection\address (always1 by serial
front port\Password (AAAA) ]
FIGURE 118
2. Select the extraction of events:
Page 166/220 MiCOM P441/P442 & P444
3. Events must be listed, identified (file named) & Stored
Local viewing on the LCD is achieved in the menu column entitled ‘VIEW RECORDS’. This
column allows viewing of event, fault and maintenance records and is shown below:-
VIEW RECORDS
LCD Reference Description
Select Event Setting range from 0 to 249.
This selects the required event record from the possible 250 that
may be stored. A value of 0 corresponds to the latest event and so
on.
Time & Date Time & Date Stamp for the event given by the internal Real Time
Clock
Event Text Up to 32 Character description of the Event (refer to following
sections)
Event Value Up to 32 Bit Binary Flag or integer representative of the Event
(refer to following sections)
Select Fault Setting range from 0 to 4.
This selects the required fault record from the possible 5 that may
be stored. A value of 0 corresponds to the latest fault and so on.
The following cells show all the fault flags, protection starts,
protection trips, fault location, measurements etc. associated with
the fault, i.e. the complete fault record.
Select Report Setting range from 0 to 4.
This selects the required maintenance report from the possible 5
that may be stored. A value of 0 corresponds to the latest report
and so on.
Report Text Up to 32 Character description of the occurrence (refer to following
sections)
Report Type These cells are numbers representative of the occurrence. They
form a specific error code which should be quoted in any related
correspondence to AREVA T&D.
Report Data
Reset Indication Either Yes or No. This serves to reset the trip LED indications
provided that the relevant protection element has reset.
For extraction from a remote source via communications, refer to Chapter P44x/EN CM,
(Commissioning) where the procedure is fully explained.
Note that a full list of all the event types and the meaning of their values is given in chapter
P44x/EN GC (Configurations Mapping).
MiCOM P441/P442 & P444 Page 167/220
Types of Event
An event may be a change of state of a control input or output relay, an alarm condition,
setting change etc. The following sections show the various items that constitute an event:-
FIGURE 119 - FILE\OPEN\EVENTS FILE

4.9.1 Change of state of opto-isolated inputs.
If one or more of the opto (logic) inputs has changed state since the last time that the
protection algorithm ran, the new status is logged as an event. When this event is selected to
be viewed on the LCD, three applicable cells will become visible as shown below;
Time & Date of Event

“LOGIC INPUTS”
“Event Value
0101010101010101”
The Event Value is an 8 or 16 bit word showing the status of the opto inputs, where the least
significant bit (extreme right) corresponds to opto input 1 etc. The same information is
present if the event is extracted and viewed via PC.
4.9.2 Change of state of one or more output relay contacts.
If one or more of the output relay contacts has changed state since the last time that the
protection algorithm ran, then the new status is logged as an event. When this event is
selected to be viewed on the LCD, three applicable cells will become visible as shown below;
Time & Date of Event

“OUTPUT CONTACTS”
“Event Value
010101010101010101010”
The Event Value is a 7, 14 or 21 bit word showing the status of the output contacts, where
the least significant bit (extreme right) corresponds to output contact 1 etc. The same
information is present if the event is extracted and viewed via PC.
Page 168/220 MiCOM P441/P442 & P444
4.9.3 Relay Alarm conditions.

Any alarm conditions generated by the relays will also be logged as individual events. The
following table shows examples of some of the alarm conditions and how they appear in the
event list:-
Alarm Condition Resulting Event

Event Text Event Value
Battery Fail Battery Fail ON/OFF Number from 0 to 31
Field Voltage Fail Field V Fail ON/OFF Number from 0 to 31
Setting group via opto invalid Setting Grp Invalid ON/OFF Number from 0 to 31
Protection Disabled Prot'n Disabled ON/OFF Number from 0 to 31
Frequency out of range Freq out of Range ON/OFF Number from 0 to 31
VTS Alarm VT Fail Alarm ON/OFF Number from 0 to 31
CB Trip Fail Protection CB Fail ON/OFF Number from 0 to 31
The previous table shows the abbreviated description that is given to the various alarm
conditions and also a corresponding value between 0 and 31. This value is appended to
each alarm event in a similar way as for the input and output events previously described. It
is used by the event extraction software, such as MiCOM S1, to identify the alarm and is
therefore invisible if the event is viewed on the LCD. Either ON or OFF is shown after the
description to signify whether the particular condition has become operated or has reset.
4.9.4 Protection Element Starts and Trips
Any operation of protection elements, (either a start or a trip condition), will be logged as an
event record, consisting of a text string indicating the operated element and an event value.
Again, this value is intended for use by the event extraction software, such as MiCOM S1,
rather than for the user, and is therefore invisible when the event is viewed on the LCD.
4.9.5 General Events
A number of events come under the heading of ‘General Events’ - an example is shown
below:-
Nature of Event Displayed Text in Event Record Displayed Value

Level 1 Password Modified PW1 Edited UI, F or R 0
Either from User Interface,
Front or Rear Port
A complete list of the ‘General Events’ is given in chapter P44x/EN GC.

MiCOM P441/P442 & P444 Page 169/220
4.9.6 Fault Records

Each time a fault record is generated, an event is also created. The event simply states that
a fault record was generated, with a corresponding time stamp.
Note that viewing of the actual fault record is carried out in the ‘Select Fault’ cell further down
the ‘VIEW RECORDS’ column, which is selectable from up to 5 records. These records
consist of fault flags, fault location, fault measurements etc. Also note that the time stamp
given in the fault record itself will be more accurate than the corresponding stamp given in
the event record as the event is logged some time after the actual fault record is generated.
4.9.7 Maintenance Reports
Internal failures detected by the self monitoring circuitry, such as watchdog failure, field
voltage failure etc. are logged into a maintenance report. The Maintenance Report holds up
to 5 such ‘events’ and is accessed from the ‘Select Report’ cell at the bottom of the ‘VIEW
RECORDS’ column.
Each entry consists of a self explanatory text string and a ‘Type’ and ‘Data’ cell, which are
explained in the menu extract at the beginning of this section and in further detail in
Appendix A.
Each time a Maintenance Report is generated, an event is also created. The event simply
states that a report was generated, with a corresponding time stamp.
Error codes are in hexadecimal format and must be recalculated in decimal format to check
with the table in chapter P44x/EN GC.
4.9.8 Setting Changes
Changes to any setting within the relay are logged as an event. Two examples are shown in
the following table:
Type of Setting Change Displayed Text in Event Record Displayed Value

Control/Support Setting C & S Changed 0
Group 1 Change Group 1 Changed 1
NOTE: Control/Support settings are communications, measurement, CT/VT

ratio settings etc, which are not duplicated within the four setting
groups. When any of these settings are changed, the event record is
created simultaneously. However, changes to protection or
disturbance recorder settings will only generate an event once the
settings have been confirmed at the ‘setting trap’.
4.9.9 Resetting of Event / Fault Records
If it is required to delete either the event, fault or maintenance reports, this may be done from
within the ‘RECORD CONTROL’ column.
Page 170/220 MiCOM P441/P442 & P444
4.9.10 Viewing Event Records via MiCOM S1 Support Software

When the event records are extracted and viewed on a PC they look slightly different than
when viewed on the LCD. The following shows an example of how various events appear
when displayed using MiCOM S1:-
− Monday 03 November 1998 15:32:49 GMT I>1 Start ON 2147483881

AREVA : MiCOM
Model Number: P441
Address: 001 Column: 00 Row: 23
Event Type: Protection operation
− Monday 03 November 1998 15:32:52 GMT Fault Recorded 0

AREVA : MiCOM
Model Number: P441
Event Type: Fault record
− Monday 03 November 1998 15:33:11 GMT Logic Inputs 00000000

AREVA : MiCOM
Model Number: P441
Event Type: Logic input changed state
− Monday 03 November 1998 15:34:54 GMT Output Contacts 0010000

AREVA : MiCOM
Model Number: P441
Event Type: relay output changed state
As can be seen, the first line gives the description and time stamp for the event, whilst the
additional information that is displayed below may be collapsed via the +/- symbol.
For further information regarding events and their specific meaning, refer to chapter
P44x/EN GC.
MiCOM P441/P442 & P444 Page 171/220
FIGURE 120
4.10 Disturbance recorder
The integral disturbance recorder has an area of memory specifically set aside for record
storage. The number of records that may be stored is dependent upon the selected
recording duration but the relays typically have the capability of storing a minimum of 20
records, each of 10.5 second duration.
NOTE: 1. Compressed Disturbance Recorder used for Kbus/Modbus/DNP3
reach that typical size value (10.5 sec duration)
2. Uncompressed Disturbance Recorder used for IEC 60870-5/103
could be limited to 2 or 3 secondes.
Disturbance records continue to be recorded until the available memory is exhausted, at
which time the oldest record(s) are overwritten to make space for the newest one.
The recorder stores actual samples which are taken at a rate of 24 samples per cycle.
Each disturbance record consists of eight analogue data channels and thirty-two digital data
channels. Note that the relevant CT and VT ratios for the analogue channels are also
extracted to enable scaling to primary quantities).
Page 172/220 MiCOM P441/P442 & P444
The ‘DISTURBANCE RECORDER’ menu column is shown below:

Min Max
DISTURB RECORDER
Duration 1.5s 0.1s 10.5s 0.01s
Trigger Position 33.3% 0 100% 0.1%
Trigger Mode Single Single or Extended
Analog Channel 1 VA VA, VB, VC, IA, IB, IC, IN
Analog Channel 2 VB VA, VB, VC, IA, IB, IC, IN
Analog Channel 3 VC VA, VB, VC, IA, IB, IC, IN
Analog Channel 4 VN VA, VB, VC, IA, IB, IC, IN
Analog Channel 5 IA VA, VB, VC, IA, IB, IC, IN
Analog Channel 6 IB VA, VB, VC, IA, IB, IC, IN
Analog Channel 7 IC VA, VB, VC, IA, IB, IC, IN
Analog Channel 8 IN VA, VB, VC, IA, IB, IC, IN
Digital Inputs 1 to 32 Relays 1 to 14/21 Any of 14 or 21 O/P Contacts
and or
Opto’s 1 to 8/16 Any of 8 or 16 Opto Inputs
or
Internal Digital Signals
Inputs 1 to 32 Trigger No Trigger except No Trigger, Trigger L/H, Trigger H/L
Dedicated Trip
Relay O/P’s which
are set to Trigger
L/H
Note
The available analogue and digital signals may differ between relay types and models and
so the individual courier database in Appendix should be referred to when determining
default settings etc.
The pre and post fault recording times are set by a combination of the ‘Duration’ and ‘Trigger
Position’ cells. ‘Duration’ sets the overall recording time and the ‘Trigger Position’ sets the
trigger point as a percentage of the duration. For example, the default settings show that the
overall recording time is set to 1.5s with the trigger point being at 33.3% of this, giving 0.5s
pre-fault and 1s post fault recording times.
If a further trigger occurs whilst a recording is taking place, the recorder will ignore the trigger
if the ‘Trigger Mode’ has been set to ‘Single’. However, if this has been set to ‘Extended’, the
post trigger timer will be reset to zero, thereby extending the recording time.
As can be seen from the menu, each of the analogue channels is selectable from the
available analogue inputs to the relay. The digital channels may be mapped to any of the
opto isolated inputs or output contacts, in addition to a number of internal relay digital
signals, such as protection starts, LED’s etc. The complete list of these signals may be found
by viewing the available settings in the relay menu or via a setting file in MiCOM S1. Any of
the digital channels may be selected to trigger the disturbance recorder on either a low to
high or a high to low transition, via the ‘Input Trigger’ cell. The default trigger settings are that
any dedicated trip output contacts (e.g. relay 3) will trigger the recorder.
MiCOM P441/P442 & P444 Page 173/220
FIGURE 121
Trigger choices:
(Minimum one trigger condition must be present ; for providing Drec file.)
It is not possible to view the disturbance records locally via the LCD; they must be extracted
using suitable software such as MiCOM S1. This process is fully explained in Chapter 6.
(Events or Disturbances can be extracted)

This message is displayed if the memory is empty (control in that case the trigger condition):
Page 174/220 MiCOM P441/P442 & P444
After extraction the Drec file can be displayed by the viewer integrated in MiCOM S1(See
Commissioning test section – chap CT)
Click down to select :

MiCOM P441/P442 & P444 Page 175/220
5. NEW ADDITIONAL FUNCTIONS – VERSION B1.X

5.1 Maximum of Residual Power Protection – Zero Sequence Power Protection
5.1.1 Function description
The aim of protection is to provide the system with selective and autonomous protection
against resistive Phase to ground faults. High resistive faults such as vegetation fires cannot
be detected by distance protection.
When a phase to ground fault occurs, the fault can be considered as a zero-sequence power
generator. Zero-sequence voltage is at maximum value at the fault point. Zero-sequence
power is, therefore, also at maximum value at the same point. Supposing that zero-
sequence current is constant, zero-sequence power will decrease along the lines until null
value at the source’s neutral points (see below).
PA PB
Z os1 x . Zol (1-x).Zol Z os2
P3100XXa
With: Zos1: Zero-sequence source side 1 impedance of

Zol: Zero-sequence line impedance
Zos2: Zero-sequence source side2 impedance of
x: Distance to the fault From PA
Po Vo
1 1
0,5 0,5
0 0
PA Fault PB
P3101ENa
Selective fault clearance of the protection for forward faults is provided by the power
measurement combined with a time-delay inversely proportional to the measured power.
The protection does not send any trip commands for reverse faults.
In compliance with sign conventions (the zero-sequence power flows from the fault towards
the sources) and with a mean characteristic angle of the zero-sequence source impedances
of the equal to 75°, the measured power is determined by the following formula:
Sr = Vrr.m.s x Irr.m.s x cos(ϕ - ϕ0)
With: ϕ: Phaseshift between Vr and Ir
ϕ0: 255° or – 75°

Vrr.m.s, Irr.m.s: R.M.S values of the residual voltage and current
The Vr and Ir values are filtered in order to eliminate the effect of the 3rd and 5th harmonics.
Page 176/220 MiCOM P441/P442 & P444
Sr > Po Fixed Time

Delay
P3837ENa
3-pole trip is sent out when the residual power threshold “Residual Power" is overshot, after
a time-delay "Basis Time Delay" and a IDMT time-delay adjusted by the “K” time delay
factor.
The basis time-delay is set at a value greater than the 2nd stage time of the distance
protection of the concerned feeder if the 3-pole trip is active, or at a value greater than the
single-phase cycle time if single-pole autorecloser shots are active.
The IDMT time-delay is determined by the following formula:
T(s) = K x (Sref/Sr)
With: K: Adjustable time constant from 0 to 2sec (Time delay factor)
Sref: Reference residual power at:
10 VA for In = 1A
50 VA for In = 5A
Sr: Residual power generated by the fault
The following chart shows the adjustment menu for the zero-sequence residual overcurrent
protection, the adjustment ranges and the default in-factory adjustments.

Min Max
Group1
ZERO-SEQ. POWER
Zero Seq. Power Status Activated Activated / Disabled N/A
K Time Delay Factor 0 0 2 0.2
Basis Time Delay 1sec 0sec 10sec 0.01sec
Residual Current 0.1 x In 0.05 x In 1 x In 0.01 x In
Po threshold 510mVA 300mVA 6.0VA 30.0mVA
MiCOM P441/P442 & P444 Page 177/220
5.1.2 Settings & DDB cells assigned to zero sequence power (ZSP) function
DDB cell INPUT associated:
The ZSP TIMER BLOCK cell if assigned to an opto input in a

dedicated PSL , Zero Sequence Power function will start, but will not perform a trip
command - the associated timer will be blocked
DDB cell OUTPUT associated:
The ZSP START cell at 1 indicates that the Zero Sequence

Power function has started - in the same time, it indicates that the timers associated have
started and are running (fixed one first and then IDMT timer)
The ZSP TRIP cell at 1 indicates that the Zero Sequence Power
function has performed a trip command (after the start and when associated timers are
issued)
Page 178/220 MiCOM P441/P442 & P444
5.2 Capacitive Voltage Transformers Supervision (CVT)

5.2.1 Function description
This CVT supervision will detect the degradation of one or several capacitors of voltage
dividers. It is based on permanent detection of residual voltage.
A “CVT fault” signal is sent out, after a time-delay T which can be set at between 0 and 300
seconds, if the conditions are as follows:
• The residual voltage is greater than the setting threshold during a delay greater then T
• The 3 phase-phase voltages have a value greater than 0.4 Un
Vab(t) Vab(t) > 0,8*Vn

S
Q
Vab(t) < 0,4*Vn R
Vbc(t) Vbc(t) > 0,8*Vn

S
Q
Vbc(t) < 0,4*Vn R
Vca(t) Vca(t) > 0,8*Vn

S
&T T
TCTs - Alarm
Q
Vca(t) < 0,4*Vn R
Vr(t) Vr(t) > SVr

P3102ENa
FIGURE 122 - BASIC CVT SUPERVISION DIAGRAM

The table below shows the CVT supervision settings menu, settings range and the default in-
factory settings.

Min Max
Group1
SUPERVISION
CVTS Status Activated Activated / Disabled N/A
CVTS VN> 1sec 0.5sec 22sec 0.5
CVTS Time Delay 100sec 0sec 300sec 0.01sec
MiCOM P441/P442 & P444 Page 179/220
5.2.2 Settings & DDB cells assigned to Capacitive Voltage Transformers Supervision (CVT)
function
FIGURE 123 - FOR ENABLING THE FUNCTION
FIGURE 124 – SETTINGS

DDB cell OUTPUT associated:
The CVT ALARM cell at 1 indicates that the residual voltage is

greater than the threshold adjusted in the settings, during a delay greater than the timer
adjusted in MiCOM S1. That alarm is also included in the general alarm.
Page 180/220 MiCOM P441/P442 & P444
6. PROGRAMMABLE SCHEME LOGIC DEFAULT SETTINGS

The relay includes programmable scheme logic (PSL)- one PSL by Group of settings
enabled (maximum 4 groups of PSLogic can be assigned in the relay)
The purpose of this logic is multi-functional and includes the following:
• Enables the mapping of opto-isolated inputs, relay output contacts and the
programmable LED’s.
• Provides relay output conditioning (delay on pick-up/drop-off, dwell time, latching or

self-reset).
• Fault Recorder start mapping, i.e. which internal signals initiate a fault record.
• Enables customer specific scheme logic to be generated through the use of the PSL
editor inbuilt into the MiCOM S1 support software.
Further information regarding editing and the use of PSL can be found in the MiCOM S1
user manual. The following section details the default settings of the PSL. Note that
changes to these defaults can only be carried out using the PSL editor and not via the relay
front-plate.
6.1 HOW TO USE PSL Editor?
OFF Line method:
− Open first the application free software delivered with the relay : MiCOM S1 (can be
also downloaded from the web)
− Open the PSL Editor part.
− Open a blancking scheme or a default scheme with the good model number
(File\New\Default Scheme or Blanck Scheme)
Selection of type of relay & model number is done in that window (Version software is
displayed for compatibility ) – Italian is available with model ?40X?
ON Line method:
− Communication with the relay can be started (Device\open

connection\address1\pword AAAA) and the PSL activated in the internal logic of the
relay can be extracted, displayed, modified and loaded again in the protection.
MiCOM P441/P442 & P444 Page 181/220
− Any group from 1 to 4 can be modified (ref of group must be validated before
resenting the file from PC to relay)
Before creating a dedicated PSL for covering customized application ; please refer to the
DDB description cell by cell (conditions of set & reset) in the table included in the annex A at
the end of that technical guide.
Some additive cells can be present regarding the type of model used by the software
embedded in the relay.
Software Version Model N°

A2.11 04
A3.3 06
A4.5 07
B1.2 09
The type of model used by the relay in the settings or PSL is displayed in the bottom of your
screen by that line:
and will inform about the :
− Model number used (last 2 digits:???07??)
− PSL activated for the logic of Group1
− Number of timers still available (15 on a total of 16)
− Number of contacts still available (7 on a total of 21 for P442 model)
− Number of leds still available (0 on 8 – if all already assigned in the PSL)
− Memory Capacity still available (decrease with the numbers of cells & logical gates
linked in the dedicated PSL)
(See also the section commissioning for deeper tools explanations)
Page 182/220 MiCOM P441/P442 & P444
6.2 Logic input mapping

The default mappings for each of the opto-isolated inputs are as shown in the following table:
− Version A : Optos are in 48VDC polarised (can be energised with the internal field
voltage offered by the relay (–J7/J9-J8/J10 in a P441)
− Version B : Optos are universal and opto range can be selected in MiCOM S1 by:
Opto A - 48VDC:
The opto inputs are specified to operate between 30 and 60V to ensure there is enough
current flowing through the opto diode to guarantee operation with component tolerances,
temperature and CTR degradation over time.
Between 13-29V is the uncertainty band.
Below 12V, logical status is guaranteed Off
Opto B – Universal opto inputs:
Setting Guaranteed No Operation Guaranteed Operation

24/27 <16,2 >19,2
30/34 <20,4 >24,0
48/54 <32,4 >38,4
110/125 <75,0 >88,0
220/250 <150 >176,0
These margins ensure that ground faults on substation batteries do not create mal-operation
of the opto inputs.
Or “Custom” can be selected in the menu to offer the possibility to adjust a different voltage
pick-up for any optos inputs:
MiCOM P441/P442 & P444 Page 183/220

Page 184/220 MiCOM P441/P442 & P444
Opto
Input P441 Relay P442 Relay P444 Relay
N°
1 Channel Receive (Distance Channel Receive (Distance Channel Receive (Distance
or DEF) or DEF) or DEF)
2 Channel out of Service Channel out of Service Channel out of Service
(Distance or DEF) (Distance or DEF) (Distance or DEF)
3 MCB/VTS Line MCB/VTS Line MCB/VTS Line
(Z measurement-Dist) (Z measurement-Dist) (Z measurement-Dist)
4 Block Block Block
Autoreclose(LockOut) Autoreclose(LockOut) Autoreclose(LockOut)
5 Circuit Breaker Healthy Circuit Breaker Healthy Circuit Breaker Healthy
6 Circuit breaker Manual Circuit breaker Manual Circuit breaker Manual
Close external order Close external order Close external order
7 Reset Lockout Reset Lockout Reset Lockout
8 Disable Autoreclose (1pole Disable Autoreclose (1- Disable Autoreclose (1-
and 3poles) pole and 3poles) pole and 3poles)
9 Not allocated Not allocated
17 Not allocated
18 Not allocated
19 Not allocated
20 Not allocated
21 Not allocated
22 Not allocated
23 Not allocated
24 Not allocated
MiCOM P441/P442 & P444 Page 185/220
6.3 Relay output contact mapping

The default mappings for each of the relay output contacts are as shown in the following
table (PSL are equivalent for P441/442/444):-
Relay
Contact P441 Relay P442 Relay P444 Relay
N°
1 TripA+B+C & Z1 TripA+B+C & Z1 TripA+B+C & Z1
2 Any Trip Phase A Any Trip Phase A Any Trip Phase A
3 Any Trip Phase B Any Trip Phase B Any Trip Phase B
4 Any Trip Phase C AnyTrip Phase C Any Trip Phase C
5 Signal send (Dist. or DEF) Signal send (Dist. or DEF) Signal send (Dist. or DEF)
6 Any Protection Start Any Protection Start Any Protection Start
7 Any Trip Any Trip Any Trip
8 General Alarm General Alarm General Alarm
9 DEF A+B+C Trip DEF A+B+C Trip DEF A+B+C Trip
+ IN>1Trip + IN>1Trip + IN>1Trip
+ IN>2Trip + IN>2Trip + IN>2Trip
10 Dist. Trip &Any Dist. Trip &Any Dist. Trip &Any
Zone&DistUnb CR Zone&DistUnb CR Zone&DistUnb CR
11 Autoreclose lockout Autoreclose lockout Autoreclose lockout
12 Autoreclose 1P+3P cycle Autoreclose 1P+3P cycle Autoreclose 1P+3P cycle
in progress in progress in progress
13 A/R Close A/R Close A/R Close
14 Power Swing Detected Power Swing Detected Power Swing Detected
23 Not allocated
24 Not allocated
25 Not allocated
26 Not allocated
27 Not allocated
28 Not allocated
29 Not allocated
30 Not allocated
31 Not allocated
32 Not allocated
Note that when 3 pole tripping is selected in the relay menu, all trip contacts: Trip A, Trip B,
Trip C, and Any Trip close simultaneously.
Page 186/220 MiCOM P441/P442 & P444
6.4 Relay output conditioning

The default conditioning for each of the relay output contacts are as shown in the following
table:
Relay
Contact P441 Relay P442 Relay P444 Relay
N°
1 Straight Straight Straight
23 Not allocated
24 Not allocated
25 Not allocated
26 Not allocated
27 Not allocated
28 Not allocated
29 Not allocated
30 Not allocated
31 Not allocated
32 Not allocated
NOTE: Others conditions of relays logic are available in the relays design by
PSL.
Pulse Timer
Pick UP/Drop Off Timer
Dwell Timer
Pick Up Timer
Drop Off Timer
Latching
Straight (Transparent)
MiCOM P441/P442 & P444 Page 187/220
Input
Output Pulse setting
Pulse Timer Input
Output Pulse setting
Input
Pick Up/ Output Tp setting Td setting
Drop Off Timer Input

Output Tp setting Td setting
Input
Output Timer setting
Dwell Timer Input
Input
Timer setting
Output
Pick Up Timer Input
Timer setting
Output
Input
Drop Off Timer Input

Timer setting
Output
P0562ENa
FIGURE 125 – TIMER DEFINITION IN PSL

Page 188/220 MiCOM P441/P442 & P444
6.5 Programmable led output mapping

The default mappings for each of the programmable LED’s are as shown in the following
table:-
LED P441 Relay P442 Relay P444 Relay

N°
1 Any Trip A Any Trip A Any Trip A
2 Any Trip B AnyTrip B Any Trip B
3 Any Trip C AnyTrip C Any Trip C
4 Any Start Any Start Any Start
5 Z1+Aided Trip Z1+Aided Trip Z1+Aided Trip
6 Dist FWd Dist Fwd Dist Fwd
7 Dist Rev Dist Rev Dist Rev
8 A/R Enable A/R Enable A/R Enable
NOTE: All the Leds are latched in the default PSL

6.6 Fault recorder trigger
The default PSL trigger which initiates a fault record is as shown in the following table:-
P441 Relay P442 Relay P444 Relay

Any Start Any Start Any Start
Any Trip Any Trip Any Trip
FIGURE 126
If the fault recorder trigger is not assigned in the PSL, no Fault recorder can be initiated and
displayed in the list by the LCD front panel.
MiCOM P441/P442 & P444 Page 189/220
7. CURRENT TRANSFORMER REQUIREMENTS

Two calculations must be performed – once for the three phase fault current at the zone 1
reach, and once for earth (ground) faults. The highest of the two calculated Vk voltages
must be used:
7.1 CT Knee Point Voltage for Phase Fault Distance Protection
Vk ≥ KRPA x IF Z1 x (1+ X/R) . (RCT + RL)

Where:
Vk = Required CT knee point voltage (volts),
KRPA = Fixed dimensioning factor = always 0.6
IF Z1 = Max. secondary phase fault current at Zone 1 reach point (A),
X/R = Primary system reactance / resistance ratio,
RCT = CT secondary winding resistance (Ω),
RL = Single lead resistance from CT to relay (Ω).
7.2 CT Knee Point Voltage for Earth Fault Distance Protection
Vk ≥ KRPA x IFe Z1 x (1+ Xe/Re) . (RCT + 2RL)

Where:
KRPA = Fixed dimensioning factor = always 0.6
IFe Z1 = Max. secondary earth fault current at Zone 1 reach point (A),
Xe/Re = Primary system reactance / resistance ratio for earth loop.
7.3 Recommended CT classes (British and IEC)
Class X current transformers with a knee point voltage greater or equal than that calculated
can be used.
Class 5P protection CTs can be used, noting that the knee point voltage equivalent these
offer can be approximated from:
Vk = (VA x ALF) / In + (RCT x ALF x In)
Where:
VA = Voltampere burden rating,
ALF = Accuracy Limit Factor,
In = CT nominal secondary current.
7.4 Determining Vk for an IEEE “C" class CT
Where American/IEEE standards are used to specify CTs, the C class voltage rating can be
checked to determine the equivalent Vk (knee point voltage according to IEC). The
equivalence formula is:
Vk = [ (C rating in volts) x 1.05 ] + [ 100 x RCT ]
8. DDB DESCRIPTION FOR ALL TYPES P441/P442 & P444 MODELS

Page 190/220 MiCOM P441/P442 & P444
BLANK PAGE
MiCOM P441/P442 & P444 Page 191/220
In
DDB label Default PSL Set with : Reset with :
Out
Changement of Group by Optos
∗
No cell assigned In Opto1 opto energised (>1 sec)( ) – Must be not assigned in the PSL opto power off
At1 :LSB Bit (see table in section 3.3.1 in chap AP) At 0 : (see table in section 3.3.1 in chap AP)
No cell assigned In Opto2 opto energised (>1 sec)(*) – Must be not assigned in the PSL opto power off
At1 :MSB Bit (see table in section 3.3.1 in chap AP) At 0 : (see table in section 3.3.1 in chap AP)
SG-opto Invalid Out Setting Group selected via opto are invalid Set 0 : No alarm is present
Example :1group is requested by the optos status but that group is not
present in the settings
(Gr3 requested but only Gr1&2 are present in MiCOM S1-The settings
restart with GR1 & that cell switch on at 1)
OPTOS INPUTS (48Vcc Version A / Universal Version B-C)
Opto In P441 / P442 / P444 P441 / P442 / P444
Label
Opto energised for a minimum time : 7 ms (48Vdc), 10 ms (universal) to be See Hysteresis description in sect 6.2 chapter P44x/EN AP
1/8
validated by internal logic
See Hysteresis description in sect 6.2 chapter P44x/EN AP
Opto In P442 / P444 P442 / P444
Label
Opto energised for a minimum time : 7 ms (48Vdc), 10 ms (universal) to be See Hysteresis description in sect 6.2 chapter P44x/EN AP
9/16
validated by internal logic
Opto In P444 P444
Label
Opto energised for a minimum time : 1,2 sec to be validated by internal See Hysteresis description in sect 6.2 chapter P44x/EN AP
17/24
logic
Opto In Not Used Not Used
Label
25/32
∗
Minimum time >1 sec for: changement Gr/TPAR/SPAR/AR enable
Page 192/220 MiCOM P441/P442 & P444
In
Out
OUTPUT RELAYS
Relay Out P441 / P442 / P444 P441 / P442 / P444
Label
Set1 :For any DDB cell at 1 if linked by PSL & regarding the type of logic Set 0 :For any DDB cell at 0 if linked by PSL & regarding
selected in PSL by MiCOM S1 the type of logic selected in PSL by MiCOM S1
Programmable Relays : All relays are assigned in Type of Logic:
01/14
The default PSL (See DDB table description) Pulse timer
Type of Logic: Pick Up/Drop Off Timer
Pulse timer Dwell Timer
Pick Up/Drop Off Timer Pick Up Timer
Dwell Timer Drop Off Timer
Pick Up Timer Latching
Drop Off Timer Straight (used in default PSL)
Latching
Straight (used in default PSL)
Relay Out P442 / P444 P442 / P444
Label
15/21
Programmable Relay – Not assigned in default PSL Type of Logic: (See Description above)
Type of Logic: (See Description above)
Relay Out P444 P444
Label
22/32
Programmable Relay– Not assigned in default PSL Type of Logic: (See Description above)
Type of Logic: (See Description above)
LEDS (Right side – Front panel)
LED 1 Led Set1 : For any DDB cell at 1 if linked by PSL Set 0 : For any DDB cell at 0 if linked by PSL & regarding
Programmable Led : ANY TRIP A in the default PSL the type of logic selected in PSL by MiCOM S1
(Latched or not Latched)
MiCOM P441/P442 & P444 Page 193/220
In
Out
Programmable Led : ANY TRIP B in the default PSL the type of logic selected in PSL by MiCOM S1
Programmable Led : ANY TRIP C in the default PSL the type of logic selected in PSL by MiCOM S1
Programmable Led : General Start in the default PSL the type of logic selected in PSL by MiCOM S1
Programmable Led : Z1+Aided Trip in the default PSL the type of logic selected in PSL by MiCOM S1
Programmable Led : Dist FWD in the default PSL the type of logic selected in PSL by MiCOM S1
Programmable Led : Dist REV in the default PSL the type of logic selected in PSL by MiCOM S1
Programmable Led : Auto Reclose Enable in the default PSL the type of logic selected in PSL by MiCOM S1
Page 194/220 MiCOM P441/P442 & P444
In
Out
AUTO RECLOSE (AR) Logic
SPAR Enable In Opto8 opto energised (> 1 sec) if linked by PSL Reset at 0 : opto power off
+Inv At1 :1P AR internal is enabled in the AR logic At 0 : AR 1P internal is disabled
(higher priority than MiCOM S1) (even if selected enable by MiCOM S1)
AR logic becomes 3P only with AR 3P cycle -if TPAR =1
TPAR Enable In Opto8 opto energised (> 1 sec) if linked by PSL Reset at 0 : opto power off
+Inv At1 :3P AR internal is enabled in the AR logic At 0 : AR 3P internal is disabled
(higher priority than MiCOM S1) (even if selected enable by MiCOM S1)
logic becomes :no more 3P cycle available (1P could exist
if SPAR at 1)
A/R Internal In opto energised (> 1 sec) if linked by PSL Reset at 0 : opto power off
At1 :AR internal becomes present At 0 :no Ban Tri logic available.
[AR becomes enable by external contact AR is disable
example :Wdog of Main1 when pick up activates the internal AR in
Main2(P44x)]
A/R 1p in Prog In Relay opto energised if linked by PSL Reset at 0 : opto power off
12 At1 : External 1P AR cycle in progress – requested for blocking the internal
DEF function
A/R 3p in Prog In Relay opto energised if linked by PSL Reset at 0 : opto power off
12 External 3P Arcycle in progress - requested for blocking the internal DEF
function – (pb of Pole Operating Time)
A/R Close In Relay opto energised if linked by PSL Reset at 0 : opto power off
13 At1 :External AR gives a CB closing order – for using internal synchro
conditions of P44X
A/R reclaim In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Reclaim time from external AR in progress – requested to initiate
internal TOR logic / Used in Z1X logic (by specific PSL)
MiCOM P441/P442 & P444 Page 195/220
In
Out
BAR In Opto opto energised if linked by PSL Reset at 0 : opto power off
4 Set at1 :External condition which blocks the internal AR AR Lock out is reseted
(other internal blocking conditions can be selected in MiCOM
S1 :Autoreclose/Block AR) – see also logic AR lockout figure..
Ext Chk Synch In opto energised if linked by PSL Reset at 0 : opto power off
OK At1 :External check synchro condition satisfied – to be used with internal Conditiond of external synchro are unvailable
AR close by specific PSL – (With AND logic between Arclose&CsyncExt)
CB Healthy In Opto opto energised if linked by PSL Reset at 0 : opto power off
5 At1 :contact from CB when CB is operationnal (gas pressure/mechanical At 0 : AR cycle is stopped (if that cell is assigned in the
state)- Must be at 1 inside the time window (adjusted by MiCOM S1 : PSL). At the end of InhWInd the signal AR BAR picks up.
group1/Autoreclose mode/AR Inhibit Wind) during an AR cycle (signals :AR
close & AR Reclaim pick up when CB healthy is detected during the
InhWind timer)
Force 3P trip In opto energised if linked by PSL Reset at 0 : opto power off
At1 :External command for tripping 3P only (Order issued from Main1 to
Main2) – next trip will be 3P
Man.Close CB In Opto opto energised if linked by PSL Reset at 0 : opto power off
6 At1 :External manual close command – requested to initiate SOTF logic &
to close CB (Arlock out during SOTF logic)
Man.Trip CB In opto energised if linked by PSL Reset at 0 : opto power off
At1 :External manual trip command to provide a CB trip command by CB
control if selected in MiCOM S1
CB In opto energised if linked by PSL Reset at 0 : opto power off
Discrepancy At1 : OR
Contact from external status of CB poles (one pole opened) – that data drop Off Internal Logic
must be at 1 before end of Dead time1 if assigned in the PSL At 0 : Stop the 1P cycle if absent at the end of dead time1.
OR AR is ofrced in AR Lock Out
Internal logic = Any pole &Not All pole Dead
(CB Aux must be connected 52a or 52b)
External TripA In opto energised if linked by PSL Reset at 0 : opto power off
At1 :External trip command A
Page 196/220 MiCOM P441/P442 & P444
In
Out
Activate a Trip command phase A (DDB :Any TripA)
(No dwell timer is associated as for an internal trip)
Activate internal AR
Integrated in the Any Trip & Any TripA cell
External TripB In opto energised if linked by PSL Reset at 0 : opto power off
At1 :External trip command B
Activate a Trip command phase B(DDB :Any TripB)
Integrated in the Any Trip & Any TripB cell
External TripC In opto energised if linked by PSL Reset at 0 : opto power off
At1 :External trip command C
Activate a Trip command phase C(DDB :Any TripC)
Integrated in the Any Trip & Any TripC cell
AR Lockout Out AR is blocked by passing over the number of shots selected in Auto At0 : AR Cycles continue if fault still present
Shot> Reclose/trip mode (in MiCOM S1) (not erased by the previous Arcycle)
Set at 1 : Reset at 0 :
(AR Enable) & Reset Trip1P + Reset Trip3P
[(Trip1P&No SPAR)+(Trip3P&NoTPAR)
+(Trip1P+Trip3P)&(Number of shots=MiCOM S1 value)]
AR Fail Out Set at 1 : Absence of check sync condition involve AR failure (For 3P cycle) Reset at 0 : by 3 Poles Closed
A/R close Out Relay 13 Set at 1 :AR internal command :CB Close Reset at 0 with :
Starts as AR Reclaim Close Pulse Time (Setting)
OR
Trip1P or Trip3P
A/R 1p in Prog Out Relay 12 1P AR cycle in progress (could be connected to external Main2 for Blocking Set 0 with :
DEF) End of 1P Dead Time
+AR Lock out (BAR)
+ 3P TRip
MiCOM P441/P442 & P444 Page 197/220
In
Out
A/R 3p in Prog Out Relay 12 3P AR cycle in progress (could be connected to external Main2) Set 0 with :
End of 3P Dead time (DAR)
+AR Lock Out (BAR)
+End of Dead time1 (HSAR)
A/R 1st in Prog Out First high speed AR Cycle in progress (could be connected to external Set 0 with :
Main2) End of 3P Dead time (DAR)
+AR Lock Out (BAR)
A/R 234 in Prog Out Further delayed AR Cyles in progress (could be connected to external Set 0 with :
Main2) End of 3P Dead time (DAR)
+AR Lock Out (BAR)
A/R Trip 3P Out AR signal which force all trips to be 3P – picks up at the end of the first trip At 0 : AR1P could operate if programmed
(1P or 3P)
- Can be connected to Main2 as an external Ban Tri
Set at 1 : Reset at 0 :
(AR enable MiCOM S1)&(No SPAR) SPAR & AR enable MiCOM S1
+ (InhibitWind at 0)
A/R Reclaim Out Set at 1 :Reclaim timer in progress.(Value adjusted in MiCOM S1) Reset at 0 with :
Picks up at the end of the dead time –in synchronism with AR Close order End of Reclaim time (MiCOM S1)
- Can be connected to Main2 for cycle in progress external information OR
- Initiate the internal TOR logic Reset (Trip1P or Trip3P)
(See Figure 78 section 4.5.3)
Page 198/220 MiCOM P441/P442 & P444
In
Out
AR Discrim Out Dicrim status detected (inter or Externaly)-timer in progress Rest 0 :
End of Discrim timer (MiCOM S1)
+Trip 3P (DEC 3P)
+AR Lock Out (BAR)
A/R Enable Out Led 8 Copy of status AR Enable
Set at 1 : Reset at 0: If SPAR and TPAR Optos at 0 (if integrated in
[(optos SPAR) +(optoTPAR)]& (AR enable byMiCOM S1) PSL) + AR Disable in MiCOM S1
A/R SPAR Out Set at 1 :1P AR activated (copy of opto SPAR or MiCOM S1) Reset at 0: if SPARopto=0 or AR Disable in MiCOM S1
Enable
A/R TPAR Out Set at 1 :3P AR activated (copy of opto TPAR or MiCOM S1) Reset at 0: if TPARopto=0 or AR Disable in MiCOM S1
Enable
A/R Lockout Out Relay 11 AR function locked out/No more cycle is initiated by the AR (Pole is kept At0 : AR is activated
opened) – Reset must be done for enabling the AR logic again (AR Reset at 0 =
counters are resetted) [Reset(Trip1P)+Reset(Trip3P)]
Set at 1 = & (End of RC timer)
ARenable & & Reset (BAR )
[(BAR =1 (see internal logic figure.. section..) & Reset (AR BAR n shot>)
+(AR BAR n shot>) AR lockout by number of shots & Reset (No CB Healty)
+(No CB Healthy at the end of InhWind(MiCOM S1)) & Reset (No Discrepancy)
+[No Discrepancy (opto or internal by CBAux if present in PSL) at the end
of 1P Dead time1]
+ (Trip 1P or3P maintained /still present at the end of the1Por3P Dead
time)
+(After discrim timer if Trip3P occures during a 1PAR Cycle) ]
A/R Force Sync Out Force the Synchro condition ok at 1 Reset 0 :
(Could be used during test for getting Arclose whatever are the real With Reset of A/R Reclaim (See DDB description)
conditions of CheckSyn )
LED 8 AR Enable Latched by PSL design
(See DDB Description)
MiCOM P441/P442 & P444 Page 199/220
In
Out
CHECK SYNC Logic
Check Out Set at 1 : Check Synchro conditions are satisfied Set at 0 : Conditions of checksyn unsatisfied (thresholds of
Synch .OK Used with AR close in dedicated PSL – AND gate : dead & live definied in MiCOM S1 :system checks)
[(AR Close) or (Manual Close) & (Checksync OK)]
Control No C/S Out Set at 1 : Internal conditions of Csync are not fulfilled Set at 0 :CSYnc conditions available
V<Dead line Out Set at 1 : Condition of Dead line at 1 (voltage below the threshold value Set at 0 : Condition of Dead line at 0 (voltage above the
(settable in MiCOM S1) – Default value is 13V threshold value (settable in MiCOM S1)
V>Live line Out Set at 1: Condition of Live line at 1 (voltage above the threshold value Set at 0 : Condition of Live line at 0 (voltage below the
V<Dead Bus Out Set at 1: Condition of Dead Bus at 1 (voltage below the threshold value Set at 0 : Condition of Dead Bus at 0 (voltage above the
V>Live Bus Out Set at 1: Condition of Live Bus at 1 (voltage above the threshold value Set at 0 : Condition of Live Bus at 0 (voltage below the
MCB/VTS Bus In Set at 1 :Internal fault in VT used for synchro ref Reset at 0 : opto power off
Csync function is blocked
MCB/VTS Line In Set at 1 :Internal fault in VT used for Z measurement ref (Main VT) Reset at 0 : opto power off
Distance &all Directionnal functions are blocked(can unblocked with
different VTS timer- see MiCOM S1 settings)
Ctrl Cls In Prog Out Set at 1 :Manual close in progress – using CB control (Timer manual Set at 0 :End of Timer manual closing
closing delay in progress)
Control Close Out Set at1 :CB Close 3P command by internal CB Control Reset at 0 :
(Control with synchrocheck manual condition could be used in dedicated End of Timer MiCOM S1 (Close pulse timer)
PSL – MiCOM S1Chk scheme ManCB) +Any Trip
See CB Control logic sect 4.8 fig 115 +CBC No Csync
+CBC Unhealthy
See CB Control logic sect 4.8 fig 115
Control Trip Out Set at 1 :CB Trip 3P command by internal CB Control Reset at 0 :
See CB Control logic sect 4.8 fig 115 End of timer MiCOM S1 (Trip pulse timer)
Page 200/220 MiCOM P441/P442 & P444
In
Out
SOTF – TOR Logic
Man Close CB In Opto opto energised if linked by PSL Reset at 0 : opto power off
6 At1 :
AND no CB Control is activated in MiCOM S1
External command for closing manualy the CB
Will initiate SOTF logic if SOTF not disable in MiCOM S1(BitD)
AND CB control enable will initiate CB close in progress if All pole dead =
SOTF Enable
AR Reclaim In opto energised if linked by PSL Reset at 0 : opto power off
When at 1 (See AR DDB) start the TOR logic
CB Aux A In opto energised if linked by PSL Reset at 0 : opto power off
(See CB DDB ) used for Any pole dead/All pole dead
CB Aux B In opto energised if linked by PSL Reset at 0 : opto power off
CB Aux C In opto energised if linked by PSL Reset at 0 : opto power off
SOTF Enable Out When SOTF logic is enable Timer 500msec issued after Any pole Dead
Set at 1 : + Reset of one conditions requested for SOTF enable
[Sotf not disable (Bit D in MiCOM S1)] AND
All pole dead & End Timer (110sec/default)
+ Input Man Close
+ (CB control & Close in progress)
TOR Out When SOTF logic is enable Reset 500ms after Any pole dead stops
Enable Set at 1 :
By a Pulse of 500msec initiated by :
AR Reclaim internal+AR reclaim External Input
OR
Any pole opened for more than 200ms
MiCOM P441/P442 & P444 Page 201/220
In
Out
TOC Start A Out Set1 :Trip order phase A initiated by levels detectors in SOTF logic (Pickup Set 0 : Reset of Level detectors logic
20ms delayed )
TOC Start B Out Set1 :Trip order phase B initiated by levels detectors in SOTF logic (Pickup Set 0 : Reset of Level detectors logic
20ms delayed )
TOC Start C Out Set1 :Trip order phase C initiated by levels detectors in SOTF logic (Pickup Set 0 : Reset of Level detectors logic
20ms delayed )
AR Reclaim Out When at 1 (See AR DDB) start the TOR logic Set 0 : (See AR DDB)
SOTF/TOR Out Set1 :Trip order initiated by any condition fulfilled in the SOTF/TOR logic Set 0 :When conditions reset
Trip (See logic section 2.12 – fig 37) (See logic section 2.12 – fig 37)
Any Pole Dead Out Set1 :Minimum 1 pole is open Set 0 :All poles are detected not dead
Pole Dead A+Pole DeadB+Pole Dead C
Detection of pole status made by Cbaux or internal thresholds (see dead Detection of pole status made by Cbaux or internal
pole logic in SOTF section 2.12 – fig 35) thresholds
All Pole Dead Out Set1 :All poles are open Set 0 :1pole is detected not dead
Pole DeadA & P.DeadB & P.Dead C
Detection of pole status made by Cbaux or internal thresholds (see dead Detection of pole status made by Cbaux or internal
pole logic in SOTF section 2.12 – fig 35) thresholds
CIRCUIT BREAKER Logic (CB Control / CB Monitoring / CB Fail)
CB Aux A (52a) In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Status input from CB-Pole A is closed Set 0 :Pole A is opened
CB Aux A (52b) In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Status input from CB-Pole A is opened Set 0 :Pole A is closed
CB Aux B (52a) In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Status input from CB-Pole B is closed Set 0 :Pole B is opened
CB Aux B (52b) In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Status input from CB-Pole B is opened Set 0 :Pole B is closed
CB Aux C (52a) In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Status input from CB-Pole C is closed Set 0 :Pole A is opened
Page 202/220 MiCOM P441/P442 & P444
In
Out
CB Aux C (52b) In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Status input from CB-Pole C is opened Set 0 :Pole C is closed
CB Healthy In Opto 5 See DDB description of AR Logic (CB control not used) See DDB description of AR Logic
Man Close CB In Opto 6 See DDB Description in SOTF logic (CB control not used) See DDB Description in SOTF logic
Man Trip CB In See DDB description of AR Logic See DDB description of AR Logic
CB Discrepancy In See DDB description of AR Logic See DDB description of AR Logic
Reset Lockout In Opto 7 opto energised if linked by PSL Reset at 0 : opto power off
At1 :Provides a CB monitoring lockout reset (all counters & values are
reset)
Reset All Values In opto energised if linked by PSL Reset at 0 : opto power off
At1 :Provides a CB monitoring reset (all counters & values are reset)
CB Fail Alarm Out Set 1 :For any Breaker failure on any trip for any phase Reset 0 : (selectable in MiCOM S1 : CB fail & I< logic)
Iphase<
+ CB open & Iphase<
+Trip reset & Iphase
+Trip reset OR Iphase<<
I^ Maint Alarm Out Set1 : :Alarm Maintenace picks up when the maximum broken current (1st
level) calculated by monitoring task is reached (set in MiCOM
S1 :I^Maintenance)
(min1/Max 25000A)
I^ Lockout Alarm Out Set1 : Lockout :Alarm picks up when the maximum broken current (2nd Set 0 :When the maximum broken current (2nd level)
level) calculated by monitoring task is reached (set in MiCOM calculated by monitoring task is not reached
S1 :I^Maintenance)
(min1/Max 25000A)
MiCOM P441/P442 & P444 Page 203/220
In
Out
CB Ops Maint Out Set1 :Alarm picks up when the maximum number of CB operations initiated Set 0 :untill number of operations is bellow the MiCOM S1
by internal or external Trip (set in MiCOM S1 :CB Ops Maint) is reached value
(min1/Max 10000) Counter can be reseted by « Reset all values »
CB Ops Lockout Out Set1 :When CB is lockout due to number of CB operations bigger than in Set 0 :untill number of operations is bellow the MiCOM S1
MiCOM S1 value(CB Ops Lock) value
(min1/Max 10000) Counter can be reseted by « Reset all values »
CB Op Time Out Set1 :Alarm picks up for an excessive operating time on any phase (slowest Set 0 :untill operating time is bellow the MiCOM S1 value
Maint pole detection calculated by I< of CB Fail logic))
In MiCOM S1-CB Time maint (min5/Max 500 msec)
CB Op Time lock Out Set1 :Alarm picks up for an excessive operating time on any phase (slowest Set 0 :untill operating time is bellow the MiCOM S1 value
pole detection calculated by I< of CB Fail logic)
In MiCOM S1-CB Time Lockout (min5/Max 500 msec)
F.F Pre Lockout Out Set1 :CB Trip Prelockout Alarm ReSet 0 : end of timer in MiCOM S1 (Fault Freq Time)
With (Maint Lockout –1) + (Fault Frequency-1) at 1 (min0/Max 9999 sec)
F.F Lock Out Set1 : CB Trip Lockout Alarm Reset 0 : By user interface OR CB Close
With : (Maint Lockout =1) + (Fault Frequence=1) (selectable in MiCOM S1)
Lockout Alarm Out Set1 :Lockout Alarm with Reset 0 : By user interface OR CB Close
CBC Unhealthy (selectable in MiCOM S1)
+CBC No Check Sync
+CBC Fail to Close
+CBC Fail To Trip
+FF Lock
+CB OpTime Lock
+CB Ops Lock
CB Status Alarm Out Displayed with 2 LSB of « Plan Status « at 00 or 11 from LCD of relay Set 0 : When conditions reset
Set1 :When CB discrepency status is detected after CBA timer issued by Opto or internal logic
opto input or internaly by CBAux logic – Alarm issued after 5 sec.
See CB aux Logic in sect 4.7.1 Figure 109
Man CB trip Fail Out Set1 :CB Fail on Manual Trip Set 0 :
See CB Control logic section 4.8 Figure 115 See CB Control logic section 4.8 Figure 115
Page 204/220 MiCOM P441/P442 & P444
In
Out
Man CB Cls Fail Out Set1 :CB Fail on Manual Close Set 0 :
See CB Control logic section 4.8 Figure 115 See CB Control logic section 4.8 Figure 115
Man CB Out Set1 : CB Unhealthy for Manual Control Set 0 :
Unhealthy See CB Control logic section 4.8 Figure 115 See CB Control logic section 4.8 Figure 115
CB Aux A Out Set1 :Pole A is opened Set 0 :Pole A is closed
CB Pole A Status detceted by internal logic & CBAux optos input status CB Pole A Status detceted by internal logic & CBAux optos
(See CB Section 4.6 – Figure 109) input status (See CB Section 4.6 – Figure 109)
CB Aux B Out Set1 :Pole B is opened Set 0 :Pole B is closed
CB Aux C Out Set1 :Pole C is opened Set 0 :Pole C is closed
Any Pole Dead Out See DDB Description in SOTF logic See DDB Description in SOTF logic
All Pole Dead Out See DDB Description in SOTF logic See DDB Description in SOTF logic
TBF1 Trip Out Trip Order :Breaker Failure trip from timer tBF1 in CB Fail ogic Reset end of Timer tBF1
TBF2 Trip Out Trip order : Breaker Failure trip from timer tBF2 in CB Fail ogic Reset end of Timer tBF2
DISTANCE PROTECTION Logic
DIST.Chan Recv In Opto1 opto energised if linked by PSL Reset at 0 : opto power off
At1 :Signal (carrier)received on main channel for Distance scheme logic Set 0 :No carrier received
(depending on MiCOM S1 settings :Program mode/standard Mode)
DIST COS In Opto2 opto energised if linked by PSL Reset at 0 : opto power off
At1 :Signal (Loss of carrier/Loss of Guard) is detected out of service by
external device
MiCOM P441/P442 & P444 Page 205/220
In
Out
Z1X Extension In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off
At1 :Signal will initiate Z1 extension logic if selected in MiCOM S1.
That cell can be assigned to any external/Internal condition for starting Z1X
logic
(See Z1X logic section 4.5.4 Figure 13 Figure 14)
MCB/VTS Line In Opto3 opto energised if linked by PSL Reset at 0 : opto power off
(Z measure At1 :Fuse Failure by external MCB status on Main VT (Z measurement) .All
VT main) Distance & Directionnality will be blocked after a FFU timer adjusted by
MiCOM S1
(See Fuse Failure logic section 4.2 Figure 66)
Even if Main VT are Bus side – that cell must be linked to MCB status)
MCB/VTS Bus In See Check Sync DDB description See Check Sync DDB description
(Sync Ref) (Used in Synchrocheck logic) (Used in Synchrocheck logic)
VTS Fast Out Set1 :Copy of Instantaneous unconfirmed Fuse Failure (in internal logic Set 0 :Rest of one of the conditions
detection)
(See Fuse Failure logic section 4.2 Figure 66) (See FFailure logic in section 4.2 Figure 66)
Protections blocked.Min Z can be unblocked by I>&I2>&IN&∆I (for
1P/2P/3P Failure)
VTS Fail Alarm Out Set1 :VT Alarm indication with : Reset 0 :
internal logic after timer is issued+ MCB by opto at1 Healthy network detected
The Distance/WInfeed & Directionnal functions are blocked (only Non direc + All pole Dead
I> are working)
(See Fuse Failure logic section 4.2 Figure 66) (See FFailure logic in section 4.2 Figure 66)
Dist Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
(Usefull during test) OR
Set1 :The DIST Timer will be blocked & DIST will start but will not perform a DDB at 0 if assigned to a DDB cell
Trip command.
COS Alarm Out Set1 :Alarm for Carrier Out Of Service Set 0 : Rest of initiale condition
DIST Sig Send Out Relay 05 Set1 :Signal send in Distance Protection scheme Set 0 :
(See logic of distance section 2.8.2.4)
Page 206/220 MiCOM P441/P442 & P444
In
Out
DIST UNB CR Out Set1 :Unblock Main channel signal received Set 0 :
See Led 5 / Relay 10 description
Dist Fwd Out Led6 Set1 :Directionnal Forward detected in distance Algorithms (Deltas or Set 0 : With reset of Any Start/Dist Start
Classical) AND (CVMR)
See Description of Algorithms in chapter P44x/EN HW, item 4)
Assigned to Led 6 by default
Dist Rev Out Led7 Set1 :Directionnal Reverse detected in distance Algorithms (Deltas or Set 0 : With reset of Any Start/Dist Start
Classical) AND (CVMR)
(See Description of Algorithms in chapter P44x/EN HW, item 4)
Assigned to Led 7 by default
Dist Trip A Out Set1 :Trip Phase A with Distance protection logic Set 0 :Reset Dist Trip signal
(See Trip logic in Section 2.5 Figure 94) (fixed pulse duration is 80ms)
Dist Trip B Out Set1 :Trip Phase B with Distance protection logic Set 0 :Reset Dist Trip signal
Dist Trip C Out Set1 :Trip Phase C with Distance protection logic Set 0 :Reset Dist Trip signal
DIST Start A Out Set1 : Distance Protection logic start phase A Set 0 : Reset of R/X computation made by All pole Dead
(See Description of Algorithms in chapter 3) detection
I Dead calculated by Laurent (3 or 4 samples requested)
V Dead calculated by CB Fail (More than 10ms requested)
DIST Start B Out Set1 : Distance Protection logic start phase B Set 0 : Reset of R/X computation made by All pole Dead
MiCOM P441/P442 & P444 Page 207/220
In
Out
DIST Start C Out Set1 : Distance Protection logic start phase C Set 0 : Reset of R/X computation made by All pole Dead
DIST Sch Accel. Out Set1 :Distance scheme accelerating - POP Set 0 : If disabled in MiCOM S1
(Copy of MiCOM S1 setting Dist scheme)
DIST Sch Perm Out Set1 :Distance scheme Permissive - PUP Set 0 : If disabled in MiCOM S1
DIST Sch Block Out Set1 :Distance scheme Blocking – BOP Z1 – BOP Z2 Set 0 : If disabled in MiCOM S1
Z1 = Z'1 Out Led5 Set1 :Fault is detected in Z1(convergence of loop in Z1) Set 0 : Reset of R/X computation made by All pole Dead
Relay See Led 5/Relay01/Relay 10 description detection (See Dist Start DDB reset description)
01-10
Z1X = Z'1x Out Led5 Set1 :Fault is detected in Z1x(convergence of loop in Z1x) and filtered by Set 0 : Reset of R/X computation made by All pole Dead
Relay blocking/unblocking PSwing/Rguard logic detection (See Dist Start DDB reset description)
10 See Led 5/Relay10 description
Z2 = Z'2 Out Led5 Set1 :Fault is detected in Z2(convergence of loop in Z2) and filtered by Set 0 : Reset of R/X computation made by All pole Dead
10 See Relay 10 / Led5 description
Page 208/220 MiCOM P441/P442 & P444
In
Out
Zp Out Led5 Set1 :Fault is detected in Zp(convergence of loop in Zp) – See Relay 10 / Set 0 : Reset of R/X computation made by All pole Dead
Relay Led5 description detection (See Dist Start DDB reset description)
10
T1 Out Set1 :Timer Distance for Z1 (tZ1 in MiCOM S1) is issued (If T1=0 picks up Set 0 : Timer Distance T1 is not issued
when relay starts (CVMR or Predef)
End of Timer =1
T2 Out Set1 :Timer Distance for Z2 (tZ2 in MiCOM S1) is issued Set 0 : Timer Distance T2 is not issued
End of Timer =1
End of Timer =1
End of Timer =1
Tzp Out Set1 :Timer Distance for Zp (tZp in MiCOM S1) is issued Set 0 : Timer Distance T Zp is not issued
End of Timer =1
Dist Fwd No Filt Out Set1 :Directionnal Forward decision made by Distance logic without any Set 0 : Identical to Dist Fwd reset logic
filter by CVMR or Zone
Picks up quicker than Dist Fwd
Dist Rev No Filt Out Set1 :Directionnal Reverse decision made by Distance logic without any Set 0 : Identical to Dist Rev reset logic
filter by CVMR or Zone
Picks up quicker than Dist Rev
Dist Out Set1 : logic with CVMR at 1 (Minimum 1 loop has been detected in the Set 0 : Reset of R/X computation made by All pole Dead
Convergency quad) detection (See Dist Start DDB reset description)
Cross Country Out Set1 : Cross country logic is activated Set 0 : With reset of initiale conditions
Filt (1 Fault Fwd/1 Fault Rev detected)
Relay Out Assigned in default PSL : »TRIP Z1 » - Default logic Set 0 : See PSL logic
Label Z1&[( Dist TripA)+ (Dist TripB)+ (Dist TripC)]
01
MiCOM P441/P442 & P444 Page 209/220
In
Out
Relay Out Assigned in default PSL : »Dist Aided Trip » - Default logic Set 0 : See PSL logic
Label [( Dist TripA)+ (Dist TripB)+ (Dist TripC)]
10 & Dist Unb CR
& (Z1+Z1x+Z2+Z3+Zp+Z4)
LED 5 Led Assigned in default PSL : »Z1+Aided Trip » Set 0 : See PSL logic
Relay10 + Z1 + Z1x
Associated DISTANCE PROTECTION Logic
Power Swing Out Relay Set1 : Power Swing detected Set 0 : Reset of initiale conditions
14 (See description logic in section 2.14 Figure 40)
Reversal Guard Out Set1 :Reversal guard logic is activated (Directionnal switching from Rev to Set 0 :
Fwd in parallel line application)
See Description logic in section 2.8.2.4 Figure 3)
WI Trip A Out Set1 : For Trip phase A in Weak infeed logic Set 0 :
(See Weak Infeed logic section 2.9.3 Figure 24) (See Weak Infeed logic section 2.9.3 Figure 24)
WI Trip B Out Set1 : For Trip phase B in Weak infeed logic Set 0 :
WI Trip C Out Set1 : For Trip phase C in Weak infeed logic Set 0 :
Aided DEF PROTECTION Logic
DEF.Chan Recv In Opto1 opto energised if linked by PSL opto power off
At1 :Signal (carrier)received on main channel for DEF scheme logic Set 0 :No carrier received
(depending on MiCOM S1 settings :Aided DEF/Scheme logic)
Selected shared by default – Can operate as an independant scheme with
adifferent opto from Dist
Page 210/220 MiCOM P441/P442 & P444
In
Out
DEF COS In Opto2 opto energised if linked by PSL Reset at 0 : opto power off
At1 :Signal (Loss of carrier/Loss of Guard) is detected out of service by
external device
Selected shared by default – Can operate as an independant scheme with
adifferent opto from Dist
DEF Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The DEF Timer will be blocked & DEF will start but will not perform OR
any Trip command. DDB at 0 if assigned to a DDB cell
DEF Sig Send Out Relay Set1 :Signal send in DEF Protection scheme Set 0 :
05 (See logic of DEF section 2.18 Figure 48 and Figure 49)
DEF UNB CR Out Set1 :Unblock DEF Channel Set 0 :
DEF Rev Out Set1 :Directionnal Reverse detected in DEF Algorithms (Deltas or Set 0 : Reset of R/X computation made by All pole Dead
Classical) detection (See Dist Start DDB reset description)
See Description of Algorithms in section 2.18 Figure 50)
DEF Fwd Out Set1 :Directionnal Foward detected in DEF Algorithms (Deltas or Classical) Set 0 : Reset of R/X computation made by All pole Dead
(See Description of Algorithms in section 2.18 Figure 50) detection (See Dist Start DDB reset description)
DEF Start A Out Set1 :Start Phase A with DEF protection logic Set 0 : Reset of R/X computation made by All pole Dead
(See Trip logic in section 2.18) detection (See Dist Start DDB reset description)
DEF Start B Out Set1 :Start Phase B with DEF protection logic Set 0 : Reset of R/X computation made by All pole Dead
DEF Start C Out Set1 :Start Phase C with DEF protection logic Set 0 : Reset of R/X computation made by All pole Dead
DEF Trip A Out Relay Set1 : DEF Protection logic Trip phase A Set 0 : Reset DEF Trip Order
09 (See Description of Algorithms in Figure 52)
DEF Trip B Out Relay Set1 : DEF Protection logic Trip phase B Set 0 : Reset DEF Trip Order
DEF Trip C Out Relay Set1 : DEF Protection logic Trip phase C Set 0 : Reset DEF Trip Order
MiCOM P441/P442 & P444 Page 211/220
In
Out
ZERO SEQUENCE POWER PROTECTION ZSP Logic (since version B1.0)
ZSP Timer Block In Input energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set 1:The ZSP Timer will be blocked & ZSP will start but will not perform OR
any Trip command DDB at 0 if assigned to a DDB cell
ZSP Start Out Set 1:Zero sequence power function Start (Timer associated picks up) Set 0:Reset with IN or SR below the threshold IN> or SR>
with fixed time delay first and IDMT curve timer Hysteresis=
(See Pole Dead description in Figure 60)
ZSP Trip Out Set 1:3P Trip order performed by Zero sequence power function when Set 0:Reset ZSP Trip Order
associated timers are issued
BACK UP OVERCURRENT PROTECTION IN>1/IN>2/I2>/I>1/I>2/I>3/I>4 Logic
IN>1 Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The IN>1 Timer will be blocked & IN>1 will start but will not perform OR
IN>2 Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The IN>2 Timer will be blocked & IN>2 will start but will not perform OR
I>1 Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The I>1 Timer will be blocked & I>1 will start but will not perform any OR
Trip command. DDB at 0 if assigned to a DDB cell
Page 212/220 MiCOM P441/P442 & P444
In
Out
I2> Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The I2> Timer will be blocked & I2> will start but will not perform any OR
Trip command with negative overcurrent detection DDB at 0 if assigned to a DDB cell
IN>1 Trip Out Relay Set1 : Earth Fault stage 1 – 3Poles Trip order performed when associated Set 0 : Reset IN>1 Trip Order
09 timer is issued
IN>2 Trip Out Relay Set1 : Earth Fault stage 2 – 3Poles Trip order performed when associated Set 0 : Reset IN>2Trip Order
09 timer is issued
IN>1 Start Out Set1 : Earth Fault stage 1 – Start function (Timer associated picks up) Set 0 : Reset with IN below the threshold IN>1
Directionnal or not - with DT or IDMT curves Hysteresis=
Negative or positive sequence polarisation (See Pole Dead description in Figure 60)
IN>2 Start Out Set1 : Earth Fault stage 2 – Start function (Timer associated picks up) Set 0 : Reset with IN below the threshold IN>2
Directionnal or not - DT only Hysteresis=
Negative or positive sequence polarisation (See Pole Dead description in Figure 60)
I2> Start Out Set1 : Negative sequence current detection – Start function (Timer Set 0 : Reset with IN below the threshold I2>
associated picks up) Hysteresis=
Directionnal or not - with DT curves
Negative polarisation (See Pole Dead description in Figure 60)
I2> Trip Out Set1 : Negative sequence current detection – 3P Trip order performed Set 0 : Reset I2> Trip Order
when associated timer is issued
I>Start Out Set1 :Any Overcurrent function start for phase A Set 0 : Reset with Iphase A below the lowest threshold I>1
Any A Hysteresis=
I>Start Out Set1 :Any Overcurrent function start for phase B Set 0 : Reset with Iphase B below the lowest threshold I>1
Any B Hysteresis=
I>Start Out Set1 :Any Overcurrent function start for phase C Set 0 : Reset with Iphase C below the lowest threshold I>1
Any C Hysteresis=
MiCOM P441/P442 & P444 Page 213/220
In
Out
I>1 Start Out Set1 :Overcurrent stage1 start Set 0 : Reset with Iphase A below the threshold I>1
Directionnal managed by Deltas Algorithms
VTS Block timer facility (See Pole Dead description in Figure 60)
Directionnal managed by Deltas Algorithms
VTS Block timer facility (See Pole Dead description in Figure 60)
Not Directionnal with DT curves Hysteresis=
Use without timer for SOTF
(see description in section 2.12 Figure 35) (See Pole Dead description in Figure 60)
Not Directionnal with DT curves Hysteresis=
Use without timer for SOTF
(see description in section 2.14) (See Pole Dead description in Figure 60)
I>1 Trip Out Set1 :Overcurrent Stage 1 Trip 3P performed when associated timer is Set 0 : Reset I>1 Trip Order
issued
issued
issued
issued
Stub Bus Enable Out opto energised if linked by PSL Reset at 0 : opto power off if assigned to an opto
At1 :Status input from HV line isolator opened – indicates that line is dead
& disconnected
At1 : I>4 is activated as a back up Stub Bus protection
Page 214/220 MiCOM P441/P442 & P444
In
Out
BACK UP VOLTAGE PROTECTION V<1/V<2/V>1/V>2 Logic
V<1 Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The V<1 Timer will be blocked & V<1 will start but will not perform OR
V<2 Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The V<2 Timer will be blocked & V<2 will start but will not perform OR
V>1 Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The V>1 Timer will be blocked & V>1 will start but will not perform OR
V>2 Timer Block In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :The V>2 Timer will be blocked & V>2 will start but will not perform OR
V<1 Alarm Out Set1 :1st stage undervoltage Alarm picks up when V<1 starts Set 0 : Reset with V measure over the threshold V<1
Hysteresis=
V<2 Alarm Out Set1 :2nd stage undervoltage Alarm picks up when V<1 starts Set 0 : Reset with V measure over the threshold V<2
Hysteresis=
V>1 Alarm Out Set1 :1st stage Overvoltage Alarm picks up when V<1 starts Set 0 : Reset with V measure below the threshold V>1
Hysteresis=
V>2 Alarm Out Set1 :2nd stage Overvoltage Alarm picks up when V<1 starts Set 0 : Reset with V measure below the threshold V>2
Hysteresis=
V<Start Out Set1 :Any Undervoltage function start for phase A Set 0 : Reset with V phase A measure over the lowest
Any A threshold V<
Hysteresis=
V<Start Out Set1 :Any Undervoltage function start for phase B Set 0 : Reset with V phase B measure over the lowest
Any B threshold V<
Hysteresis=
MiCOM P441/P442 & P444 Page 215/220
In
Out
V<Start Out Set1 :Any Undervoltage function start for phase C Set 0 : Reset with V phase C measure over the lowest
Any C threshold V<
Hysteresis=
V<1 Start Out Set1 :1st Stage Undervoltage function start for any phase Set 0 : Reset with V measure over the threshold V<1
Hysteresis=
V<2 Start Out Set1 :2nd Stage Undervoltage function start for any phase Set 0 : Reset with V measure below the threshold V<2
Hysteresis=
V<1 Trip Out Set1 :1st Stage Undervoltage function trip 3 phase Set 0 : Reset of V<1 Trip order
nd
V<2 Trip Out Set1 :2 Stage Undervoltage function trip 3 phase Set 0 : Reset of V<2 Trip order
V>Start Out Set1 :Any Overvoltage function start for phase A Set 0 : Reset with V phase A measure below the lowest
Any A threshold V<
Hysteresis=
V>Start Out Set1 :Any Overvoltage function start for phase B Set 0 : Reset with V phase B measure below the lowest
Any B threshold V<
Hysteresis=
V>Start Out Set1 :Any Overvoltage function start for phase C Set 0 : Reset with V phase C measure below the lowest
Any C threshold V<
Hysteresis=
V>1 Start Out Set1 :1st Stage Overvoltage function start for any phase Set 0 : Reset with V measure below the threshold V>1
Hysteresis=
V>2 Start Out Set1 :2nd Stage Overvoltage function start for any phase Set 0 : Reset with V measure below the threshold V>2
Hysteresis=
V>1 Trip Out Set1 :1st Stage Overvoltage function 3 phase TRIP Set 0 : Reset of V>1 Trip order
V>2 TRip Out Set1 :2nd Stage Overvoltage function 3 phase TRIP Set 0 : Reset of V>2 Trip order
Page 216/220 MiCOM P441/P442 & P444
In
Out
ALARMS
F out of Range Out Set1 :Alarm when frequency tracking does not operate correctly and Set 0 : With frequency tracking operating correctly
provides a Frequency out of range
CT Fail Alarm Out Set1 :Alarm from the current transformers supervision Set 0 :No CT Fail Alarm detected
Brok.Cond. Out Set1 : Alarm from the Start of Broken Conductor function Set 0 :No Brok.Cond.Alarm detected
Alarm
CVT Alarm Out Set 1:Alarm from the capacitive voltage transformers supervision Set 0 :No CVT Fail Alarm detected
Field Volt Fail Out Set1 : Field Voltage Failure (Internal 48Vcc delivered by the relay can be Set 0 :With reset of min Field voltage detection
used for Optos polarisation)
Alarm User1 In Set1 : Alarm for user – application customized must be linked to dedicated Set 0 :With reset of conditions linked to that cell
DDB cells
DDB cells
DDB cells
DDB cells
DDB cells
General Alarm Out Relay Set1 :For any Alarm started & included in the list : Set 0 : Reset if all initiale condition reset
08 Battery Fail
Field Volt Fail
General Alarm
Prot’n Disabled
F out of range
VT Fail Alarm
CT Fail Alarm
CVT Fail Alarm
CB Fail Alarm
MiCOM P441/P442 & P444 Page 217/220
In
Out
General Alarm Out Relay I^Maint Alarm Set 0 : Reset if all initiale condition reset
08 I^Lockout Alarm
CB Ops Maint
CB Ops Lockout
CB Op Time Maint
CB Op Time Lock
F.F. Pre Lockout
F.F Lock
Lockout Alarm
CB Status Alarm
Man CB Trip Fail
Man CB Cls Fail
Man CB Unhealthy
Control No C/C
AR Lockout Shot>
SG-opto Invalid
A/R Fail
V<1 Alarm
V<2 Alarm
V>1 Alarm
V>2 Alarm
COS Alarm
User Alarlm1
User Alarm2
START LOGIC
Any Start Out Led4 Set1 :Any Protection start loig with any phase Set 0 :Reset with reset from all started function
Relay Assigned to Led 4 by default (21/67N/50/51…)
06 (Fault record Trigger in default PSL with 20ms Dwell Timer)
1ph Fault Out Set1 : Single phase fault detected with Distance Funct. Set 0 : with Distance Reset
2ph Fault Out Set1 : Two phase fault detected with Distance Funct. Set 0 : with Distance Reset
3ph Fault Out Set1 : Three phase fault detected with Distance Funct. Set 0 : with Distance Reset
Page 218/220 MiCOM P441/P442 & P444
In
Out
TRIP LOGIC
User Trip A In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :Trip A Internal input managed with the general trip logic(With OR
AR/Evolving fault…) DDB at 0 if assigned to a DDB cell
Can be assigned by external condition
User Trip B In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :Trip B Internal input managed with the general trip logic(With OR
User Trip C In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :Trip C Internal input managed with the general trip logic(With OR
Any Trip Out Relay Set1 :Any Trip 1P or 3P initiated by internal Trip or external Trip decision Set 0 :Reset conditions
07 (Fault record Trigger in default PSL)
Any Int Trip A Out Set1 : Any Internal Trip with Phase A with any internal protection decision Set 0 :Reset conditions
Any Int Trip B Out Set1 : Any Internal Trip with Phase B with any internal protection decision Set 0 :Reset conditions
Any Int Trip C Out Set1 : Any Internal Trip with Phase C- with any internal protection decision Set 0 :Reset conditions
Any Trip A Out Led1 Set1 :Any Internal or External Trip phase A – with any protection decision Set 0 :Reset conditions
Relay (internal or external)
02 Assigned to Led 1 by default
Any Trip B Out Led2 Set1 :Any Internal or External Trip phase B – with any protection decision Set 0 :Reset conditions
Any Trip C Out Led3 Set1 :Any Internal or External Trip phase C – with any protection decision Set 0 :Reset conditions
1P Trip Out Set1 :Single pole Trip decision (int or Ext) Set 0 :Reset conditions
MiCOM P441/P442 & P444 Page 219/220
In
Out
3P Trip Out Set1 :Three pole Trip decision (int or Ext) Set 0 :Reset conditions
Brk Conduct. Out Set1 :3P Trip decision by Broken Conductor protection Set 0 :Reset conditions
Trip
Loss.Load Out Set1 :3P Trip decision by Loss of Load protection (in application without Set 0 :Reset conditions
Trip communication scheme & a 3P Trip logic)
MISCELLANEOUS LOGIC
BLK Protection In opto energised if linked by PSL OR any internal DDB by dedicated PSL Set 0 :Reset conditions
Set1 :All protections functions are blocked (21/67N/50/51…)
Prot’n Disabled Out Set1 :When TEST MODE is enable Set 0 :Reset conditions – No blocking conditions available :
All the protections functions are out of order. (Test mode disable) + (Opto BLK Protec =0)
Reset Latches In opto energised if linked by PSL OR any internal DDB by dedicated PSL Reset at 0 : opto power off if assigned to an opto
Set1 :Permanent Alarms & Leds & relayslatched are reset OR
DDB at 0 if assigned to a DDB cell
Page 220/220 MiCOM P441/P442 & P444
BLANK PAGE
MiCOM P441/P442 & P444
TECHNICAL DATA
MiCOM P441/P442 & P444 Page 1/30
CONTENT
1. RATINGS 5
1.1 Currents 5
1.2 Voltages 5
1.3 Auxiliary Voltage 6
1.4 Frequency 6
1.5 Logic inputs 6
1.6 Output Relay Contacts 7
1.7 Field Voltage 7
1.8 Loop through connections 7
1.9 Wiring requirements 7
2. BURDENS 8
2.1 Current Circuit 8
2.2 Voltage Circuit 8
2.3 Auxiliary Supply 8
2.4 Optically-Isolated Inputs 8
3. ACCURACY 9
3.1 Reference Conditions 9
3.2 Measurement Accuracy 9
3.3 Protection accuracy 10
3.4 Influencing Quantities 12
3.5 High Voltage Withstand IEC60255-5:1977 12
3.5.1 Dielectric Withstand 12
3.5.2 Impulse 12
3.5.3 Insulation Resistance 12
4. ENVIRONMENTAL COMPLIANCE 13
4.1 Electrical Environment 13
4.1.1 DC Supply Interruptions IEC60255-11:1979 13
4.1.2 AC Ripple on DC Supply IEC60255-11:1979 13
4.1.3 Disturbances on AC Supply - EN61000-4-11:1994 13
4.1.4 High Frequency Disturbance IEC60255-22-1:1988 13
4.1.5 Fast Transient IEC60255-22-4:1992 13
4.1.6 Electrostatic Discharge IEC60255-22-2:1996 13
4.1.7 Conducted Emissions EN 55011:1991 13
4.1.8 Radiated Emissions EN 55011:1991 13
4.1.9 Radiated Immunity IEC60255-22-3:1989 14
P44x/EN TD/E33 Technical Data
Page 2/30 MiCOM P441/P442 & P444
4.1.10 Conducted Immunity IEC61000-4-6:1996 14

4.1.11 Surge Immunity IEC61000-4-5:1995 14
4.1.12 EMC Compliance 14
4.1.13 Power Frequency Interference - Electricity Association (UK) 14
4.2 Atmospheric Environment 14
4.2.1 Temperature IEC60255-6:1988 14
4.2.2 Humidity IEC60068-2-3:1969 14
4.2.3 Enclosure Protection IEC60529:1989 14
4.2.4 Pollution degree IEC61010-1:1990/A2:1995 14
4.3 Mechanical Environment 15
4.3.1 Vibration IEC60255-21-1:1988 15
4.3.2 Shock and Bump IEC60255-21-2:1988 15
4.3.3 Seismic IEC60255-21-3:1993 15
5. ANSI TEST REQUIREMENTS 16

5.1 ANSI / IEEE C37.90.1989 16
5.2 ANSI / IEEE C37.90.1: 1989 16
5.3 ANSI / IEEE C37.90.2: 1995 16
6. PROTECTION SETTING RANGES 17

6.1 Distance Protection 17
6.1.1 Line Settings 17
6.1.2 Zones settings 17
6.1.3 Power-swing settings 18
6.2 Distance protection schemes 18
6.2.1 Programmable distance schemes 19
6.2.2 Distance schemes settings 19
6.2.3 Weak infeed settings 19
6.2.4 Loss of load settings 19
6.3 Back-up Overcurrent Protection 20
6.3.1 Threshold Settings 20
6.3.2 Time Delay Settings 20
6.3.3 Inverse Time (IDMT) Characteristic 20
6.4 Negative sequence overcurrent protection 22
6.5 Broken Conductor Protection 22
6.6 Earth Fault Overcurrent Protection 22
6.6.2 Polarising Quantities For Earth Fault Measuring Elements 22
6.6.3 Time Delay Characteristics 22
6.7 Zero sequence Power Protection (since B1.0) 23
MiCOM P441/P442 & P444 Page 3/30
6.8 Channel Aided Directional Earth Fault Protection 23

6.9 Under Voltage Protection 23
6.9.2 Under Voltage Protection Time Delay Characteristics 23
6.10 Over Voltage Protection 24
6.10.2 Time Delay Characteristics 24
6.11 Voltage Transformer Supervision 24
6.12 Capacitive Voltage Transformer Supervision (since B1.0) 24
6.13 Current Transformer Supervision 25
6.14 Undercurrent Element 25
6.15 Breaker Fail Timers (TBF1 and TBF2) 25
7. MEASUREMENT SETTINGS 26
7.1 Disturbance Recorder Settings 26
7.2 Fault Locator Settings 26
8. CONTROL FUNCTION SETTINGS 27

8.1 Communications Settings 27
8.2 Auto-Reclose 27
8.2.1 Options 27
8.2.2 Auto-recloser settings 27
8.3 Circuit Breaker State Monitoring 28
8.4 Circuit Breaker Control 29
8.5 Circuit Breaker Condition Monitoring 29
8.5.1 Maintenance alarm settings 29
8.5.2 Lockout Alarm Settings 29
8.6 Programmable Logic 30
8.7 CT and VT Ratio Settings 30
Page 4/30 MiCOM P441/P442 & P444
BLANK PAGE
MiCOM P441/P442 & P444 Page 5/30
1. RATINGS
1.1 Currents
In = 1A or 5A ac rms (dual rated).

Separate terminals are provided for the 1A and 5A windings, with the neutral input of each
winding sharing one terminal.
CT Type Operating range

Standard 0 to 64In
Sensitive 0 to 2In
All current inputs will withstand the following, with any current function setting:
Withstand Duration
4 Ιn Continuous rating
4.5 Ιn 10 minutes
5 Ιn 5 minutes
6 Ιn 3 minutes
7 Ιn 2 minutes
30 Ιn 10 seconds
50 Ιn 3 seconds
100 Ιn 1 second
Pass Criteria Winding temperatures <105° C

Dielectric withstand and insulation
resistance unimpaired
1.2 Voltages
Nominal Voltage Operating range

100/120Vph - ph rms 0 to 200Vph - ph rms
Duration Withstand
(Vn = 100/120V)
Continuous rating (2Vn) 240Vph - ph rms
10 seconds (2.6Vn) 312Vph - ph rms
Page 6/30 MiCOM P441/P442 & P444
1.3 Auxiliary Voltage

The relay is available in three auxiliary voltage versions, these are specified in the table
below:
Nominal Ranges Operative dc range Operative ac range

24-48V dc 19 - 65 V Not available
48-110 V dc (30 / 100 V ac rms) ** 37 - 150 V 24 - 110 V
110-250 V dc (100 / 240 V ac rms) ** 87 - 300 V 80 - 265 V
** rated for AC or DC operation.
Pass Criteria All functions operate as specified

within the operative ranges
All power supplies operate
continuously over their operative
ranges, and environmental
conditions
1.4 Frequency
The nominal frequency (Fn) is dual rated at 50/60Hz, the operate range is 45Hz to 65Hz.
1.5 Logic inputs
All the logic inputs are independent and isolated, relay types P441 provide 8 inputs, 16
inputs are provided by the P442.
Rating Range
Logical “off” 0Vdc 0 - 12Vdc
Logical “on” 50Vdc 30 - 60Vdc
Higher voltages can be used in conjunction with an external resistor, value of the resistor is
determined by the following equation:
Resistor = (Required Input Level - 50) x 200Ω.

Hardware ref P441/442B or C or P444A or C (Universal Opto) :
All the logic inputs are independent and isolated, relay types P441 provide 8 inputs, 16
inputs are provided by the P442 and 24 inputs for P444.
Battery Voltage (V dc) Logical “off” (V dc) Logical “on” (V dc)

24/27 <16.2 >19.2
30/34 <20.4 >24
48/54 <32.4 >38.4
110/125 <75 >88
220/250 <150 >176
REMARK: Control the version compatibility in P44x/EN VC chapter

MiCOM P441/P442 & P444 Page 7/30
1.6 Output Relay Contacts
Make & Carry 30A for 3s

Carry 250A for 30ms
10A continuous
Break DC: 50W resistive
DC: 37.5W inductive (L/R = 40ms)
AC: 1250VA
AC: 1250VA inductive (P.F. = 0.7)
Maxima: 10A and 300V
Loaded contact: 10,000 operations minimum
Unloaded contact: 100,000 operations minimum
Watchdog Contact
Break DC: 30W resistive
DC: 15W inductive (L/R = 40ms)
AC: 275W inductive (P.F. = 0.7)
The maximum number of output relays that should be configured to be permanently

energized is 50% of those available (minimum 4).
1.7 Field Voltage
The field voltage provided by the relay is nominally 48V dc with a current limit of 112mA. The
operating range shall be 40V to 60V with an alarm raised at <35V.
1.8 Loop through connections
Terminals D17-D18 and F17-F18 are internally connected together for convenience when
wiring, Maxima 5A and 300V.
1.9 Wiring requirements
The requirements for the wiring of the relay and cable specifications are detailed in the
installation section of the Operation Guide (Chapter P44x/EN IN).
Page 8/30 MiCOM P441/P442 & P444
2. BURDENS
2.1 Current Circuit
CT burden (at nominal current)

1A <0.04VA
5A <0.4VA
2.2 Voltage Circuit
Reference voltage (Vn)

Vn = 100/120V <0.03VA
2.3 Auxiliary Supply
Case Size Nominal* Maximum**

Size 8 15VA dc 16W ac 20VA dc 20W ac
Size 12 18VA dc 19W ac 26VA dc 26W ac
* Nominal is with 50% of the optos energised and one relay per card energised
** Maximum is with all optos and all relays energised.
For each energised Opto powered from the Field Voltage or each energised Output Relay:
Each additional energised opto input 0.09W

(24/27, 30/34, 48/54V)
Each additional energised opto input 0.12W (110/125V)
Each additional energised opto input 0.19W (220/250V)
Each additional energised output relay 0.13W
2.4 Optically-Isolated Inputs

DC Supply 5mA burden per input. (Current drawn at rated voltage)
2.5mA at minimum voltage (30V)
Maximum input voltage 300V dc (any setting).
MiCOM P441/P442 & P444 Page 9/30
3. ACCURACY
For all accuracies specified, the repeatability is ±2.5% unless otherwise specified.
If no range is specified for the validity of the accuracy, then the specified accuracy shall be
valid over the full setting range.
3.1 Reference Conditions
Quantity Reference conditions Test tolerance

General
Ambient temperature 20 °C ±2°C
Atmospheric pressure 86kPa to 106kPa -
Relative humidity 45 to 75 % -
Input energising quantity

Current In ±5%
Voltage Vn ±5%
Frequency 50 or 60Hz ±0.5%
Auxiliary supply DC 48V or 110V ±5%
AC 63.5V or 110V
3.2 Measurement Accuracy
Quantity Range Accuracy

Current 0.1 to 64In 10mA or ±1%
Voltage 1.0 Vn ±1%
Frequency 45 - 65Hz ±0.025Hz
Phase 0 - 360° ±2°
Page 10/30 MiCOM P441/P442 & P444
3.3 Protection accuracy
Element Range Trigger Reset Timer Accuracy

Distance elements: Zone 1 Accuracy: ±5% ±2ms
Resistance 0 to 400/In Ω
Impedance 0.001/In Ω to 500/In Ω
Distance elements: Other zones Accuracy: ±10% ±2ms
Resistance 0 to 400/In Ω
Impedance 0.001/In Ω to 500/In Ω
Phase Overcurrent elements (I>1, I>2, I>3, I>4) 2 to 20 Is [1] DT: Is±5% 0.95Is±2% greater of ±2% or 20ms
IDMT: 1.05Is±5% 0.95Is±5% greater of ±5% or 40ms
Relay characteristic angle -95° to +95° Accuracy: ±2° 1°
Earth fault measuring elements (IN>1,IN>2, IN>) 2 to 20 Is [2] DT: Is±5% 0.95Is±5% greater of ±2% or 20ms
IDMT: 1.05Is±5% greater of 5% or 40ms
Zero sequence voltage polarisation (Vop>) Accuracy:
Vn = 100/120 V 0.5 - 25V ±10% at RCA ±90° - -
Negative sequence Polarisation: Voltage threshold (V2p>) Accuracy:
Vn = 100/120 V 0.5 - 25V ±5% - -
Negative sequence Polarisation: Current threshold (I2p>) 0.08 - 1.0In Accuracy: 0.95Is±5% -
±5%
Negative Sequence Overcurrent (I2>) 2 to 20 Is [1] Is±5% 0.95Is±5% greater of ±5% or 40ms
Under Current element (I<) 0.2 - 1.2 In Accuracy: ±5% Above setting: 10ms or less
±10% Below setting: 15ms or less
Under Voltage elements (V<) DT: Vs±5% greater of 2% or 20ms
Vn = 100/120 V 10 - 120V IDMT: 0.95Vs±5% 1.05Vs±5% greater of 5% or 40ms
Over Voltage elements (V>&V>>) DT: Vs±5% greater of 2% or 20ms
Vn = 100/120 V 60 - 185V IDMT: 1.05Vs±5% 0.95Vs±5% greater of 5% or 40ms
Directional Operating Boundary 0 - 360° Accuracy: - greater of 2% or 20ms
±2°
MiCOM P441/P442 & P444 Page 11/30
Element Range Trigger Reset Timer Accuracy
 I 2  I 2  I 2
Broken conductor protection   0.2 to 1.0   ±5% 0.95   ±5% greater of ±2% or 20ms
 I1  I1  I1
Transient Overreach 2 to 20 Is <5% (for a system - --
X/R of up to 90)
Relay overshoot 2 to 20 Is <50ms - -
Breaker fail timers 0 to 10s - - greater of ±2% or 20ms
Page 12/30 MiCOM P441/P442 & P444
3.4 Influencing Quantities

No additional errors will be incurred for any of the following influencing quantities:
Quantity Operative range (typical only)

Environmental
Temperature -25°C to +55°C
Mechanical (Vibration, Shock, Bump, According to
Seismic) IEC 60255-21-1:1988
IEC 60255-21-2:1988
IEC 60255-21-3:1995
Quantity Operative range

Electrical
Frequency 45 Hz to 65 Hz
Harmonics (single) 5% over the range 2nd to 17th
Auxiliary voltage range 0.8 LV to 1.2 HV (dc)
0.8 LV to 1.1 HV (ac)
Aux. supply ripple 12% Vn with a frequency of 2.fn
Point on wave of fault waveform 0 - 360°
DC offset of fault waveform No offset to fully offset
Phase angle -90° to + 90°
Magnetising inrush No operation with OC elements set to 35% of
peak anticipated inrush level.
3.5 High Voltage Withstand IEC60255-5:1977

3.5.1 Dielectric Withstand
2.0kVrms for one minute between all terminals and case earth.
2.0kVrms for one minute between all terminals of each independent circuit grouped together
and all other terminals. This includes the output contacts and loop through connections
D17/D18 and E17/E18.
1.5kVrms for one minute across dedicated normally open contacts of output relays.
1.0kVrms for 1 minute across normally open contacts of changeover pairs and watchdog
outputs.
3.5.2 Impulse
The product will withstand without damage impulses of 5kV peak, 1.2/50µs, 0.5J across:
Each independent circuit and the case with the terminals of each independent circuit
connected together.
Independent circuits with the terminals of each independent circuit connected together.
Terminals of the same circuit except normally open metallic contacts.
3.5.3 Insulation Resistance
The insulation resistance is greater than 100 MΩ at 500Vdc.

MiCOM P441/P442 & P444 Page 13/30
4. ENVIRONMENTAL COMPLIANCE
The product complies with the following specifications :
4.1 Electrical Environment
4.1.1 DC Supply Interruptions IEC60255-11:1979
The product will withstand a 20ms interruption in the auxiliary voltage in its quiescent
condition.
4.1.2 AC Ripple on DC Supply IEC60255-11:1979
The product will operate with 12% AC ripple on the DC auxiliary supply without any
additional measurement errors.
4.1.3 Disturbances on AC Supply - EN61000-4-11:1994
The products satisfies the requirements of EN61000-4-11 for voltage dips and short
interruptions.
4.1.4 High Frequency Disturbance IEC60255-22-1:1988
The product complies with Class III 2.5kV common mode and 1kV differential mode for 2
seconds at 1MHz with 200Ω source impedance, without any mal-operations or additional
measurement errors.
4.1.5 Fast Transient IEC60255-22-4:1992
The product complies with all classes up to and including class IV/4kV without any mal-
operations or additional measurement errors.
Fast transient disturbances on power supply 4kV, 5ns rise time, 50ns decay time, 5kHz
(common mode only) repetition time, 15ms burst, repeated every
300ms for 1min in each polarity, with a 50Ω
source impedance.
Fast transient disturbances on I/O signal, 4kV, 5ns rise time, 50ns decay time, 5kHz
data and control lines (common mode only) repetition time, 15ms burst, repeated every
300ms for 1min in each polarity, with a 50Ω
source impedance.
4.1.6 Electrostatic Discharge IEC60255-22-2:1996

The product will withstand application of all discharge levels up to the following without mal-
operation:
Class IV– 15kV discharge in air to the user interface, display and exposed metal work.
Class III– 8kV discharge in air to all communication ports, 6kV point contact discharge to any
part of the front of the product.
4.1.7 Conducted Emissions EN 55011:1991
Group 1 Class A limits.
0.15 - 0.5MHz, 79dBµV (quasi peak) 66dBµV (average).
0.5 - 30MHz, 73dBµV (quasi peak) 60dBµV (average).

4.1.8 Radiated Emissions EN 55011:1991
Group 1 Class A limits.
30 - 230MHz, 40dBµV/m at 10m measurement distance.
230 - 1000MHz, 47dBµV/m at 10m measurement distance.

Page 14/30 MiCOM P441/P442 & P444
4.1.9 Radiated Immunity IEC60255-22-3:1989

Class/Level III/3 - 10V/m at 1kHz 80% am., 20MHz to 1GHz.
4.1.10 Conducted Immunity IEC61000-4-6:1996
Level 3 - 10Vrms at 1kHz 80% am.- 0.15 to 80MHz.
4.1.11 Surge Immunity IEC61000-4-5:1995
Level 4 - 4kV peak, 1.2/50µs between all groups and case earth
2kV peak, 1.2/50µs between terminals of each group.
4.1.12 EMC Compliance
Compliance to the European Community Directive 89/336/EEC on EMC is claimed via the
Technical Construction File route.
Generic Standards EN 50081-2 :1994 and EN 50082-2 :1995 are used to establish
conformity.
4.1.13 Power Frequency Interference - Electricity Association (UK)
EA PAP Document, Environmental Test Requirements for Protection Relays and Systems
Issue I, Draft 4.2.1 1995.
Class Length of comms Unbalanced Balanced Comms Balanced Comms

circuit Comms V rms (Unbalance 1%) (Unbalance 0.1%)
Vrms Vrms
1 1 to 10 metres 0.5 0.005 0.0005
2 10 to 100 metres 5 0.05 0.005
3 100 to 1000 metres 50 0.5 0.05
4 1000 to 10,000m or > 500 5 0.5
4.2 Atmospheric Environment

4.2.1 Temperature IEC60255-6:1988
Storage and transit –25°C to +70°C.
Operating –25°C to +55°C.
IEC60068-2-1:1990 Cold
IEC60068-2-2:1974 Dry heat
4.2.2 Humidity IEC60068-2-3:1969
56 days at 93% relative humidity and 40°C.
4.2.3 Enclosure Protection IEC60529:1989
IP52 - Protected against dust and dripping water at 15° to the vertical.
4.2.4 Pollution degree IEC61010-1:1990/A2:1995
Normally only non conductive pollution occurs. Occasionally a temporary conductivity
caused by condensation must be expected.
MiCOM P441/P442 & P444 Page 15/30
4.3 Mechanical Environment

4.3.1 Vibration IEC60255-21-1:1988
Vibration Response Class 2 - 1g
Vibration Endurance Class 2 - 2g.
4.3.2 Shock and Bump IEC60255-21-2:1988
Shock response Class 2 - 10g
Shock withstand Class 1 - 15g
Bump Class 1 - 10g
4.3.3 Seismic IEC60255-21-3:1993
Class 2.
Page 16/30 MiCOM P441/P442 & P444
5. ANSI TEST REQUIREMENTS

The products shall meet the ANSI / IEEE requirements as follows:-
5.1 ANSI / IEEE C37.90.1989
Standards for relays and relay systems associated with electric power apparatus.
5.2 ANSI / IEEE C37.90.1: 1989
Surge withstand capability (SWC) tests for protective relays and relay systems:-
Oscillatory test - 1MHz to 1.5MHz, 2.5kV to 3.0kV,
Fast transient test 4kV to 5kV
5.3 ANSI / IEEE C37.90.2: 1995
Standard for withstand capability of relay systems to radiated electromagnetic interference
from transceivers: 35V/m, 25 to 1000Mhz.
MiCOM P441/P442 & P444 Page 17/30
6. PROTECTION SETTING RANGES

6.1 Distance Protection
6.1.1 Line Settings
Setting Range Step size

Length of line (Ln) 0.3 - 1000 km 0.010 km
0.2 - 625 miles 0.005 miles
Positive sequence angle (ϑ1) –90° - 90° 0.1°
In = 1 A In = 5 A
Setting Range Step size Range Step size
Positive sequence impedance 0.001 - 500 Ω 0.001 Ω 0.002 - 0.002 Ω
(Z1) 199,8 Ω
6.1.2 Zones settings
Setting In = 1 A In = 5 A
Range Step size Range Step size
Impedance reaches 0.001 - 500 Ω 0.001 Ω 0.0002 - 0.0002 Ω
(Zone 1, Zone 2, Zone 3, Zone P, 100 Ω
Zone 4)
Resistive reaches for phase - 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
earth faults
(Zone 1, Zone 2, Zones 3 & 4,
Zone P)
Resistive reaches for phase - 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
earth faults
Zone P)

Residual compensation angles –180-180° 0.1°
Zone P)
Residual compensation factors 0-7 0.001
Zone P)
Timer for zone 1/1X 0 - 10s 0.002s
Timers for zone 2, Zone 3, 0 - 10s 0.01s
Zone P, Zone 4
Page 18/30 MiCOM P441/P442 & P444
6.1.3 Power-swing settings
In = 1 A In = 5 A
Setting Range Step size Range Step size
Powerswing detection boundaries:
Delta R 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω
Delta X 0 - 400 Ω 0.01 Ω 0 - 80 Ω 0.002 Ω

Imax line In - 20 In 0.01 In
IN threshold 10 - 100 % Imax 1%Imax
I2 threshold 10 - 100 % Imax 1%Imax
Trip mode Single/Three pole -
Unblocking time delay 0 - 30s 0.1s
Power-swing detection boundary 0 - 25 Ω 0.01 Ω
Block zones Bit 0: Z1&Z1X-Block, Bit 1: Z2 block
Bit 2: Z3 block, Bit 3: Zp block, Bit 4:Z4block
6.2 Distance protection schemes

Basic scheme functions: Instantaneous zone 1 tripping
Time delayed tripping for all zones
Directional earth fault protection
Zero sequence Power protection (since B1.0)
Switch on to fault logic
Trip on reclose logic
Loss of load logic
Conversion to three pole tripping
Channel-aided distance schemes: Permissive Overreach Protection with
Overreaching Zone 1 (POP Z1)
Permissive Overreach Protection with
Overreaching Zone 2 (POP Z2)
Permissive Underreach Protection, Accelerating
Zone 2 (PUP Z2)
Permissive Underreach Protection Tripping via
Forward Start (PUP Fwd)
Blocking Overreach Protection with Overreaching
Zone 1 (BOP Z1)
Blocking Overreach Protection with Overreaching
Zone 2 (BOP Z2)
Permissive Scheme Unblocking Logic
Permissive Overreach Schemes Weak Infeed
Features
Permissive Overreach Schemes Current Reversal
Guard
Blocking Scheme Current Reversal Guard
MiCOM P441/P442 & P444 Page 19/30
6.2.1 Programmable distance schemes
Setting Range
Signal Send Zone No Signal Send/Signal send on Z1/ Signal send on Z2/
Signal send on Z4
Type of Scheme on signal None/None+Z1X/Aided scheme for Z1 faults/Aided
Receive scheme for Z2 faults/ Aided scheme for forward faults/
Blocking scheme for Z1 faults/ Blocking scheme for Z2
faults
6.2.2 Distance schemes settings

Fault Type/Signal Send Zone Phase-to-Ground Fault Enabled/ -
Phase-to-Phase Fault Enabled/Both
Enabled
Trip mode for the distance Force 3 Pole Trip for all zones/1 -
protection Pole Trip for zone Z1/1 Pole trip for
zones Z1 and Z2
Signal Receive Time-Delay for 0 - 1s 0,002s
Blocking Schemes (Tp)
Time Delay for Reversal Guard 0 - 0,15s 0,002s
Unblocking Logic/Type of TAC None (no control of Signal -
Receive Receive)/Loss of carrier/Loss of
Guard (HF Presence)
SOTF Delay 10 – 3600 s 1.000 s
TOR-SOTF Mode TOR -
Z1 enable/Z2 enable/Z3 enable/
All zones enable/
Distance scheme enable
SOTF
AllZones/Lev.Detect./Z1 enable/Z2
enable/Z3 enable/Z1+Rev
en/Z2+Rev en/Dist Scheme/Disable
6.2.3 Weak infeed settings

WI :Mode Status Disabled/Echo/Trip&Echo -
WI : Single Pole Trip Disabled/Enabled -
WI : V< Thres. 10 - 70V 5V
WI : Trip Time Delay 0 - 1s 0,002s
6.2.4 Loss of load settings
Setting Range Step Size

Mode status Disabled or enabled
Chan. Fail Disabled or enabled
I< 0.05 x In - 1 x In 0.05 In
Window 0.01s - 0.1s 0.01s
NOTE: For detailed information on distance schemes, please refer to Chapter

P44x/EN AP - Application notes.
Page 20/30 MiCOM P441/P442 & P444
6.3 Back-up Overcurrent Protection

6.3.1 Threshold Settings
Setting Stage Range Step size

I>1 Current Set 1st Stage 0.08 - 4.0In 0.01In
I>2 Current Set 2nd Stage 0.08 - 4.0In 0.01In
I>3 Current Set TOR/SOTF protection 0.08 - 32In 0.01In
I>4 Current Set Stub bus protection 0.08 - 32In 0.01In
6.3.2 Time Delay Settings

Each overcurrent element has an independent time setting and each time delay can be
blocked by an optically isolated input:
Element Time delay type

1st Stage Definite Time (DT) or IDMT(IEC/UK/IEEE/US
curves)
2nd Stage DT or IDMT
3rd Stage DT
4th Stage DT
6.3.3 Inverse Time (IDMT) Characteristic

IDMT characteristics are selectable from a choice of four IEC/UK and five IEEE/US curves
as shown in the table below.
The IEC/UK IDMT curves conform to the following formula:
K
t = TMS ×
(I/Is)α–1
The IEEE/US IDMT curves conform to the following formula:
TD  K 
t= ×  + L 

 (I/I S )
7 α
−1 
Where
t = operation time
K = constant
IS = current threshold setting
α = constant
L = ANSI/IEEE constant (zero for IEC/UK curves)
TMS = Time Multiplier Setting for IEC/UK curves
TD = Time Dial Setting for IEEE/US curves
MiCOM P441/P442 & P444 Page 21/30
IDMT Curve description Standard K Constant α Constant L Constant

Standard Inverse IEC 0.14 0.02
Very Inverse IEC 13.5 1
Extremely Inverse IEC 80 2
Long Time Inverse UK 120 1
Moderately Inverse IEEE 0.0515 0.02 0.114
Very Inverse IEEE 19.61 2 0.491
Extremely Inverse IEEE 28.2 2 0.1217
Inverse US-C08 5.95 2 0.18
Short Time Inverse US-C02 0.02394 0.02 0.01694
IDMT Characteristics
Name Range Step Size

TMS 0.025 to 1.2 0.025
Time Multiplier Settings for IEC/UK curves
Name Range Step Size

TD 0.5 to 15 0.1
Time Dial Settings for IEEE/US curves

6.3.3.1 Definite Time Characteristic
Element Range Step Size

All stages 0 to 100s 10ms
6.3.3.2 Reset Characteristics

Reset options for IDMT stages:
Curve type Reset time delay

IEC / UK curves DT only
All other IDMT or DT
The Inverse Reset characteristics are dependent upon the selected IEEE/US IDMT curve as
shown in the table below. Thus if IDMT reset is selected the curve selection and Time Dial
setting will apply to both operate and reset.
All inverse reset curves conform to the following formula:
 TD   tr 

t Re set =   ×
 7   1 − ( I I ) α 
S
Where
tReset = reset time
tr = constant
IS = current threshold setting
α = constant
TD = Time Dial Setting (Same setting as that employed by IDMT curve)
Page 22/30 MiCOM P441/P442 & P444
IEEE/US IDMT Curve description Standard tr Constant α Constant

Moderately Inverse IEEE 0.0515 0.02
Very Inverse IEEE 19.61 2
Extremely Inverse IEEE 28.2 2
Inverse US-C08 5.95 2
Short Time Inverse US-C02 0.02394 0.02
Inverse Reset Characteristics

6.4 Negative sequence overcurrent protection

I2> Current Set 0.08 - 4.0In 0.01In
I2> time Delay 0 - 100s 0.01s
Directional None/Fwd/Rev
I2> Char Angle –95° - +95° 1°
6.5 Broken Conductor Protection
Settings Range Step size

I2/I1 Setting 0.2 - 1.0 0.01
I2/I1 Time Delay 0 - 100s 0.1s
I2/I1 Trip Enabled / Disabled
6.6 Earth Fault Overcurrent Protection


IN>1 Current Set 0.08 - 4.0In 0.01In
IN>2 Current Set 0.08 - 32In 0.01In
6.6.2 Polarising Quantities For Earth Fault Measuring Elements

The polarising quantity for earth fault elements can be either zero sequence or negative
sequence values.

IN> Char angle –95° to +95° 1°
6.6.3 Time Delay Characteristics

The time delay options for the two earth fault elements are identical, stage 1 may be
selected to be either IDMT or definite time. Stage 2 will provide a definite time delay. The
settings and IDMT characteristics are identical to those specified for the phase overcurrent
elements. The setting range for the definite time delayed element is as specified below:
Definite Time Characteristic
Element Range Step Size

All stages 0 to 200s 0.01s
MiCOM P441/P442 & P444 Page 23/30
6.7 Zero sequence Power Protection (since B1.0)

Threshold Settings

Po Status Enabled/Disabled. -
Time Delay Fact. 0 – 2s 0.200s
Fix Time Delay 0 – 10s 0.010s
IN current set 0.05 - 4 In 0.01 In
P0 Threshold 0.05IN - IN 0.1IN
6.8 Channel Aided Directional Earth Fault Protection


Polarisation Zero seq. / Neg. seq. -
V> Voltage Set 0.500 - 20 V 0.010 V
(Vn=100/120 V)
IN Forward 0.05 - 4 In 0.01 In
Teleprotection Time delay 0 - 10s 0.1s
Scheme logic Shared / Blocking / Permissive
Tripping Any Phase / Three Phases
6.9 Under Voltage Protection


V<1 Voltage Set 10 - 120V 1V
(Vn = 100/120V)
V<2 Voltage Set 10 - 120V 1V
(Vn = 100/120V)
6.9.2 Under Voltage Protection Time Delay Characteristics

The Under voltage measuring elements are followed by an independently selectable time
delay. The first stage has a time delay characteristics selectable as either Inverse Time or
Definite Time. The second stage has an associated Definite Time delay setting.
Each measuring element time delay can be blocked by the operation of a user defined logic
(optical isolated) input.
The inverse characteristic is defined by the following formula :
K
t=
(1 − M )
Where
T = Operating time in seconds
M = Applied input voltage / Relay setting voltage (Vs)
Page 24/30 MiCOM P441/P442 & P444

DT setting 0 - 100s 0.01s
TMS Setting (K) 0.5 - 100 0.5
Definite time and TMS setting ranges

6.10 Over Voltage Protection

V>1 Voltage Set 60 - 185V 1V
(Vn = 100/120V)
V>2 Voltage Set 60 - 185V 1V
(Vn = 100/120V)
6.10.2 Time Delay Characteristics

The Overvoltage measuring elements are followed by an independently selectable time
delay. The first stage has a time delay characteristics selectable as either Inverse Time or
Definite Time. The second stage has an associated Definite Time delay setting.
Each measuring element time delay can be blocked by the operation of a user defined logic
(optical isolated) input.
The inverse characteristic is defined by the following formula :
K
t=
( M − 1)
Where
T = Operating time in seconds
M = Applied input voltage / Relay setting voltage (Vs)

DT setting 0 - 100s 0.01s
TMS Setting (K) 0.5 - 100s 0.5
Definite time and TMS setting ranges

6.11 Voltage Transformer Supervision

VTS Time Delay 1.0 - 20s 1s
3 phase undervoltage threshold 10-70V 1V
VTS I2> & I0> Inhibit 0 - In 0.01In
Superimposed current Delta I> 0.01 - 5A 0.01 A
6.12 Capacitive Voltage Transformer Supervision (since B1.0)

CVTS status Enabled / Disabled
CVTS VN> 0.500 - 22V 0.500V
CVTS Time Delay 0 – 300s 1s
MiCOM P441/P442 & P444 Page 25/30
6.13 Current Transformer Supervision

CTS VN< Inhibit 0.5 - 22V (for Vn = 100/120V) 0.5V
CTS IN> Set 0.08In - 4In 0.01In
CTS Time Delay 0 - 10s 1s
6.14 Undercurrent Element

This element is used by the breaker fail and circuit breaker monitoring functions of the relay.
Name Range Step size

I< Current Set 0.05 – 3.2In 0.050In
6.15 Breaker Fail Timers (TBF1 and TBF2)

There are two stages of breaker fail that can be used to re-trip the breaker and back trip in
the case of a circuit breaker fail. The timers are reset if the breaker opens, this is generally
detected by the undercurrent elements. Other methods of detection can be employed for
certain types of trip (see Application notes Volume 1 Chapter 2).
Timer Setting range Step

tBF1 0 to 10s 0.005s
tBF2 0 to 10s 0.005s
CBF non Current reset I<Only/CB open&I</Prot
Reset&I</Disable/Prot Reset Or I<
CBF Ext reset I<Only/CB open&I</Prot
Reset&I</Disable/Prot Reset Or I<
Page 26/30 MiCOM P441/P442 & P444
7. MEASUREMENT SETTINGS
7.1 Disturbance Recorder Settings
Setting Range Step

Record Length 0 - 10.5s 0.1s
Trigger position 0 - 100% 0.1%
Trigger mode Single / Extended
Sample Rate 12 Samples/Cycle Fixed
Digital Signals Selectable from logic inputs and outputs and internal
signals
Trigger Logic Each of the digital inputs can be selected to trigger a
record
7.2 Fault Locator Settings

Mutual compensation factor 0 to 7.000 0.001
Mutual compensation angle 0 to 360° 1°
MiCOM P441/P442 & P444 Page 27/30
8. CONTROL FUNCTION SETTINGS

8.1 Communications Settings
Front port Communication Parameters (Fixed)

Protocol Courier
Address 1
Message format IEC60870FT1.2
Baud rate 19200 bits/s
Rear port settings Setting options Setting available for:

Physical link RS485 or Fibre optic IEC only
Remote address 0 - 255 (step 1) IEC / Courier
Modbus address 1 - 247 (step 1) Modbus only
Baud rate 9 600 or 19 200 bits/s IEC only
Baud rate 9 600, 19 200 or 38 400 bits/s Modbus only
Inactivity timer 1 - 30 minutes (step 1) All
Parity “Odd”, “Even” or “None” Modbus only
Measurement period 1 - 60 minutes (step 1) IEC only
8.2 Auto-Reclose
8.2.1 Options
The Auto-recloser in the distance protection allows either single* or three pole for the first
shot. The following shots are three pole only. Due to the complexity of the logic the
Application notes should be referred to.
NOTE: *P442 and P444 only
8.2.2 Auto-recloser settings

AUTORECLOSE ENABLE/DISABLE
(Configuration Setting)
Number of Shots 1, 1/3, 1/3/3, 1/3/3/3 1
3, 3/3, 3/3/3, 3/3/3/3
1P Dead Time 0.1 to 5s 0.01s
3P Dead Time 0. 1 to 60s 0.01s
Dead Time 2 1 to 3600s 1s
Healthy Window 0.01 to 9999s 0.01s (in CB control)
Reclaim Time 1 to 600s 1s
Discrimination time 0.1 to 5s 0.01s
A/R Inhibit Window 1 to 3600s 1s
Page 28/30 MiCOM P441/P442 & P444

Block auto-recloser At T2
At T3
At Tzp
LoL Trip
I2> Trip
I>1 Trip
I>2 Trip
V<1 Trip
V<2 Trip
V>1 Trip
V>2 trip
IN>1 Trip
IN>2 Trip
Aided D.E.F Trip
AR Close pulse length 0.1 to 10s 0.1s
Check synchronic settings

C/S Check Scheme for A/R Bit 0: Live Bus/Dead Line,
Bit 1: Dead Bus/Live Line
Bit 2: Live Bus/Live Line.
Dead Bus/Dead Line with special PSL
C/S Check Scheme for Man Bit 0: Live Bus/Dead Line,
CB Bit 1: Dead Bus/Live Line
Bit 2: Live Bus/Live Line.
Dead Bus/Dead Line with special PSL
V< Dead Line 5-30V 1V
V> Live Line 30-120V 1V
V< Dead Bus 5-30V 1V
V> Live Bus 30-120V 1V
Diff Voltage 0.5-40V 0.1V
Diff Frequency 0.02-1Hz 0.01Hz
Diff Phase 5°-90° 2.5°
Bus-Line Delay 0.1 to 2s 0.1s
8.3 Circuit Breaker State Monitoring

The relay can monitor the state of the circuit breaker using either a 52a or 52b signal, it is
possible to select which of these is being used on the relay menu. If the menu is used to
select the ‘Both 52a and 52b’ option is selected then a discrepancy alarm can be detected. If
these contacts remain simultaneously open or simultaneously closed for >5s, then the CB
Status alarm will be indicated.
MiCOM P441/P442 & P444 Page 29/30
8.4 Circuit Breaker Control

CB Control by Disabled/
Local/
Remote/
Local+Remote/
Opto/
Opto+local/
Opto+Remote/
Opto+Rem+local
Manual close pulse time 0.1 to 10s 0.01s
Trip pulse time 0.1 to 5s 0.01s
Man Close Delay 0.01 to 600s 0.01s
Healthy Windows 0.01 to 9999 0.01
C/S Window 0.01 to 9999 0.01
AR single pole Disabled/Enabled -
AR three pole Disabled/Enabled -
8.5 Circuit Breaker Condition Monitoring

8.5.1 Maintenance alarm settings

I^ Maintenance 1 to 25000A 1 Summated
broken current
No. of CB Ops Maint 1- 10000 1
CB Time Maint 5 - 500ms 1ms Circuit breaker
opening time
8.5.2 Lockout Alarm Settings

I^ threshold 1 to 25000 1
No. of CB Ops Lock 1- 10000 1
CB Time Lockout 5 - 500ms 1ms
Fault Freq Count 0 to 9999 1
Fault Freq Time 0 to 9999s 1s
Lockout reset by: CB close, User Interface
Manual close reset delay 0.01 to 600s 0.01s
Page 30/30 MiCOM P441/P442 & P444
8.6 Programmable Logic

The programmable logic is not editable from the relay menu, a dedicated support package is
provided as part of the MiCOM S1 support software. This is a graphical editor for the
programmable logic. The features of the programmable logic are more fully described within
the application section of the user manual. As part of the logic each output contact has a
programmable conditioner/timer, there are also eight general purpose timers for use in the
logic.
The output conditioners and the general-purpose timers have the following setting range:
Time Range Step size

t1 to t8 0 to 4 hours 0.001s
8.7 CT and VT Ratio Settings

The primary and secondary rating can be independently set for each set of CT or VT inputs,
for example the earth fault CT ratio can be different to that used for the phase currents.
Primary range Secondary range

Current transformer 1 - 30000 Amps 1 or 5 Amps
step size 1 A
Voltage transformer 100 V - 1000 kV 80 - 140 V
step size 1 V step size 1 V
MiCOM P441/P442 & P444
INSTALLATION
MiCOM P441/P442 & P444 Page 1/10
CONTENT
1. RECEIPT OF RELAYS 3
2. STORAGE 3
3. UNPACKING 3
4. RELAY MOUNTING 4
4.1 Rack mounting 5
4.2 Panel mounting 6
5. RELAY WIRING 8
5.1 Medium and heavy duty terminal block connections 8
5.2 RS485 port 8
5.3 IRIG-B connections (if applicable) 9
5.4 RS232 port 9
5.5 Download/monitor port 9
5.6 Earth connection 9
P44x/EN IN/E33 Installation
Page 2/10 MiCOM P441/P442 & P444
BLANK PAGE
MiCOM P441/P442 & P444 Page 3/10
1. RECEIPT OF RELAYS
Protective relays, although generally of robust construction, require careful treatment prior to
installation on site. Upon receipt, relays should be examined immediately to ensure no
external damage has been sustained in transit.
If damage has been sustained, a claim should be made to the transport contractor and
AREVA T&D Protection & Control should be promptly notified.
Relays that are supplied unmounted and not intended for immediate installation should be
returned to their protective polythene bags and delivery carton.
Section 3 of this chapter gives more information about the storage of relays.
2. STORAGE
If relays are not to be installed immediately upon receipt, they should be stored in a place
free from dust and moisture in their original cartons. Where de-humidifier bags have been
included in the packing they should be retained. The action of the de-humidifier crystals will
be impaired if the bag is exposed to ambient conditions and may be restored by gently
heating the bag for about an hour prior to replacing it in the carton.
To prevent battery drain during transportation and storage a battery isolation strip is fitted
during manufacture. With the lower access cover open, presence of the battery isolation strip
can be checked by a red tab protruding from the positive side.
Care should be taken on subsequent unpacking that any dust which has collected on the
carton does not fall inside. In locations of high humidity the carton and packing may become
impregnated with moisture and the de-humidifier crystals will lose their efficiency.
Prior to installation, relays should be stored at a temperature of between –25˚C to +70˚C.
3. UNPACKING
Care must be taken when unpacking and installing the relays so that none of the parts are
damaged and additional components are not accidentally left in the packing or lost.
NOTE: With the lower access cover open, the red tab of the battery isolation
strip will be seen protruding from the positive side of the battery
compartment. Do not remove this strip because it prevents battery
drain during transportation and storage and will be removed as part of
the commissioning tests.
Relays must only be handled by skilled persons.
The site should be well lit to facilitate inspection, clean, dry and reasonably free from dust
and excessive vibration. This particularly applies to installations which are being carried out
at the same time as construction work.
Page 4/10 MiCOM P441/P442 & P444
4. RELAY MOUNTING
MiCOM relays are dispatched either individually or as part of a panel/rack assembly.
Individual relays are normally supplied with an outline diagram showing the dimensions for
panel cut-outs and hole centres. This information can also be found in the product
publication.
Secondary front covers can also be supplied as an option item to prevent unauthorised
changing of settings and alarm status. They are available in sizes 40TE (GN0037 001) and
60TE (GN0038 001). Note that the 60TE cover also fits the 80TE case size of the relay.
The design of the relay is such that the fixing holes in the mounting flanges are only
accessible when the access covers are open and hidden from sight when the covers are
closed.
If a P991 or MMLG test block is to be included, it is recommended that, when viewed from
the front, it is positioned on the right-hand side of the relay (or relays) with which it is
associated. This minimises the wiring between the relay and test block, and allows the
correct test block to be easily identified during commissioning and maintenance tests.
P0146XXa
FIGURE 1 - LOCATION OF BATTERY ISOLATION STRIP

If it is necessary to test correct relay operation during the installation, the battery isolation
strip can be removed but should be replaced if commissioning of the scheme is not
imminent. This will prevent unnecessary battery drain during transportation to site and
installation. The red tab of the isolation strip can be seen protruding from the positive side of
the battery compartment when the lower access cover is open. To remove the isolation strip,
pull the red tab whilst lightly pressing the battery to prevent it falling out of the compartment.
When replacing the battery isolation strip, ensure that the strip is refitted as shown in figure
1, ie. with the strip behind the battery with the red tab protruding.
MiCOM P441/P442 & P444 Page 5/10
4.1 Rack mounting

MiCOM relays may be rack mounted using single tier rack frames (our part number FX0021
001), as illustrated in figure 2. These frames have been designed to have dimensions in
accordance with IEC60297 and are supplied pre-assembled ready to use. On a standard
483mm (19”) rack system this enables combinations of widths of case up to a total
equivalent of size 80TE to be mounted side by side.
P545 and P546 relays in 80TE cases are also available as direct 19” rack mounting ordering
variants, having mounted flanges similar to those shown in figure 2.
The two horizontal rails of the rack frame have holes drilled at approximately 26mm intervals
and the relays are attached via their mounting flanges using M4 Taptite self-tapping screws
with captive 3mm thick washers (also known as a SEMS unit). These fastenings are
available in packs of 5 (our part number ZA0005 104).
NOTE: Conventional self-tapping screws, including those supplied for
mounting MIDOS relays, have marginally larger heads which can
damage the front cover moulding if used.
Once the tier is complete, the frames are fastened into the racks using mounting angles at
each end of the tier.
P0147XXa
FIGURE 2 - RACK MOUNTING OF RELAYS

Relays can be mechanically grouped into single tier (4U) or multi-tier arrangements by
means of the rack frame. This enables schemes using products from the MiCOM and
MiDOS product ranges to be pre-wired together prior to mounting.
Where the case size summation is less than 80TE on any tier, or space is to be left for
installation of future relays, blanking plates may be used. These plates can also be used to
mount ancillary components. Table 1 shows the sizes that can be ordered.
Page 6/10 MiCOM P441/P442 & P444
Further details on mounting MiDOS relays can be found in publication R7012, “MiDOS Parts
Catalogue and Assembly Instructions”.
Case size summation Blanking plate part number

5TE GJ2028 001
10TE GJ2028 002
15TE GJ2028 003
20TE GJ2028 004
25TE GJ2028 005
30TE GJ2028 006
35TE GJ2028 007
40TE GJ2028 008
TABLE 1 - BLANKING PLATES

4.2 Panel mounting
The relays can be flush mounted into panels using M4 SEMS Taptite self-tapping screws
with captive 3mm thick washers (also known as a SEMS unit).
These fastenings are available in packs of 5 (our part number ZA0005 104).
NOTE: Conventional self-tapping screws, including those supplied for
mounting MIDOS relays, have marginally larger heads which can
damage the front cover moulding if used.
Alternatively tapped holes can be used if the panel has a minimum thickness of 2.5mm.
For applications where relays need to be semi-projection or projection mounted, a range of
collars are available.
Where several relays are to mounted in a single cut-out in the panel, it is advised that they
are mechanically grouped together horizontally and/or vertically to form rigid assemblies
prior to mounting in the panel.
NOTE: It is not advised that MiCOM relays are fastened using pop rivets as
this will not allow the relay to be easily removed from the panel in the
future if repair is necessary.
If it is required to mount a relay assembly on a panel complying to BS EN60529 IP52, it will
be necessary to fit a metallic sealing strip between adjoining relays (Part no GN2044 001)
and a sealing ring selected from Table 2 around the complete assembly.
MiCOM P441/P442 & P444 Page 7/10
Width Single tier Double tier

10TE GJ9018 002 GJ9018 018
15TE GJ9018 003 GJ9018 019
20TE GJ9018 004 GJ9018 020
25TE GJ9018 005 GJ9018 021
30TE GJ9018 006 GJ9018 022
35TE GJ9018 007 GJ9018 023
40TE GJ9018 008 GJ9018 024
45TE GJ9018 009 GJ9018 025
50TE GJ9018 010 GJ9018 026
55TE GJ9018 011 GJ9018 027
60TE GJ9018 012 GJ9018 028
65TE GJ9018 013 GJ9018 029
70TE GJ9018 014 GJ9018 030
75TE GJ9018 015 GJ9018 031
80TE GJ9018 016 GJ9018 032
TABLE 2 - IP52 SEALING RINGS

Further details on mounting MiDOS relays can be found in publication R7012, “MiDOS Parts
Catalogue and Assembly Instructions”.
Page 8/10 MiCOM P441/P442 & P444
5. RELAY WIRING
This section serves as a guide to selecting the appropriate cable and connector type for
each terminal on the MiCOM relay.
5.1 Medium and heavy duty terminal block connections
Loose relays are supplied with sufficient M4 screws for making connections to the rear
mounted terminal blocks using ring terminals, with a recommended maximum of two ring
terminals per relay terminal.
If required, AREVA T&D Protection & Control can supply M4 90° crimp ring terminals in three
different sizes depending on wire size (see Table 3). Each type is available in bags of 100.
Part number Wire size Insulation colour

ZB9124 901 0.25 – 1.65mm2 (22 – 16AWG) Red
ZB9124 900 1.04 – 2.63mm2 (16 – 14AWG) Blue
ZB9124 904 2.53 – 6.64mm2 (12 – 10AWG) Uninsulated*
TABLE 3 - M4 90° CRIMP RING TERMINALS

* To maintain the terminal block insulation requirements for safety, an insulating sleeve
should be fitted over the ring terminal after crimping.
The following minimum wire sizes are recommended:
Current Transformers 2.5mm2
Auxiliary Supply, Vx 1.5mm2

RS485 Port See separate section
Other circuits 1.0mm2

Due to the limitations of the ring terminal, the maximum wire size that can be used for any of
the medium or heavy duty terminals is 6.0mm2 using ring terminals that are not pre-
insulated. Where it required to only use pre-insulated ring terminals, the maximum wire size
that can be used is reduced to 2.63mm2 per ring terminal. If a larger wire size is required,
two wires should be used in parallel, each terminated in a separate ring terminal at the relay.
The wire used for all connections to the medium and heavy duty terminal blocks, except the
RS485 port, should have a minimum voltage rating of 300Vrms.
It is recommended that the auxiliary supply wiring should be protected by a 16A high rupture
capacity (HRC) fuse of type NIT or TIA. For safety reasons, current transformer circuits must
never be fused. Other circuits should be appropriately fused to protect the wire used.
5.2 RS485 port
Connections to the RS485 port are made using ring terminals. It is recommended that a 2
core screened cable is used with a maximum total length of 1000m or 200nF total cable
capacitance. A typical cable specification would be:
Each core: 16/0.2mm copper conductors
PVC insulated
Nominal conductor area: 0.5mm2 per core

Screen: Overall braid, PVC sheathed
MiCOM P441/P442 & P444 Page 9/10
5.3 IRIG-B connections (if applicable)
The IRIG-B input and BNC connector have a characteristic impedance of 50Ω. It is
recommended that connections between the IRIG-B equipment and the relay are made
using coaxial cable of type RG59LSF with a halogen free, fire retardant sheath.
5.4 RS232 port
Short term connections to the RS232 port, located behind the bottom access cover, can be
made using a screened multi-core communication cable up to 15m long, or a total
capacitance of 2500pF. The cable should be terminated at the relay end with a 9-way, metal
shelled, D-type male plug. Chapter 2, Section 3.7 of this manual details the pin allocations.
5.5 Download/monitor port
Short term connections to the download/monitor port, located behind the bottom access
cover, can be made using a screened 25-core communication cable up to 4m long. The
cable should be terminated at the relay end with a 25-way, metal shelled, D-type male plug.
Chapter 2, Section 3.7 of this manual details the pin allocations.
5.6 Earth connection
Every relay must be connected to the local earth bar using the M4 earth studs in the bottom
left hand corner of the relay case. The minimum recommended wire size is 2.5mm2 and
should have a ring terminal at the relay end. Due to the limitations of the ring terminal, the
maximum wire size that can be used for any of the medium or heavy duty terminals is
6.0mm2 per wire. If a greater cross-sectional area is required, two parallel connected wires,
each terminated in a separate ring terminal at the relay, or a metal earth bar could be used.
NOTE: To prevent any possibility of electrolytic action between brass or
copper earth conductors and the rear panel of the relay, precautions
should be taken to isolate them from one another. This could be
achieved in a number of ways, including placing a nickel-plated or
insulating washer between the conductor and the relay case, or using
tinned ring terminals.
Before carrying out any work on the equipment, the user should be familiar with the
contents of the Safety and Technical Data sections and the ratings on the equipment's
rating label
Page 10/10 MiCOM P441/P442 & P444
BLANK PAGE
Commissioning P44x/EN CM/E33
MiCOM P441/P442 & P444
COMMISSIONING
MiCOM P441/P442 & P444 Page 1/54
CONTENT
1. INTRODUCTION 3
2. SETTING FAMILIARISATION 4
3. EQUIPMENT REQUIRED FOR COMMISSIONING 5

3.1 Minimum Equipment Required 5
3.2 Optional Equipment 5
4. PRODUCT CHECKS 6
4.1 With the Relay De-energised 6
4.1.1 Visual Inspection 7
4.1.2 Current Transformer Shorting Contacts 8
4.1.3 External Wiring 9
4.1.4 Insulation 9
4.1.5 Watchdog Contacts 10
4.1.6 Auxiliary Supply 10
4.2 With the Relay Energised 10
4.2.1 Watchdog Contacts 10
4.2.2 Date and Time 10
4.2.3 With an IRIG-B signal 11
4.2.4 Without an IRIG-B signal 11
4.2.5 Light Emitting Diodes (LEDs) 11
4.2.6 Field Voltage Supply 12
4.2.7 Input Opto-isolators 12
4.2.8 Output Relays 13
4.2.9 Rear Communications Port 15
4.2.10 Current Inputs 16
4.2.11 Voltage Inputs 16
5. SETTING CHECKS 18
5.1 Apply Application-Specific Settings 18
5.2 Check Application-Specific Settings 18
5.3 Demonstrate Correct Distance Function Operation 19
5.3.1 Functional Tests : Start control & Distance characteristic limits 19
5.3.2 Distance scheme test (if validated in S1 & PSL) 34
5.3.3 Loss of guard/loss of carrier TEST 35
5.3.4 Weak infeed mode test 35
5.3.5 Protection function during fuse failure 36
P44x/EN CM/E33 Commissioning
Page 2/54 MiCOM P441/P442 & P444
5.4 Demonstrate Correct Overcurrent Function Operation 37

5.4.1 Connect the Test Circuit 37
5.4.2 Perform the Test 38
5.4.3 Check the Operating Time 38
5.5 Check Trip and Auto-reclose Cycle 39
6. ON-LOAD CHECKS 40
6.1 Voltage Connections 40
6.2 Current Connections 41
7. FINAL CHECKS 42
8. MAINTENANCE 43
8.1 Maintenance Period 43
8.2 Maintenance Checks 43
8.2.1 Alarms 43
8.2.2 Opto-isolators 43
8.2.3 Output Relays 43
8.2.4 Measurement accuracy 43
8.3 Method of Repair 44
8.3.1 Replacing the Complete Relay 44
8.3.2 Replacing a PCB 45
8.4 Recalibration 52
8.5 Changing the battery 52
8.5.1 Instructions for Replacing The Battery 52
8.5.2 Post Modification Tests 53
8.5.3 Battery Disposal 53
MiCOM P441/P442 & P444 Page 3/54
1. INTRODUCTION
The MiCOM P440 distance protection relays are fully numerical in their design, implementing
all protection and non-protection functions in software. The relays employ a high degree of
self-checking and, in the unlikely event of a failure, will give an alarm. As a result of this, the
commissioning tests do not need to be as extensive as with non-numeric electronic or
electro-mechanical relays.
To commission numeric relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay. It is
considered unnecessary to test every function of the relay if the settings have been verified
by one of the following methods:
Extracting the settings applied to the relay using appropriate setting software (Preferred
method)
Via the operator interface.
To confirm that the product is operating correctly once the application-specific settings have
been applied, a test should be performed on a single protection element.
Unless previously agreed to the contrary, the customer will be responsible for determining
the application-specific settings to be applied to the relay and for testing of any scheme logic
applied by external wiring and/or configuration of the relay’s internal programmable scheme
logic.
Blank commissioning test and setting records are provided at the end of this chapter for
completion as required.
As the relay’s menu language is user-selectable, it is acceptable for the Commissioning
Engineer to change it to allow accurate testing as long as the menu is restored to the
customer’s preferred language on completion.
To simplify the specifying of menu cell locations in these Commissioning Instructions, they
will be given in the form [courier reference: COLUMN HEADING, Cell Text]. For example,
the cell for selecting the menu language (first cell under the column heading) is located in the
System Data column (column 00) so it would be given as [0001: SYSTEM DATA,
Language].
Before carrying out any work on the equipment, the user should be familiar with the contents
of the ‘safety section’ and chapter P44x/EN IN, ‘installation’, of this manual.
Page 4/54 MiCOM P441/P442 & P444
2. SETTING FAMILIARISATION
When commissioning a MiCOM P440 relay for the first time, sufficient time should be
allowed to become familiar with the method by which the settings are applied.
Chapter P44x/EN IT contains a detailed description of the menu structure of the relays.
With the secondary front cover in place all keys except the [Enter] key are accessible. All
menu cells can be read. LEDs and alarms can be reset. However, no protection or
configuration settings can be changed, or fault and event records cleared.
Removing the secondary front cover allows access to all keys so that settings can be
changed, LEDs and alarms reset, and fault and event records cleared. However, menu cells
that have access levels higher than the default level will require the appropriate password to
be entered before changes can be made.
Alternatively, if a portable PC is available together with suitable setting software (such as
MiCOM S1), the menu can be viewed a page at a time to display a full column of data and
text. This PC software also allows settings to be entered more easily, saved to a file on disk
for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to
become familiar with its operation.
MiCOM P441/P442 & P444 Page 5/54
3. EQUIPMENT REQUIRED FOR COMMISSIONING

3.1 Minimum Equipment Required
Overcurrent test set with interval timer
110V ac voltage supply (if stage 1 of the overcurrent function is set directional)
Multimeter with suitable ac current range, and ac and dc voltage ranges of 0-440V and 0-
250V respectively
Continuity tester (if not included in multimeter)
Phase angle meter
Phase rotation meter
NOTE: Modern test equipment may contain many of the above features in
one unit.
3.2 Optional Equipment
Multi-finger test plug type MMLB01 (if test block type MMLG installed)
An electronic or brushless insulation tester with a dc output not exceeding 500V (For
insulation resistance testing when required).
A portable PC, with appropriate software (This enables the rear communications port to be
tested if this is to be used and will also save considerable time during commissioning).
KITZ K-Bus to RS232 protocol converter (if RS485 K-Bus port is being tested and one is not
already installed).
RS485 to RS232 converter (if RS485 Modbus port is being tested).
A printer (for printing a setting record from the portable PC).
Page 6/54 MiCOM P441/P442 & P444
4. PRODUCT CHECKS
These product checks cover all aspects of the relay that need to be checked to ensure that it
has not been physically damaged prior to commissioning, is functioning correctly and all
input quantity measurements are within the stated tolerances.
If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow their restoration later. This could be
done by:
• Obtaining a setting file on a diskette from the customer (This requires a portable PC
with appropriate setting software for transferring the settings from the PC to the relay)
• Extracting the settings from the relay itself (This again requires a portable PC with
appropriate setting software)
• Manually creating a setting record. This could be done using a copy of the setting
record located at the end of this chapter to record the settings as the relay’s menu is
sequentially stepped through via the front panel user interface.
If password protection is enabled and the customer has changed password 2 that prevents
unauthorised changes to some of the settings, either the revised password 2 should be
provided, or the customer should restore the original password prior to commencement of
testing.
NOTE: In the event that the password has been lost, a recovery password
can be obtained from AREVA by quoting the serial number of the
relay. The recovery password is unique to that relay and will not work
on any other relay.
4.1 With the Relay De-energised
The following group of tests should be carried out without the auxiliary supply being applied
to the relay and with the trip circuit isolated.
The current and voltage transformer connections must be isolated from the relay for these
checks. If an MMLG test block is provided, the required isolation can easily be achieved by
inserting test plug type MMLB01 which effectively open-circuits all wiring routed through the
test block.
Before inserting the test plug, reference should be made to the scheme (wiring) diagram to
ensure that this will not potentially cause damage or a safety hazard. For example, the test
block may also be associated with protection current transformer circuits. It is essential that
the sockets in the test plug which correspond to the current transformer secondary windings
are linked before the test plug is inserted into the test block.
DANGER: NEVER OPEN CIRCUIT THE SECONDARY CIRCUIT OF A CURRENT
TRANSFORMER SINCE THE HIGH VOLTAGE PRODUCED MAY BE
LETHAL AND COULD DAMAGE INSULATION.
If a test block is not provided, the voltage transformer supply to the relay should be isolated
by means of the panel links or connecting blocks. The line current transformers should be
short-circuited and disconnected from the relay terminals. Where means of isolating the
auxiliary supply and trip circuit (e.g. isolation links, fuses, MCB, etc.) are provided, these
should be used. If this is not possible, the wiring to these circuits will have to be
disconnected and the exposed ends suitably terminated to prevent them from being a safety
hazard.
MiCOM P441/P442 & P444 Page 7/54
4.1.1 Visual Inspection

Carefully examine the relay to see that no physical damage has occurred since installation.
The rating information given under the top access cover on the front of the relay should be
checked to ensure it is correct for the particular installation.
Ensure that the case earthing connections, bottom left-hand corner at the rear of the relay
case, are used to connect the relay to a local earth bar using an adequate conductor.
A B C D E F
P3001ENa
FIGURE 1A - REAR TERMINAL BLOCKS ON SIZE 40TE CASE (P441)
A B C D E F G H J
IRIG-B
TX
RX
P3002ENa
FIGURE 1B - REAR TERMINAL BLOCKS ON SIZE 60TE CASE (P442)

Page 8/54 MiCOM P441/P442 & P444
A B C D E F G H J K L M N
1
1
1
1 2 3 19
2
2
3
3
3
4 5 6 20
4
4
5
5
5
IRIG-B
6
6
6
7 8 9 21
7
7
8
8
9
9
9
10 11 12 22
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
13 14 15 23
13
13
13
13
13
13
13
13
TX
RX
14
14
14
14
14
14
14
14
15
15
15
15
15
15
15
15
16 17 18 24
16
16
16
16
16
16
16
16
17
17
17
17
17
17
17
17
18
18
18
18
18
18
18
18
P3003ENa
FIGURE 1C - REAR TERMINAL BLOCKS ON SIZE 80TE CASE (P444)

4.1.2 Current Transformer Shorting Contacts
If required, the current transformer shorting contacts can be checked to ensure that they
close when the heavy duty terminal block (block reference C in figure 1) is disconnected
from the current input PCB.
The heavy duty terminal block is fastened to the rear panel using four crosshead screws.
These are located top and bottom between the first and second, and third and fourth,
columns of terminals.
NOTE: The use of a magnetic bladed screwdriver is recommended to
minimize the risk of the screws being left in the terminal block or lost.
Pull the terminal block away from the rear of the case and check that all the shorting
switches being used are closed with a continuity tester. table 1 shows the terminals between
which shorting contacts are fitted.
19
1
2
3
20
4
4
5
6
21
7
8
9
10
11
12
22
10
11
12
13
14
15
23
13
14
16
17
18
24
15
16
17
18
Heavy duty terminal block Medium duty terminal block

P3004ENa
FIGURE 2 - LOCATION OF SECURING SCREWS FOR TERMINAL BLOCKS

MiCOM P441/P442 & P444 Page 9/54
Current Input Shorting contact between terminals

1A CT’s 5A CT’s
IA C3-C2 C1-C2
IB C6-C5 C4-C5
IC C9-C8 C7-C8
IM C12-C11 C10-C11
TABLE 1 - CURRENT TRANSFORMER SHORTING CONTACT LOCATIONS

4.1.3 External Wiring
Check that the external wiring is correct to the relevant relay diagram or scheme diagram.
The relay diagram number appears on the rating label under the top access cover on the
front of the relay. The corresponding connection diagram will have been supplied with the
AREVA order acknowledgement for the relay.
If an MMLG test block is provided, the connections should be checked against the scheme
(wiring) diagram. It is recommended that the supply connections are to the live side of the
test block (coloured orange with the odd numbered terminals (1, 3, 5, 7 etc.)). The auxiliary
supply is normally routed via terminals 13 (supply positive) and 15 (supply negative), with
terminals 14 and 16 connected to the relay’s positive and negative auxiliary supply terminals
respectively. However, check the wiring against the schematic diagram for the installation to
ensure compliance with the customer’s normal practice.
4.1.4 Insulation
Insulation resistance tests only need to be done during commissioning if it is required for
them to be done and they haven’t been performed during installation.
Isolate all wiring from the earth and test the insulation with an electronic or brushless
insulation tester at a dc voltage not exceeding 500V. Terminals of the same circuits should
be temporarily connected together.
The main groups of relay terminals are:
a) Voltage transformer circuits.
b) Current transformer circuits
c) Auxiliary voltage supply.
d) Field voltage output and opto-isolated control inputs.
e) Relay contacts.
f) S485 communication port.
g) Case earth.
The insulation resistance should be greater than 100MΩ at 500V.

On completion of the insulation resistance tests, ensure all external wiring is correctly
reconnected to the unit.
Page 10/54 MiCOM P441/P442 & P444
4.1.5 Watchdog Contacts

Using a continuity tester, check that the normally closed watchdog contacts are in the states
given in table 2 for a de-energised relay.
Terminals Contact State

Relay De-energised Relay Energised
F11-F12 (P441) Closed Open
J11-J12 (P442)
N11-N12 (P444)
F13-F14 (P441) Open Closed
J13-J14 (P442)
N13-N14 (P444)
TABLE 2 - WATCHDOG CONTACT STATUS

4.1.6 Auxiliary Supply
The relay can be operated from either a dc only or an ac/dc auxiliary supply depending on
the relay’s nominal supply rating. The incoming voltage must be within the operating range
specified in table 3.
Without energising the relay, measure the auxiliary supply to ensure it is within the operating
range.
Nominal Supply Rating DC Operating Range AC Operating Range

DC [AC rms]
24/54V [-] 19 - 65V -
48/110V [30/100V] 37 - 150V 24 - 110V
110/250V [100/240V] 87 - 300V 80 - 265V
TABLE 3 - OPERATIONAL RANGE OF AUXILIARY SUPPLY

It should be noted that the relay can withstand an ac ripple of up to 12% of the upper rated
voltage on the dc auxiliary supply.
DO NOT ENERGISE THE RELAY USING THE BATTERY CHARGER WITH THE BATTERY
DISCONNECTED AS THIS CAN IRREPARABLY DAMAGE THE RELAY’S POWER
SUPPLY CIRCUITRY.
Energise the relay if the auxiliary supply is within the operating range. If an MMLG test block
is provided, it may be necessary to link across the front of the test plug to connect the
auxiliary supply to the relay.
4.2 With the Relay Energised
The following group of tests verify that the relay hardware and software is functioning
correctly and should be carried out with the auxiliary supply applied to the relay.
The current and voltage transformer connections must remain isolated from the relay for
these checks.
4.2.1 Watchdog Contacts
Using a continuity tester, check the watchdog contacts are in the states given in table 3 for
an energized relay.
4.2.2 Date and Time
The date and time should now be set to the correct values. The method of setting will
depend on whether accuracy is being maintained via the optional Inter-Range
Instrumentation Group standard B (IRIG-B) port on the rear of the relay.
MiCOM P441/P442 & P444 Page 11/54
4.2.3 With an IRIG-B signal (models P442 or P444 only)

If a satellite time clock signal conforming to IRIG-B is provided and the relay has the optional
IRIG-B port fitted, the satellite clock equipment should be energised.
To allow the relay’s time and date to be maintained from an external IRIG-B source cell
[0804: DATE and TIME, IRIG-B Sync] must be set to ‘Enabled’.
Ensure the relay is receiving the IRIG-B signal by checking that cell [0805: DATE and TIME,
IRIG-B Status] reads ‘Active’.
Once the IRIG-B signal is active, adjust the time offset of the universal co-ordinated time
(satellite clock time) on the satellite clock equipment so that local time is displayed.
Check the time, date and month are correct in cell [0801: DATE and TIME, Date/Time]. The
IRIG-B signal does not contain the current year so it will need to be set manually in this cell.
In the event of the auxiliary supply failing, with a battery fitted in the compartment behind the
bottom access cover, the time and date will be maintained. Therefore, when the auxiliary
supply is restored, the time and date will be correct and not need to be set again.
To test this, remove the IRIG-B signal, then remove the auxiliary supply from the relay.
Leave the relay de-energized for approximately 30 seconds. On re-energisation, the time in
cell [0801: DATE and TIME, Date/Time] should be correct.
Reconnect the IRIG-B signal.
4.2.4 Without an IRIG-B signal
If the time and date is not being maintained by an IRIG-B signal, ensure that cell [0804:
DATE and TIME, IRIG-B Sync] is set to ‘Disabled’.
Set the date and time to the correct local time and date using cell [0801: DATE and TIME,
Date/Time].
In the event of the auxiliary supply failing, with a battery fitted in the compartment behind the
bottom access cover, the time and date will be maintained. Therefore when the auxiliary
supply is restored the time and date will be correct and not need to be set again.
To test this, remove the auxiliary supply from the relay for approximately 30 seconds. On re-
energisation, the time in cell [0801: DATE and TIME, Date/Time] should be correct.
4.2.5 Light Emitting Diodes (LEDs)
On power up the green LED should have illuminated and stayed on indicating that the relay
is healthy. The relay has non-volatile memory which remembers the state (on or off) of the
alarm, trip and, if configured to latch, user-programmable LED indicators when the relay was
last energised from an auxiliary supply. Therefore these indicators may also illuminate when
the auxiliary supply is applied.
Control the PSL activated in the internal logic.
If any of these LEDs are on then they should be reset before proceeding with further testing.
If the LEDs successfully reset (the LED goes out), there is no testing required for that LED
because it is known to be operational.
Testing the alarm and out of service leds
The alarm and out of service LEDs can be tested using the COMMISSIONING TESTS menu
column. Set cell [0F0D: COMMISSIONING TESTS, Test Mode] to ‘Enabled’. Check that the
alarm and out of service LEDs illuminate.
It is not necessary to return cell [0F0D: COMMISSIONING TESTS, Test Mode] to ‘Disabled’
at this stage because test mode will be required for later tests.
Testing the trip led
The trip LED can be tested by initiating a manual circuit breaker trip from the relay.
However, the trip LED will operate during the setting checks performed later. Therefore no
further testing of the trip LED is required at this stage.
Page 12/54 MiCOM P441/P442 & P444
Testing the user-programmable leds

To test the user-programmable LEDs set cell [0F10: COMMISSIONING TESTS, Test LEDs]
to ‘Apply Test’. Check that all 8 LEDs on the right-hand side of the relay illuminate.
4.2.6 Field Voltage Supply
The relay generates a field voltage of nominally 48V that should be used to energise the
opto-isolated inputs.
Measure the field voltage across the terminals given in table 4. Check that the field voltage
is present at each positive and negative terminal and that the polarity is correct.
Repeat for terminals 8 and 10.
Supply rail Terminals

P441 P442 P444
+48 Vdc F7 & F8 J7 & J8 N7 & N8
–48 Vdc F9 & F10 J9 & J10 N9 & N10
TABLE 4 - FIELD VOLTAGE TERMINALS

4.2.7 Input Opto-isolators
This test checks that all the opto-isolated inputs are functioning correctly. The P441 relays
have 8 opto-isolated inputs while P442 relays have 16 opto-isolated inputs and P444 relays
have 24 opto-isolated inputs.
The opto-isolated inputs should be energised one at a time. Ensuring correct polarity,
connect the field supply voltage to the appropriate terminals for the input being tested. The
opto-isolated input terminal allocations are given in table 5.
See hysteresis and settings about universal optos in chapter AP section 5.
NOTE: The opto-isolated inputs may be energised from an external 50V
battery in some installations. Check that this is not the case before
connecting the field voltage otherwise damage to the relay may result.
The status of each opto-isolated input can be viewed using cell [0020: SYSTEM DATA,
Opto I/P Status], a ‘1’ indicating an energised input and a ‘0’ indicating a de-energised input.
When each opto-isolated input is energised one of the characters on the bottom line of the
display will change to the value shown in table 5 to indicate the new state of the inputs.
Apply field voltage to terminals

P441 P442 P444
-ve +ve -ve +ve -ve +ve
Opto input 1 D1 D2 D1 D2 D1 D2
Opto input 9 E1 E2 E1 E2
MiCOM P441/P442 & P444 Page 13/54
Apply field voltage to terminals

P441 P442 P444
-ve +ve -ve +ve -ve +ve
Opto input 15 (P442 only) E13 E14 E13 E14
Opto input 16 (P442 only) E15 E16 E15 E16
Opto input 17 F1 F2
Opto input 18 F3 F4
Opto input 19 F5 F6
Opto input 20 F7 F8
Opto input 21 F9 F10
TABLE 5 - OPTO-ISOLATED INPUT TERMINALS

4.2.8 Output Relays
This test checks that all the output relays are functioning correctly. The P441 relays have 14
output relays , the P442 relays have 21 output relays and the P444 relays have 32 output
relays.
Ensure that the relay is still in test mode by viewing cell [0F0D: COMMISSIONING TESTS,
Test Mode].
The output relays should be energised one at a time. To select output relay 1 for testing, set
cell [0F0E: COMMISSIONING TESTS, Test Pattern] as shown in table 6.
Connect an continuity tester across the terminals corresponding to output relay 1 given in
table 6.
To operate the output relay set cell [0F0F: COMMISSIONING TESTS, Contact Test] to
‘Apply Test’. Operation will be confirmed by the continuity tester operating for a normally
open contact and ceasing to operate for a normally closed contact.
Reset the output relay by setting cell [0F0F: COMMISSIONING TESTS, Contact Test] to
‘Remove Test’.
NOTE: It should be ensured that thermal ratings of anything connected to the
output relays during the contact test procedure is not exceeded by the
associated output relay being operated for too long. It is therefore
advised that the time between application and removal of contact test
is kept to the minimum.
Repeat the test for relays 2 to 14 for P441 relays or relays 2 to 21 for P442 relays or relays 2
to 32 for P444 relays.
Page 14/54 MiCOM P441/P442 & P444
Output Monitor terminals

P441 P442 P444
N/C N/O N/C N/C N/O N/O
Relay 1 - E1-E2 - H1-H2 M1-M2
Relay 2 - E3-E4 - H3-H4 M3-M4
Relay 3 - E5-E6 - H5-H6 M5-M6
Relay 4 E7-E9 E8-E9 H7-H9 H8-H9 M7-M8
Relay 7 E16-E18 E17-E18 H16-H18 H17-H18 M13-M15 M14-M15
Relay 8 - B1-B2 - G1-G2 M16-M18 M17-M18
Relay 9 - B3-B4 - G3-G4 L1-L2
Relay 10 - B5-B6 - G5-G6 L3-L4
Relay 11 B7-B9 B8-B9 G7-G9 G8-G9 L5-L6
Relay 15 - F1-F2 L13-L15 L14-L15
Relay 16 - F3-F4 L16-L18 L17-L18
Relay 17 - F5-F6 K1-K2
Relay 18 F7-F9 F8-F9 K3-K4
Relay 19 F10-F12 F11-F12 K5-K6
Relay 20 F13-F15 F14-F15 K7-K8
Relay 21 F16-F18 F17-F18 K9-K10
Relay 22 K11-K12
Relay 23 K13-K15 K14-K15
Relay 24 K16-K18 K17-K18
Relay 25 J1-J2
Relay 26 J3-J4
Relay 27 J5-J6
Relay 28 J7-J8
Relay 29 J9-J10
Relay 30 J11-J12
Relay 31 J13-J15 J14-J15
Relay 32 J16-J18 J17-J18
TABLE 6 - RELAY OUTPUT TERMINALS AND TEST PATTERN SETTINGS

Return the relay to service by setting cell [0F0D: COMMISSIONING TESTS, Test Mode] to
‘Disabled’.
MiCOM P441/P442 & P444 Page 15/54
4.2.9 Rear Communications Port

This test should only be performed where the relay is to be accessed from a remote location
and will vary depending on the communications standard being adopted.
It is not the intention of the test to verify the operation of the complete system from the relay
to the remote location, just the relay’s rear communications port and any protocol converter
necessary.
4.2.9.1 Courier Communications
If a K-Bus to RS232 KITZ protocol converter is installed, connect a portable PC running the
appropriate software to the incoming (remote from relay) side of the protocol converter.
If a KITZ protocol converter is not installed, it may not be possible to connect the PC to the
type installed. In this case a KITZ protocol converter and portable PC running appropriate
software should be temporarily connected to the relay’s K-Bus port. The terminal numbers
for the relay’s K-Bus port are given in table 7. However, as the installed protocol converter is
not being used in the test, only the correct operation of the relay’s K-Bus port will be
confirmed.
Connection Terminal
K-Bus Modbus or VDEW P441 P442 P444
Screen Screen F16 J16 N16
1 +ve F17 J17 N17
2 –ve F18 J18 N18
TABLE 7 - RS485 TERMINALS

Ensure that the communications baud rate and parity settings in the application software are
set the same as those on the protocol converter (usually a KITZ but could be a SCADA
RTU). The relay’s Courier address in cell [0E02: COMMUNICATIONS, Remote Address]
must be set to a value between 0 and 255.
Check that communications can be established with this relay using the portable PC.
4.2.9.2 Modbus Communications
Connect a portable PC running the appropriate Modbus Master Station software to the
relay’s RS485 port via a RS485 to RS232 interface converter. The terminal numbers for the
relay’s RS485 port are given in table 7.
Ensure that the relay address, baud rate and parity settings in the application software are
set the same as those in cells [0E03: COMMUNICATIONS, Remote Address], [0E06:
COMMUNICATIONS, Baud Rate] and [0E07: COMMUNICATIONS, Parity] of the relay.
Check that communications with this relay can be established.
4.2.9.3 IEC60870-5-103 (VDEW) Communications
If the relay has the optional fibre optic communications port fitted, the port to be used should
be selected by setting cell [0E09: COMMUNICATIONS, Physical Link] to ‘Fibre Optic’ or
‘RS485’.
IEC60870-5-103/VDEW communication systems are designed to have a local Master Station
and this should be used to verify that the relay’s fibre optic or RS485 port, as appropriate, is
working.
Ensure that the relay address and baud rate settings in the application software are set the
same as those in cells [0E03: COMMUNICATIONS, Remote Address] and [0E06:
COMMUNICATIONS, Baud Rate] of the relay.
Check that, using the Master Station, communications with the relay can be established.
Page 16/54 MiCOM P441/P442 & P444
4.2.10 Current Inputs

This test verifies that the accuracy of current measurement is within the acceptable
tolerances.
All relays will leave the factory set for operation at a system frequency of 50Hz. If operation
at 60Hz is required then this must be set in cell [0009: SYSTEM DATA, Frequency].
Apply current equal to the line current transformer secondary winding rating to the each
current transformer input of the corresponding rating in turn, checking its magnitude using a
multimeter. Refer to table 8 for the corresponding reading in the relay’s MEASUREMENTS
1 column and record the value displayed.
Cell in MEASUREMENTS 1 column (02) Apply current to

1A line CT 5A line CT
[0201: IA Magnitude] C3-C2 C1-C2
[0203: IB Magnitude] C6-C5 C4-C5
[0205: IC Magnitude] C9-C8 C7-C8
[0207: IM Magnitude] C12-C11 C10-C11
TABLE 8 - CURRENT INPUT TERMINALS

The measured current values on the relay will either be in primary or secondary Amperes. If
cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on
the relay should be equal to the applied current multiplied by the corresponding current
transformer ratio set in the ‘VT and CT RATIOS’ menu column (see table 9). If cell [0D02:
MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the value displayed should be
equal to the applied current.
The measurement accuracy of the relay is ±1%. However, an additional allowance must be
made for the accuracy of the test equipment being used.
Cell in MEASUREMENTS 1 column (02) Corresponding CT Ratio

(in ‘VT and CT RATIO column (0A) of menu)
[0201: IA Magnitude] [0A07:Phase CT Primary]
[0203: IB Magnitude] [0A08:Phase CT Sec'y]
[0205: IC Magnitude]
[022F: IM Mutual Current Mag] [0A0B:MComp/CT Primary]
[0A0C: MComp/CT Sec'y]
TABLE 9 - CT RATIO SETTINGS

4.2.11 Voltage Inputs
This test verifies the accuracy of voltage measurement is within the acceptable tolerances.
Apply rated voltage to each voltage transformer input in turn, checking its magnitude using a
multimeter. Refer to table 8 for the corresponding reading in the relay’s MEASUREMENTS
1 column and record the value displayed.
Cell in MEASUREMENTS 1 column (02) Voltage applied To

[021A: VAN Magnitude] C19-C22
[021C: VBN Magnitude] C20-C22
[021E: VCN Magnitude] C21-C22
∗
[022B: C/S Voltage Mag] C23-C24
TABLE 10 - VOLTAGE INPUT TERMINALS
∗ Voltage reference for synchrocheck

Can be PGnd or PP reference with VT bus side or VT line
(see setting description in chapter AP section 4.4)
MiCOM P441/P442 & P444 Page 17/54
The measured voltage values on the relay will either be in primary or secondary volts. If cell
[0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on the
relay should be equal to the applied voltage multiplied by the corresponding voltage
transformer ratio set in the ‘VT and CT RATIOS’ menu column (see table 11). If cell [0D02:
MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the value displayed should be
equal to the applied voltage.
The measurement accuracy of the relay is ±2%. However, an additional allowance must be
Cell in MEASUREMENTS 1 column (02) Corresponding VT Ratio

(in ‘VT and CT RATIO column (0A) of menu)
[021A: VAN Magnitude] [0A01:Main VT Primary]
[021C: VBN Magnitude] [0A02:Main VT Sec'y]
[021E: VCN Magnitude]
[022B: C/S Voltage Mag] [0A03:C/SVT Primary]
[0A04: C/SVT Sec'y]
TABLE 11 - VT RATIO SETTINGS

Page 18/54 MiCOM P441/P442 & P444
5. SETTING CHECKS
The setting checks ensure that all of the application-specific relay settings (i.e. both the
relay’s function and programmable scheme logic settings) for the particular installation have
been correctly applied to the relay.
If the application-specific settings are not available, ignore sections 5.1 and 5.2.
5.1 Apply Application-Specific Settings
There are two methods of applying the settings:
• Transferring them from a pre-prepared setting file to the relay using a portable PC
running the appropriate software (see compatibility with S1 version in chapter VC) via
the relay’s front RS232 port, located under the bottom access cover, or rear
communications port (with a KITZ protocol converter connected). This method is the
preferred for transferring function settings as it is much faster and there is less margin
for error. If programmable scheme logic other than the default settings with which the
relay is supplied are to be used then this is the only way of changing the settings.
If a setting file has been created for the particular application and provided on a
diskette, this will further reduce the commissioning time and should always be the
case where programmable scheme logic changes are to be applied to the relay.
• Enter them manually via the relay’s operator interface. This method is not suitable for
changing the programmable scheme logic.
5.2 Check Application-Specific Settings

The settings applied should be carefully checked against the required application-specific
settings to ensure they have been entered correctly. However, this is not considered
essential if a customer-prepared setting file has been transferred to the relay using a
portable PC.
There are two methods of checking the settings:
• Extract the settings from the relay using a portable PC running the appropriate
software via the front RS232 port, located under the bottom access cover, or rear
communications port (with a KITZ protocol converter connected). Compare the
settings transferred from the relay with the original written application-specific setting
record. (For cases where the customer has only provided a printed copy of the
required settings but a portable PC is available).
• Step through the settings using the relay’s operator interface and compare them with
the original application-specific setting record.
Unless previously agreed to the contrary, the application-specific programmable scheme
logic will not be checked as part of the commissioning tests.
Due to the versatility and possible complexity of the programmable scheme logic, it is
beyond the scope of these commissioning instructions to detail suitable test procedures.
Therefore, when programmable scheme logic tests must be performed, written tests which
will satisfactorily demonstrate the correct operation of the application-specific scheme logic
should be devised by the Engineer who created it. These should be provided to the
Commissioning Engineer together with the diskette containing the programmable scheme
logic setting file.
MiCOM P441/P442 & P444 Page 19/54
5.3 Demonstrate Correct Distance Function Operation

5.3.1 Functional Tests : Start control & Distance characteristic limits
Despite of working in 100% numeric technology some tests could be performed in order to
control the good feature of the relay; regarding the different choices in the functions and
settings (settings of protection (with S1/settings & records) and logical schemes (with
S1/PSL Editor)) .
Subsection 5.3.2. explains point by point the steps to follow for providing a complet control of
every distance protection functions of the relay (with the factory’s settings & PSL : "P&C by
default").
In case of relay’s or application’s failure :
WARNING: COME BACK TO THE BASIC CONFIGURATION (SETTINGS & PSL)
THEN VALID THE TESTS FOLLOWING THE ENCLOSED DESCRIPTION
(this manipulation can be achieved by lcd in front face (configuration/restore
defaults/all settings+valid))
see chapter ap section 4.9/4.10 & 5 as well "test tools" for a diagnosis help
in case of failing (method/event/disturbance records/zgraph)
Default Password if requested for validation of settings is :
AAAA
N.B. : Every action managed by a laptop, could be done as well by the LCD
front panel (only PSL and Text Editor use a computer)
5.3.1.1 Measurements’ control :

Before starting tests, perform the following injections on secondary side of the relay :
IA 0,2 IN 0°
Currents IB 0,4 IN - 120°
IC 0,8 IN + 120°
TEST 1
VAN 30 V 0°
Voltages VBN 40 V - 120°
VCN 50 V + 120°
− Control the displayed values in the relay’s front face (LCD) : "system/meas1"
− Secondary values in amplitude and phase
− Or primary values (control of ratios VT & CT) – If selected in MiCOM S1 – See Fig 3.
Page 20/54 MiCOM P441/P442 & P444
Control of ratios VT & CT
Control the measurement reference

W0001ENa
FIGURE 3
NB1 : Control the measurement reference (ref. angle of phase shift) in :
"Measurt set up/Measurement ref." (VA by default).
The monitoring can be selected also in MiCOM S1 for providing a polling of the network
parameters (I/U/P/Q/f…)
NB2 : In LCD : IN=3I0
After this step the mistakes on phases orders, ratios of CT, VT and
wiring (Analogic input only) will be detected.
NB3 : See connections drawing in P44x/EN CO
NB4 : See LCD structure in test tools
MiCOM P441/P442 & P444 Page 21/54
FIGURE 4 - MEASUREMENT 1/LCD MENU

(see complete description of menu in chapter HI)
Control of the polarisation of the protection : inject a three-phase symmetrical charge
according to the following table :
IA IN 20°
Currents IB IN -100°
IC IN +140°
TEST 2
VAN 57 V 0°
Voltages VBN 57 V -120°
VCN 57 V +120°
− If one phase is missing the output Fuse Failure alarm will pick up & the led general
alarm in the front panel will light up (see FFU description P44x /EN AP)
− According to the measurement mode chosen we will get

Page 22/54 MiCOM P441/P442 & P444
(S1/Measurement setup/Measurement mode):
Measurement mode 0 1 2 3
P + - + -
Q - - + +
Selected in S1 by:
W0002ENa
FIGURE 5
Mode 0 Mode 1 Mode 2 Mode 3
P P P P
i u u i u u i u u i u u
i i i i
Q Q Q Q
i u u i u u i u u i u u
i i i i P3014ENa
FIGURE 6
− Control the signs of values P,Q to LCD ("Measurements 2 ") – settable with LCD (see
figure 5)
The primary side orientation remains to be achieved (repeat
previously points with a primary injection)
See LCD Structure in chapter HI
MiCOM P441/P442 & P444 Page 23/54
MEASURE'T SETUP
Default Display Default Display Measurement Ref

Description Description VB
Default Display Measurement Ref Measurement Ref

Date and Time VA VA
Default Display Measurement Ref

P-P IA
Default Display Measurement Ref

U - I Freq IB
Default Display
Plant Reference
Local Values Local Values Measurt Mode Measurt Mode

Secondary Secondary 0 0
Local Values Measurt Mode

Primary 1
Remote Values Remote Values Demand Interval Demand Interval

Secondary Secondary 30.00 mins 30.00 mins
Remote Values Demand Interval

Primary 29.00 mins
P3016ENa
FIGURE 7 - MEASUREMENT SETUP/LCD MENU

Page 24/54 MiCOM P441/P442 & P444
5.3.1.2 Default simulation principle

To simulate a single-phase fault
The distance protection detects a single-phase default in E if the impedance and phase of
this point place it inside the characteristic. The relation of impedance and phase with the
voltage and current injected is as follows :
− Fault Impedance Z = Vphase/Iphase ;
− Fault Phase • = phase-shift(Vphase, Iphase) ;
− The Vphase voltage has to remain lower than the rated voltage value
Test of the impedance for zone 1 :
I1 = 1A
ϕ1 = line angle = 76°

V1
= Zfault = Zd (1 + k0) + Rfault
I1
Rfault = R loop
Distance X
Xlim
E
Z
-Rlim ϕ Resistance R
Rlim
P3017ENa
FIGURE 8 - CHARACTERISTIC’S POINT DETERMINATION

(RLIM BIPHASE & SINGLEPHASE CAN BE DIFFERENT)
The angle of Characteristic is:
• For phase to phase: Argument of the positive impedance of the line (Z1)
• For phase to ground : Argument of 2Z1+Z0

Characteristic of the relay can be created and displayed with Zgraph (MiCOM Zgraph
software is a tool delivered with the protection – available in the CD-ROM "MiCOM P440
User " ) – see the "test tools"
MiCOM P441/P442 & P444 Page 25/54
W0003ENa
FIGURE 9 - EXAMPLE OF ZGRAPH SCREEN

(RIO FORMAT CAN BE CREATED AS WELL)
W0004ENa
FIGURE 10 - EVOLVING IMPEDANCE FROM THE LOAD AREA TO THE FINAL FAULT IMPEDANCE IN
ZONE1
To simulate a default in a zone, it’s necessary to vary progressively the current to move the
point from the load area inside the desired zone.
A single-phase starting characteristic with different values of K0 can be created :
(K0x = (Zx0 - Z1) /(3 Z1) (See P44x /EN AP).
(In S1 there are up to four possibilities KZ1 & KZ2, KZp, KZ3/4)
This solution is carried in case of the underground cable/overhead line section (KZ1
different from KZ2 = KZp = KZ3/4) where arguments between Z01 & Z02 can be very
different (HV Line at 80° and cable at 45°).
Nevertheless the most common injection devices don’t offer the possibility to manage
several values of K0 (the same for ZGraph) ; so it will be necessary for an accurate control of
zones limits,to generate several characteristics files (as much Rio file as KZ values – ref to
ZGraph user ).
Page 26/54 MiCOM P441/P442 & P444
W0005ENa
FIGURE 11 - SINGLE CHARACTERISTIC WITH P FORWARD ZONE

Z1, Z2, Z3, Zp, Z4 : limits of zone 1, 2, 3, p, 4
R1G, R2G, R3G, RpG : limits in resistance of zone 1, 2, 3, p, 4 for single-phase fault.
K01, K02, K03, K0p :ground compensation coefficient of zone 1, 2, 3, p
Zone 1, 2, 3 & P can have different limit in resistance and ground coefficient. Zones 3 et 4
(Starting zone) have the same resistance sensitivity and ground compensation coefficient.
The ground compensation coefficient depends of the line’s characteristic on each zone.
2x Z1+Zx0
Line angle : ϕpg = Arg where Zx0 is the zero sequence impedance for zone x
3
and Z1 is the positive impedance.
Cover of zones
Different lines angles for each single-phase characteristic zone can be defined. And,
following the configuration of each zone, some intersections between zone could occur.
W0006ENa
FIGURE 12
MiCOM P441/P442 & P444 Page 27/54
In the characteristic above, the marked parts A, B et C are intersections between several
zones.
• The surface A is considered as being in zone 1.
• The surface B is not a part of the characteristic (no start element).
• The surface C is not a part of the starting characteristic.(New logic will be

implemented in next version A4.0 for keeping fwd Z1 detection in the surface C (even
with a negative fault reactance value bigger than the reverse limit X4) )
Coherency:
To have a homogeneous characteristic, it’s necessary that the characteristic’s different
parameters respect the equations as follows: (No blocking coherency test is provided by the
internal logic control of the relay)
− if zone P is a forward zone :
− Z1 < Z1ext < Z2 < Zp < Z3
− tZ1 < tZ2 < tZp < tZ3
− R1G ≤ R2G ≤ RpG ≤ R3G
− R1Ph ≤ R2Ph ≤ RpPh ≤ R3Ph
− if zone P is a reverse zone :
− Z1 < Z1ext < Z2 < Z3
− Zp < Z4
− tZ1 < tZ2 < tZ3
− tZp < tZ4
− R1G ≤ R2G ≤ R3G
− RpG ≤ R4G
− R1Ph ≤ R2Ph ≤ R3Ph
− RpPh ≤ R4Ph
− The Z minimum value measured by the relay is: 60 mohms (Z1mini adjusted in S1, is
1ohm with CT 1Amp & 200 mohms with CT 5Amp)
− There is no limit for the R/X ratio, because a floating point processor is used for the R
calculation & X calculation (separated dynamic range for each calculation). In
consequence the limit will be given by the angle error of the CT.
For example in PUR with CT accuracy angle at 1° (for IN) it gives a R/X = 5,7 – for keeping
10% of error in the X1 measurement.
• Limit of R: min 0 /Max 80 ohms (CT 5Amp) – min 0/Max400 ohms (CT 1Amp)
• Limit of X: min0,2/100 ohms (CT 5Amp) – min1/Max 500 ohms (CT 1Amp)
Page 28/54 MiCOM P441/P442 & P444
To simulate a two-phase fault

The two-phase fault simulation principle is the same as the one used to simulate a single-
phase fault but :
− the voltage reference is the line to line voltage between phases, Uab for example;
− the reference current is the difference between the phases current, Ia - Ib for example;
− The fault impedance Z = (Uphase-phase/(Iphase1 - Iphase2)).
− the R1M point (single phase) is replaced by the R1ph point.(Biphase)

Two-phase characteristic with reverse zone P:
W0007ENa
U12
Fault simulation = 2 x Zd + Rfault
I1
With :
U12 : fault voltage phase-to-phase
I1 : fault current
ϕ1 : fault angle
Rfault = R loop
For a triphase fault :
V1 Rfault
Fault simulation = Zd +
I1 2
With :
V1 : fault voltage phase-to-phase
I1 : fault current
ϕ1 : fault angle
Remark : With z graph’s help a Rio format characteristic can be created. This
Rio file can be loaded in a numeric injector which accept this kind of
files. The active settings (distance elements) can be modified by
Zgraph and relay can be upgraded with new distance parameters
For more precision refer to item: Test tools : "Z graph user "
MiCOM P441/P442 & P444 Page 29/54
5.3.1.3 Control & Test of starting characteristics

IN THIS PART – TESTS ARE DESCRIBED WITH THE DEFAULT
PARAMETERS (AREVA T&D EAI )
Open the file corresponding to the MiCOM characteristic. (see item :test tools/S1 user) If
none change have been achieved, we get those values (Zgraph screen):
W0008ENa
FIGURE 13
Control of single-phase fault characteristic’
CAUTION : IF DIFFERENT K0 ARE USED – SEE § 5.3.1.2
1. Energise MiCOM P440 with a healthy 3phase network (without unbalanced condition)
with load (during a minimum time of 500 msec). This is for:
– Enabling the use of deltas algorithms
– Avoiding the start of SOTF logic (see SOTF logic description in P44x /EN AP)
2. Reduce the current value to obtain a relation between V et I following the attached
table (For Rlim – phase-shift at 0°, for Z limit – phase-shift corresponding to Z1 (in
multiphase default) or corresponding to 2Z1+Z0 (in single fault).
3. Check that the tripping order (DDB: Any trip / Any Trip A/ Any Trip B/ Any Trip C – see
in the chapter AP section 6.3 ”output contact mapping”, the description of DDB for
models 01 to 06) is transmitted when the concerned zone time delay is issued.(For
distance scheme with transmission and all distance trip logic see in P44x /EN AP).
NOTE : The DDB signal any Trip A is a OR gate between
Ext Trip A
Int Trip A
4. See as well the test report model provided in chapter RS Test tools.
5. Control also in the PSL (programmable scheme logic) the tripping orders addressing
(Any Trip is linked by default to the relay 7).
By default: see the wiring diagram in chapter CO (for assignment of inputs/outputs).
Usefultip: - For controlling the logic level of internal datas (DDB cells), all or part of the 8 red
led in the front panel could be assigned using the PSL.
Page 30/54 MiCOM P441/P442 & P444
LED 8
Z1
Z1 Latching
DDB #191 DDB #069
Z2
LED 7
Z2 Latching DDB #070
DDB #193
Non- LED 8
T2
T2
DDB #198 Latching DDB #071
P3018ENa
FIGURE 14
If Led are latched, the reset latch could be activated by a dedicated PSL, to avoid useless
keyboard access: during the tests :
Any Start Reset Latches

DDB #253 DDB #118
P3019ENa
FIGURE 15
Usefultip: - For controlling the logic level of internal datas (DDB cells), monitor bit control can
be used in "commissioning Test/Opto/Relay/Test port status/Led status/Monitor bit1 to bit
8".Any cells from the DDB can be assigned and then displayed as 1 of the 8 bits.(See User
Tools )
NB1: See LCD structure in chapter HI
COMMISSION TESTS
Opto I/P Status

0000000000100
Monitor Bit 1
Relay O/P Status 64
0000000000100
Monitor Bit 1 Monitor Bit 1
64 64
Test port Status Monitor Bit 1

00000000 64

65 65
LED Status
00000000

71 71
P3020ENa
FIGURE 16 - LCD MENU FOR A CONTROL OF INPUT/OUTPUT/ & MONITOR BITS CONTROL
MiCOM P441/P442 & P444 Page 31/54
Test point I,V phase shift

Tripping time
B :Bi M :mono (I is behind V)
R1 B 0° T1
R1 M 0° T1
R2 B 0° T2
R2 M 0° T2
Rp B 0° Tp
Rp M 0° Tp
R3 B 0° T3
R3 M 0° T3
- R Lim = -R3 0° T4
Z1 B Arg Zd T1
Z1 M Arg (2Zd+Z0) T1
Z2 B Arg Zd T2
Zp B Arg Zd Tp
Zp M Arg (2Zd+Z0) Tp
Z3 B Arg Zd T3
Z4 B Arg Zd T4
TABLE 12 - PARAMETERS OF ZONE TO TEST

(ZP CAN BE REVERSE OR FORWARD / EACH ZONES CAN BE ENABLE OR DISABLE – Z IS ALWAYS
ACTIVATED)
NB : R3 represents the starting limit on R axis (detection sensitivity of
resistive defaults – The starting element for phase/ground can be
superior to the phase/phase). If the reverse zone has been
deactivated (Z4), it still exists a no-tripping zone (up to version A3.2 &
2.10) in the 4th quadrant below the R axis.
Zone has been deactivated (Z4)
W0009ENa
Page 32/54 MiCOM P441/P442 & P444
W0010ENa
If Z3 is deactivated, the resistance limits R3-R4 are not more visible in S1.
NOTE : All other characteristic point can be tested after having calculated the
impedance and the phase shift between U et I.
NOTE : All these examples use the default settings.
W0011ENa
FIGURE 17 - EXAMPLE : AN- LIM Z1
VAN/IA = Zf =Z1(1+K01) 40V/2A (phase shift of –70°) =20Ω = Z1(1+1)
Lim Z1=10Ω (si KO1=1)
W0012ENa
FIGURE 18 - EXAMPLE : AB - LIMR2

VAB = 2 sin 34,72° * 35,12=40v / IAB=2A
UAB/IA (in phase) =Rf=20Ω=LimR2

MiCOM P441/P442 & P444 Page 33/54
W0013ENa
FIGURE 19 - EXAMPLE : ABC-LIMZ4 (REVERSE)
VAN/IAN = Zf=Rf=20V/0,500mA=40Ω=Lim Z4 with angle(VAN/IAN)=70°-180°=-110°

NOTE : The simulator use generating transients superior to 0,2 In on currents
when fault condition generation can induce mistake about the
directional calculation with algorithms "Deltas". This mistake is du to
simulator boxes which not always reflect the real conditions of fault
appearance during the transient condition. To avoid this trouble during
the starting zones checking we advice you to inhibit algorithms
"Deltas" during the characteristics path by setting T1 at 50ms (beyond
40ms, algorithms "Deltas" are no more valid). It is the case about
numeric injection boxes.
NOTE : Control in the injection device, if any possibility of DC component
could be chosen to force the start of the faulty current at 0 (If not -
model network could be not realistic)
Z3
Z2
Z1
- Rlim R1 R2 R3
-Zp
W0014ENa
FIGURE 20 - POINTS LIMIT OF THE CHARACTERISTIC TO BE TESTED

(WITH ZP SELECTED AS A REVERSE ZONE)
Page 34/54 MiCOM P441/P442 & P444
5.3.2 Distance scheme test (if validated in S1 & PSL)

5.3.2.1 Control
• The type of distance scheme enable in S1
• The DDB cells assigned for distance scheme
• Ref to the description feature in P44x /EN AP item 2.4 & 2.5:
⇒ Settings in S1
⇒ DDB cells
⇒ Internal logic in A2.10 & A3.2

REMINDER: General equation to the tripping in distance protection since
A2.9/A3.1 – From A2.10/A3.2 could be found in the Chap EN AP –
item 2.5
NOTE : Before tests, control the input presence /Output in PSL (See chapter
AP section 6.2 & 6.3) linked to the selected teleaction scheme (DDB :
DistCR/Dist CS/).Control as well the I/O condition change (on LCD in
FAV in "system ")
Input :(PSL by default "P&C ") Output : (PSL by default "P&C ")
WARNING : TAKE CARE ABOUT THE CHANGEMENT OF GROUP BY OPTOS
– IF SELECTED IN S1 (OPTO 1 & 2 IN THAT CASE SWITCHING GROUPS
BY OPTOS)
– IF USED FOR SWITCHING GROUP (OPTO 1 & 2 MUST BE ABSENT
FROM THE PSL)
Opto Label 01 DEF. Chan Recv

DDB #032 DDB #097
Opto Label 01 DEF. Chan Recv

DDB #032 DDB #096
Signal Send (Dist + DEF)
Opto Label 02 DIST. COS DIST Sig Send

DDB #033 DDB #099 DDB #178 0
Relay Label 05
DIST Sig Send
1 Pick-Up DDB #004
Opto Label 02 DIST. COS 0
DDB #033 DDB #207
DDB #098
P3021ENa
1. From MiCOM S1, select a one of the mode in the table 5.6 in P44x /EN AP (last
column).
2. Implement the indicated default in the panel first column , The carrier signal input
being activated (with TAC).
3. Check the tripping contact have been energised at the issue of the indicated time
delay indicated in the same column (With TAC).
4. Repeat step 2 and 3 but without teleaction input and by checking the indicated time
delay in the panel’s 2nd column (Without TAC).
Repeat step 2 and 4 for the others zones defaults by checking, whatever the teleaction input
condition, the associated time delays to every zones are not modified (according to the 4th
column equations)
NOTE : – TAC can be simulated by inverting the opto.
– TAC transmissions can also be checked by generating
defaults according to the 3rd column.
– To make easy the relay I/O control condition, the LEDs
affectation in PSL can be modified. Another possibility is in S1 –
See Testing tools (monitor bit control).
MiCOM P441/P442 & P444 Page 35/54
5.3.3 Loss of guard/loss of carrier TEST

If this function have been validated in S1 (See chap P44x /EN AP):
TEST : Follow the truth table in P44x /EN AP item 2.6.4

NOTE : In case of TAC loss the scheme Z1X(out fail) will be applied if selected
in S1
5.3.4 Weak infeed mode test
From MiCOM S1
(If Permissive schemes validated in S1 :4 possible choices):fig winf1
FIG WINF2
Page 36/54 MiCOM P441/P442 & P444
Put into service the weak infeed mode (Possibility of Single pole except for P441) ;
1. Inhibit tripping authorisation and phase selection.
2. Activate the teleaction input.
3. Check :
- the teleaction transmission signal is activated;
- the tripping contact is not activated.
From MiCOM S1, validate the three-phase authorisation.
FIGURE 21
2. Check:
- the teleaction signal is activated ;
- the tripping contacts closing.
From MiCOM S1, validate the minimum voltage phase selection, set under voltage
threshold to 0,4 Vn, put VB = -VC = Vn, validate the single phase tripping
authorisation.
2. Check :
- the teleaction transmission signal is activated;
- the protection trips the phase A single phase.
5.3.5 Protection function during fuse failure
See internal logic description in P44x /EN AP – item 4.2
Relay locking (1 or 2 phases loss)
1. Supply MiCOM P440 with a "healthy" network with charge:
2. Take off the A phase supply .((V0) & (/I0) creation)
3. Check :
- the fuse failure sign is activated at the end of the time delay sign;
- The protection starting and tripping sign are not activated.
Relay unlocking
1. Keep the A phase supply cut and make a fault (Single or two) of which the fault
current (IR>3I0) is superior to the programmed threshold.(I2 or I0)
2. Check the tripping contact is activated.
Relay locking (3 phases loss)
1. Repeat the 1 then open the 3 voltages channels without creating delta I. Check as in 3
MiCOM P441/P442 & P444 Page 37/54
Outside sign :
1. Polarised the input : and check the outputs change condition :
Sign repercussions :
The sign (VT fail alarm) fall if :
MCB/VTS Line VTS Fast

DDB #101 DDB #263
MCB/VTS Bus VT Fail Alarm

DDB #100 DDB #132
P3022ENa
Fuse_Failure = 0
and
INP_FFUS_Line = 0
and
(All Pole Dead Or healthy network)
All Pole Dead :
No current And no voltage on the line or open circuit-breaker
Healthy network :
Rated voltage on the line And
− No zero sequence voltage and current And
− No starting And
− No pumping
5.4 Demonstrate Correct Overcurrent Function Operation
This test, performed on stage 1 of the overcurrent protection function in setting group 1,
demonstrates that the relay is operating correctly at the application-specific settings.
It is not considered necessary to check the boundaries of operation where cell [3502:
GROUP 1 OVERCURRENT, I>1 Direction] is set to ‘Directional Fwd’ or ‘Directional Rev’ as
the test detailed already confirms the correct functionality between current and voltage
inputs, processor and outputs and earlier checks confirmed the measurement accuracy is
within the stated tolerance.
5.4.1 Connect the Test Circuit
Determine which output relay has been selected to operate when an I>1 trip occurs by
viewing the relay’s programmable scheme logic.
The programmable scheme logic can only be changed using the appropriate software. If this
software has not been available then the default output relay allocations will still be
applicable.
If the trip outputs are phase-segregated (i.e. a different output relay allocated for each
phase), the relay assigned for tripping on ‘A’ phase faults should be used.
If stage 1 is not mapped directly to an output relay in the programmable scheme logic, output
relay 3 should be used for the test as it operates for any trip condition.
The associated terminal numbers can be found either from the external connection diagram
(P44x/EN CO) or table 5.
Connect the output relay so that its operation will trip the test set and stop the timer.
Connect the current output of the test set to the ‘A’ phase current transformer input of the
relay (terminals C3 and C2 where 1A current transformers are being used and terminals C1
and C2 for 5A current transformers).
Page 38/54 MiCOM P441/P442 & P444
If [3502: GROUP 1 OVERCURRENT, I>1 Direction] is set to ‘Directional Fwd’, the current
should flow out of terminal C2 but into C2 if set to ‘Directional Rev’.
If cell [351D: GROUP 1 OVERCURRENT, VCO Status] is set to ‘Enabled’ (overcurrent
function configured for voltage controlled overcurrent operation) or [3502: GROUP 1
OVERCURRENT, I>1 Direction] has been set to ‘Directional Fwd’ or ‘Directional Rev’ then
rated voltage should be applied to terminals C19 and C22.
Ensure that the timer will start when the current is applied to the relay.
NOTE: If the timer does not start when the current is applied and stage 1 has
been set for directional operation, the connections may be incorrect
for the direction of operation set. Try again with the current
connections reversed.
5.4.2 Perform the Test
Ensure that the timer is reset.
Apply a current of twice the setting in cell [3503: GROUP 1 OVERCURRENT, I>1 Current
Set] to the relay and note the time displayed when the timer stops.
5.4.3 Check the Operating Time
Check that the operating time recorded by the timer is within the range shown in table 13.
NOTE: Except for the definite time characteristic, the operating times given in
table 13 are for a time multiplier or time dial setting of 1. Therefore, to
obtain the operating time at other time multiplier or time dial settings,
the time given in table 13 must be multiplied by the setting of cell
[3505: GROUP 1 OVERCURRENT, I>1 TMS] for IEC and UK
characteristics or cell [3506: GROUP 1 OVERCURRENT, Time Dial]
for IEEE and US characteristics.
In addition, for definite time and inverse characteristics there is an
additional delay of up to 0.02 second and 0.08 second respectively
that may need to be added to the relay’s acceptable range of
operating times.
For all characteristics, allowance must be made for the accuracy of
the test equipment being used.
Characteristic Operating Time at twice current setting and time

multiplier/time dial setting of 1.0
Nominal Range
(Seconds) (Seconds)
DT [3504: I>1 Time Delay] Setting ±2%
setting
IEC S Inverse 10.03 9.53 - 10.53
IEC V Inverse 13.50 12.83 - 14.18
IEC E Inverse 26.67 24.67 - 28.67
UK LT Inverse 120.00 114.00 - 126.00
IEEE M Inverse 0.64 0.61 - 0.67
IEEE V Inverse 1.42 1.35 - 1.50
IEEE E Inverse 1.46 1.39 - 1.54
US Inverse 0.46 0.44 - 0.49
US ST Inverse 0.26 0.25 - 0.28
TABLE 13 - CHARACTERISTIC OPERATING TIMES FOR I>1

MiCOM P441/P442 & P444 Page 39/54
5.5 Check Trip and Auto-reclose Cycle

If the autoreclose function is being used, the circuit breaker trip and autoreclose cycle can be
tested automatically at the application-specific settings.
To test the first autoreclose cycle, set cell [0F11: COMMISSIONING TESTS, Test
Autoreclose] to “3 Pole Test”. The relay will perform a trip/reclose cycle. Repeat this
operation to test the subsequent autoreclose cycles.
Check all output relays used for circuit breaker tripping and closing, blocking other devices,
etc. operate at the correct times during the trip/close cycle.
Page 40/54 MiCOM P441/P442 & P444
6. ON-LOAD CHECKS
Remove all test leads, temporary shorting leads, etc. and replace any external wiring that
has been removed to allow testing.
If it has been necessary to disconnect any of the external wiring from the relay in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram.
The following on-load measuring checks ensure the external wiring to the current and
voltage inputs is correct but can only be carried out if there are no restrictions preventing the
energisation of the plant being protected.
6.1 Voltage Connections
Using a multimeter measure the voltage transformer secondary voltages to ensure they are
correctly rated. Check that the system phase rotation is correct using a phase rotation
meter.
Compare the values of the secondary phase voltages with the relay’s measured values,
which can be found in the MEASUREMENTS 1 menu column.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the values displayed
on the relay should be equal to the applied secondary voltage. The relay values should be
within 1% of the applied secondary voltages. However, an additional allowance must be
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Primary’, the values displayed on
the relay should be equal to the applied secondary voltage multiplied the corresponding
voltage transformer ratio set in the ‘VT & CT RATIOS’ menu column (see table 14). Again
the relay values should be within 1% of the expected value, plus an additional allowance for
the accuracy of the test equipment being used.
Voltage Cell in MEASUREMENTS 1 Corresponding VT Ratio (in ‘VT and

column (02) CT RATIO column (0A) of menu)
VAB [0214: VAB Magnitude] [0A01: Main VT Primary]
[0A02: Main VT Sec'y]
VBC [0216: VBC Magnitude]
VCA [0218: VCA Magnitude]
VAN [021A: VAN Magnitude]
VBN [021C: VBN Magnitude]
VCN [021E: VCN Magnitude]
VCHECKSYNC [022B: C/S Voltage Mag] [0A03: C/S VT Primary]
[0A04: C/S VT Sec'y]
TABLE 14 - MEASURED VOLTAGES AND VT RATIO SETTINGS

MiCOM P441/P442 & P444 Page 41/54
6.2 Current Connections

Measure the current transformer secondary values for each using a multimeter connected in
series with corresponding relay current input.
Check that the current transformer polarities are correct by measuring the phase angle
between the current and voltage, either against a phase meter already installed on site and
known to be correct or by determining the direction of power flow by contacting the system
control centre.
Ensure the current flowing in the neutral circuit of the current transformers is negligible.
Compare the values of the secondary phase currents and phase angle with the relay’s
measured values, which can be found in the MEASUREMENTS 1 menu column.
NOTE: Under normal load conditions the earth fault function will measure
little, if any, current. It is therefore necessary to simulate a phase to
neutral fault. This can be achieved by temporarily disconnecting one
or two of the line current transformer connections to the relay and
shorting the terminals of these current transformer secondary
windings.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the currents
displayed on the relay should be equal to the applied secondary current. The relay values
should be within 1% of the applied secondary currents. However, an additional allowance
must be made for the accuracy of the test equipment being used.
If cell [0D02: MEASURE’T SETUP, Local Values] is set to ‘Secondary’, the currents
displayed on the relay should be equal to the applied secondary current multiplied by the
corresponding current transformer ratio set in ‘VT & CT RATIOS’ menu column. Again the
relay values should be within 1% of the expected value, plus an additional allowance for the
accuracy of the test equipment being used.
Page 42/54 MiCOM P441/P442 & P444
7. FINAL CHECKS
The tests are now complete.
Remove all test or temporary shorting leads, etc. If it has been necessary to disconnect any
of the external wiring from the relay in order to perform the wiring verification tests, it should
be ensured that all connections are replaced in accordance with the relevant external
connection or scheme diagram.
Ensure that the relay has been restored to service by checking that cell [0F0D:
COMMISSIONING TESTS, Test Mode] is set to ‘Disabled’.
If the relay is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. These counters can be reset
using cell [0608: CB CONDITION, Reset All Values]. If the required access level is not
active, the relay will prompt for a password to be entered so that the setting change can be
made.
If a MMLG test block is installed, remove the MMLB01 test plug and replace the MMLG
cover so that the protection is put into service.
Ensure that all event records, fault records, disturbance records, alarms and LEDs have
been reset before leaving the relay.
If applicable, replace the secondary front cover on the relay.
MiCOM P441/P442 & P444 Page 43/54
8. MAINTENANCE
8.1 Maintenance Period
It is recommended that products supplied by AREVA T&D Protection & Control receive
regular monitoring after installation. As with all products some deterioration with time is
inevitable. In view of the critical nature of protective relays and their infrequent operation, it
is desirable to confirm that they are operating correctly at regular intervals.
AREVA protective relays are designed for a life in excess of 20 years.
MiCOM P440 distance relays are self-supervising and so require less maintenance than
earlier designs of relay. Most problems will result in an alarm so that remedial action can be
taken. However, some periodic tests should be done to ensure that the relay is functioning
correctly and the external wiring is intact.
If a Preventative Maintenance Policy exists within the customer’s organisation then the
recommended product checks should be included in the regular program. Maintenance
periods will depend on many factors, such as:
• the operating environment
• the accessibility of the site
• the amount of available manpower
• the importance of the installation in the power system
• the consequences of failure

8.2 Maintenance Checks
Although some functionality checks can be performed from a remote location by utilising the
communications ability of the relays, these are predominantly restricted to checking that the
relay is measuring the applied currents and voltages accurately, and checking the circuit
breaker maintenance counters. Therefore it is recommended that maintenance checks are
performed locally (i.e. at the substation itself).
BEFORE CARRYING OUT ANY WORK ON THE EQUIPMENT, THE USER SHOULD BE
FAMILIAR WITH THE ‘SAFETY SECTION’ AND CHAPTER P44x/EN IN, ‘INSTALLATION’,
OF THIS MANUAL.
8.2.1 Alarms
The alarm status LED should first be checked to identify if any alarm conditions exist. If so,
press the read key ! repeatedly to step the alarms. Clear the alarms to extinguish the LED.
8.2.2 Opto-isolators
The opto-isolated inputs can be checked to ensure that the relay responds to their
energisation by repeating the commissioning test detailed in Section 4.2.5 of this chapter.
8.2.3 Output Relays
The output relays can be checked to ensure that they operate by repeating the
commissioning test detailed in Section 4.2.6 of this chapter.
8.2.4 Measurement accuracy
If the power system is energised, the values measured by the relay can be compared with
known system values to check that they are in the approximate range that is expected. If
they are then the analogue/digital conversion and calculations are being performed correctly
by the relay. Suitable test methods can be found in Sections 6.1 and 6.2 of this chapter.
Alternatively, the values measured by the relay can be checked against known values
injected into the relay via the test block, if fitted, or injected directly into the relay terminals.
Suitable test methods can be found in Sections 4.2.8 and 4.2.9 of this chapter. These tests
will prove the calibration accuracy is being maintained.
Page 44/54 MiCOM P441/P442 & P444
8.3 Method of Repair

If the relay should develop a fault whilst in service, depending on the nature of the fault, the
watchdog contacts will change state and an alarm condition will be flagged. Due to the
extensive use of surface-mount components faulty PCBs should be replaced as it is not
possible to perform repairs on damaged circuits. Thus either the complete relay or just the
faulty PCB, identified by the in-built diagnostic software, can be replaced. Advice about
identifying the faulty PCB can be found in Chapter P44x/EN PR, ‘Problem Analysis’.
The preferred method is to replace the complete relay as it ensures that the internal circuitry
is protected against electrostatic discharge and physical damage at all times and overcomes
the possibility of incompatibility between replacement PCBs. However, it may be difficult to
remove an installed relay due to limited access in the back of the cubicle and rigidity of the
scheme wiring.
Replacing PCBs can reduce transport costs but requires clean, dry conditions on site and
higher skills from the person performing the repair. However, if the repair is not performed
by an approved service centre, the warranty will be invalidated.
BEFORE CARRYING OUT ANY WORK ON THE EQUIPMENT, THE USER SHOULD BE
FAMILIAR WITH THE ‘SAFETY SECTION’ AND CHAPTER P44x/EN IN, ‘INSTALLATION’,
OF THIS MANUAL. THIS SHOULD ENSURE THAT NO DAMAGE IS CAUSED BY
INCORRECT HANDLING OF THE ELECTRONIC COMPONENTS.
8.3.1 Replacing the Complete Relay
The case and rear terminal blocks have been designed to facilitate removal of the complete
relay should replacement or repair become necessary without having to disconnect the
scheme wiring.
Before working at the rear of the relay, isolate all voltage and current supplies to the relay.
NOTE: The MiCOM range of relays have integral current transformer shorting
switches which will close when the heavy duty terminal block is
removed.
Disconnect the relay earth connection from the rear of the relay.
There are two types of terminal block used on the relay, medium and heavy duty, which are
fastened to the rear panel using crosshead screws.
NOTE: The use of a magnetic bladed screwdriver is recommended to
minimise the risk of the screws being left in the terminal block or lost.
Without exerting excessive force or damaging the scheme wiring, pull the terminal blocks
away from their internal connectors.
Remove the screws used to fasten the relay to the panel, rack, etc. These are the screws
with the larger diameter heads that are accessible when the access covers fitted and open.
IF THE TOP AND BOTTOM ACCESS COVERS HAVE BEEN REMOVED, DO NOT
REMOVE THE SCREWS WITH THE SMALLER DIAMETER HEADS WHICH ARE
ACCESSIBLE. THESE SCREWS HOLD THE FRONT PANEL ON THE RELAY.
Withdraw the relay from the panel, rack, etc. carefully because it will be heavy due to the
internal transformers.
To reinstall the repaired or replacement relay follow the above instructions in reverse,
ensuring that each terminal block is relocated in the correct position and the case earth,
IRIG-B and fibre optic connections are replaced.
Once reinstallation is complete the relay should be recommissioned using the instructions in
sections 1 to 7 inclusive of this chapter.
MiCOM P441/P442 & P444 Page 45/54
8.3.2 Replacing a PCB

If the relay fails to operate correctly refer to Chapter P44x/EN PR, ‘Problem Analysis’, to help
determine which PCB has become faulty.
To replace any of the relay’s PCBs it is necessary to first remove the front panel.
Before removing the front panel to replace a PCB the auxiliary supply must be
removed. It is also strongly recommended that the voltage and current transformer
connections and trip circuit are isolated.
Open the top and bottom access covers. With size 60TE cases the access covers have two
hinge-assistance T-pieces which clear the front panel moulding when the access covers are
opened by more than 90°, thus allowing their removal.
If fitted, remove the transparent secondary front cover. A description of how to do this is
given in Chapter P44x/EN IT, ‘Introduction’.
By slightly bending the access covers at one end, the end pivot can be removed from its
socket and the access cover removed to give access to the screws that fasten the front
panel to the case.
The size 40TE case has four crosshead screws fastening the front panel to the case, one in
each corner, in recessed holes. The size 60TE case has an additional two screws, one
midway along each of the top and bottom edges of the front plate. Undo and remove the
screws.
DO NOT REMOVE THE SCREWS WITH THE LARGER DIAMETER HEADS WHICH ARE
ACCESSIBLE WHEN THE ACCESS COVERS ARE FITTED AND OPEN. THESE
SCREWS HOLD THE RELAY IN ITS MOUNTING (PANEL OR CUBICLE).
When the screws have been removed, the complete front panel can be pulled forward and
separated from the metal case. Caution should be observed at this stage because the front
panel is connected to the rest of the relay circuitry by a 64-way ribbon cable.
The ribbon cable is fastened to the front panel using an IDC connector; a socket on the cable
itself and a plug with locking latches on the front panel. Gently push the two locking latches
outwards which will eject the connector socket slightly. Remove the socket from the plug to
disconnect the front panel.
F E D C B A
Power supply
Relay board Input board Transformer board Not used IRIG-B board
board
Power supply module Input module

P0150ENa
FIGURE 22 - P441 PCB/MODULE LOCATIONS (VIEWED FROM FRONT)

Page 46/54 MiCOM P441/P442 & P444
J H G F E D C B A
Power supply
Relay board Relay board Opto board Not used Input board Transformer board Not used IRIG-B board
board
Power supply module Input module P0151ENa
FIGURE 23 - P442 PCB/MODULE LOCATIONS (VIEWED FROM FRONT)

The PCBs within the relay are now accessible. figure 22 and figure 23 show the PCB
locations for the distance relays in size 40TE (P441) and size 60TE (P442) cases
respectively.
The 64-way ribbon cable to the front panel also provides the electrical connections between
PCBs with the connections being via IDC connectors.
The slots inside the case to hold the PCBs securely in place each correspond to a rear
terminal block. Looking from the front of the relay these terminal blocks are labelled from
right to left.
NOTE: To ensure compatibility, always replace a faulty PCB with one of an
identical part number. table 15 lists the part numbers of each PCB
type.
PCB Part Number

Power Supply Board (24/54V dc) ZN0001 001
(48/125V dc) ZN0001 002
(110/250V dc) ZN0001 003
Relay ETOpto Board ZN0002 001

Input ETOpto Board ZN0005 001
Opto Board ZN0005 002
IRIG-B Board (IRIG-B input only) ZN0007 001
(Fibre optic port only) ZN0007 002
(Both) ZN0007 003
Co-processor board ZN0003 003
TABLE 15 - PCB PART NUMBERS

MiCOM P441/P442 & P444 Page 47/54
8.3.2.1 Replacement of the main processor board

The main processor board is located in the front panel, not within the case as with all the
other PCBs.
Place the front panel with the user interface face-down and remove the six screws from the
metallic screen, as shown in figure 24. Remove the metal plate.
There are two further screws, one each side of the rear of the battery compartment
moulding, that hold the main processor PCB in position. Remove these screws.
The user interface keypad is connected to the main processor board via a flex-strip ribbon
cable. Carefully disconnect the ribbon cable at the PCB-mounted connector as it could
easily be damaged by excessive twisting.
P3007XXa
FIGURE 24 - FRONT PANEL ASSEMBLY

The front panel can then be re-assembled with a replacement PCB using the reverse
procedure, ensuring that the ribbon cable is reconnected to the main processor board and all
eight screws are re-fitted.
Refit the front panel using the reverse procedure to that given in section 8.3.2. After refitting
and closing the access covers on case sizes 60TE, press at the location of the hinge-
assistance T-pieces so that they click back into the front panel moulding.
After replacement of the main processor board, all the settings required for the application
will need to be re-entered. Therefore, it is useful if an electronic copy of the application-
specific settings is available on disk. Although this is not essential, it can reduce the time
taken to re-enter the settings and hence the time the protection is out of service.
Once the relay has been reassembled after repair, it should be recommissioned in
accordance with the instructions in sections 1 to 7 inclusive of this chapter.
Page 48/54 MiCOM P441/P442 & P444
8.3.2.2 Replacement of the IRIG-B board

Depending on the model number of the relay, the IRIG-B board may have connections for
IRIG-B signals, IEC60870-5-103 (VDEW) communications, both or not be present at all.
To replace a faulty board, disconnect all IRIG-B and/or IEC60870-5-103 connections at the
rear of the relay.
The module is secured in the case by two screws accessible from the rear of the relay, one
at the top and another at the bottom, as shown in figure 25. Remove these screws carefully
as they are not captive in the rear panel of the relay.
A B C D E F G H J
IRIG-B
TX
RX
P3008XXa
FIGURE 25 - LOCATION OF SECURING SCREWS FOR IRIG-B BOARD

Gently pull the IRIG-B board forward and out of the case.
To help identify that the correct board has been removed, figure 26 illustrates the layout of
the IRIG-B board with both IRIG-B and IEC60870-5-103 options fitted (ZN0007 003). The
other versions (ZN0007 001 and ZN0007 002) use the same PCB layout but with less
components fitted.
ZN0007 C
SERIAL No.
P3009XXa
FIGURE 26 - TYPICAL IRIG-B BOARD

The replacement PCB should be carefully slotted into the appropriate slot, ensuring that it is
pushed fully back on to the rear terminal blocks and the securing screws are re-fitted.
Reconnect all IRIG-B and/or IEC60870-5-103 connections at the rear of the relay.
MiCOM P441/P442 & P444 Page 49/54
8.3.2.3 Replacement of the input module
The input module comprises of two boards fastened together, the transformer board and the
input board.
The module is secured in the case by two screws on its right-hand side, accessible from the
front of the relay, as shown in figure 27. Remove these screws carefully as they are not
captive in the front plate of the module.
Input module
Handle
P3010ENa
FIGURE 27 - LOCATION OF SECURING SCREWS FOR INPUT MODULE

On the right-hand side of the analogue input module there is a small metal tab which brings
out a handle. Grasping this handle firmly, pull the module forward, away from the rear
terminal blocks. A reasonable amount of force will be required to achieve this due to the
friction between the contacts of two terminal blocks, one medium duty and one heavy duty.
NOTE: Care should be taken when withdrawing the input module as it will
suddenly come loose once the friction of the terminal blocks has been
overcome. This is particularly important with loose relays as the metal
case will need to be held firmly whilst the module is withdrawn.
Remove the module from the case, taking care as it is heavy because it contains all the
relay’s input voltage and current transformers.
The replacement module can be slotted in using the reverse procedure, ensuring that it is
pushed fully back on to the rear terminal blocks and the securing screws are re-fitted.
NOTE: The transformer and input boards within the module are calibrated
together with the calibration data being stored on the input board.
Therefore it is recommended that the complete module is replaced to
avoid on-site recalibration having to be performed.
Page 50/54 MiCOM P441/P442 & P444
8.3.2.4 Replacement of the power supply board

The power supply board is fastened to a relay board to form the power supply module and is
located on the extreme left-hand side of all MiCOM distance relays.
Pull the power supply module forward, away from the rear terminal blocks and out of the
case. A reasonable amount of force will be required to achieve this due to the friction
between the contacts of the two medium duty terminal blocks.
The two boards are held together with push-fit nylon pillars and can be separated by pulling
them apart. Care should be taken when separating the boards to avoid damaging the inter-
board connectors located near the lower edge of the PCBs towards the front of the power
supply module.
The power supply board is the one with two large electrolytic capacitors on it that protrude
through the other board that forms the power supply module. To help identify that the
correct board has been removed, figure 28 illustrates the layout of the power supply board
for all voltage ratings.
SERIAL No. ZN0001 D
P3011XXa
FIGURE 28 - TYPICAL POWER SUPPLY BOARD

Re-assemble the module with a replacement board ensuring the inter-board connectors are
firmly pushed together and the four push-fit nylon pillars are securely located in their
respective holes in each PCB.
Slot the power supply module back into the relay case, ensuring that it is pushed fully back
on to the rear terminal blocks.
MiCOM P441/P442 & P444 Page 51/54
8.3.2.5 Replacement of the relay board in the power supply module

Remove and replace the relay board in the power supply module as described in 8.3.2.4
above.
The relay board is the one with the board with holes cut in it to allow the transformer and two
large electrolytic capacitors to protrude through. To help identify that the correct board has
been removed, figure 29 illustrates the layout of the relay board.
1
2 PL2
3 ZN0002 D
4
SERIAL No.
P3012XXa
FIGURE 29 - TYPICAL RELAY BOARD

Ensure the setting of the link (located above IDC connector) on the replacement relay board
is the same as the one being replaced before replacing the module in the relay case.
8.3.2.6 Replacement of the extra relay board (P442 1 P444 only)
The P442 distance relay has two additional boards to the P441 and the P444 four additional
boards to the P441. Some of these boards provides extra output relays and optically-
isolated inputs.
To remove it, gently pull the faulty PCB forward and out of the case.
If the relay board is being replaced, ensure the setting of the link (located above IDC
connector) on the replacement relay board is the same as the one being replaced. To help
identify that the correct board has been removed, figure 29 and figure 30 illustrate the layout
of the relay and Opto boards respectively.
The replacement PCB should be carefully slotted into the appropriate slot, ensuring that it is
pushed fully back on to the rear terminal blocks.
Page 52/54 MiCOM P441/P442 & P444
P3013XXa
FIGURE 30 - TYPICALOPTO BOARD

8.4 Recalibration
Recalibration is not usually required when a PCB is replaced unless it happens to be one of
the two boards in the input module, the replacement of which directly affect the calibration.
Although it is possible to carry out recalibration on site, this requires test equipment with
suitable accuracy and a special calibration program to run on a PC. It is therefore
recommended that the work is carried out by the manufacturer, or entrusted to an approved
service centre.
8.5 Changing the battery
Each relay has a battery to maintain status data and the correct time when the auxiliary
supply voltage fails. The data maintained include event, fault and disturbance records and
the thermal state at the time of failure.
This battery will periodically need changing, although an alarm will be given as part of the
relay’s continuous self-monitoring in the event of a low battery condition.
If the battery-backed facilities are not required to be maintained during an interruption of the
auxiliary supply, the steps below can be followed to remove the battery, but do not replace
with a new battery.
8.5.1 Instructions for Replacing The Battery
Open the bottom access cover on the front of the relay.
Gently extract the battery from its socket. If necessary, use a small screwdriver to prize the
battery free.
Ensure that the metal terminals in the battery socket are free from corrosion, grease and
dust.
The replacement battery should be removed from its packaging and placed into the battery
holder, taking care to ensure that the polarity markings on the battery agree with those
adjacent to the socket.
NOTE: Only use a type ½AA Lithium battery with a nominal voltage of 3.6V.
MiCOM P441/P442 & P444 Page 53/54
Ensure that the battery is securely held in its socket and that the battery terminals are
making good contact with the metal terminals of the socket.
Close the bottom access cover.
8.5.2 Post Modification Tests
To ensure that the replacement battery will maintain the time and status data if the auxiliary
supply fails, check cell [0806: DATE and TIME, Battery Status] reads ‘Healthy’.
8.5.3 Battery Disposal
The battery that has been removed should be disposed of in accordance with the disposal
procedure for Lithium batteries in the country in which the relay is installed.
Page 54/54 MiCOM P441/P442 & P444
BLANK PAGE
Commissioning Test & Record P44x/EN RS/E33
Sheets
MiCOM P441/P442 & P444
COMMISSIONING TEST
& RECORD SHEETS
Sheets
MiCOM P441/P442 & P444 Page 1/10
CONTENT
1. COMMISSIONING TEST RECORD 3

1.1 Product Checks 3
1.1.1 With the Relay De-energised 3
1.1.2 With the Relay Energised 4
1.2 Setting Checks 9
1.2.1 Application-specific function settings applied? 9
1.2.2 Application-specific function settings verified? 9
1.2.3 Application-specific programmable scheme logic tested? 9
1.2.4 Protection Function Timing Tested? 9
1.2.5 Trip and Auto-Reclose Cycle Checked 9
1.3 On-load Checks 9
1.3.1 VT wiring checked? 9
1.3.2 CT wiring checked ? 10
1.4 Final Checks 10
P44x/EN RS/E33 Commissioning Test & Record
Sheets
Page 2/10 MiCOM P441/P442 & P444
BLANK PAGE
Sheets
MiCOM P441/P442 & P444 Page 3/10
1. COMMISSIONING TEST RECORD

Date Engineer
Station Circuit
System Frequency
Front Plate Information
Distance protection relay P441/P442/P444*

Model number
Serial number
Rated Current In
Rated Voltage Vn
Auxiliary Voltage Vx
*Delete as appropriate
Have all relevant safety instructions been followed? Yes/No*
1.1 Product Checks

1.1.1 With the Relay De-energised
1.1.1.1 Visual Inspection
Relay damaged? Yes/No*

Rating information correct for installation? Yes/No*
Case earth installed? Yes/No*
1.1.1.2 Current transformer shorting contacts close? Yes/No/Not checked*
1.1.1.3 External Wiring
Wiring checked against diagram? Yes/No*

Test block connections checked? Yes/No/na*
1.1.1.4 Insulation resistance >100MΩ at 500V dc Yes/No/Not tested*
Sheets
Page 4/10 MiCOM P441/P442 & P444
1.1.1.5 Watchdog Contacts (auxiliary supply off)
Terminals 11 and 12 Contact closed? Yes/No*

Contact resistance ___Ω/Not measured*
Terminals 13 and 14 Contact open? Yes/No*
1.1.1.6 Measured Auxiliary Supply ______V ac/dc*
1.1.2 With the Relay Energised

1.1.2.1 Watchdog Contacts (auxiliary supply on)
Terminals 11 and 12 Contact open? Open/Closed*

Terminals 13 and 14 Contact closed? Open/Closed*
Contact resistance ____Ω/Not measured*
1.1.2.2 Date and Time
Clock set to local time? Yes/No*

Time maintained when auxiliary supply removed? Yes/No*
1.1.2.3 Light Emitting Diodes
Relay healthy (green) LED working? Yes/No*

Alarm (yellow) LED working? Yes/No*
Out of service (yellow) LED working? Yes/No*
Trip (red) LED working? Yes/No*
All 8 programmable LEDs working? Yes/No*
1.1.2.4 Field supply voltage
Value measured between terminals 7 and 9 ______V dc

Value measured between terminals 8 and 10 ______V dc
Sheets
MiCOM P441/P442 & P444 Page 5/10
1.1.2.5 Input Opto-isolators
Opto input 1 working? Yes/No*

Opto input 9 working? Yes/No/na*
1.1.2.6 Output Relays
Relay 1 Working? Yes/No*

Contact resistance (N/C) ____Ω/Not measured*
(N/O) ____Ω/Not measured*
Sheets
Page 6/10 MiCOM P441/P442 & P444

Relay 15 Working? Yes/No/na*
Sheets
MiCOM P441/P442 & P444 Page 7/10

Sheets
Page 8/10 MiCOM P441/P442 & P444
1.1.2.7 Rear Communications Port
Communication standard K-Bus/Modbus/ IEC60870-

5-103*
Communications established? Yes/No*
Protocol converter tested? Yes/No/na*
1.1.2.8 Current Inputs
Displayed Current Primary/Secondary*
 [ Phase CT Primary] 
  _______A/na*
Phase CT Ratio  [ Phase CT Sec' y] 
 [ Mutual CT Primary] 
  _______A/na*
Mutual CT Ratio  [ Mutual CT Sec' y] 
Input CT Applied value Displayed value

IA _______A _______A
IB _______A _______A
IC _______A _______A
IM _______A _______A
1.1.2.9 Voltage Inputs
Displayed Voltage Primary/Secondary*
 [ Main VT Primary] 
  _______V/na*
Main VT Ratio  [ Main VT Sec' y] 
 [ C/S VT Primary] 
  _______V/na*
C/S VT Ratio  [ C/S VT Secondary] 
Input VT Applied value Displayed value

Va _______V _______V
Vb _______V _______V
Vc _______V _______V
C/S Voltage _______V/na* _______V
Sheets
MiCOM P441/P442 & P444 Page 9/10
1.2 Setting Checks
1.2.1 Application-specific function settings applied? Yes/No*

Application-specific programmable scheme logic settings applied? Yes/No/na*
If settings applied using a portable computer and software, which __________________
software and version was used?
1.2.2 Application-specific function settings verified? Yes/No/na*
1.2.3 Application-specific programmable scheme logic tested? Yes/No/na*
1.2.4 Protection Function Timing Tested? Yes/No*
Overcurrent type (cell [3502 I>1 Direction]) Directional

/Non-directional*
Applied voltage _________V/na*
Applied current _________A
Expected operating time _________s
Measured operating time _________s
1.2.5 Trip and Auto-Reclose Cycle Checked Yes/No/na*
1.3 On-load Checks
Test wiring removed? Yes/No/na*

Disturbed customer wiring re-checked? Yes/No/na*
On-load test performed? Yes/No*
1.3.1 VT wiring checked? Yes/No/na*
Phase rotation correct? Yes/No*

Displayed Voltage Primary/Secondary*
 [Main VT Primary] 
  _______V/na*
Main VT Ratio  [Main VT Sec' y] 
 [C/S VT Primary] 
  _______V/na*
C/S VT Ratio  [C/S VT Secondary] 
Voltages Applied value Displayed value

Va _______V _______V
Vb _______V _______V
Vc _______V _______V
C/S Voltage _______V/na* _______V
Sheets
Page 10/10 MiCOM P441/P442 & P444
1.3.2 CT wiring checked ? Yes/No/na*
CT polarities correct ? Yes/No*

Displayed Current Primary/Secondary*
 [Phase CT Primary] 
  _______A/na*
Phase CT Ratio  [Phase CT Sec' y] 
 [Mutual CT Primary] 
  _______A/na*
Mutual CT Ratio  [Mutual CT Sec' y] 
Currents Applied value Displayed value

IA _______A _______A
IB _______A _______A
IC _______A _______A
IM _______A _______A
1.4 Final Checks
Test wiring removed ? Yes/No/na*

Disturbed customer wiring re-checked ? Yes/No/na*
Circuit breaker operations counter reset ? Yes/No/na*
Current counters reset ? Yes/No/na*
Event records reset ? Yes/No*
Fault records reset ? Yes/No*
Disturbance records reset ? Yes/No*
Alarms reset ? Yes/No*
LEDs reset ? Yes/No*
Commissioning Engineer Customer Witness
Date Date
MiCOM P441/P442 & P444
CONNECTION DIAGRAMS
MiCOM P441/P442 & P444 Page 1/12
CONTENT
1. MiCOM P441 – HARDWARE DESCRIPTION 3
2. MiCOM P441 – WIRING DIAGRAM (1/2) 4

P44x/EN CO/E33 Connection Diagrams
Page 2/12 MiCOM P441/P442 & P444
BLANK PAGE
1.
3 TERMINAL BLOCK DETAIL

8 OFF HOLES Æ 3.4
1 2
23.3 155.4 1 19
HEAVY DUTY MEDIUM DUTY
4
FLUSH MOUNTING PANEL

159.0 168.0 CUT-OUT DETAIL EACH TERMINATION ACCEPTS:-
2 x M4 RING TERMINALS
Connection Diagrams
18
10.35 181.3 4.5 16 24
202.0 17 18
MiCOM P441/P442 & P444
200.0
MOUNTING SCREWS : M4 x 12 SEM UNIT STEEL THREAD FORMING SCREW.
TERMINAL SCREWS : M4 x 6 STEEL COMBINATION PAN HEAD MACHINE SCREW.
TYPE OF FIBRE OPTIC CONNECTOR : ST

MiCOM P441 – HARDWARE DESCRIPTION
SECONDARY COVER (WHEN FITTED)
240.0 INCL. WIRING

FRONT VIEW REAR VIEW
MiCOM A B C D E F TERMINAL BLOCKS -
SEE DETAIL
TRIP
IRIG-B
ALARM
OUT OF SERVICE
HEALTHY
= CLEAR
= READ
177.0 157.5 MAX.
= ENTER
TX
RX
THE TERMINATION POSITIONS
SHOWN ARE TYPICAL ONLY
SIDE VIEW
206.0 30.0
P44x/EN CO/E33
Page 3/12
DIRECTION OF FORWARD CURRENT FLOW
A
MiCOM P441 (PART)
F11
WATCHDOG
2.
P2 P1 F12 CONTACT
A F13
S2 S1 WATCHDOG
B F14 CONTACT
C B
Page 4/12
PHASE ROTATION E1
C
E2 RELAY 1
E3
MiCOM P441 (PART) E4 RELAY 2
C1 5A E5
IA E6 RELAY 3
C2 D1 E7
A B C
P44x/EN CO/E33
-
1A D2 OPTO 1 E8 RELAY 4
NOTE 4. C3 +
E9
C4 5A D3
N - E10
IB D4 OPTO 2
+ E11 RELAY 5
n C5 D5 E12
-
1A OPTO 3 E13
C6 D6
+ E14
a b c C7 5A D7 RELAY 6
- E15
IC
D8 OPTO 4 F17
+ E16
C8
D9 E17
1A - RELAY 7
C9 RS485
D10 OPTO 5 PORT F18 E18
C10 5A +
D11 B1
- F16
IM
SCN B2 RELAY 8
D12 OPTO 6
C11 + B3
SEE NOTE 2. SK2
1A D13 DATA READY 1 RELAY 9
C12 - B4
DIRECTION OF FORWARD CURRENT FLOW D14 OPTO 7 DATA 10 B5
+ ACKNOWLEDGE
A B6 RELAY 10
P2 P1 D15 EXTERNAL
- 16
A RESET B7
D16 OPTO 8
S2 S1 + DOWNLOAD B8
B 17 RELAY 11
D17 TEST/ COMMAND B9
C C B COMMON DOWNLOAD
PHASE ROTATION D18 DO-D7 2-9 B10
CONNECTION
B11 RELAY 12
PARALLEL LINE 11,12,15,13,
TO-T7 B12
PROTECTION 20,21,23,24
B13
0V 19,18,22,25
B14 RELAY 13
NOT B15
14
CONNECTED
MiCOM P441 – WIRING DIAGRAM (1/2)
B16
B17 RELAY 14
C19 1 SK1 B18
TX 2
RX 3
VA
4
SERIAL
0V 5
C20 PORT
6
CTS 7
RTS 8
VB
9
C21 *
F1
-
AC OR DC
Vx AUX SUPPLY +
F2
VC
C22
F7
+
C23
F8
+
48V DC FIELD
V BUSBAR VOLTAGE OUT F9
-
(SEE NOTE 3.)
NOTES 1. F10
C24 -
(a) C.T. SHORTING LINKS
CASE
EARTH
(b) * POWER SUPPLY VERSION 24/54V D.C. ONLY

PIN TERMINAL (P.C.B. TYPE) 2. IM INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR.
3. V BUSBAR ONLY REQUIRED IF CHECK SYNCHRONISM FUNCTION ENABLED.

50 OHM BNC CONNECTOR
4. C.T. CONNECTIONS ARE SHOWN 1A CONNECTED AND ARE TYPICAL ONLY.
9-WAY & 25-WAY FEMALE D-TYPE SOCKET

MiCOM P441/P442 & P444
Connection Diagrams
3.
STANDARD INPUT MODULE GN0010 013(110V)
F F F F F F F F F E E E E E E E E E D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
F F F F F F F F F E E E E E E E E E D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23
PL1 PL3 PL2 PL1
ANALOGUE & OPTO TRANSFORMER ASSY

Connection Diagrams
POWER SUPPLY PCB RELAY PCB INPUT PCB GN0014 013

CIRCUIT DIAG. SK1 SK1 CIRCUIT DIAG. CIRCUIT DIAG. SK1 SK1
01 ZN0001 01 01 ZN0002 01 01 ZN0005 01
MiCOM P441/P442 & P444
PL1 PL1
* * * *
64-WAY RIBBON CABLE

* PL1 PL1 PL1
MAIN PROCESSOR & RELAY PCB CO-PROCESSOR

USER INTERFACE PCB CIRCUIT DIAG. CIRCUIT DIAG. 01 ZN0003 03
CIRCUIT DIAG. 01 ZN0006 01 01 ZN0002 01
SK2 SK1
PL3
BATTERY SERIAL TEST/DOWNLOAD
B B B B B B B B B
1 3 5 7 9 11 13 15 17
B B B B B B B B B
2 4 6 8 10 12 14 16 18
BOARD CONTAINS SAFETY CRITICAL COMPONENTS.

P44x/EN CO/E33
Page 5/12
12 OFF HOLES Æ3.4 3 TERMINAL BLOCK DETAIL 4.
23.25 116.55 142.45 1 2
1 19
Page 6/12

4
FLUSH MOUNTING PANEL
CUT-OUT DETAIL
159.0 168.0
P44x/EN CO/E33
EACH TERMINATION ACCEPTS:-

18
10.3 155.4 129.5 4.5
16 24
305.5 17 18
303.5
TERMINAL SCREWS : M4 x 6 STEEL COMBINATION PAN HEAD MACHINE SCREW.

240.0 INCL. WIRING

FRONT VIEW REAR VIEW
MiCOM A B C D E F G H J
TRIP
IRIG-B
ALARM
OUT OF SERVICE
HEALTHY
= CLEAR 177.0
= READ
157.5 MAX.
= ENTER
TX
RX
TERMINAL BLOCKS -
309.6 30.0 SIDE VIEW SEE DETAIL
MiCOM P441/P442 & P444
Connection Diagrams
5.
A F1 J11
DIRECTION OF FORWARD CURRENT FLOW RELAY 15 WATCHDOG
F2 J12 CONTACT
P2 P1
A F3 J13
RELAY 16 WATCHDOG
S2 S1 F4 J14 CONTACT
B
C B F5 H1
C PHASE ROTATION RELAY 17 F6 H2 RELAY 1
F7 H3
MV PLATFORM F8 H4 RELAY 2
DISTANCE PROTECTION (PART) RELAY 18
C1 5A F9 H5
F10 H6 RELAY 3
IA
D1 RELAY 19 F11 H7
A B C C2 - F12 H8 RELAY 4
1A D2 OPTO 1
NOTE 4. C3 + F13 H9
C4 5A D3 F14 H10
N - RELAY 20
IB D4 OPTO 2 F15 H11
+ RELAY 5
n C5 D5 F16 H12
Connection Diagrams
- F17 H13
1A OPTO 3 RELAY 21
C6 D6
+ F18 H14 RELAY 6
a b c C7 5A D7 H15
IC - J17
D8 OPTO 4 H16
C8 +
H17
MiCOM P441/P442 & P444
D9 RELAY 7
1A - RS485
C9 PORT J18 H18
D10 OPTO 5
C10 5A + G1
D11 J16
SCN G2 RELAY 8
IM -
D12 OPTO 6 G3
C11 + SK2
SEE NOTE 2. DATA READY 1 RELAY 9
1A D13 G4
C12 - DATA
DIRECTION OF FORWARD CURRENT FLOW OPTO 7 10 G5
D14 ACKNOWLEDGE
+ G6 RELAY 10
A EXTERNAL
P2 P1 D15 16
- RESET G7
A P442
D16 OPTO 8 DOWNLOAD G8
S2 S1 + 17 RELAY 11
B TEST/ COMMAND G9
D17
C B
DOWNLOAD
C COMMON DO-D7 2-9 G10
PHASE ROTATION D18 CONNECTION G11 RELAY 12
11,12,15,13,
E1 TO-T7
PARALLEL LINE 20,21,23,24 G12
-
PROTECTION E2 OPTO 9 G13
+ 0V 19,18,22,25
G14 RELAY 13
E3
- NOT G15
E4 OPTO 10 14
CONNECTED G16
+
E5 G17
- RELAY 14
1 SK1 G18
C19 E6 OPTO 11
+ 2
TX
E7
- RX 3 2nd REAR COM 1 N.C.
E8 OPTO 12
VA + 4 2 RxD
SERIAL SK4 (OPTIONNAL)
E9 0V 5 3 TxD.
- PORT EIA485 -1(+ve)
C20 OPTO 13 6 DTR#
E10 4
+ CTS 7 5 0V
E11
- RTS 8 6 N.C.
VB E12 OPTO 14 9 EIA485 -2(-ve)
+ 7 RTS#
E13 8 CTS#
C21 - J1 *
OPTO 15 - 9 N.C.
E14 AC OR DC
+ Vx AUX SUPPLY J2
+
VC E15 TX
- FIBRE OPTIC
C22 E16 OPTO 16 J7 COMMUNICATION
+ +
(OPTIONAL)
C23 E17 J8 RX
+
COMMON 48V DC FIELD
E18 CONNECTION J9
V BUSBAR VOLTAGE OUT - IRIG-B INPUT
(SEE NOTE 3.) J10 (OPTIONAL)
NOTES 1. -
C24
MV PLATFORM
(a) C.T. SHORTING LINKS CASE
DISTANCE PROTECTION (PART)
EARTH
* POWER SUPPLY VERSION 24/54V D.C. ONLY

(b) PIN TERMINAL (P.C.B. TYPE) 2. IM INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR.


P3909ENa
P44x/EN CO/E33
Page 7/12
6.
STANDARD INPUT MODULE GN0010 013 (110V)
J J J J J J J J J H H H H H H H H H F F F F F F F F F D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
J J J J J J J J J H H H H H H H H H F F F F F F F F F D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23
Page 8/12
RELAY PCB RELAY PCB ANALOGUE & OPTO TRANSFORMER ASSY

POWER SUPPLY PCB ZN0002 001 ou ZN0002 001 ou INPUT PCB GN0014 013
CIRCUIT DIAG. SK1 SK1 ZN0005 001 ou SK1 SK1
ZN0031 001 ZN0031 001
01 ZN0001 01 ZN0017 001
P44x/EN CO/E33
PL1 PL1 PL1

* * * * *
64-WAY RIBBON CABLE
* PL1 * PL1 * PL1 PL1 PL1
MAIN PROCESSOR & OPTO PCB IRIG-B PCB CO-PROCESSOR

USER INTERLACE PCB RELAY PCB ZN0005 002 ou CIRCUIT DIAG CIRCUIT DIAG
CIRCUIT DIAG. 01 ZN0006 01 ZN0002 001 ou ZN0017 002 (UI) 01 ZN0007 01 01 ZN0003 03
ZN0031 001
SK2 SK1 Rx1 Tx1
G G G G G G G G G E E E E E E E E E
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17
G G G G G G G G G E E E E E E E E E BNC FIBRE OPTIC
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 TRANSDUCERS
Optical fiber +
RearCom2 + IRIGB (optional) RearCom2 (optional) IRIG-B PCB IRIG-B PCB
01 ZN0025001 01 ZN0025002 01 ZN0007 001 01 ZN0007 002
Rx1 Tx1
SK4 SK5 (unused) SK4 SK5 (unused)
1 3 5 7 9 1 3 5 7 9 1 3 5 7 9 1 3 5 7 9
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
BNC D-type D-type D-type D-type BNC FIBRE OPTIC

TRANSDUCERS
P442
BOARD CONTAINS SALETY CRITICAL COMPONENTS.
* P3911ENa
MiCOM P441/P442 & P444
Connection Diagrams
7.
74.9 116.55 142.45 12 OFF HOLES Dia. 3.4 TERMINAL BLOCK DETAIL
3
1 2
1 19
4
159.0 168.0
4.5 EACH TERMINATION ACCEPTS:-

Connection Diagrams
18
62.0 155.4 129.5 FLUSH MOUNTING
PANEL CUT-OUT 16 24
17 18
MiCOM P441/P442 & P444
408.9 DETAIL.
406.9
TERMINAL SCREWS : M4 x 7 BRASS CHEESE HEAD SCREWS WITH LOCK WASHERS PROVIDED.

240.0 INCL. WIRING REAR VIEW

FRONT VIEW
MiCOM
TRIP IRIG-B
ALARM
OUT OF SERVICE
HEALTHY
CLEAR
= 177.0 157.5 MAX.
= READ TX
RX
ENTER
=
16
TERMINAL BLOCKS -
SIDE VIEW SEE DETAIL
413.2 30.0
P44x/EN CO/E33
Page 9/12
8.
A
N11
DIRECTION OF FORWARD CURRENT FLOW WATCHDOG
N12 CONTACT
P2 P1
A N13
WATCHDOG
S2 S1 N14 CONTACT
B C B
PHASE ROTATION
C
J1 L1
MV PLATFORM J2 RELAY 25 L2 RELAY 9
Page 10/12
DISTANCE PROTECTION (PART) D1

- J3 L3
C1 5A D2 OPTO 1
+ J4 RELAY 26 L4 RELAY 10
D3
IA - J5 L5
D4 OPTO 2
A B C C2 + J6 RELAY 27 L6 RELAY 11
D5
1A - J7 L7
NOTE 4. C3 D6 OPTO 3
P44x/EN CO/E33
C4 5A D7
N - J9 L9
IB D8 OPTO 4
n C5 D9
- J11 L11
1A D10 OPTO 5
C6 + J12 RELAY 30 L12 RELAY 14
D11
a b c C7 5A - J13 L13
D12 OPTO 6
IC + N17 J14 L14
D13
RELAY 31 RELAY 15
C8 - J15 L15
D14 OPTO 7
1A + RS485 J16 L16
C9 D15 PORT N18
- J17 RELAY 32 L17 RELAY 16
C10 5A D16 OPTO 8
+ N16 J18 L18
IM D17 SCN
COMMON
C11 D18 CONNECTION
SEE NOTE 2. DATA READY 1 SK2
1A E1
C12 - DATA
DIRECTION OF FORWARD CURRENT FLOW E2 OPTO 9 10 P444
+ ACKNOWLEDGE
E3 EXTERNAL
A - 16 K1 M1
P2 P1 OPTO 10 RESET
E4 RELAY 17 RELAY 1
A + K2 M2
S2 S1 E5 DOWNLOAD
-
17 K3 M3
B TEST/ COMMAND
E6 OPTO 11 RELAY 18 RELAY 2
+ DOWNLOAD K4 M4
C C B DO-D7 2-9
E7
PHASE ROTATION - K5 M5
E8 OPTO 12 11,12,15,13, RELAY 19 RELAY 3
+ TO-T7 K6 M6
PARALLEL LINE E9 20,21,23,24
PROTECTION - K7 M7
+ 0V 19,18,22,25 K8 M8
E11 K9 M9
-
E12 OPTO 14 NOT RELAY 21 RELAY 5
14 K10 M10
+ CONNECTED
E13 K11 M11
-
K12 M12
+ SK1
C19 1
E15 K13 M13
- TX 2
E16 OPTO 16 K14 M14
+ RX 3 RELAY 23 RELAY 7
E17 K15 M15
VA COMMON 4
E18 CONNECTION SERIAL K16 M16
0V 5
F1 PORT K17 M17
C20 - 6 RELAY 24 RELAY 8
F2 OPTO 17 K18 M18
+ CTS 7
F3
- RTS 8
F4 OPTO 18 2nd REAR COM
VB + 9
F5 SK4 (OPTIONNAL) 1 N.C.
-
C21 F6 OPTO 19 N1 * 2 RxD
+ - TX
F7 AC OR DC 3 TxD.
- Vx AUX SUPPLY N2 EIA485 -1(+ve)
OPTO 20 + FIBRE OPTIC 4 DTR#
F8
VC + RX COMMUNICATION
F9 (OPTIONAL) 5 0V
C22 - N7
F10 OPTO 21 + 6 N.C.
C23 +
F11
N8 IRIG-B INPUT 7 RTS# EIA485 -2(-ve)
+
- 48V DC FIELD (OPTIONAL) CTS#
F12 OPTO 22 N9 8
V BUSBAR + VOLTAGE OUT -
9 N.C.
(SEE NOTE 3.) F13
NOTES 1. - N10 CASE
C24 OPTO 23
-
F14 EARTH
+
(a) C.T. SHORTING LINKS F15 MV PLATFORM
- DISTANCE PROTECTION (PART)
F16 OPTO 24
+
F17 POWER SUPPLY VERSION 24/54V D.C. ONLY
COMMON
*
(b) PIN TERMINAL (P.C.B. TYPE) F18 CONNECTION

2. IM INPUT IS FOR OPTIONAL MUTUAL COMPENSATION OF FAULT LOCATOR.

P3910ENa
MiCOM P441/P442 & P444
Connection Diagrams
9.
N N N N N N N N N M M M M M M M M M L L L L L L L L L D D D D D D D D D C C C C C C C C C
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 20 22 24
N N N N N N N N N M M M M M M M M M L L L L L L L L L D D D D D D D D D C C C C C C C C C
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 19 21 23
UNIVERSAL OPTO TRANSFORMER ASSY

POWER SUPPLY PCB RELAY PCB RELAY PCB INPUT PCB GN0014 013
CIRCUIT DIAG. SK1 SK1 CIRCUIT DIAG. CIRCUIT DIAG. CIRCUIT DIAG. SK1 SK1
01 ZN0001 01 01 Zn0019 01 01 Zn0019 01 01 Zn0017 01
* * * * *
Connection Diagrams
64-WAY RIBBON CABLE

MiCOM P441/P442 & P444
* * * * *
MAIN PROCESSOR & RELAY PCB UNIVERSEL OPTO UNIVERSEL OPTO
RELAY PCB INPUT PCB INPUT PCB
USER INTERLACE PCB CIRCUIT DIAG. CIRCUIT DIAG.
CIRCUIT DIAG. 01 ZN0006 01 01 Zn0019 01 CIRCUIT DIAG. CIRCUIT DIAG.
01 Zn0019 01 01 Zn0017 02 01 ZN0017 02
SK2 SK1
J J J J J J J J J K K K K K K K K K F F F F F F F F F E E E E E E E E E
1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17 1 3 5 7 9 11 13 15 17
J J J J J J J J J K K K K K E K K K F F F F F F F F F E E E E E E E E E
2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18
IRIG-B PCB CO-PROCESSOR Optical fiber +

CIRCUIT DIAG CIRCUIT DIAG
01 ZN0007 03 01 ZN0003 03 RearCom2 + IRIGB (optional) RearCom2 (optional) IRIG-B PCB IRIG-B PCB
01 ZN0025001 01 ZN0025002 01 ZN0007 001 01 ZN0007 002
Rx1 Tx1
Rx1 Tx1
SK4 SK5 (unused) SK4 SK5 (unused)
1 3 5 7 9 1 3 5 7 9 1 3 5 7 9 1 3 5 7 9
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
BNC FIBRE OPTIC
TRANSDUCERS BNC D-type D-type D-type D-type BNC FIBRE OPTIC
TRANSDUCERS
P444
BOARD CONTAINS SALETY CRITICAL COMPONENTS.
EXAMPLE FOR: P444114A3A????A

P3912ENa
Page 11/12
P44x/EN CO/E33
P44x/EN CO/E33 Connection Diagrams
Page 12/12 MiCOM P441/P442 & P444
BLANK PAGE
Configuration / Mapping P44x/EN GC/E33
MiCOM P441, P442 & P444
CONFIGURATION /
MAPPING
P44x/EN GC/E33 Configuration / Mapping
Page 2 MiCOM P441, P442 & P444
This documentation version E33 is specific to the following models
Model number
P441-------09-C
P442-------09-C
P444-------09-C
For other models / software versions, please contact ALSTOM T&D Protection and
Control for the relevant information.
MiCOM P441, P442 & P444 Page 1
Configuration / Mapping
This Chapter is split into several sections, these are as follows:
Part A: Menu database

This database defines the structure of the relay menu for the Courier interface and the front
panel user interface. This includes all the relay settings and measurements. Indexed strings
for Courier and the user interface are cross referenced to the Menu Datatype Definition
section (using a G Number). For all settable cells the setting limits and default value are
also defined within this database.
Note: The following labels are used within the database
Label Description Value
V1 Main VT Rating 1 (100/110V)
V2 Checksync VT Rating 1 (100/110V)
I1 Phase CT Rating 1 or 5 (Setting 0A08)
I4 Mutual CT Rating 1 or 5 (Setting 0A0E)

Part B: Menu datatype definition for Modbus
This table defines the datatypes used for Modbus (the datatypes for the Courier and user
interface are defined within the Menu Database itself using the standard Courier
Datatypes). This section also defines the indexed string setting options for all interfaces.
The datatypes defined within this section are cross reference to from the Menu Database
using a G number.
Part C: Internal digital signals (DDB)
This table defines all of the relay internal digital signals (opto inputs, output contacts and
protection inputs and outputs). A relay may have up to 512 internal signals each reference
by a numeric index as shown in this table. This numeric index is used to select a signal for
the commissioning monitor port. It is also used to explicitly define protection events
produced by the relay.
Part D: Menu Database for MODBUS
This database defines the structure of the menu for the Modbus interface. This includes all
the relay settings and measurements.
Part E: IEC60870-5-103 Interoperability Guide
This table fully defines the operation of the IEC60870-5-103 (VDEW) interface for the relay
it should be read in conjunction with the relevant section of the Communications Chapter of
this Manual (P44x/EN CT).
Page 2 MiCOM P441, P442 & P444
Part F: DNP3.0 Database

This database defines the structure of the menu for the DNP3.0 interface. This includes all
the relay settings and measurements.
Part G: Maintenance records
This section of the Appendix specifies all the maintenance information that can be produced
by the relay.
DEFAULT PROGRAMMABLE SCHEME LOGIC (PSL)
References
Chapter IT: Introduction : User Interface operation and connections to relay
Chapter CT: Communications: Overview of communication interfaces
Courier User Guide R6512
Modicon Modbus Protocol Reference Guide PI-MBUS-300 Rev. E
IEC60870-5-103 Telecontrol Equipment and Systems - Transmission Protocols –
Companion
Standard for the informative interface of Protection Equipment
MiCOM P441, P442 & P444 Page A-1
Part A - Menu Database (Courier)

CourierRef Courier Text Courier Data Type Modbus Address Data Group Default Setting Cell Type Min Max Step asswor
Model Comment
Col Row Start End Courier Modbus Level 1 2 4
00 00 SYSTEM DATA * * *
00 1 Language Indexed String G19 G19 English Setting 0 3 1 2 * * *
00 2 Password ASCII Password(4 bytes) 40001 40002 G20 G20 AAAA Setting 65 90 1 0 * * *
00 4 Description ASCII Text(16 bytes) 40004 40011 G3 MiCOM Setting 32 163 1 2 * * *
00 5 Plant Reference ASCII Text(16 bytes) 40012 40019 G3 ALSTOM Setting 32 163 1 2 * * *
00 6 Model Number ASCII Text(32 bytes) 30020 30035 G3 Model Number Data * * *
00 8 Serial Number ASCII Text(7 bytes) 30044 30051 G3 Serial Number Data * * *
00 9 Frequency Unsigned Integer(1 byte) 40020 40020 G1 50 Setting 50 60 10 2 * * *
0A Comms Level Unsigned Integer(2 bytes) 2 Data * * *
00 0B Relay Address Unsigned Integer(2 bytes) G1 255 Setting 0 255 1 1 * * * Needs to be address of interface
00 0C Plant Status Binary Flags(16 bits) 30002 30002 G4 Data * * *
00 0D Control Status Binary Flags(16 or 32 bits) 30004 30004 G5 Data * * *
00 0E Active Group Unsigned Integer(2 bytes) 30006 30006 G1 G1 Data * * *
00 10 CB Trip/Close Indexed String(2) G55 No Operation Command 0 2 1 1 * * * Visible to LCD+Front Port
00 10 CB Trip/Close Indexed String(2) 40021 40021 G55 G55 No Operation Command 0 2 1 0 * * * Visible to Rear Port
00 11 Software Ref. 1 ASCII Text(16 characters) 30052 30059 G3 Data * * *
00 20 Opto I/P Status Binary Flag(32 bits) 30727 30728 G27 Data * * *
00 21 Relay O/P Status Binary Flag(32 bits) G9 Data * * *
00 22 Alarm Status 1 Binary Flag(32 bits) G96 Data * * *
00 40 Relay O/P Status 1 Binary Flag(32 bits) 30007 30008 G9 Data * * *
00 41 Relay O/P Status 2 Binary Flag(32 bits) 30009 30010 G251 Data
00 50 Alarm Status 1 Binary Flag(32 bits) 30011 30012 G96 Data * * *
00 D0 Access Level Unsigned Integer(2 bytes) 30017 30017 G1 G1 Data * * *
00 D1 Password Control Unsigned Integer(2 bytes) 40022 40022 G22 G22 2 Setting 0 2 1 2 * * *
00 D2 Password Level 1 ASCII Password(4 characters) 40023 40024 G20 G20 AAAA Setting 65 90 1 1 * * *
00 D3 Password Level 2 ASCII Password(4 characters) 40025 40026 G20 G20 AAAA Setting 65 90 1 2 * * *
00 D4-D8Reserved for levels > 2
01 00 VIEW RECORDS * * *
01 1 Select Event Unsigned Integer(2) 40100 40100 G1 0 Setting 0 249 1 0 * * * Max value is oldest record
01 2 Menu Cell Ref Cell Reference (From Record) Data * * * Indicates type of event
01 3 Time & Date IEC870 Time & Date 30103 30106 G12 (From Record) Data * * *
01 4 Event Text Ascii String(32) Data * * * See Event sheet
01 5 Event Value Binary Flag(32)/UINT32 30108 30109 G27 Data * * * Note DTL depends on event type
01 6 Select Fault Unsigned Integer 40101 40101 G1 0 Setting 0 4 1 0 * * * Allows Fault Record to be selected
01 7 Active Group Unsigned Integer 30113 30113 G1 0 Data * * *
N/A Distance Data * * *
N/A Started Phase Data * * *
N/A Tripped Phase Data * * *
N/A Overcurrent Data * * *
N/A Overcurrent Data * * *
N/A Neg Seq O/C Data * * *
N/A Neg Seq O/C Data * * *
N/A Broken Conductor Data * * *
N/A Earth Fault Data * * *
N/A Earth Fault Data * * *
N/A Aided D.E.F Data * * *
N/A Aided D.E.F Data * * *
N/A Undervoltage Data * * *
N/A Undervoltage Data * * *
N/A Overvoltage Data * * *
N/A Overvoltage Data * * *
N/A Breaker Fail Data * * *
N/A Supervision Data * * *
01 8 Faulted Phase Binary Flags (8 Bits) 30114 30114 G16 G16 Data * * * Started phases + tripped phases
01 9 Start Elements Binary Flags (32 Bits) 30115 30116 G84 G84 Data * * * Started elements
01 0A Trip Elements Binary Flags (32 Bits) 30117 30118 G85 G85 Data * * * Tripped elements 1
01 0B Validities Binary Flags (8 Bits) 30119 30119 G130 G130 Data * * * Viliditie of Fault Report
01 0C Time Stamp IEC870 Time & Date 30120 30123 G12 G12 Data * * *
01 0D Fault Alarms Binary Flags (32 Bits) 30124 30125 G87 G87 Data * * * Faullt Alarms/Warnings
01 0E System Frequency Courier Number (frequency) 30126 30126 G25 Data * * *
01 0F Fault Duration Courier Number (time) 30127 30128 G24 Data * * *
01 10 Relay Trip Time Courier Number (time) 30129 30130 G24 Data * * *
01 11 Fault Location Courier Number (Metres) 30131 30132 G125 Data * * * ( (0D08=0 AND 0D07=0) AND 090D <> 0 )
01 12 Fault Location Courier Number (Miles) 30133 30134 G125 Data * * * ( (OD08=0 AND 0D07=1) AND 090D <> 0 )
01 13 Fault Location Courier Number (ohms) 30135 30136 G125 Data * * * ( 0D08 = 1 AND 090D <> 0 )
01 14 Fault Location Courier Number(% ) 30137 30138 G125 Data * * * ( 0D08 = 2 AND 090D <> 0 )
01 15 IA Courier Number (current) 30139 30140 G24 Data * * *
01 16 IB Courier Number (current) 30141 30142 G24 Data * * *
01 17 IC Courier Number (current) 30143 30144 G24 Data * * *
01 1B VAN Courier Number(voltage) 30145 30146 G24 Data * * *
01 1C VBN Courier Number(voltage) 30147 30148 G24 Data * * *
01 1D VCN Courier Number(voltage) 30149 30150 G24 Data * * *
01 1E Fault Resistance Courier Number (Ohms) 30151 30152 G125 Data * * * Resistor for Fault Laocator
01 1F Fault in Zone Indexed string 30153 30153 G110 Data * * * Resistor for Fault Laocator
01 F0 Select Report Unsigned Integer 40102 40102 G1 Manual override to se Setting 0 4 1 2 * * * Allows Self Test Report to be selected
01 F1 Report Text Ascii String(32) Data * * *
01 F2 Maint Type UINT32 30036 30037 G27 Data * * *
01 F3 Maint Data UINT32 30038 30039 G27 Data * * *
01 FF Reset Indication Indexed String G11 No Command 0 1 1 1 * * *
02 00 MEASUREMENTS 1 * * *
02 1 IA Magnitude Courier Number (current) 30200 30201 G24 Data * * *
02 2 IA Phase Angle Courier Number (angle) 30202 30202 G30 Data * * *
02 3 IB Magnitude Courier Number (current) 30203 30204 G24 Data * * *
02 4 IB Phase Angle Courier Number (angle) 30205 30205 G30 Data * * *
02 5 IC Magnitude Courier Number (current) 30206 30207 G24 Data * * *
02 6 IC Phase Angle Courier Number (angle) 30208 30208 G30 Data * * *
02 9 IN Derived Mag Courier Number (current) 30212 30213 G24 Data * * *
02 0A IN Derived Angle Courier Number (current) 30214 30214 G30 Data * * *
02 0D I1 Magnitude Courier Number (current) 30218 30219 G24 Data * * *
02 0E I2 Magnitude Courier Number (current) 30220 30221 G24 Data * * *
02 0F I0 Magnitude Courier Number (current) 30222 30223 G24 Data * * *
02 14 VAB Magnitude Courier Number (voltage) 30230 30231 G24 Data * * *
02 15 VAB Phase Angle Courier Number (angle) 30232 30232 G30 Data * * *
02 16 VBC Magnitude Courier Number (voltage) 30233 30234 G24 Data * * *
02 17 VBC Phase Angle Courier Number (angle) 30235 30235 G30 Data * * *
02 18 VCA Magnitude Courier Number (voltage) 30236 30237 G24 Data * * *
02 19 VCA Phase Angle Courier Number (angle) 30238 30238 G30 Data * * *
02 1A VAN Magnitude Courier Number (voltage) 30239 30240 G24 Data * * *
02 1B VAN Phase Angle Courier Number (angle) 30241 30241 G30 Data * * *
02 1C VBN Magnitude Courier Number (voltage) 30242 30243 G24 Data * * *
02 1D VBN Phase Angle Courier Number (angle) 30244 30244 G30 Data * * *

Model Comment
02 1E VCN Magnitude Courier Number (voltage) 30245 30246 G24 Data * * *
02 1F VCN Phase Angle Courier Number (angle) 30247 30247 G30 Data * * *
02 22 VN Derived Mag Courier Number (voltage) 30248 30249 G24 Data * * *
02 23 VN Derived Ang Courier Number (angle) 30250 30250 G30 Data * * *
02 24 V1 Magnitude Courier Number (voltage) 30251 30252 G24 Data * * *
02 2A Frequency Courier Number (frequency) 30263 30263 G30 Data * * *
02 2B C/S Voltage Mag Courier Number (voltage) 30264 30265 G24 Data * * *
02 2C C/S Voltage Ang Courier Number (angle) 30266 30266 G30 Data * * *
02 2F IM Magnitude Courier Number (current) 30267 30268 G24 Data * * *
02 30 IM Angle Courier Number (angle) 30269 30269 G30 Data * * *
02 31 Slip Frequency Courier Number (frequency) 30270 30270 G30 Data * * *
03 00 MEASUREMENTS 2 * * *
03 1 A Phase Watts Courier Number (Power) 30300 30302 G29 * * *
03 2 B Phase Watts Courier Number (Power) 30303 30305 G29 Data * * *
03 3 C Phase Watts Courier Number (Power) 30306 30308 G29 Data * * *
03 4 A Phase VArs Courier Number (VAr) 30309 30311 G29 Data * * *
03 5 B Phase VArs Courier Number (VAr) 30312 30314 G29 Data * * *
03 6 C Phase VArs Courier Number (VAr) 30315 30317 G29 Data * * *
03 7 A Phase VA Courier Number (VA) 30318 30320 G29 Data * * *
03 8 B Phase VA Courier Number (VA) 30321 30323 G29 Data * * *
03 9 C Phase VA Courier Number (VA) 30324 30326 G29 Data * * *
03 0A 3 Phase Watts Courier Number (Power) 30327 30329 G29 Data * * *
03 0B 3 Phase VArs Courier Number (VAr) 30330 30332 G29 Data * * *
03 0C 3 Phase VA Courier Number (VA) 30333 30335 G29 Data * * *
03 0D Zero Seq Power Courier Number (VA) 30336 30338 G29 Data * * *
03 0E 3Ph Power Factor Courier Number (decimal) 30339 30339 G30 Data * * *
03 0F APh Power Factor Courier Number (decimal) 30340 30340 G30 Data * * *
03 10 BPh Power Factor Courier Number (decimal) 30341 30341 G30 Data * * *
03 11 CPh Power Factor Courier Number (decimal) 30342 30342 G30 Data * * *
03 16 3Ph W Fix Demand 30343 30345 G29 Data * * * 3 Phase Watts - Fixed Demand
03 17 3Ph VArs Fix Dem 30346 30348 G29 Data * * * 3 Phase VArs - Fixed Demand
03 20 3Ph W Peak Demand 30349 30351 G29 Data * * * 3 Phase Watts - Peak Demand
03 21 3Ph VArs Peak Demand Courier Number (decimal) 30352 30354 G29 Data * * * 3 Phase VArs - Peak Demand
03 25 Reset Demand Courier Number (decimal) 40103 40103 G1 0 Command 0 1 1 * * *
06 00 CB CONDITION * * *
06 1 CB A Operations Unsigned Integer 30600 30600 G1 Data * * * Number of Circuit Breaker Operations
06 2 CB B Operations Unsigned Integer 30601 30601 G1 Data * * * Number of Circuit Breaker Operations
06 3 CB C Operations Unsigned Integer 30602 30602 G1 Data * * * Number of Circuit Breaker Operations
06 4 Total IA Broken Courier Number (current) 30603 30604 G125 Data * * * Broken Current A Phase
06 5 Total IB Broken Courier Number (current) 30605 30606 G125 Data * * * Broken Current B Phase
06 6 Total IC Broken Courier Number (current) 30607 30608 G125 Data * * * Broken Current C Phase
06 7 CB Operate Time Courier Number (time) 30609 30609 G25 Data * * * Circuit Breaker operating time
06 8 Reset CB Data Indexed String 40140 40140 G11 G11 No Command 0 1 1 1 * * * Reset All Values
06 9 Total 1P Reclosures Unsigned Integer (16 bits) 30611 30611 G1 Data * * * No of Autoreclosures
06 0A Total 3P Reclosures Unsigned Integer (16 bits) 30612 30612 G1 Data * * * No of Autoreclosures
06 0B Reset Total A/R Indexed String 40141 40141 G11 G11 No Command 0 1 1 1 * * * Reset No of Autoreclosures
07 00 CB CONTROL * * *
07 1 CB Control by Indexed String 40200 40200 G99 G99 Disabled Setting 0 7 1 2 * * *
07 2 Manual Close Pulse Time Courier Number (Time) 40201 40201 G2 0.5 Setting 0.1 10 0.01 2 * * *
07 3 Trip Pulse Time Courier Number (Time) 40202 40202 G2 0.5 Setting 0.1 5 0.01 2 * * *
07 4 Man Close Delay Courier Number (Time) 40203 40203 G2 10 Setting 0.01 600 0.01 2 * * * Manual Close Delay
07 5 Healthy Window Courier Number (Time) 40206 40207 G35 5 Setting 0.01 9999 0.01 2 * * *
07 6 C/S Window Courier Number (Time) 40208 40209 G35 5 Setting 0.01 9999 0.01 2 * * * Check Sync Window
07 7 A/R Single Pole Indexed String 40204 40204 G37 G37 Disabled Setting 0 1 1 2 *
07 8 A/R Three Pole Indexed String 40205 40205 G37 G37 Disabled Setting 0 1 1 2 * * *
08 00 DATE and TIME * * *
08 1 Date/Time IEC870 Time & Date 40300 40303 G12 Setting 0 * * *
N/A Date Front Panel Menu only
N/A Time Front Panel Menu only
08 4 IRIG-B Sync Indexed String 40304 40304 G37 G37 Disabled Setting 0 1 1 2 *
08 5 IRIG-B Status ASCII String 30090 30090 G17 G17 Data *
08 6 Battery Status Indexed String 30091 30091 G59 G59 Data * * *
08 7 Battery Alarm Indexed String 40305 40305 G37 G37 Enabled Setting 0 1 1 2 * * *
09 00 CONFIGURATION * * *
09 1 Restore Defaults Indexed String 40402 40402 G53 G53 No Operation Command 0 5 1 2 * * *
09 2 Setting Group Indexed String 40403 40403 G61 G61 Select via Menu Setting 0 1 1 2 * * *
09 3 Active Settings Indexed String 40404 40404 G90 G90 Group 1 Setting 0 3 1 1 * * *
09 4 Save Changes Indexed String 40405 40405 G62 G62 No Operation Command 0 2 1 2 * * *
09 5 Copy From Indexed String 40406 40406 G90 G90 Group 1 Setting 0 3 1 2 * * *
09 6 Copy to Indexed String 40407 40407 G98 G98 No Operation Command 0 3 1 2 * * *
09 7 Setting Group 1 Indexed String 40408 40408 G37 G37 Enabled Setting 0 1 1 2 * * *
09 8 Setting Group 2 Indexed String 40409 40409 G37 G37 Disabled Setting 0 1 1 2 * * *
09 9 Setting Group 3 Indexed String 40410 40410 G37 G37 Disabled Setting 0 1 1 2 * * *
09 0A Setting Group 4 Indexed String 40411 40411 G37 G37 Disabled Setting 0 1 1 2 * * *
09 0D Dist. Protection Indexed String 40412 40412 G37 G37 Enabled Setting 0 1 1 2 * * *
09 10 Power-Swing Indexed String 40413 40413 G37 G37 Enabled Setting 0 1 1 2 * * *
09 11 Back-Up I> Indexed String 40414 40414 G37 G37 Disabled Setting 0 1 1 2 * * *
09 12 Neg Sequence O/C Indexed String 40415 40415 G37 G37 Disabled Setting 0 1 1 2 * * *
09 13 Broken Conductor Indexed String 40416 40416 G37 G37 Disabled Setting 0 1 1 2 * * *
09 14 Earth Fault Prot Indexed String 40417 40417 G131 G131 Disabled Setting 0 2 1 2 * * *
09 15 Aided D.E.F Indexed String 40418 40418 G37 G37 Enabled Setting 0 1 1 2 * * *
09 16 Volt Protection Indexed String 40419 40419 G37 G37 Disabled Setting 0 1 1 2 * * *
09 17 CB Fail & I< Indexed String 40420 40420 G37 G37 Enabled Setting 0 1 1 2 * * *
09 18 Supervision Indexed String 40421 40421 G37 G37 Enabled Setting 0 1 1 2 * * *
09 19 System Checks Indexed String 40422 40422 G37 G37 Disabled Setting 0 1 1 2 * * *
09 24 Internal A/R Indexed String 40423 40423 G37 G37 Disabled Setting 0 1 1 2 * * *
09 25 Input Labels Indexed String G80 Visible Setting 0 1 1 1 * * *
09 26 Output Labels Indexed String G80 Visible Setting 0 1 1 1 * * *
09 28 CT & VT Ratios Indexed String G80 Visible Setting 0 1 1 1 * * *
09 29 Event Recorder Indexed String G80 Invisible Setting 0 1 1 1 * * *
09 2A Disturb Recorder Indexed String G80 Invisible Setting 0 1 1 1 * * * Disturbance recorder
09 2B Measure't Setup Indexed String G80 Invisible Setting 0 1 1 1 * * *
09 2C Comms Settings Indexed String G80 Visible Setting 0 1 1 1 * * *
09 2D Commission Tests Indexed String G80 Invisible Setting 0 1 1 1 * * *
09 2E Setting Values Indexed String G54 Primary Setting 0 1 1 1 * * *
0A 00 CT AND VT RATIOS * * *
0A 1 Main VT Primary Courier Number (Voltage) 40500 40501 G35 110 Setting 100 1000000 1 2 * * * Label V1=1
0A 2 Main VT Sec'y Courier Number (Voltage) 40502 40502 G2 110 Setting 80*V1 140*V1 1*V1 2 * * *
0A 3 C/S VT Primary Courier Number (Voltage) 40503 40504 G35 110 Setting 100 1000000 1 2 * * * Label V2=C/S VT Rating/110
0A 4 C/S VT Secondary Courier Number (Voltage) 40505 40505 G2 110 Setting 80*V2 140*V2 1*V2 2 * * * Check Sync VT Secondary
0A 7 Phase CT Primary Courier Number (Current) 40506 40506 G2 1 Setting 1 30000 1 2 * * * I1=Phase CT secondary rating

Model Comment
0A 8 Phase CT Sec'y Courier Number (Current) 40507 40507 G2 1 Setting 1 5 4 2 * * * Label NM1 = 0A08^1001
0A 0D Mcomp CT Primary Courier Number (current) 40508 40508 G2 1 Setting 1 30000 1 2 * * * Label I4=Mcomp CT Rating
0A 0E Mcomp CT Sec'y Courier Number (current) 40509 40509 G2 1 Setting 1 5 4 2 * * * Mutua compensation CT Secondary
0A 0F C/S Input Indexed String 40510 40510 G40 G40 A-N Setting 0 3 1 2 * * *
0A 10 Main VT Location Indexed String 40511 40511 G89 G89 Line Setting 0 1 1 2 * * *
0B 00 RECORD CONTROL * * *
0B 1 Clear Events Indexed String G11 No Command 0 1 1 1 * * *
0B 2 Clear Faults Indexed String G11 No Command 0 1 1 1 * * *
0B 3 Clear Maint Indexed String G11 No Command 0 1 1 1 * * *
0B 4 Alarm Event Indexed String 40520 G11 G37 No Command 0 1 1 1 * * *
0B 5 Relay O/P Event Indexed String 40521 G11 G37 No Command 0 1 1 1 * * *
0B 6 Opto Input Event Indexed String 40522 G11 G37 No Command 0 1 1 1 * * *
0B 7 System Event Indexed String 40523 G11 G37 No Command 0 1 1 1 * * *
0B 8 Fault Rec Event Indexed String 40524 G11 G37 No Command 0 1 1 1 * * *
0B 9 Maint Rec Event Indexed String 40525 G11 G37 No Command 0 1 1 1 * * *
0B 0A Protection Event Indexed String 40526 G11 G37 No Command 0 1 1 1 * * *
0B 0B DDB element 31 - 0 Binary Flag (32 bits) 40527 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 0C DDB element 63 - 32 Binary Flag (32 bits) 40529 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 0D DDB element 95 - 64 Binary Flag (32 bits) 40531 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 0E DDB element 127 - 96 Binary Flag (32 bits) 40533 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 0F DDB element 159 - 128 Binary Flag (32 bits) 40535 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 10 DDB element 191 - 160 Binary Flag (32 bits) 40537 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 1A DDB element 511 - 480 Binary Flag (32 bits) 40557 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 1B DDB element 543 - 512 Binary Flag (32 bits) 40559 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 1C DDB element 575 - 544 Binary Flag (32 bits) 40561 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 1D DDB element 607 - 575 Binary Flag (32 bits) 40563 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 1E DDB element 639 - 608 Binary Flag (32 bits) 40565 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 1F DDB element 671 - 640 Binary Flag (32 bits) 40567 G27 0xFFFFFFFF Setting 0 1 32 1 * * * Visible if one DDB signal is Protection EVENT
0B 2A DDB element 1022 - 992 Binary Flag (31 bits) 40589 G27 0x7FFFFFFF Setting 0 1 31 1 * * * Visible if one DDB signal is Protection EVENT
0C 00 DISTURB RECORDER * * *
0C 1 Duration Courier Number (time) 40600 40600 G2 1.5 Setting 0.1 10.5 0.01 2 * * *
0C 2 Trigger Position Courier Number (percentage) 40601 40601 G2 33.3 Setting 0 100 0.1 2 * * *
0C 3 Trigger Mode Indexed String 40602 40602 G34 G34 Single 0 1 1 2 * * *
0C 4 Analog Channel 1 Indexed String 40603 40603 G31 G31 VA Setting 0 10 1 2 * * *
0C 5 Analog Channel 2 Indexed String 40604 40604 G31 G31 VB Setting 0 10 1 2 * * *
0C 6 Analog Channel 3 Indexed String 40605 40605 G31 G31 VC Setting 0 10 1 2 * * *
0C 7 Analog Channel 4 Indexed String 40606 40606 G31 G31 VN Setting 0 10 1 2 * * *
0C 8 Analog Channel 5 Indexed String 40607 40607 G31 G31 IA Setting 0 10 1 2 * * *
0C 9 Analog Channel 6 Indexed String 40608 40608 G31 G31 IB Setting 0 10 1 2 * * *
0C 0A Analog Channel 7 Indexed String 40609 40609 G31 G31 IC Setting 0 10 1 2 * * *
0C 0B Analog Channel 8 Indexed String 40610 40610 G31 G31 IN Setting 0 10 1 2 * * *
0C 0C Digital Input 1 Indexed String 40611 40611 G32 G32 Relay 1 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 0D Input 1 Trigger Indexed String 40612 40612 G66 G66 No Trigger Setting 0 2 1 2 * * *
0C 0E Digital Input 2 Indexed String 40613 40613 G32 G32 Relay 2 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 0F Input 2 Trigger Indexed String 40614 40614 G66 G66 No Trigger Setting 0 2 1 2 * * *
0C 10 Digital Input 3 Indexed String 40615 40615 G32 G32 Relay 3 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 11 Input 3 Trigger Indexed String 40616 40616 G66 G66 No Trigger Setting 0 2 1 2 * * *
0C 1A Digital Input 8 Indexed String 40625 40625 G32 G32 Relay 8 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 1B Input 8 Trigger Indexed String 40626 40626 G66 G66 No Trigger Setting 0 2 1 2 * * *
0C 1C Digital Input 9 Indexed String 40627 40627 G32 G32 Relay 9 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 1E Digital Input 10 Indexed String 40629 40629 G32 G32 Relay 10 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 28 Digital Input 15 Indexed String 40639 40639 G32 G32 Not Used Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 2A Digital Input 16 Indexed String 40641 40641 G32 G32 Not Used Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 2C Digital Input 17 Indexed String 40643 40643 G32 G32 Not Used Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 2E Digital Input 18 Indexed String 40645 40645 G32 G32 Not Used Setting 0 DDB Size 1 2 * * * DDB Size different for each model

Model Comment
0C 3C Digital Input 25 Indexed String 40659 40659 G32 G32 Not Used Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0C 3E Digital Input 26 Indexed String 40661 40661 G32 G32 Not Used Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0D 00 MEASURE'T SETUP * * * MEASUREMENT SETTINGS
0D 1 Default Display Indexed String 40700 40700 G52 G52 Description Setting 0 6 1 2 * * *
0D 2 Local Values Indexed String 40701 40701 G54 G54 Secondary Setting 0 1 1 2 * * * Local Measurement Values
0D 3 Remote Values Indexed String 40702 40702 G54 G54 Primary Setting 0 1 1 2 * * * Remote Measurement Values
0D 4 Measurement Ref Indexed String 40703 40703 G56 G56 VA Setting 0 5 1 1 * * * Measurement Phase Reference
0D 5 Measurement Mode Unisgned Integer 40704 40704 G1 G1 0 Setting 0 3 1 2 * * *
0D 6 Demand Interval Courier Number (Time - Minutes40705 40705 G2 G2 30 Setting 1 99 1 2 * * *
0D 7 Distance Unit Indexed String 40706 40706 G97 G97 Kilometres Setting 0 1 1 2 * * *
0D 8 Fault Location Indexed String 40707 40707 G51 G51 Distance Setting 0 2 1 2 * * *
0E 00 COMMUNICATIONS * * *
0E 1 Rear Protocol Indexed String G71 Data * * *
0E 2 Remote Address Unsigned integer 255 Setting 0 255 1 1 * * * Build = Courier
0E 2 Remote Address Unsigned integer 40800 40800 G1 1 Setting 0 247 1 1 * * * Build = Modbus
0E 2 Remote Address Unsigned integer 1 Setting 0 255 1 1 * * * Build = IEC60870-5-103
0E 2 Remote Address Unsigned integer 1 Setting 0 65534 1 1 * * * Build = DNP
0E 3 Inactivity Timer Courier Number (Time-minutes) 40801 40801 G2 15 Setting 1 30 1 2 * * *
0E 4 Baud Rate Indexed String G38v 19200 bits/s Setting 0 2 1 2 * * * Build = Modbus
0E 4 Baud Rate Indexed String 40802 40802 G38m G38 19200 bits/s Setting 0 1 1 2 * * * Build = IEC60870-5-103
0E 4 Baud Rate Indexed String G38d 19200 bits/s Setting 0 1 1 2 * * * Build = DNP
0E 5 Parity Indexed String 40803 40803 G39 G39 None Setting 0 2 1 2 * * * Build = Modbus
0E 5 Parity Indexed String G39 None Setting 0 2 1 2 * * * Build = DNP
0E 6 Measure't Period Courier Number (Time) 10 Setting 1 60 1 2 * * * Build = IEC60870-5-103
0E 7 Physical Link Indexed String G21 RS485 Setting 0 1 1 1 * * * Build=IEC60870-5-103
0E 8 Time Sync Indexed String G37 Disabled Setting 0 1 1 2 * * * Build = DNP
0E A CS103 Blocking Indexed String G210 Disabled Setting 0 2 1 2 * * * Build = IEC60870-5-103
0E 1F ETHERNET COMMS (Sub-heading)
0E 20 IP Address ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 21 Subnet Mask ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 24 Number of Routes Unsigned Integer (16 bits) 0 Setting 0 4 1 1 * * * Build = UCA2.0
0E 25 Router Address 1 ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 26 Target Network 1 ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 28 Target Network 2 ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 2A Target Network 3 ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 2B Router Address 4 ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 2C Target Network 4 ASCII Text (16 chars) 000.000.000.000 Setting 48 57 1 1 * * * Build = UCA2.0
0E 2D Inactivity Timer Unsigned Integer (16 bits) 15 Setting 1 30 1 1 * * * Build = UCA2.0
0E 2E Default Pass Lvl Unsigned Integer (16 bits) 2 Setting 0 2 1 1 * * * Build = UCA2.0
0E 2F GOOSE Min Cycle Unsigned Integer (16 bits) 10 Setting 0 1 1
0E 30 GOOSE Min Cycle Unsigned Integer (16 bits) 0 Setting 0 1 1
0E 31 GOOSE Increment Unsigned Integer (16 bits) 900 Setting 0 1 1
0E 32 GOOSE Startup Indexed String Broadcast Setting
0E 34 GOOSE VIP Status Binary Flag (32 bits) 0x00000000h Data
0E 36 NSAP Address ASCII Text 0x00000000h Setting
0E 37 Transport Select ASCII Text 00.00.00.00 Setting
0E 38 Session Select ASCII Text 00.00 Setting
0E 39 Present. Select ASCII Text 00.00 Setting
0E 3A AP Title ASCII Text 000.000.000.000 Setting
0E 3B AE Qual. Used Indexed String Not Used Setting
0E 3C AE Qualifier Unsigned Integer (16 bits) 0 Setting
0E 3D Ethernet Media Indexed String G220 Copper Setting 0 1 1 1 * * *
0E 3F GOOSE STATISTICS (Sub Heading)
0E 40 Enrolled Flags Binary Flag (32 bits) 0x00000000h Data
0E 41 Our Tx Msg Cnt. Unsigned Integer (16 bits) 0 Data
0E 42 Our Rx Msg Cnt. Unsigned Integer (16 bits) 0 Data
0E 43 Our DDB Changes Unsigned Integer (16 bits) 0 Data
0E 44 Our Last Seq Tx Unsigned Integer (16 bits) 0 Data
0E 45 Our Last Msg Tx Unsigned Integer (16 bits) 0 Data
0E 46 Our Msg Rjct Cnt Unsigned Integer (16 bits) 0 Data
0E 50 IED View Select Unsigned Integer (16 bits) 0 Setting
0E 51 IED Recvd Msgs Unsigned Integer (16 bits) 0 Data
0E 52 IED Last Seq Rx Unsigned Integer (16 bits) 0 Data
0E 53 IED Last Msg Rx Unsigned Integer (16 bits) 0 Data
0E 54 IED Missed Msgs Unsigned Integer (16 bits) 0 Data
0E 55 IED Missed Chngs Unsigned Integer (16 bits) 0 Data
0E 56 IED Timeouts Unsigned Integer (16 bits) 0 Data
0E 5F IED Stats Reset Indexed String Our IED Setting
0E 60 Loopback Mode Indexed String No Action Setting
0E 61 Reload Mode Indexed String No Action Setting
0E 81 RP2 Protocol Indexed String G71 G71 Courier Data * * * SMF
0E 84 RP2 Card Status Indexed String G204 G204 Data * * * SMF
0E 88 RP2 Port Config Indexed String G205 G205 EIA232 (RS232) Setting 0 1 1 2 * * * SMF
0E 8A RP2 Comms Mode Indexed String G206 G206 IEC60870 FT1.2 Setting 0 1 1 2 * * * SMF
0E 90 RP2 Address Unsigned Integer (16 bits) 255 Setting 0 255 1 1 * * * SMF
0E 92 RP2 InactivTimer Courier Number (time-minutes) 15 Setting 1 30 1 2 * * * SMF
0E 94 RP2 Baud Rate Indexed String G38 G38m 19200 bits/s Setting 0 1 1 2 * * * SMF
0F 00 COMMISSION TESTS * * *
0F 1 Opto I/P Status Binary Flag(32 bits) G27 Data * * *
0F 2 Relay Status 1 Binary Flag(32 bits) G27 Data * * *
0F 3 Relay Status 2 Binary Flag(32 bits) G27 Data
0F 4 Test Port Status Binary Flags(8 bits) 30722 30722 G124 Data * * *

Model Comment
0F 5 LED Status Binary Flags(8 bits) 0-7 Data * * *
0F 6 Monitor Bit 1 Unsigned Integer 40850 40849 G32 G32 Relay 1 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0F 0A Monitor Bit 5 Unsigned Integer 40854 40853 G32 G32 Relay 5 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0F 0B Monitor Bit 6 Unsigned Integer 40855 40854 G32 G32 Relay 6 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0F 0C Monitor Bit 7 Unsigned Integer 40856 40855 G32 G32 Relay 7 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0F 0D Monitor Bit 8 Unsigned Integer 40857 40856 G32 G32 Relay 8 Setting 0 DDB Size 1 2 * * * DDB Size different for each model
0F 0E Test Mode Indexed String 40858 40858 G204 G204 Disabled Setting 0 2 1 2 * * *
0F 0F Test Pattern 1 Binary Flags (32bits) 40859 40860 G9 G9 0 Setting 0 4.29E+09 1 2 * * *
0F 10 Test Pattern 2 Binary Flags (32bits) 40861 40862 G9 G9 0 Setting 0 16383 1 2
0F 11 Contact Test Indexed String 40863 40863 G93 G93 No Operation Command 0 2 1 2 * * *
0F 12 Test LEDs Binary Flags (8bits) 40864 40864 G94 G94 No Operation Command 0 1 1 2 * * *
0F 13 Autoreclose Test Indexed String 40865 40865 G36 G36 No Operation Command 0 4 1 2 * * * 0924=1 AND 0F0E=2
0F 20 DDB element 31 - 0 Binary Flag (32 bits) 30723 30724 G27 Data * * * Relay
0F 21 DDB element 63 - 32 Binary Flag (32 bits) 30725 30726 G27 Data * * * Opto
0F 22 DDB element 95 - 64 Binary Flag (32 bits) 30727 30728 G27 Data * * *
0F 2A DDB element 351 - 320 Binary Flag (32 bits) 30743 30744 G27 Data * * *
0F 2B DDB element 383 - 352 Binary Flag (32 bits) 30745 30746 G27 Data * * *
0F 2C DDB element 415 - 384 Binary Flag (32 bits) 30747 30748 G27 Data * * *
0F 2D DDB element 447 - 415 Binary Flag (32 bits) 30749 30750 G27 Data * * *
0F 2E DDB element 479 - 448 Binary Flag (32 bits) 30751 30752 G27 Data * * *
0F 2F DDB element 511 - 480 Binary Flag (32 bits) 30753 30754 G27 Data * * *
0F 3A DDB element 863 - 832 Binary Flag (32 bits) 30775 30776 G27 Data * * *
0F 3B DDB element 895 - 864 Binary Flag (32 bits) 30777 30778 G27 Data * * *
0F 3C DDB element 927 - 896 Binary Flag (32 bits) 30779 30780 G27 Data * * *
0F 3D DDB element 959 - 928 Binary Flag (32 bits) 30781 30782 G27 Data * * *
0F 3E DDB element 991 - 960 Binary Flag (32 bits) 30783 30784 G27 Data * * *
0F 3F DDB element 1022 - 992 Binary Flag (31 bits) 30785 30786 G27 Data * * *
10 00 CB MONITOR SETUP * * *
10 1 Broken I^ Courier Number (Decimal) 40151 40151 G2 2 Setting 1 2 0.1 2 * * * Broken Current Index
10 2 I^ Maintenance Indexed String 40152 40152 G88 G88 Alarm Disabled Setting 0 1 1 2 * * * Broken Current to cause maintenance alarm
10 3 I^ Maintenance Courier Number (Current) 40153 40154 G35 1000 Setting 1*NM1 25000*NM11*NM1 2 * * * IX Maintenance Alarm
10 4 I^ Lockout Indexed String 40155 40155 G88 G88 Alarm Disabled Setting 0 1 1 2 * * * Broken Current to cause lockout alarm
10 5 I^ Lockout Courier Number (Current) 40156 40157 G35 2000 Setting 1*NM1 25000*NM11*NM1 2 * * * IX Maintenance Lockout
10 6 N° CB Ops Maint Indexed String 40158 40158 G88 G88 Alarm Disabled Setting 0 1 1 2 * * * Circuit Breaker Trips to cause maintenance alarm
10 7 N° CB Ops Maint Unsigned Integer 40159 40159 G1 10 Setting 1 10000 1 2 * * * Number of Circuit Breaker Trips
10 8 N° CB Ops Lock Indexed String 40160 40160 G88 G88 Alarm Disabled Setting 0 1 1 2 * * * Circuit Breaker Trips to cause lockout alarm
10 9 N° CB Ops Lock Unsigned Integer 40161 40161 G1 20 Setting 1 10000 1 2 * * * Number of Circuit Breaker Trips for lockout alarm
10 0A CB Time Maint Indexed String 40162 40162 G88 G88 Alarm Disabled Setting 0 1 1 2 * * * Circuit Breaker Operating Time
10 0B CB Time Maint Courier Number (Time) 40163 40164 G35 0.1 Setting 0.005 0.5 0.001 2 * * * Circuit Breaker Operating time
10 0C CB Time Lockout Indexed String 40165 40165 G88 G88 Alarm Disabled Setting 0 1 1 2 * * * Circuit Breaker Operating Time
10 0D CB Time Lockout Courier Number (Time) 40166 40167 G35 0.2 Setting 0.005 0.5 0.001 2 * * * Circuit Breaker Operating time
10 0E Fault Freq Lock Indexed String 40168 40168 G88 G88 Alarm Disabled Setting 0 1 1 2 * * * Excessive fault frequency
10 0F Fault Freq Count Unsigned Integer 40169 40169 G1 10 Setting 0 9999 1 2 * * * Excessive Fault Frequency Counter
10 10 Fault Freq Time Courier Number (time) 40170 40171 G35 3600 Setting 0 9999 1 2 * * * Excessive Fault Frequency Time
10 11 Lockout Reset Indexed String 40172 40172 G11 G11 No Command 0 1 1 2 * * * Reset Maintenance Alarms
10 12 Reset Lockout by Indexed String 40173 40173 G81 G81 CB Close Setting 0 1 1 2 * * *
10 13 Man Close RstDly Courier Number (time) 40174 40174 G2 5 Setting 0.01 600 0.01 2 * * * Manual Close Reset Delay
11 0 UNIVERSAL INPUTS * * *
11 1 Global threshold Indexed String 40900 40900 G200 G200 24-27V Setting 0 5 1 2 * * *
11 2 Opto Input 1 Indexed String 40901 40901 G201 G201 24-27V Setting 0 4 1 2 * * *
11 0A Opto Input 9 Indexed String 40909 40909 G201 G201 24-27V Setting 0 4 1 2 * *
11 0B Opto Input 10 Indexed String 40910 40910 G201 G201 24-27V Setting 0 4 1 2 * *
11 0C Opto Input 11 Indexed String 40911 40911 G201 G201 24-27V Setting 0 4 1 2 * *
11 0D Opto Input 12 Indexed String 40912 40912 G201 G201 24-27V Setting 0 4 1 2 * *
11 0E Opto Input 13 Indexed String 40913 40913 G201 G201 24-27V Setting 0 4 1 2 * *
11 0F Opto Input 14 Indexed String 40914 40914 G201 G201 24-27V Setting 0 4 1 2 * *
11 10 Opto Input 15 Indexed String 40915 40915 G201 G201 24-27V Setting 0 4 1 2 * *
11 11 Opto Input 16 Indexed String 40916 40916 G201 G201 24-27V Setting 0 4 1 2 * *
11 12 Opto Input 17 Indexed String 40917 40917 G201 G201 24-27V Setting 0 4 1 2 *
11 1A Opto Input 25 Indexed String 40925 40925 G201 G201 24-27V Setting 0 4 1 2
11 1B Opto Input 26 Indexed String 40926 40926 G201 G201 24-27V Setting 0 4 1 2
11 1C Opto Input 27 Indexed String 40927 40927 G201 G201 24-27V Setting 0 4 1 2
11 1D Opto Input 28 Indexed String 40928 40928 G201 G201 24-27V Setting 0 4 1 2
11 1E Opto Input 29 Indexed String 40929 40929 G201 G201 24-27V Setting 0 4 1 2
11 1F Opto Input 30 Indexed String 40930 40930 G201 G201 24-27V Setting 0 4 1 2
11 20 Opto Input 31 Indexed String 40931 40931 G201 G201 24-27V Setting 0 4 1 2
11 21 Opto Input 32 Indexed String 40932 40932 G201 G201 24-27V Setting 0 4 1 2
PROTECTION SETTINGS
DISTANCE ELEMENTS

Model Comment
30 1 Line Setting (Sub Heading) * * *
30 2 Line Length Courier Number (metres) 41000 41001 G35 100000 Setting 300 1000000 10 2 * * * Length in Km
30 3 Line Length Courier Number (miles) 41002 41003 G35 62 Setting 0.2 625 0.005 2 * * * Setting strored in Km, displayed using miles
30 4 Line Impedance Courier Number(Ohms) 41004 41005 G35 12 Setting 0.001*V1/ 500*V1/I1 0.001*V1 2 * * * Positive Sequence Impedance
30 5 Line Angle Courier Number (Angle) 41006 41006 G2 70 Setting -90 90 0.1 2 * * * Positive Sequence Angle
30 6 Zone Setting (Sub Heading) * * *
30 7 Zone Status Binary Flag G120 G120 000011110 Setting 0 31 1 2 * * *
30 8 kZ1 Res Comp Courier Number 41007 41007 G2 1 Setting 0 7 0.001 2 * * *
30 9 kZ1 Angle Courier Number (Angle) 41008 41008 G2 0 Setting -180 180 0.1 2 * * *
30 0A Z1 Courier Number(Ohm) 41009 41010 G35 10 Setting 0.001*V1/ 500*V1/I1 0.001*V1 2 * * *
30 0B Z1X Courier Number(Ohms) 41011 41012 G35 15 Setting 0.001*V1/ 500*V1/I1 0.001*V1 2 * * * (3007 AND 000001b) > 0
30 0C R1G Courier Number(Ohms) 41013 41013 G2 10 Setting 0 400*V1/I1 0.01*V1/I 2 * * *
30 0D R1Ph Courier Number(Ohms) 41014 41014 G2 10 Setting 0 400*V1/I1 0.01*V1/I 2 * * *
30 0E tZ1 Courier Number(Time) 41015 41015 G2 0 Setting 0 10 0.002 2 * * *
30 0F kZ2 Res Comp Courier Number 41016 41016 G2 1 Setting 0 7 0.001 2 * * * (3007 AND 000010b) > 0
30 10 kZ2 Angle Courier Number (Angle) 41017 41017 G2 0 Setting -180 180 0.1 2 * * * (3007 AND 000010b) > 0
30 11 Z2 Courier Number(Ohms) 41018 41019 G35 20 Setting 0.001*V1/ 500*V1/I1 0.001*V1 2 * * * (3007 AND 000010b) > 0
30 12 R2G Courier Number(Ohms) 41020 41020 G2 20 Setting 0 400*V1/I1 0.01*V1/I 2 * * * (3007 AND 000010b) > 0
30 13 R2Ph Courier Number(Ohms) 41021 41021 G2 20 Setting 0 400*V1/I1 0.01*V1/I 2 * * * (3007 AND 000010b) > 0
30 14 tZ2 Courier Number(Time) 41022 41022 G2 0.2 Setting 0 10 0.01 2 * * * (3007 AND 000010b) > 0
30 15 kZ3/4 Res Comp Courier Number 41023 41023 G2 1 Setting 0 7 0.001 2 * * * (3007 AND 001000b) > 0
30 16 kZ3/4 Angle Courier Number (Angle) 41024 41024 G2 0 Setting -180 180 0.1 2 * * * (3007 AND 001000b) > 0
30 17 Z3 Courier Number(Ohms) 41025 41026 G35 30 Setting 0.001*V1/ 500*V1/I1 0.001*V1 2 * * * (3007 AND 001000b) > 0
30 18 R3G - R4G Courier Number(Ohms) 41027 41027 G2 30 Setting 0 400*V1/I1 0.01*V1/I 2 * * * (3007 AND 001000b) > 0
30 19 R3Ph - R4Ph Courier Number(Ohms) 41028 41028 G2 30 Setting 0 400*V1/I1 0.01*V1/I 2 * * * (3007 AND 001000b) > 0
30 1A tZ3 Courier Number(Time) 41029 41029 G2 0.6 Setting 0 10 0.01 2 * * * (3007 AND 001000b) > 0
30 1B Z4 Courier Number(Ohms) 41030 41031 G35 40 Setting 0.001*V1/ 500*V1/I1 0.001*V1 2 * * * (3007 AND 010000b) > 0
30 1C tZ4 Courier Number(Time) 41032 41032 G2 1 Setting 0 10 0.01 2 * * * (3007 AND 010000b) > 0
30 1D Zone P - Direct. Indexed String 41033 41033 G123 Directional Fwd Setting 0 1 1 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 1E kZp Res Comp Courier Number 41034 41034 G2 1 Setting 0 7 0.001 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 1F kZp Angle Courier Number (Angle) 41035 41035 G2 0 Setting -180 180 0.1 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 20 Zp Courier Number(Ohms) 41036 41037 G35 25 Setting 0.001*V1/ 500*V1/I1 0.001*V1 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 21 RpG Courier Number(Ohms) 41038 41038 G2 25 Setting 0 400*V1/I1 0.01*V1/I 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 22 RpPh Courier Number(Ohms) 41039 41039 G2 25 Setting 0 400*V1/I1 0.01*V1/I 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 23 tZp Courier Number(Time) 41040 41040 G2 0.4 Setting 0 10 0.01 2 * * * ((3007 AND 010100b) > 0) and (301D = 1)) x
30 24 Serial Comp Line Indexed String 41041 41041 G37 Disableb Setting 0 1 1 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 25 Zone Overlap Mode Indexed String 41042 41042 G37 Disableb Setting 0 1 1 2 * * * ((3007 AND 010100b) > 0) and (301D = 1))
30 26 Fault Locator (Sub Heading) * * *
30 27 kZm Mutual Comp Courier Number 41043 41043 G2 0 Setting 0 7 0.01 2 * * *
30 28 kZm Angle Courier Number (Angle) 41044 41044 G2 0 Setting -180 180 0.1 2 * * *
31 00 GROUP 1 * * *
31 1 Program Mode Indexed String 41050 41050 G106 G106 Standard Scheme Setting 0 1 1 2 * * *
31 2 Standard Mode Indexed String 41051 41051 G107 G107 Basic + Z1X Setting 0 6 1 2 * * *
31 3 Fault Type Indexed String 41052 41052 G115 G115 Both Enabled Setting 0 2 1 2 * * *
31 4 Trip Mode Indexed String 41053 41053 G114 G114 Force 3 Poles Trip Setting 0 2 1 2 * Trip mode for the distance protection
31 5 Sig. Send Zone Indexed String 41054 41054 G108 G108 None Setting 0 3 1 2 * * * Signal Send Zone
31 6 DistCR Indexed String 41055 41055 G109 G109 None Setting 0 5 1 2 * * * Type of Scheme on signal Recieve
31 7 Tp Courier Number(Time) 41056 41056 G2 0.02 Setting 0 1 0.002 2 * * * (((3102 = 5) OR (3102 = 6)) AND (3101 = 0))
31 8 tReversal Guard Courier Number(Time) 41057 41057 G2 0.02 Setting 0 0.15 0.002 2 * * * Time Delay Reversal Guard
31 9 Unblocking Logic Indexed String 41058 41058 G113 G113 None Setting 0 2 1 * * * Type of TAC Receive
31 0A TOR-SOTF Mode Binary Flags (16bits) 41059 41059 G118 G118 48 Setting 0 8192 1 2 * * *
31 0B SOFT Delay Courier Number(Time) 41060 41060 G2 110 Setting 10 3600 1 2 * * *
31 0C Z1Ext On Chan.Fail Indexed String 41061 41061 G37 G37 Disabled Setting 0 1 1 2 * * *
31 0D Weak Infeed (Sub Heading) * * * ((3101=0) AND ((3102 >=1) AND (3102)<=4))) OR
31 0E WI :Mode Status Indexed String 41062 41062 G116 G116 Disabled Setting 0 2 1 2 * * *
31 0F WI : Single Pole Trip Indexed String 41063 41063 G37 G37 Disabled Setting 0 1 1 2 *
31 10 WI : V< Thres. Courier Number (Voltage) 41064 41064 G2 45 Setting 10 70 5 2 * * *
31 11 WI : Trip Time Delay Courier Number (Time) 41065 41065 G2 0.06 Setting 0 1 0.002 2 * * *
31 12 Loss Of Load (Sub Heading) * * *
31 13 LoL: Mode Status Indexed String 41066 41066 G37 G37 Disabled Setting 0 1 1 2 * * *
31 14 LoL. Chan. Fail Indexed String 41067 41067 G37 G37 Disabled Setting 0 1 1 2 * * *
31 15 LoL: I< Courier Number (Current) 41068 41068 G2 0.5 Setting 0.05*I1 1*I1 0.05*I1 2 * * *
31 16 LoL: Window Courier Number (Time) 41069 41069 G2 0.04 Setting 0.01 0.1 0.01 2 * * *
32 00 GROUP 1 * * *
32 2 DX Courier Number (Ohms) 41151 41151 G2 0.5 Setting 0 400*V1/I1 0.01*V1/I 2 * * *
32 3 IN > Status Indexed String 41152 41152 G37 G37 Enabled Setting 0 1 1 2 * * *
32 4 IN > (% Imax) Courier Number (%) 41153 41153 G2 40 Setting 10 100 1 2 * * *
32 5 I2 > Status Indexed String 41154 41154 G37 G37 Enabled Setting 0 1 1 2 * * *
32 6 I2 > (% Imax) Courier Number (%) 41155 41155 G2 30 Setting 10 100 1 2 * * *
32 7 Imax Line > Status Indexed String 41156 41156 G37 G37 Enabled Setting 0 1 1 2 * * *
32 8 Imax Line > Courier Number (Current) 41157 41157 G2 3 Setting 1*I1 20*I1 0.01*I1 2 * * *
32 9 Unblocking Time-Delay Courier Number (Time) 41158 41158 G2 30 Setting 0 30 0.1 2 * * *
32 0A Blocking Zones Binary Flag(8 bits) 41159 41159 G119 G119 0 Setting 0 15 1 2 * * *
35 00 GROUP 1 * * *
35 1 I>1 Function Indexed String 41250 41250 G43 G43 DT Setting 0 10 1 2 * * *
35 2 I>1 Directional Indexed String 41251 41251 G44 G44 Directional Fwd Setting 0 2 1 2 * * *
35 3 I>1 VTS Block Indexed String 41252 41252 G45 G45 Non-Directional Setting 0 1 1 2 * * *
35 4 I>1 Current Set Courier Number (Current) 41253 41253 G2 1.5 Setting 0.08*I1 4.0*I1 0.01*I1 2 * * *
35 5 I>1 Time Delay Courier Number (Time) 41254 41254 G2 1 Setting 0 100 0.01 2 * * *
35 6 I>1 Time Delay VTS Courier Number (Time) 41255 41255 G2 0.2 Setting 0 100 0.01 2 * * * 3501 <> 0 AND 3502<>0 AND 3503 = 1
35 7 I>1 TMS Courier Number (Decimal) 41256 41256 G2 1 Setting 0.025 1.2 0.025 2 * * * 5>=3501>=2
35 8 I>1 Time Dial Courier Number (Decimal) 41257 41257 G2 7 Setting 0.5 15 0.1 2 * * *
35 9 I>1 Reset Char Indexed String 41258 41258 G60 G60 DT Setting 0 1 1 2 * * *
35 0A I>1 tRESET Courier Number (Time) 41259 41259 G2 0 Setting 0 100 0.01 2 * * * 5>=3501>=1 OR (3509=0 AND 3501 >=6)
35 0B I>2 Function Indexed String 41260 41260 G43 G43 DT Setting 0 10 1 2 * * *
35 0C I>2 Directional Indexed String 41261 41261 G44 G44 Non-Directional Setting 0 2 1 2 * * *
35 0D I>2 VTS Block Indexed String 41262 41262 G45 G45 Non-Directional Setting 0 1 1 2 * * *
35 0E I>2 Current Set Courier Number (Current) 41263 41263 G2 2 Setting 0.08*I1 4.0*I1 0.01*I1 2 * * *
35 0F I>2 Time Delay Courier Number (Time) 41264 41264 G2 2 Setting 0 100 0.01 2 * * *
35 10 I>2 Time Delay VTS Courier Number (Time) 41265 41265 G2 2 Setting 0 100 0.01 2 * * * 350B <> 0 AND 350C<>0 AND 350D = 1
35 11 I>2 TMS Courier Number (Decimal) 41266 41266 G2 1 Setting 0.025 1.2 0.025 2 * * * 5>=350B>=2
35 12 I>2 Time Dial Courier Number (Decimal) 41267 41267 G2 7 Setting 0.5 15 0.1 2 * * *
35 13 I>2 Reset Char Indexed String 41268 41268 G60 G60 DT Setting 0 1 1 2 * * *
35 14 I>2 tRESET Courier Number (Time) 41269 41269 G2 0 Setting 0 100 0.01 2 * * * 5>=350B>=1 OR (3513=0 AND 350B >=6)
35 15 I>3 Status Indexed String 41270 41270 G37 G37 Enabled Setting 0 1 1 2 * * *
35 16 I>3 Current Set Courier Number (Current) 41271 41271 G2 3 Setting 0.08*I1 32*I1 0.01*I1 2 * * *
35 17 I>3 Time Delay Courier Number (Time) 41272 41272 G2 3 Setting 0 100 0.01 2 * * *
35 18 I>4 Status Indexed String 41273 41273 G37 G37 Disabled Setting 0 1 1 2 * * *
35 19 I>4 Current Set Courier Number (Current) 41274 41274 G2 4 Setting 0.08*I1 32*I1 0.01*I1 2 * * *
35 1A I>4 Time Delay Courier Number (Time) 41275 41275 G2 4 Setting 0 100 0.01 2 * * *
36 00 GROUP 1 * * *
36 1 I2> Status Indexed String 41300 41300 G37 G37 Enabled Setting 0 1 1 2 * * *
36 2 I2> Directional Indexed String 41301 41301 G44 G44 Non-Directional Setting 0 2 1 2 * * *

Model Comment
36 3 I2> VTS Indexed String 41302 41302 G45 G45 Non-Directional Setting 0 1 1 2 * * *
36 4 I2> Current Set Courier Number (Current) 41303 41303 G2 0.2 Setting 0.08*I1 4*I1 0.01*I1 2 * * *
36 5 I2> Time Delay Courier Number (Time) 41304 41304 G2 10 Setting 0 100 0.01 2 * * *
36 6 I2> Char Angle Courier Number (Angle) 41305 41305 G2 -45 Setting -95 95 1 2 * * *
37 00 GROUP 1 * * *
37 1 Broken Conductor Indexed String 41350 41350 G37 G37 Enabled Setting 0 1 1 2 * * *
37 2 I2/I1 Setting Courier Number (Decimal) 41351 41351 G2 0.2 Setting 0.2 1 0.01 2 * * *
37 3 I2/I1 Time Delay Courier Number (Time) 41352 41352 G2 60 Setting 0 100 0.1 2 * * *
37 4 I2/I1 Trip Indexed String 41353 G37 Disabled Setting 0 1 1 2 * * *
38 00 GROUP 1 * * *
38 1 IN>1 Function Indexed String 41400 41400 G43 G43 DT Setting 0 10 1 2 * * * I>2 Overcurrent Status
38 2 IN>1 Directional Indexed String 41401 41401 G44 G44 Directional Fwd Setting 0 2 1 2 * * *
38 3 IN>1 VTS Block Indexed String 41402 41402 G45 G45 Non-Directional Setting 0 1 1 2 * * *
38 4 IN>1 Current Set Courier Number (Current) 41403 41403 G2 0.2 Setting 0.08*I1 4.0*I1 0.01*I1 2 * * *
38 5 IN>1 Time Delay Courier Number (Time) 41404 41404 G2 1 Setting 0 200 0.01 2 * * *
38 6 IN>1 Time Delay VTS Courier Number (Time) 41405 41405 G2 0.2 Setting 0 200 0.01 2 * * * 3801<>0 AND 3802<>0 AND 3803=1
38 7 IN>1 TMS Courier Number (Decimal) 41406 41406 G2 1 Setting 0.025 1.2 0.025 2 * * * 5>=3801>=2
38 8 IN>1 Time Dial Courier Number (Decimal) 41407 41407 G2 7 Setting 0.5 15 0.1 2 * * *
38 9 IN>1 Reset Char Indexed String 41408 41408 G60 G60 DT Setting 0 1 1 2 * * *
38 0A IN>1 tRESET Courier Number (Time) 41409 41409 G2 0 Setting 0 100 0.01 2 * * * 5>=3801>=1 OR (3809=0 AND 3801>=6)
38 0B IN>2 Status Indexed String 41410 41410 G37 G37 Enabled Setting 0 1 1 2 * * *
38 0C IN>2 Directional Indexed String 41411 41411 G44 G44 Non-Directional Setting 0 2 1 2 * * *
38 0D IN>2 VTS Block Indexed String 41412 41412 G45 G45 Non-Directional Setting 0 1 1 2 * * *
38 0E IN>2 Current Set Courier Number (Current) 41413 41413 G2 0.3 Setting 0.08*I1 32*I1 0.01*I1 2 * * *
38 0F IN>2 Time Delay Courier Number (Time) 41414 41414 G2 2 Setting 0 200 0.01 2 * * *
38 10 IN>2 Time Delay VTS Courier Number (Time) 41415 41415 G2 2 Setting 0 200 0.01 2 * * * 380B<>0 AND 380D=1
38 11 IN> Directional (Sub Heading) 2 3802 >0 OR 380C > 0
38 12 IN> Char Angle Courier Number(Angle) 41416 41416 G2 -45 Setting -95 95 1 2 * * * 3802 >0 0R 380C > 0
38 13 Polarisation Indexed String 41417 41417 G46 G46 Zero Sequence Setting 0 1 1 2 * * * 3802 > 0 0R 380C > 0
39 00 GROUP 1 * * *
39 1 Channel Aided DEF Status Indexed String 41450 41450 G37 G37 Enabled Setting 0 1 1 2 * * *
39 2 Polarisation Indexed String 41451 41451 G46 G46 Zero Sequence Setting 0 1 1 2 * * *
39 3 V> Voltage Set Courier Number (Voltage) 41452 41452 G2 1 Setting 0.5 20 0.01 2 * * *
39 4 IN Forward Courier Number (Current) 41453 41453 G2 0.1 Setting 0.05*I1 4*I1 0.01*I1 2 * * *
39 5 Time Delay Courier Number (Time) 41454 41454 G2 0 Setting 0 10 0.1 2 * * *
39 6 Scheme Logic Indexed String 41455 41455 G112 Shared Setting 0 2 1 2 * * *
39 7 Tripping Indexed String 41456 41456 G48 Three Phase Setting 0 1 1 2 *
3C 00 GROUP 1
3C 1 Zero Seq. Power Status Indexed String 41600 41600 G37 G37 Enabled Setting 0 1 1 2 * * *
3C 2 K Time Delay Factor Courier Number (Time) 41601 41601 G2 0 Setting 0 2 0.2 2 * * *
3C 3 Basis Time Delay Courier Number (Time) 41602 41602 G2 1 Setting 0 10 0.01 2 * * *
3C 4 Residual Current Courier Number (Current) 41603 41603 G2 0.1 Setting 0.05*I1 1*I1 0.01 2 * * *
3C 5 Residual Power Courier Number (Power) 41604 41604 G2 0.5 Setting 0.3*I1*V1 6*I1*V1 0.03*I1*V 2 * * *
42 00 GROUP1
42 1 V< & V> MODE Binary Flags (8bits) 41949 41949 G121 G121 0 Setting 0 15 1 2 * * * 4204 <> 0 OR 4208 <> 0
42 2 UNDER VOLTAGE (Sub Heading)
42 3 V< Measur't Mode Indexed String 41950 41950 G47 G47 Phase-Neutral Setting 0 1 1 2 * * *
42 4 V<1 Function Indexed String 41951 41951 G23 G23 DT Setting 0 2 1 2 * * *
42 5 V<1 Voltage Set Courier Number (Voltage) 41952 41952 G2 50 Setting 10 120 1 2 * * * Range covers Ph-N & Ph-Ph
42 6 V<1 Time Delay Courier Number (Time) 41953 41953 G2 10 Setting 0 100 0.01 2 * * *
42 7 V<1 TMS Courier Number (Decimal) 41954 41954 G2 1 Setting 0.5 100 0.5 2 * * *
42 8 V<2 Status Indexed String 41955 41955 G37 G37 Disabled Setting 0 1 1 2 * * *
42 9 V<2 Voltage Set Courier Number (Voltage) 41956 41956 G2 38 Setting 10 120 1 2 * * * Phase-Neutral
42 0A V<2 Time Delay Courier Number (Time) 41957 41957 G2 5 Setting 0 100 0.01 2 * * *
42 0B OVERVOLTAGE (Sub Heading)
42 0C V> Measur't Mode Indexed String 41958 41958 G47 G47 Phase-Neutral Setting 0 1 1 2 * * *
42 0D V>1 Function Indexed String 41959 41959 G23 G23 DT Setting 0 2 1 2 * * *
42 0E V>1 Voltage Set Courier Number (Voltage) 41960 41960 G2 75 Setting 60 185 1 2 * * *
42 0F V>1 Time Delay Courier Number (Time) 41961 41961 G2 10 Setting 0 100 0.01 2 * * *
42 10 V>1 TMS Courier Number (Decimal) 41962 41962 G2 1 Setting 0.5 100 0.5 2 * * *
42 11 V>2 Status Indexed String 41963 41963 G37 G37 Enabled Setting 0 1 1 2 * * *
42 12 V>2 Voltage Set Courier Number (Voltage) 41964 41964 G2 90 Setting 60 185 1 2 * * *
42 13 V>2 Time Delay Courier Number (Time) 41965 41965 G2 0.5 Setting 0 100 0.01 2 * * *
45 00 GROUP 1 * * *
45 1 BREAKER FAIL (Sub Heading) * * *
45 2 CB Fail 1 Status Indexed String 42100 42100 G37 G37 Enabled Setting 0 1 1 2 * * *
45 3 CB Fail 1 Timer Courier Number (Time) 42101 42101 G2 G2 0.2 Setting 0 10 0.005 2 * * *
45 4 CB Fail 2 Status Indexed String 42102 42102 G37 G37 Disabled Setting 0 1 1 2 * * *
45 5 CB Fail 2 Timer Courier Number (Time) 42103 42103 G2 G2 0.4 Setting 0 10 0.005 2 * * *
45 6 CBF Non I Reset Indexed String 42104 42104 G205 G205 1 Setting 0 3 1 2 * * *
45 7 CBF Ext Reset Indexed String 42105 42105 G205 G205 1 Setting 0 3 1 2 * * *
45 8 UNDER CURRENT (Sub Heading) * * *
45 9 I < Current Set Courier Number (Current) 42106 42106 G2 G2 0.05*I1 Setting 0.05*I1 3.2*I1 0.1*I1 2 * * *
46 00 GROUP 1 * * *
46 1 VT SUPERVISION (Sub Heading) * * *
46 2 VTS Time Delay Courier Number (Time s) 42150 42150 G2 5 Setting 1 20 1 2 * * *
46 3 VTS I2> & I0> Inhibit Courier Number (Current) 42151 42151 G2 0.05 Setting 0 1.0*I1 0.01*I1 2 * * *
46 4 Detect 3P Indexed String G37 G37 Disabled Setting 0 1 1 2 * * *
46 5 Threshold 3P Courier Number (Voltage) G2 30 Setting 10 70 1 2 * * *
46 6 Delta I> Courier Number (Current) G2 0.1*I1 Setting 0.01*I1 5*I1 0.01*I1 2 * * *
46 7 CT SUPERVISION (Sub Heading)
46 8 CTS Status Indexed String 42152 42152 G37 G37 Disabled Setting 0 1 1 2 * * *
46 9 CTS VN< Inhibit Courier Number (Voltage) 42153 42153 G2 1 Setting 0.5 22 0.5 2 * * *
46 0A CTS IN> Set Courier Number (Current) 42154 42154 G2 0.1 Setting 0.08*I1 4*I1 0.01*I1 2 * * *
46 0B CTS Time Delay Courier Number (Time s) 42155 42155 G2 5 Setting 0 10 1 2 * * *
46 0C CVT SUPERVISION (Sub Heading)
46 0D CVTS Status Indexed String 42156 42156 G37 G37 Disabled Setting 0 1 1 2 * * *
46 0E CVTS VN> Courier Number (Voltage) 42157 42157 G2 1 Setting 0.5 22 0.5 2 * * *
46 0F CVTS Time Delay Courier Number (Time s) 42158 42158 G2 100 Setting 0 300 1 2 * * *
48 00 GROUP 1 * * *
48 1 C/S Check Schem. for A/R Binary Flags (8bits) 42250 42250 G103 G103 7 Setting 0 7 1 2 * * *
48 2 C/S Check Schem. for ManBinary Flags (8bits) 42251 42251 G103 G103 7 Setting 0 7 1 2 * * *
48 3 V< Dead Line Courier Number (Voltage) 42252 42252 G2 13 Setting 5 30 1 2 * * *
48 4 V> Live Line Courier Number (Voltage) 42253 42253 G2 32 Setting 30 120 1 2 * * *
48 5 V< Dead Bus Courier Number (Voltage) 42254 42254 G2 13 Setting 5 30 1 2 * * * (4801 OR 4802) AND 010b) > 0
48 6 V> Live Bus Courier Number (Voltage) 42255 42255 G2 32 Setting 30 120 1 2 * * * (4801 OR 4802) AND 101b) > 0
48 7 Diff Voltage Courier Number (Voltage) 42256 42256 G2 6.5 Setting 0.5 40 0.1 2 * * * (4801 OR 4802) AND 100b) > 0
48 8 Diff Frequency Courier Number (Frequency) 42257 42257 G2 0.05 Setting 0.02 1 0.01 2 * * * (4801 OR 4802) AND 100b) > 0
48 9 Diff Phase Courier Number(Degre) 42258 42258 G2 20 Setting 5 90 2.5 2 * * * (4801 OR 4802) AND 100b) > 0
48 0A Bus-Line Delay Courier Number (Time) 42259 42259 G2 0.2 Setting 0.1 2 0.1 2 * * * (4801 OR 4802) AND 100b) > 0
49 00 GROUP 1 * * *
49 1 AUTORECLOSE MODE (Sub Heading) * * *
49 2 1P Trip Mode Indexed String 42300 42300 G101 G101 1 Setting 0 3 1 2 * Mode on Single Phase Tripping

Model Comment
49 3 3P Trip Mode Indexed String 42301 42301 G102 G102 1 Setting 0 3 1 2 * * * Mode on Three Phase Tripping
49 4 1P Rcl - Dead Time 1 Courier Number (Time) 42302 42302 G2 G2 1 Setting 0.1 5 0.01 2 * Single Phase Reclosing - Dead Time 1
49 5 3P Rcl - Dead Time 1 Courier Number (Time) 42303 42303 G2 G2 1 Setting 0.1 60 0.01 2 * * * Three Phase Reclosing - Dead Time 1
49 6 Dead Time 2 Courier Number (Time) 42304 42304 G2 G2 60 Setting 1 3600 1 2 * * * ( (3>= 4902>=1) AND 0707=1)
49 7 Dead Time 3 Courier Number (Time) 42305 42305 G2 G2 180 Setting 1 3600 1 2 * * * ( (3>= 4902>=2) AND 0707=1)
49 8 Dead Time 4 Courier Number (Time) 42306 42306 G2 G2 180 Setting 1 3600 1 2 * * * (4902=3 AND 0707=1)
49 9 Reclaim Time Courier Number (Time) 42307 42307 G2 G2 180 Setting 1 600 1 2 * * *
49 0A Reclose Time Delay Courier Number (Time) 42308 42308 G2 G2 0.1 Setting 0.1 10 0.1 2 * * *
49 0B Discrimination Time Courier Number (Time) 42309 42309 G2 G2 5 Setting 0.1 5 0.01 2 * * *
49 0C A/R Inhbit Wind Courier Number (Time) 42310 42310 G2 G2 5 Setting 1 3600 1 2 * * *
49 0D C/S on 3P Rcl DT1 Indexed String 42311 42311 G37 G37 Enabled Setting 0 1 1 2 * * * Select Synchro Check
49 0E AUTORECLOSE LOCKOUT (Sub Heading)
49 0F Block A/R Binary Flag (16 bits) 42312 41312 G117 G117 16383 Setting 0 16383 1 2 * * *
4A 00 GROUP 1 * * *
4A 1 Opto Input 1 ASCII Text (16 chars) 42400 42407 G3 Opto Label 01 Setting 32 163 1 2 * * *
4A 9 Opto Input 9 ASCII Text (16 chars) 42464 42471 G3 Opto Label 09 Setting 32 163 1 2 * *
4A 0A Opto Input 10 ASCII Text (16 chars) 42472 42479 G3 Opto Label 10 Setting 32 163 1 2 * *
4A 0B Opto Input 11 ASCII Text (16 chars) 42480 42487 G3 Opto Label 11 Setting 32 163 1 2 * *
4A 0C Opto Input 12 ASCII Text (16 chars) 42488 42495 G3 Opto Label 12 Setting 32 163 1 2 * *
4A 0D Opto Input 13 ASCII Text (16 chars) 42496 42503 G3 Opto Label 13 Setting 32 163 1 2 * *
4A 0E Opto Input 14 ASCII Text (16 chars) 42504 42511 G3 Opto Label 14 Setting 32 163 1 2 * *
4A 0F Opto Input 15 ASCII Text (16 chars) 42512 42519 G3 Opto Label 15 Setting 32 163 1 2 * *
4A 10 Opto Input 16 ASCII Text (16 chars) 42520 42527 G3 Opto Label 16 Setting 32 163 1 2 * *
4A 11 Opto Input 17 ASCII Text (16 chars) 42528 42535 G3 Opto Label 17 Setting 32 163 1 2 *
4B 00 GROUP 1 * * *
4B 1 Relay 1 ASCII Text (16 chars) 42600 42607 G3 Relay Label 01 Setting 32 163 1 2 * * *
4B 0A Relay 10 ASCII Text (16 chars) 42672 42679 G3 Relay Label 10 Setting 32 163 1 2 * * *
4B 0B Relay 11 ASCII Text (16 chars) 42680 42687 G3 Relay Label 11 Setting 32 163 1 2 * * *
4B 0C Relay 12 ASCII Text (16 chars) 42688 42695 G3 Relay Label 12 Setting 32 163 1 2 * * *
4B 0D Relay 13 ASCII Text (16 chars) 42696 42703 G3 Relay Label 13 Setting 32 163 1 2 * * *
4B 0E Relay 14 ASCII Text (16 chars) 42704 42711 G3 Relay Label 14 Setting 32 163 1 2 * * *
4B 0F Relay 15 ASCII Text (16 chars) 42712 42719 G3 Relay Label 15 Setting 32 163 1 2 * * *
4B 19 Relay 25 ASCII Text (16 chars) 42792 42799 G3 Relay Label 25 Setting 32 163 1 2 *
4B 1A Relay 26 ASCII Text (16 chars) 42800 42807 G3 Relay Label 26 Setting 32 163 1 2 *
4B 1B Relay 27 ASCII Text (16 chars) 42808 42815 G3 Relay Label 27 Setting 32 163 1 2 *
4B 1C Relay 28 ASCII Text (16 chars) 42816 42823 G3 Relay Label 28 Setting 32 163 1 2 *
4B 1D Relay 29 ASCII Text (16 chars) 42824 42831 G3 Relay Label 29 Setting 32 163 1 2 *
4B 1E Relay 30 ASCII Text (16 chars) 42832 42839 G3 Relay Label 30 Setting 32 163 1 2 *
4B 1F Relay 31 ASCII Text (16 chars) 42840 42847 G3 Relay Label 31 Setting 32 163 1 2 *
4B 20 Relay 32 ASCII Text (16 chars) 42848 42855 G3 Relay Label 32 Setting 32 163 1 2 *
4B 21 Relay 33 ASCII Text (16 chars) 42856 42863 G3 Relay Label 33 Setting 32 163 1 2
4B 2A Relay 42 ASCII Text (16 chars) 42928 42935 G3 Relay Label 42 Setting 32 163 1 2
4B 2B Relay 43 ASCII Text (16 chars) 42936 42943 G3 Relay Label 43 Setting 32 163 1 2
4B 2C Relay 44 ASCII Text (16 chars) 42944 42951 G3 Relay Label 44 Setting 32 163 1 2
4B 2D Relay 45 ASCII Text (16 chars) 42952 42959 G3 Relay Label 45 Setting 32 163 1 2
4B 2E Relay 46 ASCII Text (16 chars) 42960 42967 G3 Relay Label 46 Setting 32 163 1 2
GROUP 2
PROTECTION SETTINGS
50 00 Repeat of Group 1 columns/rows 43000 44999
GROUP 3
PROTECTION SETTINGS
GROUP 4
PROTECTION SETTINGS
MiCOM P441, P442 & P444 Page B-1
Part B - Data Types
TYPE VALUE/BIT MASK DESCRIPTION
G1 UNSIGNED INTEGER
eg. 5678 stored as 5678
G2 NUMERIC SETTING
See 50300.3110.004
G3 ASCII TEXT CHARACTERS

0x00FF Second character
0xFF00 First character
G4 PLANT STATUS (1 REGISTER)

Reg
0x0001 Plant Status 1 (0 = Off, 1 = On)
G5 CONTROL STATUS (1 REGISTER)
0x0001 Control Status 1 (0 = Off, 1 = On)

G6 Record Control Command Register

0 No Operation
1 Clear event Records
2 Clear Fault Record
3 Clear Maitenance Records
4 Reset Indications
G7 VTS Indicate/Block
0 Blocking
1 Indication
G8 LOGIC INPUT STATUS

(Second reg, First Reg)
0x0000,0x0001 Opto 1 Input State (0=Off, 1=Energised)
G9 RELAY OUTPUT STATUS

0x0000,0x0001 Relay 1 (0=Not Operated, 1=Operated)
Part B - Data Types

G10 PASSWORD LEVEL (May not be needed see modbus)

0 Level 0
1 Level 1
2 Level 2
G11 YES/NO
0 No
1 Yes
G12 TIME AND DATE (4 REGISTERS)

This will take the IEC 870 format as shown in ref [J] section 5.1.16
0x007F First register - Years
0x0FFF Second register - Month of year / Day of month / Day of week
0x9FBF Third Register - Summertime and hours / Validity and minutes
0xFFFF Fourth Register - Milli-seconds
G13 EVENT RECORD TYPE

0 Latched alarm active
1 Latched alarm inactive
2 Self reset alarm active
3 Self reset alarm inactive
4 Relay event
5 Opto event
6 Protection event
7 Platform event
8 Fault logged event
9 Maintenance Record logged event
G14 PAS UTILISE I> Function Link

Bit 0 I>1 VTS Block
Bit 1 I>1 VTS Block Non-Directionnal
Bit 2 I>2 VTS Block
Bit 3 I>2 VTS Block Non-Directionnal
Bit 4 I>3 VTS Block
Bit 5 I>4 VTS Block
Bit 6 Unused
Bit 7 Unused
G15 DISTURBANCE RECORD INDEX STATUS

0 No Record
1 Un-extracted
2 Extracted
G16 FAULTED PHASE

0x0001 Start A
0x0002 Start B
0x0004 Start C
0x0008 Start N
0x0010 Trip A
0x0020 Trip B
0x0040 Trip C
0x0080 Trip N
G17 ACTIVE/INACTIVE
0 Card not fitted
1 Card failed
2 Signal healthy
3 No Signal
G18 Record Selection Command Register

0x0000 No Operation
0x0001 Select next event
0x0002 Accept Event
0x0004 Select next Disturbance Record
0x0008 Accept disturbance record
0x0010 Select Next Disturbance record page
G19 LANGUAGE
0 English
1 Francais
2 Deutsch
3 Espanol
G20 (Second reg, First Reg) PASSWORD (2 REGISTERS)

0x0000, 0x00FF First password character
0x0000, 0xFF00 Second password character
0x00FF, 0x0000 Third password character
0xFF00, 0x0000 Fourth password character
NOTE THAT WHEN REGISTERS OF THIS TYPE ARE READ THE SLAVE WILL
ALWAYS INDICATE AN "*" IN EACH CHARACTER POSITION TO PRESERVE
THE PASSWORD SECURITY.
G21 IEC870 Interface

0 RS485
1 Fibre Optic
G22 PASSWORD CONTROL ACCESS LEVEL

0 Level 0 - Passwords required for levels 1 & 2.
1 Level 1 - Password required for level 2.
Part B - Data Types
2 Level 2 - No passwords required.
G23 Voltage Curve selection

0 Disabled
1 DT
2 IDMT
G24 2 REGISTERS UNSIGNED LONG VALUE, 3 DECIMAL PLACES
High order word of long stored in 1st register

Low order word of long stored in 2nd register
Example 123456.789 stored as 123456789
G25 1 REGISTER UNSIGNED VALUE, 3 DECIMAL PLACES
Example 50.050 stored as 50050
G26 1 REGISTER Relay Status
0x0001 Out of Service

0x0002 Minor Selft Test Failure
0x0004 Event
0x0008 Time Synchronisation
0x0010 Disturbance Flag
0x0020 Fault
0x0040 Unused
0x0080 Unused
0x0100 Unused
0x0200 Unused
0x0400 Unused
0x0800 Unused
0x1000 Unused
0x2000 Unused
0x4000 Unused
0x8000 Unused
G27 2 REGISTERS UNSIGNED LONG VALUE

High order word of long stored in 1st register
Low order word of long stored in 2nd register
Example 123456 stored as 123456
G28 1 REGISTER SIGNED VALUE POWER & WATT-HOURS

Power = (Secondary power/CT secondary) * (100/VT secondary)
G29 3 REGISTER POWER MULTIPLER

All power measurments use a signed value of type G28 and a
2 register unsigned long multiplier of type G27
Value = Real Value*110/(CTsecondary*VTsecondary)
For Primary Power Multipler = CTprimary * VTprimary/110
For Secondary Power Multipler = CTsecondary * VTsecondary/110
G30 1 REGISTER SIGNED VALUE, 2 DECIMAL PLACES
G31 ANALOGUE CHANNEL ASSIGNMENT SELECTOR (Product Dependent)

0 VA
1 VB
2 VC
3 VN
4 IA
5 IB
6 IC
7 IN
8 IM
9 V Checksync
10 unasigned
G32 Digital channel assignment this mapping depend of the model (P441 P442 P444)
0 8/16/24 Optos These are example values. Need one to be unassigned
to 14/21/32 Relays
8 Feedback
1024 72 - 1024 Internal Signals
G33 RECORDER TRIGGERING (2 REGISTERS, 32 BINARY FLAGS)

0x0000,0x0001 Digital Channel 1 Bit 0 (0 = No Trigger, 1= Trigger)
Part B - Data Types

G34 TRIGGER MODE

0 Single
1 Extended
G35 Numeric Setting (as G2 but 2 registers)

Number of steps from minimum value
expressed as 2 register 32 bit unsigned int
G36 Test Mode

0 No Operation
1 3 Pole Test
2 Pole A Test
3 Pole B Test
4 Pole C Test
G37 ENABLED / DISABLED

0 Disabled
1 Enabled
G38m COMMUNICATION BAUD RATE (MODBUS)

0 9600 bits/s
1 19200 bits/s
2 38400 bits/s
G38v COMMUNICATION BAUD RATE (IEC 60870)

0 9600 bits/s
2 19200 bits/s
G38d COMMUNICATION BAUD RATE (IEC 60870)

0 1200 bits/s
1 2400 bits/s
2 4800 bits/s
3 9600 bits/s
4 19200 bits/s
5 38400 bits/s
G39 COMMUNICATIONS PARITY

0 Odd
1 Even
2 None
G40 CHECK SYNC INPUT SELECTION

0 A-N
1 B-N
2 C-N
3 A-B
4 B-C
5 C-A
G41 CHECK SYNC VOLTAGE BLOCKING

0 None
1 Undervoltage
2 Differential
3 Both
G42 CHECK SYNC SLIP CONTROL

0 None
1 Timer
2 Frequency
3 Both
G43 IDMT CURVE TYPE

0 Disabled
1 DT
2 IEC S Invervse
3 IEC V Inverse
4 IEC E Inverse
5 UK LT Inverse
6 IEEE M Inverse
7 IEEE V Inverse
8 IEEE E Inverse
9 US Inverse
10 US ST Inverse
G44 DIRECTION
0 Non-Directional
1 Directional Fwd
2 Directional Rev
G45 VTS BLOCK

0 Block
1 Non-Directional
G46 POLARISATION
0 Zero Sequence
1 Neg Sequence
G47 MEASURING MODE

0 Phase-Phase
1 Phase-Neutral
G48 OPERATION MODE

0 Any Phase
1 Three Phase
G49 V0 INPUT
0 Measured
1 Derived
Part B - Data Types
G51 FAULT LOCATION

0 Distance
1 Ohms
2 % of Line
G52 DEFAULT DISPLAY

0 Date & Time
1 Description
2 Plant Reference
3 U, I, Freq
4 Freq, P, Q
G53 SELECT FACTORY DEFAULTS

0 No Operation
1 All Settings
2 Setting Group 1
3 Setting Group 2
4 Setting Group 3
5 Setting Group 4
G54 SELECT PRIMARY SECONDARY MEASUREMENTS

0 Primary
1 Secondary
G55 CIRCUIT BREAKER CONTROL

0 No Operation
1 Trip
2 Close
G56 PHASE MEASUREMENT REFERENCE

0 VA
1 VB
2 VC
3 IA
4 IB
5 IC
G57 Data Transfer Domain

0 PSL Settings
1 PSL Configuration
G58 SEF SELECTION

0 SEF Enabled
1 Wattmetric SEF
2 REF Enabled
G59 BATTERY STATUS

0 Dead
1 Healthy
G60 IDMT CURVE TYPE

0 DT
1 Inverse
G61 ACTIVE GROUP CONTROL

0 Select via Menu
1 Select via Optos
G62 SAVE AS
0 No Operation
1 Save
2 Abort
G64 ISEF> Func Link

Bit 0 ISEF>1 VTS Block
Bit 4 ISEF>3 Block A/R
Bit 5 ISEF>4 Block A/R
Bit 6 Unused
Bit 7 Unused
G65 F< Function Link

Bit 0 F<1 U/V Block
Bit 1 F<2 U/V Block
Bit 2 F<3 U/V Block
Bit 3 F<4 U/V Block
Bit 4 Unused
Bit 5 Unused
Bit 6 Unused
Bit 7 Unused
G66 MESSAGE FORMAT

0 No Trigger
1 Trigger L/H
2 Trigger H/L
G67 THERMAL OVERLOAD

0 Single
1 Dual
G68 CB Fail Reset Options

0 I< Only
1 CB Open & I<
2 Prot Reset & I<
G69 VTS RESET MODE

0 Manual
1 Auto
G70 AUTORECLOSE MODE

0 Opto Set
1 Auto
Part B - Data Types
2 User Set
3 Pulse Set
G71 PROTOCOL
0 Courier
1 IEC870-5-103
2 Modbus
G72 START DEAD TIME

0 Protection Reset
1 CB Trips
G73 RECLAIM TIME if PROTECTION START

0 Suspend
1 Continue
G74 RESET LOCKOUT

0 User Interface
1 Select NonAuto
G75 Auto-Reclose after Control Close

0 Enabled
1 Inhibited
G76 TRANSFER MODE

0 Prepare Rx
1 Complete Rx
2 Prepare Tx
3 Complete Tx
4 Rx Prepared
5 Tx Prepared
6 OK
7 Error
G77 Auto-Reclose
0 Out of Service
1 In Service
G78 A/R Telecontrol

0 No Operation
1 Auto
2 Non-auto
G79 Custom Settings

0 Disabled
1 Basic
2 Complete
G80 Visible/Invisible
0 Invisible
1 Visible
G81 Reset Lockout by

0 User Interface
1 CB Close
G82 A/R Protection blocking

0 No Block
1 Block Inst Prot
G83 A/R Status

0 Auto Mode
1 Non-auto Mode
2 Live Line
G84 Modbus value+bit pos Started Elements(Product Specific)

0x0000,0x0001 General Start
0x0000,0x0002 Start I>1
0x0000,0x0004 Start I>2
0x0000,0x0008 Start I>3
0x0000,0x0010 Start I>4
0x0000,0x0020 Start I2>
0x0000,0x0040 Start IN>2
0x0000,0x0080 Start IN>3
0x0000,0x0100 Start DEF
0x0000,0x0200 Start V<1
0x0000,0x0400 Start V<2
0x0000,0x0800 Start V>1
0x0000,0x1000 Start V>2
0x0000,0x2000 Start Broken Cond
0x0000,0x4000 Start LOL
0x0000,0x8000 Start Distance
0x0001,0x0000 Start TOC
0x0002,0x0000 Start Zero Seq. Pow.
0x0004,0x0000
0x0008,0x0000
0x0010,0x0000
0x0020,0x0000
0x0040,0x0000
0x0080,0x0000
0x0100,0x0000
0x0200,0x0000
G85 Modbus value+bit pos Tripped Elements(1)(Product Specific)

0x0000, 0x0001 Any Trip
0x0000, 0x0002 Trip I>1
0x0000, 0x0004 Trip I>2
0x0000, 0x0008 Trip I>3
0x0000, 0x0010 Trip I>4
0x0000, 0x0020 Trip I2>
0x0000, 0x0040 Trip IN>2
0x0000, 0x0080 Trip IN>3
0x0000, 0x0100 Trip DEF
Part B - Data Types
0x0000, 0x0200 Trip V<1

0x0000, 0x0400 Trip V<2
0x0000, 0x0800 Trip V>1
0x0000, 0x1000 Trip V>2
0x0000, 0x2000 Trip Broken line
0x0000, 0x4000 Trip Z1
0x0000, 0x8000 Trip Z2
0x0001, 0x0000 Trip Z3
0x0002, 0x0000 Trip Zp
0x0004, 0x0000 Trip Z4
0x0008, 0x0000 Trip Z2 Aided
0x0010, 0x0000 Trip LOL
0x0020, 0x0000 Trip Soft Tor
0x0040, 0x0000 Trip WI
0x0080, 0x0000 Trip CB Fail1
0x0100, 0x0000 Trip CB Fail2
0x0200, 0x0000 Trip Zero Seq. Pow.
0x0400, 0x0000
0x0800, 0x0000
0x1000, 0x0000
0x2000, 0x0000
0x4000, 0x0000
0x8000,0x0000 Trip User
G86 Bit Description Tripped Elements(2) (Product Specific)

(Second reg, First Reg)(Courier and IEC870 Bit Position)
0x0000,0x0001
0x0000,0x0002
0x0000,0x0004
0x0000,0x0008
0x0000,0x0010
0x0000,0x0020
0x0000,0x0040
0x0000,0x0080
0x0000,0x0100
0x0000,0x0200
0x0000,0x0400
0x0000,0x0800
0x0000,0x1000
0x0000,0x2000
0x0000,0x4000
0x0000,0x8000
0x0001,0x0000
0x0002,0x0000
0x0004,0x0000
0x0008,0x0000
0x0010,0x0000
0x0020,0x0000
0x0040,0x0000
0x0080,0x0000
0x0100,0x0000
0x0200,0x0000
0x0400,0x0000
0x0800,0x0000
0x1000,0x0000
0x2000,0x0000
0x4000,0x0000
0x8000,0x0000
G87 Bit Description Fault Alarms (Product Specific)

(Second reg, First Reg)(Courier and IEC870 Bit Position)
0x0000,0x0001 VT Fail Alarm
0x0000,0x0002 CT Fail Alarm
0x0000,0x0004 CB Status Alarm
0x0000,0x0008 AR Lockout Shot >
0x0000,0x0010 V<1 Alarm
0x0000,0x0020 V<2 Alarm
0x0000,0x0040 V>1 Alarm
0x0000,0x0080 V>2 Alarm
0x0000,0x0100 COS Alarm
0x0000,0x0200 CVT Fail Alarm
0x0000,0x0400
0x0000,0x0800
0x0000,0x1000
0x0000,0x2000
0x0000,0x4000
0x0000,0x8000
0x0001,0x0000
0x0002,0x0000
0x0004,0x0000
0x0008,0x0000
0x0010,0x0000
0x0020,0x0000
0x0040,0x0000
0x0080,0x0000
0x0100,0x0000
0x0200,0x0000
0x0400,0x0000
0x0800,0x0000
0x1000,0x0000
0x2000,0x0000
0x4000,0x0000
0x8000,0x0000
G88 Alarms
0 Alarm Disabled
1 Alarm Enabled
G89 Main VT Location

0 Line
1 Bus
G90 Group Selection

0 Group 1
1 Group 2
Part B - Data Types
2 Group 3
3 Group 4
G91 A/R Protection Blocking

0 Allow Tripping
1 Block Tripping
G92 Lockout
0 No Lockout
1 Lockout
G93 Commission Test

0 No Operation
1 Apply Test
2 Remove Test
G94 Commission Test

0 No Operation
1 Apply Test
G96 Bit Position Alarm 1 Indexed Strings

0
1
2 General Alarm
3 Prot'n Disabled
4 f out of Range
5 VT Fail Alarm
6 CT Fail Alarm
7 Broken Cond. Alarm
8 CB Fail Alarm
9 I^ Maint Alarm
10 I^ Lockout Alarm
11 CB Ops Maint
12 CB Ops Lockout
13 CB Op Time Maint
14 CB Op Time Lockout
15 F.F. Pre Lockout
16 F.F. Lock
17 Lockout Alarm
18 CB Status Alarm
19 Man CB Trip Fail
20 Man CB Cls Fail
21 Man CB Unhealthy
22 Control No C/S
23 AR Lockout Shot >
24 SG-Opto Invalid
25 A/R Fail
26 V<1 Alarm
27 V<2 Alarm
28 V>1 Alarm
29 V>2 Alarm
30 COS Alarm
31 CVT Fail Alarm
G97 Distance Unit

0 Kilometres
1 Miles
G98 Copy to
0 No Operation
1 Group 1
2 Group 2
3 Group 3
4 Group 4
G99 CB Control
0 Disabled
1 Local
2 Remote
3 Local+Remote
4 Opto
5 Opto+local
6 Opto+Remote
7 Opto+Rem+local
G100 ADD PRODUCT SPECIFIC DATA GROUPS HERE

to
G500
G101 Reclosing Mode on Single Phase tripping

0 1
1 1/3
2 1/3/3
3 1/3/3/3
G102 Reclosing Mode on Three Phase tripping

0 3
1 3/3
2 3/3/3
3 3/3/3/3
G103 Synchro Check Mode

Bit 0 Live Bus / Dead Line
Bit 1 Dead Bus / Live Line
Bit 2 Live Bus / Live Line
G105 Blocking type

0 None
1 Zone 1 unblocking
2 Zones 1 and 2 unblocking
3 Zones 1, 2 and 3 unblocking
4 Blocking all zones
5 Zone 1 blocking
6 Zones 1 and 2 blocking
7 Zones 1, 2 and 3 blocking
Part B - Data Types
G106 Program Mode

0 Standard Scheme
1 Open Scheme
G107 Standard Scheme

0 Basic + Z1X
1 P.O.P. Z1
2 P.O.P. Z2
3 P.U.P. Z2
4 P.U.P. Fwd
5 B.O.P. Z1
6 B.O.P. Z2
G108 Signal Send Zone

0 None
1 CsZ1
2 CsZ2
3 CsZ4
G109 Type of Scheme

0 None
1 PermZ1
2 PermZ2
3 PermFwd
4 BlkZ1
5 BlkZ2
G110 Zone in Fault

0 None
1 Zone 1
2 Zone 2
3 Zone 3
4 Zone Programmable
5 Zone 4
G111 Bit Position Alarm 2 Indexed Strings

0 Alarm user 1
1 Alarm user 2
2 Alarm user 3
3 Alarm user 4
4 Alarm user 5
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
G112 Type of Scheme Logic on Aided DEF

0 Shared
1 Blocking
2 Permissive
G113 Unblocking Mode

0 None
1 Loss of Guard
2 Loss of Carrier
G114 Trip Mode for the distance protection

0 Force 3 Poles Trip
1 1 Pole Trip before T2
2 1 Pole Trip before T3
G115 Fault Type

0 Phase-to-ground Fault Enabled
1 Phase-to-phase Fault Enabled
2 Both Enabled
G116 Weak-infeed Mode

0 Disabled
1 Echo
2 WI Trip & Echo
G117 Block A/R

Bit 0 At T2
Bit 1 At T3
Bit 2 At Tzp
Bit 3 LoL Trip
Bit 4 I2> Trip
Bit 5 I>1 Trip
Bit 6 I>2 Trip
Bit 7 V<1 Trip
Bit 8 V<2 Trip
MiCOM P441, P442 & P444 Page B-10
Part B - Data Types
Bit 9 V>1 Trip

Bit 10 V>2 trip
Bit 11 IN>2 Trip
Bit 12 IN>3 Trip
Bit 13 Aided D.E.F Trip
Bit 14 Zero. Seq. Power Trip
Bit 15 Unused
Bit 16 Unused
G118 TOR SOTF Mode

Bit 0 TOR Z1 Enabled
Bit 3 TOR All Zones Enabled
Bit 4 TOR Dist. Scheme Enabled
Bit 5 SOTF All Zones
Bit 6 SOTF Level Detectors
Bit 7 SOTF Z1 Enabled
Bit 10 SOTF Z1 + Rev Enabled
Bit 11 SOTF Z2 + Rev Enabled
Bit 12 SOTF Dist. Scheme Enabled
Bit 13 SOFT Disable
Bit 14 Unused
Bit 15 Unused
G119 Power-Swing Zone Blocking

Bit 0 Z1&Z1x blocking
Bit 1 Z2 Blocking
Bit 2 Z3 Blocking
Bit 3 Zp Blocking
Bit 4 Unused
Bit 5 Unused
Bit 6 Unused
Bit 7 Unused
G120 Zone Status

Bit 0 Z1x Enabled
Bit 1 Z2 Enabled
Bit 2 Zp Enabled
Bit 3 Z3 Enabled
Bit 4 Z4 Enabled
Bit 5 Unused
Bit 6 Unused
Bit 7 Unused
G121 V<&V> MODE

Bit 0 V<1 Trip
Bit 1 V<2 Trip
Bit 2 V>1 Trip
Bit 3 V>2 Trip
Bit 4 Unused
Bit 5 Unused
Bit 6 Unused
Bit 7 Unused
G122 Plant Status

Bit 0 All Poles Open
Bit 1 Any Poles Closed
Bit x Unused
G123 DIRECTION
0 Directional Fwd
1 Directional Rev
G124 TEST PORT STATUS (1 REGISTER)

0x0001 Test Port Status 1 (0 = Off, 1 = On)
G125 2 REGISTER Measurements in IEEE floating point format
G130 1REGISTER Measurements

Bit 0 Measurements and Location are not valid
Bit 1 Measurements is valid
Bit 2 Location is valid
G131 ENABLED / DISABLED

0 Disabled
1 Earth Fault O/C
2 Zero Seq. Power
G200 Treshold Voltages

0 24-27V
1 30-34V
2 48-54V
3 110-125V
4 220-250V
5 Custom
G201 Treshold Voltages

0 24-27V
1 30-34V
2 48-54V
3 110-125V
4 220-250V
MiCOM P441, P442 & P444 Page B-11
Part B - Data Types
G202 Controll Input Status (2 REGISTERS)

(2nd Reg, 1st Reg)
0x0000,0x0001 Control Input 1 (0 = Reset, 1 = Set)
G203 Virtual Input

0 No Operation
1 Set
2 Reset
G204 TEST MODE

0 Disabled
1 Test Mode
2 Blocked
G205 CB Fail Reset Options

0 I< Only
1 CB Open & I<
2 Prot Reset & I<
3 Disable
4 Prot Reset Or I<
G250 Alarm Status 3

0 Battery fail
1 Field Volt Fail
2 Reserved
3 GOOSE IED Absent
4 NIC Not Fitted
5 NIC No Response
6 NIC Fatal Error
7 NIC Soft. Reload
8 Bad TCP/IP Cfg.
9 Bad OSI Config.
10 NIC Link Fail
11 NIC SW Mis-Match
12 IP Addr Conflict
13 Reserved for InterMiCOM and other platform alarms
G251 RELAY OUTPUT STATUS

0x0000,0x4000 Unused
MiCOM P441, P442 & P444 Page C-1
Part C - Internal Digital Signals - DDB Element
DDB Element Name Ordinal English Text Description Source
DDB_ENTRY (DDB_OUTPUT_RELAY_1 0 Relay Label 01 OUTPUT RELAY 1 RELAY
DDB_ENTRY (DDB_OPTO_ISOLATOR_1 64 Opto Label 01 OPTO ISOLATOR 1 OPTO
DDB_ENTRY (DDB_OUTPUT_LED_1 96 LED 1 Programmable LED 1 (By default TRIP A) LED
DDB_ENTRY (DDB_OUTPUT_LED_2 97 LED 2 Programmable LED 2 (By default TRIP B) LED

DDB_ENTRY (DDB_OUTPUT_LED_3 98 LED 3 Programmable LED 3 (By default TRIP C) LED
DDB_ENTRY (DDB_OUTPUT_LED_4 99 LED 4 Programmable LED 4 (By default GENERAL START) LED
DDB_ENTRY (DDB_OUTPUT_LED_5 100 LED 5 Programmable LED 5 (By default ZONE 1 + AIDED TRIP) LED
DDB_ENTRY (DDB_OUTPUT_LED_6 101 LED 6 Programmable LED 6 (By default FORWARD) LED
DDB_ENTRY (DDB_OUTPUT_LED_7 102 LED 7 Programmable LED 7 (By default REVERSE) LED
DDB_ENTRY (DDB_OUTPUT_LED_8 103 LED 8 Programmable LED 8 (By default AUTORECLOSE ENABLE) LED
DDB_ENTRY (DDB_INP_52A_A 104 CB Aux A (52-A) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52B_A 105 CB Aux A (52-B) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52A_B 106 CB Aux B (52-A) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52B_B 107 CB Aux B (52-B) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52A_C 108 CB Aux C (52-A) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_52B_C 109 CB Aux C (52-B) Circuit breaker pole A closed/Status input from CB PSL (IN) CB STATUS
DDB_ENTRY (DDB_INP_SPAR 110 SPAR Enable Enable internal single pole autorecloser PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_TPAR 111 TPAR Enable Enable internal three pole autorecloser PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_INTERNAL 112 A/R Internal Give internal autorecloser present (visible) PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_CYCLE_1P 113 A/R 1p In Prog. One-pole external autoreclose cycle in progress PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_CYCLE_3P 114 A/R 3p In Prog. Three-pole external autoreclose cycle in progress PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_AR_CLOSING 115 A/R Close Circuit Breaker closing order from external autoreclose PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_RECLAIM 116 A/R Reclaim External autorecloser in reclaim PSL (IN) Autorecloser
DDB_ENTRY (DDB_INP_BAR 117 BAR Block internal autoreclose PSL (IN) Autorecloser
Autorisation signal from external check Synchroniser for
DDB_ENTRY (DDB_INP_CTL_CHECK_SYNCH 118 Ext Chk Synch OK PSL (IN) Autorecloser
reclosing with internal A/R
DDB_ENTRY (DDB_INP_CB_HEALTHY 119 CB Healthy Circuit breaker operational (gas pressure, mechanical state) PSL (IN) CB STATUS
Block all protection functions
DDB_ENTRY (DDB_INP_BLK_PROTECTION 120 BLK Protection PSL (IN) All protection
(21/67N/50/51/…)
DDB_ENTRY (DDB_INP_TRP_3P 121 Force 3P Trip Three pole tripping only PSL (IN)
DDB_ENTRY (DDB_INP_CB_MAN 122 Man. Close CB Circuit breaker manual close - order received PSL (IN) CB Status
DDB_ENTRY (DDB_INP_CB_TRIP_MAN 123 Man. Trip CB Circuit breaker manual trip - order received PSL (IN) CB Status
DDB_ENTRY (DDB_INP_DISC 124 CB Discrepancy CB Discrepancy (one pole open) PSL (IN) CB Status
DDB_ENTRY (DDB_INP_PROTA 125 External Trip A Phase A trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_PROTB 126 External Trip B Phase B trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_PROTC 127 External Trip C Phase C trip by external protection relay PSL (IN)
DDB_ENTRY (DDB_INP_CR 128 DIST. Chan Recv Signal receive on main channel (Distance) PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_CR_DEF 129 DEF. Chan Recv Signal receive on DEF channel PSL (IN) Un-blocking logic
Distance scheme channel out of service / Loss of Guard (Carrier
DDB_ENTRY (DDB_INP_COS 130 DIST. COS PSL (IN) Un-blocking logic
out of service)
DDB_ENTRY (DDB_INP_COS_DEF 131 DEF. COS DEF scheme channel out of service / Loss of Guard PSL (IN) Un-blocking logic
DDB_ENTRY (DDB_INP_Z1X_EXT 132 Z1X Extension Zone 1 Extension Input PSL (IN)
Fuse failure on busbar VT or MCB open (blocks voltage
DDB_ENTRY (DDB_INP_MCB_VTS_BUS 133 MCB/VTS Bus PSL (IN) VTS
dependant functions)
Fuse failure on line VT or MCB open (blocks voltage dependant
DDB_ENTRY (DDB_INP_MCB_VTS_LINE 134 MCB/VTS Line PSL (IN) VTS
functions)
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_2 135 IN>1 Timer Block Block earth fault stage 1 time delay PSL (IN) Earth Fault
DDB_ENTRY (DDB_INP_SBEF_TIMER_BLOCK_3 136 IN>2 Timer Block Block earth fault stage 2 time delay PSL (IN) Earth Fault
DDB_ENTRY (DDB_INP_DEF_TIMER_BLOCK 137 DEF Timer Block Block aided DEF time delay PSL (IN) DEF
DDB_ENTRY (DDB_INP_PHOC_TIMER_BLOCK_1 138 I>1 Timer Block Block phase overcurrent stage 1 time delay PSL (IN) I>1
DDB_ENTRY (DDB_INP_NPS_TIMER_BLOCK 142 I2> Timer Block Block negative sequence overcurrent time delay PSL (IN) I>4
DDB_ENTRY (DDB_INP_UNDU_TIMER_BLOCK_1 143 V<1 Timer Block Block phase undervoltage stage 1 time delay PSL (IN) V<1
DDB_ENTRY (DDB_INP_UNDU_TIMER_BLOCK_2 144 V<2 Timer Block Block phase undervoltage stage 2 time delay PSL (IN) V<2
DDB_ENTRY (DDB_INP_OVEU_TIMER_BLOCK_1 145 V>1 Timer Block Block phase overvoltage stage 1 time delay PSL (IN) V>1
DDB_ENTRY (DDB_INP_OVEU_TIMER_BLOCK_2 146 V>2 Timer Block Block phase overvoltage stage 2 time delay PSL (IN) V>2
DDB_ENTRY (DDB_INP_DISTANCE_TIMER_BLOCK 147 DIST. Tim. Block Block distance element time delay PSL (IN) Distance
DDB_ENTRY (DDB_INP_CB_RESET_LOCKOUT 148 Reset Lockout CB monitoring lockout reset PSL (IN) CB Monitoring
DDB_ENTRY (DDB_INP_CB_RESET_ALL_VALUES 149 Reset All values Reset all values of CB monitoring PSL (IN) CB Monitoring
DDB_ENTRY (DDB_INP_RESET_RELAYS_LEDS 150 Reset Latches Reset all permanent alarms + led and relay lached PSl (IN)
Enable I>4 Element for stub bus protection (isolator of HV line
DDB_ENTRY (DDB_INP_STUB_BUS 151 Stub Bus Enable PSL (IN)
open - status isolator must be connected to an opto input)
DDB_ENTRY (DDB_INP_TRIP_A_USER 152 User Trip A Internal input for trip logic A PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_TRIP_B_USER 153 User Trip B Internal input for trip logic B PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_TRIP_C_USER 154 User Trip C Internal input for trip logic C PSL (IN) Trip Logic
DDB_ENTRY (DDB_INP_ZSP_TIMER_BLOCK 155 ZSP Timer Block Zero Sequence Power - Timer Block PSL (IN) ZSP
DDB_ENTRY (DDB_ALARM_UNUSED0 160 Field Volt Fail Field voltage failure (48V DC for optos) PSL (OUT)
DDB_ENTRY (DDB_ALARM_GENERAL 161 General alarm General alarm PSL (OUT)
DDB_ENTRY (DDB_ALARM_PROT_DISABLED 162 Prot'n Disabled Test mode enabled - every protections out of order PSL(OUT) Commission Test
DDB_ENTRY (DDB_ALARM_F_OUT_OF_RANGE 163 F out of Range Frequency out of range PSL (OUT) Freq. Tracking
DDB_ENTRY (DDB_ALARM_VTS_SLOW 164 VT Fail Alarm Fuse failure indication (VT alarm) PSL (OUT) VT Supervision
DDB_ENTRY (DDB_ALARM_CTS 165 CT Fail Alarm Current transformers supervision indication PSL (OUT) CT Supervision
DDB_ENTRY (DDB_ALARM_BREAKER_FAIL 166 CB Fail Alarm Circuit breaker failure on any trip PSL (OUT) Breaker Fail
DDB_ENTRY (DDB_ALARM_I_BROK_MAINT 167 I^ Maint Alarm Broken current maintenance alarm (1st level) PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_I_BROK_LOCKOUT 168 I^ Lockout Alarm Broken current lockout alarm (2nd level) PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_OPS_MAINT 169 CB Ops Maint Alarm on number of circuit breaker operations PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_OPS_LOCKOUT 170 CB Ops Lockout Lockout on number of circuit breaker operations PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_OP_TIME_MAINT 171 CB Op Time Maint Alarm on CB excessive operating time PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_OP_TIME_LOCKOUT 172 CB Op Time Lock CB locked out due to excessive operating time PSL (OUT) CB monitoring
Excessive Fault Frequency CB Trip pre lockout Alarm (number of
DDB_ENTRY (DDB_ALARM_PRE_LOCKOUT 173 F.F. Pre Lockout PSL (OUT) CB monitoring
fault maxi)
DDB_ENTRY (DDB_ALARM_EFF_LOCKOUT 174 F.F. Lock Excessive Fault Frequency CB Trip Lockout Alarm PSL (OUT) CB monitoring
DDB_ENTRY (DDB_LOCKOUT_ALARM 175 Lockout Alarm Lockout Alarm PSL (OUT) CB monitoring
DDB_ENTRY (DDB_ALARM_CB_STATUS 176 CB Status Alarm Discrepancy in status of 52a and 52b auxiliary contacts PSL (OUT) CB Status
DDB_ENTRY (DDB_ALARM_CB_FAIL_TRIP 177 Man CB Trip Fail CB fail on manual trip PSL (OUT) CB control
DDB_ENTRY (DDB_ALARM_CB_FAIL_CLOSE 178 Man CB Cls Fail CB fail on manual close PSL (OUT) CB control
DDB_ENTRY (DDB_ALARM_CB_CONTROL_UNHEALTHLY 179 Man CB Unhealthy CB unhealthy for manual control PSL (OUT) CB control
DDB_ENTRY (DDB_ALARM_NO_CHECK_SYNC_CONTROL 180 Control No C/S No internal check synchronism available PSL (OUT) CB control
DDB_ENTRY (DDB_ALARM_AR_LOCKOUT_MAX_SHOTS 181 AR Lockout Shot> Autoreclose lockout following final programmed attempt PSL (OUT) Autorecloser
DDB_ENTRY (DDB_ALARM_SG_OPTO_INVALID 182 SG-opto Invalid Setting group selected via opto (1 & 2 only) input invalid PSL (OUT)
DDB_ENTRY (DDB_ALARM_CB_FAIL_AR 183 A/R Fail No check sync / autorecloser failed PSL (OUT) Autorecloser
DDB_ENTRY (DDB_ALARM_UNDER_V_1 184 V<1 Alarm 1st stage undervoltage alarm PSL (OUT) V<1
DDB_ENTRY (DDB_ALARM_UNDER_V_2 185 V<2 Alarm 2nd stage undervoltage alarm PSL (OUT) V<2
DDB_ENTRY (DDB_ALARM_OVER_V_1 186 V>1 Alarm 1st stage overvoltage alarm PSL (OUT) V>1
DDB_ENTRY (DDB_ALARM_OVER_V_2 187 V>2 Alarm 2nd stage overvoltage alarm PSL (OUT) V>2
DDB_ENTRY (DDB_ALARM_COS 188 COS Alarm HF carrier anomaly alarm PSL(OUT) Unblocking logic
DDB_ENTRY (DDB_ALARM_BROKEN_COND 189 Brok. Cond. Alarm broken Conductor Alarm PSL(OUT) Broken conductor
DDB_ENTRY (DDB_ALARM_CVTS 190 User Alarm User-definable alarm (application customized) PSL (IN)
DDB_ENTRY (DDB_ALARM_USER1 195 User Alarm 1 Self Reset PSL (IN)
DDB_ENTRY (DDB_ALARM_USER4 198 User Alarm 4 Latched PSL (IN)
DDB_ENTRY (DDB_ALARM_USER5 199 User Alarm 5 Latched PSL (IN)
DDB_ENTRY (DDB_PRT_AR_CLOSE 223 A/R Close Autorecloser Close command to CB PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_1POLE_IN_PROG 224 A/R 1P In Prog One-pole autoreclose cycle in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_3POLE_IN_PROG 225 A/R 3P In Prog Three-pole autoreclose cycle in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_1ST_CYCLE_IN_PROG 226 A/R 1st In Prog First high speed autoreclose cycle in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_234TH_CYCLE_IN_PROG 227 A/R 234 In Prog Further autoreclose cycles in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_TRIP_3PH 228 A/R Trip 3P Autorecloser signal to force all trips to be 3 Ph PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_RECLAIM 229 A/R Reclaim Reclaim timer timeout in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_DISCRIM 230 AR Discrim. Discrim. Time window in progress PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_ENABLE 231 A/R Enable Autorecloser enabled / in service PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_1PAR_ENABLE 232 A/R SPAR Enable Single pole autorecloser activated PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_3PAR_ENABLE 233 A/R TPAR Enable Three pole autorecloser activated PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_LOCKOUT 234 A/R Lockout Autorecloser locked-out (no autoreclosure possible until reset) PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_AR_FORCE_SYNC 235 A/R Force Sync. Force synchronism check to be made PSL (OUT) Autorecloser
DDB_ENTRY (DDB_PRT_SYNC 236 Check Synch. OK Check Synchronism conditions satisfied PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_DEAD_LINE 237 V< Dead Line Check Synch. Dead Line PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_LIVE_LINE 238 V> Live Line Check Synch. Live Line PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_DEAD_BUS 239 V< Dead Bus Check Synch. Dead Bus PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_LIVE_BUS 240 V> Live Bus Check Synch. Live Bus PSL (OUT) Synchro Check
DDB_ENTRY (DDB_PRT_CONTROL_CLOSE_IN_PROG 241 Ctrl Cls In Prog Manual (control) close in progress PSL (OUT) CB Control
DDB_ENTRY (DDB_PRT_CARRIER_SEND 242 DIST Sig. Send Distance protection schemes - Signal Send PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_UNB_CR 243 DIST UNB CR Unblock main channel received PSL(OUT) Unblocking Logic
DDB_ENTRY (DDB_PRT_DIST_FWD 244 DIST Fwd Distance protection: Forward fault detected PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_REV 245 DIST Rev Distance protection: Reverse fault detected PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_TRIP_A 246 DIST Trip A Distance protection: Phase A trip PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_TRIP_B 247 DIST Trip B Distance protection: Phase B trip PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_TRIP_C 248 DIST Trip C Distance protection: Phase C trip PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_START_A 249 DIST Start A Distance protection started on phase A PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_START_B 250 DIST Start B Distance protection started on phase B PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_START_C 251 DIST Start C Distance protection started on phase C PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_CR_ACC 252 DIST Sch. Accel. Distance scheme Accelerating PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_CR_PERM 253 DIST Sch. Perm. Distance scheme Permissive PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIST_CR_BLOCK 254 DIST Sch. Block. Distance scheme Blocking PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Z1 255 Z1 Fault in zone 1 PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Z1X 256 Z1X Fault in zone 1 extended PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_Zp 260 Zp Fault in zone P PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_T1 261 T1 Timer in zone 1 elapsed (at 1 = end of timer) PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_TZP 265 Tzp Timer in zone p elapsed (at 1 = end of timer) PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_WI_TRIP_A 266 WI Trip A Phase A trip on weak infeed PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_WI_TRIP_B 267 WI Trip B Phase B trip on weak infeed PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_WI_TRIP_C 268 WI Trip C Phase C trip on weak infeed PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_POWER_SWING 269 Power Swing Power swing detected PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_REVERSAL_GUARD 270 Reversal Guard Current reversal guard logic in action PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DEF_CARRIER_SEND 271 DEF Sig. Send DEF protection schemes - Signal Send PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_UNB_CR_DEF 272 DEF UNB CR Unblock DEF channel PSL (OUT) Unblocking logic
DDB_ENTRY (DDB_PRT_DEF_REV 273 DEF Rev Channel Aided DEF: reverse fault PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_FWD 274 DEF Fwd Channel Aided DEF: forward fault PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_START_AN 275 DEF Start A Channel Aided DEF: start phase A PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_START_BN 276 DEF Start B Channel Aided DEF: start phase B PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_START_CN 277 DEF Start C Channel Aided DEF: start phase C PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_TRIP_A 278 DEF Trip A Channel Aided DEF: trip phase A PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_TRIP_B 279 DEF Trip B Channel Aided DEF: trip phase B PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_DEF_TRIP_C 280 DEF Trip C Channel Aided DEF: trip phase C PSL (OUT) Aided DEF
DDB_ENTRY (DDB_PRT_IN_SUP_2_TRIP 281 IN>1 Trip Earth fault stage 1 trip PSL (OUT) Earth Fault 1
DDB_ENTRY (DDB_PRT_IN_SUP_3_TRIP 282 IN>2 Trip Earth fault stage 2 trip PSL (OUT) Earth Fault 2
DDB_ENTRY (DDB_PRT_IN_SUP_2_PICK_UP 283 IN>1 Start Earth fault stage 1 start PSL (OUT) Earth Fault 1
DDB_ENTRY (DDB_PRT_IN_SUP_3_PICK_UP 284 IN>2 Start Earth fault stage 2 start PSL (OUT) Earth Fault 2
DDB_ENTRY (DDB_PRT_UNDER_V_ANY_PICK_UP_A 285 V< Start Any A Any undervoltage start detected on phase A PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_ANY_PICK_UP_B 286 V< Start Any B Any undervoltage start detected on phase B PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_ANY_PICK_UP_C 287 V< Start Any C Any undervoltage start detected on phase C PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_1_PICK_UP 288 V<1 Start Undervoltage stage 1 start PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_2_PICK_UP 289 V<2 Start Undervoltage stage 2 start PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_1_TRIP 290 V<1 Trip Undervoltage stage 1 trip PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_UNDER_V_2_TRIP 291 V<2 Trip Undervoltage stage 2 trip PSL (OUT) Undervoltage
DDB_ENTRY (DDB_PRT_OVER_V_ANY_PICK_UP_A 292 V> Start Any A Any overvoltage start detected on phase A PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_ANY_PICK_UP_B 293 V> Start Any B Any overvoltage start detected on phase B PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_ANY_PICK_UP_C 294 V> Start Any C Any overvoltage start detected on phase C PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_1_PICK_UP 295 V>1 Start Overvoltage stage 1 start PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_2_PICK_UP 296 V>2 Start Overvoltage stage 2 start PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_1_TRIP 297 V>1 Trip Overvoltage stage 1 trip PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_OVER_V_2_TRIP 298 V>2 Trip Overvoltage stage 2 trip PSl (OUT) Overvoltage
DDB_ENTRY (DDB_PRT_I2_SUP_PICK_UP 299 I2> Start Negative Sequence Current Start PSL (OUT) Neg Seq. O/C
DDB_ENTRY (DDB_PRT_I2_SUP_TRIP 300 I2> Trip Negative Sequence Current Trip PSL (OUT) Neg Seq. O/C
DDB_ENTRY (DDB_PRT_I_SUP_ANY_PICK_UP_A 301 I> Start Any A Any overcurrent start for phase A PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_ANY_PICK_UP_B 302 I> Start Any B Any overcurrent start for phase B PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_ANY_PICK_UP_C 303 I> Start Any C Any overcurrent start for phase C PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_1_PICK_UP 304 I>1 Start Overcurrent stage 1 start PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_I_SUP_1_TRIP 308 I>1 Trip Overcurrent stage 1 trip PSL (OUT) Phase Overc.
DDB_ENTRY (DDB_PRT_SOTF_ENABLE 312 SOTF Enable Switch On To Fault enable PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_I_TOR_ENABLE 313 TOR Enable Trip On Reclose enable PSL (OUT) TOR
DDB_ENTRY (DDB_PRT_TOC_START_A 314 TOC Start A Trip on Close start on phase A PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_TOC_START_B 315 TOC Start B Trip on Close start on phase B PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_TOC_START_C 316 TOC Start C Trip on Close start on phase C PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_ANY_START 317 Any start Any protection start PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_1PH 318 1ph Fault Single phase fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_2PH 319 2ph Fault Two phase fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_3PH 320 3ph Fault Three phase fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_ANY_TRIP 321 Any Trip Single or three pole trip or external protection trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_INTERNAL_TRIP_A 322 Any Int. Trip A Any internal protection A phase trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_INTERNAL_TRIP_B 323 Any Int. Trip B Any internal protection B phase trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_INTERNAL_TRIP_C 324 Any Int. Trip C Any internal protection C phase trip PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_TRIP_A 325 Any Trip A Any trip A (internal or external protection) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_TRIP_B 326 Any Trip B Any trip B (internal or external protection) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_ANY_TRIP_C 327 Any Trip C Any trip C (internal or external protection) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_1P_TRIP 328 1P Trip Single pole trip (internal or external) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_3P_TRIP 329 3P Trip Three pole trip (internal or external) PSL (OUT) All protection
DDB_ENTRY (DDB_PRT_BROKEN_CONDUCTOR_TRIP 330 Brk.Conduct.Trip Broken conductor trip PSL (OUT) Broken Cond.
DDB_ENTRY (DDB_PRT_LOSS_OF_LOAD_TRIP 331 Loss. Load Trip Loss of load trip PSL (OUT) Loss of load
DDB_ENTRY (DDB_PRT_SOTF_TOR_TRIP 332 SOTF/TOR Trip Switch on to fault trip or trip on reclose PSL (OUT) SOTF
DDB_ENTRY (DDB_PRT_TBF1_TRIP_3PH 333 tBF1 Trip Breaker fail trip from tBF1 PSL (OUT) Breaker failure
DDB_ENTRY (DDB_PRT_TBF2_TRIP_3PH 334 tBF2 Trip Breaker fail trip from tBF2 PSL (OUT) Breaker failure
DDB_ENTRY (DDB_PRT_CONTROL_TRIP 335 Control Trip Control trip command from user PSL (OUT) CB control
DDB_ENTRY (DDB_PRT_CONTROL_CLOSE 336 Control Close Control close command from user PSL (OUT) CB control
DDB_ENTRY (DDB_PRT_VTS_FAST 337 VTS Fast Unstantaneous unconfirmed fuse failure internal detection PSL (OUT) VTS
DDB_ENTRY (DDB_PRT_CB_AUX_A 338 CB Aux A CB Phase A status PSL (OUT) CB status
DDB_ENTRY (DDB_PRT_CB_AUX_B 339 CB Aux B CB Phase B status PSL (OUT) CB status
DDB_ENTRY (DDB_PRT_CB_AUX_C 340 CB Aux C CB Phase C status PSL (OUT) CB status
DDB_ENTRY (DDB_PRT_ANY_POLE_DEAD 341 Any Pole Dead Any circuit breaker pole dead (one or more poles open) PSL (OUT) Poledead
DDB_ENTRY (DDB_PRT_ALL_POLE_DEAD 342 All Pole Dead All circuit breaker poles dead (breaker open 3 phase) PSL (OUT) Poledead
DDB_ENTRY (DDB_PRT_DIR_AV_WIT_FILT 343 DIST Fwd No Filt Distance protection: Forward fault detected not filtered PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_DIR_AM_WIT_FILT 344 DIST Rev No Filt Distance protection: Reverse fault detected not filtered PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_CVMR 345 DIST Convergency Distance protection: Internal characteristic PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_CROSS_COUNTRY 346 Cross Count. Flt Cross Country Fault PSL (OUT) Distance
DDB_ENTRY (DDB_PRT_ZSP_START 347 ZSP Start Zero Sequence Power - Start PSL (OUT) ZSP
DDB_ENTRY (DDB_PRT_ZSP_TRIP 348 ZSP Trip Zero Sequence Power - Trip PSL (OUT) ZSP
DDB_ENTRY (DDB_OUTPUT_CON_1 364 Relay 1 PSL Input Equivalent to Relay Output Condition PSL
DDB_ENTRY (DDB_LED_CON_1 428 LED Con IN 1 PSL Input Equivalent to LED Output Condition PSL
DDB_ENTRY (DDB_TIMERIN_1 436 Timer in 1 PSL Input from Auxiliary Timer 1 Auxiliary Timer
DDB_ENTRY (DDB_TIMEROUT_1 452 Timer out 1 PSL Ouput from Auxiliary Timer 1 Auxiliary Timer
DDB_ENTRY (DDB_FAULT_RECORD_TRIG 468 Fault_REC_TRIG Trigger for Fault Recorder FRT

MiCOM P441, P442 & P444 Page D-1
Part D - Menu Database for MODBUS

Modbus Address Col Row Group
P441 P441 P442 P442 P444 P444 P444 P444
Start End Description Modbus Cell Type Min Max Step
AC BC AC BC AC BC AD BD
Read and write access of Output Relays
1 Contact -1. FF A0 GB 14 14 21 21 32 32 46 46
2 Contact -2. FF A1 GB 13 13 20 20 31 31 45 45
3 Contact -3. FF A2 GB 12 12 19 19 30 30 44 44
4 Contact - 4. FF A3 GB 11 11 18 18 29 29 43 43
5 Contact - 5. FF A4 GB 10 10 17 17 28 28 42 42
6 Contact - 6. FF A5 GB 9 9 16 16 27 27 41 41
7 Contact - 7. FF A6 GB 8 8 15 15 26 26 40 40
8 Contact -8. FF A7 GB 7 7 14 14 25 25 39 39
9 Contact - 9. FF A8 GB 6 6 13 13 24 24 38 38
10 Contact -10. FF A9 GB 5 5 12 12 23 23 37 37
11 Contact -11. FF AA GB 4 4 11 11 22 22 36 36
12 Contact -12. FF AB GB 3 3 10 10 21 21 35 35
13 Contact -13. FF AC GB 2 2 9 9 20 20 34 34
14 Contact -14. FF AD GB 1 1 8 8 19 19 33 33
15 Contact -15. FF AE GB 7 7 18 18 32 32
16 Contact -16. FF AF GB 6 6 17 17 31 31
17 Contact -17. FF B0 GB 5 5 16 16 30 30
18 Contact -18. FF B1 GB 4 4 15 15 29 29
19 Contact -19. FF B2 GB 3 3 14 14 28 28
20 Contact -20. FF B3 GB 2 2 13 13 27 27
21 Contact -21. FF B4 GB 1 1 12 12 26 26
22 Contact -22. FF B5 GB 11 11 25 25
23 Contact -23. FF B6 GB 10 10 24 24
24 Contact -24. FF B7 GB 9 9 23 23
25 Contact - 25. FF B8 GB 8 8 22 22
26 Contact - 26. FF B9 GB 7 7 21 21
27 Contact - 27. FF BA GB 6 6 20 20
28 Contact - 28. FF BB GB 5 5 19 19
29 Contact - 29. FF BC GB 4 4 18 18
30 Contact -30. FF BD GB 3 3 17 17
31 Contact -31. FF BE GB 2 2 16 16
32 Contact -32. FF BF GB 1 1 15 15
33 Contact -33. FF C0 GB 14 14
43 Contact -43. FF CA GB 4 4
44 Contact -44. FF CB GB 3 3
45 Contact -45. FF CC GB 2 2
46 Contact -46. FF CD GB 1 1
Read only access of the Opto-Isolators
10001 Input -1 FF D0 GB 8 8 16 16 24 24 24 24
10002 Input -2 FF D1 GB 7 7 15 15 23 23 23 23
10003 Input -3 FF D2 GB 6 6 14 14 22 22 22 22
10004 Input -4 FF D3 GB 5 5 13 13 21 21 21 21
10005 Input -5 FF D4 GB 4 4 12 12 20 20 20 20
10006 Input -6 FF D5 GB 3 3 11 11 19 19 19 19
10007 Input -7 FF D6 GB 2 2 10 10 18 18 18 18
10008 Input -8 FF D7 GB 1 1 9 9 17 17 17 17
10009 Input -9 FF D8 GB 8 8 16 16 16 16
10010 Input -10 FF D9 GB 7 7 15 15 15 15
10011 Input -11 FF DA GB 6 6 14 14 14 14
10012 Input -12 FF DB GB 5 5 13 13 13 13
10013 Input -13 FF DC GB 4 4 12 12 12 12
10014 Input -14 FF DD GB 3 3 11 11 11 11
10015 Input -15 FF DE GB 2 2 10 10 10 10
10016 Input -16 FF DF GB 1 1 9 9 9 9
10017 Input -17 FF E0 GB 8 8 8 8
10018 Input -18 FF E1 GB 7 7 7 7
10019 Input -19 FF E2 GB 6 6 6 6
10020 Input -20 FF E3 GB 5 5 5 5
10021 Input -21 FF E4 GB 4 4 4 4
10022 Input -22 FF E5 GB 3 3 3 3
10023 Input -23 FF E6 GB 2 2 2 2
10024 Input -24 FF E7 GB 1 1 1 1
Read only access of Data
30001 30001 Modbus Status Register FF 01 G26 1 1 1 1 1 1 1 1 Data
30002 30002 Plant Status 0 0C G4 1 1 1 1 1 1 1 1 Data
30004 30004 Control Status 0 0D G5 1 1 1 1 1 1 1 1 Data
30006 30006 Active Group 0 0E G1 1 1 1 1 1 1 1 1 Data
30007 30008 Relay O/P Status 1 0 40 G9 2 2 2 2 2 2 2 2 Data
30009 30010 Relay O/P Status 2 0 41 G9 2 2 Data
30011 30012 Alarm Status 1 0 50 G96 2 2 2 2 2 2 2 2 Data
30017 30017 Access Level 0 D0 G1 1 1 1 1 1 1 1 1 Data
30020 30035 Model Number 0 6 G3 16 16 16 16 16 16 16 16 Data
30036 30037 Maint Type 1 F2 G27 2 2 2 2 2 2 2 2 Data
30038 30039 Maint Data 1 F3 G27 2 2 2 2 2 2 2 2 Data
30044 30051 Serial Number 0 8 G3 8 8 8 8 8 8 8 8 Data
30052 30059 Software Ref. 1 0 11 G3 8 8 8 8 8 8 8 8 Data
30090 30090 IRIG-B Status 8 5 G17 1 1 1 1 1 1 Data
30091 30091 Battery Status 8 6 G59 1 1 1 1 1 1 1 1 Data
30100 30100 Number of Event records stored FF 02 G1 1 1 1 1 1 1 1 1 Data
30101 30101 Number of Fault records stored FF 03 G1 1 1 1 1 1 1 1 1 Data
30102 30102 Number of Maint records stored FF 04 G1 1 1 1 1 1 1 1 1 Data
30103 30106 Time & Date 1 3 G12 4 4 4 4 4 4 4 4 Data
30107 30107 Event Type FF 8C G13 1 1 1 1 1 1 1 1 Data
30108 30109 Event Value 1 5 G27 2 2 2 2 2 2 2 2 Data
30110 30110 Modbus Adress FF 8D G1 1 1 1 1 1 1 1 1 Data

P441 P441 P442 P442 P444 P444 P444 P444
30111 30111 Event Index FF 8E G1 1 1 1 1 1 1 1 1 Data
30112 30112 Additionnal data present FF 05 G1 1 1 1 1 1 1 1 1 Data
30113 30113 Active Group 1 7 G1 1 1 1 1 1 1 1 1 Data
30114 30114 Faulted Phase 1 8 G16 1 1 1 1 1 1 1 1 Data
30115 30116 Start Elements 1 9 G84 2 2 2 2 2 2 2 2 Data
30117 30118 Trip Elements 1 0A G85 2 2 2 2 2 2 2 2 Data
30119 30119 Validities 1 0B G130 1 1 1 1 1 1 1 1 Data
30120 30123 Time Stamp 1 0C G12 4 4 4 4 4 4 4 4 Data
30124 30125 Fault Alarms 1 0D G87 2 2 2 2 2 2 2 2 Data
30126 30126 System Frequency 1 0E G25 1 1 1 1 1 1 1 1 Data
30127 30128 Fault Duration 1 0F G24 2 2 2 2 2 2 2 2 Data
30129 30130 Relay Trip Time 1 10 G24 2 2 2 2 2 2 2 2 Data
30131 30132 Fault Location 1 11 G24 2 2 2 2 2 2 2 2 Data
30139 30140 IA 1 15 G24 2 2 2 2 2 2 2 2 Data
30141 30142 IB 1 16 G24 2 2 2 2 2 2 2 2 Data
30143 30144 IC 1 17 G24 2 2 2 2 2 2 2 2 Data
30145 30146 VAN 1 1B G24 2 2 2 2 2 2 2 2 Data
30147 30148 VBN 1 1C G24 2 2 2 2 2 2 2 2 Data
30149 30150 VCN 1 1D G24 2 2 2 2 2 2 2 2 Data
30151 30152 Fault Resistance 1 1E G24 2 2 2 2 2 2 2 2 Data
30153 30153 Fault in Zone 1 1F G110 1 1 1 1 1 1 1 1 Data
30200 30201 IA Magnitude 2 1 G24 2 2 2 2 2 2 2 2 Data
30202 30202 IA Phase Angle 2 2 G30 1 1 1 1 1 1 1 1 Data
30203 30204 IB Magnitude 2 3 G24 2 2 2 2 2 2 2 2 Data
30205 30205 IB Phase Angle 2 4 G30 1 1 1 1 1 1 1 1 Data
30206 30207 IC Magnitude 2 5 G24 2 2 2 2 2 2 2 2 Data
30208 30208 IC Phase Angle 2 6 G30 1 1 1 1 1 1 1 1 Data
30212 30213 IN Derived Mag 2 9 G24 2 2 2 2 2 2 2 2 Data
30214 30214 IN Derived Angle 2 0A G30 1 1 1 1 1 1 1 1 Data
30218 30219 I1 Magnitude 2 0D G24 2 2 2 2 2 2 2 2 Data
30220 30221 I2 Magnitude 2 0E G24 2 2 2 2 2 2 2 2 Data
30222 30223 I0 Magnitude 2 0F G24 2 2 2 2 2 2 2 2 Data
30230 30231 VAB Magnitude 2 14 G24 2 2 2 2 2 2 2 2 Data
30232 30232 VAB Phase Angle 2 15 G30 1 1 1 1 1 1 1 1 Data
30233 30234 VBC Magnitude 2 16 G24 2 2 2 2 2 2 2 2 Data
30235 30235 VBC Phase Angle 2 17 G30 1 1 1 1 1 1 1 1 Data
30236 30237 VCA Magnitude 2 18 G24 2 2 2 2 2 2 2 2 Data
30238 30238 VCA Phase Angle 2 19 G30 1 1 1 1 1 1 1 1 Data
30239 30240 VAN Magnitude 2 1A G24 2 2 2 2 2 2 2 2 Data
30241 30241 VAN Phase Angle 2 1B G30 1 1 1 1 1 1 1 1 Data
30242 30243 VBN Magnitude 2 1C G24 2 2 2 2 2 2 2 2 Data
30244 30244 VBN Phase Angle 2 1D G30 1 1 1 1 1 1 1 1 Data
30245 30246 VCN Magnitude 2 1E G24 2 2 2 2 2 2 2 2 Data
30247 30247 VCN Phase Angle 2 1F G30 1 1 1 1 1 1 1 1 Data
30248 30249 VN Derived Mag 2 22 G24 2 2 2 2 2 2 2 2 Data
30250 30250 VN Derived Ang 2 23 G30 1 1 1 1 1 1 1 1 Data
30251 30252 V1 Magnitude 2 24 G24 2 2 2 2 2 2 2 2 Data
30263 30263 Frequency 2 2A G30 1 1 1 1 1 1 1 1 Data
30264 30265 C/S Voltage Mag 2 2B G24 2 2 2 2 2 2 2 2 Data
30266 30266 C/S Voltage Ang 2 2C G30 1 1 1 1 1 1 1 1 Data
30267 30268 IM Magnitude 2 2F G24 2 2 2 2 2 2 2 2 Data
30269 30269 IM Angle 2 30 G30 1 1 1 1 1 1 1 1 Data
30270 30270 Slip Frequency 2 31 G30 1 1 1 1 1 1 1 1 Data
30300 30302 A Phase Watts 3 1 G29 3 3 3 3 3 3 3 3 Data
30303 30305 B Phase Watts 3 2 G29 3 3 3 3 3 3 3 3 Data
30306 30308 C Phase Watts 3 3 G29 3 3 3 3 3 3 3 3 Data
30309 30311 A Phase VArs 3 4 G29 3 3 3 3 3 3 3 3 Data
30312 30314 B Phase VArs 3 5 G29 3 3 3 3 3 3 3 3 Data
30315 30317 C Phase VArs 3 6 G29 3 3 3 3 3 3 3 3 Data
30318 30320 A Phase VA 3 7 G29 3 3 3 3 3 3 3 3 Data
30321 30323 B Phase VA 3 8 G29 3 3 3 3 3 3 3 3 Data
30324 30326 C Phase VA 3 9 G29 3 3 3 3 3 3 3 3 Data
30327 30329 3 Phase Watts 3 0A G29 3 3 3 3 3 3 3 3 Data
30330 30332 3 Phase VArs 3 0B G29 3 3 3 3 3 3 3 3 Data
30333 30335 3 Phase VA 3 0C G29 3 3 3 3 3 3 3 3 Data
30336 30338 Zero Seq Power 3 0D G29 3 3 3 3 3 3 3 3 Data
30339 30339 3Ph Power Factor 3 0E G30 1 1 1 1 1 1 1 1 Data
30340 30340 APh Power Factor 3 0F G30 1 1 1 1 1 1 1 1 Data
30341 30341 BPh Power Factor 3 10 G30 1 1 1 1 1 1 1 1 Data
30342 30342 CPh Power Factor 3 11 G30 1 1 1 1 1 1 1 1 Data
30343 30345 3Ph W Fix Demand 3 16 G29 3 3 3 3 3 3 3 3 Data
30346 30348 3Ph VArs Fix Dem 3 17 G29 3 3 3 3 3 3 3 3 Data
30349 30351 3Ph W Peak Demand 3 20 G29 3 3 3 3 3 3 3 3 Data
30352 30354 3Ph VArs Peak Demand 3 21 G29 3 3 3 3 3 3 3 3 Data
30360 30361 A Phase Watts FF EF G125 2 2 2 2 2 2 2 2 Data
30362 30363 B Phase Watts FF F0 G125 2 2 2 2 2 2 2 2 Data
30364 30365 C Phase Watts FF F1 G125 2 2 2 2 2 2 2 2 Data
30366 30367 A Phase VArs FF F2 G125 2 2 2 2 2 2 2 2 Data
30368 30369 B Phase VArs FF F3 G125 2 2 2 2 2 2 2 2 Data
30370 30371 C Phase VArs FF F4 G125 2 2 2 2 2 2 2 2 Data
30372 30373 A Phase VA FF F5 G125 2 2 2 2 2 2 2 2 Data
30374 30375 B Phase VA FF F6 G125 2 2 2 2 2 2 2 2 Data
30376 30377 C Phase VA FF F7 G125 2 2 2 2 2 2 2 2 Data
30378 30379 3 Phase Watts FF F8 G125 2 2 2 2 2 2 2 2 Data
30380 30381 3 Phase VArs FF F9 G125 2 2 2 2 2 2 2 2 Data
30382 30383 3 Phase VA FF FA G125 2 2 2 2 2 2 2 2 Data
30384 30385 Zero Seq Power FF FB G125 2 2 2 2 2 2 2 2 Data
30386 30387 3Ph W Fix Demand FF FC G125 2 2 2 2 2 2 2 2 Data
30388 30389 3Ph VArs Fix Dem FF FD G125 2 2 2 2 2 2 2 2 Data
30390 30391 3Ph W Peak Demand FF FE G125 2 2 2 2 2 2 2 2 Data
30392 30393 3Ph VArs Peak Demand FF FF G125 2 2 2 2 2 2 2 2 Data
30600 30600 CB A Operations 6 1 G1 1 1 1 1 1 1 1 1 Data

P441 P441 P442 P442 P444 P444 P444 P444
30601 30601 CB B Operations 6 2 G1 1 1 1 1 1 1 1 1 Data
30602 30602 CB C Operations 6 3 G1 1 1 1 1 1 1 1 1 Data
30603 30604 Total IA Broken 6 4 G125 2 2 2 2 2 2 2 2 Data
30605 30606 Total IB Broken 6 5 G125 2 2 2 2 2 2 2 2 Data
30607 30608 Total IC Broken 6 6 G125 2 2 2 2 2 2 2 2 Data
30609 30609 CB Operate Time 6 7 G25 1 1 1 1 1 1 1 1 Data
30611 30611 Total 1P Reclosures 6 9 G1 1 1 1 1 1 1 1 1 Data
30612 30612 Total 3P Reclosures 6 0A G1 1 1 1 1 1 1 1 1 Data
30701 30701 Modbus Status Register FF 01 G26 1 1 1 1 1 1 1 1 Data
30702 30703 Measurements1 - IA Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
30704 30705 Measurements1 - IB Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
30706 30707 Measurements1 - IC Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
30708 30709 Measurements1 - VAB Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
30710 30711 Measurements1 - VBC Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
30712 30713 Measurements1 - VCA Magnitude 2 G24 2 2 2 2 2 2 2 2 Data
30714 30716 Measurements2 -3 phase Watts 3 G29 3 3 3 3 3 3 3 3 Data
30717 30719 Measurements2 -3 phase Vars 3 G29 3 3 3 3 3 3 3 3 Data
30720 30720 Measurements2 -3 phase powerFactor 3 G30 1 1 1 1 1 1 1 1 Data
30721 30721 Measurements1 -Frequency 2 G30 1 1 1 1 1 1 1 1 Data
30722 30722 Test Port Status 0F 4 G124 1 1 1 1 1 1 1 1 Data
30723 30724 DDB element 31 - 0 0F 20 G27 2 2 2 2 2 2 2 2 Data
30743 30744 DDB element 351 - 320 0F 2A G27 2 2 2 2 2 2 2 2 Data
30745 30746 DDB element 383 - 352 0F 2B G27 2 2 2 2 2 2 2 2 Data
30747 30748 DDB element 415 - 384 0F 2C G27 2 2 2 2 2 2 2 2 Data
30749 30750 DDB element 447 - 415 0F 2D G27 2 2 2 2 2 2 2 2 Data
30751 30752 DDB element 479 - 448 0F 2E G27 2 2 2 2 2 2 2 2 Data
30753 30754 DDB element 511 - 480 0F 2F G27 2 2 2 2 2 2 2 2 Data
30775 30776 DDB element 863 - 832 0F 3A G27 2 2 2 2 2 2 2 2 Data
30777 30778 DDB element 895 - 864 0F 3B G27 2 2 2 2 2 2 2 2 Data
30779 30780 DDB element 927 - 896 0F 3C G27 2 2 2 2 2 2 2 2 Data
30781 30782 DDB element 959 - 928 0F 3D G27 2 2 2 2 2 2 2 2 Data
30783 30784 DDB element 991 - 960 0F 3E G27 2 2 2 2 2 2 2 2 Data
30785 30786 DDB element 1022 - 992 0F 3F G27 2 2 2 2 2 2 2 2 Data
30800 30800 Number of disturbance records. FF 6 G1 1 1 1 1 1 1 1 1 Data
30801 30801 Oldest stored disturbance record. FF 7 G1 1 1 1 1 1 1 1 1 Data
30802 30802 Number registers in current page. FF 8 G1 1 1 1 1 1 1 1 1 Data
30803 30929 Disturbance record data [1-127] FF 09-87 G1 127 127 127 127 127 127 127 127 Data
30930 30933 Disturbance record time stamp. FF 88 G1 4 4 4 4 4 4 4 4 Data
31000 31015 Grp1 PSL Ref B7 01 G3 16 16 16 16 16 16 16 16 Data
31016 31019 Date/Time B7 02 G12 4 4 4 4 4 4 4 4 Data
31020 31021 PSL unique ID B7 03 G27 2 2 2 2 2 2 2 2 Data
31038 31041 Date/Time B7 05 G12 4 4 4 4 4 4 4 4 Data
31060 31063 Date/Time B7 08 G12 4 4 4 4 4 4 4 4 Data
31066 31079 Grp3 PSL Ref B7 0A G3 16 16 16 16 16 16 16 16 Data
31082 31085 Date/Time B7 0B G12 4 4 4 4 4 4 4 4 Data
31086 31087 PSL unique ID B7 0C G27 2 2 2 2 2 2 2 2 Data
Read and write access of Settings
40001 40002 Password 0 2 G20 2 2 2 2 2 2 2 2 Setting 65 90 1
40004 40011 Description 0 4 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
40012 40019 Plant Reference 0 5 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
40020 40020 Frequency 0 9 G1 1 1 1 1 1 1 1 1 Setting 50 60 10
40021 40021 CB Trip/Close 0 10 G55 1 1 1 1 1 1 1 1 Command 0 2 1
40022 40022 Password Control 0 D1 G22 1 1 1 1 1 1 1 1 Setting 0 2 1
40023 40024 Password Level 1 0 D2 G20 2 2 2 2 2 2 2 2 Setting 65 90 1
40025 40026 Password Level 2 0 D3 G20 2 2 2 2 2 2 2 2 Setting 65 90 1
40100 40100 Select Event 1 1 G1 1 1 1 1 1 1 1 1 Setting 0 249 1
40101 40101 Select Fault 1 6 G1 1 1 1 1 1 1 1 1 Setting 0 4 1
40102 40102 Select Report 1 F0 G1 1 1 1 1 1 1 1 1 Setting 0 4 1
40103 40103 Reset Demand 3 25 G1 1 1 1 1 1 1 1 1 Command 0 1 1
40140 40140 Reset CB Data 6 8 G11 1 1 1 1 1 1 1 1 Command 0 1 1
40141 40141 Reset Total A/R 6 0B G11 1 1 1 1 1 1 1 1 Command 0 1 1
40151 40151 Broken I^ 10 1 G2 1 1 1 1 1 1 1 1 Setting 1 2 0.1
40152 40152 I^ Maintenance 10 2 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40153 40154 I^ Maintenance 10 3 G35 2 2 2 2 2 2 2 2 Setting 1*NM1 25000*NM1 1*NM1
40155 40155 I^ Lockout 10 4 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40156 40157 I^ Lockout 10 5 G35 2 2 2 2 2 2 2 2 Setting 1*NM1 25000*NM1 1*NM1
40158 40158 N° CB Ops Maint 10 6 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40159 40159 N° CB Ops Maint 10 7 G1 1 1 1 1 1 1 1 1 Setting 1 10000 1
40160 40160 N° CB Ops Lock 10 8 G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40161 40161 N° CB Ops Lock 10 9 G1 1 1 1 1 1 1 1 1 Setting 1 10000 1
40162 40162 CB Time Maint 10 0A G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40163 40164 CB Time Maint 10 0B G35 2 2 2 2 2 2 2 2 Setting 0.005 0.5 0.001
40165 40165 CB Time Lockout 10 0C G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40166 40167 CB Time Lockout 10 0D G35 2 2 2 2 2 2 2 2 Setting 0.005 0.5 0.001

P441 P441 P442 P442 P444 P444 P444 P444
40168 40168 Fault Freq Lock 10 0E G88 1 1 1 1 1 1 1 1 Setting 0 1 1
40169 40169 Fault Freq Count 10 0F G1 1 1 1 1 1 1 1 1 Setting 0 9999 1
40170 40171 Fault Freq Time 10 10 G35 2 2 2 2 2 2 2 2 Setting 0 9999 1
40172 40172 Lockout Reset 10 11 G11 1 1 1 1 1 1 1 1 Command 0 1 1
40173 40173 Reset Lockout by 10 12 G81 1 1 1 1 1 1 1 1 Setting 0 1 1
40174 40174 Man Close RstDly 10 13 G2 1 1 1 1 1 1 1 1 Setting 0.01 600 0.01
40200 40200 CB Control by 7 1 G99 1 1 1 1 1 1 1 1 Setting 0 7 1
40201 40201 Manual Close Pulse Time 7 2 G2 1 1 1 1 1 1 1 1 Setting 0.1 10 0.01
40202 40202 Trip Pulse Time 7 3 G2 1 1 1 1 1 1 1 1 Setting 0.1 5 0.01
40203 40203 Man Close Delay 7 4 G2 1 1 1 1 1 1 1 1 Setting 0.01 600 0.01
40204 40204 A/R Single Pole 7 7 G37 1 1 1 1 1 1 Setting 0 1 1
40205 40205 A/R Three Pole 7 8 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40206 40207 Healthy Window 7 5 G35 2 2 2 2 2 2 2 2 Setting 0.01 9999 0.01
40208 40209 C/S Window 7 6 G35 2 2 2 2 2 2 2 2 Setting 0.01 9999 0.01
40250 40250 SelectDisturbance record. FF 89 G1 1 1 1 1 1 1 1 1 Setting 1 65535 1
40300 40303 Date/Time 8 1 G12 4 4 4 4 4 4 4 4 Setting
40304 40304 IRIG-B Sync 8 4 G37 1 1 1 1 1 1 Setting 0 1 1
40305 40305 Battery Alarm 8 7 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40400 40400 Record Selection Command Register FF 8A G18 1 1 1 1 1 1 1 1 Command 0 24 1
40401 40401 Record Control Command Register FF 8B G6 1 1 1 1 1 1 1 1 Command 0 4 1
40402 40402 Restore Defaults 9 1 G53 1 1 1 1 1 1 1 1 Command 0 5 1
40403 40403 Setting Group 9 2 G61 1 1 1 1 1 1 1 1 Setting 0 1 1
40404 40404 Active Settings 9 3 G90 1 1 1 1 1 1 1 1 Setting 0 3 1
40405 40405 Save Changes 9 4 G62 1 1 1 1 1 1 1 1 Command 0 2 1
40406 40406 Copy From 9 5 G90 1 1 1 1 1 1 1 1 Setting 0 3 1
40407 40407 Copy to 9 6 G98 1 1 1 1 1 1 1 1 Command 0 3 1
40408 40408 Setting Group 1 9 7 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40411 40411 Setting Group 4 9 0A G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40412 40412 Dist. Protection 9 0D G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40413 40413 Power-Swing 9 10 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40414 40414 Back-Up I> 9 11 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40415 40415 Neg Sequence O/C 9 12 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40416 40416 Broken Conductor 9 13 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40417 40417 Earth Fault Prot 9 14 G131 1 1 1 1 1 1 1 1 Setting 0 1 1
40418 40418 Aided D.E.F 9 15 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40419 40419 Volt Protection 9 16 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40420 40420 CB Fail & I< 9 17 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40421 40421 Supervision 9 18 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40422 40422 System Checks 9 19 G37 1 1 1 1 Setting 0 1 1
40423 40423 Internal A/R 9 24 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
40500 40501 Main VT Primary 0A 1 G35 2 2 2 2 2 2 2 2 Setting 100 1000000 1
40502 40502 Main VT Sec'y 0A 2 G2 1 1 1 1 1 1 1 1 Setting 80*V1 140*V1 1*V1
40503 40504 C/S VT Primary 0A 3 G35 2 2 2 2 2 2 2 2 Setting 100 1000000 1
40505 40505 C/S VT Secondary 0A 4 G2 1 1 1 1 1 1 1 1 Setting 80*V2 140*V2 1*V2
40506 40506 Phase CT Primary 0A 7 G2 1 1 1 1 1 1 1 1 Setting 1 30000 1
40507 40507 Phase CT Sec'y 0A 8 G2 1 1 1 1 1 1 1 1 Setting 1 5 4
40508 40508 Mcomp CT Primary 0A 0D G2 1 1 1 1 1 1 1 1 Setting 1 30000 1
40509 40509 Mcomp CT Sec'y 0A 0E G2 1 1 1 1 1 1 1 1 Setting 1 5 4
40510 40510 C/S Input 0A 0F G40 1 1 1 1 1 1 1 1 Setting 0 3 1
40511 40511 Main VT Location 0A 10 G89 1 1 1 1 1 1 1 1 Setting 0 1 1
40520 40520 Alarm Event 0B 4 G37 1 1 1 1 1 1 1 1 Command 0 1 1
40521 40521 Relay O/P Event 0B 5 G37 1 1 1 1 1 1 1 1 Command 0 1 1
40522 40522 Opto Input Event 0B 6 G37 1 1 1 1 1 1 1 1 Command 0 1 1
40523 40523 System Event 0B 7 G37 1 1 1 1 1 1 1 1 Command 0 1 1
40524 40524 Fault Rec Event 0B 8 G37 1 1 1 1 1 1 1 1 Command 0 1 1
40525 40525 Maint Rec Event 0B 9 G37 1 1 1 1 1 1 1 1 Command 0 1 1
40526 40526 Protection Event 0B 0A G37 1 1 1 1 1 1 1 1 Command 0 1 1
40527 40527 DDB element 31 - 0 0B 0B G27 2 2 2 2 2 2 2 2 Setting 0 1 32
40529 40529 DDB element 63 - 32 0B 0C G28 2 2 2 2 2 2 2 2 Setting 0 1 32
40531 40531 DDB element 95 - 64 0B 0D G29 2 2 2 2 2 2 2 2 Setting 0 1 32
40533 40533 DDB element 127 - 96 0B 0E G30 2 2 2 2 2 2 2 2 Setting 0 1 32
40535 40535 DDB element 159 - 128 0B 0F G31 2 2 2 2 2 2 2 2 Setting 0 1 32
40537 40537 DDB element 191 - 160 0B 10 G32 2 2 2 2 2 2 2 2 Setting 0 1 32
40557 40557 DDB element 511 - 480 0B 1A G42 2 2 2 2 2 2 2 2 Setting 0 1 32
40559 40559 DDB element 543 - 512 0B 1B G43 2 2 2 2 2 2 2 2 Setting 0 1 32
40561 40561 DDB element 575 - 544 0B 1C G44 2 2 2 2 2 2 2 2 Setting 0 1 32
40563 40563 DDB element 607 - 575 0B 1D G45 2 2 2 2 2 2 2 2 Setting 0 1 32
40565 40565 DDB element 639 - 608 0B 1E G46 2 2 2 2 2 2 2 2 Setting 0 1 32
40567 40567 DDB element 671 - 640 0B 1F G47 2 2 2 2 2 2 2 2 Setting 0 1 32
40589 40589 DDB element 1022 - 992 0B 2A G58 2 2 2 2 2 2 2 2 Setting 0 1 31
40600 40600 Duration 0C 1 G2 1 1 1 1 1 1 1 1 Setting 0.1 10.5 0.01
40601 40601 Trigger Position 0C 2 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.1
40602 40602 Trigger Mode 0C 3 G34 1 1 1 1 1 1 1 1 Setting 0 1 1
40603 40603 Analog Channel 1 0C 4 G31 1 1 1 1 1 1 1 1 Setting 0 10 1

P441 P441 P442 P442 P444 P444 P444 P444
40609 40609 Analog Channel 7 0C 0A G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40610 40610 Analog Channel 8 0C 0B G31 1 1 1 1 1 1 1 1 Setting 0 10 1
40611 40611 Digital Input 1 0C 0C G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40612 40612 Input 1 Trigger 0C 0D G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40613 40613 Digital Input 2 0C 0E G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40614 40614 Input 2 Trigger 0C 0F G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40615 40615 Digital Input 3 0C 10 G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40616 40616 Input 3 Trigger 0C 11 G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40625 40625 Digital Input 8 0C 1A G32 1 1 1 1 1 1 1 1 Setting 0 DDB Size 1
40626 40626 Input 8 Trigger 0C 1B G66 1 1 1 1 1 1 1 1 Setting 0 2 1
40700 40700 Default Display 0D 1 G52 1 1 1 1 1 1 1 1 Setting 0 6 1
40701 40701 Local Values 0D 2 G54 1 1 1 1 1 1 1 1 Setting 0 1 1
40702 40702 Remote Values 0D 3 G54 1 1 1 1 1 1 1 1 Setting 0 1 1
40703 40703 Measurement Ref 0D 4 G56 1 1 1 1 1 1 1 1 Setting 0 5 1
40704 40704 Measurement Mode 0D 5 G1 1 1 1 1 1 1 1 1 Setting 0 3 1
40705 40705 Demand Interval 0D 6 G2 1 1 1 1 1 1 1 1 Setting 1 99 1
40706 40706 Distance Unit 0D 7 G97 1 1 1 1 1 1 1 1 Setting 0 1 1
40707 40707 Fault Location 0D 8 G51 1 1 1 1 1 1 1 1 Setting 0 2 1
40800 40800 Remote Address 0E 2 G1 1 1 1 1 1 1 1 1 Setting 0 247 1
40801 40801 Inactivity Timer 0E 3 G2 1 1 1 1 1 1 1 1 Setting 1 30 1
40802 40802 Baud Rate 0E 4 G38 1 1 1 1 1 1 1 1 Setting 0 1 1
40802 40802 Baud Rate 0E 4 G38 1 1 1 1 1 1 1 1 Setting 0 1 1
40803 40803 Parity 0E 5 G39 1 1 1 1 1 1 1 1 Setting 0 2 1
40803 40803 Parity 0E 5 G39 1 1 1 1 1 1 1 1 Setting 0 2 1
40850 40850 Monitor Bit 1 0F 6 G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40854 40854 Monitor Bit 5 0F A G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40855 40855 Monitor Bit 6 0F B G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40856 40856 Monitor Bit 7 0F C G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40857 40857 Monitor Bit 8 0F D G1 1 1 1 1 1 1 1 1 Setting 0 511 1
40858 40858 Test Mode 0F E G204 1 1 1 1 1 1 1 1 Setting 0 1 1
40859 40860 Test Pattern 1 0F F G9 2 2 2 2 2 2 2 2 Setting 0 4294967295 1
40861 40862 Test Pattern 2 0F 10 G9 2 2 Setting 0 16383 1
40863 40863 Contact Test 0F 11 G93 1 1 1 1 1 1 1 1 Command 0 2 1
40864 40864 Test LEDs 0F 12 G94 1 1 1 1 1 1 1 1 Command 0 1 1
40865 40865 Autoreclose Test 0F 13 G36 1 1 1 1 1 1 1 1 Command 0 4 1

P441 P441 P442 P442 P444 P444 P444 P444
40900 40900 Global threshold 11 1 G200 1 1 1 1 1 1 1 1 Setting 0 5 1
40901 40901 Opto Input 1 11 2 G201 1 1 1 1 1 1 1 1 Setting 0 2 1
40909 40909 Opto Input 9 11 0A G201 1 1 1 1 1 1 Setting 0 2 1
40910 40910 Opto Input 10 11 0B G201 1 1 1 1 1 1 Setting 0 2 1
40911 40911 Opto Input 11 11 0C G201 1 1 1 1 1 1 Setting 0 2 1
40912 40912 Opto Input 12 11 0D G201 1 1 1 1 1 1 Setting 0 2 1
40913 40913 Opto Input 13 11 0E G201 1 1 1 1 1 1 Setting 0 2 1
40914 40914 Opto Input 14 11 0F G201 1 1 1 1 1 1 Setting 0 2 1
40915 40915 Opto Input 15 11 10 G201 1 1 1 1 1 1 Setting 0 2 1
40916 40916 Opto Input 16 11 11 G201 1 1 1 1 1 1 Setting 0 2 1
40917 40917 Opto Input 17 11 12 G201 1 1 1 1 Setting 0 2 1
40925 40925 Opto Input 25 11 1A G201 Setting 0 2 1
40926 40926 Opto Input 26 11 1B G201 Setting 0 2 1
40927 40927 Opto Input 27 11 1C G201 Setting 0 2 1
40928 40928 Opto Input 28 11 1D G201 Setting 0 2 1
40929 40929 Opto Input 29 11 1E G201 Setting 0 2 1
40930 40930 Opto Input 30 11 1F G201 Setting 0 2 1
40931 40931 Opto Input 31 11 20 G201 Setting 0 2 1
40932 40932 Opto Input 32 11 21 G201 Setting 0 2 1
Group 1
41000 41001 Line Length 30 2 G35 2 2 2 2 2 2 2 2 Setting 300 1000000 10
41002 41003 Line Length 30 3 G35 2 2 2 2 2 2 2 2 Setting 0.2 625 0.005
41004 41005 Line Impedance 30 4 G35 2 2 2 2 2 2 2 2 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1
41006 41006 Line Angle 30 5 G2 1 1 1 1 1 1 1 1 Setting -90 90 0.1
41007 41007 kZ1 Res Comp 30 8 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41008 41008 kZ1 Angle 30 9 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41009 41010 Z1 30 0A G35 2 2 2 2 2 2 2 2 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1
41011 41012 Z1X 30 0B G35 2 2 2 2 2 2 2 2 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1
41013 41013 R1G 30 0C G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41014 41014 R1Ph 30 0D G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41015 41015 tZ1 30 0E G2 1 1 1 1 1 1 1 1 Setting 0 10 0.002
41016 41016 kZ2 Res Comp 30 0F G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41017 41017 kZ2 Angle 30 10 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41018 41019 Z2 30 11 G35 2 2 2 2 2 2 2 2 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1
41020 41020 R2G 30 12 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41021 41021 R2Ph 30 13 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41022 41022 tZ2 30 14 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41023 41023 kZ3/4 Res Comp 30 15 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41024 41024 kZ3/4 Angle 30 16 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41025 41026 Z3 30 17 G35 2 2 2 2 2 2 2 2 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1
41027 41027 R3G - R4G 30 18 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41028 41028 R3Ph - R4Ph 30 19 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41029 41029 tZ3 30 1A G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41030 41031 Z4 30 1B G35 2 2 2 2 2 2 2 2 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1
41032 41032 tZ4 30 1C G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41033 41033 Zone P - Direct. 30 1D G123 1 1 1 1 1 1 1 1 Setting 0 1 1
41034 41034 kZp Res Comp 30 1E G2 1 1 1 1 1 1 1 1 Setting 0 7 0.001
41035 41035 kZp Angle 30 1F G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41036 41037 Zp 30 20 G35 2 2 2 2 2 2 2 2 Setting 0.001*V1/I1 500*V1/I1 0.001*V1/I1
41038 41038 RpG 30 21 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41039 41039 RpPh 30 22 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41040 41040 tZp 30 23 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41041 41041 Serial Comp line 30 24 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41042 41042 Zone Overlap mode 30 25 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41043 41043 kZm Mutual Comp 30 27 G2 1 1 1 1 1 1 1 1 Setting 0 7 0.01
41044 41044 kZm Angle 30 28 G2 1 1 1 1 1 1 1 1 Setting -180 180 0.1
41050 41050 Program Mode 31 1 G106 1 1 1 1 1 1 1 1 Setting 0 1 1
41051 41051 Standard Mode 31 2 G107 1 1 1 1 1 1 1 1 Setting 0 6 1
41052 41052 Fault Type 31 3 G115 1 1 1 1 1 1 1 1 Setting 0 2 1
41053 41053 Trip Mode 31 4 G114 1 1 1 1 1 1 Setting 0 2 1
41054 41054 Sig. Send Zone 31 5 G108 1 1 1 1 1 1 1 1 Setting 0 3 1
41055 41055 DistCR 31 6 G109 1 1 1 1 1 1 1 1 Setting 0 5 1
41056 41056 Tp 31 7 G2 1 1 1 1 1 1 1 1 Setting 0 1 0.002
41057 41057 tReversal Guard 31 8 G2 1 1 1 1 1 1 1 1 Setting 0 0.15 0.002
41058 41058 Unblocking Logic 31 9 G113 1 1 1 1 1 1 1 1 Setting 0 2 1
41059 41059 TOR-SOTF Mode 31 0A G118 1 1 1 1 1 1 1 1 Setting 0 127 1
41060 41060 SOFT Delay 31 0B G2 1 1 1 1 1 1 1 1 Setting 10 3600 1
41061 41061 Z1Ext On Chan.Fail 31 0C G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41062 41062 WI :Mode Status 31 0E G116 1 1 1 1 1 1 1 1 Setting 0 2 1
41063 41063 WI : Single Pole Trip 31 0F G37 1 1 1 1 1 1 Setting 0 1 1
41064 41064 WI : V< Thres. 31 10 G2 1 1 1 1 1 1 1 1 Setting 10 70 5
41065 41065 WI : Trip Time Delay 31 11 G2 1 1 1 1 1 1 1 1 Setting 0 1 0.002
41066 41066 LoL: Mode Status 31 13 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41067 41067 LoL. Chan. Fail 31 14 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41068 41068 LoL: I< 31 15 G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 1*I1 0.05*I1
41069 41069 LoL: Window 31 16 G2 1 1 1 1 1 1 1 1 Setting 0.01 0.1 0.01
41150 41150 DR 32 1 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41151 41151 DX 32 2 G2 1 1 1 1 1 1 1 1 Setting 0 400*V1/I1 0.01*V1/I1
41152 41152 IN > Status 32 3 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41153 41153 IN > (% Imax) 32 4 G2 1 1 1 1 1 1 1 1 Setting 10 100 1
41154 41154 I2 > Status 32 5 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41155 41155 I2 > (% Imax) 32 6 G2 1 1 1 1 1 1 1 1 Setting 10 100 1
41156 41156 Imax Line > Status 32 7 G37 1 1 1 1 1 1 1 1 Setting 0 1 1

P441 P441 P442 P442 P444 P444 P444 P444
41157 41157 Imax Line > 32 8 G2 1 1 1 1 1 1 1 1 Setting 1*I1 20*I1 0.01*I1
41158 41158 Unblocking Time-Delay 32 9 G2 1 1 1 1 1 1 1 1 Setting 0 30 0.1
41159 41159 Blocking Zones 32 0A G119 1 1 1 1 1 1 1 1 Setting 0 15 1
41250 41250 I>1 Function 35 1 G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41251 41251 I>1 Directional 35 2 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41252 41252 I>1 VTS Block 35 3 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41253 41253 I>1 Current Set 35 4 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4.0*I1 0.01*I1
41254 41254 I>1 Time Delay 35 5 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41255 41255 I>1 Time Delay VTS 35 6 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41256 41256 I>1 TMS 35 7 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0.025
41257 41257 I>1 Time Dial 35 8 G2 1 1 1 1 1 1 1 1 Setting 0.5 15 0.1
41258 41258 I>1 Reset Char 35 9 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41259 41259 I>1 tRESET 35 0A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41260 41260 I>2 Function 35 0B G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41261 41261 I>2 Directional 35 0C G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41262 41262 I>2 VTS Block 35 0D G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41263 41263 I>2 Current Set 35 0E G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4.0*I1 0.01*I1
41264 41264 I>2 Time Delay 35 0F G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41265 41265 I>2 Time Delay VTS 35 10 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41266 41266 I>2 TMS 35 11 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0.025
41267 41267 I>2 Time Dial 35 12 G2 1 1 1 1 1 1 1 1 Setting 0.5 15 0.1
41268 41268 I>2 Reset Char 35 13 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41269 41269 I>2 tRESET 35 14 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41270 41270 I>3 Status 35 15 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41271 41271 I>3 Current Set 35 16 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41272 41272 I>3 Time Delay 35 17 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41273 41273 I>4 Status 35 18 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41274 41274 I>4 Current Set 35 19 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41275 41275 I>4 Time Delay 35 1A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41300 41300 I2> Status 36 1 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41301 41301 I2> Directional 36 2 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41302 41302 I2> VTS 36 3 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41303 41303 I2> Current Set 36 4 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4*I1 0.01*I1
41304 41304 I2> Time Delay 36 5 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41305 41305 I2> Char Angle 36 6 G2 1 1 1 1 1 1 1 1 Setting -95 95 1
41350 41350 Broken Conductor 37 1 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41351 41351 I2/I1 Setting 37 2 G2 1 1 1 1 1 1 1 1 Setting 0.2 1 0.01
41352 41352 I2/I1 Time Delay 37 3 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.1
41353 41353 I2/I1 Trip 37 4 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41400 41400 IN>1 Function 38 1 G43 1 1 1 1 1 1 1 1 Setting 0 10 1
41401 41401 IN>1 Directional 38 2 G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41402 41402 IN>1 VTS Block 38 3 G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41403 41403 IN>1 Current Set 38 4 G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4.0*I1 0.01*I1
41404 41404 IN>1 Time Delay 38 5 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41405 41405 IN>1 Time Delay VTS 38 6 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41406 41406 IN>1 TMS 38 7 G2 1 1 1 1 1 1 1 1 Setting 0.025 1.2 0.025
41407 41407 IN>1 Time Dial 38 8 G2 1 1 1 1 1 1 1 1 Setting 0.5 15 0.1
41408 41408 IN>1 Reset Char 38 9 G60 1 1 1 1 1 1 1 1 Setting 0 1 1
41409 41409 IN>1 tRESET 38 0A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41410 41410 IN>2 Status 38 0B G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41411 41411 IN>2 Directional 38 0C G44 1 1 1 1 1 1 1 1 Setting 0 2 1
41412 41412 IN>2 VTS Block 38 0D G45 1 1 1 1 1 1 1 1 Setting 0 1 1
41413 41413 IN>2 Current Set 38 0E G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 32*I1 0.01*I1
41414 41414 IN>2 Time Delay 38 0F G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41415 41415 IN>2 Time Delay VTS 38 10 G2 1 1 1 1 1 1 1 1 Setting 0 200 0.01
41416 41416 IN> Char Angle 38 12 G2 1 1 1 1 1 1 1 1 Setting -95 95 1
41417 41417 Polarisation 38 13 G46 1 1 1 1 1 1 1 1 Setting 0 1 1
41450 41450 Channel Aided DEF Status 39 1 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41451 41451 Polarisation 39 2 G46 1 1 1 1 1 1 1 1 Setting 0 1 1
41452 41452 V> Voltage Set 39 3 G2 1 1 1 1 1 1 1 1 Setting 0.5 20 0.01
41453 41453 IN Forward 39 4 G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 4*I1 0.01*I1
41454 41454 Time Delay 39 5 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.1
41455 41455 Scheme Logic 39 6 G112 1 1 1 1 1 1 1 1 Setting 0 2 1
41456 41456 Tripping 39 7 G48 1 1 1 1 1 1 Setting 0 1 1
41600 Zero Seq. Power Status 3C 1 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41601 K Time Delay Factor 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0 2 0.2
41602 Basis Time Delay 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.01
41603 Residual Current 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 1 0.01
41604 Residual Power 3C 1 G2 1 1 1 1 1 1 1 1 Setting 0.3 0.6 0.03
41949 41949 V< & V> MODE 42 1 G121 1 1 1 1 1 1 1 1 Setting 0 15 1
41950 41950 V< Measur't Mode 42 3 G47 1 1 1 1 1 1 1 1 Setting 0 1 1
41951 41951 V<1 Function 42 4 G23 1 1 1 1 1 1 1 1 Setting 0 2 1
41952 41952 V<1 Voltage Set 42 5 G2 1 1 1 1 1 1 1 1 Setting 10 120 1
41953 41953 V<1 Time Delay 42 6 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41954 41954 V<1 TMS 42 7 G2 1 1 1 1 1 1 1 1 Setting 0.5 100 0.5
41955 41955 V<2 Status 42 8 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41956 41956 V<2 Voltage Set 42 9 G2 1 1 1 1 1 1 1 1 Setting 10 120 1
41957 41957 V<2 Time Delay 42 0A G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41958 41958 V> Measur't Mode 42 0C G47 1 1 1 1 1 1 1 1 Setting 0 1 1
41959 41959 V>1 Function 42 0D G23 1 1 1 1 1 1 1 1 Setting 0 2 1
41960 41960 V>1 Voltage Set 42 0E G2 1 1 1 1 1 1 1 1 Setting 60 185 1
41961 41961 V>1 Time Delay 42 0F G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
41962 41962 V>1 TMS 42 10 G2 1 1 1 1 1 1 1 1 Setting 0.5 100 0.5
41963 41963 V>2 Status 42 11 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
41964 41964 V>2 Voltage Set 42 12 G2 1 1 1 1 1 1 1 1 Setting 60 185 1
41965 41965 V>2 Time Delay 42 13 G2 1 1 1 1 1 1 1 1 Setting 0 100 0.01
42100 42100 CB Fail 1 Status 45 2 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42101 42101 CB Fail 1 Timer 45 3 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.005
42102 42102 CB Fail 2 Status 45 4 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42103 42103 CB Fail 2 Timer 45 5 G2 1 1 1 1 1 1 1 1 Setting 0 10 0.005
42104 42104 CBF Non I Reset 45 6 G68 1 1 1 1 1 1 1 1 Setting 0 2 1
42105 42105 CBF Ext Reset 45 7 G68 1 1 1 1 1 1 1 1 Setting 0 2 1
42106 42106 I < Current Set 45 9 G2 1 1 1 1 1 1 1 1 Setting 0.05*I1 3.2*I1 0.1*I1
42150 42150 VTS Time Delay 46 2 G2 1 1 1 1 1 1 1 1 Setting 1 20 1
42151 42151 VTS I2> & I0> Inhibit 46 3 G2 1 1 1 1 1 1 1 1 Setting 0 1.0*I1 0.01*I1
42152 42152 CTS Status 46 8 G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42153 42153 CTS VN< Inhibit 46 9 G2 1 1 1 1 1 1 1 1 Setting 0.5 22 0.5

P441 P441 P442 P442 P444 P444 P444 P444
42154 42154 CTS IN> Set 46 0A G2 1 1 1 1 1 1 1 1 Setting 0.08*I1 4*I1 0.01*I1
42155 42155 CTS Time Delay 46 0B G2 1 1 1 1 1 1 1 1 Setting 0 10 1
42156 42156 CVTS Status 46 0C G37 1 1 1 1 1 1 1 1 Setting 0 0 1
42157 42157 CVTS VN> 46 0D G2 1 1 1 1 1 1 1 1 Setting 0.01 0.1 0.01
42158 42158 CVTS Time Delay 46 0E G2 1 1 1 1 1 1 1 1 Setting 0 300 1
42250 42250 C/S Check Schem. for A/R 48 1 G103 1 1 1 1 Setting 0 7 1
42251 42251 C/S Check Schem. for Man CB 48 2 G103 1 1 1 1 Setting 0 7 1
42252 42252 V< Dead Line 48 3 G2 1 1 1 1 Setting 5 30 1
42253 42253 V> Live Line 48 4 G2 1 1 1 1 Setting 30 120 1
42254 42254 V< Dead Bus 48 5 G2 1 1 1 1 Setting 5 30 1
42255 42255 V> Live Bus 48 6 G2 1 1 1 1 Setting 30 120 1
42256 42256 Diff Voltage 48 7 G2 1 1 1 1 Setting 0.5 40 0.1
42257 42257 Diff Frequency 48 8 G2 1 1 1 1 Setting 0.02 1 0.01
42258 42258 Diff Phase 48 9 G2 1 1 1 1 Setting 5 90 2.5
42259 42259 Bus-Line Delay 48 0A G2 1 1 1 1 Setting 0.1 2 0.1
42300 42300 1P Trip Mode 49 2 G101 1 1 1 1 1 1 Setting 0 3 1
42301 42301 3P Trip Mode 49 3 G102 1 1 1 1 1 1 1 1 Setting 0 3 1
42302 42302 1P Rcl - Dead Time 1 49 4 G2 1 1 1 1 1 1 Setting 0.1 5 0.01
42303 42303 3P Rcl - Dead Time 1 49 5 G2 1 1 1 1 1 1 1 1 Setting 0.1 60 0.01
42304 42304 Dead Time 2 49 6 G2 1 1 1 1 1 1 1 1 Setting 1 3600 1
42307 42307 Reclaim Time 49 9 G2 1 1 1 1 1 1 1 1 Setting 1 600 1
42308 42308 Reclose Time Delay 49 0A G2 1 1 1 1 1 1 1 1 Setting 0.1 10 0.1
42309 42309 Discrimination Time 49 0B G2 1 1 1 1 1 1 1 1 Setting 0.1 5 0.01
42310 42310 A/R Inhbit Wind 49 0C G2 1 1 1 1 1 1 1 1 Setting 1 3600 1
42311 42311 C/S on 3P Rcl DT1 49 0D G37 1 1 1 1 1 1 1 1 Setting 0 1 1
42312 41312 Block A/R 49 0F G117 1 1 1 1 1 1 1 1 Setting 0 16383 1
42400 42407 Opto Input 1 4A 1 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42464 42471 Opto Input 9 4A 9 G3 8 8 8 8 8 8 Setting 32 163 1
42472 42479 Opto Input 10 4A 0A G3 8 8 8 8 8 8 Setting 32 163 1
42480 42487 Opto Input 11 4A 0B G3 8 8 8 8 8 8 Setting 32 163 1
42488 42495 Opto Input 12 4A 0C G3 8 8 8 8 8 8 Setting 32 163 1
42496 42503 Opto Input 13 4A 0D G3 8 8 8 8 8 8 Setting 32 163 1
42504 42511 Opto Input 14 4A 0E G3 8 8 8 8 8 8 Setting 32 163 1
42512 42519 Opto Input 15 4A 0F G3 8 8 8 8 8 8 Setting 32 163 1
42520 42527 Opto Input 16 4A 10 G3 8 8 8 8 8 8 Setting 32 163 1
42528 42535 Opto Input 17 4A 11 G3 8 8 8 8 Setting 32 163 1
42600 42607 Relay 1 4B 1 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42608 42615 Relay 2 4B 2 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42616 42623 Relay 3 4B 3 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42624 42631 Relay 4 4B 4 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42632 42639 Relay 5 4B 5 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42640 42647 Relay 6 4B 6 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42648 42655 Relay 7 4B 7 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42656 42663 Relay 8 4B 8 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42664 42671 Relay 9 4B 9 G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42672 42679 Relay 10 4B 0A G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42680 42687 Relay 11 4B 0B G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42688 42695 Relay 12 4B 0C G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42696 42703 Relay 13 4B 0D G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42704 42711 Relay 14 4B 0E G3 8 8 8 8 8 8 8 8 Setting 32 163 1
42712 42719 Relay 15 4B 0F G3 8 8 8 8 8 8 Setting 32 163 1
42720 42727 Relay 16 4B 10 G3 8 8 8 8 8 8 Setting 32 163 1
42728 42735 Relay 17 4B 11 G3 8 8 8 8 8 8 Setting 32 163 1
42736 42743 Relay 18 4B 12 G3 8 8 8 8 8 8 Setting 32 163 1
42744 42751 Relay 19 4B 13 G3 8 8 8 8 8 8 Setting 32 163 1
42752 42759 Relay 20 4B 14 G3 8 8 8 8 8 8 Setting 32 163 1
42760 42767 Relay 21 4B 15 G3 8 8 8 8 8 8 Setting 32 163 1
42768 42775 Relay 22 4B 16 G3 8 8 8 8 Setting 32 163 1
42776 42783 Relay 23 4B 17 G3 8 8 8 8 Setting 32 163 1
42784 42791 Relay 24 4B 18 G3 8 8 8 8 Setting 32 163 1
42792 42799 Relay 25 4B 19 G3 8 8 8 8 Setting 32 163 1
42800 42807 Relay 26 4B 1A G3 8 8 8 8 Setting 32 163 1
42808 42815 Relay 27 4B 1B G3 8 8 8 8 Setting 32 163 1
42816 42823 Relay 28 4B 1C G3 8 8 8 8 Setting 32 163 1
42824 42831 Relay 29 4B 1D G3 8 8 8 8 Setting 32 163 1
42832 42839 Relay 30 4B 1E G3 8 8 8 8 Setting 32 163 1
42840 42847 Relay 31 4B 1F G3 8 8 8 8 Setting 32 163 1
42848 42855 Relay 32 4B 20 G3 8 8 8 8 Setting 32 163 1
42856 42855 Relay 33 4B 21 G3 8 8 Setting 32 163 1
42864 42863 Relay 34 4B 22 G3 8 8 Setting 32 163 1
42872 42871 Relay 35 4B 23 G3 8 8 Setting 32 163 1
42880 42879 Relay 36 4B 24 G3 8 8 Setting 32 163 1
42888 42887 Relay 37 4B 25 G3 8 8 Setting 32 163 1
42896 42895 Relay 38 4B 26 G3 8 8 Setting 32 163 1
42904 42903 Relay 39 4B 27 G3 8 8 Setting 32 163 1
42912 42911 Relay 40 4B 28 G3 8 8 Setting 32 163 1
42920 42919 Relay 41 4B 29 G3 8 8 Setting 32 163 1
42928 42927 Relay 42 4B 2A G3 8 8 Setting 32 163 1
42936 42935 Relay 43 4B 2B G3 8 8 Setting 32 163 1
42944 42943 Relay 44 4B 2C G3 8 8 Setting 32 163 1
42952 42951 Relay 45 4B 2D G3 8 8 Setting 32 163 1

P441 P441 P442 P442 P444 P444 P444 P444
42960 42959 Relay 46 4B 2E G3 8 8 Setting 32 163 1
MiCOM P441, P442 & P444 Page E-1
Part E - IEC870-5-103 (VDEW)
ASDU COT INF FUN Description GI Model Number Interpretation
P441 P442 P444

System Functions(Monitor)
8 10 0 128 End of General Interrogration * * *
6 8 0 128 Time Syncronisation * * *
5 3 2 128 Reset FCB * * *
5 4 3 128 Reset CU * * *
5 5 4 128 Start/Restart * * *
5 6 5 128 Power On * * *
Note: Identification message in ASDU 5: ALSTOM P44x Software ref i.e. ALSTOM P444 3.0
Status Indications
1 1,7,9,11,12,20,21 16 128 Auto-recloser active * * * DDB_PRT_AR_ENABLE
1 1,7,9,11,12,20,21 17 Tele-protection active
1 1,7,9,11,12,20,21 18 Protection active
1 1,7,9,11,12,20,21 19 128 LED Reset * * * RESET_INDICATIONS
1 9,11 20 Monitor direction blocked
1 9,11 21 128 Test mode * * * * DDB_ALARM_PROT_DISABLED
1 9,11 22 Local parameter setting
1 1,7,9,11,12,20,21 23 128 Characteristic 1 * * * * PG1 Changed
1 1,7,9,11 27 128 Auxillary input 1 * * * * DDB_OPTO_ISOLATOR_1
Supervision Indications
1 1,7,9 32 Measurand supervision I
1 1,7,9 33 Measurand supervision V
1 1,7,9 35 Phase sequence supervision
1 1,7,9 36 128 Trip circuit supervision * * * * DDB_ALARM_CTS
1 1,7,9 37 I>> back-up supervision
1 1,7,9 38 128 VT fuse failure * * * * DDB_ALARM_VTS_SLOW
1 1,7,9 39 128 Teleprotection disturbed * * * * DDB_ALARM_COS
1 1,7,9 46 Group warning
1 1,7,9 47 Group alarm
Earth Fault Indications
1 1,7,9 48 128 Earth Fault L1 * * * * DDB_PRT_DEF_START_AN
1 1,7,9 49 128 Earth Fault L2 * * * * DDB_PRT_DEF_START_BN
1 1,7,9 50 128 Earth Fault L3 * * * * DDB_PRT_DEF_START_CN
1 1,7,9 51 128 Earth Fault Fwd * * * * DDB_PRT_DEF_FWD
1 1,7,9 52 128 Earth Fault Rev * * * * DDB_PRT_DEF_REV
Fault Indications
2 1,7,9 64 128 Start /pickup L1 * * * * DDB_PRT_DIST_START_A
2 1,7,9 65 128 Start /pickup L2 * * * * DDB_PRT_DIST_START_B
2 1,7,9 66 128 Start /pickup L3 * * * * DDB_PRT_DIST_START_C
2 1,7,9 67 128 Start /pickup N * * * * DDB_PRT_IN_SUP_2_PICK_UP
2 1,7 68 128 General Trip * * * DDB_PRT_ANY_TRIP
2 1,7 69 128 Trip L1 * * * DDB_PRT_DIST_TRIP_A
2 1,7 70 128 Trip L2 * * * DDB_PRT_DIST_TRIP_B
2 1,7 71 128 Trip L3 * * * DDB_PRT_DIST_TRIP_C
2 1,7 72 Trip I>> (backup)
4 1,7 73 Fault Location in ohms * * *
2 1,7 74 128 Fault forward * * * DDB_PRT_DIST_FWD
2 1,7 75 128 Fault reverse * * * DDB_PRT_DIST_REV
2 1,7 76 128 Teleprotection signal sent * * * DDB_PRT_CARRIER_SEND
1 1,7 77 128 Teleprotection signal received * * * DDB_PRT_UNB_CR
2 1,7 78 128 Zone 1 * * * DDB_PRT_Z1
2 1,7 79 128 Zone 2 * * * DDB_PRT_Z2
2 1,7 80 128 Zone 3 * * * DDB_PRT_Z3
2 1,7 81 128 Zone 4 * * * DDB_PRT_Z4
2 1,7 82 128 Zone 5 * * * DDB_PRT_ZP
2 1,7 83 Zone 6
2 1,7,9 84 128 General Start * * * * DDB_PRT_ANY_START
2 1,7 85 128 Breaker Failure * * * DDB_ALARM_BREAKER_FAIL
2 1,7 86 Trip measuring system L1
2 1,7 89 Trip measuring system E
2 1,7 90 128 Trip I> * * * DDB_PRT_I_SUP_1_TRIP
2 1,7 91 128 Trip I>> * * * DDB_PRT_I_SUP_2_TRIP
2 1,7 92 128 Trip IN> * * * DDB_PRT_IN_SUP2_TRIP
2 1,7 93 128 Trip IN>> * * * DDB_PRT_IN_SUP3_TRIP
Auto-Reclose Indications (Monitor)
1 1,7 128 128 CB 'on' by A/R * * DDB_PRT_AR_CLOSE
1 1,7 129 CB 'on' by long time A/R
1 1,7,9 130 128 AR blocked * * * DDB_PRT_AR_LOCKOUT
Measurands (Monitor)
3.1 2,7 144 128 Measurand I
3.2 2,7 145 128 Measurands I,V
3.3 2,7 146 128 Measurands I,V,P,Q
3.4 2,7 147 128 Measurands IN,VEN
9 2,7 148 128 Measurands IL1,2,3,VL1,2,3,P,Q,f * * *
Generic Functions(Monitor)
10 42,43 240 128 Read Headings
10 42,43 241 128 Read attributes of all entries of a group
10 42,43 243 128 Read directory of entry
10 1,2,7,9,11,12,42,4244 128 Real attribute of entry
10 10 245 128 End of GGI
10 41,44 249 128 Write entry with confirm
10 40,41 250 128 Write entry with execute
10 40 251 128 Write entry aborted
System Functions (Control)
7 9 0 Init General Interrogation * * *
6 8 Time Syncronisation * * *
General Commands
20 20 16 Auto-recloser on/off * *
P441 P442 P444

20 20 17 Teleprotection on/off
20 20 18 Protection on/off
20 20 19 LED Reset * * *
20 20 23 Activate characteristic 1 * * *
Generic Functions
21 42 240 Read headings of all defined groups
21 42 241 Read single attribute of all entries of a group
21 42 243 Read directory of single entry
21 42 244 Read attribute of sngle entry
21 9 245 Generic General Interrogation (GGI)
10 40 248 Write entry
10 40 249 Write with confirm
10 40 250 Write with execute
10 40 251 Write entry abort
Non Standard Actual Channel for disturbance recorder in monitor direction
TYP ASDU COT ACC FUN Description GI 1 2 4
27,30,31 31 245 128 Private channel for frequency * * *
Non Standard Information numbers in monitor direction
TYP ASDU COT INF FUN Description GI 1 2 4 DDB Element Name
1 1,7,9 0 130 * * * * DDB_OUTPUT_RELAY_1
1 1,7,9 1 130 * * * * DDB_OUTPUT_RELAY_2
1 1,7,9 2 130 * * * * DDB_OUTPUT_RELAY_3
1 1,7,9 3 130 * * * * DDB_OUTPUT_RELAY_4
1 1,7,9 4 130 * * * * DDB_OUTPUT_RELAY_5
1 1,7,9 5 130 * * * * DDB_OUTPUT_RELAY_6
1 1,7,9 6 130 * * * * DDB_OUTPUT_RELAY_7
1 1,7,9 7 130 * * * * DDB_OUTPUT_RELAY_8
1 1,7,9 8 130 * * * * DDB_OUTPUT_RELAY_9
1 1,7,9 9 130 * * * * DDB_OUTPUT_RELAY_10
1 1,7,9 10 130 * * * * DDB_OUTPUT_RELAY_11
1 1,7,9 11 130 * * * * DDB_OUTPUT_RELAY_12
1 1,7,9 12 130 * * * * DDB_OUTPUT_RELAY_13
1 1,7,9 13 130 * * * * DDB_OUTPUT_RELAY_14
1 1,7,9 14 130 * * * DDB_OUTPUT_RELAY_15
1 1,7,9 15 130 * * * DDB_OUTPUT_RELAY_16
1 1,7,9 16 130 * * * DDB_OUTPUT_RELAY_17
1 1,7,9 17 130 * * * DDB_OUTPUT_RELAY_18
1 1,7,9 18 130 * * * DDB_OUTPUT_RELAY_19
1 1,7,9 19 130 * * * DDB_OUTPUT_RELAY_20
1 1,7,9 20 130 * * * DDB_OUTPUT_RELAY_21
1 1,7,9 21 130 * * DDB_OUTPUT_RELAY_22
1 1,7,9 22 130 * * DDB_OUTPUT_RELAY_23
1 1,7,9 23 130 * * DDB_OUTPUT_RELAY_24
1 1,7,9 24 130 * * DDB_OUTPUT_RELAY_25
1 1,7,9 25 130 * * DDB_OUTPUT_RELAY_26
1 1,7,9 26 130 * * DDB_OUTPUT_RELAY_27
1 1,7,9 27 130 * * DDB_OUTPUT_RELAY_28
1 1,7,9 28 130 * * DDB_OUTPUT_RELAY_29
1 1,7,9 29 130 * * DDB_OUTPUT_RELAY_30
1 1,7,9 30 130 * * DDB_OUTPUT_RELAY_31
1 1,7,9 31 130 * * DDB_OUTPUT_RELAY_32
1 1,7,9,11 27 128 Opto 1 * * * * DDB_OPTO_ISOLATOR_1
1 1,7,9,11 68 130 * * * * DDB_OPTO_ISOLATOR_5
1 1,7,9,11 72 130 * * * DDB_OPTO_ISOLATOR_9
1 1,7,9,11 80 130 * * DDB_OPTO_ISOLATOR_17
87 130 * * DDB_OPTO_ISOLATOR_24
1 1.7 96 130 * * * DDB_OUTPUT_LED_1
1 1.7 97 130 * * * DDB_OUTPUT_LED_2
1 1.7 98 130 * * * DDB_OUTPUT_LED_3
1 1.7 99 130 * * * DDB_OUTPUT_LED_4
1 1.7 100 130 * * * DDB_OUTPUT_LED_5
1 1.7 101 130 * * * DDB_OUTPUT_LED_6
1 1.7 102 130 * * * DDB_OUTPUT_LED_7
1 1.7 103 130 * * * DDB_OUTPUT_LED_8
1 1.7 104 130 * * * DDB_INP_52A_A
1 1.7 105 130 * * * DDB_INP_52B_A
1 1.7 106 130 * * * DDB_INP_52A_B
1 1.7 107 130 * * * DDB_INP_52B_B
1 1.7 108 130 * * * DDB_INP_52A_C
1 1.7 109 130 * * * DDB_INP_52B_C
1 1.7 110 130 * * * DDB_INP_SPAR
1 1.7 111 130 * * * DDB_INP_TPAR
1 1.7 112 130 * * * DDB_INP_AR_INTERNAL
P441 P442 P444

1 1.7 113 130 * * * DDB_INP_AR_CYCLE_1P
1 1.7 114 130 * * * DDB_INP_AR_CYCLE_3P
1 1.7 115 130 * * * DDB_INP_AR_CLOSING
1 1.7 116 130 * * * DDB_INP_RECLAIM
1 1.7 117 130 * * * DDB_INP_BAR
1 1.7 118 130 * * * DDB_INP_CTL_CHECK_SYNCH
1 1.7 119 130 * * * DDB_INP_CB_HEALTHY
1 1.7 120 130 * * * DDB_INP_BLK_PROTECTION
1 1.7 121 130 * * * DDB_INP_TRP_3P
1 1.7 122 130 * * * DDB_INP_CB_MAN
1 1.7 123 130 * * * DDB_INP_CB_TRIP_MAN
1 1.7 124 130 * * * DDB_INP_DISC
1 1.7 125 130 * * * DDB_INP_PROTA
1 1.7 126 130 * * * DDB_INP_PROTB
1 1.7 127 130 * * * DDB_INP_PROTC
1 1.7 128 130 * * * DDB_INP_CR
1 1.7 129 130 * * * DDB_INP_CR_DEF
1 1.7 130 130 * * * DDB_INP_COS
1 1.7 131 130 * * * DDB_INP_COS_DEF
1 1.7 132 130 * * * DDB_INP_Z1X_EXT
1 1.7 133 130 * * * DDB_INP_MCB_VTS_BUS
1 1.7 134 130 * * * DDB_INP_MCB_VTS_LINE
1 1.7 135 130 * * * DDB_INP_SBEF_TIMER_BLOCK_2
1 1.7 136 130 * * * DDB_INP_SBEF_TIMER_BLOCK_3
1 1.7 137 130 * * * DDB_INP_DEF_TIMER_BLOCK
1 1.7 138 130 * * * DDB_INP_PHOC_TIMER_BLOCK_1
1 1.7 142 130 * * * DDB_INP_NPS_TIMER_BLOCK
1 1.7 143 130 * * * DDB_INP_UNDU_TIMER_BLOCK_1
1 1.7 144 130 * * * DDB_INP_UNDU_TIMER_BLOCK_2
1 1.7 145 130 * * * DDB_INP_OVEU_TIMER_BLOCK_1
1 1.7 146 130 * * * DDB_INP_OVEU_TIMER_BLOCK_2
1 1.7 147 130 * * * DDB_INP_DISTANCE_TIMER_BLOCK
1 1.7 148 130 * * * DDB_INP_CB_RESET_LOCKOUT
1 1.7 149 130 * * * DDB_INP_CB_RESET_ALL_VALUES
1 1.7 150 130 * * * DDB_INP_RESET_RELAYS_LEDS
1 1.7 151 130 * * * DDB_INP_STUB_BUS
1 1.7 152 130 * * * DDB_INP_TRIP_A_USER
1 1.7 153 130 * * * DDB_INP_TRIP_B_USER
1 1.7 154 130 * * * DDB_INP_TRIP_C_USER
1 1.7 155 130 * * * DDB_INP_ZSP_TIMER_BLOCK
1 1,7,9 160 130 DDB_ALARM_UNUSED0
1 1,7,9 161 130 * * * * DDB_ALARM_GENERAL
1 9.11 21 128 Test mode * * * * DDB_ALARM_PROT_DISABLED
1 1,7,9 163 130 * * * * DDB_ALARM_F_OUT_OF_RANGE
1 1,7,9 38 128 VT fuse failure * * * * DDB_ALARM_VTS_SLOW
1 1,7,9 36 128 Trip circuit supervision * * * * DDB_ALARM_CTS
2 1,7,9 85 128 Breaker Failure * * * DDB_ALARM_BREAKER_FAIL
1 1,7,9 167 130 * * * * DDB_ALARM_I_BROK_MAINT
1 1,7,9 168 130 * * * * DDB_ALARM_I_BROK_LOCKOUT
1 1,7,9 169 130 * * * * DDB_ALARM_CB_OPS_MAINT
1 1,7,9 170 130 * * * * DDB_ALARM_CB_OPS_LOCKOUT
1 1,7,9 171 130 * * * * DDB_ALARM_CB_OP_TIME_MAINT
1 1,7,9 172 130 * * * * DDB_ALARM_CB_OP_TIME_LOCKOUT
1 1,7,9 173 130 * * * * DDB_ALARM_PRE_LOCKOUT
1 1,7,9 174 130 * * * * DDB_ALARM_EFF_LOCKOUT
1 1,7,9 175 130 * * * * DDB_LOCKOUT_ALARM
1 1,7,9 176 130 * * * * DDB_ALARM_CB_STATUS
1 1,7,9 177 130 * * * * DDB_ALARM_CB_FAIL_TRIP
1 1,7,9 178 130 * * * * DDB_ALARM_CB_FAIL_CLOSE
1 1,7,9 179 130 * * * * DDB_ALARM_CB_CONTROL_UNHEALTHLY
1 1,7,9 180 130 * * * * DDB_ALARM_NO_CHECK_SYNC_CONTRO
1 1,7,9 181 130 * * * * DDB_ALARM_AR_LOCKOUT_MAX_SHOTS
1 1,7,9 182 130 * * * * DDB_ALARM_SG_OPTO_INVALID
1 1,7,9 183 130 * * * * DDB_ALARM_CB_FAIL_AR
1 1,7,9 184 130 * * * * DDB_ALARM_UNDER_V_1
1 1,7,9 185 130 * * * * DDB_ALARM_UNDER_V_2
1 1,7,9 186 130 * * * * DDB_ALARM_OVER_V_1
1 1,7,9 187 130 * * * * DDB_ALARM_OVER_V_2
1 1,7,9 39 128 Teleprotection disturbed * * * * DDB_ALARM_COS
1 1,7,9 189 130 * * * * DDB_ALARM_BROKEN_COND
1 1,7,9 190 130 * * * * DDB_ALARM_CVTS
1 1,7,9 195 130 * * * * DDB_ALARM_USER1
1 1,7,9 196 130 * * * * DDB_ALARM_USER2
1 1,7,9 197 130 * * * * DDB_ALARM_USER3
1 1,7,9 198 130 * * * * DDB_ALARM_USER4
1 1,7,9 199 130 * * * * DDB_ALARM_USER5
1 1.7 128 128 CB 'on' by A/R * * * DDB_PRT_AR_CLOSE
1 1,7,9 224 130 * * * * DDB_PRT_AR_1POLE_IN_PROG
1 1,7,9 225 130 * * * * DDB_PRT_AR_3POLE_IN_PROG
226 130 DDB_PRT_AR_1ST_CYCLE_IN_PROG
227 130 DDB_PRT_AR_234TH_CYCLE_IN_PROG
1 1,7,9 228 130 * * * * DDB_PRT_AR_TRIP_3PH
1 1,7,9 229 130 * * * * DDB_PRT_AR_RECLAIM
1 1,7,9 230 130 * * * * DDB_PRT_AR_DISCRIM
1 1,7,9,11,12,20,21 16 128 Auto-recloser active * * * * DDB_PRT_AR_ENABLE
1 1,7,9 232 130 * * * * DDB_PRT_AR_1PAR_ENABLE
1 1,7,9 233 130 * * * * DDB_PRT_AR_3PAR_ENABLE
1 1,7,9 130 128 AR blocked * * * * DDB_PRT_AR_LOCKOUT
P441 P442 P444

1 1,7,9 235 130 * * * DDB_PRT_AR_FORCE_SYNC
1 1,7,9 236 130 * * * * DDB_PRT_SYNC
237 130 DDB_PRT_DEAD_LINE
238 130 DDB_PRT_LIVE_LINE
239 130 DDB_PRT_DEAD_BUS
240 130 DDB_PRT_LIVE_BUS
2 241 130 * * * * DDB_PRT_CONTROL_CLOSE_IN_PROG
2 1,7,9 76 128 Teleprotectioon signal sent * * * DDB_PRT_CARRIER_SEND
1 1,7,9 77 128 Teleprotection signal received * * * DDB_PRT_UNB_CR
2 1,7,9 74 128 Fault forward * * * DDB_PRT_DIST_FWD
2 1,7,9 75 128 Fault reverse * * * DDB_PRT_DIST_REV
2 1,7,9 69 128 Trip L1 * * * DDB_PRT_DIST_TRIP_A
2 1,7,9 70 128 Trip L2 * * * DDB_PRT_DIST_TRIP_B
2 1,7,9 71 128 Trip L3 * * * DDB_PRT_DIST_TRIP_C
2 1,7,9 64 128 Start/Pickup L1 * * * * DDB_PRT_DIST_START_A
2 1,7,9 65 128 Start/Pickup L2 * * * * DDB_PRT_DIST_START_B
2 1,7,9 66 128 Start/Pickup L3 * * * * DDB_PRT_DIST_START_C
1 1,7,9 252 130 * * * DDB_PRT_DIST_CR_ACC
1 1,7,9 253 130 * * * DDB_PRT_DIST_CR_PERM
1 1,7,9 254 130 * * * DDB_PRT_DIST_CR_BLOCK
2 1,7,9 78 128 Zone 1 * * * DDB_PRT_Z1
2 1,7,9 0 131 * * * DDB_PRT_Z1X
2 1,7,9 79 128 Zone 2 * * * DDB_PRT_Z2
2 1,7,9 80 128 Zone 3 * * * DDB_PRT_Z3
2 1,7,9 81 128 Zone 4 * * * DDB_PRT_Z4
2 1,7,9 82 128 Zone 5 * * * DDB_PRT_Zp
5 131 DDB_PRT_T1
6 131 DDB_PRT_T2
7 131 DDB_PRT_T3
8 131 DDB_PRT_T4
9 131 DDB_PRT_TZP
2 1,7,9 10 131 * * * DDB_PRT_WI_TRIP_A
2 1,7,9 11 131 * * * DDB_PRT_WI_TRIP_B
2 1,7,9 12 131 * * * DDB_PRT_WI_TRIP_C
2 1,7,9 13 131 * * * * DDB_PRT_POWER_SWING
1 1,7,9 14 131 * * * * DDB_PRT_REVERSAL_GUARD
2 1,7,9 15 131 * * * * DDB_PRT_DEF_CARRIER_SEND
1 1,7,9 16 131 * * * * DDB_PRT_UNB_CR_DEF
1 1,7,9 52 128 Earth Fault Rev * * * * DDB_PRT_DEF_REV
1 1,7,9 51 128 Earth Fault Fwd * * * * DDB_PRT_DEF_FWD
1 1,7,9 48 128 Earth Fault L1 * * * * DDB_PRT_DEF_START_AN
1 1,7,9 49 128 Earth Fault L2 * * * * DDB_PRT_DEF_START_BN
1 1,7,9 50 128 Earth Fault L3 * * * * DDB_PRT_DEF_START_CN
2 1,7,9 22 131 * * * DDB_PRT_DEF_TRIP_A
2 1,7,9 23 131 * * * DDB_PRT_DEF_TRIP_B
2 1,7,9 24 131 * * * DDB_PRT_DEF_TRIP_C
2 1,7,9 92 128 Trip IN> * * * DDB_PRT_IN_SUP_2_TRIP
2 1,7,9 93 128 Trip IN>> * * * DDB_PRT_IN_SUP_3_TRIP
2 1,7,9 67 128 Start/Pickup N * * * * DDB_PRT_IN_SUP_2_PICK_UP
2 1,7,9 28 131 * * * * DDB_PRT_IN_SUP_3_PICK_UP
1 1,7,9 29 131 * * * * DDB_PRT_UNDER_V_ANY_PICK_UP_A
1 1,7,9 30 131 * * * * DDB_PRT_UNDER_V_ANY_PICK_UP_B
1 1,7,9 31 131 * * * * DDB_PRT_UNDER_V_ANY_PICK_UP_C
2 1,7,9 32 131 * * * * DDB_PRT_UNDER_V_1_PICK_UP
2 1,7,9 33 131 * * * * DDB_PRT_UNDER_V_2_PICK_UP
2 1,7,9 34 131 * * * DDB_PRT_UNDER_V_1_TRIP
2 1,7,9 35 131 * * * DDB_PRT_UNDER_V_2_TRIP
1 1,7,9 36 131 * * * * DDB_PRT_OVER_V_ANY_PICK_UP_A
1 1,7,9 37 131 * * * * DDB_PRT_OVER_V_ANY_PICK_UP_B
1 1,7,9 38 131 * * * * DDB_PRT_OVER_V_ANY_PICK_UP_C
2 1,7,9 39 131 * * * * DDB_PRT_OVER_V_1_PICK_UP
2 1,7,9 40 131 * * * * DDB_PRT_OVER_V_2_PICK_UP
2 1,7,9 41 131 * * * DDB_PRT_OVER_V_1_TRIP
2 1,7,9 42 131 * * * DDB_PRT_OVER_V_2_TRIP
2 1,7,9 43 131 * * * * DDB_PRT_I2_SUP_PICK_UP
2 1,7,9 44 131 * * * DDB_PRT_I2_SUP_TRIP
1 1,7,9 45 131 * * * * DDB_PRT_I_SUP_ANY_PICK_UP_A
1 1,7,9 46 131 * * * * DDB_PRT_I_SUP_ANY_PICK_UP_B
1 1,7,9 47 131 * * * * DDB_PRT_I_SUP_ANY_PICK_UP_C
2 1,7,9 48 131 * * * * DDB_PRT_I_SUP_1_PICK_UP
2 1,7,9 90 128 Trip I> * * * DDB_PRT_I_SUP_1_TRIP
2 1,7,9 91 128 Trip I>> * * * DDB_PRT_I_SUP_2_TRIP
2 1,7,9 54 131 * * * DDB_PRT_I_SUP_3_TRIP
2 1,7,9 55 131 * * * DDB_PRT_I_SUP_4_TRIP
1 1,7,9 56 131 * * * * DDB_PRT_SOTF_ENABLE
1 1,7,9 57 131 * * * * DDB_PRT_I_TOR_ENABLE
2 1,7,9 58 131 * * * * DDB_PRT_TOC_START_A
2 1,7,9 59 131 * * * * DDB_PRT_TOC_START_B
2 1,7,9 60 131 * * * * DDB_PRT_TOC_START_C
2 1,7,9 84 128 General Start * * * * DDB_PRT_ANY_START
62 131 DDB_PRT_1PH
63 131 DDB_PRT_2PH
64 131 DDB_PRT_3PH
2 1,7,9 68 128 General Trip * * * DDB_PRT_ANY_TRIP
2 1,7,9 66 131 * * * DDB_PRT_ANY_INTERNAL_TRIP_A
2 1,7,9 67 131 * * * DDB_PRT_ANY_INTERNAL_TRIP_B
2 1,7,9 68 131 * * * DDB_PRT_ANY_INTERNAL_TRIP_C
2 1,7,9 69 131 * * * DDB_PRT_ANY_TRIP_A
2 1,7,9 70 131 * * * DDB_PRT_ANY_TRIP_B
2 1,7,9 71 131 * * * DDB_PRT_ANY_TRIP_C
2 1,7,9 72 131 * * * DDB_PRT_1P_TRIP
2 1,7,9 73 131 * * * DDB_PRT_3P_TRIP
P441 P442 P444

2 1,7,9 74 131 * * * DDB_PRT_BROKEN_CONDUCTOR_TRIP
2 1,7,9 75 131 * * * DDB_PRT_LOSS_OF_LOAD_TRIP
2 1,7,9 76 131 * * * DDB_PRT_SOTF_TOR_TRIP
2 1,7,9 77 131 * * * DDB_PRT_TBF1_TRIP_3PH
2 1,7,9 78 131 * * * DDB_PRT_TBF2_TRIP_3PH
79 131 DDB_PRT_CONTROL_TRIP
80 131 DDB_PRT_CONTROL_CLOSE
81 131 DDB_PRT_VTS_FAST
1 1,7,9 82 131 * * * * DDB_PRT_CB_AUX_A
1 1,7,9 83 131 * * * * DDB_PRT_CB_AUX_B
1 1,7,9 84 131 * * * * DDB_PRT_CB_AUX_C
1 1,7,9 85 131 * * * * DDB_PRT_ANY_POLE_DEAD
1 1,7,9 86 131 * * * * DDB_PRT_ALL_POLE_DEAD
87 131 DDB_PRT_DIR_AV_WIT_FILT
88 131 DDB_PRT_DIR_AM_WIT_FILT
89 131 DDB_PRT_CVMR
90 131 DDB_PRT_CROSS_COUNTRY
1 1,7,9 91 131 * * * * DDB_PRT_ZSP_START
1 1,7,9 92 131 * * * DDB_PRT_ZSP_TRIP
1 1.7 108 131 * * * DDB_OUTPUT_CON_1
1 1.7 109 131 * * * DDB_OUTPUT_CON_2
1 1.7 110 131 * * * DDB_OUTPUT_CON_3
1 1.7 111 131 * * * DDB_OUTPUT_CON_4
1 1.7 112 131 * * * DDB_OUTPUT_CON_5
1 1.7 113 131 * * * DDB_OUTPUT_CON_6
1 1.7 114 131 * * * DDB_OUTPUT_CON_7
1 1.7 115 131 * * * DDB_OUTPUT_CON_8
1 1.7 116 131 * * * DDB_OUTPUT_CON_9
1 1.7 117 131 * * * DDB_OUTPUT_CON_10
1 1.7 118 131 * * * DDB_OUTPUT_CON_11
1 1.7 119 131 * * * DDB_OUTPUT_CON_12
1 1.7 120 131 * * * DDB_OUTPUT_CON_13
1 1.7 121 131 * * * DDB_OUTPUT_CON_14
1 1.7 122 131 * * DDB_OUTPUT_CON_15
1 1.7 123 131 * * DDB_OUTPUT_CON_16
1 1.7 124 131 * * DDB_OUTPUT_CON_17
1 1.7 125 131 * * DDB_OUTPUT_CON_18
1 1.7 126 131 * * DDB_OUTPUT_CON_19
1 1.7 127 131 * * DDB_OUTPUT_CON_20
1 1.7 128 131 * * DDB_OUTPUT_CON_21
1 1.7 129 131 * DDB_OUTPUT_CON_22
1 1.7 130 131 * DDB_OUTPUT_CON_23
1 1.7 131 131 * DDB_OUTPUT_CON_24
1 1.7 132 131 * DDB_OUTPUT_CON_25
1 1.7 133 131 * DDB_OUTPUT_CON_26
1 1.7 134 131 * DDB_OUTPUT_CON_27
1 1.7 135 131 * DDB_OUTPUT_CON_28
1 1.7 136 131 * DDB_OUTPUT_CON_29
1 1.7 137 131 * DDB_OUTPUT_CON_30
1 1.7 138 131 * DDB_OUTPUT_CON_31
1 1.7 139 131 * DDB_OUTPUT_CON_32
1 1.7 172 131 DDB_LED_CON_1
1 1.7 173 131 DDB_LED_CON_2
1 1.7 174 131 DDB_LED_CON_3
1 1.7 175 131 DDB_LED_CON_4
1 1.7 176 131 DDB_LED_CON_5
1 1.7 177 131 DDB_LED_CON_6
1 1.7 178 131 DDB_LED_CON_7
1 1.7 179 131 DDB_LED_CON_8
1 1.7 180 131 DDB_TIMERIN_1
1 1.7 181 131 DDB_TIMERIN_2
1 1.7 182 131 DDB_TIMERIN_3
1 1.7 183 131 DDB_TIMERIN_4
1 1.7 184 131 DDB_TIMERIN_5
1 1.7 185 131 DDB_TIMERIN_6
1 1.7 186 131 DDB_TIMERIN_7
1 1.7 187 131 DDB_TIMERIN_8
1 1.7 188 131 DDB_TIMERIN_9
1 1.7 189 131 DDB_TIMERIN_10
1 1.7 190 131 DDB_TIMERIN_11
1 1.7 191 131 DDB_TIMERIN_12
1 1.7 192 131 DDB_TIMERIN_13
1 1.7 193 131 DDB_TIMERIN_14
1 1.7 194 131 DDB_TIMERIN_15
1 1.7 195 131 DDB_TIMERIN_16
1 1.7 196 131 DDB_TIMEROUT_1
1 1.7 197 131 DDB_TIMEROUT_2
1 1.7 198 131 DDB_TIMEROUT_3
1 1.7 199 131 DDB_TIMEROUT_4
1 1.7 200 131 DDB_TIMEROUT_5
1 1.7 201 131 DDB_TIMEROUT_6
1 1.7 202 131 DDB_TIMEROUT_7
1 1.7 203 131 DDB_TIMEROUT_8
1 1.7 204 131 DDB_TIMEROUT_9
1 1.7 205 131 DDB_TIMEROUT_10
1 1.7 206 131 DDB_TIMEROUT_11
1 1.7 207 131 DDB_TIMEROUT_12
1 1.7 208 131 DDB_TIMEROUT_13
1 1.7 209 131 DDB_TIMEROUT_14
1 1.7 210 131 DDB_TIMEROUT_15
1 1.7 211 131 DDB_TIMEROUT_16
1 1,7,9 212 131 DDB_FAULT_RECORD_TRIG
MiCOM P441, P442 & P444 Page F-1
Part F - DNP3
X Object name Event Class P444 P442 P441
H
D DDB_OUTPUT_RELAY_1 2 0 0 0
D DDB_OUTPUT_RELAY_15 2 14 14
D DDB_OUTPUT_RELAY_22 2 21
H
D DDB_OPTO_ISOLATOR_1 2 32 21 14
D DDB_OPTO_ISOLATOR_9 2 40 29
D DDB_OPTO_ISOLATOR_17 2 48
H
D DDB_ALARM_GENERAL 2 56 37 22
D DDB_ALARM_PROT_DISABLED 2 57 38 23
D DDB_ALARM_F_OUT_OF_RANGE 2 58 39 24
D DDB_ALARM_VTS_SLOW 2 59 40 25
D DDB_ALARM_CTS 2 60 41 26
D DDB_ALARM_BREAKER_FAIL 2 61 42 27
D DDB_ALARM_I_BROK_MAINT 2 62 43 28
D DDB_ALARM_I_BROK_LOCKOUT 2 63 44 29
D DDB_ALARM_CB_OPS_MAINT 2 64 45 30
D DDB_ALARM_CB_OPS_LOCKOUT 2 65 46 31
D DDB_ALARM_CB_OP_TIME_MAINT 2 66 47 32
D DDB_ALARM_CB_OP_TIME_LOCKOUT 2 67 48 33
D DDB_ALARM_PRE_LOCKOUT 2 68 49 34
Part F - DNP3
D DDB_ALARM_EFF_LOCKOUT 2 69 50 35
D DDB_LOCKOUT_ALARM 2 70 51 36
D DDB_ALARM_CB_STATUS 2 71 52 37
D DDB_ALARM_CB_FAIL_TRIP 2 72 53 38
D DDB_ALARM_CB_FAIL_CLOSE 2 73 54 39
D DDB_ALARM_CB_CONTROL_UNHEALTHLY 2 74 55 40
D DDB_ALARM_NO_CHECK_SYNC_CONTROL 2 75 56 41
D DDB_ALARM_AR_LOCKOUT_MAX_SHOTS 2 76 57 42
D DDB_ALARM_SG_OPTO_INVALID 2 77 58 43
D DDB_ALARM_CB_FAIL_AR 2 78 59 44
D DDB_ALARM_UNDER_V_1 2 79 60 45
D DDB_ALARM_UNDER_V_2 2 80 61 46
D DDB_ALARM_OVER_V_1 2 81 62 47
D DDB_ALARM_OVER_V_2 2 82 63 48
D DDB_ALARM_COS 2 83 64 49
D DDB_ALARM_BROKEN_COND 2 84 65 50
D DDB_ALARM_CVTS 2 85 66 51
D DDB_ALARM_USER1 2 86 67 52
H
D DATABASE 2 90 71 56
D DATABASE 2 91 72 57
H
D DDB_INP_52A_A 3 92 73 58
D DDB_INP_52B_A 3 93 74 59
D DDB_INP_52A_B 3 94 75 60
D DDB_INP_52B_B 3 95 76 61
D DDB_INP_52A_C 3 96 77 62
D DDB_INP_52B_C 3 97 78 63
D DDB_INP_SPAR 3 98 79 64
D DDB_INP_TPAR 3 99 80 65
D DDB_INP_AR_INTERNAL 3 100 81 66
D DDB_INP_AR_CYCLE_1P 3 101 82 67
D DDB_INP_AR_CYCLE_3P 3 102 83 68
D DDB_INP_AR_CLOSING 3 103 84 69
D DDB_INP_RECLAIM 3 104 85 70
D DDB_INP_BAR 3 105 86 71
D DDB_INP_CTL_CHECK_SYNCH 3 106 87 72
D DDB_INP_CB_HEALTHY 3 107 88 73
D DDB_INP_BLK_PROTECTION 3 108 89 74
D DDB_INP_TRP_3P 3 109 90 75
D DDB_INP_CB_MAN 3 110 91 76
D DDB_INP_CB_TRIP_MAN 3 111 92 77
D DDB_INP_DISC 3 112 93 78
D DDB_INP_PROTA 3 113 94 79
D DDB_INP_PROTB 3 114 95 80
D DDB_INP_PROTC 3 115 96 81
D DDB_INP_CR 3 116 97 82
D DDB_INP_CR_DEF 3 117 98 83
D DDB_INP_COS 3 118 99 84
D DDB_INP_COS_DEF 3 119 100 85
D DDB_INP_Z1X_EXT 3 120 101 86
D DDB_INP_MCB_VTS_BUS 3 121 102 87
D DDB_INP_MCB_VTS_LINE 3 122 103 88
D DDB_INP_SBEF_TIMER_BLOCK_2 3 123 104 89
D DDB_INP_SBEF_TIMER_BLOCK_3 3 124 105 90
D DDB_INP_DEF_TIMER_BLOCK 3 125 106 91
D DDB_INP_PHOC_TIMER_BLOCK_1 3 126 107 92
D DDB_INP_NPS_TIMER_BLOCK 3 130 111 96
D DDB_INP_UNDU_TIMER_BLOCK_1 3 131 112 97
D DDB_INP_UNDU_TIMER_BLOCK_2 3 132 113 98
D DDB_INP_OVEU_TIMER_BLOCK_1 3 133 114 99
D DDB_INP_OVEU_TIMER_BLOCK_2 3 134 115 100
D DDB_INP_DISTANCE_TIMER_BLOCK 3 135 116 101
D DDB_INP_CB_RESET_LOCKOUT 3 136 117 102
D DDB_INP_CB_RESET_ALL_VALUES 3 137 118 103
D DDB_INP_RESET_RELAYS_LEDS 3 138 119 104
Part F - DNP3
D DDB_INP_STUB_BUS 3 139 120 105
D DDB_INP_TRIP_A_USER 3 140 121 106
D DDB_INP_TRIP_B_USER 3 141 122 107
D DDB_INP_TRIP_C_USER 3 142 123 108
D DDB_INP_ZSP_TIMER_BLOCK 3 143 124 109
D DDB_PRT_AR_CLOSE 3 144 125 110
D DDB_PRT_AR_1POLE_IN_PROG 3 145 126 111
D DDB_PRT_AR_3POLE_IN_PROG 3 146 127 112
D DDB_PRT_AR_1ST_CYCLE_IN_PROG 3 147 128 113
D DDB_PRT_AR_234TH_CYCLE_IN_PROG 3 148 129 114
D DDB_PRT_AR_TRIP_3PH 3 149 130 115
D DDB_PRT_AR_RECLAIM 3 150 131 116
D DDB_PRT_AR_DISCRIM 3 151 132 117
D DDB_PRT_AR_ENABLE 3 152 133 118
D DDB_PRT_AR_1PAR_ENABLE 3 153 134 119
D DDB_PRT_AR_3PAR_ENABLE 3 154 135 120
D DDB_PRT_AR_LOCKOUT 3 155 136 121
D DDB_PRT_AR_FORCE_SYNC 3 156 137 122
D DDB_PRT_SYNC 3 157 138 123
D DDB_PRT_DEAD_LINE 3 158 139 124
D DDB_PRT_LIVE_LINE 3 159 140 125
D DDB_PRT_DEAD_BUS 3 160 141 126
D DDB_PRT_LIVE_BUS 3 161 142 127
D DDB_PRT_CONTROL_CLOSE_IN_PROG 3 162 143 128
D DDB_PRT_CARRIER_SEND 3 163 144 129
D DDB_PRT_UNB_CR 3 164 145 130
D DDB_PRT_DIST_FWD 3 165 146 131
D DDB_PRT_DIST_REV 3 166 147 132
D DDB_PRT_DIST_TRIP_A 3 167 148 133
D DDB_PRT_DIST_TRIP_B 3 168 149 134
D DDB_PRT_DIST_TRIP_C 3 169 150 135
D DDB_PRT_DIST_START_A 3 170 151 136
D DDB_PRT_DIST_START_B 3 171 152 137
D DDB_PRT_DIST_START_C 3 172 153 138
D DDB_PRT_DIST_CR_ACC 3 173 154 139
D DDB_PRT_DIST_CR_PERM 3 174 155 140
D DDB_PRT_DIST_CR_BLOCK 3 175 156 141
D DDB_PRT_Z1 3 176 157 142
D DDB_PRT_Z1X 3 177 158 143
D DDB_PRT_Z2 3 178 159 144
D DDB_PRT_Z3 3 179 160 145
D DDB_PRT_Z4 3 180 161 146
D DDB_PRT_Zp 3 181 162 147
D DDB_PRT_T1 3 182 163 148
D DDB_PRT_T2 3 183 164 149
D DDB_PRT_T3 3 184 165 150
D DDB_PRT_T4 3 185 166 151
D DDB_PRT_TZP 3 186 167 152
D DDB_PRT_WI_TRIP_A 3 187 168 153
D DDB_PRT_WI_TRIP_B 3 188 169 154
D DDB_PRT_WI_TRIP_C 3 189 170 155
D DDB_PRT_POWER_SWING 3 190 171 156
D DDB_PRT_REVERSAL_GUARD 3 191 172 157
D DDB_PRT_DEF_CARRIER_SEND 3 192 173 158
D DDB_PRT_UNB_CR_DEF 3 193 174 159
D DDB_PRT_DEF_REV 3 194 175 160
D DDB_PRT_DEF_FWD 3 195 176 161
D DDB_PRT_DEF_START_AN 3 196 177 162
D DDB_PRT_DEF_START_BN 3 197 178 163
D DDB_PRT_DEF_START_CN 3 198 179 164
D DDB_PRT_DEF_TRIP_A 3 199 180 165
D DDB_PRT_DEF_TRIP_B 3 200 181 166
D DDB_PRT_DEF_TRIP_C 3 201 182 167
D DDB_PRT_IN_SUP_2_TRIP 3 202 183 168
D DDB_PRT_IN_SUP_3_TRIP 3 203 184 169
D DDB_PRT_IN_SUP_2_PICK_UP 3 204 185 170
D DDB_PRT_IN_SUP_3_PICK_UP 3 205 186 171
D DDB_PRT_UNDER_V_ANY_PICK_UP_A 3 206 187 172
D DDB_PRT_UNDER_V_ANY_PICK_UP_B 3 207 188 173
D DDB_PRT_UNDER_V_ANY_PICK_UP_C 3 208 189 174
D DDB_PRT_UNDER_V_1_PICK_UP 3 209 190 175
D DDB_PRT_UNDER_V_2_PICK_UP 3 210 191 176
Part F - DNP3
D DDB_PRT_UNDER_V_1_TRIP 3 211 192 177
D DDB_PRT_UNDER_V_2_TRIP 3 212 193 178
D DDB_PRT_OVER_V_ANY_PICK_UP_A 3 213 194 179
D DDB_PRT_OVER_V_ANY_PICK_UP_B 3 214 195 180
D DDB_PRT_OVER_V_ANY_PICK_UP_C 3 215 196 181
D DDB_PRT_OVER_V_1_PICK_UP 3 216 197 182
D DDB_PRT_OVER_V_2_PICK_UP 3 217 198 183
D DDB_PRT_OVER_V_1_TRIP 3 218 199 184
D DDB_PRT_OVER_V_2_TRIP 3 219 200 185
D DDB_PRT_I2_SUP_PICK_UP 3 220 201 186
D DDB_PRT_I2_SUP_TRIP 3 221 202 187
D DDB_PRT_I_SUP_ANY_PICK_UP_A 3 222 203 188
D DDB_PRT_I_SUP_ANY_PICK_UP_B 3 223 204 189
D DDB_PRT_I_SUP_ANY_PICK_UP_C 3 224 205 190
D DDB_PRT_I_SUP_1_PICK_UP 3 225 206 191
D DDB_PRT_I_SUP_1_TRIP 3 229 210 195
D DDB_PRT_SOTF_ENABLE 3 233 214 199
D DDB_PRT_I_TOR_ENABLE 3 234 215 200
D DDB_PRT_TOC_START_A 3 235 216 201
D DDB_PRT_TOC_START_B 3 236 217 202
D DDB_PRT_TOC_START_C 3 237 218 203
D DDB_PRT_ANY_START 3 238 219 204
D DDB_PRT_1PH 3 239 220 205
D DDB_PRT_2PH 3 240 221 206
D DDB_PRT_3PH 3 241 222 207
D DDB_PRT_ANY_TRIP 3 242 223 208
D DDB_PRT_ANY_INTERNAL_TRIP_A 3 243 224 209
D DDB_PRT_ANY_INTERNAL_TRIP_B 3 244 225 210
D DDB_PRT_ANY_INTERNAL_TRIP_C 3 245 226 211
D DDB_PRT_ANY_TRIP_A 3 246 227 212
D DDB_PRT_ANY_TRIP_B 3 247 228 213
D DDB_PRT_ANY_TRIP_C 3 248 229 214
D DDB_PRT_1P_TRIP 3 249 230 215
D DDB_PRT_3P_TRIP 3 250 231 216
D DDB_PRT_BROKEN_CONDUCTOR_TRIP 3 251 232 217
D DDB_PRT_LOSS_OF_LOAD_TRIP 3 252 233 218
D DDB_PRT_SOTF_TOR_TRIP 3 253 234 219
D DDB_PRT_TBF1_TRIP_3PH 3 254 235 220
D DDB_PRT_TBF2_TRIP_3PH 3 255 236 221
D DDB_PRT_CONTROL_TRIP 3 256 237 222
D DDB_PRT_CONTROL_CLOSE 3 257 238 223
D DDB_PRT_VTS_FAST 3 258 239 224
D DDB_PRT_CB_AUX_A 3 259 240 225
D DDB_PRT_CB_AUX_B 3 260 241 226
D DDB_PRT_CB_AUX_C 3 261 242 227
D DDB_PRT_ANY_POLE_DEAD 3 262 243 228
D DDB_PRT_ALL_POLE_DEAD 3 263 244 229
D DDB_PRT_DIR_AV_WIT_FILT 3 264 245 230
D DDB_PRT_DIR_AM_WIT_FILT 3 265 246 231
D DDB_PRT_CVMR 3 266 247 232
D DDB_PRT_CROSS_COUNTRY 3 267 248 233
D DDB_PRT_ZSP_START 3 268 249 234
E DDB_PRT_ZSP_TRIP 3 269 250 235
Part F - DNP3
M 1
X Distance relay DNP3.0 Object type 10 definition
X Point reference Database Supports
X P444 Object name Col Row Latch Pulse
H Activate setting groups
D 0 Activate setting group 1 0xFF 0x01 Y Y
H Controls
D 4 CB Trip 0xFF 0x10 Y Y
D 5 CB Close 0xFF 0x11 Y Y
D 6 Reset Indication 0x01 0xFF Y Y
D 7 Reset Demand 0x03 0x25 Y Y
D 8 Reset CB Data 0x06 0x08 Y Y
D 9 Reset Total A/R 0x06 0x0B Y Y
D 10 Clear Events 0x0B 0x01 Y Y
D 11 Clear Faults 0x0B 0x02 Y Y
D 12 Clear Maint 0x0B 0x03 Y Y
D 13 Contact Test 0x0F 0x11 Y Y
D 14 Test LEDs 0x0F 0x12 Y Y
D 15 Autoreclose Test - 3 Phase 0xFF 0x12 Y Y
D 16 Autoreclose Test - Phase A 0xFF 0x13 Y Y
D 17 Autoreclose Test - Phase B 0xFF 0x14 Y Y
D 18 Autoreclose Test - Phase C 0xFF 0x15 Y Y
E 19 Lockout Reset 0x10 0x11 Y Y
M 1
X Distance relay DNP3.0 Object type 20 definition
X Point reference Counter
X P444 Object name Col Row Running Frozen
D 0 CB A Operations 0x06 0x01 Y Y
D 1 CB B Operations 0x06 0x02 Y Y
D 2 CB C Operations 0x06 0x03 Y Y
D 3 Total 1P Reclosures 0x06 0x09 Y Y
E 4 Total 3P Reclosures 0x06 0x0A Y Y
Part F - DNP3
M1
X Distancerelay DNP3.0 Object type 30 definition
X Point reference Database
X P444 Object name Col Row Event Class Type Deadband Scaling Units
H Active group
D 0 Active group 0x00 0x0E 1 D9 1 x1 [None]
H Measurements 1
D 1 IA Magnitude 0x02 0x01 2 D1 0.1 x In / 500 A
D 2 IA Phase Angle 0x02 0x02 2 D4 1 x 0,01 deg
D 3 IB Magnitude 0x02 0x03 2 D1 0.1 x In / 500 A
D 4 IB Phase Angle 0x02 0x04 2 D4 1 x 0,01 deg
D 5 IC Magnitude 0x02 0x05 2 D1 0.1 x In / 500 A
D 6 IC Phase Angle 0x02 0x06 2 D4 1 x 0,01 deg
D 7 IN Derived Mag 0x02 0x09 2 D1 0.1 x In / 500 A
D 8 IN Derived Angle 0x02 0x0A 2 D4 1 x 0,01 deg
D 9 I1 Magnitude 0x02 0x0D 2 D1 0.1 x In / 500 A
D 10 I2 Magnitude 0x02 0x0E 2 D1 0.1 x In / 500 A
D 11 I0 Magnitude 0x02 0x0F 2 D1 0.1 x In / 500 A
D 12 VAB Magnitude 0x02 0x14 2 D3 5 x Vn /(110 x 100) V
D 13 VAB Phase Angle 0x02 0x15 2 D4 1 x 0,01 deg
D 14 VBC Magnitude 0x02 0x16 2 D3 5 x Vn /(110 x 100) V
D 15 VBC Phase Angle 0x02 0x17 2 D4 1 x 0,01 deg
D 16 VCA Magnitude 0x02 0x18 2 D3 5 x Vn /(110 x 100) V
D 17 VCA Phase Angle 0x02 0x19 2 D4 1 x 0,01 deg
D 18 VAN Magnitude 0x02 0x1A 2 D3 5 x Vn /(110 x 100) V
D 19 VAN Phase Angle 0x02 0x1B 2 D4 1 x 0,01 deg
D 20 VBN Magnitude 0x02 0x1C 2 D3 5 x Vn /(110 x 100) V
D 21 VBN Phase Angle 0x02 0x1D 2 D4 1 x 0,01 deg
D 22 VCN Magnitude 0x02 0x1E 2 D3 5 x Vn /(110 x 100) V
D 23 VCN Phase Angle 0x02 0x1F 2 D4 1 x 0,01 deg
D 24 VN Derived Mag 0x02 0x22 2 D3 5 x Vn /(110 x 100) V
D 25 VN Derived Ang 0x02 0x23 2 D4 1 x 0,01 deg
D 26 V1 Magnitude 0x02 0x24 2 D3 5 x Vn /(110 x 100) V
D 29 Frequency 0x02 0x2A 2 D5 0.5 x 0,01 Hz
D 30 C/S Voltage Mag 0x02 0x2B 2 D3 5 x Vn /(110 x 100) V
D 31 C/S Voltage Ang 0x02 0x2C 2 D4 1 x 0,01 deg
D 32 IM Magnitude 0x02 0x2F 2 D1 0.1 x In / 500 A
D 33 IM Angle 0x02 0x30 2 D4 1 x 0,01 deg
D 34 A Phase Watts 0x03 0x01 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 35 B Phase Watts 0x03 0x02 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 36 C Phase Watts 0x03 0x03 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 37 A Phase VArs 0x03 0x04 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 38 B Phase VArs 0x03 0x05 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 39 C Phase VArs 0x03 0x06 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 40 A Phase VA 0x03 0x07 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 41 B Phase VA 0x03 0x08 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 42 C Phase VA 0x03 0x09 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 43 3 Phase Watts 0x03 0x0A 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 44 3 Phase VArs 0x03 0x0B 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 45 3 Phase VA 0x03 0x0C 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 46 Zero Seq Power 0x03 0x0D 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 47 3Ph Power Factor 0x03 0x0E 2 D8 0.1 x 0,001 [None]
D 48 APh Power Factor 0x03 0x0F 2 D8 0.1 x 0,001 [None]
D 49 BPh Power Factor 0x03 0x10 2 D8 0.1 x 0,001 [None]
D 50 CPh Power Factor 0x03 0x11 2 D8 0.1 x 0,001 [None]
D 51 3Ph W Fix Demand 0x03 0x16 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 52 3Ph VArs Fix Dem 0x03 0x17 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 53 3Ph W Peak Demand 0x03 0x20 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
D 54 3Ph VArs Peak Demand 0x03 0x21 2 D6 1 0,1 x In .Vn / 110 W/Var/VA
E 55 Slip Frequency 0x02 0x31 2 D5 0.5 x 0,01 Hz
Configuration / Mapping
abcd P44x/EN GC/E33
Part F: DNP3
Data Type Description Scaling Units Deadband

D1 Phase, RMS and sequence currents x In / 500 A 0.10
D2 Sensitive neutral currents x In / 10,000 A 0.01
D3 Voltages x Vn /(110 x 100) V 5.00
D4 Angles x 0,01 deg 1.00
D5 Frequency x 0,01 Hz 0.50
D6 Power 0,1 x In .Vn / 110 W/Var/VA 1.00
D7 Percentage x 100 % 10.00
D8 Power Factor x 0,001 [None] 0.10
D9 Setting Group x1 [None] 1.00
D10 Energy x In .Vn / 110 Wh/Varh/Vah N/A
D11 Admittance (I Earth Fault) x (In / 1000).(110 / Vn) S 0.10
D12 Admittance (I Sensitive) x (In / 10000).(110 / Vn) S 0.01
D13 Time x 0.01 min 5.00
D14 Temperature x 0.1 C 1.0
MiCOM P441, P442 & P444 Page G-1
Part G - Maintenance Records
MAINTENANCE TYPE
Fault type Test type Comments
0 Initialisation "fast W'Dog Error"
1 Initialisation "Battery Failure"
2 Initialisation "BBRAM Failure"
3 Initialisation "Field Volt Fail"
4 Initialisation "Bus Reset Error"
5 Initialisation "Slow W'Dog Error"
6 Permanent "SRAM Failure Bus"
7 Permanent "SRAM Failure Blk"
8 Permanent "FLASH Failure"
9 Permanent "Code Verify Fail"
10 Permanent "BBRAM Failure"
11 Permanent "Battery Failure"
12 Permanent "Field Volt Fail"
13 Permanent "EEPROM Failure"
14 Permanent "Software Failure"
15 Permanent "Hard Verify Fail"
16 Permanent "Non Standard"
MAINTENANCE DATA
Column
A 2 first digits of LCD 0x For hexadecimal number
B Software type 0 Plateform error
B Software type 8 Application error
C Software task or module N
D Element in the task or module NN
E 4 digits to print internal data NNNN
G R = stop + reboot D = definitive stop M = Msg maint
H Type of maintenance message
0x 8 1 01 NNNN Superv :ALLOC_MEM_PILE_T_CAL R "Software Failure"

0x 8 1 02 NNNN Superv :CREATION_T_CAL R "Software Failure"
0x 8 1 03 NNNN Superv :ALLOC_MEM_PILE_T_SUP R "Software Failure"
0x 8 1 04 NNNN Superv :CREATION_T_SUP R "Software Failure"
0x 8 1 05 NNNN Superv :ALLOC_MEM_PILE_T_CPU R "Software Failure"
0x 8 1 06 NNNN Superv :CREATION_T_CPU R "Software Failure"
0x 8 1 07 NNNN Superv :ALLOC_MEM_PILE_T_EVT R "Software Failure"
0x 8 1 08 NNNN Superv :CREATION_T_EVT R "Software Failure"
0x 8 1 09 NNNN Superv :ALLOC_MEM_HISR R "Software Failure"
0x 8 1 0A NNNN Superv :CREATION_HISR R "Software Failure"
0x 8 1 0B NNNN Superv :CREATION_LISR R "Software Failure"
0x 8 1 0C NNNN Superv :ALLOC_MEM_Q_CAL R "Software Failure"
0x 8 1 0D NNNN Superv :CREATION_Q_CAL R "Software Failure"
0x 8 1 0E NNNN Superv :ALLOC_MEM_Q_SUP R "Software Failure"
0x 8 1 00 NNNN Superv :CREATION_Q_SUP R "Software Failure"
0x 8 1 10 NNNN Superv :CREATION_SYSTEM_POOL R "Software Failure"
0x 8 1 11 NNNN Superv :CREATION_PLATFORM_POOL R "Software Failure"
0x 8 1 12 NNNN Superv :CREATION_APPLI_POOL R "Software Failure"
0x 8 1 13 NNNN Superv :CREATION_SEM_BBRAM_LOG R "Software Failure"
0x 8 1 14 NNNN Superv :CREATION_SEM_BBRAM_IBROKEN R "Software Failure"
0x 8 1 15 NNNN Superv :CREATION_PERTURBO R "Software Failure"
0x 8 1 16 NNNN Superv :ENV_MSG_CONFIG_PERTURBO R "Software Failure"
0x 8 1 17 NNNN Superv :START_COPROCE R "Software Failure"
0x 8 1 18 0001 Superv :MODEL_NUMBER : Nombre d'optos faux R "Software Failure"
0x 8 1 18 0002 Superv :MODEL_NUMBER : pb lecture E2PROM série R "Software Failure"
0x 8 1 18 0003 Superv :MODEL_NUMBER : Checksum E2PROM série erroné R "Software Failure"
0x 8 1 18 0004 Superv :MODEL_NUMBER : Pb E2PROM série, sur la 1ere voie check err R "Software Failure"
0x 8 1 18 0005 Superv :MODEL_NUMBER : Pb E2PROM série, sur les voies tensions R "Software Failure"
0x 8 1 18 0006 Superv :MODEL_NUMBER : Pb E2PROM série, sur les voies tensions R "Software Failure"
0x 8 1 18 0007 Superv :MODEL_NUMBER : Pb E2PROM série, sur la 2ème voie check erR "Software Failure"
0x 8 1 18 0008 Superv :MODEL_NUMBER : Pb E2PROM série, sur les voies courants R "Software Failure"
0x 8 1 18 0009 Superv :MODEL_NUMBER : Pb E2PROM série, sur les voies courants R "Software Failure"
0x 8 1 18 000A Superv :MODEL_NUMBER : Pb E2PROM série, sur la 3ème voie check erR "Software Failure"
0x 8 1 18 000B Superv :MODEL_NUMBER : problème détection d'une carte opto(bon nomR "Software Failure"
0x 8 1 18 0070 Superv :MODEL_NUMBER : colonne N°7 pb : erreur de communication R "Software Failure"
0x 8 1 18 0090 Superv :MODEL_NUMBER : colonne N°9 pb : erreur de comminication R "Software Failure"
0x 8 1 18 0100 Superv :MODEL_NUMBER : colonne N°10 pb R "Software Failure"
0x 8 1 18 0110 Superv :MODEL_NUMBER : colonne N°11 pb : 4ème langue erronnée R "Software Failure"
0x 8 1 18 0150 Superv :MODEL_NUMBER : Colonne N°15; pb type de carte optos R "Software Failure"
0x 8 1 18 0740 Superv :MODEL_NUMBER : Colonne N°7 et N°4; pb type de carte irigb R "Software Failure"
0x 8 2 01 NNNN Coproce board :RSP_TRANSCODE R "Software Failure"
0x 8 2 02 0001 Coproce board : ECHANGE M "Non Standard"
0x 8 2 02 0010 Coproce board : ECHANGE R "Software Failure"
0x 8 2 03 NNNN Coproce board :TRANSFER R "Software Failure"
0x 8 3 01 NNNN Logic : TASK_LOG_1 R "Software Failure"

0x 8 3 07 cccN Logic : TASK_LOG_7 R "Software Failure"
0x 8 3 0A NNNN Logic : TASK_LOG_12 R "Software Failure"
0x 8 3 0B NNNN Logic : LOG_TEMPORISATION_1 R "Software Failure"
0x 8 3 0C NNNN Logic : LOG_TEMPORISATION_2 R "Software Failure"
0x 8 3 0D NNNN Logic : LOG_TEMPORISATION_3 R "Software Failure"
0x 8 3 0E NNNN Logic : STORE R "Software Failure"
0x 8 4 01 NNNN Logic : RECEPT_MSG R "Software Failure"
0x 8 4 02 NNNN Logic : UNKNOWN_MSG R "Software Failure"
0x 8 4 03 NNNN Logic : ENV_MSG_SETTING_CS R "Software Failure"
0x 8 4 04 NNNN Logic : ENV_MSG_SETTING R "Software Failure"
0x 8 4 05 NNNN Logic : ENV_MSG_CMDE_FROM_MVP R "Software Failure"
0x 8 4 06 NNNN Logic : ENV_MSG_ERROR R "Software Failure"
0x 8 4 07 NNNN Logic : SID_MSG_CMDE R "Software Failure"
0x 8 4 08 NNNN Logic : SID_MSG_SETTING R "Software Failure"
0x 8 4 09 NNNN Logic : FONCTION_TRCODE_INCONNUE R "Software Failure"
0x 8 4 0A NNNN Logic : WRITE_TRCODE_INCONNUE R "Software Failure"
0x 8 4 0B NNNN Logic : READ_TRCODE_INCONNUE R "Software Failure"
0x 8 4 0C NNNN Logic : UIMF_CMDE_INCONNUE R "Software Failure"
0x 8 4 0D NNNN Logic : CURMF_CMDE_INCONNUE R "Software Failure"
0x 8 4 0E NNNN Logic : MODMF_CMDE_INCONNUE R "Software Failure"
0x 8 4 0F NNNN Logic : GROUPE_INVALIDE R "Software Failure"
0x 8 4 10 NNNN Logic : GROUPE_ETD_INVALIDE R "Software Failure"
0x 8 4 11 NNNN Logic : ECHEANCE_TIMER_BBRAM R "Software Failure"
0x 8 4 12 NNNN Logic : PHASE_CT_SECONDARY M "Non Standard"
0x 8 4 13 NNNN Logic : SEF_CT_SECONDARY R "Software Failure"
0x 8 4 14 NNNN Logic : MAIN_VT_SECONDARY M "Non Standard"
0x 8 4 15 NNNN Logic : RCPT_MSG_LOGIQUE R "Software Failure"
0x 8 4 16 NNNN Logic : TRANSCODE R "Software Failure"
0x 8 5 01 NNNN Disturbance : RECEPT_MSG_PERT R "Software Failure"
0x 0 1 01 NNNN Database manager: P_SEMAPHORE_ERR R "Software Failure"
0x 0 1 02 NNNN Database manager: L_SEMAPHORE_ERR R "Software Failure"
0x 0 1 02 NNNN Database manager: O_SEMAPHORE_ERR R "Software Failure"
0x 0 1 04 NNNN Database manager: COMMIT R "Software Failure"
0x 0 1 05 NNNN Database manager: ABORT R "Software Failure"
0x 0 1 06 NNNN Database manager: E2P_FAILURE R "Software Failure"
0x 0 1 07 NNNN Database manager: PG_DEFAULTED R "Software Failure"
0x 0 1 08 NNNN Database manager: PSL_DATETIME R "Software Failure"
0x 0 1 09 NNNN Database manager: REGISTER_NOTIFIER R "Software Failure"
0x 0 2 01 NNNN Logging: CREATE_ALARM_SEMAPHORE R "Software Failure"
0x 0 2 02 NNNN Logging: CREATE_EVENT_SEMAPHORE R "Software Failure"
0x 0 2 03 NNNN Logging: CREATE_FAULT_SEMAPHORE R "Software Failure"
0x 0 2 04 NNNN Logging: CREATE_MAINT_SEMAPHORE R "Software Failure"
0x 0 2 05 NNNN Logging: ALARM_EVENT_ID R "Software Failure"
0x 0 2 06 NNNN Logging: ALARM_NO_RANGE R "Software Failure"
0x 0 2 07 NNNN Logging: EVENT_NO_RANGE R "Software Failure"
0x 0 2 08 NNNN Logging: FAULT_NO_RANGE R "Software Failure"
0x 0 2 09 NNNN Logging: MAINT_NO_RANGE R "Software Failure"
0x 0 2 0A NNNN Logging: OBTAIN_SEMAPHORE R "Software Failure"
0x 0 2 0B NNNN Logging: ALLOCATE_MEMORY R "Software Failure"
0x 0 2 0C NNNN Logging: SEND_MESSAGE R "Software Failure"
0x 0 2 0D NNNN Logging: ALARM_GROUP_NO_RANGE R "Software Failure"
0x 0 3 01 NNNN Default access: BAD_CS_SIZE R "Software Failure"
0x 0 3 02 NNNN Default access: BAD_CS_READ R "Software Failure"
0x 0 3 03 NNNN Default access: BAD_DR_SIZE R "Software Failure"
0x 0 3 04 NNNN Default access: BAD_DR_READ R "Software Failure"
0x 0 3 05 NNNN Default access: BAD_PG_SIZE R "Software Failure"
0x 0 3 06 NNNN Default access: BAD_PG_READ R "Software Failure"
0x 0 3 07 NNNN Default access: BAD_CSDATA_READ R "Software Failure"
0x 0 3 08 NNNN Default access: BAD_DRDATA_READ R "Software Failure"
0x 0 3 09 NNNN Default access: BAD_PGDATA_READ R "Software Failure"
0x 0 3 0A NNNN Default access: BAD_PSLC_SIZE R "Software Failure"
0x 0 3 0B NNNN Default access: BAD_PSLC_READ R "Software Failure"
0x 0 3 0C NNNN Default access: BAD_PSLF_SIZE R "Software Failure"
0x 0 3 0D NNNN Default access: BAD_PSLF_READ R "Software Failure"
0x 0 4 01 NNNN Text access: HIT_DEFAULT R "Software Failure"
0x 0 5 00 NNNN Co-processor R "Software Failure"
0x 0 6 01 NNNN User interface: CREATE_TASK R "Software Failure"
0x 0 6 02 NNNN User interface: CREATE_QUEUE R "Software Failure"
0x 0 6 03 NNNN User interface: CREATE_TIMER R "Software Failure"
0x 0 6 04 NNNN User interface: GET_QUEUE_MEMORY R "Software Failure"
0x 0 6 05 NNNN User interface: GET_TASKDATA_MEMORY R "Software Failure"
0x 0 6 06 NNNN User interface: KEYPAD_INIT R "Software Failure"
0x 0 6 07 NNNN User interface: CREATE_SEMAPHORE R "Software Failure"
0x 0 6 08 NNNN User interface: RESUME_TASK R "Software Failure"
0x 0 6 09 NNNN User interface: OBTAIN_SEMAPHORE R "Software Failure"
0x 0 6 0A NNNN User interface: RELEASE_SEMAPHORE R "Software Failure"
0x 0 6 0B NNNN User interface: SEND_TIMER_MESSAGE R "Software Failure"
0x 0 6 0C NNNN User interface: CONTROL_TIMER R "Software Failure"
0x 0 6 0D NNNN User interface: RECEIVE_FROM_QUEUE R "Software Failure"
0x 0 6 0E NNNN User interface: UNEXPECTED_MSG R "Software Failure"

0x 0 6 0F NNNN User interface: GET_TASKSTACK_MEMORY R "Software Failure"
0x 0 6 10 NNNN User interface: KEYPAD_START R "Software Failure"
0x 0 6 11 NNNN User interface: GET_CELL_INFO R "Software Failure"
0x 0 6 12 NNNN User interface: COMMIT_UNLOCK R "Software Failure"
0x 0 6 13 NNNN User interface: ABORT_UNLOCK R "Software Failure"
0x 0 6 14 NNNN User interface: INVALID_EVENT_TYPE R "Software Failure"
0x 0 6 15 NNNN User interface: INVALID_DATA_TYPE R "Software Failure"
0x 0 6 16 NNNN User interface: INVALID_CELL_STATUS R "Software Failure"
0x 0 6 17 NNNN User interface: SEND_RESET_MESSAGE R "Software Failure"
0x 0 6 18 NNNN User interface: KEYPAD_STOP R "Software Failure"
0x 0 6 19 NNNN User interface: INVALID_PW_LEVEL R "Software Failure"
0x 0 6 1A NNNN User interface: BAD_IP_CONVERSION R "Software Failure"
0x 0 6 1B NNNN User interface: INVALID_IP_FIELD R "Software Failure"
0x 0 6 1C NNNN User interface: INVALID_OSI_FIELD R "Software Failure"
0x 0 6 1D NNNN User interface: BAD_OSI_CONVERSION R "Software Failure"
0x 0 6 1E NNNN User interface: BAD_MONTH R "Software Failure"
0x 0 7 01 NNNN Courier communication: CREATE_TASK R "Software Failure"
0x 0 7 02 NNNN Courier communication: OBTAIN_MEMORY R "Software Failure"
0x 0 7 03 NNNN Courier communication: CREATE_TIMER R "Software Failure"
0x 0 7 04 NNNN Courier communication: SEND_FRAME R "Software Failure"
0x 0 7 05 NNNN Courier communication: RECEIVE_FRAME R "Software Failure"
0x 0 7 06 NNNN Courier communication: INTIALISE_DRIVER R "Software Failure"
0x 0 7 07 NNNN Courier communication: CREATE_SEMAPHORE R "Software Failure"
0x 0 7 08 NNNN Courier communication: RESUME_TASK R "Software Failure"
0x 0 7 09 NNNN Courier communication: OBTAIN_SEMAPHORE R "Software Failure"
0x 0 7 0A NNNN Courier communication: RELEASE_SEMAPHORE R "Software Failure"
0x 0 7 0B NNNN Courier communication: DELETE_SEMAPHORE R "Software Failure"
0x 0 7 0C NNNN Courier communication: READ_DRIVER_FRAME R "Software Failure"
0x 0 7 0D NNNN Courier communication: SEND_DRIVER_FRAME R "Software Failure"
0x 0 7 0E NNNN Courier communication: ALARM_CALL R "Software Failure"
0x 0 7 0F NNNN Courier communication: CANCEL_ALARM_CALL R "Software Failure"
0x 0 7 10 NNNN Courier communication: DISABLE_TIMER R "Software Failure"
0x 0 7 11 NNNN Courier communication: ENABLE_TIMER R "Software Failure"
0x 0 7 12 NNNN Courier communication: BUFFER_NOT_FREE R "Software Failure"
0x 0 7 13 NNNN Courier communication: CREATE_UNLOCK_TASK R "Software Failure"
0x 0 7 14 NNNN Courier communication: CREATE_QUEUE R "Software Failure"
0x 0 7 15 NNNN Courier communication: RECEIVE_FROM_QUEUE R "Software Failure"
0x 0 7 16 NNNN Courier communication: DEFAULT_CASE R "Software Failure"
0x 0 7 17 NNNN Courier communication: SYSSERV_FAILURE R "Software Failure"
0x 0 8 01 NNNN K-bus: APP_CREATE_TASK R "Software Failure"
0x 0 8 02 NNNN K-bus: APP_CREATE_TIMER R "Software Failure"
0x 0 8 03 NNNN K-bus: APP_CREATE_SEMAPHORE R "Software Failure"
0x 0 8 04 NNNN K-bus: APP_CREATE_QUEUE R "Software Failure"
0x 0 8 05 NNNN K-bus: APP_ALLOC_MEMORY R "Software Failure"
0x 0 8 06 NNNN K-bus: APP_OBTAIN_SEMAPHORE R "Software Failure"
0x 0 8 07 NNNN K-bus: APP_RELEASE_SEMAPHORE R "Software Failure"
0x 0 8 08 NNNN K-bus: APP_RESUME_TASK R "Software Failure"
0x 0 8 09 NNNN K-bus: APP_RECEIVE_FROM_QUEUE R "Software Failure"
0x 0 8 0A NNNN K-bus: APP_SEND_TO_QUEUE R "Software Failure"
0x 0 8 0B NNNN K-bus: APP_DEFAULT_CASE R "Software Failure"
0x 0 8 0C NNNN K-bus: APP_ALARM_CALL_START R "Software Failure"
0x 0 8 0D NNNN K-bus: APP_ALARM_CALL_STOP R "Software Failure"
0x 0 8 0E NNNN K-bus: TX_CREATE_TASK R "Software Failure"
0x 0 8 0F NNNN K-bus: TX_CREATE_QUEUE R "Software Failure"
0x 0 8 10 NNNN K-bus: TX_ALLOC_MEMORY R "Software Failure"
0x 0 8 11 NNNN K-bus: TX_RESUME_TASK R "Software Failure"
0x 0 8 12 NNNN K-bus: TX_RECEIVE_FROM_QUEUE R "Software Failure"
0x 0 8 13 NNNN K-bus: TX_SEND_TO_QUEUE R "Software Failure"
0x 0 8 14 NNNN K-bus: TX_DEFAULT_CASE R "Software Failure"
0x 0 8 15 NNNN K-bus: TX_INIT_DRIVER R "Software Failure"
0x 0 8 16 NNNN K-bus: TX_START_DRIVER R "Software Failure"
0x 0 8 17 NNNN K-bus: RX_CREATE_TASK R "Software Failure"
0x 0 8 18 NNNN K-bus: RX_ALLOC_MEMORY R "Software Failure"
0x 0 8 19 NNNN K-bus: RX_RESUME_TASK R "Software Failure"
0x 0 8 1A NNNN K-bus: DRV_STOP_DRIVER R "Software Failure"
0x 0 8 1B NNNN K-bus: DRV_ADDRESS_CHANGE R "Software Failure"
0x 0 8 1C NNNN K-bus: DRV_START_DRIVER R "Software Failure"
0x 0 8 1D NNNN K-bus: DRV_READ_FRAME R "Software Failure"
0x 0 8 1E NNNN K-bus: KBUS_ALARM_CALL_TIMER R "Software Failure"
0x 0 8 1F NNNN K-bus: KBUS_CANCEL_ALARM_CALL R "Software Failure"
0x 0 8 20 NNNN K-bus: KBUS_BUFFER_NOT_FREE R "Software Failure"
0x 0 8 21 NNNN K-bus: KBUS_START_RESTART_TIMER R "Software Failure"
0x 0 8 22 NNNN K-bus: KBUS_SYSSERV_FAILURE R "Software Failure"
0x 0 9 01 NNNN Courier database: UNKNOWN_INSTANCE R "Software Failure"
0x 0 9 02 NNNN Courier database: COURIER_PARAMETERGROUP R "Software Failure"
0x 0 9 03 NNNN Courier database: COURIER_DECODE_INT32 R "Software Failure"
0x 0 9 04 NNNN Courier database: COURIER_DECODE_ASCII R "Software Failure"
0x 0 9 05 NNNN Courier database: DATABASE_LOCK_STOLEN R "Software Failure"
0x 0 9 06 NNNN Courier database: COURIER_DECODE_PASSWORD R "Software Failure"
0x 0 9 07 NNNN Courier database: COURIER_DECODE_INT16 R "Software Failure"
0x 0 9 08 NNNN Courier database: SYSSERV_FAILURE R "Software Failure"
0x 0 9 09 NNNN Courier database: BF03_STATE R "Software Failure"
0x 0 9 0A NNNN Courier database: SAVECELL_STATE R "Software Failure"
0x 0 9 0B NNNN Courier database: COURIER_DECODE_FLOAT R "Software Failure"
0x 0 9 0C NNNN Courier database: COURIER_DECODE_INDEX R "Software Failure"
0x 0 9 0D NNNN Courier database: COURIER_DECODE_DATE_TIME R "Software Failure"
0x 0 9 0E NNNN Courier database: COURIER_DECODE_RESTOREDEFAULTS R "Software Failure"

0x 0 9 0F NNNN Courier database: UNKNOWN_DATA_TYPE R "Software Failure"
0x 0 9 10 NNNN Courier database: UNKNOWN_EVENTID R "Software Failure"
0x 0 9 20 NNNN Courier database: UNKNOWN_PG_GROUP R "Software Failure"
0x 0 9 30 NNNN Courier database: BAD_STRING_INDEX R "Software Failure"
0x 0 9 40 NNNN Courier database: DEFAULTED_SWITCH R "Software Failure"
0x 0 9 50 NNNN Courier database: NO_SEA_INI_DRIV_PHASE1 R "Software Failure"
0x 0 9 60 NNNN Courier database: BAD_CELL_REFERENCE R "Software Failure"
0x 0 9 70 NNNN Courier database: GOOSE_CONFIG_NOTIFY R "Software Failure"
0x 0 9 80 NNNN Courier database: BAD_ETHNET_STATUS_GET_TEXT_CALL R "Software Failure"
0x 0 A 01 NNNN Modbus communication: CREATE_TASK R "Software Failure"
0x 0 A 02 NNNN Modbus communication: CREATE_QUEUE R "Software Failure"
0x 0 A 03 NNNN Modbus communication: GET_QUEUE_MEMORY R "Software Failure"
0x 0 A 04 NNNN Modbus communication: GET_TASKDATA_MEMORY R "Software Failure"
0x 0 A 05 NNNN Modbus communication: CREATE_SEMAPHORE R "Software Failure"
0x 0 A 06 NNNN Modbus communication: RESUME_TASK R "Software Failure"
0x 0 A 07 NNNN Modbus communication: OBTAIN_SEMAPHORE R "Software Failure"
0x 0 A 08 NNNN Modbus communication: RELEASE_SEMAPHORE R "Software Failure"
0x 0 A 09 NNNN Modbus communication: CREATE_TIMER R "Software Failure"
0x 0 A 0A NNNN Modbus communication: CONTROL_TIMER R "Software Failure"
0x 0 A 0B NNNN Modbus communication: GET_STACK_MEMORY R "Software Failure"
0x 0 A 0C NNNN Modbus communication: INIT_DRIVER R "Software Failure"
0x 0 A 0D NNNN Modbus communication: SCM_SEND_FRAME R "Software Failure"
0x 0 A 0E NNNN Modbus communication: SCM_RECEIVE_FRAME R "Software Failure"
0x 0 A 0F NNNN Modbus communication: GETINSTANCE_MEMORY R "Software Failure"
0x 0 A 10 NNNN Modbus communication: GETFRAME_MEMORY R "Software Failure"
0x 0 A 11 NNNN Modbus communication: UNLOCK_DATABASE R "Software Failure"
0x 0 A 12 NNNN Modbus communication: SEND_NOTIFY_MESSAGE R "Software Failure"
0x 0 A 13 NNNN Modbus communication: INVALID_BAUDRATE R "Software Failure"
0x 0 A 14 NNNN Modbus communication: INVALID_PARITY R "Software Failure"
0x 0 A 15 NNNN Modbus communication: INVALID_MESSAGE_ID R "Software Failure"
0x 0 A 16 NNNN Modbus communication: INVALID_MESSAGE_SID R "Software Failure"
0x 0 A 17 NNNN Modbus communication: LDA_COMMIT_FAILED R "Software Failure"
0x 0 A 18 NNNN Modbus communication: LDA_RESTORE_FAILED R "Software Failure"
0x 0 A 19 NNNN Modbus communication: RECEIVE_FROM_QUEUE R "Software Failure"
0x 0 B 01 NNNN VDEW communication: APP_CREATE_TASK R "Software Failure"
0x 0 B 02 NNNN VDEW communication: APP_CREATE_TIMER R "Software Failure"
0x 0 B 03 NNNN VDEW communication: APP_CREATE_SEMAPHORE R "Software Failure"
0x 0 B 04 NNNN VDEW communication: APP_CREATE_QUEUE R "Software Failure"
0x 0 B 05 NNNN VDEW communication: APP_ALLOC_MEMORY R "Software Failure"
0x 0 B 06 NNNN VDEW communication: APP_RESUME_TASK R "Software Failure"
0x 0 B 07 NNNN VDEW communication: APP_START_SEMAPHORE R "Software Failure"
0x 0 B 08 NNNN VDEW communication: APP_RECEIVE_FROM_QUEUE R "Software Failure"
0x 0 B 09 NNNN VDEW communication: APP_SEND_TO_QUEUE R "Software Failure"
0x 0 B 0A NNNN VDEW communication: APP_BAD_MSG R "Software Failure"
0x 0 B 0B NNNN VDEW communication: APP_DEFAULT_CASE R "Software Failure"
0x 0 B 0C NNNN VDEW communication: APP_CONTROL_TIMER R "Software Failure"
0x 0 B 0D NNNN VDEW communication: APP_RESET_TIMER R "Software Failure"
0x 0 B 0E NNNN VDEW communication: LNK_CREATE_TASK R "Software Failure"
0x 0 B 0F NNNN VDEW communication: LNK_CREATE_QUEUE R "Software Failure"
0x 0 B 10 NNNN VDEW communication: LNK_ALLOC_MEMORY R "Software Failure"
0x 0 B 11 NNNN VDEW communication: LNK_RESUME_TASK R "Software Failure"
0x 0 B 12 NNNN VDEW communication: LNK_RECEIVE_FROM_QUEUE R "Software Failure"
0x 0 B 13 NNNN VDEW communication: LNK_SEND_TO_QUEUE R "Software Failure"
0x 0 B 14 NNNN VDEW communication: LNK_INFO_OF_QUEUE R "Software Failure"
0x 0 B 15 NNNN VDEW communication: LNK_RESET_QUEUE R "Software Failure"
0x 0 B 16 NNNN VDEW communication: LNK_BAD_MSG R "Software Failure"
0x 0 B 17 NNNN VDEW communication: LNK_DEFAULT_CASE R "Software Failure"
0x 0 B 18 NNNN VDEW communication: LNK_DRV_INIT R "Software Failure"
0x 0 B 19 NNNN VDEW communication: LNK_DRV_SETTING_CHANGE R "Software Failure"
0x 0 B 1A NNNN VDEW communication: LNK_DRV_START_STOP R "Software Failure"
0x 0 B 1B NNNN VDEW communication: LNK_DRV_RX R "Software Failure"
0x 0 B 1C NNNN VDEW communication: LNK_DRV_TX R "Software Failure"
0x 0 B 1D NNNN VDEW communication: SYS_SERV R "Software Failure"
0x 0 B 1E NNNN VDEW communication: OBTAIN_SEMAPHORE R "Software Failure"
0x 0 B 1F NNNN VDEW communication: RELEASE_SEMAPHORE R "Software Failure"
0x 0 B 20 NNNN VDEW communication: BAD_SETTING R "Software Failure"
0x 0 B 21 NNNN VDEW communication: BAD_ADDRESS R "Software Failure"
0x 0 B 22 NNNN VDEW communication: ASDU_SOURCE R "Software Failure"
0x 0 B 23 NNNN VDEW communication: STACK_SOURCE R "Software Failure"
0x 0 B 24 NNNN VDEW communication: SUP_SOURCE R "Software Failure"
0x 0 B 25 NNNN VDEW communication: DIST_SOURCE R "Software Failure"
0x 0 C 01 NNNN Initialisation & monitoring: SERIAL_FAIL D NO MAINT
0x 0 C 02 NNNN Initialisation & monitoring: FLASH_FAIL D NO MAINT
0x 0 C 03 NNNN Initialisation & monitoring: CREATE_SWDT_FAIL R "Software Failure"
0x 0 C 04 NNNN Initialisation & monitoring: MEM_ALLOC D NO MAINT
0x 0 C 05 NNNN Initialisation & monitoring: QUEUE_CREATE D NO MAINT
0x 0 C 06 NNNN Initialisation & monitoring: TASK_CREATE D NO MAINT
0x 0 C 07 NNNN Initialisation & monitoring: DATEANDTIME_FAIL D NO MAINT
0x 0 C 08 NNNN Initialisation & monitoring: LOGGINGAPI_FAIL D NO MAINT
0x 0 C 09 NNNN Initialisation & monitoring: AUTOINITDATA_FAIL D NO MAINT
0x 0 C 0A NNNN Initialisation & monitoring: RESTOREDEFAULTDATA_FAIL D NO MAINT
0x 0 C 0B NNNN Initialisation & monitoring: BADACTIVEGROUP_FAIL D NO MAINT
0x 0 C 0C NNNN Initialisation & monitoring: RESTOREACTIVEGROUP_FAIL D NO MAINT
0x 0 C 0E NNNN Initialisation & monitoring: RELAY_FAIL D NO MAINT
0x 0 C 0F NNNN Initialisation & monitoring: CREATE_FWDT_FAIL D NO MAINT
0x 0 C 10 NNNN Initialisation & monitoring: FWD_TIMEOUT R "Software Failure"
0x 0 C 10 0001 Problème Non Configuration de la carte COPROCE R "Software Failure"

0x 0 C 10 0002 Problème Non Configuration de la tâche LOGIQUE R "Software Failure"
0x 0 C 10 0003 Problème Non Configuration de la carte COPROCE et la tâche Logique R "Software Failure"
0x 0 C 11 NNNN Initialisation & monitoring: PERM_TEST_FAIL D NO MAINT
0x 0 C 12 NNNN Initialisation & monitoring: CREATE_LKUP_FAIL D NO MAINT
0x 0 C 13 NNNN Initialisation & monitoring: STOP_LKUP_FAIL D NO MAINT
0x 0 C 14 0001 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_SERIAL_INIT
0x 0 C 14 0002 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_LCD_INIT
0x 0 C 14 0003 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_FLASH_INIT
0x 0 C 14 0004 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_DATE_AND_TIME_INIT
0x 0 C 14 0006 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_REL_INIT
0x 0 C 14 0007 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_LOGS_INIT
0x 0 C 14 0008 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_DATABASE_INIT
0x 0 C 14 0009 Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_DATABASE_COMMIT
0x 0 C 14 000A Initialisation & monitoring: LKUP_FAIL D NO MAINT PLERR_IRIGB_ENABLE
0x 0 C 15 NNNN Initialisation & monitoring: XINITIALISE_FAIL D NO MAINT
0x 0 C 16 10 Initialisation & monitoring: CONT_TEST_FAIL R "SRAM Failure Bus" RAM BUS
0x 0 C 16 11 Initialisation & monitoring: CONT_TEST_FAIL R "SRAM Failure Blk" RAM BLK
0x 0 C 16 12 Initialisation & monitoring: CONT_TEST_FAIL R "FLASH Failure" FLASH CKS
0x 0 C 16 13 Initialisation & monitoring: CONT_TEST_FAIL R "Code Verify Fail" CODE COMPAR
0x 0 C 16 14 Initialisation & monitoring: CONT_TEST_FAIL R "BBRAM Failure" BATTERY SRAM
0x 0 C 16 15 Initialisation & monitoring: CONT_TEST_FAIL R "EEPROM Failure" EEPROM CKS
0x 0 C 16 BN Initialisation & monitoring: CONT_TEST_FAIL R "Software Failure" RELAY N = N° carte
0x 0 C 17 16 Initialisation & monitoring: SEC_TEST_FAIL D "fast W'Dog Error" FAST WATCH DOG NON EXP
0x 0 C 17 17 Initialisation & monitoring: SEC_TEST_FAIL D "BBRAM Failure" BATTERY SRAM
0x 0 C 17 18 Initialisation & monitoring: SEC_TEST_FAIL D "Bus Reset Error" BUS RESET
0x 0 C 17 19 Initialisation & monitoring: SEC_TEST_FAIL D "Slow W'Dog Error" SLOW WATCH DOG
0x 0 C 17 1A Initialisation & monitoring: SEC_TEST_FAIL D "fast W'Dog Error" FAST WATCH DOG EXP
0x 0 C 18 NNNN Initialisation & monitoring: FIXVT_FAIL D NO MAINT
0x 0 D 01 NNNN Method support: INVALID_PARAM_GROUP R "Software Failure"
0x 0 D 02 NNNN Method support: INVALID_COURIER_INST R "Software Failure"
0x 0 D 03 NNNN Method support: INVALID_DEP_TYPE R "Software Failure"
0x 0 D 04 NNNN Method support: INVALID_GRP_GV R "Software Failure"
0x 0 D 05 NNNN Method support: INVALID_GRP_NOTIFY R "Software Failure"
0x 0 D 06 NNNN Method support: INVALID_OPTO_GROUP R "Software Failure"
0x 0 D 07 NNNN Method support: INVALID_RELAY_GROUP R "Software Failure"
0x 0 D 08 NNNN Method support: DEFAULTED_SWITCH R "Software Failure"
0x 0 E 01 NNNN Prog. scheme logic: INVALID_SIZE_FL R "Software Failure"
0x 0 E 02 NNNN Prog. scheme logic: INVALID_SIZE_PSL R "Software Failure"
0x 0 E 03 NNNN Prog. scheme logic: INVALID_BYTE R "Software Failure"
0x 0 E 04 NNNN Prog. scheme logic: INVALID_DECTUPLE R "Software Failure"
0x 0 E 05 NNNN Prog. scheme logic: INVALID_COND_SETTINGS R "Software Failure"
0x 0 E 06 NNNN Prog. scheme logic: TIMERS_DEFAULT R "Software Failure"
0x 0 E 07 NNNN Prog. scheme logic: NO_RESPONSE_FN R "Software Failure"
0x 0 E 08 NNNN Prog. scheme logic: FAIL_EXECUTION R "Software Failure"
0x 0 F 01 NNNN User interface method: GET_DATA_MEMORY R "Software Failure"
0x 0 F 02 NNNN User interface method: INVALID_GET_LIMITS_CALL R "Software Failure"
0x 0 F 03 NNNN User interface method: INVALID_GET_VALUE_CALL R "Software Failure"
0x 0 F 04 NNNN User interface method: INVALID_GET_DISPLAY_CALL R "Software Failure"
0x 0 F 05 NNNN User interface method: INVALID_GET_TEXT_CALL R "Software Failure"
0x 0 F 06 NNNN User interface method: INVALID_SET_VALUE_CALL R "Software Failure"
0x 0 F 07 NNNN User interface method: INVALID_GET_STRING_CALL R "Software Failure"
0x 0 F 08 NNNN User interface method: INVALID_EVENT_TYPE R "Software Failure"
0x 0 F 09 NNNN User interface method: INVALID_GET_DATA_TYPE_CALL R "Software Failure"
0x 0 F 0A NNNN User interface method: IRIG_B_CONFIG_FAILED R "Software Failure"
0x 0 F 0B NNNN User interface method: ENCODE_BUFFER_OVERFLOW R "Software Failure"
0x 0 F 0E NNNN User interface method: GET_EVENT_FAILED R "Software Failure"
0x 0 F 00 NNNN User interface method: LIMITS_CHECK_FAILED R "Software Failure"
0x 0 F 10 NNNN User interface method: DEFAULTS_RESTORE_FAILED R "Software Failure"
0x 0 F 11 NNNN User interface method: GROUP_COPY_FAILED R "Software Failure"
0x 0 F 12 NNNN User interface method: INVALID_CELL_LOCK_CALL R "Software Failure"
0x 0 F 13 NNNN User interface method: INVALID_CELL_UNLOCK_CALL R "Software Failure"
0x 0 F 14 NNNN User interface method: INVALID_CELL_REFERENCE R "Software Failure"
0x 0 F 15 NNNN User interface method: INVALID_RELAY_GROUP R "Software Failure"
0x 0 F 16 NNNN User interface method: INVALID_OPTO_GROUP R "Software Failure"
0x 1 0 01 NNNN Platform utilities: BAD_INTERFACE R "Software Failure"
0x 1 1 01 NNNN Modbus database: INVALID_CELL_ACCESS R "Software Failure"
0x 1 1 02 NNNN Modbus database: UNLOCK_REG_UNRESOLVED R "Software Failure"
0x 1 1 03 NNNN Modbus database: UNLOCK_REG_MISMATCH R "Software Failure"
0x 1 1 04 NNNN Modbus database: READ_REG_UNRESOLVED R "Software Failure"
0x 1 1 05 NNNN Modbus database: READ_REG_MISMATCH R "Software Failure"
0x 1 1 06 NNNN Modbus database: WRITE_REG_UNRESOLVED R "Software Failure"
0x 1 1 07 NNNN Modbus database: WRITE_REG_MISMATCH R "Software Failure"
0x 1 1 08 NNNN Modbus database: T_ACCESS_NONE_CALLED R "Software Failure"
0x 1 2 01 NNNN Modbus method: GET_DATA_MEMORY R "Software Failure"
0x 1 2 02 NNNN Modbus method: INTEGER_WRONG_SIZE R "Software Failure"
0x 1 2 03 NNNN Modbus method: DEFAULTS_RESTORE_FAILED R "Software Failure"
0x 1 2 04 NNNN Modbus method: GROUP_COPY_FAILED R "Software Failure"
0x 1 2 05 NNNN Modbus method: SET_VALUE_NONE_CALLED R "Software Failure"
0x 1 2 06 NNNN Modbus method: INVALID_REGISTER_SPACE R "Software Failure"
MiCOM P441/P442 & P444
DEFAULT PROGRAMMABLE
SCHEME LOGIC (PSL)
MiCOM P441/P442 & P444

MiCOM P441/P442 & P444 Page 1/4
Input-Opto Couplers
DIST. Chan Recv

DDB #128
Opto Label 01
DDB #064
DEF. Chan Recv
DDB #129
DIST. COS
DDB #130
Opto Label 02
DDB #065
DEF. COS
DDB #131
Opto Label 03 MCB/VTS Line

DDB #066 DDB #134
Opto Label 04 BAR

DDB #067 DDB #117
Opto Label 05 CB Healthy

DDB #068 DDB #119
Opto Label 06 Man. Close CB

DDB #069 DDB #122
Opto Label 07 Reset Lockout

DDB #070 DDB #148
SPAR Enable
DDB #110
Opto Label 08
DDB #071
TPAR Enable
DDB #111
Files:p441uk09.psl, p442uk09.psl and p444uk09.psl

P44x/EN GC/E33 Configuration Mapping
Page 2/4 MiCOM P441/P442 & P444
Output Contact
Z1 0
DDB #255 Relay Label 01
Straight DDB #000 Trip Z1
0
DIST Trip A
DDB #246
DIST Trip B
DDB #247
DIST Trip C
DDB #248
DIST UNB CR
DDB #243
Z1
DDB #255
Z1X
DDB #256
0
Z2 Distance
DDB #257 Straight Relay Label 10
DDB #009
0 Aided Trip
Zp
DDB #260
Z3
DDB #258
Z4
DDB #259
LED
Z1
DDB #255 Latching LED 5 Z1 +
DDB #100
Aided Trip
Z1X
DDB #256
0
Any Trip A
DDB #001 Trip A
0
0
Any Trip B
DDB #002 Trip B
0
0
Any Trip C
DDB #003 Trip C
0
DIST Sig. Send 0

DDB #242
Straight Relay Label 05 Signal Send
DDB #004
DEF Sig. Send 0 (Dist. + DEF)
DDB #271

MiCOM P441/P442 & P444 Page 3/4
Output Contact
0
Any Start
DDB #005 General Start
0
LED
Any Start
DDB #317 Latching LED 4
DDB #099 General Start
20
Any Start
DDB #317 Dwell
0
Any Trip
Fault_REC_TRIG
DDB #468 Starting
DDB #321
Fault Recorder
0
Any Trip
DDB #006 General Trip
0
0
General Alarm
DDB #007 General Alarm
0
IN>1 Trip
DDB #281
IN>2 Trip
DDB #282
0
DEF Trip A
Straight Relay Label 09 Trip
DDB #278 DDB #008
DEF Trip B
0 DEF + SBEF
DDB #279
DEFTrip C
DDB #280
0
A/R Lockout
DDB #010 A/R lockout
0
A/R 1P In Prog
DDB #224 0
Straight Relay Label 12 A/R
DDB #011
A/R 3P In Prog
DDB #225
0 in Progress
0
A/R Close Relay Label 13
DDB #223 Straight DDB #012 A/R Close
0
0
Power Swing
DDB #013
Power Swing
0

P44x/EN GC/E33 Configuration Mapping
Page 4/4 MiCOM P441/P442 & P444
Leds Front Panel
Any Trip A LED 1

DDB #325 Latching DDB #096 Trip A
Any Trip B Latching LED 2

DDB #326 DDB #097 Trip B
Any Trip C Latching LED 3

DDB #327 DDB #098 Trip C
DIST Fwd Latching LED 6

DDB #244 DDB #101 Forward
DIST Rev Latching LED 7

DDB #245 DDB #102 Reverse
A/R Enable Non - LED 8

DDB #231
Latching DDB #103 A/R Enable

MiCOM P441/P442 & P444
MENU CONTENT TABLES

(Note 1: * Group 1 is shown on the menu map, Groups 2, 3 and 4 are identical to Group 1
and therefore omitted)
MiCOM P441/P442 & P444 Page 1/6
Description Plant Reference 0.000 V 0.000 0.000 W 16:26:14

MiCOM

ALSTOM A 50.00Hz 0.000 Var 18 Mar 2004

SYSTEM DATA
VIEW RECORDS MEASUREMENTS 1 MEASUREMENTS 2 CB CONDITION CB CONTROL DATE and TIME CONFIGURATION

CT AND VT RATIOS
Idem for Group 2, 3 and 4
RECORD CONTROL
DISTURB RECORDER
OUTPUT LABELS
MEASURE'T SETUP
GROUP 1
INPUT LABELS
COMMUNICATIONS
GROUP 1
AUTORECLOSE COMMISSION
GROUP 1 TESTS
SYSTEM CHECK CB MONITOR

GROUP 1 SETUP
1
SUPERVISION CB FAIL & I> NEG SEQUENCE O/C BACK-UP I> DISTANCE SCHEMES DISTANCE UNIVERSAL
POWER-SWING
GROUP 1 GROUP 1 GROUP 1 GROUP 1 GROUP 1 GROUP 1 INPUTS
GROUP 1
MiCOM P441/P442 & P444 Page 2/6
SYSTEM DATA VIEW RECORDS MEASUREMENTS 1 MEASUREMENTS 2 CB CONDITION CB CONTROL DATE and TIME CONFIGURATION
Language Select Event IA Magnitude VAN Magnitude A Phase Watts CB A Operations CB Control by Date Restore Defaults Aided D.E.F
English [0…256] 0 0A 0V 0W 0 Enable 18 Mar 2004 No Operation Enabled
Password Menu Cell Ref IA Phase Angle VAN Phase Angle B Phase Watts CB B Operations Close Pulse Time Time Setting Group Volt Protection
o o
XXXX (From Record) 0 0 0W 0 0.5 ms 16:25:53 Select via Menu Disabled
(1)
Description Time & Date IB Magnitude VBN Magnitude C Phase Watts CB C Operations Trip Pulse Time IRIG-B Sync Active Settings CB Fail & I<
MiCOM (From Record) 0A 0V 0W 0 0.5 ms Disabled Group 1 Enabled
(1)
Plant Reference Event Text IB Phase Angle VBN Phase Angle A Phase VArs Total IA Broken Man Close Delay IRIG-B Status Save Changes Supervision
o
ALSTOM 0 0o 0 Var 0A 10 s 0 No Operation Enabled
(1)
Model Number Event Value IC Magnitude VCN Magnitude B Phase VArs Total IB Broken Healthy Window Battery Status Copy From System Checks
P442311B1A0090C 0A 0V 0 Var 0A 5s Healthy Group 1 Disabled
(1)
Serial Number Select Fault IC Phase Angle VCN Phase Angle C Phase VArs Total IC Broken C/S Window Battery Alarm Copy to Internal A/R
o o
123456A [0…4] 0 0 0 0 Var 0A 5s Enabled No Operation Disabled
Frequency Active Group IN Derived Mag VN Derived Mag A Phase VA CB Operate Time A/R Single Pole Setting Group 1 Input Labels
50 0 0A 0V 0 VA 0s Disabled Enabled Visible
Comms Level Select Maintenance IN Derived Angle VN Derived Ang B Phase VA Reset CB Data A/R Three Pole Setting Group 2 Output Labels
o o
2 [0…0] 0 0 0 0 VA No Disabled Disabled Visible
Relay Address Reset Indication I1 Magnitude V1 Magnitude C Phase VA Total 1P Reclose Setting Group 3 CT & VT Ratios
255 No 0A 0V 0 VA 0 Disabled Visible
Plant Status Relay O/P Status1 I2 Magnitude V2 Magnitude 3 Phase Watts Total 3P Reclose Setting Group 4 Record Control
0000000000000000 0A 0V 0W 0 Disabled Invisible
Control Status Alarm Status 1 I0 Magnitude V0 Magnitude 3 Phase VArs Reset Total A/R Dist. Protection Disturb Recorder
0000000000000000 0A 0V 0 Var No Enabled Invisible
Active Group Alarm Status 2 VAB Magnitude Frequency 3 Phase VA Power-Swing Measure't Setup
1 0V 0 0 VA Enabled Invisible
(1)
CB Trip/Close Alarm Status 3 VAB Phase Angle C/S Voltage Mag Zero Seq Power 3Ph W Fix Demand Back-Up I> Comms Settings
o
No Operation 0000000000000000 0 0V 0 0 Wh Disabled Visible
Software Ref. 1 Access Level VBC Magnitude C/S Voltage Ang 3Ph Power Factor 3Ph VArs Fix Dem Neg Sequence O/C Commission Tests
o
B1.2 2 0V 0 0 0 Varh Disabled Invisible
Opto I/P Status Password Control VBC Phase Angle IM Magnitude APh Power Factor 3Ph W Peak Demand Broken Conductor Setting Values
o
0001100100001000 2 0 0A 0 0 Wh Disabled Secondary
Relay O/P Status Password Level 1 VCA Magnitude IM Angle BPh Power Factor 3Ph VArs Peak Demand Earth Fault O/C
o
0000000000000000 **** 0V 0 0 0 Varh Disabled
Alarm Status 1 Password Level 2 VCA Phase Angle Slip Frequency CPh Power Factor Reset Demand
o
0000000000000000 **** 0 0 0 Wh No
(1) CB control must be enable to display the cells above
MiCOM P441/P442 & P444 Page 3/6
COMMISSION
CT AND VT RATIOS RECORD CONTROL DISTURB RECORDER MEASURE'T SETUP COMMUNICATIONS
TESTS
(2)
Main VT Primary Clear Events Duration Default Display Rear Protocol ETHERNET COMMS NSAP Address IED View Select Opto I/P Status
110.0 V No 1.500 s Description Courier 0 0x00000000h 0 0001011001000011
Main VT Sec'y Clear Faults Trigger Position Local Values Remote Address IP Address Transport Select IED Recvd Msgs Relay O/P Status
110.0 V No 33.30 % Secondary 255 000.000.000.000 00.00.00.00 0 0001011001000011
C/S VT Primary Clear Maint Trigger Mode Remote Values Remote Address Subnet Mask Session Select IED Last Seq/Msg Rx Test Port Status
110.0 V No Single Primary 1 000.000.000.000 00.00 0 0001011001000011
C/S VT Secondary Alarm Event Analog Channel 1 Measurement Ref Remote Address Number of Routes Present. Select IED Missed Msgs LED Status
110.0 V Enabled VA VA 1 0 00.00 0 0001011001000011
Phase CT Primary Relay O/P Event Analog Channel 2 Measurement Mode Remote Address Router Address 1 AP Title IED Missed Chngs Monitor Bit 1
1A Enabled VB 0 1 000.000.000.000 000.000.000.000 0 Relay Label 01
Phase CT Sec'y Opto Input Event Analog Channel 3 Demand Interval Inactivity Timer Target Network 1 AE Qual. Used IED Timeouts
1A Enabled VC 30.00 mins 15.00 mins 000.000.000.000 Not Used 0
Mcomp CT Primary Central Event Analog Channel 4 Distance Unit Baud Rate AE Qualifier IED Stats Reset Monitor Bit 8
1A Enabled VN Kilometres 19200 bits/s 0 Our IED Relay Label 08
Mcomp CT Sec'y Fault Rec Event Analog Channel 5 Fault Location Baud Rate Target Network 4 Ethernet Media Loopback Mode Test Mode
1A Enabled IA Distance 19200 bits/s 000.000.000.000 Copper No Action Disabled
C/S Input Maint Rec Event Analog Channel 6 Baud Rate Inactivity Timer GOOSE STATISTICS Reload Mode Test Pattern 1
A-N Enabled IB 19200 bits/s 15 No Action 0
Main VT Location Protection Event Analog Channel 7 Parity Default Pass Lvl Enrolled Flags RP2 Protocol Test Pattern 2
Line Enabled IC None 2 0x00000000h Courier 0
DDB element 31 - 0 Analog Channel 8 Parity GOOSE Min Cycle Our Tx Msg Cnt. RP2 Card Status Contact Test
1111111111111111 IN None 10 0 0 No Operation
DDB element 63 - 32 Digital Input 1 Measure't Period GOOSE Min Cycle Our Rx Msg Cnt. RP2 Port Config Test LEDs
1111111111111111 Relay Label 01 10 0 0 EIA232 (RS232) No Operation
Input 1 Trigger Physical Link GOOSE Increment Our DDB Changes RP2 Comms Mode Autoreclose Test
No Trigger RS485 900 0 IEC60870 FT1.2 No Operation
DDB element 1022 - 992 Time Sync GOOSE Startup Our Last Seq Tx RP2 Address
1111111111111111 Disabled Broadcast 0 255
Digital Input 32 CS103 Blocking GOOSE VIP Status Our Last Msg Tx RP2 InactivTimer
Not Used Disabled 000.000.000.000 0 15
Input 32 Trigger RP2 Baud Rate

Not Used (2) Ethernet Communication not yet available 19200 bits/s
MiCOM P441/P442 & P444 Page 4/6
(7) (7) (7)

DISTANCE 1 BROKEN
CB MONITOR UNIVERSAL DISTANCE BACK-UP I> NEG SEQUENCE O/C
SCHEMES POWER-SWING CONDUCTOR
SETUP INPUTS GROUP 1 GROUP 1 GROUP 1
GROUP 1 GROUP 1 GROUP1
Broken I^ Global threshold Line Setting R2G tZp Program Mode Delta R I>1 Function I2> Status Broken Conductor
2 24-27V Group 1 20 Ω 0.400 s Standard Scheme 5Ω DT Enabled Enabled
I^ Maintenance Opto Input 1 Line Length R2Ph Serial Comp Line Standard Mode Delta X I>1 Directional I2> Directional I2/I1 Setting
Alarm Disabled 24-27V 100 km 20 Ω Disabled Basic + Z1X 5Ω Directional Fwd Non-Directional 0.2
(3)
I^ Maintenance Opto Input 2 Line Impedance tZ2 Zone Overlap Mode Fault Type IN > Status I>1 VTS Block I2> VTS I2/I1 Time Delay
1000 24-27V 12 Ω 200 ms Disabled Both Enabled Enabled Non-Directional Non-Directional 60 s
I^ Lockout Line Angle kZ3/4 Res Comp Fault Locator Trip Mode IN > (% Imax) I>1 Current Set I2> Current Set I2/I1 Trip
Alarm Disabled 70 ° 1 Group 1 Force 3 Poles 40 % 1.500 A 200 mA Disabled
(3) (5)
I^ Lockout Opto Input 32 Zone Setting kZ3/4 Angle kZm Mutual Comp Sig. Send Zone I2 > Status I>1 Time Delay VTS I2> Time Delay
2000 24-27V 0 0° 0 None Enabled 1.000 s 10 s
(5)
N° CB Ops Maint Zone Status Z3 kZm Angle DistCR I2 > (% Imax) I>1 TMS I2> Char Angle
Alarm Disabled 11110 30 Ω 0° None 30 % 1 -45 °
(3) (6)
N° CB Ops Maint kZ1 Res Comp R3G - R4G Tp Imax Line > Status I>1 Time Dial
10 1 30 Ω 0.02 Enabled 7
N° CB Ops Lock kZ1 Angle R3Ph - R4Ph tReversal Guard Imax Line > I>1 Reset Char
Alarm Disabled 0° 30 Ω 0.02 3A DT
(3)
N° CB Ops Lock Z1 tZ3 Unblocking Logic Unblocking Delay I>1 tRESET
20 10 Ω 0.6 None 15 0
(3)
CB Time Maint Z1X Z4 TOR-SOTF Mode Blocking Zones I>2 Function
Alarm Disabled 15 Ω 40 Ω 0000000011000000 00001 DT
(3)
CB Time Maint R1G tZ4 SOFT Delay I>2 Directional I>2 tRESET
0.1 10 Ω 1 110 s Non-Directional 0
CB Time Lockout R1Ph Zone P - Direct. Z1Ext Fail I>2 VTS Block I>3 Status
Alarm Disabled 10 Ω Directional Fwd o
Disabled Non-Directional Enabled
(3)
CB Time Lockout tZ1 kZp Res Comp Weak Infeed Loss Of Load I>2 Current Set I>3 Current Set
0.2 0 1 Group 1 Group 1 2A 3A
Fault Freq Lock kZ2 Res Comp kZp Angle WI :Mode Status LoL: Mode Status I>2 Time Delay VTS I>3 Time Delay
Alarm Disabled 1 0° Disabled Disabled 2s 3s
(3)
Fault Freq Count kZ2 Angle Zp WI: Single Pole LoL. Chan. Fail I>2 TMS I>4 Status
10 0° 25 Ω Disabled Disabled 1 Disabled
(3) (3) (4)
Fault Freq Time Reset Lockout by Z2 RpG WI : V< Thres. LoL: I< I>2 Time Dial I>4 Current Set
3600 CB Close 20 Ω 25 Ω 45 V 500 mA 7 4A
(3) (4)
Lockout Reset Man Close RstDly RpPh WI : Trip Time Delay LoL: Window I>2 Reset Char I>4 Time Delay
No 5 25 Ω 60 ms 40ms DT 4s
(3) Cells activated, only if functions enabled

(4) Cells activated with WI Trip & Echo (5) Enable with Open Scheme (6) Enable with Blocking Scheme (7) Activated if enable in Configuration
MiCOM P441/P442 & P444 Page 5/6
(7)
2 VOLT 3 CB 4 5 6 7
EARTH FAULT O/C AIDED D.E.F. idem for GROUP
PROTECTION FAIL & I> SUPERVISION SYSTEM CHECK AUTORECLOSE INPUT LABELS OUTPUT LABELS
GROUP 1 GROUP 1 2, 3 & 4
GROUP 1 GROUP 1 GROUP 1 GROUP 1 GROUP 1 GROUP 1 GROUP 1
IN>1 Function Channel Aided DEF Status V< & V> MODE BREAKER FAIL VT SUPERVISION C/S Check Schem. for A/R AUTORECLOSE MODE Opto Input 1 Relay 1 PSL Data
DT Enabled 0 7 Opto Label 01 Relay Label 01
IN>1 Directional Polarisation UNDER VOLTAGE CB Fail 1 Status VTS Time Delay C/S Check Schem. for Man CB 1P Trip Mode P441/2/4 P441/2/4
Directional Fwd Zero Sequence 0 Enabled 5 7 1
IN>1 VTS Block V> Voltage Set V< Measur't Mode CB Fail 1 Timer VTS I2> & I0> Inhibit V< Dead Line 3P Trip Mode Opto Input 8 Relay 14
Non-Directional 1 Phase-Neutral 0.2 0.05 13 1 Opto Label 08 Relay Label 14
IN>1 Current Set IN Forward V<1 Function CB Fail 2 Status Detect 3P V> Live Line 1P Rcl - Dead Time 1 P442/4 P442/4
0.2 0.1 DT Disabled Disabled 32 1
IN>1 Time Delay Time Delay V<1 Voltage Set CB Fail 2 Timer Threshold 3P V< Dead Bus 3P Rcl - Dead Time 1 Opto Input 16 Relay 21
1 0 50 0.4 30 13 1 Opto Label 16 Relay Label 21
IN>1 Time Delay VTS Scheme Logic V<1 Time Delay CBF Non I Reset Delta I> V> Live Bus Dead Time 2 P444 P444
0.2 Shared 10 1 0.1*I1 32 60
IN>1 TMS Tripping V<1 TMS CBF Ext Reset CT SUPERVISION Diff Voltage Dead Time 3 Opto Input 24 Relay 32
1 Three Phase 1 1 0 6.5 180 Opto Label 24 Relay Label 32
IN>1 Time Dial V<2 Status UNDER CURRENT CTS Status Diff Frequency Dead Time 4
7 Disabled Disabled 0.05 180
IN>1 Reset Char ZERO SEQ. POWER V<2 Voltage Set I < Current Set CTS VN< Inhibit Diff Phase Reclaim Time
DT GROUP 1 38 0.05*I1 1 20 180
IN>1 tRESET Zero Seq Power Status V<2 Time Delay CTS IN> Set Bus-Line Delay Reclose Time Delay
0 Enabled 5 0.1 0.2 0.1
IN>2 Status K Time Delay Factor OVERVOLTAGE CTS Time Delay Discrimination Time
Enabled 0 0 5 5
IN>2 Directional Basis Time Delay V> Measur't Mode CVT SUPERVISION A/R Inhbit Wind
Non-Directional 1 Phase-Neutral 5
IN>2 VTS Block Residual Current V>1 Function CVTS Status C/S on 3P Rcl DT1
Non-Directional 0.1 DT Disabled Enabled
IN>2 Current Set Residual Power V>1 Voltage Set CVTS VN> AUTORECLOSE LOCKOUT
0.3 0.5 75 1
IN>2 Time Delay VTS V>1 Time Delay CVTS Time Delay Block A/R
2 10 100 16383
IN> Directional V>1 TMS V>2 Voltage Set

0 1 90
IN> Char Angle V>2 Status V>2 Time Delay

-45 Polarisation Enabled 0.5
Zero Sequence
P44x/EN HI/E33 Menu Content Tables
Page 6/6 MiCOM P441/P442 & P444
BLANK PAGE
Hardware / Software-Version P44x/EN VC/E33
MiCOM P441/P442 & P444
HARDWARE / SOFTWARE
VERSION HISTORY AND
COMPATIBILITY
(Note: Includes versions released and supplied to customers only)
MiCOM P441/P442 & P444 Page 1/4
Relay type: P441/P442 & P444
Backward Compatibility
Software Hardware Model Date of S1
Full Description of changes
version version number issue Compatibility Setting Menu
PSL
Files Text Files
Branch A2.x: First Model – P441/P442 (P444 not available) – Modbus/Kbus/IEC103 – 4 languages – Optos 48Vcc (Hardware=A)
Documentation: TG 1.1671-C & OG 1.1671-B
VDEW-ModBus-Kbus cells/CBaux/IRIGB/WeakInfeed/Reset No compatibility with branch A1.x
03 10/2000 V1.09
IDMT/SyncCheck/AR Led (model 02)
A2.6 VDEW-ModBus-Kbus cells/CBaux/IRIGB/ WeakInfeed/Reset
04 10/2000 IDMT/ SyncCheck/AR Led V2.0 03 03 03
New S1 version
No compatibility with branch A1.x
03 04/2001 Frequency out of range (major correction)- 1/3 pole AR logic V1.10
(model 02)
A2.7
Frequency out of range (major correction)- 1/3 pole AR logic
04 04/2001 V2.0 03 03 03
A New S1 version
Communication improvement / Floc with 5Amp / IrigB / SOTF-TOR
A2.8 04 07/2001 V2.0 03 03 03
/ U-I prim sec
3P fault in Power Swing/SOTF logic/CB Fail/Ext. Trip + 5 ms/Z1-Z2
A2.9 04 01/ 2002 V2.0 03 03 03
measure for small characteristic
EEPROM correction / Blocking scheme improvement / RCA angle /
A2.10 04 05/2002 V2.0 03 03 03
DEF correction / New general distance Trip equation
Last A2.x branch version: Retrip CB/Ffailure/31th Dec/Disturbance
A2.11 04 09/2003 compressed function and communication correction/Voltage V2.0 03 03 03
memory/DEF/Ext Csync/P.Phase ref Csync/Sync live-live
Note : Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
P44x/EN VC/E33 Hardware / Software-Version
Page 2/4 MiCOM P441/P442 & P444
PSL
Files Text Files
Branch A3.x : P444 model with 24optos/32 outputs (Omron) -Universal optos – Italian Language – DNP3
P444/DNP3/NCIT/universal input/5 languages
Italian model 4050A for P444
A3.0 05 05/2001 P441/P442 models 050A (48Vcc) or 050B (Universal optos) V2.02 + patch
(model 03 or 04)
DDB with 1022cells/Discrimination timer in AR/New DDB distance
A or B cells/DEFlogic/SOTF timer/Broken Conductor
for P441/442
SOTF / Z4 block Pswing / CB Fail / IEC103 disturbance / Prim-sec 05
A3.1 06 12/2001 / Kms-Miles / 3P fault in Power Swing / Z1-Z2 measure for small V2.02 + patch N/A 05
charateristic (Same DDB)
A
for P444 EEPROM correction / Blocking scheme improvement/RCA angle / 05
A3.2 06 05/2002 V2.02 + patch N/A 05
IEC 103 corrections / Fault Loc (Same DDB)
Last A3.x branch version: Retrip CB/Ffailure/31th Dec/Disturbance

(compressed or not compressed) and communication correction / 05
A3.3 06 09/2003 V2.02 + patch N/A 05
Voltage memory / DEF/ Ext Csync/P.Phase ref Csync / Sync live- (Same DDB)
live / I broken Cond./ Px4X with Px3x in IEC103
MiCOM P441/P442 & P444 Page 3/4
PSL
Files Text Files
Branch A4.x : Second Rear Port - more alarms - new application feature
Second rear port/overlap mode/slip frequency/Z4/VDEW fault
locator/Retrip CB/VTS phase selec/PPGround phase
A4.0 07 09/2002 V2.05 + patch
selection/Extraction PSL/Serial Cmp Line/New DDB cells/Overlap
Z/ Rev with X4 limit/Winfeed/Floc in IEC /Ffailure/31th Dec
A or B
A4.1 for P441/442 07 12/ 2002 Bi phase ground phase selection/Synchro VT bus side V2.07
Voltage memory improvement/compliant IEC103 with Px3x /31th (model 05 or 06)
A4.3 07 04/ 2003 V2.07
A Dec/DEF
for P444
Last A4.x branch version: Disturbance (compressed or not
compressed) and communication correction / DEF/ Ext
A4.5 07 09/2003 V2.07
Csync/P.Phase ref Csync / Sync live-live / I broken Cond./ Px4X
with Px3x in IEC103/Battery Alarm IEC 103
Note 1 : Software version / hardware version / model number can be found by setting in “system data” with MiCOM S1 or LCD front panel.
Note 2 : Version A4.2 & A4.4 not distributed
P44x/EN VC/E33 Hardware / Software-Version
Page 4/4 MiCOM P441/P442 & P444
PSL
Files Text Files
Branch B1.x : New Hardware Platform (Coprocessor Board 150MHz-2nd rear port-Triptime= 1,1Cycle - 48 samples/T) & New functions (32N & 59N)
Documentation: P44x/EN T/E33
New platform/model 080C/coprocessor board at 150 MHz/PW
B1.0 08 12/2002 (32N)/TCT (59N) new functions/ Px4X with Px3x in IEC103 / Retrip V2.09 No compatibility with branch A.x
CB/Ffu / 31st dec
C Synchrocheck ext correction & PPhase ref / 32N correction / Line V2.09 +
B1.1 09 07/2003 08 08 08
angle<55° / Voltage memory / Power swing patch*
Disturbance compressed & not compressed function and V2.09 +
B1.2 09 09/2003 08 08 08
communication correction patch*
* Patch 09 will be included with MiCOM S1 version V2.10
Publication: P44x/EN T/E33
AREVA T&D's Automation & Information Systems Business www.areva-td.com

T&D Worldwide Contact Centre online 24 hours a day: +44 (0) 1785 25 00 70 http://www.areva-td.com/contactcentre/

P441 Distance Relay Tech Manual

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P441 Distance Relay Tech Manual

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MiCOM

MiCOM P441/P442 & P444 Page 1/2

Numerical Distance Protection

Safety Section Px4xxEN SSA11

Introduction P44x/EN IT/E33

Hardware Description P44x/EN HW/E33

Application Guide P44x/EN AP/E33

Technical Data P44x/EN TD/E33

Installation P44x/EN IN/E33

Commissioning & Maintenance P44x/EN CM/E33

Commissioning Test & Record Sheet P44x/EN RS/E33

Connection Diagrams P44x/EN CO/E33

Relay Menu Database P44x/EN GC/E33

Menu Content Tables P44x/EN HI/E33

Version Compatibility P44x/EN VC/E33

Page 2/2 MiCOM P441/P442 & P444

1. HANDLING OF ELECTRONIC EQUIPMENT 3

3. INSTALLING, COMMISSIONING AND SERVICING 5

4. EQUIPMENT OPERATING CONDITIONS 6

5. DECOMMISSIONING AND DISPOSAL 7

1. HANDLING OF ELECTRONIC EQUIPMENT

Protective/safety earth * Functional earth terminal*

NOTE: This symbol can also be used for a

*NOTE: The term earth used throughout the product documentation is

3. INSTALLING, COMMISSIONING AND SERVICING

! product documentation should be consulted before installing, commissioning or

4. EQUIPMENT OPERATING CONDITIONS

5. DECOMMISSIONING AND DISPOSAL

Insulation class: IEC 601010-1: 1990/A2: 1995 This equipment requires a

MiCOM P441/P442 & P444

MiCOM P441/P442 & P444 Page 1/24

2. INTRODUCTION TO MiCOM GUIDES 4

3. USER INTERFACES AND MENU STRUCTURE 5

Page 2/24 MiCOM P441/P442 & P444

MiCOM P441/P442 & P444 Page 3/24

• P range protection relays;

• C range control products;

• M range measurement products for accurate metering and monitoring;

• S range versatile PC support and substation control packages.

Page 4/24 MiCOM P441/P442 & P444

2. INTRODUCTION TO MiCOM GUIDES

MiCOM P441/P442 & P444 Page 5/24

3. USER INTERFACES AND MENU STRUCTURE

Serial N˚ and I*, V Ratings Top cover

FIGURE 1 - RELAY FRONT VIEW

Page 6/24 MiCOM P441/P442 & P444

• a 16-character by 2-line alphanumeric liquid crystal display (LCD).

• a 7-key keypad comprising 4 arrow keys ( !, ", # and $),

MiCOM P441/P442 & P444 Page 7/24

Digital output (relays)

Current and voltage Digital input

FIGURE 2A - RELAY REAR VIEW 40TE CASE

Optional IRIG-B board Digital output (relays) Power supply

FIGURE 2B - RELAY REAR VIEW 60 TE

Page 8/24 MiCOM P441/P442 & P444

Programmable Power supply

FIGURE 2C - RELAY REAR VIEW 80 TE

MiCOM P441/P442 & P444 Page 9/24

3.2 Introduction to the user interfaces and settings options

• the front port which supports Courier communication.

Keypad Courier Modbus IEC870-5- DNP3.0

Page 10/24 MiCOM P441/P442 & P444

3.3 Menu structure

Column header Up to 4 protection setting groups