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CONTROL UNIT

Dr. Sampath Kumar,


Associate Professor
Dept. of ECE,
Manipal Institute of
Technology, Manipal.
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HARDWIRED DESIGN APPROACH
Steps to be followed:
1. Define the task to be performed.
2. Propose a trial processing section.
3. Provide a register-transfer description of the algorithm.
4. Validate the algorithm by using trial data.
5. Describe the basic characteristics of the H/W elements to be
used in the processing section.
6. Complete the design of the processing section by establishing
necessary control points.
7. Propose a block diagram of the controller.
8. Specify the state diagram of the controller.
9. Specify the characteristics of the H/W elements to be used in
the controller.
10. Complete the controller design and draw a logic diagram of 2
the final circuit.
STEP 6: PROCESSING SECTION OF THE BOOTH’S MULTIPLIER

6. Complete the design of the processing section by establishing necessary


control points.

Note:
Rectify the
C4control
signal C4 as
C4 : F= l + r
C41: F = l – r

Dr. Sampath Kumar, Dept. of ECE, MIT


STEP 7: BLOCK DIAGRAM OF BOOTH’S
MULTIPLIER CONTROLLER

5 i/p
and
10 o/p

Dr. Sampath Kumar, Dept. of ECE, MIT


Step 8: State Diagram Controller Action

Dr. Sampath Kumar, Dept. of ECE, MIT 5


STEP 9: CHARACTERISTICS OF COUNTER
USED IN CONTROLLER DESIGN

9. Specify the characteristics of the H/W elements to be used in the


controller.

Truth Table

Block Diagram

Dr. Sampath Kumar, Dept. of ECE, MIT 6


LOGIC DIAGRAM OF BOOTH’S
STEP 10:
MULTIPLIER

Dr. Sampath Kumar, Dept. of ECE, MIT


PLA IMPLEMENTATION OF SEQUENCE CONTROLLER
DESIGN FOR BOOTH’S MULTIPLIER
Truth Table SC o/p

The product terms generated in the PLA are:

P0 = Q[1]1Q[0]1T2 P1 = Q[1]Q[0]T2
P2 = Q[1]Q[0]1T2

P3 = T3 P4 = Z1T5 P5 = T8
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Dr. Sampath Kumar, Dept. of ECE, MIT


SC o/p

• PLA generates 5 Sequence Controller o/p


• L = P0+P1+P2+P3+P4+P5
• d3 = P5
• d2 = P0+P1+P2+P3
• d1 = P4
• d0 = P0+P1+P3
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Dr. Sampath Kumar, Dept. of ECE, MIT


PLA IMPLEMENTATION OF SEQUENCE CONTROLLER
DESIGN FOR
BOOTH’S MULTIPLIER

10

Dr. Sampath Kumar, Dept. of ECE, MIT


Dr. Sampath Kumar, Dept. of ECE, MIT 11
PLA IMPLEMENTATION OF SEQUENCE CONTROLLER
DESIGN
The outputs generated by the PLA are:

L= P0+P1 +P2 +P3 +P4+P5 d3 = P5 d2= P0+P1 +P2 +P3


d1= P4 d0= P0+P1 +P3

The controller designed by relating the control states (T0 to T8)


with the control signals(C0 to C9).

C0= C1= C2 =T0 C3 = T 1 C4=T3


C5=T3 + T4 C6 = C 7 = T 5
C8 = T 6 C9 = T 7

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Dr. Sampath Kumar, Dept. of ECE, MIT


Thank you

Dr. Sampath Kumar, Dept. of ECE, MIT 13

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