UNIT-I Digital Computers htps:ntuhbtechada.blegspct.com!Introduction What is a Computer? Computer is an Electronic Device, that - Accepts the information from the outside world. - Stores it - Process it to Produce the results - Transfers the results to the outside world How Computers are classified based on the kind of /O? - Analog Computers - Digital Computers - Hybrid Computers btps:ntuhbtechadca.blegspet.com!Analog Computer: - Set up according to initial conditions and can be later changed freely - Deals with continuously varying physical quantities such as temperature, pressure, humidity, etc., - Solutions to the given problem are obtained by measuring the variables/parameters Digital Computer: - Performs Various Computational Tasks - Represents the information as discrete values - Uses variables to store information heh lofebssaly IHybrid Computer: - Consists of both Analog and Digital components - Solves differential equations and complex mathematical equations - Handles logical and numerical operations What could be result of our logic and/or Decision Making? Our logic and/or decision makes results in either True-or-False OR Yes-or-No. That is consisting of two states. Hence, Digital computers function more reliably with only two states. So, digital computers use the binary number system, which has two digits: 0 and 1. A binary digit is called a bit. btechada blogspct com They also called as Binary"ComiputesThe information in digital computers is represented / stored as groups of bits. What these group of bits can represent? - Values Letters of alphabet Special Symbols Instructions or Commands What is the decimal equivalent for “1001011”? 1X 26+0X25+0X24+1X234+0X22+1X2!4+1X2°=75 btps:ntuhbtechadca.blegspet.com!A computer system is subdivided into two functional entities: - Hardware - Software Hardware, consists of all the electronic and electromechanical components, i.e., the physical parts. Software, consists of the programs and data that are manipulated to perform various data-processing tasks. What is a program? A sequence of instructions for the computer to perform a task is called a program. The data manipulated by the program usually constitute the data‘ base: its nutbechada east condThe software is basically classified into two types: - System Software, consists ofa collection of programs, to make more effective use of the computer. It is an indispensable part of a total computer system. Ex: OS, linkers, loaders, compilers, interpreters, etc., - Application Software, consists of programs written by the user for the purpose of solving particular problem(s). Examples? btps:ntuhbtechadca.blegspet.com!Block Diagram of Digital Computer Gru \scsa Cun (RAM) Coan gy ean iaces Aes (CPU) Arithmetic & Logic Unit (ALU) (eT Olia Tastimelts Meares (1oP) Tisai (oltre sie ~~ ttps:ntunbtechadda blegspet.com! eer) aUPoints of View There exists three different points of view for the computer hardware. - Computer Architecture - Computer Organization - Computer Design Tae ia ogee iey LT og aatiace es Pee aos sd ol cme ellen co Specifications 4 Satie(ena eee Hardware Components Computer Organization Verification for Operations Onl aT IK — Computer Design NCNzod enna a eon nc Implementation ‘ttps:lntunbtechada blegspct.com!Classification of Architectures All the Computer Architectures are based on the one of the following: 1. Von-Neumann Architecture 2. Harvard Architecture 1, Von-Neumann Architecture: Central Processing Unit Input Device2, Harvard Architecture: Instruction memory btps:ntuhbtechadca.blegspet.com! Data memoryRegister Transfer and MicrooperationsVV VV VV WV Topics to be Covered Register Transfer language Register Transfer Bus and Memory Transfers Arithmetic Microoperations Logic Microoperations Shift Microoperations Arithmetic Logic ShiftUnit...Register Transfer language A digital system: - vary in size and complexity from a few integrated circuits to complex interconnected and interacting digital computers. - uses a modular approach. - is an interconnection of digital hardware modules using common data and control paths, to accomplish a specific information-processing task. The parts of the modules, called as digital components include: - Registers, - Decoders, - Arithmetic elements, and - Control logic. Momma soe consHence, a Digital module is defined by: - A set of registers - Operations performed on the data stored in them, called as microoperations. So, a microoperation is an elementary operation performed on the information stored in one or more registers. The result of the operation may: - replace the previous information of a register or - transferred to another register. Examples: shift, count, clear, and load. btps:ntuhbtechadca.blegspet.com!Now, the internal hardware organization of a digital computer is defined by specifying the: 1. Set of registers and their functions. 2. Sequence of microoperations performed on the binary information stored in the registers. 3. Control that initiates the sequence of microoperations One way to specify the sequence of microoperations is by explaining every operation in words. But, it involves a lengthy descriptive explanation. Hence, it is convenient to use a suitable symbology for the description of the sequence of transfers between registers and the related microoperatiens,.along,with the control signals.The symbolic notation used is called a Register Transfer Language (RTL). In this, the symbols define: - Various types of microoperations - Associated hardware - Control Signals btps:ntuhbtechadca.blegspet.com!Register Transfer Computer Registers are designated by capital letters (sometimes followed by numerals) to denote the function of the register. Examples: MAR (Memory Address Register) - holds an address of a memory location PC (Program Counter) — holds the address of the next instruction IR (Instruction Register) — contains the current instruction R1 (Processor Register) — holds the temporary data. The individual flip-flops in an n-bit register are numbered in sequence from 0 through n - 1, starting from 0 in the rightmost ntl teres pet position and increasing the"numbers toward the left.The following figures illustrates different ways of representing registers in block diagram. a> The most common way to represent a register is by a rectangular box with the name of the register inside. Register Coe b> The individual bits | can be sp specifi ied as numbers. c> The numbering of bits in a 16-bit register can be marked on top of the box. 45 0 d>A 16-bit register, say PC, is partitioned into two parts as Bits 0 through 7 are assigned the symbol L (for low byte) and bits 8 through 15 are assigned the symbol H (for high byte). 16. 87 SubfieldsA replacement operator (<-) is used to denote the information transfer from one register to another. To transfer the content of register R1, Source Register into register R2, Destination Register, the statement R2 < R1 is used. It results in: - The replacement of previous content of R2. - The content of R1 is unaltered. - The content of R1 is transferred simultaneously to R2 using the circuits from the outputs of R1 to inputs of R2. Register transfer under a predetermined condition can be denoted as: If (P = 1) then (R2 < R1) Le., using [f-then wofferePiseeontrol signalFor convenience, the control variables are separated from the register transfer operation using a control function, ie., a Boolean variable that is equal to either 1 or 0. By including the control function, the above statement becomes: P:R2=» 3 . . : . ni Ay —y pitas input lines and maximum of 2 A o4 |} iy, A 0 —— >| Decoder output lines. One of these outputs >% will be active High based on the combination of inputs present, when the decoder is enable fos mtuntechadca bleaspet.com!By using the high-impedance state feature, a large number of three-state gate outputs can be connected with wires to form a common bus line without endangering loading effects, Bus Line for Bito eelThe outputs of four buffers are connected together to form a single bus line. At any given time, only one buffer has to be in the active state. So, the control inputs to the buffers should determine the buffer to communicate with the bus line. Hence, only one control input has to be active. This can be ensured by using a decoder, as: o With the enable input of the decoder as 0, all of its four outputs are 0, and the bus line is in a high- impedance state because all four buffers are disabled. o With the enable input is active i.e., 1, one of the three-state buffers will be active, depending on the binary value in the-seleet-trputs of the decoder.Random Access Memory (RAM) RAM isa collection of storage cells together with associated circuits needed to transfer information in and out of storage. The memory stores binary information in groups of bits called words. Each memory cell is indicated by an unique address and holds one word of information. Let us assume the RAM contains r = 2§ words and each word is of ‘n’ bits. Hence, it needs: renee - ‘n’ data input lines - ‘n’ data output lines earenen oes - ‘k’ address lines aoe - A Read control line - A Write control line btps:ntuhbtechadca.blegspet.com! rn data output linesMemory Transfer A memory word is designated by the letter M. The address of the memory word need to be specified for the memory transfer operations. The Address Register, AR holds the address and the Data register, DR holds the data involved in the transfer. The transfer of information from a memory unit to the outside is called a Read operation. So, the Read signal causes a transfer of information into the data register (DR) from the memory word (M) selected by the address register (AR). Thus, a read operation can be stated as: Read: DR — M [AR] btps:intuhbtechadca.blegspct com!The transfer of new information into the memory for storing is called a Write operation. So, the Write signal causes a transfer of information from register DR into the memory word (M) selected by address register (AR). Hence, the corresponding write operation can be stated as: Write: M [AR] — DR The read and write operations are illustrated by: Read Memory AR | “ti “ ats Git pata”Micro-Operations Microoperation is the elementary operation performed on information stored in registers. Computer system microoperations are broadly classified into: > Arithmetic microoperations > Logic microoperations > Shift microoperations btps:ntuhbtechadca.blegspet.com!Arithmetic Microoperations * In general, the Arithmetic Micro-operations deals with the operations performed on numeric data stored in the registers. * The basic Arithmetic Micro-operations are classified into the following categories: — Addition — Subtraction — Increment — Decrement * Some additional Arithmetic Micro-operations are: — Add with carry — Subtract with borrow — Transfer/Load, et. iss,jnnoteradsa vcgspet consThe arithmetic microoperations are tabulated as: Symbolic designation Description R3 <— Ri + R2 Contents of R1 plus R2 transferred to R3 R3 <— R1— R2 Contents of Rl minus R2 transferred to R3 R2 <— R2 Complement the contents of R2 (I’s complement) R2<— RZ +1 2’s complement the contents of R2 (negate) R3<— RL+R2Z+1 Ri plus the 2’s complement of R2 (subtraction) Ri <— Ri+1 Increment the contents of R1 by one Rie Ri-1 Decrement the contents of Rl by one In the above table, multiplication and division operations are not mentioned. In a Digital system where they are implemented by combinational circuits In general , * Multiplication operation is implemented with a sequence of add and shift microoperations. * Division is implemented with a sequence of subtract and shift : . rpsftunbtechacca bogspct con microoperations.Binary Adder The Add micro-operation’s implementation using Hardware requires: - Registers to hold the data - Digital components to perform the arithmetic addition A Binary Adder is a digital circuit that performs the arithmetic sum of two binary numbers provided with any length. Binary Adders are classified into two types: - Half Adder - Full Adder Half Adder: A o+>—\ re os l 0 0 0 0 }—o CARRY i 1 ‘ ht Leiter ‘blegspet.com/ 1 1 0 1Full Adder using two Half Adders: Halt Adder A Full Adder B Cin -———+ Sum's’ }____, Camy‘c.’ htps:sfntuhbtechada blogspBe- Input Output a [8 cin Sum Carry o | 0 ° 0 0 o | o 1 1 0 0,1 0 1 0 o]1 1 0 1 1 | 0 0 1 0 1 [0 1 0 1 1 1 0 0 1 T 1 1 1 1Now, a Binary Adder is constructed using full-adder circuits connected in series, with the output carry from one full-adder connected to the input carry of the next full-adder. The following figure illustrates the construction of 4-bit binary adder using four full adders B, A; B, Az B, A, By Ao Potro if ti 2 ae a a S; S, Ss, So Cy The augend bits (A) and the addend bits (B) are designated by subscript numbers from right to left, with subscript '0' denoting the low-order byiptseecceicsos conThe carry inputs starts from Cy to C3 connected in a chain through the full-adders. C, is the resultant output carry generated by the last full-adder circuit. The sum outputs (Sp to S;) generates the required arithmetic sum bits of augend and addend bits. In general, for an n-bit binary adder: - n full adders are required - Output carry from each full-adder is connected to the input carry of the next-high-order full-adder. - The data bits for A input comes from source register, say R1 and data bits for B input comes from source register R2. - The resultant sum of the data inputs of A and B can be transferred to a third register or to one of the source registers (R1 Or R2). mos:inuwiecnade sesseecon!Binary Adder-Subtractor The Subtraction micro-operation can be performed by: - Finding the 2's compliment of addend bits. - Adding it to the augend bits. Note: = The 2's compliment can be obtained by taking the 1's compliment and adding one to the least significant bit. = The 1’s complement can be obtained by inverting each bit of the given number. Now, both the addition and subtraction operations can be combined into one common circuit by including an exclusive- OR gate with each full-ad def, .cansseaconA 4-bit binary adder-subtractor is: By, As B, Az B, Ay Bo Ao |_| |_| |_| | = J © J a> Gee: Ga as _ ¥ . ¥ t 5, 3, g, 5 The mode input (M) decides the kind of operation as: - Ata low logic, ie. '0', the circuit act as an adder. - Atahigh logic, i.e. 'l', the circuit act as a subtractor. Each exclusive-OR gate connected in series, receives input M and one of the inputs of B lntubbtechadea blogspct.com!With M =0, - The output from XORs will be B® 0 = B. - So, the full-adders receive the value of B, the input carry is 0, and the circuit performs A plus B. With M =1, - The output from XORs will be B® 1 = B’,i.e., B inputs are complemented. - Since Cy = 1, a 1 is added through the input carry, to get 2’s complement of B. - Hence, the circuit performs the operation A plus the 2's complement of B, i.e., A- B. btps:ntuhbtechadca.blegspet.com!Binary Incrementer The increment micro-operation adds ‘1’ to the value stored in a register. For instance, a 4-bit register has a binary value 0110, when incremented by one the value becomes 0111. A 4-bit combinational circuit incrementer, by cascading four half adders is as shown below: AeIn the above figure, The least significant half adder will have logic-1 as one input and least significant bit of the number to be incremented as other input. The output carry from one half-adder is connected to one of the inputs of the next-higher-order half-adder. The binary incrementer circuit receives the four bits from Ay through A, adds one to it, and generates the incremented output in Sy through S;. The output carry C4 will be 1 only after incrementing binary 1111. Note: An n-bit binary incrementer can be constructed by including “n” half-adders,,..peansinseseeonBinary Decrementer The decrement means subtraction of ‘1’ from given value. Let us consider R - 1 - Can be represented as R~+ (-1) , -1 is represented as 2’s complement of 1 which is all 1’s. - Adding R contents with 2’s complement of 1 results in Decrementation. btps:ntuhbtechadca.blegspet comArithmetic Circuit All the arithmetic microoperations can be implemented in one composite arithmetic circuit. The basic component of this arithmetic circuit is the parallel adder. By controlling the data inputs to the adder, it is possible to obtain different types of arithmetic operations. The arithmetic circuit contains: Four full-adder circuits that constitute the 4-bit adder. - Four multiplexers for choosing different operations. Two selection signals Sp & S;. Two 4-bit inputs A and B. A 4-bit output D. btps:ntuhbtechadca.blegspet.com!Function Table: Add D=A+Bt1 Add with carry D=A+B’ Subtract with borrow D=A+B'+1 Subtract D=A Transfer A Increment A Decrement A Transfer A btps:ntuhbtechadca.blegspet.com!Logic Microoperations - Specify binary operations for strings of bits stored in registers. - Consider each bit of the register separately and treat them as binary variables. - Seldom used in scientific computations. - Useful for bit manipulation of binary data. Ex: The exclusive-OR microoperation with the contents of two registers R1 and R2, at P can be symbolized as: P:RI XOR E=AvB OR E=AaB AND ComplementSome Applications To manipulate individual bits or a portion of a word stored in a register, the logic microoperations are very useful. Logic Microoperations can be used on a register to: - Change bit values - Delete a group of bits - Insert new bit values The operations are: = Selective-Set = Selective-Complement Selective-Clear Mask = Insert Clear ttpsrseecas ppc contSelective-set: This operation sets the specific/desired bit(s) to 1 in register A. This can be done: - by placing 1(s) in the desiring position(s) in the register B, the remaining as 0(s) & - performing OR operation with register A. Selective-complement: This operation complements/inverts the specific/desired bit(s) in register A. This can be done: - by placing 1(s) in the desiring position(s) in the register B , the remaining as 0(s) & - performing XOR operation with register A. btps:ntuhbtechadca.blegspet.com!Selective-clear: This operation clears the specific/desired bit(s) to 0 in register A. This can be done in two ways. In the first method: - by placing 1(s) in the desiring position(s) in the register B, the remaining as O(s) & - performing A< AA B’. In the second method: - by placing 0(s) in the desiring position(s) in the register B, the remaining as 1(s) & - performing A. Because of this, there is a possibility of sign reversal if the bit in R,,; changes in value after the shift, due to overflow. An overflow occurs after an arithmetic shift left, if R,., is not equal to R,,.. before the shift. 0 felt by i Hh \_/ |__| sive nn A VECLOW, Before the shift, if the leftmost two V bits differ, the shift will result in anAn overflow flip-flop V, can be used to detect an arithmetic shift-left overflow. Hence V=Ry.1 ® Ry2 If V = 0, there is no overflow. If V = 1, there is an overflow and a sign reversal after the shift. btps:ntuhbtechadca.blegspet.com!Hardware Implementation A shift unit would be constructed in one way using a bidirectional shift register with parallel load. In this: - Information can be transferred to the register in parallel. - Can be shifted either to the right or left. In this type of shift unit, - Aclock pulse is needed for loading the data into the register. - Another pulse is needed to initiate the shift. With many registers in a processor unit, it is more efficient to implement the shift operation with a combinational circuit. btps:ntuhbtechadca.blegspet.com!In this implementation: The content of a register to be shifted is placed onto a common bus. The output of the common bus is connected to the combinational shifter. The shifter shifts the loaded content. - The result is loaded back into the register. This whole operation requires only one clock pulse for loading the shifted value into the register. A 4-bit combinational circuit shifter can be constructed: Four Multiplexers Four data inputs, Ay through A; Four data outputs, Hy through H; Two serial inputs, one for shift left (I) and the other for shift right (Ip) One Selection Input, eoFor S = 0, the input data are shifted right (down in the diagram). For S = 1, the input data are shifted left (up in the diagram). The function table shows which input goes to each outputafter the 0 for shift right (dow! Select {fr suite (oo) o Serial input (I5) shift. Al S AON | HE | 2.|| HS: my 0 I, AO AL A2 Ar ho hs | A shifter with n data inputs and outputs requires n a m. ultiplexers. titps:fntunbtechadda.bickBd dl)Arithmetic Logic Shift Unit Instead of individual registers performing the microoperations directly, ina computer system, a number of storage registers are connected to a common operational unit called as Arithmetic Logic Unit (ALU). To perform a microoperation: - The contents of specified registers are placed in the inputs of the common ALU. - The ALU performs an operation. - The result of the operation is then transferred to a destination register. Note: All the above operations can be performed during one clock pulse period. btps:ntuhbtechadca.blegspet.com!To perform shift operations there are two possibilities: 1. A separate shift unit 2. The shift unit as part of the overall ALU. One stage of an arithmetic logic shift unit is: E shr Aw TDS TURBTecg pp BISaSPEL CONTIn the above Circuit: The subscript i designates a typical stage. Inputs A, and B; are applied to both the arithmetic and logic units. A particular microoperation is selected with inputs S, and So. The data in the 4 X | multiplexer are selected with inputs S; and S». The inputs to the multiplexer are: > An arithmetic output in Dj. >A logic output in Ej. > Aix, for the shift-right operation >» A;., for the shift-left operation btps:ntuhbtechadca.blegspet.com!The one stage ALU circuit provides: - Eight arithmetic operations, - Four logic operations, - Two shift operations. Each operation is selected with the five variables $3, $5, $1, So, and C,. Operation select S&S & & Operation Function 0 0 0 0 0 Fra Transfer A 0 0 0 0 1 A+l1 Increment A 0 0 0 1 0 Addition 0 0 0 1 i Add with carry 0 0 1 0 oO Subtract with borrow 0 0 1 0 1 Subtraction 0 0 1 1 0 Decrement A oo L @ 1 Transfer A 0 1 0 0 x AND 0 1 0 1 x OR 0 1 1 0 x XOR o 1 1 a4 x Complement A 1 0 * * * Shift right A into F i “a. XX htps:sjouunbtechgdcabielabevtom Shift left A into F- The one stage circuit must be repeated n times for an n-bit ALU. - The output carry C;,, of a given arithmetic stage must be connected to the input carry C; of the next stage in sequence. - The input carry to the first stage, C;,, provides a selection variable for the arithmetic operations. btps:ntuhbtechadca.blegspet.com!Basic Computer Organization and DesignTopics to be Covered > Instruction Codes > Computer Registers > Computer Instructions > Timing and Control > Instruction Cycle > Memory Reference Instructions > Input-Output and [nterraptrasiconInstruction Codes The organization of the computer is defined by: - Internal Registers - Timing and Control Structure - Set of Instructions The internal organization of a digital system is defined by the sequence of microoperations, performed on the data stored in its registers. The general purpose digital computer is capable of: - Executing various microoperations - Performing specific sequence-of-eperations as instructedThe user of a computer can specify the sequence of operations by means of a program. Hence, a program isa set of instructions that specify: - Operations - Operands - Sequence of Processing The task of dataprocessing may be altered either by specifying: - Anew program with different instructions (or) - The same instructions with different data btps:ntuhbtechadca.blegspet.com!- A Computer Instruction is a binary code that specifies a sequence of microoperations to be performed. - Every computer has its own unique instruction set. - Instructions and data are stored in memory. - The stored program concept, the important property of a general-purpose computer, is the ability to store and execute instructions. - The computer reads each instruction from memory and places it in a control register. - The control interprets the binary code of the instruction and execute it by issuing a sequence of microoperations. An Instruction Code is a group of bits that instruct the computer to perform a specific.aperation.It is usually divided into parts, with each part having its own particular interpretation. - The first part being operation part, called as Operation Code - The remaining parts consist of Registers, Memory Words and/or Operands itself. The operation code of an instruction is a group of bits that define operation and the number of bits depend on the total number of available operations. Ex: Add, Subtract, Multiply, Shift, Complement, etc., The operation code must consist of at least n bits for a given 2” (or less) distinct operati @Aseursecrssc vcsspsconThe relationship between a computer operation and a microoperation is: - An operation is part of an instruction, i.e., a binary code that instructs the computer to perform a specific operation. - After receiving the instruction from memory, the control unit interprets the operation code bits to issue a sequence of control signals for initiation of microoperations in internal registers. - Thus, for every operation code, the control issues a sequence of microoperations needed for the hardware implementation of the specified operation. So, an operation code is sometimes called as a macrooperation because it specifies a set of microoperations. ttps:ntunbtechadca.blegspct.comyThe specified operation must be performed on some data stored in processor registers or in memory. So, an instruction code also specifies both source and destinations. Memory words can be specified in instruction codes by their address. Processor registers can be specified by a binary code of k bits that specifies one of 2 registers. Each computer has its own instruction code format. These instruction code formats are framed by computer designers, while specifying the architecture of the computer. btps:ntuhbtechadca.blegspet.com!Stored Program Organization Let us organize a simple computer with: - One processor register - An instruction code format The format for instruction consists of two parts: - The first part specifies the operation to be performed - The second specifies an memory address of the operand The operand is read from memory is used as the data to be operated along with the data stored in the processor register. btps:ntuhbtechadca.blegspet.com!The stored program organization is illustrated by: Memory 4096 x 16 fe as E Instructions Opcode Address (Program) Instruction format gi 0 Operands Binary Operand (Gata) Processor register (Ac) In the instruction format: - Four bits for the operation code (opcode) to specify one out of 16 possible operations - 12 bits to specify the memory address of an operand, as the MEMOTY SIZE 1S 4096. mos:inun:ecnase Hesspecon!A single-processor register, is usually named as accumulator and labeled as AC. The operation is performed with the memory operand and the content of AC (Second Operand). For few instructions, an instruction code does not need an operand from memory, i.e., bits 0 through 11 can be used for other purposes. For example, operations on data stored in the AC register, such as clear AC, complement AC, increment AC, etc.,. btps:ntuhbtechadca.blegspet.com!Indirect Address The second part of an instruction code (0-11 bits) can specify: - Actual Operand, called as Immediate Operand. - Address of the operand, called as Direct Address. - Address of a memory word, consisting the address of the operand, called as Indirect Address. Note: One bit in the instruction code can be used to distinguish between a direct and an indirect address. The instruction format consists: 0 - 3-bit Operation Code ee : Lt] opcode [ Addeess | - 12-bit Address - An indirect address mode bit designated by I I= 0 for a Direct Address"Y 1 Foran Indirect AddressThe Direct and Indirect Addressing is demonstrated using: Memory btps:ntuhbtechadca blegspct.com/Computer Registers For the execution of the program stored in the memory, the registers for the following purposes are required: - Acounter to calculate the address of the next instruction. - Storing the instruction code after it is read from memory. - Manipulation of data. Holding a memory address. Data Register Holds memory operand Address Register Holds address for memory Accumulator Processorregister InstructionRegister Holds instructioncode Program Counter Holds address of instruction TemporaryRegister Holds temporary data Input Register Holds input character Output REYiStEr "lds outputcharacterbtps:ntuhbtechadca.blegspct com!In the above figure: The memory unit has a capacity of 4096 words and each word contains 16 bits. So, - All the registers holding the address should be of 12 bits size > Address Register (AR) > Program Counter (PC) - All the registers holding the data/instruction should be of 16 bits. > Data Register (DR) > Accumulator (AC) > Instruction Register (IR) >» Temporary Register (TR) Hence, the processor (CPU) also should be of 16 bits. The input register (INPR) receives an 8-bit character from an input device. The output register (OUTR) holds an 8-bit character for an output device. btps:ntuhbtechadca.blegspct.comIn the instruction code: - 12 bits for the address of an operand. - 3 bits to specify operation, i.e., Opcode - 1 bit to specify a direct or indirect address The PC: - goes through a counting sequence by incrementing, so that the computer reads the instructions sequentially. - sequential execution continues unless a branch instruction, that calls for a transfer to a nonconsecutive instruction in the program, is encountered. - the address part of a branch instruction is transferred to become the address of the next instruction. btps:ntuhbtechadca.blegspet.com!Common Bus System Our basic computer has: - Eight Registers, - A Memory Unit, & - A Control Unit. So, paths must be provided to transfer information from one register to another and between memory and registers. The efficient way is to use a common bus system, either using multiplexers or three-state buffer gates. The connection of the registers and memory of the basic computer to a common bus system is: btps:ntuhbtechadca.blegspet.com!S,S,So — Selection Lines LD — Load INR — Increment CLR — Clear E-End CarryComputer Instructions The basic computer supports three instruction code formats of 16 bits each. In this: - The operation code (opcode) part of the instruction contains three bits. - The meaning of the remaining 13 bits depends on the opcode. 1> A memory-reference instruction, out of 13 bits uses: - 12 bits to specify an address. - One bit to specify the addressing mode I. I is equal to 0 for direct address and to 1 for indirect address. 15 14 42.11 0 titps:fintuhbtechadda blegspct.com/ (Opcode = 000 through 110)2> A register-reference instruction specifies: - The operation code 111 with a 0 in the leftmost bit (bit 15) of the instruction. - An operation on or a test of the AC register by using the other 12 bits. © an 3> An input-output instruction specifies: Docemer ets - The operation code 111 with a 1 in the leftmost bit of the instruction. - The remaining 12 bits are used to specify the type of input- output operation or test performed. 15 21 0 3 | — btps:intuhbtechadca.blegspet.comy (Opcode = 111, 1= 1)Hexadecimal code hy 1 Description AND memory word to AC PRRERRE Add memory word to AC Load memory word to AC Store content of AC in memory Branch unconditionally Branch and save return address Increment and skip if zero INC SPA SNA SZA HLT 7800 7400 7100 7010 7004 7001 Clear AC Clear E Complement AC Complement E Circulate right AC and E Circulate left AC and E Increment AC Skip next instruction if AC positive Skip next instruction if AC negative Skip next instruction if AC zero Skip next instruction if E is 0 Halt computer Input character to AC OUT SKI SKO ION 1OF F400 F100 Output character from AC Skip on input flag Skip on output flag Interrupt 09 psujntunbtecnadca blogspet. com! Interrupt offInstruction Set Completeness The instruction set designed for a computer is said to be complete, if it includes sufficient number of instructions in each of the following categories: 1. Arithmetic, logical, and shift instructions. 2. Instructions for moving information to and from memory and processor registers. 3. Program control instructions together with instructions that check status conditions. 4. Input and output instructions. - ADD, INC, AND, CMA, CLA, CIR, CIL - LDA, STA - BUN, BSA, ISZ, SPA, SNA, SZA, SZE, SKI, SKO _ INP. OUT risa aTiming and Control A master clock generator’s clock pulses are used to control the timing of all the flip-flops and registers of both the system and control unit. The clock pulses able to change the state of a register only after it is enabled by a control signal. The control signals generated in the control unit, provide: - Control inputs for the multiplexers in the common bus - Control inputs in processor registers - Microoperations for the accumulator btps:ntuhbtechadca.blegspet.com!There are two major types of control organization: - Hardwired Control - Microprogrammed control The control logic in hardwired control is implemented with: - Gates - Flip-flops - Decoders Other digital circuits Advantage: It can be optimized to produce a fast mode of operation. Disadvantage: To modify or change the design, the wiring among the various components need to be changed tada biogspct.com/In the microprogrammed organization: - The control information is stored in a control memory. - The control memory is programmed to initiate the required sequence of microoperations. Advantage: The required changes or modifications can be done by updating the microprogram in control memory. Disadvantage: Optimization at the hardware level is not possible. The block diagram of the control unit, shown below consists of: - Two decoders - A sequence counter - Anumber of control logic gates tps: intuhbTechadca blegspct.com/Instruction register (IR) Increment (INR) lear (CLR) btps:ntuhbtechadca.blegspct com Clock 4.Bit Sequence Counter (80)Instruction Cycle The program, resided in the memory, is executed in the computer by going through a cycle for each instruction. Each instruction cycle in turn is subdivided into a sequence of subcycles or phases. In the basic computer each instruction cycle consists of the following phases: 1. Fetch an instruction from memory. 2. Decode the instruction. 3. Read the effective address from memory if the instruction has an indirect address. 4. Execute the instruction. The above steps are repeated for each instruction, till the HALT is encountered, “"""*nennncortFetch and Decode Initially: - The program counter PC is loaded with the address of the first instruction in the program. - The sequence counter SC is cleared to 0, providing a decoded timing signal Tp. The microoperations for the fetch and decode phases are specified using register transfer statements as given below: Ty: AR = PC T,: IR <— M[AR], PC — PC +1 Ty: Do, ... , D7 Decode IR(12-14), ARIR(0-11), I-IR(15) btps:ntuhbtechadca.blegspet.com!At To, to perform AR < PC: 1. Place the content of PC onto the bus by making the bus selection inputs SS,Sy equal to 010. 2. Transfer the content of the bus to AR by enabling the LD input of AR. At T), to perform IR < M[AR], PC — PC + 1: 1. Enable the read input of memory. 2. Place the content of memory onto the bus by making S)8;So= 111. 3. Transfer the content of the bus to IR by enabling the LD input of IR. 4. Increment PC by enabling the INR input of PC. btps:ntuhbtechadca.blegspct.comyDetermine the Type of Instruction ‘Sian sceo D,’ IT;: AR — M [AR] Dy’ I’T;: Nothing D7I' T;: RR Instruction D7IT;: 1O InstructionRegister-Reference Instructions D,I'Ts = r (common to all register-reference instructions) IR(i) = B, [bit in JR(Q—-11) that specifies the operation] r: SC are not active. The condition for setting flip-flop R to 1 can be expressed as: Ty'T,’ T,'(IEN)(FGI + FGO): R= 1 Modified fetch and decode phases will be: R'Ty: AR — PC R’T,: IR <= M[AR], PC <= PC+ 1 R'T): Do, ... , D7 Decode IR(12-14), AR<-IR(0-11), I Control Memory > Address Sequencing > Microprogram Example > Design of Control Unit btps:ntuhbtechadca.blegspet.com!Control Memory The control unit in a digital computer initiates sequences of microoperations. There are finite number of different types of microoperations in a given system. The number of sequences of microoperations that are performed determines the complexity of the digital system. In Hardwired Control Unit the control signals are generated by hardware using conventional logic design techniques. Microprogramming is an elegant and systematic method, is a second alternative for designing the control unit of a digital computer. eae ecaeceetThe control function that specifies a microoperation is a binary variable or control variable. - Inone binary state, the corresponding microoperation is executed. - The opposite binary state does not change the state of the registers in the system. - The active state may be either the | state or the 0 state, depending on the application. For Example, in a bus-organized system, the selection of the paths in multiplexers, decoders, and arithmetic logic units is based on the control signals (a group of bits) specifying microoperations. btps:ntuhbtechadca.blegspet.com!So, the control unit initiates a series of sequential steps of microoperations. But, at any given time, certain microoperations are to be initiated, while others remain idle. The control variables at any given time can be represented by a string of I's and 0's called a control word. Control words can be programmed to perform various operations on the components of the system. A control unit, in which binary control variables are stored in memory is called a microprogrammed control unit. Each word in control memory represents a microinstruction. The microinstruction specifies one or more microoperations for the system. A sequence of microinstrmcetions.censtitutes a microprogram.Since alterations of the microprogram are not needed, the control memory can be a read-only memory (ROM). ROM words are made permanent during the hardware production of the unit. The use of a microprogram involves placing all control variables in words of ROM for use by the control unit through successive read operations. The content of the word in ROM at a given address specifies a microinstruction. In dynamic microprogramming, a microprogram will be loaded initially from an auxiliary memory such as a magnetic disk. Control units that use dynamic microprogramming employ a writable control memory, but is used mostly for reading. hitps:ntuhbtechadca blegspct.comyA computer that employs a microprogrammed control unit will have two separate memories: - Main Memory. - Control Memory. Main Memory: - Available to the user for storing the programs, consisting of machine instructions and data. - The contents may alter when the data are manipulated and the program is changed. Control Memory: - Holds a fixed microprogram that cannot be altered by the occasional user. btps:ntuhbtechadca.blegspet.com!The microprogram consists of microinstructions that specify various internal control signals for execution of register microoperations. Each machine instruction initiates a series of microinstructions in control memory. These microinstructions generate the microoperations to: fetch the instruction from main memory evaluate the effective address execute the operation specified by the instruction return control to the fetch phase in order to repeat the cycle for the next instruction btps:ntuhbtechadca.blegspet.com!The general configuration of a microprogrammed control unit isd read from the memory. Pera iu > Control word ate Festa Control adcress Control memory ata lemonstrated in the following block diagram: Next - address information The control memory here is ROM, in which all control information is permanently stored. The control (memory) address register (CAR) specifies the address of the microinstruction. The control data register (CDR) holds the microinstruction The microinstruction contains a control word, that specifies one or more microoperations-forthe data processor