IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO.
11, NOVEMBER 2000 1343
[7] J. J. F. Rijns, “CMOS low-distortion high-frequency variable-gain am-
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A Systematic Approach in Constructing Fully Differential
Amplifiers
Gonggui Xu and Sherif H. K. Embabi
Abstract—The design of a common mode feedback for multistage ampli-
fiers is a difficult process. Based on constructing the common mode feed-
back path to be topologically similar to the differential mode path, a sys-
tematic mapping approach for deriving a fully differential amplifier, from
its single-ended counterpart, is presented. The motivation, usage, and effi-
ciency of the proposed approach is demonstrated by two examples.
Index Terms—Analog integrated circuits, differential amplifiers.
I. INTRODUCTION
In integrated circuit design, fully differential amplifiers are popular
because they have better power supply rejection ratio (PSRR) than their
single-ended counterparts. For high gain fully differential amplifiers,
an internal common mode feedback (CMFB) path must be added to es-
tablish a common mode (i.e., average) output voltage over all working
frequencies. Two tasks exist in the construction of a CMFB path: how to
generate a CMFB control signal, and where to inject the CMFB control
signal back into the biasing. The CMFB control signal can be gener-
ated either by a continuous-time approach or by a switched-capacitor
approach, the detailed discussion can be found in [1]. In this brief, our
discussion is restricted to the injection of the continuous-time CMFB
control signal back into the differential mode path.
Two multi-stage fully differential amplifier topologies can be found
in the literature [2], [3]. It is interesting to see that in both topologies,
the CMFB control signal is injected back into the first stage. Is there
Manuscript received March 1999; revised June 2000. This work was sup-
ported in part by Semiconductor Research Corporation. This paper was recom-
mended by Associate Editor G. DeVeirman.
The authors were with Department of Electrical Engineering, Texas A& M
University, College Station, TX 77843 USA. They are now with Texas Instru-
ment Incorporated, Dallas, TX 75243 USA.
Publisher Item Identifier S 1057-7130(00)09932-8.
1057–7130/00$10.00 © 2000 IEEE
any particular reason that the first stage is preferred over other stages?
How is the CMFB path compensated? In this brief, we will try to an-
swer above questions and a systematic approach for constructing fully
differential amplifiers will be formulated.
The rest of the paper is organized as follows. In Section II, a two-
stage Miller amplifier will be used as an example to present the moti-
vation and procedure of the proposed approach. In Section III, a more
complicated four-stage amplifier topology is used as another example
to verify the efficiency of the proposed approach. The conclusion is
given in Section IV.
II. MOTIVATION AND PROCEDURE
The two-stage Miller amplifier, shown in Fig. 1, will be considered
to discuss the properties of fully differential amplifiers and the CMFB
V
path requirement. The CMFB control signal ctrl in Fig. 1 is injected
back into the first stage of the two differential channels, as in [2], [3].
The reasons for that is discussed next.
When the circuit, shown in Fig. 1, operates in the differential mode,
there is no common-mode variation and the CMFB circuit can be ig-
nored. The differential mode small-signal model for one channel can
be depicted as in Fig. 2, where gm1 and gm2 are transconductances
of transistors M1(M2) and M9(M10), respectively. The CMFB path of
V
Fig. 1 consists of two parts: from the average output cm , (point a) to
V V
the feedback control signal ctrl (point b) and from ctrl (point b) to
the two amplifier outputs (point c). The first part (from a to b) has much
larger bandwidth and smaller DC gain (approximately 01 if properly
designed). Most of the CMFB frequency characteristics is determined
by the second part (from b to c). The single channel small signal model
of the second part is shown in Fig. 3 where gmc and gm2 are transcon-
ductances of transistors M3(M4) and M9(M10), respectively.
Comparing Fig. 3 with Fig. 2, one can see that two small-signal
models share the same compensation capacitor Cm and gm2 stage, and
hence, are topologically similar. This is an important observation. The
similarity of the topologies leads to a stable CMFB path if the differ-
ential mode path is stable. This can be explained by their transfer func-
tions which are given by
Vout 0gmc Cm s + gmc gm2
Vctrl = s2CmCL + sCmgm2 + go1go2 (1)
Vout = 0gm1Cms + gm1 gm2
Vin s2CmCL + sCmgm2 + go1 go2 (2)
V
where go1 and go2 are total output conductances at node 1 and out , V
respectively. Notice that above two equations are very similar, actually
the denominators are identical. Equation (1) shows that a high CMFB
gain (gmc gm2 =go1 go2 ) and a large CMFB bandwidth (gmc =Cm ) are
achieved.
The gain and bandwidth requirements for CMFB paths depend on
the amplifier’s common mode gain and bandwidth. For example, in
the circuit shown in Fig. 1, a differential pair is used in the input stage
and hence the circuit’s common mode has a small gain (approximately
gob gm2 =go1 go2 ) and a small bandwidth (approximately gob =Cm ),
where gob is the output conductance of bias current source transistors
M5 and M6; also the noise from this circuit’s positive power supply
1
is only amplified by a small gain (approximately gm gm2 =go1 go2 )
1
and it has a small bandwidth (approximately gm =Cm ), where gm 1
is the gm process mismatch between load transistor M3 and M4.
Therefore, the corresponding CMFB path gain and bandwidth can
be small. But, on the other hand, high CMFB path gain gives more
accurate common mode bias and large CMFB bandwidth improves the
PSRR at high frequencies. Therefore, a high CMFB gain and a large
1344 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 11, NOVEMBER 2000

Fig. 1. A fully differential Miller amplifier.

Fig. 2. Differential mode Miller amplifier model (one channel).

Fig. 5. A primitive fully differential Miller amplifier model.

Fig. 3. CMFB path Miller amplifier model (one channel).

Fig. 6. A generated fully differential Miller amplifier model.

Fig. 4. A single-ended Miller amplifier.

CMFB bandwidth are always preferred whenever they are achievable

(sometimes they come for free and can be well compensated when
the differential mode path is shared). This is the case in the circuit of
Fig. 1, and it has a high CMFB gain and a large CMFB bandwidth,
which is achieved by injecting the CMFB control signal back to the
first stage. Fig. 7. Four-stage NGCC amplifier model.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 11, NOVEMBER 2000
TABLE I
g TO TRANSISTOR MAPPING TABLE
TABLE II
SIMULATED PERFORMANCE OF THE FULLY DIFFERENTIAL NGCC AMPLIFIER
The above discussion applies not only to the two-stage Miller ampli-
fier but also to the more general fully differential amplifiers including
the multi-stage amplifiers in [2], [3]. This explains why in all of these
fully differential amplifiers, the CMFB control signal is injected back
into the first stage.
The concept of sharing and topology similarity also allow for devel-
oping a systematic approach to construct fully differential amplifiers.
It will be demonstrated that the circuit shown in Fig. 1 can be derived
from its single-ended version shown in Fig. 4 [4], [5], by a small-signal
model-mapping approach.
The small-signal model for the circuit in Fig. 4 can also be described
by Fig. 2 [where Ml(M2), M10 corresponds to gm1 ; gm2 , respectively].
When two such single-ended models are put in parallel, a primitive
model for the fully differential amplifier is generated as shown in Fig. 5.
1345
Fig. 8. Generated fully differential NGCC amplifier model.
The primitive model is not complete because the CMFB is not
included. Typically, the stability requirements of the CMFB path
make it difficult to construct. But the sharing concept, as mentioned
earlier, will help us to develop the CMFB path. The basic idea is to
add the CMFB gm blocks such that the CMFB path is, topologically,
similar to the differential mode path. This similarity will give us a
well-compensated high CMFB gain with large CMFB bandwidth to
meet the CMFB requirements. In the case of the a two-stage Miller
amplifier, the final small-signal model is shown in Fig. 6, where two
gmc blocks are added. The CMFB path (gmc ; Cm and gm2 , inside the
dashed-line box) is topologically similar to the existing differential
mode path (gm1 ; Cm ; and gm2 ). The “CMFB” block is also added to
V
generate the feedback control signal ctrl .
The model, in Fig. 6, can be used to derive the actual transistor-level
circuit back which is shown in Fig. 1. Two gm1 blocks and two gmc
blocks can be implemented using a differential pair: transistors M1,
M2 for gm1 and transistors M3, M4 for gmc . Two gm2 blocks can be
implemented using transistors M9, M10. Indeed, a fully differential
amplifier has been developed by the topology-mapping approach.
The above procedures can be formulated into a systematic approach.
1) Construct the small-signal model for the desired single-ended
amplifier.
2) Construct a primitive fully differential amplifier small-signal
model by placing two identical single-ended amplifier models
in parallel.
3) Select the CMFB injection points in the differential mode path
such that the CMFB path model is topologically similar to the
differential mode model. The resulting model is the final fully
differential amplifier model.
4) Map the final model back to the transistor level circuit to derive
the final fully differential amplifier circuit.
This approach seems to be more useful for three or more stage am-
plifiers, when the structures are more complicated. This will be demon-
strated in the next section when this approach is applied to develop a
four-stage nested gm capacitance compensation (NGCC) fully differ-
ential amplifier.
1346 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 47, NO. 11, NOVEMBER 2000
Fig. 9. Generated fully differential NGCC amplifier circuit.
III. FOUR-STAGE FULLY DIFFERENTIAL NGCC AMPLIFIER
DEVELOPMENT
The single-ended four-stage NGCC amplifier topology, as shown in
Fig. 7, is proposed in [6]. In this topology, the main signal path con-
sists of four stages (gm1 ; gm2 ; gm3 ; gm4 ); three intermediate nodes
are compensated by capacitors (Cm1 ; Cm2 ; Cm3 ), and three feedfor-
ward transconductances (gmf 1 ; gmf 2 ; gmf 3 ) help cancel the right half
plane zeros. This topology has a poor PSRR, especially at high frequen-
cies when compensation capacitor Cm3 becomes short and make the
last stage gm4 diode-connected. One approach to solve this problem is
to use a fully differential topology. Because the four-stage single-ended
NGCC topology itself is a complicated structure, one can expect the de-
velopment of its fully differential version to be difficult.
A four-stage fully differential NGCC topology developed by the pro-
posed systematic appoach is shown in Fig. 8. As suggested in the pre-
vious section, the topology similarity between the differential mode
path and the CMFB path (inside the dashed-line box) is exploited. The
three main stages (gm2 , gm3 , gm4 ) are shared, and the CMFB injection
block gmc1 is similar to the input stage gm1 in the differential mode
path. Also, two feedforward stages (gmf 2 , gmf 3 ) are shared and an-
other CMFB injection block gmc4 acts as an imitation of the input feed-
forward stage gmf 1 in the differential mode path. Finally, three com-
pensation capacitors (Cm1 , Cm2 , Cm3 ), are fully shared. The “CMFB”
V
block generates the CMFB control signal ctrl for negative common
mode feedback.
It can be shown that the CMFB dc gain is
gmc1 gm2 gm3 gm4 =goL go1 go2 go3 and is similar to the differential
mode DC gain gm1 gm2 gm3 gm4 =goL go1 go2 go3 [6] (where go1 ,
V V
go2 , 9o3 , and goL are total output conductances at nodes 1 , 2 ,
V 3 , andV out , respectively). Also, it can be shown that the CMFB
unity-gain frequency is gmc1 =Cm1 and is similar to the differential
mode unity-gain frequency gm1 =Cm1 [6]. This high CMFB gain and
bandwidth will help to improve PSRR.
A CMOS implementation for the fully differential topology in Fig. 8
is shown in Fig. 9. Notice that the negative transconductance block is
implemented by an inverting stage (or simply a transistor) and the pos-
itive transconductance block is implemented by a noninverting stage
(or a cross coupling transistor). For example, a one-to-one mapping
(between the right channel of Fig. 9 and the upper channel in Fig. 8)
is described in Table I. Notice that in Fig. 9, two channels are com-
bined. More specifically, two gm1 blocks and two gmc1 blocks are im-
plemented by a differential pair (transistors M1, M2, M5, M6, M9 and
M10), two gmf 1 blocks, and two gmc4 blocks are implemented by an-
other differential pair (transistors M3, M4, M7, M8, M11 and M12).
These two differential pairs greatly improve the common mode rejec-
tion ratio.
To verify the proposed approach, this circuit was implemented in the
AMI 1.2 m process. Its simulation results are summarized in Table II.
It can be seen that the differential mode and CMFB path have similar
dc gain, unity-gain bandwidth, and phase margin performance.
IV. CONCLUSION
The systematic approach for the development of fully differential
amplifiers is proposed and explained by two examples. The main ben-
efit of this approach is that the developed continuous-time CMFB path
can have a high gain, a large bandwidth, and can still be stable because
the differential mode compensation scheme is shared.
ACKNOWLEDGMENT
The authors would like to thank those anonymous reviewers for their
insightful comments.
REFERENCES
[1] D. A. Johns and K. Martin, Design of Analog Integrated Circuits and
Systems. New York: Wiley, 1997.
[2] I. Fujimori and T. Sugimoto, “A 1.5 v, 4.1 mW dual-channel audio
delta–sigma D/A converter,” IEEE J. Solid-State Circuits, vol. 33, pp.
1863–1870, Dec. 1998.
[3] S. Pernici, G. Nicollini, and R. Castello, “A CMOS low-distortion fully
differential power amplifier with double nested miller compensation,”
IEEE J. Solid-State Circuits, vol. 28, pp. 758–763, July 1993.
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[4] P. R. Gray and R. G. Meyer, Analysis and Design of Analog Inegrated
Circuits. New York: Wiley, 1993, pp. 460–463.
[5] K. R. Laker and W. M. C. Sansen, Design of Analog Integrated Circuits
and Systems. New York: McGraw-Hill, 1994, pp. 486–523.
[6] F. You, S. Embabi, and E. Sanchez, “Multistage amplifier topologies
with nested G –C compensation,” IEEE J. Solid-State Circuits, vol. 32,
pp. 2000–2011, Dec. 1997.
= 1 +1 E j
magnitude equalization. The case of additional phase equalization will
be discussed in Sections VI and VII.
Usually, the equalizer and the system to be equalized are arranged
in cascade. The magnitude response of the equalizer can then be ex-
pressed as
E j

S (ej
)j
H e H e (1)
jH

( )
where jHS ej
j is the magnitude response of the system to be equal-
1 ( )
ized, and jHE ej
j is the magnitude response error of the equal-
izer. The latter will show good behavior if the magnitude response of
Frequency-Domain Design Method for Linear-Phase and the equalizer is optimized. It may, for instance, be equiripple. How-
Minimum-Phase FIR Equalizers ever, the magnitude response of the whole system, which consists of
the equalizer and the system to be equalized, is to be optimized rather
Peter Nagel
than the magnitude response of the equalizer itself. It can be expressed
as
j
= j
1 j

Abstract—First we show that generally, the attenuation of equalizers

should be optimized rather than their magnitude responses. Then we HW e H E e H S e : (2)
present an algorithm for the design of linear-phase finite-impulse response
(FIR) filters with Chebyshev approximation of desired attenuation From the last equation, by inserting (1) we obtain
functions. The design is quite similar to the Parks–McClellan algorithm,
with two decisive deviations. The first concerns the choice of a weighting
function, and secondly, we modify the Remez algorithm in order to be H W e
j
=1+1 H E e
j
1 H S e
j
: (3)
able to approximate also nontrivial attenuation functions. Finally, we
extend our design to minimum-phase FIR filters, which can also equalize Hence, the magnitude response error of the whole system is given by
the phase response of minimum-phase systems. We show that here, phase
optimization is a consequence of attenuation optimization. 1 H W e
j
=1 H E e
j
1 H S j

e (4)

I. INTRODUCTION meaning that it does not necessarily have a good behavior if

1j E ( jj

)j
H e has one. In particular, it will not be equiripple if
Digital equalizers are often designed in the time domain (e.g., [9]),
while linear-phase FIR filters are mostly designed in the frequency do-
1j E ( )j
H e is equiripple, and further it will perform badly in
frequency regions where the system to be equalized has great values
main [7]. This brief presents a frequency domain approach to linear-
of its magnitude response.
phase and minimum-phase finite-impulse response (FIR) digital equal-
In the following, we will show that a far better result can be obtained
izers. We show, however, that here, the attenuation should be optimized
by optimizing the attenuation of the equalizer. This can be expressed as
rather than the magnitude response (see Section II). The design is based
on the Parks–McClellan algorithm for linear-phase FIR filters [7]. In a E (
) = 0aS (
) + 1aE (
) (5)
Section III, for convenience, we repeat fundamentals of this design,
and in Section IV, we show that with a special choice of weighting where aS (
) is the attenuation of the system and aE the attenu- 1 (
)
function, Chebyshev approximations of desired attenuation functions ation error of the equalizer. The attenuation of the total system can be
can be obtained. In Section V, we present the Remez algorithm, on calculated from
which the design is based. It has been modified in order to be able to
approximate also more complicated attenuation functions. In Section W (
) = aE (
) + aS (
)
a (6)
VI, we first show that phase optimization is also a good choice for an
equalizer, and that in the minimum-phase case phase optimization is a and inserting (5) yields the simple equation
consequence of attenuation optimization. Then we adopt a well-known
method for obtaining a minimum-phase FIR filter from a linear-phase W (
) = 1aE (
):
a (7)
one to the special case of equalizers with Chebyshev approximation of
Therefore, if we optimize the attenuation of the equalizer, we also
desired attenuation functions. Finally, although it is not the subject of
directly optimize the attenuation of the total system. In particular, if
this paper, Section VII contains a short note on equalization of non-
minimum-phase systems.
aE (
) is a Chebyshev approximation of the desired function 0aS , (
)
then the attenuation of the whole system is a Chebyshev approximation
of the constant 0. This is just what we desire, particularly because then
II. TWO PRINCIPLES OF MAGNITUDE EQUALIZATION the magnitude response of the whole system is a Chebyshev approxi-
In designing equalizers, we can distinguish two cases: in the mation of a constant value which is close to 1.
first, only magnitude equalization is required, and in the second, Therefore, in the following, we present design procedures for linear-
phase equalization is desired, too. In this section, we only care for phase and minimum-phase FIR filters, which yield Chebyshev approx-
imations of desired attenuation functions. Fortunately, this can be ob-
tained with a modified version of the Parks–McClellan algorithm [7].
Manuscript received April 1999; revised May 2000. This paper was recom-
mended by Associate Editor V. Madisetti.
The author is with Digital Signal Processing Group, Department of Electrical III. DESIGN FUNDAMENTALS
Engineering, University of Kaiserslautern, Kaiserslautern, Germany (e-mail:
pnagel@rhrk.uni-kl.de). In this section, we only consider linear-phase equalizers. The min-
Publisher Item Identifier S 1057-7130(00)09330-7. imum-phase case will be treated later.

1057–7130/00$10.00 © 2000 IEEE