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Colour Television Chassis

Q552.1A
LA

18991_000_100531.eps
100531

Contents Page Contents Page


1. Revision List 2 B04 820400089526 Analog I/O 172
2. Technical Specifications, Diversity, and Connections2 B05 820400089535 DDR 177
3. Precautions, Notes, and Abbreviation List 6 B05 820400089832 DDR 178
4. Mechanical Instructions 10 B06 820400089572 LVDS Non DVBS 179
5. Service Modes, Error Codes, and Fault Finding 20 B09 820400089812 Non DVBS Con. 187
6. Alignments 39 B13 820400090731 TCON AL CPLD 188
7. Circuit Descriptions 46 B14 820400090713 TCON SHARP 190
8. IC Data Sheets 58 B14 820400090715 TCON SHARP 196
9. Block Diagrams 310431363643 SSB Layout 202
Wiring diagram Matisse 42" 69 310431364003 SSB Layout 210
Wiring diagram Matisse 46" - 52" 70 310431364005 SSB Layout 214
Wiring diagram Da Vinci 40" - 46" 71 11. Styling Sheets
Block Diagram Video 72 Matisse 32" - 52" 218
Block Diagram Audio 73 Da Vinci 40" - 46" 219
Block Diagram Control & Clock Signals 74
Block Diagram I2C 75
Supply Lines Overview 76
10. Circuit Diagrams and PWB Layouts Drawing PWB
AL1 820400089786 AmbiLight Common 77 86
AL2 820400089691 9 LED LiteOn 79 86
AL2 820400089703 15 LED LiteOn 81 86
AL3 820400089712 21 LED LiteOn 83 86
AL1 820400090592 AmbiLight Common 87 93
AL2 820400090601 9 LED Everlight 89 93
AL2 820400090621 15 LED Everlight 91 93
B01 820400089943 Tuner, HDMI & CI 94
B01 820400089945 Tuner, HDMI & CI 105
B02 820400089505 PNX85500 116
B02 820400089506 PNX85500 125
B02 820400089507 PNX85500 134
B03 820400089514 CLASS D 143
B03 820400089515 CLASS D 151
B03 820400089516 CLASS D 159
B04 820400089524 Analog I/O 167

©
Copyright 2010 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.

Published by ER/TY 1071 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18992
2010-Nov-12
EN 2 1. Q552.1A LA Revision List

1. Revision List
Manual xxxx xxx xxxx.0
• First release.

Manual xxxx xxx xxxx.1


• All Chapters: added CTNs to the manual;
refer to Table 2-1.

Manual xxxx xxx xxxx.2


• All Chapters: added SSBs 3104 313 63644 and ...64005;
refer to Table 2-1.
• Chapter 5: added section 5.8.8 Guidelines Uart logging.
• Chapter 5: added SSB start-up instructions;
see Figure 5-13.
• Chapter 6: updated White point/TCON values; see
sections 6.3.1 and 6.3.2.

2. Technical Specifications, Diversity, and Connections


Index of this chapter:
2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections
2.4 Chassis Overview

Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the CTN links in Table
2-1. Here is product information available, as well as getting
started, user manuals, frequently asked questions and
software & drivers.

2010-Nov-12 back to
div. table
Technical Specifications, Diversity, and Connections Q552.1A LA 2. EN 3

Table 2-1 Described Model Numbers and Diversity

SSB 2 4 7 9 10
Mecha-
Conn nics Descriptions Wng Schematics

B06 (non-DVBS-LVDS)

B09 (non-DVBS-conn.)
B03 (DC/DC / Class D)
Additional Everlight
Common Everlight

B08 (DVBS-Supp.)
Additional LiteOn

B11 (TCON-LGD)

B14 (TCON-SHP)
Common LiteOn

B02 (PNX85500)

B13 (Ambilight)
B07 (DVBS-FE)
B01 (Tuner)

B05 (DDR)
AmbiLight
Assembly
Dressing
3104 313

Removal

B04 (I/O)
Diagram
TCON
Tuner
Styling
Wire

PSU
CTN styling sh.
40PFL6605/98 da Vinci 64003 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
40PFL6605D/93 da Vinci 64003 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
40PFL6655D/93 da Vinci 64003 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
40PFL6665D/93 da Vinci 64003 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-4 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-7 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
42PFL8605D/93 Matisse 63643 2.3 4-1 4.4 7.2 7.4.1 7.8 - 9-1 10-1 10-2 10-6 10-7 10- 10- 10- 10- 10- 10-22 - - 10-24 - - -
11-1 10 13 15 18 20
63644 2.3 4-1 4.4 7.2 7.4.1 7.8 - 9-1 10-1 10-2 10-6 10-7 10- 10- 10- 10- 10- 10-23 - - 10-24 - - -
11 14 17 19 20
42PFL8605/98 Matisse 63643 2.3 4-1 4.4 7.2 7.4.1 7.8 - 9-1 10-1 10-2 10-6 10-7 10- 10- 10- 10- 10- 10-22 - - 10-24 - - -
11-1 10 13 15 18 20
63644 2.3 4-1 4.4 7.2 7.4.1 7.8 - 9-1 10-1 10-2 10-6 10-7 10- 10- 10- 10- 10- 10-23 - - 10-24 - - -
11 14 17 19 20
46PFL6605/98 da Vinci 64003 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
46PFL6605D/93 da Vinci 64003 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
46PFL6655D/93 da Vinci 64003 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
46PFL6665D/93 da Vinci 64003 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-25 10-27
11-2 10 12 15 18 21
64005 2.3 4-5 4.5 7.2 7.4.1 7.8 7.8 9-3 - - 10-6 10-8 10- 10- 10- 10- 10- - - - - - 10-26 10-28
11 14 16 19 21
46PFL8605/98 Matisse 63643 2.3 4-2 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-3 10-6 10-8 10- 10- 10- 10- 10- 10-22 - - 10-24 - - -
11-1 10 13 15 18 20
63644 2.3 4-2 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-3 10-6 10-8 10- 10- 10- 10- 10- 10-23 - - 10-24 - - -
11 14 17 19 20
46PFL8605D/93 Matisse 63643 2.3 4-2 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-3 10-6 10-8 10- 10- 10- 10- 10- 10-22 - - 10-24 - - -
11-1 10 13 15 18 20
63644 2.3 4-2 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-3 10-6 10-8 10- 10- 10- 10- 10- 10-23 - - 10-24 - - -
11 14 17 19 20
52PFL8605/98 Matisse 63643 2.3 4-3 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-4 - - 10- 10- 10- 10- 10- 10-22 - - 10-24 - - -
11-1 10 13 15 18 20
63644 2.3 4-3 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-4 - - 10- 10- 10- 10- 10- 10-23 - - 10-24 - - -
11 14 17 19 20
52PFL8605D/93 Matisse 63643 2.3 4-3 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-4 - - 10- 10- 10- 10- 10- 10-22 - - 10-24 - - -
11-1 10 13 15 18 20
63644 2.3 4-3 4.4 7.2 7.4.1 7.8 - 9-2 10-1 10-4 - - 10- 10- 10- 10- 10- 10-23 - - 10-24 - - -
11 14 17 19 20

Note to the Described Model and Diversity Table:


Not all (circuit-) descriptions and (block-) schematics in this
Service Manual apply to all sets. Use the hyperlinks in this table
to lead you through this manual.

2.2 Directions for Use

You can download this information from the following websites:


http://www.philips.com/support
http://www.p4c.philips.com

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EN 4 2. Q552.1A LA Technical Specifications, Diversity, and Connections

2.3 Connections

4 7 8 9

5 6
2

10 11 12 12 13 14 15 16

18990_001_100401.eps
100401

Figure 2-1 Connection overview

Note: The following connector colour abbreviations are used 4 - D1+ Data channel j
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= 5 - Shield Gnd H
Grey, Rd= Red, Wh= White, Ye= Yellow. 6 - D1- Data channel j
7 - D0+ Data channel j
2.3.1 Side Connections 8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
1 - Common Interface
11 - Shield Gnd H
68p - See diagram B01F HDMI & CI jk
12 - CLK- Data channel j
13 - Easylink/CEC Control channel jk
2 - USB2.0
14 - n.c.
15 - DDC_SCL DDC clock j
1 2 3 4 16 - DDC_SDA DDC data jk
10000_022_090121.eps 17 - Ground Gnd H
090121 18 - +5V j
19 - HPD Hot Plug Detect j
Figure 2-2 USB (type A) 20 - Ground Gnd H

1 - +5V k 2.3.2 Rear Connections


2 - Data (-) jk
3 - Data (+) jk
4 - RJ45: Ethernet (optional)
4 - Ground Gnd H
12345678
3 - HDMI: Digital Video, Digital Audio - In
19 1
18 2
10000_025_090121.eps
10000_017_090121.eps 090121
090428
Figure 2-4 Ethernet connector
Figure 2-3 HDMI (type A) connector
1 - TD+ Transmit signal k
1 - D2+ Data channel j 2 - TD- Transmit signal k
2 - Shield Gnd H 3 - RD+ Receive signal j
3 - D2- Data channel j 4 - CT Centre Tap: DC level fixation

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Technical Specifications, Diversity, and Connections Q552.1A LA 2. EN 5

5 - CT Centre Tap: DC level fixation 11 - Shield Gnd H


6 - RD- Receive signal j 12 - CLK- Data channel j
7 - GND Gnd H 13 - Easylink/CEC Control channel jk
8 - GND Gnd H 14 - ARC Audio Return Channel k
15 - DDC_SCL DDC clock j
5 - CVI 2: Cinch: Video YPbPr - In, Audio - In 16 - DDC_SDA DDC data jk
Gn - Video Y 1 VPP / 75 ohm jq 17 - Ground Gnd H
Bu - Video Pb 0.7 VPP / 75 ohm jq 18 - +5V j
Rd - Video Pr 0.7 VPP / 75 ohm jq 19 - HPD Hot Plug Detect j
Rd - Audio - R 0.5 VRMS / 10 kohm jq 20 - Ground Gnd H
Wh - Audio - L 0.5 VRMS / 10 kohm jq
14 - Cinch: Audio - In (VGA/DVI)
6 - Service Connector (UART) Rd - Audio R 0.5 VRMS / 10 kohm jq
1 - Ground Gnd H Wh - Audio L 0.5 VRMS / 10 kohm jq
2 - UART_TX Transmit k
3 - UART_RX Receive j 15 - Aerial - In
- - IEC-type (EU) Coax, 75 ohm D
7 - Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 VPP / 75 ohm jq 16 - VGA: Video RGB - In
Wh - Audio L 0.5 VRMS / 10 kohm jq 1 5

jq
10
Rd - Audio R 0.5 VRMS / 10 kohm 11
6
15

10000_002_090121.eps
8 - S-Video (Hosiden): Video Y/C - In 090127

1 - Ground Y Gnd H
Figure 2-6 VGA Connector
2 - Ground C Gnd H
3 - Video Y 1 VPP / 75 ohm j
4 - Video C 0.3 VPPP / 75 ohm j 1 - Video Red 0.7 VPP / 75 ohm j
2 - Video Green 0.7 VPP / 75 ohm j
3 - Video Blue 0.7 VPP / 75 ohm j
9 - Head phone (Output) (optional)
4 - n.c.
Bk - Head phone 32 - 600 ohm / 10 mW ot
5 - Ground Gnd H
6 - Ground Red Gnd H
2.3.3 Rear Connections - Bottom 7 - Ground Green Gnd H
8 - Ground Blue Gnd H
10 - CVI 1: Video RGB - In, CVBS - In/Out, Audio - In/Out 9 - +5VDC +5 V j
See 5 - CVI 2: Cinch: Video YPbPr - In, Audio - In 10 - Ground Sync Gnd H
11 - n.c.
11 - Cinch: S/PDIF - Out 12 - DDC_SDA DDC data j
Bk - Coaxial 0.4 - 0.6VPP / 75 ohm kq 13 - H-sync 0-5V j
14 - V-sync 0-5V j
12 - HDMI 2 (& 3 optional): Digital Video, Digital Audio - In 15 - DDC_SCL DDC clock j
See 3 - HDMI: Digital Video, Digital Audio - In

13 - HDMI 1: Digital Video - In, Digital Audio with ARC - In/


Out
19 1
18 2

10000_017_090121.eps
090428

Figure 2-5 HDMI (type A) connector

1 - D2+ Data channel j


2 - Shield Gnd H
3 - D2- Data channel j
4 - D1+ Data channel j
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

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EN 6 3. Q552.1A LA Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List


Index of this chapter: • Where necessary, measure the waveforms and voltages
3.1 Safety Instructions with (D) and without (E) aerial signal. Measure the
3.2 Warnings voltages in the power supply section both in normal
3.3 Notes operation (G) and in stand-by (F). These values are
3.4 Abbreviation List indicated by means of the appropriate symbols.

3.3.2 Schematic Notes


3.1 Safety Instructions
• All resistor values are in ohms, and the value multiplier is
Safety regulations require the following during a repair:
often used to indicate the decimal point location (e.g. 2K2
• Connect the set to the Mains/AC Power via an isolation
indicates 2.2 kΩ).
transformer (> 800 VA).
• Resistor values with no multiplier may be indicated with
• Replace safety components, indicated by the symbol h,
either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
only by components identical to the original ones. Any
• All capacitor values are given in micro-farads (μ = × 10-6),
other component substitution (other than original type) may
nano-farads (n = × 10-9), or pico-farads (p = × 10-12).
increase risk of fire or electrical shock hazard.
• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
Safety regulations require that after a repair, the set must be
• An “asterisk” (*) indicates component usage varies. Refer
returned in its original condition. Pay in particular attention to
to the diversity tables for the correct values.
the following points:
• The correct component values are listed on the Philips
• Route the wire trees correctly and fix them with the
Spare Parts Web Portal.
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage. 3.3.3 Spare Parts
• Check the strain relief of the Mains/AC Power cord for
proper function. For the latest spare part overview, consult your Philips Spare
• Check the electrical DC resistance between the Mains/AC Part web portal.
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply): 3.3.4 BGA (Ball Grid Array) ICs
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug. Introduction
2. Set the Mains/AC Power switch to the “on” position For more information on how to handle BGA devices, visit this
(keep the Mains/AC Power cord unplugged!). URL: http://www.atyourservice-magazine.com. Select
3. Measure the resistance value between the pins of the “Magazine”, then go to “Repair downloads”. Here you will find
Mains/AC Power plug and the metal shielding of the Information on how to deal with BGA-ICs.
tuner or the aerial connection on the set. The reading
should be between 4.5 MΩ and 12 MΩ.
BGA Temperature Profiles
4. Switch “off” the set, and remove the wire between the
For BGA-ICs, you must use the correct temperature-profile.
two pins of the Mains/AC Power plug.
Where applicable and available, this profile is added to the IC
• Check the cabinet for defects, to prevent touching of any
Data Sheet information section in this manual.
inner parts by the customer.

3.3.5 Lead-free Soldering


3.2 Warnings
Due to lead-free technology some rules have to be respected
• All ICs and many other semiconductors are susceptible to by the workshop during a repair:
electrostatic discharges (ESD w). Careless handling • Use only lead-free soldering tin. If lead-free solder paste is
during repair can reduce life drastically. Make sure that, required, please contact the manufacturer of your soldering
during repair, you are connected with the same potential as equipment. In general, use of solder paste within
the mass of the set by a wristband with resistance. Keep workshops should be avoided because paste is not easy to
components and tools also at this same potential. store and to handle.
• Be careful during measurements in the high voltage • Use only adequate solder tools applicable for lead-free
section. soldering tin. The solder tool must be able:
• Never replace modules or other components while the unit – To reach a solder-tip temperature of at least 400°C.
is switched “on”. – To stabilize the adjusted temperature at the solder-tip.
• When you align the set, use plastic rather than metal tools. – To exchange solder-tips for different applications.
This will prevent any short circuits and the danger of a • Adjust your solder tool so that a temperature of around
circuit becoming unstable. 360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
3.3 Notes tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
3.3.1 General reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
• Measure the voltages and waveforms with regard to the tin/parts is possible but PHILIPS recommends strongly to
chassis (= tuner) ground (H), or hot ground (I), depending avoid mixed regimes. If this cannot be avoided, carefully
on the tested area of circuitry. The voltages and waveforms clear the solder-joint from old tin and re-solder with new tin.
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo 3.3.6 Alternative BOM identification
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for It should be noted that on the European Service website,
NTSC (channel 3). “Alternative BOM” is referred to as “Design variant”.

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Precautions, Notes, and Abbreviation List Q552.1A LA 3. EN 7

The third digit in the serial number (example: 3.4 Abbreviation List
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the 0/6/12 SCART switch control signal on A/V
specific TV set. In general, it is possible that the same TV
board. 0 = loop through (AUX to TV),
model on the market is produced with e.g. two different types
6 = play 16 : 9 format, 12 = play 4 : 3
of displays, coming from two different suppliers. This will then format
result in sets which have the same CTN (Commercial Type
AARA Automatic Aspect Ratio Adaptation:
Number; e.g. 28PW9515/12) but which have a different B.O.M.
algorithm that adapts aspect ratio to
number. remove horizontal black bars; keeps
By looking at the third digit of the serial number, one can
the original aspect ratio
identify which B.O.M. is used for the TV set he is working with.
ACI Automatic Channel Installation:
If the third digit of the serial number contains the number “1” algorithm that installs TV channels
(example: AG1B033500001), then the TV set has been
directly from a cable network by
manufactured according to B.O.M. number 1. If the third digit is
means of a predefined TXT page
a “2” (example: AG2B0335000001), then the set has been ADC Analogue to Digital Converter
produced according to B.O.M. no. 2. This is important for
AFC Automatic Frequency Control: control
ordering the correct spare parts!
signal used to tune to the correct
For the third digit, the numbers 1...9 and the characters A...Z frequency
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
AGC Automatic Gain Control: algorithm that
indicated by the third digit of the serial number.
controls the video input of the feature
box
Identification: The bottom line of a type plate gives a 14-digit AM Amplitude Modulation
serial number. Digits 1 and 2 refer to the production centre (e.g. AP Asia Pacific
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers AR Aspect Ratio: 4 by 3 or 16 by 9
to the Service version change code, digits 5 and 6 refer to the ASF Auto Screen Fit: algorithm that adapts
production year, and digits 7 and 8 refer to production week (in aspect ratio to remove horizontal black
example below it is 2006 week 17). The 6 last digits contain the bars without discarding video
serial number. information
ATSC Advanced Television Systems
MODEL : 32PF9968/10 MADE IN BELGIUM Committee, the digital TV standard in
220-240V ~ 50/60Hz the USA
128W
ATV See Auto TV
PROD.NO: AG 1A0617 000001 VHF+S+H+UHF
Auto TV A hardware and software control
S BJ3.0E LA system that measures picture content,
and adapts image parameters in a
10000_024_090121.eps dynamic way
100105
AV External Audio Video
AVC Audio Video Controller
Figure 3-1 Serial number (example)
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
3.3.7 Board Level Repair (BLR) or Component Level Repair carrier distance is 5.5 MHz
(CLR) BDS Business Display Solutions (iTV)
BLR Board-Level Repair
If a board is defective, consult your repair procedure to decide BTSC Broadcast Television Standard
if the board has to be exchanged or if it should be repaired on Committee. Multiplex FM stereo sound
component level. system, originating from the USA and
If your repair procedure says the board should be exchanged used e.g. in LATAM and AP-NTSC
completely, do not solder on the defective board. Otherwise, it countries
cannot be returned to the O.E.M. supplier for back charging! B-TXT Blue TeleteXT
C Centre channel (audio)
3.3.8 Practical Service Precautions CEC Consumer Electronics Control bus:
remote control bus on HDMI
• It makes sense to avoid exposure to electrical shock. connections
While some sources are expected to have a possible CL Constant Level: audio output to
dangerous impact, others of quite high potential are of connect with an external amplifier
limited current and are sometimes held in less regard. CLR Component Level Repair
• Always respect voltages. While some may not be ComPair Computer aided rePair
dangerous in themselves, they can cause unexpected CP Connected Planet / Copy Protection
reactions that are best avoided. Before reaching into a CSM Customer Service Mode
powered TV set, it is best to test the high voltage insulation. CTI Color Transient Improvement:
It is easy to do, and is a good service precaution. manipulates steepness of chroma
transients
CVBS Composite Video Blanking and
Synchronization
DAC Digital to Analogue Converter
DBE Dynamic Bass Enhancement: extra
low frequency amplification
DCM Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV).
DDC See “E-DDC”
D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion

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EN 8 3. Q552.1A LA Precautions, Notes, and Abbreviation List

DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote ITV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I2 C Inter IC bus software upgrade via RF transmission.
I2 D Inter IC Data bus Upgrade software is broadcasted in
I2 S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (color
Telecommunication Union relating to carrier= 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (color carrier PAL M=

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Precautions, Notes, and Abbreviation List Q552.1A LA 3. EN 9

3.575612 MHz and PAL N= 3.582056 SVHS Super Video Home System
MHz) SW Software
PCB Printed Circuit Board (same as “PWB”) SWAN Spatial temporal Weighted Averaging
PCM Pulse Code Modulation Noise reduction
PDP Plasma Display Panel SXGA 1280 × 1024
PFC Power Factor Corrector (or Pre- TFT Thin Film Transistor
conditioner) THD Total Harmonic Distortion
PIP Picture In Picture TMDS Transmission Minimized Differential
PLL Phase Locked Loop. Used for e.g. Signalling
FST tuning systems. The customer TS Transport Stream
can give directly the desired frequency TXT TeleteXT
POD Point Of Deployment: a removable TXT-DW Dual Window with TeleteXT
CAM module, implementing the CA UI User Interface
system for a host (e.g. a TV-set) uP Microprocessor
POR Power On Reset, signal to reset the uP UXGA 1600 × 1200 (4:3)
PSDL Power Supply for Direct view LED V V-sync to the module
backlight with 2D-dimming VESA Video Electronics Standards
PSL Power Supply with integrated LED Association
drivers VGA 640 × 480 (4:3)
PSLS Power Supply with integrated LED VL Variable Level out: processed audio
drivers with added Scanning output toward external amplifier
functionality VSB Vestigial Side Band; modulation
PTC Positive Temperature Coefficient, method
non-linear resistor WYSIWYR What You See Is What You Record:
PWB Printed Wiring Board (same as “PCB”) record selection that follows main
PWM Pulse Width Modulation picture and sound
QRC Quasi Resonant Converter WXGA 1280 × 768 (15:9)
QTNR Quality Temporal Noise Reduction XTAL Quartz crystal
QVCP Quality Video Composition Processor XGA 1024 × 768 (4:3)
RAM Random Access Memory Y Luminance signal
RGB Red, Green, and Blue. The primary Y/C Luminance (Y) and Chrominance (C)
color signals for TV. By mixing levels signal
of R, G, and B, all colors (Y/C) are YPbPr Component video. Luminance and
reproduced. scaled color difference signals (B-Y
RC Remote Control and R-Y)
RC5 / RC6 Signal protocol from the remote YUV Component video
control receiver
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
SSC Spread Spectrum Clocking, used to
reduce the effects of EMI
STB Set Top Box
STBY STand-BY
SVGA 800 × 600 (4:3)

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EN 10 4. Q552.1A LA Mechanical Instructions

4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Matisse styling (8000 series)
4.2 Cable Dressing da Vinci styling (6000 series)
4.3 Service Positions
4.4 Assy/Panel Removal Matisse Styling (8000 series)
4.5 Assy/Panel Removal da Vinci Styling (6000 series)
4.6 Set Re-assembly
4.1 Cable Dressing Matisse styling (8000 series)

Notes: Note: pictures are taken from the European equivalent (with
• Figures below can deviate slightly from the actual situation, SCART connector).
due to the different set executions.

18990_100_100401.eps
100401

Figure 4-1 Cable dressing 42" 8000-series

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Mechanical Instructions Q552.1A LA 4. EN 11

18990_101_100401.eps
100401

Figure 4-2 Cable dressing 46" 8000-series

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EN 12 4. Q552.1A LA Mechanical Instructions

18991_100_100601.eps
100601

Figure 4-3 Cable dressing 52" 8000-series

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Mechanical Instructions Q552.1A LA 4. EN 13

4.2 Cable Dressing da Vinci styling (6000 series)

18991_101_100601.eps
100601

Figure 4-4 Cable dressing 40" 6000-series

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EN 14 4. Q552.1A LA Mechanical Instructions

18991_102_100601.eps
100601

Figure 4-5 Cable dressing 46" 6000-series

4.3 Service Positions 4.4.2 Speakers

For easy servicing of a TV set, the set should be put face down Each speakerbox unit is mounted with two screws.
on a soft flat surface, foam buffers or other specific workshop When defective, replace the whole unit.
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.

4.4 Assy/Panel Removal Matisse Styling


(8000 series)

The instructions apply to the Q552.1E LA chassis


(40PFL7605H/12), but are similar for other models.

4.4.1 Rear Cover

Warning: Disconnect the mains power cord before you remove


the rear cover.
Note: it is not necessary to remove the stand while removing
the rear cover.

1. Remove all screws of the rear cover.


2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.

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Mechanical Instructions Q552.1A LA 4. EN 15

4.4.3 Main Power Supply 4.4.5 IR & LED Board

Refer to Figure 4-6 for details. Refer to Figure 4-8 for details.

2 2

1 1

2 2

1 1
3 1
3

2 2

18771_108_100504.eps 18771_110_100504.eps
100504 100504

Figure 4-6 Main Power Supply Figure 4-8 IR & LED Board

1. Unplug all connectors [1]. 1. Remove the stand.


2. Remove the fixation screws [2]. 2. Remove the IR & LED board cover [1].
3. Take the board out. Now the IR & LED board can be accessed.
When defective, replace the whole unit.
When defective, replace the whole unit.
4.4.4 Small Signal Board (SSB)
4.4.6 Keyboard Control Board
Refer to Figure 4-7 for details.
The keyboard control panel is mounted on the LCD panel with
two screws.
3
When defective, replace the whole unit.
3
4.4.7 Ambilight Units
1
1 Refer to Figure 4-9 for details.
2 Note: the Ambilight units are to be swapped on PWB level.
3

3 4 1
3 3 3

2
18771_109_100504.eps
100505
18771_111_100504.eps
100504
Figure 4-7 SSB
Figure 4-9 Ambilight units
1. Unplug all connectors [1].
2. Slide the side cover sidewards [2]. 1. Unplug the flat foil(s) [1].
3. Remove the fixation screws [3]. 2. Release the clips [2] that secure the PWB.
4. Lift the clip [4]. 3. Slide the PWB out of the set [3].
5. Remove the bottom cover downwards [5].
6. Take the board out. 4.4.8 LCD Panel

Refer to Figure 4-10 for details.


1. Remove the stand.
2. Remove all boards as described earlier.
3. Remove all cables from the set.
4. Remove the speaker boxes as earlier described.
5. Remove the IR & LED board cover as described earlier.
6. Remove the mains switch [1].
7. Remove the keyboard control panel as described earlier.
8. Remove the clamps [2]. Pay attention to the positioning
of the different screws!
9. Remove the plastic clamps [3].
10. Tilt the clamps [4] after having removed the screw.

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EN 16 4. Q552.1A LA Mechanical Instructions

11. Remove the Ambilight PWBs as earlier described.


12. Tilt the Ambilight subframes [5] after having removed the
screw.
Now the LCD Panel can be lifted from the front cabinet.

4 4 4 4

3 3

5 5

2 2 2 2

3 3

18771_112_100504.eps
100504

Figure 4-10 LCD Panel

Pay special attention to use the correct screws at the


proper location when mounting a new LCD panel!

Using the wrong screws will damage the LCD panel!

4.5 Assy/Panel Removal da Vinci Styling


(6000 series)

Instructions below apply to the LC9.3L LA chassis


(32PFL6605D/xx), but are similar for other models.

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Mechanical Instructions Q552.1A LA 4. EN 17

4.5.1 Rear Cover

2 2 2
3

3 3

2
3
3

2
1

3
3
2

2 2
2
1 1
2 2
2 2 1 1

18970_113_100326.eps
100326

Figure 4-11 Rear cover removal (32")

Warning: Disconnect the mains power cord before removing


the rear cover.
2 3 1 2
See Figure 4-11.
1. Remove fixation screws [2] and [3] that secure the rear
cover. It is not necessary to remove the stand first [1]. 1
2. Lift the rear cover from the TV. Make sure that wires and 1
flat foils are not damaged while lifting the rear cover from
the set.
2 2
4.5.2 Speakers

Tweeters (when applicable)


Each tweeter unit is mounted with one screw.
When defective, replace the whole unit.

Loudspeaker/subwoofer 1
The loudspeaker/subwoofer is located in the centre of the set,
2 3 2
and is fixed with two screws.
When defective, replace the whole unit. 18970_103_100323.eps
100323
4.5.3 Main Power Supply
Figure 4-12 Main Power Supply
Refer to Figure 4-12 for details.
1. Unplug all connectors [1].
2. Remove the fixation screws [2].
3. Take the board out.
When defective, replace the whole unit.
Be aware to (re)place the spacers [3].

4.5.4 Small Signal Board (SSB)

Refer to Figure 4-13 for details.

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EN 18 4. Q552.1A LA Mechanical Instructions

2 2

3
3
1

2 3
3
3

18970_104_100323.eps 18770_143_100215.eps
100323 100215

Figure 4-13 SSB Figure 4-15 IR & LED Board -2-

1. Unplug all connectors [1] and [2].


2. Remove the fixation screws [3].
3. Take the board out.
When defective, replace the whole unit. 4

4.5.5 Mains Switch 3 3

The mains switch assy is mounted below the PSU on the front
bezel with two screws.
When replacing the switch, remove it from its bracket.

4.5.6 IR & LED Board

Refer to Figure 4-14, Figure 4-15 and Figure 4-16 for details. 18770_144_100215.eps
100215

Figure 4-16 IR & LED Board -3-

1. Remove the stand [1].


2. Remove the IR & LED board cover [2].
3. Release the clips [3] that secure the IR & LED board.
4. Remove the connectors [4] on the IR/LED board.

4.5.7 Local Control Board

1 1 Refer to Figure 4-17 for details.


1. Unplug the connector on the IR & LED board that leads to
the Local Control board as described earlier.
2. Release the cable from its clamps/tape.
3. Release the clip on top of the unit [1] and take the unit out.
1 1
When defective, replace the whole unit.

18770_142_100215.eps
100215

Figure 4-14 IR & LED Board -1-

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Mechanical Instructions Q552.1A LA 4. EN 19

18770_145_100216.eps
100217

Figure 4-17 Local Control board

4.5.8 LCD Panel

Refer to Figure 4-18 for details. 5. Remove the Local Control board [F] as earlier described.
1. Remove the Stand and IR/LED board [A] as earlier 6. Remove the brackets [1].
described. 7. Remove the clamps [2].
2. Remove the Speakers/Subwoofer [B] as earlier described. 8. Remove the flare.
3. Remove the PSU [C] and SSB [D] as earlier described. Now the LCD Panel can be lifted from the front cabinet.
4. Remove the Mains Switch [E] as earlier described.

1 1

2 1
B 1 2

C D
2
2

1
1
1
1

E A
18970_112_100326.eps
100326

Figure 4-18 LCD Panel removal (based on 32" AL model)

4.6 Set Re-assembly • While re-assembling, make sure that all cables are placed
and connected in their original position.
To re-assemble the whole set, execute all processes in reverse • Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
order.

Notes:

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EN 20 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding


Index of this chapter: • All service-unfriendly modes (if present) are disabled, like:
5.1 Test Points – (Sleep) timer.
5.2 Service Modes – Child/parental lock.
5.3 Stepwise Start-up – Picture mute (blue mute or black mute).
5.4 Service Tools – Automatic volume levelling (AVL).
5.5 Error Codes – Skip/blank of non-favourite pre-sets.
5.6 The Blinking LED Procedure
5.7 Protections How to Activate SDM
5.8 Fault Finding and Repair Tips For this chassis there are two kinds of SDM: an analogue SDM
5.9 Software Upgrading and a digital SDM. Tuning will happen according Table 5-1.
• Analogue SDM: use the standard RC-transmitter and key
in the code “062596”, directly followed by the “MENU” (or
5.1 Test Points
“HOME”) button.
Note: It is possible that, together with the SDM, the main
As most signals are digital, it will be difficult to measure menu will appear. To switch it “off”, push the “MENU” (or
waveforms with a standard oscilloscope. However, several key "HOME") button again.
ICs are capable of generating test patterns, which can be Analogue SDM can also be activated by grounding for a
controlled via ComPair. In this way it is possible to determine moment the solder path on the SSB, with the indication
which part is defective. “SDM” (see Service mode pad).
• Digital SDM: use the standard RC-transmitter and key in
Perform measurements under the following conditions: the code “062593”, directly followed by the “MENU” (or
• Service Default Mode. "HOME") button.
• Video: Colour bar signal. Note: It is possible that, together with the SDM, the main
• Audio: 3 kHz left, 1 kHz right. menu will appear. To switch it “off”, push the “MENU” (or
"HOME") button again.
5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode


(SAM) offers several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between the call centre and the customer.

This chassis also offers the option of using ComPair, a


hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.
(see also section “5.4.1 ComPair”).

Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old “MENU”
button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM) SDM

Purpose
• To create a pre-defined setting, to get the same
measurement results as given in this manual.
• To override SW protections detected by stand-by
processor and make the TV start up to the step just before
protection (a sort of automatic stepwise start-up). See
18770_249_100215.eps
section “5.3 Stepwise Start-up”. 100407
• To start the blinking LED procedure where only LAYER 2
errors are displayed. (see also section “5.5 Error Codes”). Figure 5-1 Service mode pad

Specifications After activating this mode, “SDM” will appear in the upper right
corner of the screen (when a picture is available).
Table 5-1 SDM default settings
How to Navigate
Default When the “MENU” (or “HOME”) button is pressed on the RC
Region Freq. (MHz) system transmitter, the TV set will toggle between the SDM and the
normal user menu.
Europe, AP(PAL/Multi) 475.25 PAL B/G
Europe, AP DVB-T 546.00 PID DVB-T
How to Exit SDM
Video: 0B 06 PID
Use one of the following methods:
PCR: 0B 06 PID
• Switch the set to STAND-BY via the RC-transmitter.
Audio: 0B 07
• Via a standard customer RC-transmitter: key in “00”-
sequence.
• All picture settings at 50% (brightness, colour, contrast).
• Sound volume at 25%.

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 21

5.2.2 Service Alignment Mode (SAM) button and “XXX” (where XXX is the 3 digit decimal display
code as mentioned on the sticker in the set). Make sure to key
Purpose in all three digits, also the leading zero’s. If the above action is
• To perform (software) alignments. successful, the front LED will go out as an indication that the
• To change option settings. RC sequence was correct. After the display option is changed
• To easily identify the used software version. in the NVM, the TV will go to the Stand-by mode. If the NVM
• To view operation hours. was corrupted or empty before this action, it will be initialized
• To display (or clear) the error code buffer. first (loaded with default values). This initializing can take up to
20 seconds.
How to Activate SAM
Via a standard RC transmitter: Key in the code “062596”
directly followed by the “INFO” (or “OK”) button. After activating
SAM with this method a service warning will appear on the
Display Option
screen, continue by pressing the “OK” button on the RC. Code

Contents of SAM (see also Table 6-8)


39mm
• Hardware Info. PHILIPS 040

– A. SW Version. Displays the software version of the

27mm
MODEL:
32PF9968/10

main software (example: Q555X-1.2.3.4 = PROD.SERIAL NO:


AG 1A0620 000001

AAAAB_X.Y.W.Z). (CTN Sticker)


• AAAA= the chassis name.
E_06532_038.eps
• B= the SW branch version. This is a sequential 240108
number (this is no longer the region indication, as
the software is now multi-region). Figure 5-2 Location of Display Option Code sticker
• X.Y.W.Z= the software version, where X is the
main version number (different numbers are not
• Store - go right. All options and alignments are stored
compatible with one another) and Y.W.Z is the sub
when pressing “cursor right” (or the “OK” button) and then
version number (a higher number is always
the “OK”-button.
compatible with a lower number).
• Operation hours display. Displays the accumulated total
– B. STBY PROC Version. Displays the software
of operation hours of the screen itself. In case of a display
version of the stand-by processor.
replacement, reset to “0” or to the consumed operation
– C. Production Code. Displays the production code of
hours of the spare display.
the TV, this is the serial number as printed on the back
• SW Maintenance.
of the TV set. Note that if an NVM is replaced or is
– SW Events. In case of specific software problems, the
initialized after corruption, this production code has to
development department can ask for this info.
be re-written to NVM. ComPair will foresee in a
– HW Events. In case of specific software problems, the
possibility to do this.
development department can ask for this info :
• Operation Hours. Displays the accumulated total of
- Event 26 : refers to a power dip, this is logged after
operation hours (not the stand-by hours). Every time the
the TV set reboots due to a power dip.
TV is switched “on/off”, 0.5 hours is added to this number.
- Event 17 : refers to the power OK status, sensed
• Errors (followed by maximum 10 errors). The most recent
even before the 3 x retry to generate the error code.
error is displayed at the upper left (for an error explanation
• Test settings. For development purposes only.
see section “5.5 Error Codes”).
• Development file versions. Not useful for Service
• Reset Error Buffer. When “cursor right” (or the “OK”
purposes, this information is only used by the development
button) is pressed and then the “OK” button is pressed, the
department.
error buffer is reset.
• Upload to USB. To upload several settings from the TV to
• Alignments. This will activate the “ALIGNMENTS” sub-
an USB stick, which is connected to the SSB. The items are
menu. See Chapter 6. Alignments.
“Channel list”, “Personal settings”, “Option codes”,
• Dealer Options. Extra features for the dealers.
“Alignments”, “Identification data” (includes the set type
• Options. Extra features for Service. For more info
and prod code + all 12NC like SSB, display, boards),
regarding option codes, 6. Alignments.
“History list”. The “All” item supports to upload all several
Note that if the option code numbers are changed, these
items at once.
have to be confirmed with pressing the “OK” button before
First a directory “repair\” has to be created in the root
the options are stored, otherwise changes will be lost.
of the USB stick.
• Initialize NVM. The moment the processor recognizes a
To upload the settings, select each item separately, press
corrupted NVM, the “initialize NVM” line will be highlighted.
“cursor right” (or the “OK” button), confirm with “OK” and
Now, two things can be done (dependent of the service
wait until “Done” appears. In case the download to the USB
instructions at that moment):
stick was not successful “Failure” will appear. In this case,
– Save the content of the NVM via ComPair for
check if the USB stick is connected properly and if the
development analysis, before initializing. This will give
directory “repair” is present in the root of the USB stick.
the Service department an extra possibility for
Now the settings are stored onto the USB stick and can be
diagnosis (e.g. when Development asks for this).
used to download into another TV or other SSB. Uploading
– Initialize the NVM.
is of course only possible if the software is running and
preferably a picture is available. This method is created to
Note: When the NVM is corrupted, or replaced, there is a high be able to save the customer’s TV settings and to store
possibility that no picture appears because the display code is them into another SSB.
not correct. So, before initializing the NVM via the SAM, a • Download from USB. To download several settings from
picture is necessary and therefore the correct display option the USB stick to the TV, same way of working needs to be
has to be entered. Refer to Chapter 6. Alignments for details. followed as with uploading. To make sure that the
To adapt this option, it’s advised to use ComPair (the correct download of the channel list from USB to the TV is
values for the options can be found in Chapter 6. Alignments) executed properly, it is necessary to restart the TV and
or a method via a standard RC (described below). tune to a valid preset if necessary. The “All” item supports
Changing the display option via a standard RC: Key in the to download all several itels at once.
code “062598” directly followed by the “MENU” (or "HOME")

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EN 22 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

• NVM editor. For NET TV the set “type number” must be How to Activate CSM
entered correctly.
Also the production code (AG code) can be entered here Key in the code “123654” via the standard RC transmitter.
via the RC-transmitter. Note: Activation of the CSM is only possible if there is no (user)
Correct data can be found on the side/rear sticker. menu on the screen!

How to Navigate How to Navigate


• In SAM, the menu items can be selected with the By means of the “CURSOR-DOWN/UP” knob on the RC-
“CURSOR UP/DOWN” key on the RC-transmitter. The transmitter, can be navigated through the menus.
selected item will be highlighted. When not all menu items
fit on the screen, move the “CURSOR UP/DOWN” key to Contents of CSM
display the next/previous menu items. The contents are reduced to 3 pages: General, Software
• With the “CURSOR LEFT/RIGHT” keys, it is possible to: versions and Quality items. The group names itself are not
– (De) activate the selected menu item. shown anywhere in the CSM menu.
– (De) activate the selected sub menu.
• With the “OK” key, it is possible to activate the selected General
action.
• Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
How to Exit SAM is not necessary for the customer to look at the rear of the
Use one of the following methods: TV-set. Note that if an NVM is replaced or is initialized after
• Switch the TV set to STAND-BY via the RC-transmitter. corruption, this set type has to be re-written to NVM.
• Via a standard RC-transmitter, key in “00” sequence, or ComPair will foresee in a possibility to do this. The update
select the “BACK” key. can also be done via the NVM editor available in SAM.
• Production Code. Displays the production code (the serial
5.2.3 Customer Service Mode (CSM) number) of the TV. Note that if an NVM is replaced or is
initialized after corruption, this production code has to be
Purpose re-written to NVM. ComPair will foresee in a possibility to
When a customer is having problems with his TV-set, he can do this. The update can also be done via the NVM editor
call his dealer or the Customer Helpdesk. The service available in SAM.
technician can then ask the customer to activate the CSM, in • Installed date. Indicates the date of the first installation of
order to identify the status of the set. Now, the service the TV. This date is acquired via time extraction.
technician can judge the severity of the complaint. In many • Options 1. Gives the option codes of option group 1 as set
cases, he can advise the customer how to solve the problem, in SAM (Service Alignment Mode).
or he can decide if it is necessary to visit the customer. • Options 2. Gives the option codes of option group 2 as set
The CSM is a read only mode; therefore, modifications in this in SAM (Service Alignment Mode).
mode are not possible. • 12NC SSB. Gives an identification of the SSB as stored in
NVM. Note that if an NVM is replaced or is initialized after
When in this chassis CSM is activated, a test pattern will be corruption, this identification number has to be re-written to
displayed during 5 seconds (1 second Blue, 1 second Green NVM. ComPair will foresee in a possibility to do this. This
and 1 second Red, then again 1 second Blue and 1 second identification number is the 12nc number of the SSB.
Green). This test pattern is generated by the PNX51X0 • 12NC display. Shows the 12NC of the display.
(located on the 200Hz board as part of the display). So if this • 12NC supply. Shows the 12NC of the power supply.
test pattern is shown, it could be determined that the back end • 12NC 200Hz board. Shows the 12NC of the 200Hz Panel
video chain (PNX51X0 and display) is working.For TV sets (when present).
without the PNX51X0 inside, every menu from CSM will be • 12NC AV PIP. Shows the 12NC of the AV PIP board
used as check for the back end chain video. (when present).

When CSM is activated and there is a USB stick connected to Software versions
the TV set, the software will dump the CSM content to the USB • Current main SW. Displays the build-in main software
stick. The file (CSM_model number_serial number.txt) will be version. In case of field problems related to software,
saved in the root of the USB stick. This info can be handy if no software can be upgraded. As this software is consumer
information is displayed. upgradeable, it will also be published on the Internet.
Example: Q55xx1.2.3.4
When in CSM mode (and a USB stick connected), pressing • Stand-by SW. Displays the build-in stand-by processor
“OK” will create an extended CSM dump file on the USB stick. software version. Upgrading this software will be possible
This file (Extended_CSM_model number_serial number.txt) via ComPair or via USB (see section 5.9 Software
contains: Upgrading).
• The normal CSM dump information, Example: STDBY_88.68.1.2.
• All items (from SAM “load to USB”, but in readable format), • e-UM version. Displays the electronic user manual SW-
• Operating hours, version (12NC version number). Most significant number
• Error codes, here is the last digit.
• SW/HW event logs. • AV PIP software.
• 3D dongle software version.
To have fast feedback from the field, a flashdump can be
requested by development. When in CSM, push the “red” Quality items
button and key in serial digits ‘2679’ (same keys to form the • Signal quality. Bad / average /good (not for DVB-S).
word ‘COPY’ with a cellphone). A file “Dump_model • Ethernet MAC address. Displays the MAC address
number_serial number.bin” will be written on the connected present in the SSB.
USB device. This can take 1/2 minute, depending on the • Wireless MAC address. Displays the wireless MAC
quantity of data that needs to be dumped. address to support the Wi-Fi functionality.
• BDS key. Indicates if the set is in the BDS status.
Also when CSM is activated, the LAYER 1 error is displayed via • CI module. Displays status if the common interface
blinking LED. Only the latest error is displayed (see also module is detected.
section 5.5 Error Codes). • CI + protected service. Yes/No.

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 23

• Event counter : So, this is a kind of automatic stepwise start-up. In combination


S : 000X 0000(number of software recoveries : SW with the start-up diagrams below, you can see which supplies
EVENT-LOG #(reboots) are present at a certain moment. Caution: in case the start-up
S : 0000 000X (number of software events : SW EVENT- in this mode with a faulty FET 7U0X is done, you can destroy
LOG #(events) all IC’s supplied by the +1V8 and +1v1, due to overvoltage (12V
H : 000X 0000(number of hardware errors) on XVX-line). It is recommended to measure first the FET
H : 0000 000X (number of hardware events : SW EVENT- 7U0X or others FET’s on shortcircuit before activating SDM via
LOG #(events). the service pads.

How to Exit CSM


Press “MENU” (or "HOME") / “Back” key on the RC-transmitter.
The abbreviations “SP” and “MP” in the figures stand for:
• SP: protection or error detected by the Stand-by
5.3 Stepwise Start-up Processor.
• MP: protection or error detected by the MIPS Main
When the TV is in a protection state due to an error detected by Processor.
stand-by software (error blinking is displayed) and SDM is
activated via shortcutting the SDM solder path on the SSB, the
TV starts up until it reaches the situation just before protection.

Mains
off Mains
on

- WakeUp requested
WakeUp
- Acquisition needed
requested
- Tact switch pushed

St by Semi Active
- stby requested and
no data Acquisition St by - St by requested
required - tact SW pushed

Tact switch
pushed
WakeUp
requested
- Tact switch pushed
(SDM)
- last status is hibernate
GoToProtection
after mains ON
Hibernate
GoToProtection

Protection

18770_250_100216.eps
100402

Figure 5-3 Transition diagram

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EN 24 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

Off
Mains is applied
Stand by or
Protection
Standby Supply starts running.
All standby supply voltages become available.

st-by µP resets

If the protection state was left by short circuiting the


Initialise I/O pins of the st-by µP:
SDM pins, detection of a protection condition during
- Switch reset-AVC LOW (reset state)
startup will stall the startup. Protection conditions in a
- Switch reset-system LOW (reset state)
- Switch reset-Ethernet LOW (reset state) playing set will be ignored. The protection mode will
not be entered.
- Switch reset-USB LOW (reset state)
- Switch reset-DVBs LOW (reset state)
- keep Audio-reset and Audio-Mute-Up HIGH

- Switch Audio-Reset high.


start keyboard scanning, RC detection. Wake up reasons are It is low in the standby mode if the standby
off. mode lasted longer than 10s.

Switch ON Platform and display supply by switching


LOW the Standby line.

+12V, +24Vs, AL and Bolt-on power


is switched on, followed by the +1V2 DCDC converter
Detect2 is moved to an interrupt. To be checked if
the detection on interrupt base is feasible or not or if
we should stick to the standard 40ms interval. 12V error:
Detect2 high received
No Layer1: 3
within 2 seconds?
Layer2: 16

Yes
Enter protection
Enable the DCDC converters
(ENABLE-3V3n LOW)

Wait 50ms

Enable the supply detection algorithm

Set I²C slave address


of Standby µP to (A0h)

Detect EJTAG debug probe


(pulling pin of the probe interface to An EJTAG probe (e.g. WindPower ICE probe) can be
ground by inserting EJTAG probe) connected for Linux Kernel debugging purposes.

EJTAG probe
Yes
connected ?

No

No No Cold boot?

Yes

Release AVC system reset Release AVC system reset Release AVC system reset
Feed warm boot script Feed cold boot script Feed initializing boot script
disable alive mechanism

18770_251_100216.eps
100216

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 25

Reset-system is switched HIGH by the Reset-system is switched HIGH by the


AVC at the end of the bootscript AVC at the end of the bootscript

No

AVC releases Reset-Ethernet, Reset-USB and AVC releases Reset-Ethernet, Reset-USB and
This cannot be done through the bootscript, Reset-DVBs when the end of the AVC boot- Reset-DVBs when the end of the AVC boot-
the I/O is on the standby µP script is detected script is detected

Reset-Audio and Audio-Mute-Up are Reset-Audio and Audio-Mute-Up are


switched by MIPS code later on in the switched by MIPS code later on in the
Timing need to be updated if startup process startup process
more mature info is available.

Bootscript ready
No
in 1250 ms?

Yes

Set I²C slave address


of Standby µP to (60h)

RPC start (comm. protocol)


Timing needs to
be updated if more
Flash to Ram mature info is
No image transfer succeeded available.
within 30s?
Code =
Layer1: 2
Layer2: 15 Yes
Timing needs to be
updated if more
Code = mature info is
Switch AVC PNX85500 in SW initialization
Layer1: 2 No available.
reset (active low) succeeded
Layer2: 53
within 20s?

Wait 10ms Yes

Enable Alive check mechanism


Disable all supply related protections and
switch off the +3V3 +5V DC/DC converter.

MIPS reads the wake up reason Wait until AVC starts to


from standby µP. communicate
Wait 5ms

Startup screen shall only be visible when there is a coldboot to


an active state end situation. The startup screen shall not be
Wake up reason visible when waking up for reboot reasons or waking up to semi-
switch off the remaining DC/DC coldboot & not semi-
converters standby? standby conditions or waking up to enter Hibernate mode..

yes
Switch Standby I/O line high
3-th try?
and wait 4 seconds
The first time after the option turn on of the startup screen or
Startup screen cfg file when the set is virgin, the cfg file is not present and hence
present? the startup screen will not be shown.
Yes

yes
Blink Code as
error code
200Hz set? yes

No
Enter protection
85500 sends out startup screen 85500 sends out startup screen

No
200Hz Tcon has started up the
85500 starts up the display.
display.
No

To keep this flowchart readable, the exact Startup screen visible 85500 requests Lamp on
display turn on description is not copied
here. Please see the Semi-standby to On
description for the detailed display startup
Startup screen visible
During the complete display time of the
Startup screen, the preheat condition of
sequence.
100% PWM is valid. Initialize audio

initialize tuner and channel decoders

Initialize source selection

Initialize video processing IC’s

initialize AutoTV by triggering CHS AutoTV Init interface

Initialize Ambilight with Lights off.

Semi-Standby
18770_252_100216.eps
100216

Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)

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EN 26 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

Constraints taken into account:


- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the EEFL backlight, the backlight should be driven with a maximum PWM duty
cycle during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output
level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts,
the picture should only be unblanked after these first seconds.

The assumption here is that a fast toggle (<2s) can


only happen during ON->SEMI ->ON. In these states,
Semi Standby
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
Wait until previous on-state is left more than 2
made in less than 2s, because the standby state will
seconds ago. (to prevent LCD display problems)
be maintained for at least 4s.

Assert RGB video blanking


CPipe already generates a valid output and audio mute
clock in the semi-standby state: display
startup can start immediately when leaving
the semi-standby state.

Display already on?


(splash screen)

No

Switch on the display power by


The exact timings to switching LCD-PWR-ON low
switch on the
display (LVDS Yes
Wait x ms
delay, lamp delay)
are defined in the Initialize audio and video
display file. Switch on LVDS output in the 85500 processing IC's and functions
according needed use case.
Delay Lamp-on with the sum of the LVDS delay and
the Lamp delay indicated in the display file

Switch off the dimming backlight feature, set


the BOOST control to nominal and make sure
PWM output is set to maximum allowed PWM

Switch on LCD backlight (Lamp-ON)

Start POK line Wait until valid and stable audio and video, corresponding to the
detection algorithm requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
return

Switch Audio-Reset low and wait 5ms

A LED set does not normally need a


Release audio mute and wait 100ms before any other audio
preheat time. The preheat remains present
handling is done (e.g. volume change)
but is set to zero in the display file.

Restore dimming backlight feature, PWM and BOOST output


The higher level requirement is that audio and video
and unblank the video.
should be demuted without transient effects and that
the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.
Switch on the Ambilight functionality according the last status
settings.

Startup screen Option


and Installation setting
Photoscreen ON?

Yes

Display cfg file present


and up to date, according
correct display option?
No
No
Yes
Prepare Start screen Display config
file and copy to Flash

Active
18770_253_100216.eps
100216

Figure 5-6 “Semi Stand-by” to “Active” flowchart (EEFL or LED backlight 50/100 Hz only)

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 27

The assumption here is that a fast toggle (<2s)


can only happen during ON->SEMI ->ON. In
Semi Standby
these states, the AVC is still active and can
provide the 2s delay. If the transition ON->SEMI-
>STBY->SEMI->ON can be made in less than 2s, Wait until previous on-state is left more than 2
we have to delay the semi -> stby transition until seconds ago. (to prevent LCD display problems)
the requirement is met.

Assert RGB video blanking


and audio mute

There is no need to define the Backlight already on?


display timings since the timing (splash screen)
implementation is part of the Tcon. Yes

No Initialize audio and video


processing IC's and functions
according needed use case.
Request Tcon to Switch on the backlight in a
direct LED or
set Lamp-on I/O line in case of a side LED

Start POK line


detection algorithm

Wait until valid and stable audio and video, corresponding to


the requested output is delivered by the AVC.

return
Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio
The higher level requirement is that audio and handling is done (e.g. volume change)
video should be demuted without transient
effects and that the audio should be demuted
maximum 1s before or at the same time as the
unblank the video.
unblanking of the video.

Switch on the Ambilight functionality according the last status


settings.

Startup screen Option


and Installation setting
Photoscreen ON?

Yes

Display cfg file present


and up to date, according
correct display option?
No
No
Yes
Prepare Start screen Display config
file and copy to Flash

Active
18770_254_100216.eps
100216

Figure 5-7 “Semi Stand-by” to “Active” flowchart (LED backlight 200 Hz)

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EN 28 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

Active

Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground


(I/O: audio reset)
And wait 5ms

switch off Ambilight

Wait until Ambilight has faded out: Output power


Observer should be zero

Switch off POK line


detection algorithm

switch off LCD backlight


(I/O or I²C)

Mute all video outputs

Yes 200Hz set?

No

Wait x ms (display file)

Instruct 200Hz
The exact timings to
Tcon to turn off Switch off LVDS output in 85500
switch off the
the display
display (LVDS
delay, lamp delay)
Wait x ms
are defined in the
display file.

Switch off the display power by


switching LCD-PWR-ON high

Semi Standby
18770_255_100216.eps
100216

Figure 5-8 “Active” to “Semi Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 29

Semi Stand by

If ambientlight functionality was used in semi-standby


(lampadaire mode), switch off ambient light (see CHS
ambilight)

Delay transition until ramping down of ambient light is *) If this is not performed and the set is
finished. *) switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.

transfer Wake up reasons to the Stand by µP.

Switch Memories to self-refresh (this creates a more


stable condition when switching off the power).

Switch AVC system in reset state (reset-system and


reset-AVC lines)
Switch reset-USB, Reset-Ethernet and Reset-DVBs
LOW

Wait 10ms

Disable all supply related protections and switch off


the DC/DC converters (ENABLE-3V3n)

Wait 5ms

Switch OFF all supplies by switching HIGH the


Standby I/O line

Important remarks:

release reset audio 10 sec after entering


standby to save power

Also here, the standby state has to be


maintained for at least 4s before starting
another state transition.
Stand by

18770_256_100216.eps
100216

Figure 5-9 “Semi Stand-by” to “Stand-by” flowchart

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EN 30 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

5.4 Service Tools 5.5 Error Codes

5.4.1 ComPair 5.5.1 Introduction

Introduction The error code buffer contains all detected errors since the last
ComPair (Computer Aided Repair) is a Service tool for Philips time the buffer was erased. The buffer is written from left to
Consumer Electronics products. and offers the following: right, new errors are logged at the left side, and all other errors
1. ComPair helps to quickly get an understanding on how to shift one position to the right.
repair the chassis in a short and effective way. When an error occurs, it is added to the list of errors, provided
2. ComPair allows very detailed diagnostics and is therefore the list is not full. When an error occurs and the error buffer is
capable of accurately indicating problem areas. No full, then the new error is not added, and the error buffer stays
knowledge on I2C or UART commands is necessary, intact (history is maintained).
because ComPair takes care of this. To prevent that an occasional error stays in the list forever, the
3. ComPair speeds up the repair time since it can error is removed from the list after more than 50 hrs. of
automatically communicate with the chassis (when the µP operation.
is working) and all repair information is directly available. When multiple errors occur (errors occurred within a short time
4. ComPair features TV software up possibilities. span), there is a high probability that there is some relation
between them.
Specifications
ComPair consists of a Windows based fault finding program New in this chassis is the way errors can be displayed:
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an • If no errors are there, the LED should not blink at all in
USB cable. For the TV chassis, the ComPair interface box and CSM or SDM. No spacer must be displayed as well.
the TV communicate via a bi-directional cable via the service • There is a simple blinking LED procedure for board
connector(s). level repair (home repair) so called LAYER 1 errors
The ComPair fault finding program is able to determine the next to the existing errors which are LAYER 2 errors (see
problem of the defective television, by a combination of Table 5-2).
automatic diagnostics and an interactive question/answer – LAYER 1 errors are one digit errors.
procedure. – LAYER 2 errors are 2 digit errors.
• In protection mode.
– From consumer mode: LAYER 1.
How to Connect
– From SDM mode: LAYER 2.
This is described in the chassis fault finding database in
ComPair. • Fatal errors, if I2C bus is blocked and the set reboots,
CSM and SAM are not selectable.
– From consumer mode: LAYER 1.
TO TV
– From SDM mode: LAYER 2.
TO
UART SERVICE
TO
I2C SERVICE
TO
UART SERVICE • In CSM mode.
CONNECTOR CONNECTOR CONNECTOR
– When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
ComPair II
Multi • In SDM mode.
RC in function
RC out
– When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
Optional Power Link/ Mode
Switch Activity I2C RS232 /UART
• Error display on screen.
– In CSM no error codes are displayed on screen.
– In SAM the complete error list is shown.
PC
Basically there are three kinds of errors:
• Errors detected by the Stand-by software which lead to
protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
(see section “5.6 The Blinking LED Procedure”).
ComPair II Developed by Philips Brugge
• Errors detected by the Stand-by software which not
Optional power
HDMI 5V DC lead to protection. In this case the front LED should blink
I2C only
the involved error. See also section “5.5 Error Codes, 5.5.4
Error Buffer”. Note that it can take up several minutes
10000_036_090121.eps
091118 before the TV starts blinking the error (e.g. LAYER 1
error = 2, LAYER 2 error = 15 or 53).
Figure 5-10 ComPair II interface connection • Errors detected by main software (MIPS). In this case
the error will be logged into the error buffer and can be read
Caution: It is compulsory to connect the TV to the PC as out via ComPair, via blinking LED method LAYER 1-2
shown in the picture above (with the ComPair interface in error, or in case picture is visible, via SAM.
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be 5.5.2 How to Read the Error Buffer
blown!
Use one of the following methods:
How to Order • On screen via the SAM (only when a picture is visible).
ComPair II order codes: E.g.:
• ComPair II interface: 3122 785 91020. – 00 00 00 00 00: No errors detected
• Software is available via the Philips Service web portal. – 23 00 00 00 00: Error code 23 is the last and only
• ComPair UART interface cable for Q55x.x. detected error.
(using 3.5 mm Mini Jack connector): 3138 188 75051. – 37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
Note: When you encounter problems, contact your local – Note that no protection errors can be logged in the
support desk. error buffer.

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 31

• Via the blinking LED procedure. See section 5.5.3 How to content, as this history can give significant information). This to
Clear the Error Buffer. ensure that old error codes are no longer present.
• Via ComPair. If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
5.5.3 How to Clear the Error Buffer code and not the actual cause (e.g. a fault in the protection
detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
Use one of the following methods:
• Via error bits in the status registers of ICs.
• By activation of the “RESET ERROR BUFFER” command
in the SAM menu. • Via polling on I/O pins going to the stand-by processor.
• Via sensing of analog values on the stand-by processor or
• If the content of the error buffer has not changed for 50+
the PNX85500.
hours, it resets automatically.
• Via a “not acknowledge” of an I2C communication.

5.5.4 Error Buffer


Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
In case of non-intermittent faults, clear the error buffer before
problems wait 2 minutes from start-up onwards, and then
starting to repair (before clearing the buffer, write down the check if the front LED is blinking or if an error is logged.

Table 5-2 Error code overview

Monitored Error/ Error Buffer/


Description Layer 1 Layer 2 by Prot Blinking LED Device Defective Board
I2C3 2 13 MIPS E BL / EB SSB SSB
I2C2 2 14 MIPS E BL / EB SSB SSB
I2C4 2 18 MIPS E BL / EB SSB SSB
PNX doesn’t boot (HW cause) 2 15 Stby µP P BL PNX8550 SSB
12V 3 16 Stby µP P BL / Supply
Inverter or display supply 3 17 MIPS E EB / Supply
PNX51X0 2/9 21 MIPS E EB PNX51X0 200 Hz board
HDMI mux 2 23 MIPS E EB Sil9x87A SSB
I2C switch 2 24 MIPS E EB PCA9540 SSB
Channel dec DVB-S 2 28 MIPS E EB STV0903 SSB
Lnb controller 2 31 MIPS E EB LNBH23 SSB
Tuner 2 34 MIPS E EB DTT 71300 SSB
Main nvm 2 35 MIPS E EB STM24C64 SSB
Tuner DVB-S 2 36 MIPS E EB STV6110 SSB
T° sensor SSB/set 2 42 MIPS E EB LM 75 T° sensor
T° sensor LED driver/Tcon 7 42 MIPS E EB LM 75 T° sensor
PNX doesn’t boot (SW cause) 2 53 Stby µP P BL PNX8550 SSB
Display 5 64 MIPS E BL / EB Altera Display

Extra Info Other root causes for this error can be due to hardware
• Rebooting. When a TV is constantly rebooting due to problems regarding the DDR’s and the bootscript reading
internal problems, most of the time no errors will be logged from the PNX8550.
or blinked. This rebooting can be recognized via a ComPair • Error 16 (12V). This voltage is made in the power supply
interface and Hyperterminal (for Hyperterminal settings, and results in protection (LAYER 1 error = 3) in case of
see section “5.8 Fault Finding and Repair Tips, 5.8.7 absence. When SDM is activated we see blinking LED
Logging). It’s shown that the loggings which are generated LAYER 2 error = 16.
by the main software keep continuing. In this case • Error 17 (Invertor or Display Supply). Here the status of
diagnose has to be done via ComPair. the “Power OK” is checked by software, no protection will
• Error 13 (I2C bus 3, SSB bus blocked). Current situation: occur during failure of the invertor or display supply (no
when this error occurs, the TV will constantly reboot due to picture), only error logging. LED blinking of LAYER 1
the blocked bus. The best way for further diagnosis here, is error = 3 in CSM, in SDM this gives LAYER 2 error = 17.
to use ComPair. • Error 21 (PNX51X0). When there is no I2C communication
• Error 14 (I2C bus 2, TV set bus blocked). Current towards the PNX51X0 after start-up, LAYER 2 error = 21
situation: when this error occurs, the TV will constantly will be logged and displayed via the blinking LED
reboot due to the blocked bus. The best way for further procedure if SDM is switched on. This device is located on
diagnosis here, is to use ComPair. the 200 Hz panel from the display.
• Error 18 (I2C bus 4, Tuner bus blocked). In case this bus • Error 23 (HDMI). When there is no I2C communication
is blocked, short the “SDM” solder paths on the SSB during towards the HDMI mux after start-up, LAYER 2 error = 23
startup, LAYER error 2 = 18 will be blinked. will be logged and displayed via the blinking LED
• Error 15 (PNX8550 doesn’t boot). Indicates that the main procedure if SDM is switched on.
processor was not able to read his bootscript. This error will • Error 24 (I2C switch). When there is no I2C
point to a hardware problem around the PNX8550 communication towards the I2C switch, LAYER 2
(supplies not OK, PNX 8550 completely dead, I2C link error = 24 will be logged and displayed via the blinking LED
between PNX and Stand-by Processor broken, etc...). procedure when SDM is switched on. Remark: this only
When error 15 occurs it is also possible that I2C1 bus is works for TV sets with an I2C controlled screen included.
blocked (NVM). I2C1 can be indicated in the schematics as • Error 28 (Channel dec DVB-S). When there is no I2C
follows: SCL-UP-MIPS, SDA-UP-MIPS. communication towards the DVB-S channel decoder,

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EN 32 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

LAYER 2 error = 28 will be logged and displayed via the 2. Two short blinks of 250 ms followed by a pause of 3 s
blinking LED procedure if SDM is switched on. 3. Eight short blinks followed by a pause of 3 s
• Error 31 (Lnb controller). When there is no I2C 4. Six short blinks followed by a pause of 3 s
communication towards this device, LAYER 2 error = 31 5. One long blink of 3 s to finish the sequence (spacer).
will be logged and displayed via the blinking LED 6. The sequence starts again.
procedure if SDM is activated.
• Error 34 (Tuner). When there is no I2C communication 5.6.2 How to Activate
towards the tuner during start-up, LAYER 2 error = 34 will
be logged and displayed via the blinking LED procedure Use one of the following methods:
when SDM is switched on.
• Activate the CSM. The blinking front LED will show only
• Error 35 (main NVM). When there is no I2C
the latest layer 1 error, this works in “normal operation”
communication towards the main NVM during start-up, mode or automatically when the error/protection is
LAYER 2 error = 35 will be displayed via the blinking LED
monitored by the Stand-by processor.
procedure when SDM is switched “on”. All service modes
In case no picture is shown and there is no LED blinking,
(CSM, SAM and SDM) are accessible during this failure, read the logging to detect whether “error devices” are
observed in the Uart logging as follows: "<< ERRO >>>
mentioned. (see section “5.8 Fault Finding and Repair
PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".
Tips, 5.8.7 Logging”).
• Error 36 (Tuner DVB-S). When there is no I2C • Activate the SDM. The blinking front LED will show the
communication towards the DVB-S tuner during start-up,
entire content of the LAYER 2 error buffer, this works in
LAYER 2 error = 36 will be logged and displayed via the
“normal operation” mode or when SDM (via hardware pins)
blinking LED procedure when SDM is switched “on”. is activated when the tv set is in protection.
• Error 42 (Temp sensor). Only applicable for TV sets
equipped with temperature devices.
• Error 53. This error will indicate that the PNX8550 has 5.7 Protections
read his bootscript (when this would have failed, error 15
would blink) but initialization was never completed because 5.7.1 Software Protections
of hardware problems (NAND flash, ...) or software
initialization problems. Possible cause could be that there
Most of the protections and errors use either the stand-by
is no valid software loaded (try to upgrade to the latest main
microprocessor or the MIPS controller as detection device.
software version). Note that it can take a few minutes
Since in these cases, checking of observers, polling of ADCs,
before the TV starts blinking LAYER 1 error = 2 or in SDM,
and filtering of input values are all heavily software based,
LAYER 2 error = 53.
these protections are referred to as software protections.
• Error 64. Only applicable for TV sets with an I2C controlled
There are several types of software related protections, solving
screen.
a variety of fault conditions:
• Related to supplies: presence of the +5V, +3V3 and 1V2
5.6 The Blinking LED Procedure needs to be measured, no protection triggered here.
• Protections related to breakdown of the safety check
5.6.1 Introduction mechanism. E.g. since the protection detections are done
by means of software, failing of the software will have to
initiate a protection mode since safety cannot be
The blinking LED procedure can be split up into two situations:
guaranteed any more.
• Blinking LED procedure LAYER 1 error. In this case the
error is automatically blinked when the TV is put in CSM.
Remark on the Supply Errors
This will be only one digit error, namely the one that is
The detection of a supply dip or supply loss during the normal
referring to the defective board (see table “5-2 Error code
overview”) which causes the failure of the TV. This playing of the set does not lead to a protection, but to a cold
reboot of the set. If the supply is still missing after the reboot,
approach will especially be used for home repair and call
the TV will go to protection.
centres. The aim here is to have service diagnosis from a
distance.
• Blinking LED procedure LAYER 2 error. Via this Protections during Start-up
procedure, the contents of the error buffer can be made During TV start-up, some voltages and IC observers are
visible via the front LED. In this case the error contains actively monitored to be able to optimise the start-up speed,
2 digits (see table “5-2 Error code overview”) and will be and to assure good operation of all components. If these
displayed when SDM (hardware pins) is activated. This is monitors do not respond in a defined way, this indicates a
especially useful for fault finding and gives more details malfunction of the system and leads to a protection. As the
regarding the failure of the defective board. observers are only used during start-up, they are described in
Important remark: the start-up flow in detail (see section “5.3 Stepwise Start-up”).
For an empty error buffer, the LED should not blink at all in
CSM or SDM. No spacer will be displayed. 5.7.2 Hardware Protections

When one of the blinking LED procedures is activated, the front The only real hardware protection in this chassis appears in
LED will show (blink) the contents of the error buffer. Error case of an audio problem e.g. DC voltage on the speakers. This
codes greater then 10 are shown as follows: protection will only affect the Class D audio amplifier (item
1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit 7D10; see diagram B03A) and puts the amplifier in a
2. A pause of 1.5 s continuous burst mode (cyclus approximately 2 seconds).
3. “n” short blinks (where “n”= 1 to 9)
4. A pause of approximately 3 s, Repair Tip
5. When all the error codes are displayed, the sequence • There still will be a picture available but no sound. While
finishes with a LED blink of 3 s (spacer). the Class D amplifier tries to start-up again, the cone of the
6. The sequence starts again. loudspeakers will move slowly in one or the other direction
until the initial failure shuts the amplifier down, this cyclus
Example: Error 12 8 6 0 0. starts over and over again. The headphone amplifier will
After activation of the SDM, the front LED will show: also behaves similar.
1. One long blink of 750 ms (which is an indication of the
decimal digit) followed by a pause of 1.5 s

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 33

5.8 Fault Finding and Repair Tips • +5V-TUN supply voltage (5V nominal) for tuner and IF
amplifier.
Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra
+3V3-STANDY (3V3 nominal) is the permanent voltage,
Info”.
supplying the Stand-by microprocessor inside PNX85500.

5.8.1 Ambilight Supply voltage +1V1 is started immediately when +12V voltage
becomes available (+12V is enabled by STANDBY signal when
Due to degeneration process of the LED’s fitted on the ambi "low"). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN
module, there can be a difference in the colour and/or light are switched "on" by signal ENABLE-3V3 when "low", provided
output of the spare ambilight modules in comparison with the that +12V (detected via 7U40 and 7U41) is present.
originals ones contained in the TV set. Via SAM => alignments
=> ambilight, the spare module can be adjusted. +12V is considered OK (=> DETECT2 signal becomes "high",
+12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter
5.8.2 Audio Amplifier can be started up) if it rises above 10V and doesn’t drop below
9V5. A small delay of a few milliseconds is introduced between
The Class D-IC 7D10 has a powerpad for cooling. When the IC the start-up of 12V to +1V8 DC-DC converter and the two other
is replaced it must be ensured that the powerpad is very well DC-DC converters via 7U48 and associated components.
pushed to the PWB while the solder is still liquid. This is needed
to insure that the cooling is guaranteed, otherwise the Class D- Description DVB-S2:
IC could break down in short time. • LNB-RF1 (0V = disabled, 14V or 18V in normal operation)
LNB supply generated via the second conversion channel
of 7T03 followed by 7T50 LNB supply control IC. It provides
5.8.3 AV PIP
supply voltage that feeds the outdoor satellite reception
equipment.
To check the AV PIP board (if present) functionality, a
• +3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal)
dedicated tespattern can be invoke as follows: select the
and +1V-DVBS (1.03V nominal) power supply for the
“multiview” icon in the User Interface and press the “OK” silicon tuner and channel decoder. +1V-DVBS is generated
button. Apply for the main picture an extended source, e.g.
via a 5V to 1V DC-DC converter and is stabilized at the
HDMI input. Proceed by entering CSM (push ‘123654’ on the
point of load (channel decoder) by means of feedback
remote control) and press the yellow button. A coloured signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS
testpattern should appear now, generated by the AV PIP board
are generated via linear stabilizers from +5V-DVBS that by
(this can take a few seconds).
itself is generated via the first conversion channel of 7T03.

5.8.4 CSM At start-up, +24V becomes available when STANDBY signal is


"low" (together with +12V for the basic board), when +3V3 from
When CSM is activated and there is a USB stick connected to the basic board is present the two DC-DC converters channels
the TV, the software will dump the complete CSM content to the inside 7T03 are activated. Initially only the 24V to 5V converter
USB stick. The file (Csm.txt) will be saved in the root of the USB (channel 1 of 7T03 generating +5V-DVBS) will effectively work,
stick. If this mechanism works it can be concluded that a large while +V-LNB is held at a level around 11V7 via diode 6T55.
part of the operating system is already working (MIPS, USB...) After 7T05 is initialized, the second channel of 7T03 will start
and generates a voltage higher then LNB-RF1 with 0V8. +5V-
5.8.5 DC/DC Converter DVBS start-up will imply +3V3-DVBS start-up, with a small
delay of a few milliseconds => +2V5-DVBS and +1V-DVBS will
be enabled.
Description basic board

If +24V drops below +15V level then the DVB-S2 supply will
The basic board power supply consists of 4 DC/DC converters
stop, even if +3V3 is still present.
and 5 linear stabilizers. All DC/DC converters have +12V input
voltage and deliver:
• +1V1 supply voltage (1.15V nominal), for the core voltage Debugging
of PNX85500, stabilized close to the point of load; The best way to find a failure in the DC/DC converters is to
SENSE+1V1 signal provides the DC-DC converter the check their start-up sequence at power “on” via the mains cord,
needed feedback to achieve this. presuming that the stand-by microprocessor and the external
• +1V8 supply voltage, for the DDR2 memories and DDR2 supply are operational. Take STANDBY signal "high"-to-"low"
interface of PNX85500. transition as time reference.
• +3V3 supply voltage (3.30V nominal), overall 3.3 V for When +12V becomes available (maximum 1 second after
onboard IC’s, for non-5000 series SSB diversities only. STANDBY signal goes "low") then +1V1 is started immediately.
• +5V (5.15V nominal) for USB, WIFI and Conditional After ENABLE-3V3 goes "low", all the other supply voltages
Access Module and +5V5-TUN for +5V-TUN tuner should rise within a few milliseconds.
stabilizer.
Tips
The linear stabilizers are providing: • Behaviour comparison with a reference TV550 platform
• +1V2 supply voltage (1.2V nominal), stabilized close to can be a fast way to locate failures.
PNX85500 device, for various other internal blocks of • If +12V stays "low", check the integrity of fuse 1U40.
PNX85500; SENSE+1V2 signal provides the needed • Check the integrity (at least no short circuit between drain
feedback to achieve this. and source) of the power MOS-FETs before starting up the
• +2V5 supply voltage (2.5V nominal) for LVDS interface and platform in SDM, otherwise many components might be
various other internal blocks of PNX85500; for 5000 series damaged. Using a ohmmeter can detect short circuits
SSB diversities the stabilizer is 7UD2 while for the other between any power rail and ground or between +12V and
diversities 7UC0 is used. any other power rail.
• +3V3 supply voltage (3V3 nominal) for 5000 series SSB • Short circuit at the output of an integrated linear stabilizer
diversities, provided by 7UD3; in this case the 12V to 3V3 (7UC0, 7UD2 or 7UD3) will heat up this device strongly.
DC-DC converter is not present. • Switching frequencies should be 500 kHz ...600 kHz for
12 V to 1.1 V and 12 V to 1.8 V DC-DC converters,

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EN 34 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC Uart loggings reporting fault conditions, error messages, error
converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V codes, fatal errors:
LNB DC-DC converters operates at 300 kHz while for 5 V • Failure messages should be checked and investigated.For
to 1.1 V DC-DC converter 900 kHz is used. instance fatal error on the PNX51x0: check startup of the
back-end processor, supplies..reset, I2C bus. => error
5.8.6 Exit “Factory Mode” mentioned in the logging as: *5120 failed to start by itself*.
• Some failures are indicated by error codes in the logging,
check with error codes table (see Table “5-2 Error code
When an “F” is displayed in the screen’s right corner, this
means the set is in “Factory” mode, and it normally overview”).e.g. => <<<ERROR>>>PLFPOW_MERR.C :
First Error (id=10,Layer_1=2,Layer_2=23).
happens after a new SSB is mounted. To exit this mode, push
• I2C bus error mentioned as e.g.: “ I2C bus 4 blocked”.
the “VOLUME minus” button on the TV’s local keyboard for 10
seconds (this disables the continuous mode). • Not all failures or error messages should be interpreted as
fault.For instance root cause can be due to wrong option
Then push the “SOURCE” button for 10 seconds until the “F”
codes settings => e.g. “DVBS2Suppoprted : False/True.
disappears from the screen.
In the Uart log startup script we can observe and check the
enabled loaded option codes.
5.8.7 Logging
Defective sectors (bad blocks) in the Nand Flash can also be
When something is wrong with the TV set (f.i. the set is reported in the logging.
rebooting) you can check for more information via the logging
in Hyperterminal. The Hyperterminal is available in every Startup in the SW upgrade application and observe the Uart
Windows application via Programs, Accessories, logging:
Communications, Hyperterminal. Connect a “ComPair UART”- Starting up the TV set in the Manual Software Upgrade mode
cable (3138 188 75051) from the service connector in the TV to will show access to USB, meant to copy software content from
the “multi function” jack at the front of ComPair II box. USB to the DRAM.Progress is shown in the logging as follows:
Required settings in ComPair before starting to log: “cosupgstdcmds_mcmdwritepart: Programming 102400 bytes,
- Start up the ComPair application. 40505344 of 40607744 bytes programmed”.
- Select the correct database (open file “Q55X.X”, this will set
the ComPair interface in the appropriate mode). Startup in Jett Mode:
- Close ComPair Check Uart logging in Jet mode mentioned as : “JETT UART
After start-up of the Hyperterminal, fill in a name (f.i. “logging”) READY”.
in the “Connection Description” box, then apply the following
settings: Uart logging changing preset:
1. COMx => COMMAND: calling DFB source = RC6, system=0, key = 4”.
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5.8.9 Loudspeakers
5. Stop bits = 1
6. Flow control = none
During the start-up of the TV set, the logging will be displayed. Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
This is also the case during rebooting of the TV set (the same
audio amplifier can be damaged by disconnecting the speakers
logging appears time after time). Also available in the logging
is the “Display Option Code” (useful when there is no picture), during ON-state of the set!
look for item “DisplayRawNumber” in the beginning of the
logging. Tip: when there is no picture available during rebooting 5.8.10 PSL
you are able to check for “error devices” in the logging (LAYER
2 error) which can be very helpful to determine the failure cause In case of no picture when CSM (test pattern) is activated and
of the reboot. For protection state, there is no logging. backlight doesn’t light up, it’s recommended first to check the
inverter on the PSL + wiring (LAYER 2 error = 17 is displayed
5.8.8 Guidelines Uart logging in SDM).

Description possible cases: 5.8.11 Tuner

Uart loggings are displayed: Attention: In case the tuner is replaced, always check the tuner
• When Uart loggings are coming out, the first conclusion we options!
can make is that the TV set is starting up and
communication with the flash RAM seems to be supported. 5.8.12 Display option code
The PNX85500 is able to read and write in the DRAMs.
• We can not yet conclude : Flash RAM and DRAMs are fully Attention: In case the SSB is replaced, always check the
operational/reliable.There still can be errors in the data
display option code in SAM, even when picture is available.
transfers, DRAM erros, read/write speed and timing
Performance with the incorrect display option code can lead to
control. unwanted side-effects for certain conditions.

No Uart logging at all:


New in this chassis:
• In case there is no Uart logging coming out, check if the
startup script can be send over the I2C bus (3 trials to While in the download application (start up in TV mode + “OK”
button pressed), the display option code can be changed via
startup) + power supplies are switched on and stable.
062598 HOME XXX special SAM command (XXX=display
• No startup will end up in a blinking LED status : error
LAYER 1 = “2”, error LAYER 2 = “53” (startup with SDM option in 3 digits).
solder paths short).
• Error LAYER 2 = “15” (hardware cause) is more related to
a supply issue while error LAYER 2 = “53” (software cause)
refers more to boot issues.

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 35

5.8.13 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be


exchanged. See figure “SSB replacement flowchart”.

In st ru ct io n n o t e SSB rep lacem en t Q543.x, Q548.x, Q549.x, and Q55x.x

Before starting: ST AR T
- prepare a USB memory stick with the latest software
- download the latest Main Software (Fus) from www.p4c.philips.com
- unzip this file
- create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and
save the autorun.upg file in this "upgrades" folder.
Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in Set is still oper ating?
case there are more than one "autorun.upg" files on the USB stick.
No

Yes

C onnect the U SB stick to the set,


go to SAM and save the current TV settings via “Upload to USB”

1. D isconnect the WiF i module fr om the PC I connector (only for Q549.x SSB)
2. Replace the SSB by a Service SSB.
3. Place the WiFi module in the PCI connector.
4. Mount the Service SSB in the set.

Start-up the set


Due to a possible wrong display option code in the received Service
SSB (NVM), it’s possible that no picture is displayed. Due to this
the download application will not be shown either. This tree enables you
to load the main software step-by-step via the UART logging on the PC
(this for visual feedback). Set behaviour?
No pictur e displayed Pictur e displayed
Set is starting up without software
upgrade menu appearing on screen

1) Start up the TV set, equiped with the Service SSB,


and enable the UART logging on the PC. Pictur e displayed
Set is starting up with software
upgrade menu appearing on screen
2) The TV set will start-up automatically in the
download application if main TV software is not loaded.

1) Plug the USB stick into the TV set and select


3) Plug the prepared USB stick into the TV set. Follow the the “autorun .upg” file in the displayed browser.
instructions in the UART log file, press “Right” cursor key to enter
the list. Navigate to the “autorun.upg” file in the UART logging
printout via the cursor keys on the remote control. When the
correct file is selected, press “Ok”.
2) Now the main software will be loaded automatically,
supported by a progress bar.
4) Press "Down" cursor and “Ok” to start flashing the main
TV software. Printouts like: “L: 1-100%, V: 1-100% and
P: 1-100%” should be visible now in the UART logging.

3) Wait until the message “Operation successful !” is displayed


5) Wait until the message “Operation successful !” is logged in and remove all inserted media. Restart the TV set.
the UART log and remove all inserted media. Restart the TV set.

Set the correct “Display code” via “062598 -HOME- xxx” where
“xxx” is the 3 digit display panel code (see sticker on the side
or bottom of the cabinet)

After entering the “Display Option” code, the set is going to


Standby
(= validation of code)

Restart the set


No

Connect PC via the ComPair interface to Service connector.


Saved settings
on USB stick?

Start TV in Jett mode (DVD I + (OSD)) Yes


Open ComPair browser Q54x
In case of settings reloaded from USB, the set type,
Go to SAM and reload settings serial number, display 12 NC, are automatically stored
via “Download from USB” function. when entering display options.
Program set type number, serial number, and display 12 NC
Program E - DFU if needed.

If not already done:


Check latest software on Service website. - Check if correct “display option” code is programmed.
Update main and Stand-by software via USB. - Verify “option codes” according to sticker inside the set.
- Default settings for “white drive” > see Service Manual.
Attention point for Net TV: If the set type and serial number are not
filled in, the Net TV functionality will not work. It will not be possible
to connect to the internet.
Check and perform alignments in SAM according to the
Service Manual. Option codes, colour temperature, etc.

Final check of all menus in CSM.


Special attention for HDMI Keys and Mac address.
Check if E - D F U is present.

End Q54x.E SSB Board swap – VDS


Updated 22-03-2010

H_16771_007a.eps
100402

Figure 5-11 SSB replacement flowchart

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EN 36 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

Set is st art in g u p in F act o ry m o d e

Set is starting up in F actory m ode?

Noisy picture with bands/lines is visible and the An “F” is displayed (and the HDMI 1
RED LED is continuous on. input is displayed).

- Press the “volume minus” button on the TVs local keyboard for 5 ~10
seconds

- Press the “SOURCE” button for 10 seconds until the “F” disappears
from the screen or the noise on the screen is replaced by “blue mute”

The noise on the screen is replaced


with the blue mute or the “F” is disappeared!

Unplug the mains cord to verify the correct


disabling of the Factory mode.

Program display option code


via “062598 MENU”, followed by
the 3 digits code of the display
(this code can be found
on a sticker on - or inside - the set).

After entering “display option” code, the set is


going in stand-by mode (= validation of code)

R estart the set

H_16771_007b.eps
100322

Figure 5-12 SSB replacement flowchart - Factory mode

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Service Modes, Error Codes, and Fault Finding Q552.1A LA 5. EN 37

18753_211_100811.eps
100811

Figure 5-13 SSB start-up

5.9 Software Upgrading Automatic Software Upgrade


In “normal” conditions, so when there is no major problem with
5.9.1 Introduction the TV, the main software and the default software upgrade
application can be upgraded with the “AUTORUN.UPG”
(FUS part of the one-zip file: e.g. 3104 337 05661 _FUS
The set software and security keys are stored in a NAND-
_Q555X_ x.x.x.x_prod.zip). This can also be done by the
Flash, which is connected to the PNX85500. consumers themselves, but they will have to get their software
from the commercial Philips website or via the Software Update
It is possible for the user to upgrade the main software via the Assistant in the user menu (see eUM). The “autorun.upg” file
USB port. This allows replacement of a software image in a must be placed in the root of the USB stick.
stand alone set, without the need of an E-JTAG debugger. A How to upgrade:
description on how to upgrade the main software can be found 1. Copy “AUTORUN.UPG” to the root of the USB stick.
in the electronic User Manual. 2. Insert USB stick in the set while the set is operational. The
set will restart and the upgrading will start automatically. As
Important: When the NAND-Flash must be replaced, a new soon as the programming is finished, a message is shown
SSB must be ordered, due to the presence of the security keys! to remove the USB stick and restart the set.
(CI +, MAC address, ...).
Perform the following actions after SSB replacement: Manual Software Upgrade
1. Set the correct option codes (see sticker inside the TV). In case that the software upgrade application does not start
2. Update the TV software => see the eUM (electronic User automatically, it can also be started manually.
Manual) for instructions. How to start the software upgrade application manually:
3. Perform the alignments as described in chapter 6 (section 1. Disconnect the TV from the Mains/AC Power.
6.5 Reset of Repaired SSB). 2. Press the “OK” button on a Philips TV remote control or a
4. Check in CSM if the CI + key, MAC address.. are valid. Philips DVD RC-6 remote control (it is also possible to use
For the correct order number of a new SSB, always refer to the a TV remote in “DVD” mode). Keep the “OK” button
Spare Parts list! pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.
5.9.2 Main Software Upgrade
Attention!
• The “UpgradeAll.upg” file is only used in the factory. In case the download application has been started manually,
the “autorun.upg” will maybe not be recognized.
What to do in this case:
1. Create a directory “UPGRADES” on the USB stick.
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EN 38 5. Q552.1A LA Service Modes, Error Codes, and Fault Finding

2. Rename the “autorun.upg” to something else, e.g. to


“software.upg”. Do not use long or complicated names,
keep it simple. Make sure that “AUTORUN.UPG” is no
longer present in the root of the USB stick.
3. Copy the renamed “upg” file into this directory.
4. Insert USB stick into the TV.
5. The renamed “upg” file will be visible and selectable in the
upgrade application.

Back-up Software Upgrade Application


If the default software upgrade application does not start (could
be due to a corrupted boot sector) via the above described
method, try activating the “back-up software upgrade
application”.
How to start the “back-up software upgrade application”
manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the “CURSOR DOWN”-button on a Philips TV
remote control while reconnecting the TV to the Mains/AC
Power.
3. The back-up software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software


via a USB stick. The method is similar to upgrading the main
software via USB.
Use the following steps:
1. Create a directory “UPGRADES” on the USB stick.
2. Copy the Stand-by software (part of the one-zip file, e.g.
StandbyFactory_88.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
4. Start the download application manually (see section “
Manual Software Upgrade”.
5. Select the appropriate file and press the “OK” button to
upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and


instructions on how and when to use it.
• AmbiCpld_Q55XX_x.x.x.x_prod.zip. Contains the
program instruction and software content, needed to
upgrade the ambilight CPLD on the TV550 platform.
• BalanceFPGA_Q555X_x.x.x.x_prod.zip. Contains the
BalanceFPGA software in “upg” format.
• FUS_Q555X_x.x.x.x_prod.zip. Contains the
“autorun.upg” which is needed to upgrade the TV main
software and the software download application.
• PNX5130UPG_Q555X_x.x.x.x_prod.zip. Contains the
PNX5130 software in “upg” format.
• StandbySW_Q555X_x.x.x.x_prod.zip. Contains the
StandbyFactory software in “upg” format.
• ProcessNVM_Q55XX_x.x.x.x_prod.zip. Default NVM
content. Must be programmed via ComPair or can be
loaded via USB, be aware that all alignments stored in
NVM are overwritten here.

5.9.5 UART logging 2K10 (see section “5.8 Fault Finding and
Repair Tips, 5.8.7 Logging)

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Alignments Q552.1A LA 6. EN 39

6. Alignments
Index of this chapter: For the next alignments, supply the following test signals via a
6.1 General Alignment Conditions video generator to the RF input:
6.2 Hardware Alignments • EU/AP-PAL models: a PAL B/G TV-signal with a signal
6.3 Software Alignments strength of at least 1 mV and a frequency of 475.25 MHz
6.4 Option Settings • US/AP-NTSC models: an NTSC M/N TV-signal with a
6.5 Reset of Repaired SSB signal strength of at least 1 mV and a frequency of 61.25
6.6 Total Overview SAM modes MHz (channel 3).
• LATAM models: an NTSC M TV-signal with a signal
strength of at least 1 mV and a frequency of 61.25 MHz
6.1 General Alignment Conditions (channel 3).

Perform all electrical adjustments under the following 6.3.1 White Point
conditions:
• Power supply voltage (depends on region):
• Choose “TV menu”, “Setup”, “More TV Settings” and then
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).
“Picture” and set picture settings as follows:
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).
– EU: 230 VAC / 50 Hz (± 10%). Picture Setting
– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%). Contrast 100
– US: 120 VAC / 60 Hz (± 10%). Brightness 50
• Connect the set to the mains via an isolation transformer Colour 0
with low internal resistance. Light Sensor Off
• Allow the set to warm up for approximately 15 minutes. Picture format Unscaled
• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to • In menu “Picture”, choose “Pixel Plus HD” and set picture
AUDIO_GND). settings as follows:
Caution: It is not allowed to use heat sinks as ground. Picture Setting
• Test probe: Ri > 10 MΩ, Ci < 20 pF. Dynamic Contrast Off
• Use an isolated trimmer/screwdriver to perform Dynamic Backlight Off
alignments. Colour Enhancement Off
Gamma 0
6.1.1 Alignment Sequence
• Go to the SAM and select “Alignments”-> “White point”.
• First, set the correct options:
– In SAM, select “Option numbers”. White point alignment LCD screens:
– Fill in the option settings for “Group 1” and “Group 2” • Use a 90% white screen to the HDMI input and set the
according to the set sticker (see also paragraph 6.4 following values:
Option Settings). – “Colour temperature”: “Normal”.
– Press OK on the remote control before the cursor is – All “White point” values to: “127”.
moved to the left.
– In submenu “Option numbers” select “Store” and press In case you have a colour analyser:
OK on the RC. • Measure with a calibrated contactless colour analyser
• OR: (Minolta CA-210 or Minolta CS-200) in the centre of the
– In main menu, select “Store” again and press OK on screen. Consequently, the measurement needs to be done
the RC. in a dark environment.
– Switch the set to Stand-by. • Adjust the correct x, y coordinates (while holding one of the
• Warming up (>15 minutes). White point registers R, G or B on 127) by means of
decreasing the value of one or two other white points to the
correct x, y coordinates (see Table 6-1 White D alignment
6.2 Hardware Alignments values CCFL backlight panels, 6-2 White D alignment
values LED backlight panels - colour analyser Minolta CA-
Not applicable. 210 or 6-3 White D alignment values LED backlight panels
- colour analyser Minolta CS-200). Tolerance: dx: ± 0.002,
dy: ± 0.002.
6.3 Software Alignments • Repeat this step for the other colour temperatures that
need to be aligned.
Put the set in SAM mode (see Chapter 5. Service Modes, Error • When finished press OK on the RC and then press STORE
Codes, and Fault Finding). The SAM menu will now appear on (in the SAM root menu) to store the aligned values to the
the screen. Select ALIGNMENTS and go to one of the sub NVM.
menus. The alignments are explained below. • Restore the initial picture settings after the alignments.
The following items can be aligned:
• White point Table 6-1 White D alignment values CCFL backlight panels
• Ambilight
• TCON Alignment Value Cool (11000K) Normal (9000K) Warm (6500K)
• Reset TCON Alignment. x 0.276 0.287 0.313
y 0.282 0.296 0.329
To store the data:
• Press OK on the RC before the cursor is moved to the
left
• In main menu select “Store” and press OK on the RC
• Switch the set to stand-by mode.

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EN 40 6. Q552.1A LA Alignments

Table 6-2 White D alignment values LED backlight panels - Table 6-7 TCON default alignment setting Matisse
colour analyser Minolta CA-210
Panel Panel VCOM default

Value Cool (9420K) Normal (8120K) Warm (6080K) LGD 42 LED n.a.1

x 0.282 0.292 0.320 46 LED n.a.1


SHP
y 0.298 0.311 0.345 52 LED n.a.1

Table 6-3 White D alignment values LED backlight panels - Note: 1). no TCON alignment required.
colour analyser Minolta CS-200
6.3.3 Alignment of the Ambilight modules
Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.276 0.287 0.313 Every Ambilight module is aligned by a matrix and by the
y 0.282 0.296 0.329 brightness. After replacement of a module, the brightness must
be aligned with the other modules.
Method:
1. Go to SAM (press 062596 + OK button).
If you do not have a colour analyser, you can use the default
2. Select “Alignments”.
values. This is the next best solution. The default values are 3. Select “Ambilight”: a white testpattern shall be displayed.
average values coming from production.
4. Select the number of the module (pixel) that has to be
• Select a COLOUR TEMPERATURE (e.g. COOL,
aligned. Module 1 is the first one which will come across
NORMAL, or WARM). according the wire connections starting by the small signal
• Set the RED, GREEN and BLUE default values according
panel and proceding towards the ambient light
to the values in Table 6-4 and Table 6-5.
modules.The first module will be attached to the next
• When finished press OK on the RC, then press STORE (in module 2, module number 2 to number 3 etc.
the SAM root menu) to store the aligned values to the NVM.
5. Align the brightness compared with the neighbouring
• Restore the initial picture settings after the alignments.
modules. The brightness will be automatically stored.
6. Select one of the 10 matrixes which color corresponds with
Table 6-4 White tone default alignment setting da Vinci the neighbouring modules. “Matrix 0” is the factory
alignment and can always be retrieved. The alignment is
da Vinci 40PFL6605 46PFL6605 stored automatically.
Colour Temp R G B R G B R G B
Normal 114 127 114 113 127 115
Cool 95 122 127 108 127 127
6.4 Option Settings
Warm 127 127 65 127 127 78
6.4.1 Introduction
Table 6-5 White tone default alignment setting Matisse
The microprocessor communicates with a large number of I2C
ICs in the set. To ensure good communication and to make
Matisse 42PFL8605 46PFL8605 52PFL8605
digital diagnosis possible, the microprocessor has to know
Colour Temp R G B R G B R G B
which ICs to address. The presence / absence of these
Normal 127 127 115 t.b.d. t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
PNX51XX ICs (back-end advanced video picture improvement
Cool 112 121 127 t.b.d. t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
IC which offers motion estimation and compensation features
Warm 127 114 63 t.b.d. t.b.d. t.b.d. t.b.d. t.b.d. t.b.d.
(commercially called HDNM) plus integrated Ambilight control)
is made known by the option codes.
6.3.2 TCON/VCOM alignment
Notes:
Sets with forward integration have the TCON on SSB. The • After changing the option(s), save them by pressing the OK
alignment of this TCON is stored in the SSB, and is related to button on the RC before the cursor is moved to the left,
the used display. When an SSB or a display is replaced, a new select STORE in the SAM root menu and press OK on the
value must be entered. RC.
A default value (see table below) is copied from the display file • The new option setting is only active after the TV is
(after entering the correct display code) and is shown in the switched “off” / “stand-by” and “on” again with the mains
SAM menu. But on top of this, the default value can be switch (the NVM is then read again).
overruled manually via the menu item “TCON alignment”.
The current value is shown with 4 digits, and can be changed 6.4.2 Dealer Options
by a digit entry. After pressing “OK”, the value is stored.
The menu item "Reset TCON alignment" can be used to return For dealer options, in SAM select “Dealer options”.
to the default value from the display file. A notification is shown: See Table 6-8 SAM mode overview.
"TCON alignment has been reset".
6.4.3 (Service) Options
Table 6-6 TCON default alignment setting da Vinci
Select the sub menu's to set the initialisation codes (options) of
Panel Panel VCOM default
the model number via text menus.
SHP 40 LED 0098
See Table 6-8 SAM mode overview.
(Max:1023) 46 LED 0129

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in


two long strings of numbers).
An option number (or “option byte”) represents a number of
different options. When you change these numbers directly,
you can set all options very quickly. All options are controlled
via eight option numbers.

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Alignments Q552.1A LA 6. EN 41

When the NVM is replaced, all options will require resetting. To


be certain that the factory settings are reproduced exactly, you
must set both option number lines. You can find the correct
option numbers on a sticker inside the TV set.
Example: The options sticker gives the following option
numbers:
• 08192 00133 01387 45160
• 12232 04256 00164 00000
The first line (group 1) indicates hardware options 1 to 4, the
second line (group 2) indicate software options 5 to 8.
Every 5-digit number represents 16 bits (so the maximum value
will be 65536 if all options are set).
When all the correct options are set, the sum of the decimal
values of each Option Byte (OB) will give the option number.

Diversity
Not all sets with the same Commercial Type Number (CTN)
necessarily have the same option code! 18310_221_090318.eps
Use of Alternative BOM => an alternative BOM number usually 090319
indicates the use of an alternative display or power supply. This
results in another display code thus in another Option code. Figure 6-1 SSB identification
Refer to Chapter 2. Technical Specifications, Diversity, and
Connections.

6.4.5 Option Code Overview

Refer to the sticker in the set for the correct option codes.
Important: after having edited the option numbers as
described above, you must press OK on the remote control
before the cursor is moved to the left!

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a Service


repair shop (SSB repair on component level) implies the reset
of the NVM on the SSB.
A repaired SSB in Service should get the service Set type
“00PF0000000000” and Production code “00000000000000”.
Also the virgin bit is to be set. To set all this, you can use the
ComPair tool or use the “NVM editor” and “Dealer options”
items in SAM (do not forget to “store”).

After a repaired SSB has been mounted in the set (set repair
on board level), the type number (CTN) and production code of
the TV has to be set according to the type plate of the set. For
this (new in this platform), you can use the NVM editor in
SAM. This action also ensures the correct functioning of the
“Net TV” feature and access to the Net TV portals. The loading
of the CTN and production code can also be done via ComPair
(Model number programming).

In case of a display replacement, reset the “Operation hours


display” to “0”, or to the operation hours of the replacement
display.

6.5.1 SSB identification

Whenever ordering a new SSB, it should be noted that the


correct ordering number (12nc) of a SSB is located on a sticker
on the SSB. The format is <12nc SSB><serial number>. The
ordering number of a “Service” SSB is the same as the ordering
number of an initial “factory” SSB.

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EN 42 6. Q552.1A LA Alignments

6.6 Total Overview SAM modes

Table 6-8 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Hardware Info A. SW version e.g. “Q5521_0.33.0.0 Display TV & Stand-by SW version and CTN serial
B. Stand-by processor version e.g. “STDBY_42.42.0.0” number

C. Production code e.g. “see type plate”


Operation hours Displays the accumulated total of operation hours.TV
switched “on/off” & every 0.5 hours is increase one
Errors Displayed the most recent errors
Reset error buffer Clears all content in the error buffer
Alignment White point Colour temperature Normal 3 different modes of colour temperature can be
Warn selected

Cool
White point red LCD White Point Alignment. For values,
White point green see Table 6-4 White tone default alignment setting
da Vinci and 6-5 White tone default alignment setting
White point blue
Matisse
Ambilight Select module
Brightness
Select matrix
TCON alignment used when a new display code (after a SSB
exchange) is keyed-in and if you have alignment
values from production; see Table 6-6 TCON default
alignment setting da Vinci and 6-7 TCON default
alignment setting Matisse
Reset TCON alignment used when a new display code (after a SSB
exchange) is keyed-in and if you do not have
alignment values from production
Dealer options Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not
start up (once) with a language selection menu after
the mains switch is turned “on” for the first time (virgin
mode)
E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)
Auto store mode None
PDC/VPS
TXT page
PDC/VPS/TXT

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Alignments Q552.1A LA 6. EN 43

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Options Digital broadcast DVB Off/On Select DVB On/Off
DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country
DVB - T light Off/On Select DVB T light On/Off
DVB - C Off/On Select DVB C On/Off
DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country
DVB - C light Off/On Select DVB C light On/Off
DVB - S Off/On Select DVB S On/Off
Over the air download Off/On or Country dependent Select Over the air download On/Off or by country
8 days EPG Off/On Select 8 day EPG On/Off
Digital features Ethernet Off/On Select Ethernet On/Off
Wi-Fi Off/On Select Wi-Fi On/Off
DLNA Off/On Select DLNA On/Off
On-line service On On-line service is On
Videostore SD card slot Off/On Select Videostore SD card slot On/Off
Multiview Off/On Select Multiview On/Off
Internet software update Off Internet software update is Off
Display Screen 237 / LCD Sharp D3GA23 46" Displayed the panel code & type model
LightGuide Off/On Select LightGuide On/Off
Display fans Not present/Present Select Display fans Present/Not present
Temperature sensor No sensor/On backside/In display/ Sensor present Yes/No and in case Yes, where
On SSB
Temperature LUT 0 N.A.
E-box & monitor Off/On Select E-box & monitor On/Off
Video reproduction Light sensor Off/On Select Light sensor On/Off
Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference
styling)
Super resolution Off/On Super resolution Off/On
Smart bit enhancement Off/On Smart bit enhancement Off/On
Pixel Plus type Pixel Plus HD Select type of picture improvement
Perfect Pixel HD
Pixel Precise HD
Natural motion type Perfect Natural Motion Natural motion type selection
HD Natural Motion
Ambilight None Select type of Ambilight modules use
2 sided 3/3
2 sided 4/4
2 sided 5/5
2 sided 6/6
2 sided 7/7
3 sided 5/5/5
3 sided 6/6/6
3 sided 7/7/7
3 sided 6/9/6
Ambilight sunset Off/On Ambilight sunset On/Off
Audio reproduction Acoustic system Cabinet design used for setting dynamic audio
parameters

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EN 44 6. Q552.1A LA Alignments

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Source selection EXT1/AV1 type SCART CVBS RGB LR Select input source when connected with external
CVBS Y/C YPbPr LR equipment

CVBS Y/C YPbPr HV LR


EXT2/AV2 type SCART CVBS RGB LR Select input source when connected with external
CVBS LR equipment

YPbPr LR
None
EXT3/AV3 type None Select input source when connected with external
CVBS equipment

CVBS LR
CVBS Y/C LR
YPbPr
YPbPr LR
YPbPr HV LR
SIDE I/O Off/On Select SIDE I/O On/Off
S-VIDEO (Y/C) Off/On Select S-VIDEO (Y/C) On/Off
HDMI 2 Off/On Select HDMI 2 On/Off
HDMI 3 Off/On Select HDMI 3 On/Off
HDMI side Off/On Select HDMI side On/Off
HDMI CEC Viewport 21:9 Off/On Select HDMI CEC Viewport 21:9 On/Off
HDMI CEC OneUX seamless Off/On Select HDMI CEC OneUX seamless On/Off
Miscellaneous Region Europe Select Region/country
AP-PAL-Multi
China
Australia
Latam
Russia
Tuner type Select type of Tuner used
Hotel mode Off Hotel mode is Off
Option numbers Group 1 e.g. “00008.01793.15421.08192” The first line (group 1) indicates hardware options 1
to 4
Group 2 e.g. “44013.34315.00000.00000” The second line (group 2) indicates software options
5 to 8
Store Store after changing
Initialise NVM N.A.
Store Select Store in the SAM root menu after making any
changes
Operation hours display 0003 In case the display must be swapped for repair, you
can reset the “”Display operation hours” to “0”. So,
this one does keeps up the lifetime of the display
itself (mainly to compensate the degeneration
behaviour)
Software maintenance Software events Display Display information is for development purposes
Clear
Test reboot
Test cold reboot
Test application crash
Hardware events Display Display information is for development purposes
Clear
Test setting Digital info Centre frequency: 774605208
QAM modulation: None Display information is for development purposes
Symbol rate:
Original network ID: 0
Network ID: 0
Transport stream ID: 0
Service ID: 0
Hierarchical modulation: 0
Selected video PID: 0
Selected main audio PID: 0
Selected 2nd audio PID: 0
Install start frequency 000 Install start frequency from “0” MHz
Install end frequency 999 Install end frequency as “999” MHz
Default install frequency
Installation Digital only Select Digital only or Digital + Analogue before
Digital + Analogue installation

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Alignments Q552.1A LA 6. EN 45

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Development file Development 1 file version Display parameters DISPT6.0.9.8 Display information is for development purposes
versions Acoustics parameters ACSTS
0.39.6.16
PQ - TV550 1.0.22.1
PQS- Profile set
PQF - Fixed settings
PQU - User styles
Ambilight parameters PRFAM 5.0.2.4
Development 2 file version 12NC one zip software Display information is for development purposes
Initial main software
NVM version Q55x1_0.3.1.0
Flash units software
Temp com file version none
Upload to USB All To upload several settings from the TV to an USB
Channel list stick

Personal settings
Option codes
Alignments
Identification data
History list
Download from USB All To download several settings from the USB stick to
Channel list the TV

Personal settings
Option codes
Alignments
Identification data
NVM editor Type number see type plate NVM editor; re key-in type number and production
AG code see type plate code after SSB replacement

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EN 46 7. Q552.1A LA Circuit Descriptions

7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction
7.2 Power Architecture
The Q552.1A LA chassis is part of the TV550 platform and
7.3 DC/DC Converters
comes with the following stylings: “Da Vinci” (series
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception xxPFL6xxx) and “Matisse” (series xxPFL8xx). The TV550
7.5 HDMI
platform is the successor of the TV543 platform.
7.6 Video and Audio Processing - PNX85500
7.7 Back-End
7.8 Ambilight 7.1.1 Implementation
7.9 TCON
Key components of this chassis are:
• PNX85500 System-On-Chip (SOC) TV Processor
Notes:
• Only new circuits (circuits that are not published recently) • TX31XX Hybrid Tuner (DVB-T/C, analogue)
• SII9x87 HDMI Switch
are described.
• TPA312xD2PWP Class D Power Amplifier
• Figures can deviate slightly from the actual situation, due
to different set executions. • LAN8710 Dual Port Gigabit Ethernet media access
controller.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter 7.1.2 TV550 Architecture Overview
10. Circuit Diagrams and PWB Layouts). Where
necessary, you will find a separate drawing for clarification. For details about the chassis block diagrams refer to chapter 9.
Block Diagrams. An overview of the TV550 architecture can be
found in Figure 7-1.

18770_244_100203.eps
100219

Figure 7-1 Architecture of TV550 platform - TCON integrated in display (xxPFL8xxx)

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Circuit Descriptions Q552.1A LA 7. EN 47

18770_245_100203.eps
100219

Figure 7-2 Architecture of TV550 platform - TCON integrated on SSB (xxPFL6xxx)

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EN 48 7. Q552.1A LA Circuit Descriptions

7.1.3 SSB Cell Layout

LOW PROFILE
FLASH
1M99

CA
DDR
1M95

Class-
D
RJ45
Tuner

Pr Pb Y L R
OUT

9187

3
0

HDMI 1.3 HDMI 1.3 HDMI 1.3

18990_200_100401.eps
100401

Figure 7-3 SSB layout cells (top view) TCON integrated in display (xxPFL8xxx)

DVB-S
TCON

Tuner

HDMI 1.3 HDMI 1.3 HDMI 1.3 VGA

18990_201_100401.eps
100401

Figure 7-4 SSB layout cells (top view) TCON integrated on SSB (xxPFL6xxx)

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Circuit Descriptions Q552.1A LA 7. EN 49

7.2 Power Architecture

Refer to figure Figure 7-5 for the power architecture of this


platform.

18770_234_100127.eps
100127

Figure 7-5 Power Architecture TV550 platform

7.2.1 Power Supply Unit • Output to the display; in case of


- IPB: High voltage to the LCD panel
All power supplies are a black box for Service. When defective, - PSL and PSLS (LED-driver outputs)
a new board must be ordered and the defective one must be - PSDL (high frequent) AC-current.
returned, unless the main fuse of the board is broken. Always
replace a defective fuse with one with the correct 7.2.2 Diversity
specifications! This part is available in the regular market.
Consult the Philips Service web portal for the order codes of the The diversity in power supply units is mainly determined by the
boards. diversity in displays.

Important delta’s with the TV543 platform are: The following displays can be distinguished:
• New power architecture for LED backlight (PSL, PSLS, • CCFL/EEFL backlight: power board is conventional IPB
PSDL) • LED backlight:
• “Boost”-signal is now a PWM-signal + continuous variable. - side-view LED without scanning: PSL power board
- side-view LED with scanning: PSLS power board
The control signals are: - direct-view LED without 2D-dimming: PSL power board
• Standby - direct-view LED with 2D-dimming: PSDL power board.
• Lamp “on/off”
• DIM (PWM) (not for PSDL) • PSL stands for Power Supply with integrated LED-drivers.
• Boost (PWM except for IPB) • PSLS stands for a Power Supply with integrated LED-
• Power-OK: indicates that the main converter is functioning drivers with added Scanning functionality (added
(feedback signal to the SSB). microcontroller).
• PSDL stands for a Power Supply for Direct-view LED
In this manual, no detailed information is available because of backlight with 2D-dimming.
design protection issues.

The output voltages to the chassis are:


• +3V3-STANDBY (standby-mode only)
• +12V (on-mode)
• +Vsnd (+24V) (audio power) (on-mode)
• +24V (bolt-on power) (on-mode)

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EN 50 7. Q552.1A LA Circuit Descriptions

7.2.3 Connector overview • the LNBH23Q (item no. 7T50) sends a feedback signal via
the V0-CNTRL line
Table 7-1 Connector overview • the switching frequency of the +5V-DVBS to +1-DVBS
switched mode converter is 900 kHz (item no. 7T00)
Connector
• a delay line for the +2V5-DVBS and +1V-DVBS lines is
no. 1308 1311 1319 1316 1M95 1M99 1M09 1MP1
created with item no. 3T03 (R=10k) and 2T06 (C=100n)
Descr. mains mains disp. disp. to SSB to SSB Amb. T-con
• a 3.3V to 2.5V linear stabiliser is built around item no. 7T01
Pin CN1 CN2 CN3 CN4 CN5 CN6 CN7 CN8
• a 5V to 3.3V linear stabiliser is built around item no. 7T02.
1 N L’ t.b.d. t.b.d. 3V3std +12V 24Vb +12V
2 L L” t.b.d. t.b.d. Stndby +12V 24Vb +12V 7.4 Front-End Analogue and DVB-T, DVB-C;
3 - - - - GND1 GND1 GND1 n.c.
ISDB-T reception
4 - - - - GND1 GND1 GND1 GND1
5 - - - - GND1 BL_ON - GND1
_OFF 7.4.1 European/China region
6 - - - - +12V DIM - -
7 - - - - +12V Boost - - The Front-End for the European/China region consist of the
8 - - - - +12V n.c. - - following key components:
9 - - - - +Vsnd POK - -
10 - - - - GND_ - - -
• Hybrid Tuner
SND
• Switchable SAW filter 7/8 MHz (Eur.), or single SAW filter
11 - - - - n.c. - - -
(8 MHz) (China)
12 - - - - - - - -
• Bandpass filter
• Amplifier
7.3 DC/DC Converters • PNX85500 SoC TV processor with integrated DVB-T and
DVB-C channel decoder and analogue demodulator.

The on-board DC/DC converters deliver the following voltages


Below find a block diagram of the front-end application for this
(depending on set execution):
region.
• +3V3-STANDBY, permanent voltage for the standby
controller, LED/IR receiver and controls; connector 1M95
pin 1
• +12V, input from the power supply for TV550 common
(active mode); connector 1M95 pins 6, 7 and 8
• +24V, input from the power supply for DVB-S2 (in active
mode); connector 1M09 pins 1 and 2
• +1V1, core voltage supply for PNX85500; has to be started
up first and switched “off” last (diagram B03B)
• +1V2, supply voltage for analogue blocks inside
PNX85500
• +1V8, supply voltage for DDR2 (diagram B03B)
• +2V5, supply voltage for analogue blocks inside
PNX85500 (see diagram B03E)
• +3V3, general supply voltage (diagram B03E) 18770_235_100127.eps
• +5V, supply voltage for USB and CAM (diagram B03E) 100219

• +5V-TUN, supply voltage for tuner (diagram B03E)


• +V-LNB, input voltage for LNB supply IC (item no. 7T50) Figure 7-6 Front-End block diagram European/China region
• +5V-DVBS, input intermediate supply voltage for DVB-S2
(diagram B08A) 7.4.2 Brazil region
• +3V3-DVBS, clean voltage for silicon tuner and DVB-S2
channel decoder The Front-End for the Brazil region consist of the following key
• +2V5-DVBS, clean voltage for DVB-S2 channel decoder components:
• +1V-DVBS, core voltage for DVB-S2 channel decoder.
• Hybrid Tuner with integrated SAW filter and amplifier
A +12 V under-voltage detector (see diagram B03C) enables • External ISDB-T channel decoder covering the Brazilian
the 12V to 3.3V and 12V to 5V DC/DC converters via the digital terrestrial TV standard
ENABLE-3V3-5V line, and the 12V to 1.8V DC/DC converter • Bandpass filter
via the ENABLE-1V8 line. DETECT2 is the signal going to the • Amplifier
standby microcontroller and ENABLE-3V3n is the signal • PNX85500 SoC TV with integrated analogue demodulator.
coming from the standby microcontroller.
Below find a block diagram of the front-end application for this
Diagram B03D contains the following linear stabilisers: region.
• +2V5 stabiliser, built around item no. 7UCO
• +5V-TUN stabiliser, built around items no. 7UA6 and 7UA7
• +1V2 stabiliser, built around items no. 7UA3 and 7UA4.

Diagram B08A contains the DVB-S2-related DC/DC


converters and -stabilisers:
• a +24V under-voltage detection circuitry is built around
item no. 7T04
• the switching frequency of the 24 to 14...20V switched
mode converter is 350 kHz (item no. 7T03 and +V-LNB
lines) 18770_236_100127.eps
100219
• the output signal on the +V-LNB line goes to the LNBH23Q
(item no. 7T50)
Figure 7-7 Front-End block diagram Brazil region
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Circuit Descriptions Q552.1A LA 7. EN 51

7.5 HDMI • Embedded HDMI HDCP keys


• Extended colour gamut and colour booster
In this platform, the Silicon Image Sil9x87 HDMI multiplexer is • Integrated USB2.0 host controller
• Improved MPEG artefact reduction compared with
implemented. Refer to figure 7-8 HDMI input configuration for
PNX8543
the application.
• Security for customers own code/settings (secure flash).

New in this platform is the implementation of the Audio Return


The TV550 combines front-end video processing functions,
Channel (ARC) (pin 14 on HDMI 1). The ARC in HDMI1.4
such as DVB-T channel decoding, MPEG-2/H.264 decode,
enables a TV, via a single HDMI cable, to send audio data
“upstream” to an A/V receiver or surround audio controller, analogue video decode and HDMI reception, with advanced
back-end video picture improvements. It also includes next
increasing user flexibility and eliminating the need for any
generation Motion Accurate Picture Processing (MAPP2). The
separate SPDIF audio connection.
MAPP2 technology provides state-of-the-art motion artifact
reduction with movie judder cancellation, motion sharpness
and vivid colour management. High flat panel screen
resolutions and refresh rates are supported with formats
including 1366 × 768 @ 100Hz/120Hz and 1920 × 1080 @
100Hz/120Hz. The combination of Ethernet, CI+ and H.264
supports new TV experiences with IPTV and VOD. On top of
that, optional support is available for 2D dimming in
combination with LED backlights for optimum contrast and
power savings up to 50%.

For a functional diagram of the PNX85500, refer


to Figure 7-9.

18770_243_100203.eps
100203

Figure 7-8 HDMI input configuration

The following multiplexers can be used:


• Sil9187A (does not support “Instaport” technology for fast
switching between input signals)
• Sil9287B (supports “Instaport” technology for fast
switching between input signals).
The hardware default I2C addresses are:
• Sil9187A: 0xB0/0xB2 (random: software workaround)
• Sil9287B: 0xB2 (fixed).

The Sil9x87 has the following specifications:


• +5V detection mechanism
• Stable clock detection mechanism
• Integrated EDID
• RT control
• HPD control
• Sync detection
• TMDS output control
• CEC control
• EDID stored in Sil9x87, therefore there are no EDID pins
on the SSB.

7.6 Video and Audio Processing - PNX85500

The PNX85500 is the main audio and video processor (or


System-on-Chip) for this platform. It has the following features:

• Multi-standard digital video decoder (MPEG-2, H.264,


MPEG-4)
• Integrated DVB-T/DVB-C channel decoder
• Integrated CI+
• Integrated motion accurate picture processing (MAPP2)
• High definition ME/MC
• 2D LED backlight dimming option

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EN 52 7. Q552.1A LA Circuit Descriptions

PNX85500x
MEMORY
CONTROLLER

TS input MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single, dual or
OUTPUT quad channel)

DVB DVB-T/C
channel decoder
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO
VIDEO ENCODER analog CVBS
OUTPUT

Low-IF DIGITAL IF MPEG/H.264


VIDEO Motion-accurate
DECODER pixel processing

SCALER,
AUDIO DEMOD DE-INTERLACE
SSIF, LR
AND DECODE AND NOISE
REDUCTION

AUDIO DACS analog audio


SPDIF AUDIO IN
AUDIO DSP
I 2S
AUDIO OUT
HDMI SPDIF
HDMI 450 MHz
RECEIVER AV-DSP

SYSTEM 560 MHz DRAWING


CONTROLLER MIPS32 ENGINE
(8051) 24KEf CPU

DMA BLOCK

I2C PWM GPIO IR ADC SPI UART I2C GPIO Flash USB 2.0 SD Ethernet
x8 Memory MAC
Card

18770_241_100201.eps
100219

Figure 7-9 PNX85500 functional diagram

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Circuit Descriptions Q552.1A LA 7. EN 53

7.7 Back-End

The following backlight types can be distinguished:


• CCFL/EEFL backlight; applicable to the xxPFL54xx sets
• LED backlight:
- side-view (edge) LED without scanning: PSL power
board; applicable to xxPFL76xx sets
- side-view (edge) LED with scanning: PSLS power board;
not applicable to this chassis
- direct-view LED with 0D-dimming: PSL power board;
applicable to xxPFL56xx sets
- direct-view LED with 2D-dimming: PSDL power board;
not applicable to this chassis.

Refer to section 7.2.2 Diversity for an in-depth explanation of


the different power boards that are used.

18770_242_100203.eps
100909

Figure 7-10 Backlight (xxPFL54xx, xxPFL56xx, xxPFL76xx sets)


application

7.8 Ambilight

In this chassis, only 2-sided Ambilight is implemented. Refer to


figure 7-11 Ambilight architecture.

1
MTK 1 1 1 1
Glue M
or M M M M
logic 5 AmbiLight AmbiLight
PNX85500 8 8 8 8
9
3 4 3 4

SSB
1M09

1M09

PSU

18770_209a_100202.eps
100202

Figure 7-11 Ambilight architecture

For an overview of the LED grouping per board, refer to figure


7-12 LED grouping per board.

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EN 54 7. Q552.1A LA Circuit Descriptions

+3V3

2B17

100n
7B20-1
74LVC2G17

5
6 PWM-CLOCK 2 3B01-2 7 1 6 1 3B30-1 8 PWM-CLOCK-BUF

× 100R 220R

2B00
6 5 3

2
33p

2B02

100p
L × ×
E 6 4 5 2
7B20-2
D L × L × 74LVC2G17
+3V3
E 6 3 E 6 4

5
D L × D L + SPI-CLOCK 1
3B01-1
8 3 4 4
3B30-4
5 SPI-CLOCK-BUF
100R 220R
E 6 E 5

2B01

2
33p
D D

2B10

100p
L L
E E
D D
18770_214_100126.eps
100126
36 30 24 18 15 12 9
Figure 7-15 Ambilight buffer

18770_210_100126.eps
100126 The temperature sensor is built around item no. 7B30 (diagram
AL1A) and indicates overtemperature of the board. Refer to
Figure 7-12 LED grouping per board figure 7-16 Temperature sensor.

The communication between PNX85500, Complex 3B34


Programmable Logic Device (CPLD) and the Ambilight module +3V3 +3V3
100K RES
uses the SPI protocol; refer to figure 7-13 Communication +3V3
7

6
protocol outside LED board. Between the CPLD and the LED
1K5 1%

1K5 1%
3B39-2

3B39-3
driver, as “extra” line is mentioned: 7B30
2

3
FB40
• Non-SPI signals that are required for the LED driver

5
1
4 TEMP-SENSOR
• Temperature sensor line. 3
LMV331IDCK
RES

2
2B08

3004
10K

10n
3B11

10K
-T

FB41
SPI S P I + e x tra
1M 59

C P LD
1K5 1%

PNX
3B39-1
2B09

10n
8

18770_211_100126.eps 18770_215_100126.eps
100126 100126

Figure 7-13 Communication protocol outside LED board Figure 7-16 Temperature sensor

Refer to figure for an overview of the communication inside the The EEPROM (item no. 7B07; diagram AL1A) contains
LED board. alignment information about the mounted LEDs and is
programmed during the alignment process in production. Refer
to figure 7-17 EEPROM.
E x tra

+3V3

SPI SPI SPI


LE D
2B20

100n

B uffer SPI-DATA-IN-BUF
D river
1M 84
1M 83

SPI-CLOCK-BUF
7B07
8

M95010-WDW6
+3V3 VCC

Tem p EEPRO M
7B06
5
D Φ Q
2

74LVC1G32GW 6 (64K)
5

sensor SPI-CS 1
C
4 1 3B02-2
S
Te m p SPI DATA-SWITCH 2
+3V3 HOLD
7 +3V3
1 3B02-1 8 3 7 10K 2
W
3

SPI 10K
GND
4

18770_213_100126.eps SPI-DATA-RETURN

100219
18770_216_100126.eps
100126
Figure 7-14 Communication protocol inside LED board
Figure 7-17 EEPROM
The buffer is built around item no. 7B20 (diagram AL1A) and
regenerates the clock signals. Refer to figure 7-15 Ambilight
The LED driver is built around item no. 7B26 (diagram AL1A)
buffer.
and controls the LEDs. Refer to figure 7-18 LED driver.

2010-Nov-12 back to
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Circuit Descriptions Q552.1A LA 7. EN 55

+3V3

2B11

100n

7B26-1

27
TLC5946RHB
3B00-1 VCC
BLANK 1 8 31 4 PWM-R1
BLANK 0
PWM-CLOCK-BUF 150R 24 5 PWM-G1
GSCLK 1
3B18 26 6 PWM-B1
IREF 2
1K8 FB35 3 7 PWM-G3
MODE 3
PROG 4 3B00-4 5 1 8 PWM-R3
SCLK 4
SPI-CLOCK-BUF 150R 2 9 PWM-R2
SIN 5
SPI-DATA-IN-BUF 23 10 PWM-G2
SOUT 6
SPI-DATA-IN 3 6 11 PWM-B2
7
SPI-DATA-OUT 3B00-3 150R 3B21 150R 22 OUT 14 PWM-B3
XERR 8
FB20 +3V3 3B22 25 15 PWM-G4
XHALF 9
LATCH 2 3B00-2 7 10K 32 16 PWM-R4
XLAT 10
150R 17 PWM-B4
11
12 18 PWM-B5
12
13 19 PWM-G5
13
7

6
28 NC 20 PWM-R5
2B04-2

2B04-1

2B04-4

2B04-3
14
100p

100p

100p

100p
29 21 DATA-SWITCH
15
3B31
GND GND_HS +3V3
2

30

33
2K0
7B26-2
TLC5946RHB
34 VIA 42
35 41
VIA VIA
36 40
VIA

37
38
39
18770_217_100126.eps
100126

Figure 7-18 LED driver

The Overvoltage Protection Circuit is built around item no.


7B50, 7B51, 7C20 and 7C22 (diagram AL1B). Refer to figure
7-19 Overvoltage Protection Circuit.

+24V
8 3B07-1 1

7B23-1
10K

BC847BS(COL)
6

2
2 3B07-2 7

1
10K

FB30
PWM-B1
3B35
+24V
+24V 7000 7001 7002 7003 7004 7005
99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 270R
3B36
5 3B07-4 4

7B23-2 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 270R


10K

BC847BS(COL)
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 3B37

68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
3 3B07-3 6

4
10K

1 3B03-1 8
FB31 1K5
PWM-R1
3B03-2
2 7
+24V
1K5

3 3B03-3 6
3 3B13-3 6

1K5
7B25
10K

BC847BW 3 3B03-4
4 5
1K5
1
2B03

100n
5 3B13-4 4

2
10K

FB32
PWM-G1

18770_218_100126.eps
100126

Figure 7-19 Overvoltage Protection Circuit

7.9 TCON

This section describes the application with the TCON


integrated on the SSB.

For the basic application, refer to figure 7-20 TCON


architecture.

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EN 56 7. Q552.1A LA Circuit Descriptions

EEPROM

LVDS (10 bit)


Timing
Controller Mini - LVDS
(TCON)

Control
PNX8550

Signals
Gamma
Reference Source Drive IC
Voltage
+3.3 V
+1.8 V

+16 V

Gate Drive IC
+12 V Power TFT – LCD Panel
Block
VGH (+28 V)
VGL (-6 V)

M ain P latform TCO N

LC D P anel
SSB
18770_238_100127.eps
100402

Figure 7-20 TCON architecture

For the TCON block diagram, refer to figure 7-21 TCON block
diagram.

LVDS T im in g C o n tro lle r IC M in i-


Input S p re a d SDRAM LVDS
S p e c tru m Output
1 6 bit
Form atter/S erializer

R 1 A ~E D a ta M ini-LVDS
LV D S P a th Transmitter
R e c e iv er B lo c k
R 1C LK
(L in e
B u ffer)
OPC ODC DCA RLV P /N
M ini-LVDS
(Optimum

(Dynamic

Transmitter
Contrast
Control)

Control)
Circuit)
Power

(Over

Right h alf
Drive

data
R 2 A ~E

LV D S Gate D river
C trl S ign als
R 2C LK R e c e iv er
Ve rtic a l & H o rizo n ta l
Tim in g g e n e ra tio n Source D river
C trl S ign als

I2 C ROM H s y n c/ Control
I2 C
S lav e M aster Vsync Signal
S S C L K (S p re a d Spectrum C lo c k) Output
DE

EEPROM

18770_239_100127.eps
100127

Figure 7-21 TCON block diagram

2010-Nov-12 back to
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Circuit Descriptions Q552.1A LA 7. EN 57

Notes to figure 7-21 TCON block diagram: • Timing Control Function: generates control signals to
• LVDS receiver: converts the data stream back into RGB column drivers and row drivers (Source Enable - SOE,
data and SYNC signals (Vsync, Hsync, Data Enable - DE) Gate Enable - GOE, Gate Start Pulse - GSP).
• ODC: Over Drive Circuit - to improve LC response For an overview of the TCON DC/DC converters, refer to figure
• Data Path Block: the video RGB data input to data path 7-22 TCON DC/DC converters.
block is delayed to align the column driver start pulse with
the column driver data

LGD SHP W h ere U sed

To G a te D riv e rs (G a te
VGH +2 8 V +3 5 V
H ig h Vo lta g e )
D C /D C
+ 12V C o n tro lle r To G a te D riv e rs (G a te
VGL -6 V -6 V
L o w Vo lta g e )
Tim in g C o n tro lle r IC
Vcc +3 V 3 +3 V 3
S u p p ly Vo lta g e
Tim in g C o n tro lle r IC
Vcc +1 V 8 +1 V 2
S u p p ly Vo lta g e
G a m m a R e fe renc e
Vre f +1 6 V +1 5 V 2
Vo lta g e

S o u rc e D riv e r S u p p ly
Vdd +1 6 V +1 5 V 6
Vo lta g e

18770_240_100128.eps
100128

Figure 7-22 TCON DC/DC converters

7.9.1 TCON Programming

For LGD - TCONs, the EEPROM can be programmed via


ComPair (via I2C communication).
For Sharp - TCONs, the data can be flashed with a “SPI
Programmer” (via SPI communication). This device has to be
ordered separately via Philips.

7.9.2 TCON Alignment

The purpose of TCON alignment is to obtain equal voltages for


both positive and negative LC polarity. This is to avoid “flicker”
and “image sticking”. For alignment, see 6.3.2 TCON/VCOM
alignment.

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EN 58 8. Q552.1A LA IC Data Sheets

8. IC Data Sheets
This chapter shows the internal block diagrams and pin electrical diagrams (with the exception of “memory” and “logic”
configurations of ICs that are drawn as “black boxes” in the ICs).

8.1 Diagram USB Hub B01C, USB2513B (IC 7F25)

Block diagram
To EEPROM or
To Upstream Upstream SMBus Master
24 MHz
VBUS USB Data SDA SCL
Crystal
3.3 V

Bus- Serial
Power Upstream Regulator PLL Interface
Detect/ PHY
Vbus Pulse
Serial
Repeater Interface Controller
Engine

3.3 V

Regulator
TT
#1
... TT
#x
Port
Controller

CRFILT

Routing & Port Re-Ordering Logic

PHY#1
Port #1
OC Sense
Switch Driver/
LED Drivers
... PHY#x
Port #x
OC Sense
Switch Driver/
LED Drivers

USB Data OC Port USB Data OC Port


Downstream Sense Power Downstream Sense Power
Switch/ Switch/
LED LED
Drivers Drivers

The ‘x’ indicates the number of available downstream ports: 2, 3, 4, or 7.


Note : The LED port indicators only apply to USB2513i.

Pinning information
SDA / SMBDATA / NON_REM[1]
SCL / SMBCLK / CFG_SEL[0]
HS_IND / CFG_SEL[1]
VBUS_DET

RESET_N

VDD33

NC

NC

NC
27
26
25
24
23
22
21
20
19

SUSP_IND / LOCAL_PWR / NON_REM[0] 28 18 NC

VDD33 29 17 OCS_N[2]

USBDM_UP 30 16 PRTPWR[2] / BC_EN[2]*

USBDP_UP 31
SMSC 15 VDD33
USB2512/12A/12B
XTALOUT 32 14 CRFILT
USB2512i/12Ai/12Bi
XTALIN / CLKIN 33 13 OCS_N[1]
(Top View QFN-36)
PLLFILT 34 12 PRTPWR[1] / BC_EN[1]*
Ground Pad
RBIAS 35 (must be connected to VSS) 11 TEST

VDD33 36 10 VDD33
1
2
3
4
5
6
7
8
9
USBDM_DN[1]

USBDM_DN[2]
USBDP_DN[1]

USBDP_DN[2]

VDD33

NC

NC

NC

NC

Indicates pins on the bottom of the device.

18770_301_100217.eps
100217

Figure 8-1 Internal block diagram and pin configuration

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IC Data Sheets Q552.1A LA 8. EN 59

8.2 Diagram Temp Sensor + Headphone B01J, LM75BDP (IC 7FD1)

Block diagram
VCC

LM75B
BIAS POINTER CONFIGURATION
REFERENCE REGISTER REGISTER

TEMPERATURE
BAND GAP COUNTER
REGISTER
TEMP SENSOR 11-BIT
SIGMA-DELTA
A-to-D TOS
TIMER
CONVERTER REGISTER
OSCILLATOR
COMPARATOR/ THYST
INTERRUPT REGISTER
POWER-ON
RESET OS

LOGIC CONTROL AND INTERFACE

A2 A1 A0 SCL SDA GND

Pinning information

SDA 1 8 VCC
SCL 2 7 A0
LM75BDP
OS 3 6 A1
GND 4 5 A2

18770_300_100217.eps
100217

Figure 8-2 Pin configuration

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EN 60 8. Q552.1A LA IC Data Sheets

8.3 Diagram PNX NandFlash - Conditional Access B02A, PNX85500 (IC7S00)

Block diagram

PNX8550x
MEMORY
CONTROLLER

TS input MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single, dual or
OUTPUT quad channel)

DVB DVB-T/C
channel decoder
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO analog CVBS
VIDEO ENCODER
OUTPUT analog Y/C
Low-IF
DIGITAL IF MULTI-
Direct-IF STANDARD Motion-accurate
VIDEO pixel processing
DECODER

SCALER,
AUDIO DEMOD DE-INTERLACE
SSIF, LR
AND DECODE AND NOISE
REDUCTION

AUDIO DACS analog audio


SPDIF AUDIO IN
AUDIO DSP
I2S
AUDIO OUT
HDMI SPDIF
HDMI 450 MHz
RECEIVER AV-DSP

SYSTEM 500 MHz DRAWING


CONTROLLER MIPS32 ENGINE
(8051) 24KEf CPU

Scatter/Gather
TS Demux

I2C PWM Px_x IR ADC SPI UART I2C GPIO Flash USB 2.0 SD Ethernet
x 10 Memory MAC
Card

Pinning information
ball A1 PNX8550xE
index area 2 4 6 8 10 12 14 16 18 20 22 24 26
1 3 5 7 9 11 13 15 17 19 21 23 25
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF

Transparent top view


18770_308_100217.eps
100217

Figure 8-3 Internal block diagram and pin configuration

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IC Data Sheets Q552.1A LA 8. EN 61

8.4 Diagram Audio B03A, TPA3120D2PWP (IC7D10)

Block diagram

TPA3120D2
1 F
0.22 F
LIN BSR
22 H 470 F
RIN ROUT
1 F 0.68 F
PGNDR

PGNDL 0.68 F
1 F
BYPASS LOUT
22 H 470 F
AGND BSL
0.22 F

PVCCL
AVCC
PVCCR

VCLAMP
Shutdown
SD 1 F
Control

MUTE
GAIN0

GAIN1
} Control

Pinning information
PWP (TSSOP) PACKAGE
(TOP VIEW)

PVCCL 1 24 PGNDL
SD 2 23 PGNDL
PVCCL 3 22 LOUT
MUTE 4 21 BSL
LIN 5 20 AVCC
RIN 6 19 AVCC
BYPASS 7 18 GAIN0
AGND 8 17 GAIN1
AGND 9 16 BSR
PVCCR 10 15 ROUT
VCLAMP 11 14 PGNDR
PVCCR 12 13 PGNDR

I_18020_142.eps
100402

Figure 8-4 Internal block diagram and pin configuration

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div. table
EN 62 8. Q552.1A LA IC Data Sheets

8.5 Diagram DC/DC B03B, TPS53126PW (IC7U03)

Block diagram

Pinning information
VBST1 1 28 DRVH1
NC 2 27 LL1
EN1 3 26 DRVL1
VO1 4 25 PGND1
VFB1 5 24 TRIP1
NC
TPS53124

6 23 VIN
GND 7 22 VREG5
TEST1 8 21 V5FILT
NC 9 20 TEST2
VFB2 10 19 TRIP2
VO2 11 18 PGND2
EN2 12 17 DRVL2
NC 13 16 LL2
VBST2 14 15 DRVH2

18250_300_090319.eps
100402

Figure 8-5 Internal block diagram and pin configuration

2010-Nov-12 back to
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IC Data Sheets Q552.1A LA 8. EN 63

8.6 Diagram DC/DC B03E, ST1S10PH (IC 7UD0)

Block diagram

Pinning information

DFN8 (4 × 4) PowerSO-8

I_18010_083.eps
100402

Figure 8-6 Internal block diagram and pin configuration

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div. table
EN 64 8. Q552.1A LA IC Data Sheets

8.7 Diagram DC/DC B03E, LD1117DT25 (IC 7UD2)

Block diagram
LD1117DT

Pinning information

DPAK

F_15710_166.eps
100402

Figure 8-7 Internal block diagram and pin configuration

2010-Nov-12 back to
div. table
IC Data Sheets Q552.1A LA 8. EN 65

8.8 Diagram Ethernet + Service B04C, LAN8710A-EZKH (IC 7E10)

Block diagram
MODE0 HP Auto-MDIX
MODE1 Auto- 10M Tx 10M
MODE Control
MODE2 Negotiation Logic Transmitter TXP / TXN
Reset Transmit Section
nRST Control RXP / RXN
Management 100M Tx 100M
RMIISEL SMI Logic Transmitter
Control
MDIX
Control
TXD[0:3] XTAL1/CLKIN
TXEN PLL
100M Rx DSP System: Analog-to-
TXER XTAL2
TXCLK Logic Clock Digital
Data Recovery
Interrupt
Equalizer nINT
Generator
RMII / MII Logic

RXD[0:3]
RXDV 100M PLL
RXER Receive Section
RXCLK LED1
LED Circuitry
LED2
10M Rx Squelch &
CRS Logic Filters
COL/CRS_DV
Central
RBIAS
MDC 10M PLL Bias
MDIO
PHY
Address PHYAD[0:2]
Latches

Pinning information
VDD1A
RBIAS

RXDV

TXD3
RXN
RXP

TXN
TXP
32

31

30

29

28

27

26

25

VDD2A 1 24 TXD2

LED2/nINTSEL 2 23 TXD1

LED1/REGOFF 3 22 TXD0
SMSC
XTAL2 4 LAN8710/LAN8710i 21 TXEN

XTAL1/CLKIN 5 32 PIN QFN 20 TXCLK

VDDCR 6
(Top View) 19 nRST

RXCLK/PHYAD1 7 18 nINT/TXER/TXD4
VSS
RXD3/PHYAD2 8 17 MDC
10

11

12

13

14

15

16
9
RXD2/RMIISEL

RXD1/MODE1

RXD0/MDE0

CRS

COL/CRS_DV/MODE2

MDIO
VDDIO

RXER/RXD4/PHYAD0

18770_302_100217.eps
100217

Figure 8-8 Internal block diagram and pin configuration

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EN 66 8. Q552.1A LA IC Data Sheets

8.9 Diagram HDMI B04D, SII9287B (IC 7EC1)

Block diagram

Pinning information

18770_303_100217.eps
100217

Figure 8-9 Internal block diagram and pin configuration

2010-Nov-12 back to
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IC Data Sheets Q552.1A LA 8. EN 67

8.10 Diagram Headphone B04E, TPA6111A2DGN (IC 7EE1)

Block diagram

VDD 8

VDD/2
2 IN 1− VO1 1

+
3 BYPASS

6 IN 2−
− VO2 7
+

5 SHUTDOWN Bias 4
Control

Pinning information
D OR DGN PACKAGE
(TOP VIEW)

VO1 1 8 VDD
IN1− 2 7 VO2
BYPASS 3 6 IN2−
GND 4 5 SHUTDOWN

18770_309_100217.eps
100217

Figure 8-10 Internal block diagram and pin configuration

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div. table
EN 68 8. Q552.1A LA IC Data Sheets

Personal Notes:

10000_012_090121.eps
090121

2010-Nov-12 back to
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Block Diagrams Q552.1A LA 9. EN 69

9. Block Diagrams
9-1 Wiring diagram Matisse 42"
WIRING DIAGRAM 42" MATISSE

8M83
8M09
Board Level Repair
8G50

Component Level Repair


TO BACKLIGHT
Only For Authorized Workshop 8G51

8M59
8M20
1M83
25P

1M84
25P
1M20 1M59 1G51 1G50
1319 1316 1M09 8P 1M09 25P 51P 41P
11P 12P 4P 4P

SSB
B

1M99

CONDITIONAL ACCESS
9P
(1150)

1M99
8M99

9P
1M95
11P

1M95
11P
8M95
AMBILIGHT MODULE 24 LED

AMBILIGHT MODULE 24 LED


MAIN POWER SUPPLY

1735
KEYBOARD CONTROL

4P

USB
ETHER
42 PLDF-P975A B NET
(1005)

TUNER

HDMI
(1114)

SPDIF
HDMI HDMI HDMI VGA
3P
J1
(1174)

(1174)
8735
AL

AL
1308
2P3

2P3
1311

TO DISPLAY TO DISPLAY

1M83
+ -

+ -

25P
SPEAKER RIGHT LCD DISPLAY SPEAKER LEFT
(5215) (1004) (5215)
MAINS CORD

TCON
8191

8311

MAINS
SWITCH

(8311) J2 J1 IR / LED BOARD


3P 8P (1112)

1M59 (B13) 1M83 (AL1A) 1M84 (AL2A) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A) 1735 (B03A) 1G50 (B06B)
1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. GND
2. AMBI-SPI-SDO-OUT 16. GND 2. +24V 15. BLANK 2. SPI-DATA-OUT 15. TEMP-SENSOR 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO 2. GND
3. AMBI-SPI-SDI-OUT-GI 17. GND 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. GND 3. GND 3. RC 3. GND-AUDIO |
4. GND 18. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 41. N.C.
5. AMBI-PWM-CLK_B2 19. GND 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY
6. V-AMBI 20. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1
7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. GND 20. +3V3 7. SPI-CS 20. GND 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 1M09 (B09) 1G51 (B06B)
8. AMBI-LATCH1_G2 22. +24V 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. +12V 8. BACKLIGHT-PWM-ANA-DISP 8. +5V 1. +24V 1. +VDISP
9. GND 23. +24V 9. GND 22. GND 9. GND 22. +24V 9. +24V-AUDIO-POWER 9. POWER-OK 2. +24V 2. +VDISP
10. AMBI-PROG_B1 24. +24V 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. GND-AUDIO 3. GND 3. +VDISP
11. AMBI-BLANK_R1 25. +24V 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. MAINS-OK 4. GND 4. +VDISP
12. V-AMBI 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V |
13. AMBI-LATCH2_DIS 13. N.C. 13. N.C. 51. N.C. 18990_400_100330.eps
14. AMBI-SPI-CS-EXTLAMPSn 100713

2010-Nov-12 back to
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Block Diagrams Q552.1A LA 9. EN 70

9-2 Wiring diagram Matisse 46" - 52"


WIRING DIAGRAM 42" MATISSE

8M83
8M09
Board Level Repair
8G50

Component Level Repair


TO BACKLIGHT
Only For Authorized Workshop 8G51

8M59
8M20
1M83
25P

1M84
25P
1M20 1M59 1G51 1G50
1319 1316 1M09 8P 1M09 25P 51P 41P
11P 12P 4P 4P

SSB
B

1M99

CONDITIONAL ACCESS
9P
(1150)

1M99
8M99

9P
1M95
11P

1M95
11P
8M95
AMBILIGHT MODULE 24 LED

AMBILIGHT MODULE 24 LED


MAIN POWER SUPPLY

1735
KEYBOARD CONTROL

4P

USB
ETHER
42 PLDF-P975A B NET
(1005)

TUNER

HDMI
(1114)

SPDIF
HDMI HDMI HDMI VGA
3P
J1
(1174)

(1174)
8735
AL

AL
1308
2P3

2P3
1311

TO DISPLAY TO DISPLAY

1M83
+ -

+ -

25P
SPEAKER RIGHT LCD DISPLAY SPEAKER LEFT
(5215) (1004) (5215)
MAINS CORD

TCON
8191

8311

MAINS
SWITCH

(8311) J2 J1 IR / LED BOARD


3P 8P (1112)

1M59 (B13) 1M83 (AL1A) 1M84 (AL2A) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A) 1735 (B03A) 1G50 (B06B)
1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. GND
2. AMBI-SPI-SDO-OUT 16. GND 2. +24V 15. BLANK 2. SPI-DATA-OUT 15. TEMP-SENSOR 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO 2. GND
3. AMBI-SPI-SDI-OUT-GI 17. GND 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. GND 3. GND 3. RC 3. GND-AUDIO |
4. GND 18. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 41. N.C.
5. AMBI-PWM-CLK_B2 19. GND 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY
6. V-AMBI 20. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1
7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. GND 20. +3V3 7. SPI-CS 20. GND 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 1M09 (B09) 1G51 (B06B)
8. AMBI-LATCH1_G2 22. +24V 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. +12V 8. BACKLIGHT-PWM-ANA-DISP 8. +5V 1. +24V 1. +VDISP
9. GND 23. +24V 9. GND 22. GND 9. GND 22. +24V 9. +24V-AUDIO-POWER 9. POWER-OK 2. +24V 2. +VDISP
10. AMBI-PROG_B1 24. +24V 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. GND-AUDIO 3. GND 3. +VDISP
11. AMBI-BLANK_R1 25. +24V 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. MAINS-OK 4. GND 4. +VDISP
12. V-AMBI 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V |
13. AMBI-LATCH2_DIS 13. N.C. 13. N.C. 51. N.C. 18990_400_100330.eps
14. AMBI-SPI-CS-EXTLAMPSn 100713

2010-Nov-12 back to
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Block Diagrams Q552.1A LA 9. EN 71

9-3 Wiring diagram Da Vinci 40" - 46"


WIRING DIAGRAM 40"- 46" DA VINCI
TO DISPLAY LCD DISPLAY TO DISPLAY
(1004)

8M83

Board Level Repair

Component Level Repair


8KA1
Only For Authorized Workshop

8KA2
1M83
25P

1M84
25P
LOUDSPEAKER
(5213)
AMBILIGHT MODULE 24/30 LED

AMBILIGHT MODULE 24/30 LED


KEYBOARD CONTROL

8M09
1M09
8M59
8M20
4P

1M20 1KA2 1KA1 1M09 1M59


(1114)

1319
10P

8P 80P 80P 4P 25P

1M99
9P
SSB
B
1316
3P

10P
J1

CONDITIONAL ACCESS
(1174)

(1174)
(1150)

1M99
8M99

9P
1M95
11P
AL

AL
MAIN POWER SUPPLY

1M95
11P
8M95
TO BACKLIGHT

40 DPS-206CP A B
46 PSL FSP173-3MS01 B

1735
4P
(1005)
ETHER
NET

USB
TUNER

1M83
25P
HDMI
PHONE
SPDIF
HDMI HDMI VGA

2P3 2P3
1311 1308
N L

8311
MAINS CORD
8191

TWEETER TWEETER
(5216) (5216)
MAINS
J2 J1 IR / LED BOARD
NOT FOR 32" TV-SETS SWITCH NOT FOR 32" TV-SETS
3P 8P (1112)
(8311)

1M59 (B13) 1M83 (AL1A) 1M84 (AL2A) 1M95 (B03C) 1M99 (B03C) 1M20 (B14F) 1735 (B03A) 1KA1 (B14E) 1KA2 (B14E)
1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. GND 1. GND
2. AMBI-SPI-SDO-OUT 16. GND 2. +24V 15. BLANK 2. SPI-DATA-OUT 15. TEMP-SENSOR 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO | |
3. AMBI-SPI-SDI-OUT-GI 17. GND 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. GND 3. GND 3. RC 3. GND-AUDIO 11. VLS_15V6 11. VLS_15V6
4. GND 18. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 12. VLS_15V6 12. VLS_15V6
5. AMBI-PWM-CLK_B2 19. GND 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY | |
6. V-AMBI 20. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1 33. VCC_3V3 33. VCC_3V3
7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. GND 20. +3V3 7. SPI-CS 20. GND 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 34. VCC_3V3 34. VCC_3V3
8. AMBI-LATCH1_G2 22. +24V 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. +12V 8. BACKLIGHT-PWM-ANA-DISP 8. +5V | |
9. GND 23. +24V 9. GND 22. GND 9. GND 22. +24V 9. +24V-AUDIO-POWER 9. POWER-OK 78. VGH_35V 78. VGH_35V
10. AMBI-PROG_B1 24. +24V 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. GND-AUDIO 79. VGL_-6V 79. VGL_-6V
11. AMBI-BLANK_R1 25. +24V 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. MAINS-OK 80. GND 80. GND
12. V-AMBI 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V
13. AMBI-LATCH2_DIS 13. N.C. 13. N.C. 18990_407_100528.eps
14. AMBI-SPI-CS-EXTLAMPSn 100714

2010-Nov-12 back to
div. table
Block Diagrams Q552.1A LA 9. EN 72

9-4 Block Diagram Video


VIDEO
B01A COMMON INTERFACE B02 PNX85500 B06B VIDEO OUT - LVDS B14A TCON CONTROL (SHARP) B14E MINI LVDS (SHARP)
1KA1
7S00 81
PNX85507EB 1G50 7KAA B14C P GAMMA & 58
1 UPD809900F VOM & FLASH
B02A VIDEO STREAM 53
2 7KQB
1P00 M25P32 42
SPI
17 3 41
+5VCA B02F LVDS SDO +VDD
18 PX1 PX1 SCS FLASH 37
51 SCK 36
7F01 +VCC
52 74LVC245APW TO DISPLAY TO TCON SSB 50 TO DISPLAY
20 (TCON ON DISPLAY) (TCON ON SSB)
+3V3 L_LV
PCMCIA 13

68P
PX2 PX2
3 13
GMA
CONDITIONAL MDO(0-7) BUFFER CA-MDO(0-7) MD0 7KQA 2
41
ACCESS N.C. ISL24837IRZ 1
CA-MDI(0-7) MDI TIMING
QUAD LVDS
CONTROL REF 1KA2
1920x1080
1G51 VOLTAGE 81
100/120HZ GEN
51 59
50 GMA
48
I2C
B01F HDMI & CI 7F75
49
50
UPC3221GV 40
1T01 B02I ANALOG VIDEO R_LV
1 13
TH2603 VCC PX3 PX3
5F73 2F90 1F75 2F74 2 AGC AMPLIFIER 7 3F79-1 PNX-IF-P AE12 25
10 TUN-IF-P 1 4 TUNER_P TO DISPLAY
IF-OUT1
BANDPASS B14D MPD 24
5F70

TO DISPLAY +VDD (TCON ON SSB)


2F78 TO TCON SSB
11 TUN-IF-N 2 5 3 6 3F79-4 FILTER PNX-IF-N AF12 (TCON ON DISPLAY) 7KUE 20
RF IN IF-OUT2 TUNER_N
MAX17079GTL 19
SAW 36MHZ17 4 IN OUT +VCC
7F70 AGC CONTROL PX4 PX4 13
40
MAIN HYBRID SELECT-SAW CS(1-12) LEVEL CS(1U-12U)
B02E 2
TUNER 4 SHIFTER
CONTROL 1
PNX-IF-AGC AD12 3
IF_AGC
2
1
+VDISP

B01H HDMI B04D HDMI B04A ANALOGUE EXTERNALS A SSB 3104 313 6364* SSB 3104 313 6400*
7EC1
*SII9187ACNU
SII9287BCNU 1E01
PNX85500 B01C USB HUB

18 AV1-R AC13 B02E CONROL


1P05 Pr AV1_R
1 +5V-USB2
DRX2+ 90 AV1-G AE13
14 1P08
3 DRX2- 89 EXT 1 Y AV1_G
1
1

4
2

87

1
DRX1+ 9F26 2
10 AVI-B AD13 R26 USB-DM USB-DM2
SIDE USB

3 2
6 DRX1- 86 Pb AV1_B USB_DN
RXD R25 USB-DP 9F25 USB-DP2 3
7 USB_DP CONNECTOR
DRX0+ 84 4

4
9 DRX0- 83 B02A FLASH B01B FLASH
18
19

10 1E02
DRXC+ 81 SSB 3104 313 6364*
7F20
HDMI SIDE 12 DRXC- 80 15 AV4-PR AC14
Pr AI33 *NAND02GW3B2DN6F +5V-USB1
CONNECTOR NAND04GW3B2DN6F 1P07
11 AV4-Y AE14 1
EXT 2 Y AI13 NAND
HDMI

1
9F21 USB-DM1 2
FLASH SIDE USB

3 2
1P04
1 ARX2+ 23
SWITCH Pb
7 AV4-PB AD14 AI23 XIO_D XIO-D(00-07) 9F20 USB-DP1 3
CONNECTOR
4

4
3 ARX2- 22 256MB
1
2

4 ARX1+ 20 512MB SSB 3104 313 6400*


6 ARX1- 19
RXA B01I VGA 12,37
7 ARX0+ 17 1E05 VCC +3V3
9 16
18

ARX0- 1 R-VGA AF16 VGA_R


19

10 ARXC+ 14 2 G-VGA AD16 * 256MB on SSB 3104 313 6400*


10

15

VGA_G
5

HDMI 3 12 ARXC- 13 3 B-VGA AE16 512MB on SSB 3104 313 6364*


CONNECTOR VGA_B
13 H-SYNC-VGA AB18 B02B MEMORY
HSYNC_IN B05A DDR
1

Only on SSB3104 313 6364*


11

14 V-SYNC-VGA AC18
VSYNC_IN
DQ DDR2-D(0-31)
9,27,64 VGA 7B00 7B02
+3V3-HDMI VCC33
CONNECTOR *EDE1116AGBG *EDE1116AEBG 7B03 7B01

D(16-23)

D(24-31)
D(8-15)
D(0-7)
EDE1108AGBG EDE1108AGBG EDE1108AGBG EDE1108AGBG
B04B ANALOGUE EXTERNALS B
SDRAM SDRAM SDRAM SDRAM
AC15 128MB 128MB 128MB 128MB
PR_R_C1
1P03 1E08
AV3-Y

VDDL
VREF

VDDL
VREF

VDDL
VREF

VDDL
VREF
1 BRX2+ 42 2 AE15
EXT 3 VIDEO Y_G1
3 BRX2- 41
1

AD15
2

4 BRX1+ 39 A1 E2 A1 E2 A1 E2 A1 E2
PB_B1
6 BRX1- 39
RXB A DDR2-A(0-13)
7 BRX0+ 36 1ECB Y-SVHS AC12
1 ATV_CVBS_Y3
35 +1V8
9 BRX0- 3
18
19

10 33 SVHS IN 5 C-SVHS AF13 DDR2-VREF-DDR


BRXC+ CR
12 32 4 *SSB 3104 313 6400*
HDMI 2 BRXC- 2 SSB 3104 313 6364*
CONNECTOR A2
VREF_1 DDR2-VREF-CTRL2
V1
VREF_2 DDR2-VREF-CTRL3
B02C HDMI_DV
1P02
TXC_P 62 HDMIA-RXC+ W25
1 CRX2+ 72 RXC_B_N
TXC_N 63 HDMIA-RXC- W26
3 CRX2- 71 RXC_B_P
TX0_P 60 HDMIA-RX0+ V25
1

4 CRX1+ 69 RX0_B_N
2

TX0_N 61 HDMIA-RX0- V26


6 CRX1- 68 RX0_B_P
RXC TX1_P 58 HDMIA-RX1+ U25
7 CRX0+ 66 RX1_B_N
TXA_N 59 HDMIA-RX1- U26
9 CRX0- 65 RX1_B_P
18

TX2_P 56 HDMIA-RX2+ T25


19

10 CRXC+ 63 RX2_B_N
TX2_N 57 HDMIA-RX2- T26
HDMI 1 12 CRXC- 62 RX2_B_P
3S0W W24
CONNECTOR RREF
+3V3
*Mux SIL9187 - non Instaport on SSB3104 313 6400*
Mux SIL9287 - Instaport on SSB3104 313 6364*
18990_402_100331.eps
100531

2010-Nov-12 back to
div. table
Block Diagrams Q552.1A LA 9. EN 73

9-5 Block Diagram Audio


AUDIO
B01A COMMON INTERFACE B02 PNX85500 B02D CLASS-D B03A AUDIO
7S00
PNX85507EB
B02A VIDEO STREAM B02D AUDIO
7D10
TPA3123D2PWP
1,3 5D07
PVCC_L +24V-AUDIO-POWER
10,12 5D08
7S05 PVCC_R
1P00 LM324P 1735
17 LEFT-SPEAKER
+5VCA AD7 ADAC(1) 12 14 +AUDIO-L 5 22 1
18 IN-L OUT-L
ADAC_1
51 7F01 CLASS D 2
52 74LVC245APW POWER
SPEAKER L
20 AMPLIFIER
+3V3 3
PCMCIA AE7 ADAC(2) 10 8 -AUDIO-R 6

68P
ADAC_2 IN-R
7D15 15 RIGHT-SPEAKER 4
OUT-R
A-PLOP A-STBY 2
CONDITIONAL MDO(0-7) BUFFER CA-MDO(0-7) MD0 B03H STANDBY SD SPEAKER R
A-PLOP
ACCESS B04E
1D38
CA-MDI(0-7) MDI AC19 AUDIO-MUTE-UP 4 1
PO_7 MUTE
5D03 2
7D03 7D03
DETECT2 3
B02G MAIN SWITCH A-STBY STANDBY &
MAINS-OK PROTECTION
B03C DETECT SUBWOOFER
(RES)
B01F HDMI & CI 7F75
+5V-TUN-PIN
1T01
UPC3221GV
B02I ANALOG VIDEO
B04E HEADPHONE B01J TEMP SENSOR + HEADPHONE
1
TH2603 VCC
2F90 1F75 2F74 AGC AMPLIFIER 7 3F79-1 7EE0-1 7EE0-2
10 TUN-IF-P 5F73 1 4 2 PNX-IF-P AE12
IF-OUT1 TUNER_P AD1 RESET-AUDIO A-PLOP B03A
BANDPASS PO_6
5F70

B04A
11 TUN-IF-N 2 5 2F78 3 6 3F79-4 FILTER PNX-IF-N AF12
RF IN IF-OUT2 TUNER_N
SAW 36MHZ17 4 IN OUT
7F70 AGC CONTROL
MAIN HYBRID SELECT-SAW
7EE1
B02E TPA6111A2DGN
TUNER
CONTROL PNX-IF-AGC AD12
IF_AGC
HEADPHONE
AMPLIFIER
5
SHUTDOWN 1328
1 AMP1 2
VO_1
B01H HDMI B04D HDMI B04A ANALOGUE EXTERNALS A B02D PNX85500: AUDIO
ADAC3
AF7 ADAC(3) 2
IN-1 7 AMP2 3
VO_2
7EC1
*SII9187ACNU 1 HEADPHONE
AD6 ADAC(4) 6 8 OUT 3.5mm
SII9287BCNU ADAC4 IN-2 VDD +3V3

1P05 1E01
1
3
DRX2+
DRX2-
90
89
6 AUDIO-IN1-L AE10 AIN1_L
PNX85500 B01C USB HUB
Only on SSB 3104 313 6364*
1

4
2

DRX1+ 87 2 AF10
AUDIO-IN1-R B02E CONROL
6 DRX1- 86 AIN1_R
RXD
7 DRX0+ 84
9 DRX0- 83 +5V-USB2
18
19

10 81 1E02 1P08
DRXC+
1
HDMI SIDE 12 DRXC- 80 6 AUDIO-IN2-L AD10

1
AIN2_L R26 USB-DM 9F26 USB-DM2 2
CONNECTOR SIDE USB

3 2
USB_DN
R25 USB-DP 9F25 USB-DP2 3
2 AUDIO-IN2-R AC10 USB_DP CONNECTOR
AIN2_R 4
HDMI

4
1P04
1 23
SWITCH SSB 3104 313 6364*
ARX2+ B02A FLASH B01B FLASH
3 ARX2- 22 +5V-USB1
1

1P07
2

4 ARX1+ 20 7F20 1
6 ARX1- 19 *NAND02GW3B2DN6F

1
RXA 9F21 USB-DM1 2
7 ARX0+ 17 NAND04GW3B2DN6F SIDE USB

3 2
9 16
B04B ANALOGUE EXTERNALS B 9F20 USB-DP1 3
CONNECTOR
18

ARX0- NAND
19

4
10 14 1E08
ARXC+ FLASH
HDMI 3 12 ARXC- 13 6 AUDIO-IN3-L AE9 XIO_D XIO-D(00-07)
AIN3_L
CONNECTOR
AUDIO IN
4
256MB SSB 3104 313 6400*
Only on SSB3104 313 6364* L+R AUDIO-IN3-R AF9
AIN3_R 512MB
9,27,64
+3V3-HDMI VCC33 12,37
1E09 VCC +3V3
2 AUDIO-IN4-L AD9
AIN4_L
VGA (OR DVI)
AUDIO 3 AUDIO-IN4-R AC9
AIN4_R
1 * 256MB on SSB 3104 313 6400*
+3V3 512MB on SSB 3104 313 6364*
1P03 B02B MEMORY
1 BRX2+ 42
1E07 7S09 B05A DDR
2
DIGITAL 1 SPDIF-OUT 3 &
3 BRX2- 41 1 SPDIF-OUT-PNX AF5
AUDIO SPDIF_OUT
1
2

4 BRX1+ 39 OUT 4
6 BRX1- 39 B02G STANDBY
RXB DQ DDR2-D(0-31)
7 BRX0+ 36 7B00 7B02
8 5 SEL-HDMI-ARC AF18
35 P0_4 *EDE1116AGBG *EDE1116AEBG 7B03 7B01

D(16-23)

D(24-31)
9 BRX0-

D(8-15)
18

D(0-7)
19

10 33 EDE1108AGBG EDE1108AGBG EDE1108AGBG EDE1108AGBG


BRXC+ B02c HDMI_DV
HDMI 2 12 BRXC- 32
CONNECTOR SDRAM SDRAM SDRAM SDRAM
62 HDMIA-RXC+ W25 128MB 128MB 128MB 128MB
RXC_B_N
1P02 63 HDMIA-RXC- W26
RXC_B_P

VDDL
VREF

VDDL
VREF

VDDL
VREF

VDDL
VREF
1 72 60 HDMIA-RX0+ V25
CRX2+ RX0_B_N
3 CRX2- 71 61 HDMIA-RX0- V26
RX0_B_P
58 HDMIA-RX1+ U25
1

4 CRX1+ 69 A1 E2 A1 E2 A1 E2 A1 E2
2

RX1_B_N
6 68 59 HDMIA-RX1- U26
CRX1- RX1_B_P A DDR2-A(0-13)
RXC 56 HDMIA-RX2+ T25
7 CRX0+ 66 RX2_B_N
HDMIA-RX2- T26 +1V8
9 CRX0- 65 57 RX2_B_P
18

DDR2-VREF-DDR
19

10 CRXC+ 63
12 3S0W *SSB 3104 313 6400*
HDMI 1 CRXC- 62 W24 SSB 3104 313 6364*
+3V3 RREF
CONNECTOR A2
14 5EC2 VREF_1 DDR2-VREF-CTRL2
ARC-eHDMI+ eHDMI+ V1
VREF_2 DDR2-VREF-CTRL3
*Mux SIL9187 - non Instaport on SSB3104 313 6400* 18990_403_100331.eps
Mux SIL9287 - Instaport on SSB3104 313 6364* 100601

2010-Nov-12 back to
div. table
Block Diagrams Q552.1A LA 9. EN 74

9-6 Block Diagram Control & Clock Signals


CONTROL + CLOCK SIGNALS
B01A COMMON INTERFACE B02A PNX85500 B06C AMBILIGHT B09A NON DVBS CONNECTOR BOARD
7GA0
XC9572XL
7S00
PNX85507EB PXCLK54 43 1M59
B02E
22 AMBI-SPI-CLK-OUT 1
B02A VIDEO STREAM PNX-SPI-CLK 41 27 AMBI-SPI-SDO-OUT 2
PNX-SPI-SDI 40 CPLD 23 AMBI-SPI-SDI-OUT_G1 3
PNX-SPI-SDO 39 29 AMBI-PWM-CLK_B2 5
1P00 AMBI-SPI-CS-OUTn_R2 7
MDO 30
1 CA-MDI(0-7) 8
31 AMBI-LATCH1_G2 TO AMBILIGHT
7F01 AMBI-PROG_B1 10 MODULE
PNX85500 B02G
19
20 AMBI-BLANK_R1 11
V22 PNX-SPI-CS-BLn 3 28 AMBI-LATCH2_DIS 13
B02E CONTROL
MDO(0-7) CA-MDO(0-7) MDI W23 PNX-SPI-CS-AMBIn 2 21 AMBI-SPI-CS-EXTLAMPSn 14
COMMON INTERFACE

7F02 32 AMBI-TEMP 15
7F03 B02A FLASH
PCMCIA VCCIO
B02H POWER AF1 SENSE+1V1
CA-A(00-14) XIO-A(0-14) VDD_1V1 B03B 26
XIO_A VIO
AA15 SENSE+1V2
CONDITIONAL VDDA_1V2 B03D
ACCESS 7F04 Only on SSB 3104 313 6364*
7F05 B02B MEMORY B05A DDR

CA-D(0-7) XIO-D(00-15) XIO_D DQ DDR2-D(0-31)


68 7B00 7B02
7B03 7B01

D(16-23)

D(24-31)
*EDE1116AGBG *EDE1116AEBG

D(8-15)
D(0-7)
EDE1108AGBG EDE1108AGBG EDE1108AGBG EDE1108AGBG

B01B FLASH
7F20 SDRAM SDRAM SDRAM SDRAM
*NAND02GW3B2DN6F 128MB 128MB 128MB 128MB
NAND04GW3B2DN6F

NAND
XIO-D(00-07)
FLASH
F8 E8 F8 E8 F8 E8 F8 E8
256MB A DDR2-A(0-13)
512MB DDR-CLK_N
CLK_N
12,37 DDR-CLK_P
VCC +3V3 CLK_P

*SSB 3104 313 6400*


SSB 3104 313 6364*

B02E CONTROL B02E PNX85500: MIPS B01C USB HUB


* 256MB on SSB 3104 313 6400*
512MB on SSB 3104 313 6364* U23 SELECT-SAW
GPI0_11 B01F
B04C ETHERNET + SERVICE B02E ETHERNET AD5 BACKLIGHT-PWM
BL_PWM B06C
AC5 PXCLK54
CLK_54_OUT B06C B13
7E10 AE4 RESET-SYSTEMn +5V-USB2
RESET_SYS B01K B02G
1N00 LAN8710A-EZK W23 PNX-SPI-CS-AMBIn 1P08
GPI0_6 B06E B06D B13
ETH-RXD SDCD V22 PNX-SPI-CS-BLn 1
GPI0_7 B01K B02G B02G

1
ETH-TXD SDWP R26 USB-DM 9F26 USB-DM2 2
ETHERNET USB_DN SIDE USB

3 2
R25 USB-DP 9F25 USB-DP2 3
7 ETH-RXCLK AA3 USB_DP CONNECTOR
4

4
TXCLK
20 ETH-TXCLK AA2 B02A
RXCLK B04C ETHERNET + SERVICE SSB 3104 313 6364*
ETHERNET
CONNECTOR 1E06 +5V-USB1
RJ45 1P07
Y23 RXD1-MIPS 2
GPI0_2 1
UART

1
Only on SSB 3104 313 6364* Y24 TXD1-MIPS 3 9F21 USB-DM1 2
GPI0_3 SERVICE SIDE USB

3 2
B09A DVBS CONNECTOR BOARD B03C DC / DC 1 CONNECTOR 9F20 USB-DP1 3
CONNECTOR
4

4
B14F CONNECTORS
SSB 3104 313 6400*

B02G PNX85500: STANDBY CONTROLLER B01E PNX85500-CONTROL

V23 BOOST-PWM 9CH0 BACKLIGHT-BOOST


V23 B03C
B06C
7F52
M25P05-AVMN6P
1M20 B02G STANDBY
1 LIGHT-SENSOR AE26 AF24 PNX-SPI-CLK 6
P5_1 SPI_CLK
2 AE22 PNX-SPI-WPn 3 FLASH
P6_5 8
3 RC AD19 AF23 PNX-SPI-CSBn 1 VCC +3V3-STANDBY
P1_0 SPI_CSB
4 LED-2 9U41 LED2 AC25 AE23 PNX-SPI-SDO 5 512K
PWM_1 SPI_SDO
TO IR / LED BOARD AND 5 7U43 AF25 PNX-SPI-SDI 2
+3V3-STANDBY SPI_SDI
KEYBOARD CONTROL 6 LED-1 LED1 AD26 1F51
PWM_0
AG1 RXD-UP 3
UA_RX_0
7 KEYBOARD AD23 P5_O AH5 TXD-UP 1 LEVEL SHIFTED
UA_TX_1
8 AB20 SDM FF04 2 FOR
+5V P1_7
AA26 RESET-STBYn 4 DEBUG USE
RESET_IN ONLY
AF22 SPI-PROG FF29 5
P6_4
B02G PNX85500: STANDBY CONTROLLER
+3V3-STANDBY
DETECT2 AA22 7S20
B03C P3_2
B02E
RESET-SYSTEM AB22 P3_3
NCP303LSN28G B03C DC / DC
AV1-BLK AD22 1 RESET-STBYn
B04A P3_5 OUTP
AV2-BLK AC22 2
B04A P3_4 INP
AV1-STATUS AE25 3
B04A CADC_2 GND

CONTROL
AV2-STATUS AE24 AE17
B04A CADC_3 XTAL_I
LCD-PWR-ONn AC20
B03H P2_0
1S02

54M

ENABLE -3V3-5V
+12V B03E
B04D HDMI AF17 +3V3-STANDBY ENABLE -1V8
XTAL_O B03B B03D
TO PIN: AD21 ENABLE-3V3n DETECT2
7EC0 P2_7 B02G B03A
1P02-13
EF
1P03-13 PCEC-HDMI CEC-HDMI AF19
P1_2
1P04-13 7EC1 AF18 SEL-HDMI-ARC 1M99
P0_4 B02D
1
2

1P05-13 *SII9187ACNU AE20 LAMP-ON 5


SII9287BCNU P2_2
B02C HDMI_DV BACKLIGHT-OUT 6 TO
B07A POWER
ARX-HOTPLUG 31 AE18 RESET-ETHERNETn BACKLIGHT-BOOST 7
1P04-19 HDMI HDMIB-RC HDMI_RX P0_3 B04C B01E SUPPLY
18
19

BRX-HOTPLUG 35 AC21 POWER-OK 9


1P03-19 P2_6
CRX-HOTPLUG 41 SWITCH AB19 RESET-AUDIO
4x HDMI 1P02-19 3S0W P0_6 B04E
CONNECTOR DRX-HOTPLUG 45 W24 AE19 TACH0 1M95
1P05-19 +3V3 RREF P1_1 B03G TO
AF20 STANDBY 2 POWER
P2_3
*Mux SIL9187 - non Instaport on SSB3104 313 6400* SUPPLY
18990_404_100331.eps
Mux SIL9287 - Instaport on SSB3104 313 6364*
100805

2010-Nov-12 back to
div. table
Block Diagrams Q552.1A LA 9. EN 75

9-7 Block Diagram I2C


I²C
B01E PNX85500: CONTROL B02E PNX85500: MIPS B01E PNX85500-CONTROL B04D HDMI B01K TUNER BRAZIL B01J TEMP SENSOR +
HEADPHONE
7S00 +3V3
PNX85507EB

3S6D

3S6E
B02E
B25 3S5Y SDA-SSB
3_SDA
A24 3S5Z SCL-SSB
3_SCL

3EC5

3EC3

3FD3

3FD4
3FE9

3FE8
+3V3 AIN-5V
ERR
PNX85500 13
53 54 46 45 1 2

3EC1-1

3EC1-3
3S6A
3S69
CONTROL 1P04
C25 3S56 SDA-UP-MIPS 1F52 7EC1 7FE0 7FD1
29 ARX-DDC-SDA 16

1
2
1_SDA 3F63 3 SII9287B TC90517FG LM75BDP
C26 3S57 SCL-UP-MIPS *SII9187A
DEBUG 30 ARX-DDC-SCL 15
1_SCL 3F62 1 TUNER TEMP
7F52 ONLY

18
19
HDMI BIN-5V BRAZIL SENSOR

3F63

3F59
M25P05-AVMN6P B02G B02G PNX85500: STANDBY MUX HDMI
CONTROLER
5 6 CONNECTOR 3

3ECA-1

3ECA-2
ERR
FLASH 6 PNX-SPI-CLK AF24 +3V3-STANDBY ERR 1P03 42
8 SPI_CLK 23
3 PNX-SPI-WPn AE22 STANDBY 7F58 33 BRX-DDC-SDA 16

1
+3V3-STANDBY VCC

2
P6_5
M24C64

3S6W
512K 1 PNX-SPI-CSBn AF23

3S6V
SPI_CSB 34 BRX-DDC-SCL 15
5 PNX-SPI-SDO AE23 ERR ERR 3S2F

18
SPI_SDO

19
15 53 AC23 EEPROM CIN-5V
2 PNX-SPI-SDI AF25 SPI_SDI MC_SDA (NVM)
3S2G HDMI RES RES
STANDBY AC24 CONNECTOR 2
MC_SCL B01H

3ECA-3

3ECA-4
SW ERR
HDMI
RES 1P02
35
39 CRX-DDC-SDA 16

1
2
+3V3-STANDBY
MAIN NVM
40 CRX-DDC-SCL 15
SW
B01B

18
FLASH

19
DIN-5V

3S1G

3S1H
1F51 HDMI
AE21 RXD-UP 3F65 1 uP
7F20 CONNECTOR 1

3FBF-2

3FBF-1
P3_0 LEVEL SHIFTED +3V3 1P05
*NAND02GW3B2DN6F 3F64
NAND04GW3B2DN6F AF21 TXD-UP 2 FOR DEBUG
P3_1 43 DRX-DDC-SDA 16

1
HDMI

2
USE ONLY

3ECU-2

3ECU-4
CONNECTOR
FLASH 44 DRX-DDC-SCL 15
B02A B02I SIDE

18
Y25 DDCA-SDA

19
(4Gx16) DDC_A_SDA
FLASH Y26 DDCA-SCL
XIO-D(00-07) XIO_D DDC_A_SCL +3V3 B01I VGA
HDMI_DV B04C ETHERNET + SERVICE +5V-EDID +5V-VGA
MAIN

3S83

3S84
1E06

3ECP-3

3ECP-1
SW

3FC1

3FC2
Y23 RXD1-MIPS 3E53-4 3E53-3 1E05
3
GPIO_2 9FC1 12

10
47 VGA-SDA-EDID-HDMI

15
3E53-2 3E53-1 UART

5
Y24 TXD1-MIPS 2
GPIO_3 SERVICE EDID
48 VGA-SCL-EDID-HDMI 9FC3 15
1 CONNECTOR SW
* 256MB on SSB 3104 313 6400*

1
B02I B02I

6
PNX85500: ANALOG VIDEO

11
512MB on SSB 3104 313 6364*
AD25 3S5V-1 9FC2
B05A DDR
VGA_EDID_SDA
VGA-SDA-EDID VGA
3S5V-3 CONNECTOR
AD24 VGA-SCL-EDID 9FC4
VGA_EDID_SCL
7B00
*EDE1116AEBG 7B01 RES
EDE1108AGBG EDE1108AGBG ANALOGUE
VIDEO B14C P GAMMA & VCOM & FLASH (SHARP) B14A TCON CONTROL
(SHARP)
SDRAM SDRAM
9S15 1KQB
VGA-SDA-EDID-TCON
1
9S14
D(8-15)
D(0-7)

B02B VGA-SCL-EDID-TCON
2
VCC_3V3
MEMORY
RES
2 1

3KTU

3KTV
DDR2-A(0-13) A
DDR2-D(0-31) DQ 7 SDA-TCON
7KQH
7B02 +3V3
B01F HDMI & CI
PCA9540B
*EDE1116AEBG 7B03 8 SCL-TCON
EDE1108AGBG EDE1108AGBG 2 CHANNEL
3S6G
3S6F
D(16-23)

D(24-31)

MULTIPLEXER
SDRAM SDRAM B24 3S60 SDA-TUNER 3F75 TUN-P7 12 13 E19 E20

9JB6

9JB7
4_SDA
A23 3S61 SCL-TUNER 3F76 TUN-P6
4_SCL 7KQA 7KAA
ISL24837IRZ 7KQB UPD809900F1
M25P32
ERR
18 7 6 8-CHANNEL CONTROL
RES PROG I2C
*SSB 3104 313 6400* REF VOLT GEN FLASH
SSB 3104 313 6364* 1T01
TH2603

B04C ETHERNET + SERVICE MAIN


TUNER TCON

SDA-DISP

SCL-DISP
SW
ERR
7E10 34
LAN8710A-EZK

Only for SHARP display with TCON on SSB Only for SHARP display with TCON on SSB
11 ETH-RXD(0) Y5
ETH-RXD(1)
RXD_0 B06B VIDEO OUT - LVDS
10 Y6 +3V3
RXD_1
9 ETH-RXD(2) AB4
RXD_2
ETHERNET 8 ETH-RXD(3) AC1
3S6C
3S6B

RXD_3 1G51
7 ETH-RXCLK AA3
RXCLK B26 3S58 SDA-SET 9S12 SDA-DISP 3G2W 50
2_SDA LVDS
22 ETH-TXD(0) AA1 A25 3S5W SCL-SET 9S11 SCL-DISP 3G2Y 49 CONNECTOR
TXD_0 2_SCL
23 ETH-TXD(1) AA4
TXD_1 +3V3
24 ETH-TXD(2) AB1
ETHERNET TXD_2 ERR +3V3 ERR
25 ETH-TXD(3) AB2 14 64
CONNECTOR TXD_3 2 1
3S67

3S65

3S68

3S66

RJ45 20 ETH-TXCLK AA2 B09A NON DVBS CONNECTOR BOARD B14F CONNECTORS (SHARP)
TXCLK
3S81

3S80

7S01 4 1F53 1F53


W21 RXD2-MIPS PCA9540B 3C84 2 3K84 2
GPIO_2 5
2D 2D
W22 TXD2-MIPS 2 CHAN. 3C85 3 3K85 3
GPIO_3 DIMMING DIMMING
MULTIPLEX.
7
ERR 1M71 1M71
24 8 3C83 3 3K83 1
TO TO SW Programmable via USB
3C81 1 TEMPERATURE 3K81 3 TEMPERATURE
RES SENSOR SENSOR SW Programmable via ComPair
RES RES SW Pre-programmed device
9S13 SDA-BL

9S10 SCL-BL
18990_405_100331.eps
Only for SHARP display with TCON on SSB 100713

2010-Nov-12 back to
div. table
Block Diagrams Q552.1A LA 9. EN 76

9-8 Supply Lines Overview


SUPPLY LINES OVERVIEW B03D DC / DC B14D MPD
B03C DC / DC B01K TUNER BRAZIL B05A DDR

1M99 1M99 +1V2-BRA-VDDC +1V2-BRA-VDDC +1V8 +1V8 +1V8 +1V8 VCC_3V3 VCC_3V3
+12VD B01g B03b B03b B14b
1 1 +1V2-BRA-DR1 +1V2 3B20
+12V +1V2-BRA-DR1 7UA3 DDR2-VREF-DDR
B03h VREF_15V2 VREF_15V2
B01g B02h
2 2 B14c
+12V +3V3 +3V3
3 3 B03e
+VDISP +VDISP
GND1 5FE7 +3V3-BRA +12V B06A DISPLAY INTERFACING-VDISP B14b
PSU GND1
4 4
5FE4 +3V3-BRA-FLT B03e
+5V +5V
+VDISP-INT +VDISP-INT B14b
VLS_15V6 VLS_15V6
5 5 LAMP-ON 3U16 B03h
BL_ON_OFF B02G +3V3
6 6 BACKLIGHT-PWM_BL-VS +5V +5V 1G03
DIM B06C B03e 7UC0 +VDISP
7 7 B06b
BOOST
BACKLIGHT-BOOST
B01E 7FE3 3U15 +2V5 B14E MINI LVDS
8 8 BACKLIGHT-PWM-ANA-DISP IN OUT T 3.0A

OR
N.C B02G 5FE9 +2V5-BRA COM B02h
IN OUT +2V5-LVDS 5G01 VGL_-6V VGL_-6V
9 9 POWER-OK CUA0
POK B02G COM
B02h B14b
5G02 1G00
10 10 BL-SPI-SDO NOT FOR 5000 SERIES VGH_35V VGH_35V
N.C. B14b
11 11 BL-SPI-CSn +5V5-TUN +5V5-TUN T 3.0A
N.C. B03e VCC_3V3 VCC_3V3
N.C.
12 12 BL-SPI-CLK B02A PNX85500: NANDFLASH 7UA6 +5V-TUN
B14b
CONDITIONAL ACCESS B01f
Optional 1M99 is 12 pin connector
+3V3 +3V3 VLS_15V6 VLS_15V6
B03e B06B VIDEO OUT - LVDS
B14b
+12V ENABLE-1V8 +12V
1M95 1M95 B03c +3V3 +3V3
B01e,B02e, 7UA0 B03e
1 1 +3V3-STANDBY
3V3_ST g,h,B03a,b,h, 3UA0 VOLT. +2V5-REF
+VDISP +VDISP
B14F CONNECTORS
STANDBY
2 2 STANDBY
B02G B04d,e,B09a, B02B PNX85500: SDRAM REG. B06a
3 3 B14f
GND1 +3V3 +3V3
4 4 +1V8 +1V8 B03e
B03b
GND1 +3V3-STANDBY +3V3-STANDBY
5 5
GND1
3S20 DDR2-VREF-CTRL3 B06C . B03c

1U40 +12V 3S06 DDR2-VREF-CTRL2


B03E DC / DC
+3V3 +3V3 B03e
+5V +5V
6 6 B03e
+12V B03b,d,e,g, +1V1 +1V1 1M20
7 7 B09a,B14f B01,a,b,c,d,e,
+12V T 3.0A B03b 5GA0 VINT 5
g,j,jk,B14f TO
8 8 +12V +12V
+12V B03c B02a,c,d,e,h, IR/LED
9 9 +24V-AUDIO-POWER 5GA1 VIO 8
+VSND 7UD1 B03c,f,g,h, PANEL
B02d,B03a
GND_SND
10 10 B02C PNX85500: DIGITAL VIDEO IN 5UD3
IN OUT
5UD2 +3V3 B04a,c,d,e,
11 11 MAINS-OK COM B06b,c,d, B11a
N.C. B03A +3V3 +3V3 7UD0 B09a,B13 +12V +12V
B03e
5UD0 5UD1 +5V5-TUN
B06D SPI-BUFFER B03c
IN OUT
COM B03d +3V3 +3V3
B03e
6UD0 +5V B01,a,c,e,k,
+3V3 +3V3 B03c,d,B04a,d,
B03e
B02D PNX85500: AUDIO
B09a,B14f
+5V +5V 7UD2 B09A (*NON) DVBS CONNECTOR BOARD
B03e +2V5
IN OUT
+3V3 +3V3 +3V3 +3V3
B03e COM B03e
3S11 +3V3-ARC +3V3-STANDBY +3V3-STANDBY
B01A COMMON INTERFACE 7S08
7UD3 B03c
+3V3 +5V +5V
+2V5-AUDIO IN OUT B03e
+3V3 +3V3 IN OUT B02h
COM
COM 1M20
B03e 5
+24V-AUDIO-POWER +24V-AUDIO-POWER
+5V +5V B03c ONLY FOR 5000 SERIES
B03e 8 TO
3S0Z +24V-AUDIO-VDD
3F01 +5VCA IR/LED
1M09 PANEL
+T B03F TEMPSENSOR + AMBILIGHT
1 +24V
B08a
+3V3 +3V3 2 1C86 1M59
B02E PNX85500: MIPS
B03e
*1T86 21
B01B FLASH
+3V3 +3V3 1UM0
B03e 5UM1 V-AMBI T 2.0A
+3V3 +3V3 +12V +12V
B03e +3V3-STANDBY +3V3-STANDBY T 1.0A
B03c
B03c

B01C USB HUB B03G FAN - CONTROL

+3V3 +3V3
B02G PNX85500: STANDBY CONTROLLER
+3V3 +3V3
B03e +1V1 +1V1 B03e
B13 AMBILIGHT CPLD
B03b
+5V +5V +12V +12V +3V3 +3V3
B03e B03c B03e
3F25 +5V-USB1
+3V3-STANDBY +3V3-STANDBY 5HA0 VINT
3F32 +T B03c
+5V-USB2 5HA1 VIO
+T
B03H VDISP - SWITCH
1M72
+3V3 +3V3 1HA0 +24V
1
B03e
B02H PNX85500: POWER
B03c
+3V3-STANDBY +3V3-STANDBY 2 T 1.5A
B01D SD-CARD
+1V1 +1V1 +12VD +12VD
B03b B03c
+3V3 +3V3
B03e B03d
+1V2 +1V2 7UU1 +VDISP-INT B06a,B11b, B14A TCON CONTROL (SHARP)
3F40 +3V3-SD B14b
+1V8 +1V8 +VDISP +VDISP
+T B03b B14b
+2V5 +2V5 7UU2 7KAC
B03d 5KAG VCC_1V2
LCD-PWR-ONn VIN SW B14b
+2V5-AUDIO +2V5-AUDIO GND
B02d
5KAA
B01E PNX85500: CONTROL
B03d
+2V5-LVDS +2V5-LVDS VDD12

+3V3 +3V3 +3V3 +3V3


B04A ANALOGUE EXTERNALS A 5KAB LVDS_AVDD
B03e
B03e +3V3 +3V3 5KAC
+3V3-STANDBY +3V3-STANDBY +3V3-STANDBY mini_AVDD
+3V3-STANDBY
B03c B03e
B03c 5KAD
+5V SSCG_AGND
+5V +5V +5V
B03e B03e VCC_3V3 VCC_+3V3
B14b
5KAE VDD33
B04C ETHERNET + SERVICE
B01F HDMI & CI B03A AUDIO
+3V3 +3V3
5KAF VDDQ

+5V-TUN +5V-TUN +3V3-STANDBY +3V3-STANDBY B03e


5E08 +3V3-ET-ANA
B03d B03c
9F71 +5V-TUN-PIN
+24V-AUDIO-POWER +24V-AUDIO-POWER B14B TCON DC / DC (SHARP)
B03c
3D09 +AVCC VCC_1V2 VCC_1V2
B14a
B04D HDMI
+VDISP-INT +VDISP-INT
B03h
B01G TOSHIBA SUPPLY +3V3 +3V3
B03e 1KFA
+3V3 +3V3
B03B DC / DC 5EC0 +3V3-HDMI
+VDISP B14a,c,d

B03e +3V3-STANDBY +3V3-STANDBY T 3.0A


7FA3 +3V3-STANDBY +3V3-STANDBY 7KFE VLS_15V6_B
B03c B03c
5FA3 +1V2-BRA-VDDC
IN OUT B01k +12V +12V
COM B03c +5V-VGA +5V-VGA 9KFC VLS_15V6 B14c,d,e
5FA4 +1V2-BRA-DR1 B01I
5U02

B01k
7KFA
7U03 +5V-EDID ISL97653AIRZ
TPS53126PW 7U02-1 12V/1V8 VCC_3V3 B14a,c,d,e
6EC1

COVERSION IC
12 +5V +5V LCD 9KFE VGH_35V
Dual B14e
B01H HDMI
Synchronous
5U00 +1V8 B03e
B02b,h,B03d,
SUPPLY
1P05 7U02-2 1P04 3KFP VGL_-6V
Step-Down B05a HDMI 3 B14e
DIN-5V 18 AIN-5V
HDMI SIDE 18 B04d CONNECTOR
Controller 14
CONNECTOR
1P03
HDMI 2
7U01 CONNECTOR
18 BIN-5V B14C P GAMMA & VCOM & FLASH (SHARP)

B01I VGA 1 HDMI 1


1P02 B14b
VCC_3V3 VCC_3V3
1E05 12V/1V1 18 CIN-5V
COVERSION CONNECTOR
VGA 9 +5V-VGA 7U04 +VDISP +VDISP
B04d B14b
CONNECTOR DIN-5V DIN-5V
23 B01h
VLS_15V6 VLS_15V6
5U01 +1V1 B02g,h, B14b
24
B03e 7KQA
B01J TEMP SENSOR + HEADPHONE
B04E HEADPHONE ISL248371RZ
VREF_15V2
IC B14d
+3V3 +3V3 +3V3 +3V3 LCD
B03e B03e SUPPLY
+3V3-STANDBY +3V3-STANDBY
B03c

18990_406_100331.eps
100723

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 77

10. Circuit Diagrams and PWB Layouts


10-1 AL1 820400089786 AmbiLight Common
LiteOn LED Common

LiteOn 15 LED Common


AL1A AL1A
1 2 3 4 5 6 7 8 9 10 11 12 13 14
+3V3
1M83 C1
2B00 E8
2B11
2B01 F8
100n 2B02 E9
2B03 I14
A FH12-25S-0.5SH(55)
FB01 7B26-1 A 2B04-1 B7

27
+24V TLC5946RHB
1
2 3B00-1 VCC 2B04-2 B6
BLANK 1 8 31 4 PWM-R1
3
PWM-CLOCK-BUF 150R 24
BLANK 0
5 PWM-G1
2B04-3 B8
4 GSCLK 1
5
3B18 26
IREF 2
6 PWM-B1 2B04-4 B7
FB35 3 7 PWM-G3
6
FB03 PROG 4 3B00-4 5
1K8
1
MODE 3
8 PWM-R3
2B08 E12
7 SCLK 4
8 SPI-CLOCK-BUF 150R 2
SIN 5
9 PWM-R2 2B09 E12
SPI-DATA-IN-BUF 23 10 PWM-G2
9
SPI-DATA-IN 3 6
SOUT 6
11 PWM-B2 2B10 F9
10 FB04 7
11 TEMP-SENSOR SPI-DATA-OUT 3B00-3 150R 3B21 22
XERR
OUT
8
14 PWM-B3 2B11 A9
FB20 +3V3 150R 3B22 25 15 PWM-G4
12 XHALF 9 2B17 D8
LATCH 2 3B00-2 7 10K 32 16 PWM-R4
B 13
14
FB05
+3V3 FB06 150R
12
XLAT 10
11
17
18
PWM-B4 B 2B20 D4
15 BLANK 12 PWM-B5
16
FB07 PROG 13
13
19 PWM-G5 3004 E12

6
FB08 28 NC 20
FB10 PWM-R5 3B00-1 A6

2B04-2

2B04-1

2B04-4

2B04-3
17 14

100p

100p

100p

100p
LATCH 29 21 DATA-SWITCH
18 15
19
FB11 SPI-CS
3B31
3B00-2 B6
GND GND_HS
+3V3 FB12 +3V3 3B00-3 B6

3
20

30

33
21 PWM-CLOCK 2K0
22 7B26-2 3B00-4 B6
FB13 SPI-DATA-RETURN TLC5946RHB
23
FB15 SPI-DATA-IN 34 VIA 42 3B01-1 E7
24
25
FB16 SPI-CLOCK 35
VIA VIA
41 3B01-2 D7
27 26 36 40
VIA 3B02-1 E3
C 1M83 C 3B02-2 E5

37
38
39
3B03-1 H14
3B03-2 H14
3B03-3 H14
+3V3
3B03-4 H14
3B07-1 F3
+3V3 3B07-2 G3
3B34 3B07-3 H3
2B20

100n

SPI-DATA-IN-BUF +3V3 +3V3 3B07-4 G3


D 100K RES
D 3B11 E12

2B17

100n
SPI-CLOCK-BUF +3V3
3B13-3 H3

6
1K5 1%

1K5 1%
7B07

3B39-2

3B39-3
7B20-1
3B13-4 I3
8

M95010-WDW6 74LVC2G17
+3V3 VCC

5
7B30
3B18 A8
5
Φ 2

3
D Q FB40
2 3B01-2 7 1 3B30-1 8

5
7B06 (64K) PWM-CLOCK 1 6 PWM-CLOCK-BUF 1
4 TEMP-SENSOR
3B21 B7
74LVC1G32GW 6
5

C 100R 220R 3B22 B8


SPI-CS 1 3
LMV331IDCK

RES
2B00

2
4 1 3B30-1 D9

33p
3B02-2

2
S

2B02

2B08
100p

3004
10K
2 7

10n
DATA-SWITCH

3B11
HOLD +3V3
+3V3 1 3B02-1 8 3 7 10K 2 3B30-4 E9
W

10K
3

3B31 B10

-T
10K
GND
E FB41
E 3B34 D13
4

7B20-2
74LVC2G17 3B35 G14

1
1K5 1%
3B39-1
+3V3 3B36 G14

2B09

10n
5
3B37 G14

8
3B01-1 3B30-4
SPI-DATA-RETURN SPI-CLOCK 1 8 3 4 4 5 SPI-CLOCK-BUF 3B39-1 E13
100R 220R 3B39-2 D12
3B39-3 D13

2B01

2
33p

2B10

100p
+24V 7000 G5
7001 G7
F F 7002 G8
8 3B07-1 1

7B23-1
7003 G10
10K

BC847BS(COL)
6
7004 G11
2 7005 G13
7B06 D3
2 3B07-2 7

1
10K

7B07 D4
7B20-1 D8
PWM-B1
FB30 7B20-2 E8
3B35
+24V 7B23-1 F4
+24V 7000
G LTW-008RGB 7001
LTW-008RGB
7002
LTW-008RGB
7003
LTW-008RGB
7004
LTW-008RGB
7005
LTW-008RGB
270R
3B36
G 7B23-2 G4
7B25 H3
5 3B07-4 4

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6


7B23-2 270R 7B26-1 A8
10K

BC847BS(COL) 3B37
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 7B26-2 C9
68R 7B30 D13
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
FB01 A1
3 3B07-3 6

4
FB03 B1
10K

1 3B03-1 8
FB04 B1
FB31 1K5
FB05 B1
H PWM-R1
2
3B03-2
7 H FB06 B2
+24V
1K5
FB07 B1
3 3B03-3 6
FB08 B1
FB10 B2
3 3B13-3 6

1K5
7B25
10K

BC847BW 3 4
3B03-4
5
FB11 B1
1K5 FB12 B2
1
FB13 C1

2B03

100n
5 3B13-4 4

FB15 C1
2
10K

FB16 C1
FB20 B7
I FB32
I FB30 G3
PWM-G1
FB31 H3
FB32 I3
FB35 A8
FB40 D12
FB41 E13
1 2 3 4 5 6 7 8 9 10 11 12 13 14
B001 B002 B007 6 2009-12-04

5 2009-10-28
AL 2K10 LiteOn
8204 000 8978 4 2009-10-07
15 LED Common 3 2009-08-27

2 2009-07-03

18770_600_100212.eps
100218

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 78

LiteOn LED Common 2

LiteOn 15 LED Common 2


AL1B AL1B
1 2 3 4 5 6 7 8 9 10 11 12
2B50 C11
+24V
3B50 B7
3B51 B7

5 3B55-4 4
A 7B50-1
A

10K
BC847BS(COL) 6 3B52 B7
2
3B53-1 B7

3 3B55-3 6
3B53-2 C7

1
10K
FB70
3B53-3 C7
PWM-B2
3B50 3B53-4 C7
+24V 7105 7104 7103 7102 7101 7100
LTW-008RGB LTW-008RGB 270R
3B51
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB 3B55-1 C3
B B 3B55-2 B3
7 3B55-2 2
5 BLUE 6 5 BLUE 6 270R 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6
7B50-2

10K
BC847BS(COL) 3 1 GREEN 2 1 GREEN 2 3B52 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
3B55-3 A3
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
1
3B53-1
8 3B55-4 A3
1 3B55-1 8

+24V

4
1K5
3B57-2 D3
10K

2 3B53-2 7
1K5
3B57-3 C3

2B50

100n
FB71
PWM-G2 3 3B53-3 6
1K5 3C00-1 G3
C +24V
4 3B53-4 5 C
1K5
3C00-2 F3
3 3B57-3 6

7B51 3C00-3 F3
10K

BC847BW 3

1 3C00-4 E3
3C06-1 G3
7 3B57-2 2

2
10K

3C06-2 H3
D FB72 D 3C10 F4
PWM-R2
3C11 F4
3C12 F4
3C15-1 G4
3C15-2 G4
+24V
3C15-3 G4
3C15-4 G4
5 3C00-4 4

E 7C20-1 E
10K

BC847BS(COL) 6
7100 B11
2
7101 B10
3 3C00-3 6

7102 B9
1
10K

FC01
7103 B7
PWM-B3

+24V
1 3C10 2
7202
7104 B6
270R 7200 7201

F 1 3C11 2
LTW-008RGB LTW-008RGB LTW-008RGB
F 7105 B5
7 3C00-2 2

7C20-2
270R 5 BLUE 6 5 BLUE 6 5 BLUE 6 Blue
7200 F8
10K

BC847BS(COL) 3 3C12 1 GREEN 2 1 GREEN 2 1 GREEN 2 Green

5
68R
3 RED 4 3 RED 4 3 RED 4
7201 F9
Red

1 3C15-1 8
7202 F10
1 3C00-1 8

7B50-1 A3
10K

1K5
3C15-2
2 7

PWM-G3
FC02 1K5 7B50-2 B3
3 3C15-3 6
G +24V
1K5
G 7B51 C3
4 3C15-4 5 7C20-1 E3
1 3C06-1 8

1K5
7C22 7C20-2 F3
10K

BC847BW 3

1 7C22 G3
FB70 B3
7 3C06-2 2

2
10K

FB71 C3
H FC03
H FB72 D3
PWM-R3
FC01 F3
FC02 G3
FC03 H3
1 2 3 4 5 6 7 8 9 10 11 12

6 2009-12-04

AL 2K10 LiteOn 5 2009-10-28

8204 000 8978 4 2009-10-07


15 LED Common 3 2009-08-27
2 2009-07-03

18770_601_100212.eps
100212

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 79

10-2 AL2 820400089691 9 LED LiteOn


9 LED LiteOn

9 LED LiteOn
AL2A AL2A
1 2 3 4 5 6 7 8 9 10

1M84 A10
2D01 B6
7203 A3
A A 7204 A4
7205 A5
7203 7204 7205 1M84
LTW-008RGB LTW-008RGB LTW-008RGB
SPI-CLOCK-BUF 1
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B

2D01

100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
26 27

FH12-25S-0.5SH(55)

FD04

D D

1 2 3 4 5 6 7 8 9 10

B003 B004

1 2009-10-07

9 LED LiteOn 8204 000 8969


AL 2K10 3104 313 63812

18770_610_100212.eps
100218

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 80

9 LED LiteOn

9 LED LiteOn
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13

2D10 D13
+24V 3D02-1 A1
A A 3D02-2 B1

8 3D02-1 1
7D01-1
3D02-3 B1

10K
BC847BS(COL)
6

2 3D02-4 C1
3D05-3 C1
2 3D02-2 7
10K 1

3D05-4 D1
PWM-B4
FD01
1 3D10 2
3D10 B12
B +24V 7300 7301 7302 7303 7304 7305 270R
+24V
B 3D11 B12
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB
3D11
1 2
3D12 B12
6 3D02-3 3

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 270R


7D01-2
10K

BC847BS(COL) 3D12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
3D13-1 C12
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
3D13-2 C12
4 3D02-4 5

4
3D13-3 C12
10K

1 3D13-1 8

C FD02 1K5
C 3D13-4 D12
PWM-R4

+24V
2 3D13-2 7
1K5
7300 B5
3 3D13-3 6 7301 B6
3 3D05-3 6

1K5
7D02 7302 B7
10K

BC847BW 3 4 3D13-4 5

1
1K5 7303 B8

2D10

100n
7304 B10
5 3D05-4 4

2
10K

D D 7305 B11
PWM-G4
FD03
7D01-1 A2
7D01-2 B2
7D02 C2
FD01 B1
FD02 C1
E E FD03 D1

1 2 3 4 5 6 7 8 9 10 11 12 13

1 2009-10-07

9 LED LiteOn 8204 000 8969


AL 2K10 3104 313 63812

18770_611_100212.eps
100212

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 81

10-3 AL2 820400089703 15 LED LiteOn


15 LED LiteOn

15 LED LiteOn
AL2A AL2A
1 2 3 4 5 6 7 8 9 10
1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5
A A
FD18 C7
FH12-25S-0.5SH(55)

7203 7204 7205 1M84


LTW-008RGB LTW-008RGB LTW-008RGB
SPI-CLOCK-BUF 1
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B

2D01

100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
26 27
FD18

D D

1 2 3 4 5 6 7 8 9 10

B003 B004 B005

3 2009-12-07

15 LED LiteOn 8204 000 8970


2

1
2009-10-07

2009-07-02
AL 2K10 3104 313 63823

18770_620_100212.eps
100218

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 82

15 LED LiteOn

15 LED LiteOn
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13 2D10 C13
2D11 H13
3D02-1 A1
+24V
3D02-2 A1
3D02-3 B1

8 3D02-1 1
7D01-1

10K
BC847BS(COL)
6
3D02-4 B1
A 2 3D02-2 7
2
A 3D03-3 H2
1
3D03-4 G2
10K

FD01
3D04-1 F2
PWM-B4

+24V 7300 7301 7302 7303 7304 7305


3D10
+24V 3D04-2 G2
270R
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB
3D11 3D04-3 E2
6 3D02-3 3

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6


7D01-2 270R
3D04-4 F2
10K

BC847BS(COL) 3D12
B 3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
B
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
68R 3D05-3 C1
3D05-4 D1
4 3D02-4 5

4
10K

1 3D13-1 8
3D10 B12
PWM-R4
FD02 1K5
3D11 B12
2 3D13-2 7
+24V
1K5 3D12 B12
3 3D13-3 6
C C 3D13-1 B12
3 3D05-3 6

1K5
7D02
10K

BC847BW 3 4 3D13-4 5 3D13-2 C12


1K5
1
3D13-3 C12

2D10

100n
5 3D05-4 4

3D13-4 C12
2
10K

FD03
3D15 F12
PWM-G4
3D16 F12
D D 3D17 F12
3D18-1 G12
3D18-2 G12
3D18-3 G12
+24V
3D18-4 G12
7300 B5
E E
3

7301 B6
3D04-3

7D03-1
10K

BC847BS(COL)
6
7302 B7
6

7303 B8
5

1
3D04-4

10K

7304 B10
4

PWM-B5
FD04 7305 B11
3D15
+24V 7400 7401 7402 7403 7404 7405 270R
+24V
7400 F5
F LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB
3D16 F 7401 F6
1

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 270R


3D04-1

7D03-2
7402 F7
10K

BC847BS(COL) 3D17
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
8

5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4


68R
7403 F8
7

4
7404 F10
3D04-2

10K

1 3D18-1 8 7405 F11


2

FD05 1K5

G
PWM-R5
2 3D18-2 7
G 7D01-1 A2
+24V
1K5
7D01-2 B2
3 3D18-3 6
7D02 C2
5

1K5
3D03-4

7D04
10K

BC847BW 3 4 3D18-4 5
7D03-1 E2
4

1K5
1
7D03-2 F2

2D11

100n
3

2
3D03-3

7D04 G2
10K

FD01 A1
6

H PWM-G5
FD06 H
FD02 C1
FD03 D1
FD04 F1
FD05 G1
FD06 H1
1 2 3 4 5 6 7 8 9 10 11 12 13

3 2009-12-07

15 LED LiteOn 8204 000 8970 2 2009-10-07

1 2009-07-02
AL 2K10 3104 313 63823

18770_621_100212.eps
100219

2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 83

10-4 AL3 820400089712 21 LED LiteOn


21 LED LiteOn

21 LED LiteOn
AL3A AL3A
1 2 3 4 5 6 7 8 9 10

A A

7203 7204 7205 1M84


LTW-008RGB LTW-008RGB LTW-008RGB
SPI-CLOCK-BUF 1
SPI-DATA-OUT2 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
LATCH
B 8
B

2C01

100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21

C 22
23 C
24
+24V 25
26 27

FH12-25S-0.5SH(55)

D D

1 2 3 4 5 6 7 8 9 10
1M84 A10
B003 B004 B005 B006 2C01 B6
7203 A3
7204 A4
7205 A5

2 2009-10-22

21 LED LiteOn 8204 000 8971


1 2009-08-18

AL 2K10 3104 313 63832

18770_655_100413.eps
100413

2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 84

21 LED LiteOn

21 LED LiteOn
AL3B AL3B
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2E10 D13
2F10 H13
3E02-1 C2
3E02-2 C2
3E02-3 B2
3E02-4 B2
A A 3E05-3 D2
3E05-4 D2
3E10 B13
+24V
3E11 C13
3E12 C13
6 3E02-3 3

7E01-1
3E13-1 C13
10K

BC847BS(COL)
6

2
3E13-2 D13
3E13-3 D13
4 3E02-4 5

B 1
B 3E13-4 D13
10K

3F02-1 G2
FD04
PWM2-B2
3E10 3F02-2 G2
+24V
+24V 7400 7401 7402 7403 7404 7405 270R 3F02-3 F2
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB 3E11
3F02-4 F2
8 3E02-1 1

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6


7E01-2 270R
3F05-3 H2
10K

BC847BS(COL) 3E12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
3F05-4 H2
C 5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
C 3F10 F13
2 3E02-2 7

4
3F11 F13
10K

1
3E13-1
8 3F12 G13
PWM2-G2
FD05 1K5 3F13-1 G13
2 3E13-2 7
+24V
3F13-2 G13
1K5

3
3E13-3
6
3F13-3 H13
3F13-4 H13
4 3E05-4 5

1K5
7E02
10K

BC847BW 3 4 3E13-4 5 7400 C5


D 1K5
D
1 7401 C7

2E10

100n
7402 C8
6 3E05-3 3

2
10K

7403 C9
FD06
7404 C11
PWM2-R2
7405 C12
7500 F5
7501 F7
E E 7502 F8
+24V
7503 F9
7504 F11
6 3F02-3 3

7F01-1
7505 F12
10K

BC847BS(COL)
6

2
7E01-1 B3
7E01-2 C3
4 3F02-4 5

1
7E02 D3
10K

F F 7F01-1 E3
PWM2-B3
FF01
3F10
7F01-2 G3
+24V 7500 7501 7502 7503 7504 7505 270R
+24V
7F02 H3
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB 3F11 FD04 B2
8 3F02-1 1

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6


7F01-2 270R FD05 C2
10K

BC847BS(COL) 3F12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
FD06 E2
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
FF01 F2
2 3F02-2 7

G 4
G FF02 G2
10K

1 3F13-1 8
FF03 H2
FF02 1K5
PWM2-R3
2 3F13-2 7
+24V
1K5

3 3F13-3 6
4 3F05-4 5

1K5
7F02
10K

BC847BW 3 3F13-4
4 5
1K5
H 1
H

2F10

100n
6 3F05-3 3

2
10K

FF03
PWM2-G3

1 2 3 4 5 6 7 8 9 10 11 12 13 14
2 2009-10-22

21 LED LiteOn 8204 000 8971 1 2009-08-18

AL 2K10 3104 313 63832

18770_656_100413.eps
100413

2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 85

21 LED LiteOn

21 LED LiteOn
AL3C AL3C
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2D04-1 C7
2D04-2 C7
2D04-3 C8
2D04-4 C7
2D10 G14
A A 2D11 B9
3D00-1 B7
+3V3 3D00-2 C7
2D11 3D00-3 C7
100n 3D00-4 B7
3D02-1 E2
7D26-1
3D02-2 E2

27
TLC5946RHB
VCC
B BLANK 4
3D00-4
5 31
BLANK 0
4 PWM2-R1 B 3D02-3 F2
PWM-CLOCK-BUF 150R 24 5 PWM2-G1
3D18 26
GSCLK
IREF
1
2
6 PWM2-B1 3D02-4 F2
FD18 3 7 PWM2-G3
PROG 3 3D00-3 6
1K8
1
MODE
SCLK
3
4
8 PWM2-R3 3D05-3 G2
2 9 PWM2-R2
SPI-CLOCK-BUF
150R
23
SIN
SOUT
5
6
10 PWM2-G2 3D05-4 G2
SPI-DATA-OUT 1 8 11 PWM2-B2
SPI-DATA-OUT2 3D00-1 150R 3D21 22
XERR
OUT
7
8
14 PWM2-B3 3D10 E13
33R 3D22 25 15
LATCH 2 3D00-2 7
FD19 +3V3
10K 32
XHALF
XLAT
9
10
16 3D11 F13
17
150R
12
11
18 3D12 F13
12
13 19
C 13
C 3D13-1 F13

6
28 NC 20

2D04-4

2D04-2

2D04-1

2D04-3
14

100p

100p

100p

100p
29
15
21
3D13-2 G13
GND GND_HS
3D13-3 G13

30

33
7D26-2
TLC5946RHB
3D13-4 G13
34
35
VIA 42
41
3D18 B8
VIA VIA
36
VIA
40 3D21 C8
3D22 C8
7300 E5

37
38
39
D D
7301 E7
+24V
7302 E8
7303 E9
7304 E10
1
3D02-1

7D01-1
10K

BC847BS(COL)
6 7305 E12
8

2 7D01-1 E3
7D01-2 F3
7

1
E E
3D02-2

10K

7D02 G3
7D26-1 B9
2

FD01
PWM2-B1
3D10
+24V
7D26-2 C10
+24V 7300 7304 7305
LTW-008RGB 7301
LTW-008RGB
7302
LTW-008RGB
7303
LTW-008RGB
LTW-008RGB LTW-008RGB 270R FD01 E3
3D11
FD02 F3
3

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 270R


3D02-3

7D01-2
FD03 H3
10K

BC847BS(COL) 3D12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
FD18 B8
6

68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
F F FD19 C7
5

4
3D02-4

10K

1 3D13-1 8
4

FD02 1K5
PWM2-R1
2 3D13-2 7
+24V
1K5
3D13-3
3 6
6

1K5
3D05-3

7D02
10K

BC847BW 3 4 3D13-4 5
G G
3

1K5
1

2D10

100n
4

2
3D05-4

10K
5

FD03
PWM2-G1

H H

1 2 3 4 5 6 7 8 9 10 11 12 13 14

2 2009-10-22

21 LED LiteOn 8204 000 8971 1 2009-08-18

AL 2K10 3104 313 63832

18770_657_100413.eps
100413

2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 86

10-5 AL1 Layout AmbiLight LiteOn


Layout AmbiLight LiteOn

AmbiLight LiteOn
9 LED

3B31 3B50
3B51

FC01
3B56

9B53
3B52 FB01

2B03
FB32

3B54
7B06

3B53

2B50
9B50
7B25

3B55
7C02

B001

B007

B002

B003
9B51
7000 7001 FB12
7002 7003 7004 7100 7101 7102 7103

3B18
FB04
FB11

2B11
2B09

3B30

3C08
7B26
1M83 1M84
FB07
3B34
3004 3001
3C06 3C05
3B07

3B13

9B52
3B01

3C09
2B17

3C02

3C01
7B07
FB40 FB70
FB05 FB06
FB41
3B21 3B22 FB35

3C07
7C01

3B02
2B00

3B00
7B30

2B10
2B02
2B20
2B04
2B08
3B11

7B23 FB30 FB08 2B01


7B20 FB16
FB13
FB10 FB31 FB15
FB03
FB72 FB20
FC02 FC03 FB71 3C10

3104 313 6390.3

12 LED

3B31 3B50
3B51
3B56

9B53
3B52 FC01

2B03
FB32 FB01

3B54
7B06 3E04

3B53

2B50
9B50
3B55
7B25
B001

B007

B002

B003

B004
9B51
FD03

7000 7001 7002 7003 7004 7100 7101 7102 7103 7104 7105 7106

3E06
3B18
FB04 FB12
FB11 3E03

2B11
2B09

3B30

7B26
1M83 1M84
FB07

3E05
3B34
3004 3001
3B07

3B13

9B52
3B01

7E02
3E01
2B17

7B07
FB41
FB40 FB05 FB06
3B21 FB35
FB70
3E02
3B22

3B02

3B00
2B00 7E01

FD01

FD02
2B10
2B02
7B30 2B20 2B04
FB13
2B08
3B11

7B23 7B20 FB03


FB30

FB10

FB20
FB08 2B01 FB16 FB31 FB15
FB72
FC02 FC03 FB71

3104 313 6385.2

15 LED
3B31 3B50
3B51

3B56

9B53
3B52 FC01

3D07

3C09
FB01
2B03

FB32
3D05 3D06
3B54

7B06
3B53

2B50
9B50
7B25
3B55
B001

B007

B002

B003

B004

B005
FD03

9B51
FD05

7000 7001 FB12


7002 7003 7004 7100 7101 7102 7103 7104 7200 7201 3C06 3C05
7202 7203 7204
3B18
FB04

3D01
FB11
2B11
2B09

3B30

3D02
7B26

3C08
1M83 1M84

7D02
FB07

3D09
3B34
3004 3001
3B07

3B13

9B52

7C02
2C03
3B01

3C01
2B17

7B07
FB40 FB05 FB06
FB70 3C02
FB41
3B21 3B22 FB35
7D01 7C01
3B02

2B00
3B00

7B30
2B10
2B02
2B20

2B04
FB13

FD01 FD02
2B08
3B11

7B23 7B20 FB03


FB30

FB20 FD04
FB08 2B01 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71 FD06

3104 313 6386.3

18 LED
3B35
3B36

FB01 FC01
FB32
3B03

7B06
3B37

3C00
3B31

3B52
7B25 3B51

3B55
B001

B007

B002

B003
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205

3B18
FB04 FB12
FB11
2B09

3B50 2C15
3B30

2B03

3C12
3B53
7B26
1M83 1M84
FB07
3C15
3B01

3B34
3B07

3B13

7B50
7B07
2B01

7C20
FB70 3C11
FB40
3B21 3B22 2B50

7C22
2B17 2B11

7B51
FB05 FB06
2B00

FB41 FB35
3B00

7B30

3C06
3B02

2B04
2B10
2B02
2B20

3C10
7B20
2B08
3B11

7B23 3B57
3004

FB13 FB03
FB20
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71

3104 313 6389.5

24 LED
3B35
3B36

7B26

FB01 FC01 FD02


3B03

FB32
3B37

7B06

3C00
3B31

3B52

7B25

3B55
3B51
B001

B007

B002

B003

B004
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305
3B18

FB04 FB12
FB11
2B09

3B30

2B03 3B50

3C12
3B53

1M83 1M84
3C15
3B01

FB07
FD03
3B34

2D10
3B07

3B13

7D02
7B50
7B07
2B01

7C20
FB70 3C11
FB40
3B21 3B22 2D01

7C22
2B50

7B51
2B17 2B11 3D05
2B00

FB41 FB05 FB06 FB35

3D13
3D10
3B00

3D12
7B30 3D02

3C06
3B02

7D01
2B10
2B02
2B20

2B04 3C10
2B08
3B11

7B20
3004

7B23 FB30 3B39 FB08 FB16


FB13
FB10 FB31 FB15
FB03
FB72 FB20
FC02 FC03 FB71
3B57
FD01
FD04 3D11

3104 313 6381.2

30 LED
3B35
3B36

FB01 FC01
FB32
3B03

7B06
3B37

3C00
3B31

3B52

7B25 3B51
3B55
FB12
B001

B007

B002

B003

B005

B004
FD03 FD05

7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 7404 7405
3B18

FB04
FB11
2B09

3B50
3B30

2B03
FB07

3C12

3B53
7B26
1M83 1M84
3C15
3B01

2D10
3B34
3B07

3B13

7D02
3D15

7D04
3D10

2D11
3D17
7B50

3D13

3D03
7B07
2B01

3D12
FD18
7C20

FB70 3C11
FB40
3B21 3B22 2B50
7C22

2B17 2B11 3D05


7B51

FB05 FB06
2D01

3D04
2B00

FB41 FB35

7D01 7D03
3B00

3D11 3D16
7B30 3D02
3C06
3B02

2B04
2B10
2B02
2B20

3C10 FD01 FD02


3D18
7B20
2B08
3B11

7B23 3B57
3004

FB13 FB03
FB20 FD04
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71 FD06

3104 313 6382.3

36 LED
3B35
3B36

FB01 FC01

3D21
FB32
3B03

7B06
3B37

3C00
3B31

3B52

7B25 3B51
3B55
B001

B007

B002

B003

B005

B004

B006
FD03 FD05

7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 3D18
7404 7405 7500 7501 7502 7503 7504 7505

3D22
3B18

FB04 FB12
FB11
2B09

2E10
3B50 2D04
3B30

2B03
7D26
3C12

3B53

2D10
7B26
2D11

1M83 1M84
FB07
3C15 3D00
3B01

3B34

7F02
3B07

3B13

2F10
7D02

7E02

3E12
3F12

3F02

3F05
7B50

3D13
7B07

3E02
3F10
2B01

3D10 FD18
7C20

3E11

3E05
FB70

3E13
3D02

3D12
3C11
FB40
3B21 3B22 2B50 2C01 FD19
7C22

2B17 2B11
7B51

FB05 FB06
2B00

FB41 FB35

7D01 7E01 7F01


3B00

FF02 FF01
7B30
3C06

3F11
3B02

3D11
2B04 3E10
2B10
2B02
2B20

3C10
3D05 FD01 FD02
7B20
2B08
3B11

7B23 3B57 3F13


3004

FB13 FB03
FB20 FD04
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71 FD06 FF03

3104 313 6383.2

18770_602_100216.eps
100526

2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 87

10-6 AL1 820400090592 AmbiLight Common


Everlight LED Common

Everlight 15 LED Common


AL1A AL1A
1 2 3 4 5 6 7 8 9 10 11 12 13 14
1M83 C1
+3V3 2B00 E8
2B11
2B01 F8
2B02 E9
100n
2B03 I14
A FH12-25S-0.5SH(55)
FB01 7B26-1 A 2B04-1 B7

27
1 +24V TLC5946RHB 2B04-2 B6
3B00-1 VCC
2
BLANK 1 8 31 4 PWM-R1 2B04-3 B8
3 BLANK 0
4 PWM-CLOCK-BUF 150R 24
GSCLK 1
5 PWM-G1 2B04-4 B7
3B18 26 6 PWM-B1
5 IREF 2 2B08 E12
1K8 FB35 3 7 PWM-G3
6 MODE 3
4 3B00-4 5 1 8
7 FB03 PROG
150R 2
SCLK 4
9
PWM-R3 2B09 E12
8 SPI-CLOCK-BUF SIN 5 PWM-R2
9 SPI-DATA-IN-BUF 23
SOUT 6
10 PWM-G2 2B10 F9
SPI-DATA-IN 3 6 11 PWM-B2
10 FB04
3B00-3 150R 3B21 22 OUT
7
14
2B11 A9
11 TEMP-SENSOR SPI-DATA-OUT XERR 8 PWM-B3
12 FB20 +3V3 150R 3B22 25
XHALF 9
15 PWM-G4 2B17 D8
LATCH 2 3B00-2 7 10K 32 16 PWM-R4
B 13
14
FB05
+3V3 FB06 150R
XLAT 10
11
17 PWM-B4 B 2B20 D4
15 BLANK 12
12
18 PWM-B5 3004 E12
FB07 PROG 13 19 PWM-G5
16 13 3B00-1 A6

6
FB08 28 NC 20 PWM-R5
FB10

2B04-2

2B04-1

2B04-4

2B04-3
17 14
3B00-2 B6

100p

100p

100p

100p
LATCH 29 21 DATA-SWITCH
18 15
FB11 SPI-CS
19
+3V3 FB12 GND GND_HS
3B31
+3V3
3B00-3 B6

3
20
3B00-4 B6

30

33
21 PWM-CLOCK 2K0
7B26-2
22
FB13 SPI-DATA-RETURN TLC5946RHB 3B01-1 E7
23
FB15 SPI-DATA-IN 34 VIA 42 3B01-2 D7
24
FB16 SPI-CLOCK 35 41
25 VIA VIA 3B02-1 E3
27 26 36 40
VIA
C C 3B02-2 E5
1M83
3B03-1 H14

37
38
39
3B03-2 H14
3B03-3 H14
3B03-4 H14
+3V3 3B07-1 F3
3B07-2 G3
+3V3
3B07-3 H3
3B34
3B07-4 G3
2B20

100n
SPI-DATA-IN-BUF +3V3 +3V3 3B11 E12
D 100K RES
D

2B17

100n
SPI-CLOCK-BUF +3V3 3B13-3 H3

6
1K5 1%

1K5 1%
7B07 3B13-4 I3

3B39-2

3B39-3
7B20-1
8

M95010-WDW6 74LVC2G17
+3V3 VCC 3B18 A8

5
7B30
5
Φ 2
3B21 B7

3
D Q FB40
2 3B01-2 7 1 3B30-1 8

5
7B06 PWM-CLOCK 1 6 PWM-CLOCK-BUF 1
74LVC1G32GW 6 (64K) 4 TEMP-SENSOR 3B22 B8
5

C 100R 220R
SPI-CS 1 3
LMV331IDCK 3B30-1 D9

RES
2B00

2
4 1

33p
3B02-2

2
S
3B30-4 E9

2B02

2B08
100p

3004
10K
2 7

10n
DATA-SWITCH

3B11
+3V3 HOLD +3V3
1 3B02-1 8 3 7 2
W 10K 3B31 B10

10K
3

-T
10K
GND 3B34 D13
E FB41
E
4

7B20-2 3B35 G14


74LVC2G17

1
3B36 G14

1K5 1%
3B39-1
+3V3

2B09

10n
3B37 G14

5
3B39-1 E13

8
3B01-1 3B30-4
SPI-DATA-RETURN SPI-CLOCK 1 8 3 4 4 5 SPI-CLOCK-BUF
100R 220R
3B39-2 D12
3B39-3 D13

2B01

2
33p
7000 G5

2B10

100p
+24V
7001 G7
7002 G8
F F
8 3B07-1 1

7B23-1 7003 G10


10K

BC847BS(COL)
6 7004 G11
2 7005 G13
7B06 D3
2 3B07-2 7

1
7B07 D4
10K

7B20-1 D8
FB30
7B20-2 E8
PWM-B1
3B35 7B23-1 F4
+24V
+24V 7000 7B23-2 G4
G 99-235/RSBB7C-A24/2D 7001
99-235/RSBB7C-A24/2D
7002
99-235/RSBB7C-A24/2D
7003
99-235/RSBB7C-A24/2D
7004
99-235/RSBB7C-A24/2D
7005
99-235/RSBB7C-A24/2D
270R
3B36
G 7B25 H3
7B26-1 A8
5 3B07-4 4

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 270R


7B23-2
10K

BC847BS(COL)
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 3B37 7B26-2 C9
68R 7B30 D13
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
FB01 A1
3 3B07-3 6

4 FB03 B1
10K

FB04 B1
1 3B03-1 8 FB05 B1
FB31 1K5 FB06 B2
PWM-R1
H +24V
2
3B03-2
7 H FB07 B1
1K5
FB08 B1
3 3B03-3 6 FB10 B2
3 3B13-3 6

1K5
7B25 FB11 B1
10K

BC847BW 3 3B03-4
4 5
FB12 B2
1K5
1 FB13 C1

2B03

100n
FB15 C1
5 3B13-4 4

FB16 C1
10K

FB20 B7
I FB32
I FB30 G3
PWM-G1
FB31 H3
FB32 I3
FB35 A8
FB40 D12
FB41 E13
1 2 3 4 5 6 7 8 9 10 11 12 13 14
B001 B002 B007

2 2009-11-27

1 2009-11-03
AL 2K10 Everlight
8204 000 9059
15 LED Common

18770_670_100212.eps
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2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 88

Everlight LED Common 2

Everlight 15 LED Common 2


AL1B AL1B
1 2 3 4 5 6 7 8 9 10 11 12
2B50 C11
+24V
3B50 B7
3B51 B7

5 3B55-4 4
A 7B50-1
A 3B52 B7

10K
BC847BS(COL) 6

2 3B53-1 B7
3B53-2 C7

3 3B55-3 6

1
10K
3B53-3 C7
PWM-B2
FB70
3B50
3B53-4 C7
+24V 7105
99-235/RSBB7C-A24/2D
7104
99-235/RSBB7C-A24/2D 270R 7103
99-235/RSBB7C-A24/2D
7102
99-235/RSBB7C-A24/2D
7101
99-235/RSBB7C-A24/2D
7100
99-235/RSBB7C-A24/2D 3B55-1 C3
3B51
B B 3B55-2 B3
7 3B55-2 2
5 BLUE 6 5 BLUE 6 270R 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6
7B50-2

10K 3B55-3 A3
BC847BS(COL) 3 1 GREEN 2 1 GREEN 2 3B52 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
1
3B53-1
8 3B55-4 A3
1 3B55-1 8

+24V

4
1K5
3B57-2 D3
10K

2 3B53-2 7
1K5 3B57-3 C3

2B50

100n
FB71
PWM-G2 3 3B53-3 6
1K5 3C00-1 G3
C +24V
4 3B53-4 5 C 3C00-2 F3
1K5
3 3B57-3 6

7B51 3C00-3 F3
10K

BC847BW 3

1
3C00-4 E3
3C06-1 G3
7 3B57-2 2

2
10K

3C06-2 H3
D FB72 D 3C10 F4
PWM-R2
3C11 F4
3C12 F4
3C15-1 G4
3C15-2 G4
+24V
3C15-3 G4
3C15-4 G4
5 3C00-4 4

E 7C20-1 E
10K

BC847BS(COL) 6
7100 B11
2
7101 B10
3 3C00-3 6

7102 B9
10K

PWM-B3
FC01 7103 B7
1 3C10 2
+24V
270R 7200 7201 7202
99-235/RSBB7C-A24/2D
7104 B6
99-235/RSBB7C-A24/2D
F 1 3C11 2
99-235/RSBB7C-A24/2D
F 7105 B5
7 3C00-2 2

270R 5 BLUE 6 5 BLUE 6 5 BLUE 6 Blue


7C20-2
7200 F8
10K

BC847BS(COL) 3 3C12 1 GREEN 2 1 GREEN 2 1 GREEN 2 Green

5
68R
3 RED 4 3 RED 4 3 RED 4 Red 7201 F9
1 3C15-1 8
7202 F10
1 3C00-1 8

4
10K

1K5

2
3C15-2
7 7B50-1 A3
FC02 1K5
PWM-G3
3 3C15-3 6
7B50-2 B3
G +24V G
1K5
7B51 C3
4 3C15-4 5
7C20-1 E3
1 3C06-1 8

1K5
7C22
10K

BC847BW 3
7C20-2 F3
1
7C22 G3
7 3C06-2 2

FB70 B3
10K

H H FB71 C3
FC03
PWM-R3
FB72 D3
FC01 F3
FC02 G3
1 2 3 4 5 6 7 8 9 10 11 12 FC03 H3

2 2009-11-27

AL 2K10 Everlight 1 2009-11-03

8204 000 9059


15 LED Common

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 89

10-7 AL2 820400090601 9 LED Everlight


9 LED Everlight

9 LED Everlight
AL2A AL2A
1 2 3 4 5 6 7 8 9 10

1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5
A A

7203 7204 7205 1M84


99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D
SPI-CLOCK-BUF 1
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B

2D01

100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
26 27

FH12-25S-0.5SH(55)

D D

1 2 3 4 5 6 7 8 9 10

B003 B004

1 2009-11-03

9 LED Everlight 8204 000 9060


AL 2K10 3104 313 64191

18770_640_100212.eps
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2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 90

9 LED Everlight

9 LED Everlight
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13
2D10 C13
+24V 3D02-1 A1
3D02-2 A1

8 3D02-1 1
7D01-1
3D02-3 B1

10K
BC847BS(COL)
6

2 3D02-4 B1
A A
2 3D02-2 7
1
3D05-3 C1
10K

FD01
3D05-4 C1
PWM-B4

+24V
1 3D10 2 +24V 3D10 A12
7300 7301 7302 7303 7304 7305 270R
99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D
1
3D11
2 3D11 B12
6 3D02-3 3

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6


7D01-2 270R
3D12 B12
10K

BC847BS(COL) 3D12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2

B 5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4


68R
B 3D13-1 B12
3D13-2 C12
4 3D02-4 5

4
10K

1 3D13-1 8 3D13-3 C12


FD02 1K5
PWM-R4
2 3D13-2 7
3D13-4 C12
+24V
1K5
3 3D13-3 6
7300 B5
7301 B6
3 3D05-3 6

1K5
7D02
C
10K

BC847BW 3 4 3D13-4 5 C
1
1K5 7302 B7
7303 B8

2D10

100n
5 3D05-4 4

2
10K

7304 B10
PWM-G4
FD03
7305 B11
7D01-1 A2
D FD04
D 7D01-2 B2
7D02 C2
FD01 A1
FD02 C1
FD03 D1
FD04 D1
1 2 3 4 5 6 7 8 9 10 11 12 13

1 2009-11-03

9 LED Everlight 8204 000 9060


AL 2K10 3104 313 64191

18770_641_100212.eps
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2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 91

10-8 AL2 820400090621 15 LED Everlight


15 LED Everlight

15 LED Everlight
AL2A AL2A
1 2 3 4 5 6 7 8 9 10

1M84 A10
2D01 B6
7203 A3
A A 7204 A4
7205 A5
7203
99-235/RSBB7C-A24/2D
7204
99-235/RSBB7C-A24/2D
7205
99-235/RSBB7C-A24/2D
SPI-CLOCK-BUF
1M84

1
FD18 C7
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B

2D01

100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
FD18 26 27

D D

1 2 3 4 5 6 7 8 9 10

B003 B004 B005

1 2009-11-27

15 LED Everlight 8204 000 9062


AL 2K10 3104 313 64211

18770_660_100212.eps
100526

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 92

15 LED Everlight

15 LED Everlight
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13

2D10 C13
+24V 2D11 H13
3D02-1 A1

8 3D02-1 1
7D01-1
3D02-2 A1

10K
BC847BS(COL)
6

A 2
A 3D02-3 B1
2 3D02-2 7
10K
1 3D02-4 B1
3D03-3 H2
PWM-B4
FD01
3D10
3D03-4 G2
+24V 7300
99-235/RSBB7C-A24/2D
7301
99-235/RSBB7C-A24/2D
7302
99-235/RSBB7C-A24/2D
7303
99-235/RSBB7C-A24/2D
7304
99-235/RSBB7C-A24/2D
7305
99-235/RSBB7C-A24/2D
68R
+24V
3D04-1 F2
3D11 RES
3D04-2 G2
6 3D02-3 3

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 68R


7D01-2
10K

B BC847BS(COL)
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 3D12
B 3D04-3 E2
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3D04-4 F2
4 3D02-4 5

4
3D05-3 C1
10K

1 3D13-1 8 3D05-4 D1
FD02 1K5
PWM-R4
2 3D13-2 7
3D10 B12
+24V
1K5
3D11 B12
3 3D13-3 6
C C 3D12 B12
3 3D05-3 6

1K5
7D02
10K

4 3D13-4 5
BC847BW 3
1K5
3D13-1 B12
1
3D13-2 C12

2D10

100n
5 3D05-4 4

3D13-3 C12
10K

FD03
3D13-4 C12
PWM-G4
3D15 F12
D D 3D16 F12
3D17 F12
3D18-1 G12
3D18-2 G12
+24V
3D18-3 G12
3D18-4 G12
E E
3

7300 B5
3D04-3

7D03-1
10K

BC847BS(COL)
6
7301 B6
6

2
7302 B7
5

1
3D04-4

10K

7303 B8
4

PWM-B5
FD04 7304 B10
3D15
+24V 7400 7401 7402 7403 7404 7405 68R
+24V 7305 B11
F 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D
3D16 RES F 7400 F5
1

5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 68R


3D04-1

7D03-2
7401 F6
10K

BC847BS(COL) 3D17
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2

7402 F7
8

68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4

7403 F8
7

4
3D04-2

10K

1 3D18-1 8
7404 F10
2

PWM-R5
FD05 1K5
7405 F11
2 3D18-2 7
G +24V
1K5
G 7D01-1 A2
3 3D18-3 6
7D01-2 B2
5

1K5
3D03-4

7D04
10K

BC847BW 3 4 3D18-4 5 7D02 C2


4

1K5
1
7D03-1 E2

2D11

100n
3

7D03-2 F2
2
3D03-3

10K

7D04 G2
6

H FD06 H
PWM-G5
FD01 A1
FD02 C1
FD03 D1
FD04 F1
FD05 G1
FD06 H1
1 2 3 4 5 6 7 8 9 10 11 12 13

1 2009-11-27

15 LED Everlight 8204 000 9062


AL 2K10 3104 313 64211

18770_661_100212.eps
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 93

10-9 Layout AmbiLight Everlight


Layout AmbiLight Everlight

AmbiLight Everlight

18 LED

3B35
3B36
FB01 FC01
FB32

3B03
7B06

3B37

3C00
3B31

3B52
7B25 3B51

3B55
B001

B007

B002

B003
FB12

7203 7204 7205

3B18
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202
FB04
FB11
2B09

3B50 2C15

3B30
2B03

FB07

3C12
3B53
7B26
1M83 1M84
3C15

3B01
3B34
3B07

3B13

3B22
7B50
2B01 7B07

7C20
FB70

2B04
FB40
2B17

7C22
2B11

7B51
FB41 FB05 FB06 FB35
3B21 2B50

3B00
3C11
7B30

3B02
2B10
2B02
2B20
2B08
3B11

2B00
7B23 7B20 3B57
3004

FB13 FB03
FB20 3C10 3C06
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71

3104 313 6420.1

24 LED

3B35
3B36

7B26
FB01 FC01
FB32

3B03
7B06

3B37

3C00
3B31

3B52
7B25 3B51

3B55
B001

B007

B002

B003

B004
FD03
FB12

3B18
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305
FB04
FB11
2B09

3B50
3B30

2B03

3C12
3B53

1M83 1M84
FB07
3C15
3B01

3B34

2D10
3B07

3B13

7D02
3B22
7B50
7B07
2B01

7C20
FB70

2B04
FB40
2B17

7C22
2B11 3D05

7B51
FB41 FB05 FB06 FB35
3B21 2B50

3D13
3D10

3B00
3C11
7B30 3D02

3D12
7D01
3B02
2B10
2B02
2B20

2D01 FD01 FD02


2B08
3B11

2B00

7B23 7B20 3B57


3004

FB13 FB03
FB20 3C10 3C06 FD04 3D11
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71

3104 313 6419.1

30 LED
3B35
3B36

FB01 FC01
3B03

FB32

B003

B005

B004
3B37

7B06

3C00
3B31

3B52
7B25

3B55
3B51
FB12
B001

B007

B002
7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 7404 7405
FD03 FD05

3B18
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202
FB04
FB11
2B09

3B30

2B03 3B50
FB07

3C12
3B53
7B26
1M83 1M84
3C15
3B01

2D10
3B34
3B07

3B13

7D02
3B22

7D04

2D11
3D12
3D17
7B50

3D03
2B01

7B07

7C20
FD18
2B04

FB70

7C22
FB40

3D13
2B17

7B51
2B11 3D05 3D10

3D04
FB05 FB06
FB41
3B21 2B50
FB35
2D01 3D15
3B00

7B30 3C11
3D02 7D01 7D03
3B02
2B10
2B02
2B20

FD01 FD02
3D18
2B08
3B11

2B00
3004

7B23 FB30 3B39 FB08


7B20 FB16
FB13
FB10 FB31 FB15
FB03
FB72 FB20
FC02 FC03 FB71
3B57 3C10 3C06
3D11
FD04
FD06
3D16

3104 313 6421.1

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 94

10-10 B01 820400089943 Tuner, HDMI & CI


Common Interface

Common Interface
B01A B01A
1 2 3 4 5 6 7 8 9 10 11 1P00-A D10
1P00-B G10
2F00 A6
+3V3
3F06
2F01 A2
3F01 CA-RST 100K
2F00
+5V +5VCA TRANSPORT STREAM FROM CAM
7F00
RES
CA-CD1n 4 3F07-4 5
2F02 B6
+T 0R4 100n

20
22u 16V
74LVC245A 10K
2 3F07-2 7
2F03 D6
2F01

1 CA-CD2n
3EN1
3EN2 3F07-3
10K
2F04 E6
RES

19 CA-DATAENn 3 6
A IF01
G3
10K
+3V3
A
CA-MOCLK
3F02
2
1
18 MOCLK CA-DATADIR 1
3F07-1
8 2F05 G6
100R IF02 2 10K
3F03-1
CA-MOVAL
CA-MOSTRT 3F03-2 2 7
1 8
100R
3
4
17
16
MOVAL
MOSTRT CA-ADDENn 1 3F08-1 8
2F06 H6
100R IF03 5
6
15
14 MOCLK
10K
2 3F08-2 7 3F01 A2
7 13 10K
8 12 MOVAL 3 3F08-3 6 3F02 A4
9 11 10K
MOSTRT 4 3F08-4 5 3F03-1 A4

10
10K

MDO0 1 3F09-1 8
3F03-2 A4
B +3V3 10K
2 3F09-2 7
B 3F04-1 C4
2F02 MDO1
RES 10K
7F01 100n MDO2 3 3F09-3 6 3F04-2 C4

20
74LVC245A 10K
1
3EN1 MDO3 4 3F09-4 5
10K
IF04
3F04-3 C4
3EN2

IF05
19
G3
MDO4 1
3F10-1
8
3F04-4 C4
3F04-1 1 8 100R 2 18
CA-MDO0
IF06 2
1 MDO0
MDO5 2
10K
3F10-2
7 3F05-1 C4
CA-MDO1 3F04-2 2 7 100R 3 17 MDO1 10K
CA-MDO2 3F04-3 3 6 100R
3F04-4 4 5 100R
4
5
16
15
MDO2 MDO6 3 3F10-3 6 3F05-2 C4
CA-MDO3 MDO3 10K
C CA-MDO4 3F05-1 1 8 100R
3F05-2 2 7 100R
6
7
14
13
MDO4 MDO7 4 3F10-4 5
10K
C 3F05-3 C4
CA-MDO5 MDO5
CA-MDO6
CA-MDO7
3F05-3 3 6 100R
3F05-4 4 5 100R
8
9
12
11
MDO6
MDO7
3F12
3F05-4 C4
CA-RDY
IF07 +3V3
3F06 A9

10
10K
CA-WAITn 2 3F11-2 7

+3V3 CA-INPACKn 3 3F11-3


10K
6 IF08
3F07-1 A9
+5VCA

15-BIT ADDRESS
2F03
RES CA-WP
10K
4 3F11-4 5
3F07-2 A9
7F02 100n 3F11-1
10K
3F07-3 A9

20
74LVC245A CA-VS1n 8 1 +3V3 ROW_A
1 10K 1P00-A
D 3EN1
3EN2
GND1
1 D 3F07-4 A9
19 CA-ADDENn CA-D03 D3
G3 2

XIO-A00 18 2 CA-A00
CA-D04
CA-D05
D4
D5
3 3F08-1 A9
1 4

XIO-A01 17
2
3 CA-A01
CA-D06
CA-D07
D6
D7
5
6
3F08-2 A9
16 4 CE1
XIO-A02
XIO-A03 15 5
CA-A02
CA-A03
CA-CE1n
CA-A10 A10
7
8
3F08-3 B9
XIO-A04 14 6 CA-A04 CA-OEn OE
XIO-A05 13
12
7
8
CA-A05 CA-A11 A11
A9
9
10 3F08-4 B9
XIO-A06 CA-A06 CA-A09 11
XIO-A07 11 9 CA-A07 CA-A08
CA-A13
A8
A13
12 3F09-1 B9
13
3F09-2 B9
10

CA-A14 A14
E CA-WEn WE|P
RDY|BSY
14
15 E
CA-RDY
+3V3 +5VCA VCC1
16
17
3F09-3 B9
VPP1

7F03
2F04
RES CA-MIVAL A16
A15
18
19 3F09-4 B9
100n CA-MICLK 20
3F10-1 C9
20

74LVC245A CA-A12 A12


21
1 CA-A07 A7
3EN1 22
3EN2
G3
19 CA-ADDENn
CA-A06
CA-A05
A6
A5
23
24
3F10-2 C9
CA-A04 A4
XIO-A08 18
1
2 CA-A08 CA-A03 A3
25
26
3F10-3 C9
CA-A02 A2
2 27

F XIO-A09
XIO-A10
17
16
3
4
CA-A09
CA-A10
CA-A01
CA-A00
A1
A0
28
F 3F10-4 C9
29
XIO-A11
XIO-A12
15
14
5
6
CA-A11
CA-A12
CA-D00
CA-D01
D0
D1
30 3F11-1 D9
31
13 7 D2
XIO-A13
XIO-A14 12 8
CA-A13
CA-A14
CA-D02
CA-WP WP|IOIS16
32
33
3F11-2 C9
11 9 GND2
70 69
34
3F11-3 D9
10

10074595-050MLF 3F11-4 D9
+3V3
2F05
ROW_B
1P00-B 3F12 C9
8-BIT DATA RES GND3
7F04 CA-CD1n CD1
35 7F00 A5
G 100n 36
G
20

74LVC245A MDO3 D11


3EN1
1 CA-DATADIR MDO4 D12
D13
37
38 7F01 B5
3EN2 MDO5 39
G3
19 CA-DATAENn MDO6
MDO7
D14
D15
40 7F02 D5
41
XIO-D00 18
1
2
2 CA-D00 CA-CE2n
CA-VS1n
CE2
VS1
42
43
7F03 E5
XIO-D01 17 3 CA-D01 CA-IORDn IORD
XIO-D02 16 4 CA-D02 CA-IOWRn IOWR
44
45
7F04 G5
XIO-D03 15 5 CA-D03 CA-MISTRT A17
XIO-D04
XIO-D05
14
13
6
7
CA-D04
CA-D05
CA-MDI0
CA-MDI1
A18
A19
46
47 7F05 I5
48
XIO-D06
XIO-D07
12
11
8
9
CA-D06
CA-D07
CA-MDI2
CA-MDI3
A20
A21
49 IF01 A4
H +5VCA VCC2
50
51 H IF02 A5
10

VPP2
52
CA-MDI4 A22

+3V3
CA-MDI5 A23
A24
53
54
IF03 A4
CA-MDI6 55

CONTROL
2F06
RES
CA-MDI7
MOCLK
A25
VS2
56 IF04 B9
57
7F05 100n CA-RST RESET
58 IF05 C4 1X04 1X01
20

74LVC245A CA-WAITn WAIT


59 REF EMC HOLE REF EMC HOLE
1 INPACK
3EN1
3EN2
CA-INPACKn
CA-REGn REG
60
61
IF06 C5
19 CA-ADDENn MOVAL BVD2|SPKR

18
G3
2
MOSTRT BVD1|STSCHG
D8
62
63 IF07 C5
XIO-D11 CA-REGn MDO0
I 17
1
2
3
MDO1 D9
D10
64
65 I IF08 D9
XIO-D09 CA-CE1n MDO2 66
XIO-D08 16 4 CA-CE2n CA-CD2n CD2
67
XIO-OEn 15 5 CA-OEn GND4
68
XIO-WEn 14 6 CA-WEn 72 71
XIO-D14 13 7 CA-IORDn
XIO-D15 12 8 CA-IOWRn 10074595-050MLF
CA-WAITn 11 9 XIO-D10
10

3 2009-10-22

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Flash

Flash
B01B B01B
1 2 3 4
2F20 A3 3F20-1 B1 3F20-4 C2 3F21-3 C1 3F22-2 C1 3F23 C2 IF21 C3
2F21 A3 3F20-2 B2 3F21-1 C1 3F21-4 C2 3F22-3 C2 3F24 D2 IF22 D3
3F19 D2 3F20-3 B1 3F21-2 C2 3F22-1 C2 3F22-4 C2 7F20 B3 IF23 D3

+3V3
A A

2F20

2F21
100n

100n
7F20

12

37
NAND04GW3B2DN6F

B Φ VCC
1
2 B
[FLASH] 3
4Gx16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
C NAND-CE1n
IF21
25
26
C
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
WE
NAND-WPn IF22 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
3F19

48
10K

D VSS
D
13

36
+3V3

1 2 3 4
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USB Hub

USB Hub
B01C B01C
1F24 E9
1 2 3 4 5 6 7 8 9 1F25 B1
1P07 B9
1P08 D9
2F25 A2
2F26 A2
2F27 A2
2F28 A4
IF44 +5V
2F29 A4
+3V3 2F30 A4

+T 0R4
2F31 A5

3F25
2F25

100n
2F32 A5
FF40 2F33 A5
+5V-USB1
3F26-1 2F34 B1
A 1
100K
A 2F35 B2
IF43 3F26-2 3F25 A8
USB-OC1n 2 7
3F26-1 A8
100K 3F26-2 A8
3F26-3 3F26-3 A8
2F26

2F27

2F28

2F29

2F30

2F31

2F32

2F33
100n

100n

100n

100n

100n

100n
3 6

1u0

1u0
100K 3F26-4 B8
3F26-4 3F28 B2
4 5
3F30 C2
100K 3F31-2 C2
3F28

1M0

+3V3 7F25 3F31-3 C2

14

34

36
23
15

10
29
USB2513B-AEZG 3F31-4 D2

5
1F25
B 1 3 CR PLL
FILT
VDD_3V3 USB-DP 9F25 USB-DP2
B 3F32 C8
24M Φ USB-DM 9F26 USB-DM2
3F34-1 C8
4
2

USB HUB 3F34-2 C8


3F35

2F34

2F35
10K

10p

10p

IF33 IF35
33 13 USB-OC1n SIDE USB BOTTOM 3F34-3 D8
XTALIN|CLKIN OSC1

9F20

9F21
USBDP_DN1|PRT_DIS_P1
2 USB-DP1 3F34-4 D8
IF34
32 1 USB-DM1 1P07 3F35 B1
XTALOUT USBDM_DN1|PRT_DIS_M1
12 +5V-USB1
IF30 BC_EN1|PWRTPWR1 1 3F36 D6
RESET-USBn 26 IF36 USB-DM1 FF34
RESET 2 7F25 B2
17 USB-OC2n USB-DP1 FF35
OSC2 3 9F20 B7
11 4 USB-DP2
TEST USBDP_DN2|PRT_DIS_P2 +5V 4
IF42 USBDM_DN2|PRT_DIS_M2
3 USB-DM2 5 6 9F21 B7
3F31-2
2 7 28 16 9F25 B8
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2
IF37 292303-4
10K 9F26 B8
C USB-DP IF31
IF32
31
DP OSC3
19 USB-OC3n
C FF30 E8

+T 0R4
USB-DM 30 USBUP 7 USB-DP3

3F32
DM USBDP_DN3|PRT_DIS_P3 FF31 E9
+3V3 27 6 USB-DM3
VBUS_DET USBDM_DN3|PRT_DIS_M3
BC_EN3|PWRTPWR3
18 FF32 E9
3F30 IF41 3F34-1 FF33
35 1 +5V-USB2 FF33 C9
RBIAS
12K IF40 8
3F31-3 100K FF34 C7
3 6 22 9
SDA|SMBDATA|NON_REM1 3F34-2 FF35 C7
10K 24 NC 20 USB-OC2n 2 7
3F31-4 IF39 SCL|SMBCLK|CFG_SEL0 FF36 D7
4 5 25 21 100K
HS_IND|CFG_SEL1
10K FF37 D7
3F34-3
3 6 FF38 E9
VIA
GND_HS
3F36 100K FF39 E8
37

38
39
40
41

+3V3 USB-OC3n
4
3F34-4
5 FF40 A8
10K
IF30 C2
D 100K SIDE USB TOP D IF31 C1
1P08 IF32 C1
+5V-USB2 1 IF33 B2
USB-DM2 FF36
2 IF34 B2
USB-DP2 FF37
3 IF35 B5
4 IF45
FF32 5 6 IF36 C5
IF37 C5
292303-4
IF39 D2
IF40 C2
IF41 C2
IF42 C2
E FF39 +5V
FF38
1F24
1
E IF43 A3
IF44 A3
USB-DM3 2
USB-DP3
IF45 D9
3
FF30 4
FF31 5
7 6

502382-0570

1 2 3 4 5 6 7 8 9

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SD Card

SD Card
B01D B01D
1 2 3 4
1P09-1 C4
1P09-2 D4
2F40 A2
3F40 A2
3F41-1 C1
A A 3F41-2 C1
3F40 FF45
3F41-3 C1
+3V3 +3V3-SD
+T
3F41-4 C1
0R4

22u 16V
3F42-1 C1

2F40
3F42-2 D1
3F42-3 D1
3F43-1 C3
3F43-2 C3
3F43-3 C3
B B 3F44-1 C3
+3V3 3F44-2 C3
3F44-3 C3
3F41-2 IF47 3F44-2
3F45 C1
2 7 SDIO-DAT3 SDIO-DAT3 2 7 FF47
1P09-1
FF41 C3
47K 3F41-3 100R 3F43-2
3 6 SDIO-CMD SDIO-CMD 2 7 FF48
1 FF42 C3
47K 100R 2
+3V3-SD 3 FF43 C3
3F45 RES
SDIO-CLK SDIO-CLK 1 3F44-1 8
4 FF44 D3
C 10K 100R
FF49
5
6 C FF45 A2
3F41-1 3F43-3 7
1 8 SDIO-DAT0 SDIO-DAT0 3 6 FF41
8 FF46 C4
47K 3F41-4 100R 3F43-1 9 FF46
4 5 SDIO-DAT1 SDIO-DAT1 1 8 FF42 1314 FF47 C3
1
3F42-1
8
47K
SDIO-DAT2 SDIO-DAT2 3
3F44-3
6
100R
FF43 1939115-1 FF48 C3
47K 100R FF49 C3
FF50 D3
IF46 D1
1P09-2
2
3F42-2
7 SDIO-CDn SDIO-CDn FF44
IF47 B1
D 47K
10
11 D
3F42-3 IF46 12
3 6 SDIO-WP SDIO-WP FF50
1939115-1
47K

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PNX85500 Control

PNX85500 Control
B01E B01E
1 2 3 4 5 6 7 8 9
1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
A A 3F51 B1
+3V3-STANDBY +3V3-STANDBY
3F52 B3
3F53 C6
+3V3-STANDBY
+3V3 +3V3
3F54 D7
+3V3
3F51

100n
2F52

RES
10K

3F58 E1
3F59 E3
3F60 E3

RES
3F66

10K
3F52

10K
3F62 D5
8
7F52
B B

3F67
M25P05-AVMN6
3F63 E5

RES
10K
BACKLIGHT-BOOST
VCC IF50
PNX-SPI-SDI IF51 2
Q Φ D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V
3F64 F5
512K IF52
3F65 F5
6 PNX-SPI-CLK
FLASH C
IF53 3F66 B7

RES
1 PNX-SPI-CSBn
S
IF54
IF55
3F67 B6
3

3F68

47K
W PNX-SPI-WPn BOOST-PWM
7F54-1 RES 3F68 C7
7 BC847BPN(COL) 6
HOLD +3V3-STANDBY
FF29 IF61 7F54-2 RES
3F69 D7
IF56
VSS SPI-PROG BC847BPN(COL)
4 2
7F52 B2
C IF57
1 C 7F53 B7
4

IF62 5
FF04
SDM 7F54-1 C7
3
7F54-2 C7
3F53
9CH0 FF58
7F58 D1
10K RES 9CH0 C7

RES
RES
FF04 C4

2F53

3F69

3F54

RES
1K0
FF29 C4

1u0

10K
+3V3 MAIN NVM FF55 E3
D D FF56 E3
DEBUG ONLY
FF57 E2
IF58 2F58 RES FF61 3F62 100R
1F52 FF58 C7
SCL-SSB 1 SCL
100n
FF62
2
FF61 D4
SDA-SSB SDA
7F58
3F63
3 FF62 D7
8

FF63 100R 4 5
Φ FF63 E4
3F58

10K

(8K×8) 7 FF64 F7
WC
EEPROM 3F59 FF55
FF65 F4
IF59 1 6 SCL-UP-MIPS
0 SCL
2
1 ADR 100R FF56 FF66 F4
E 3
2 SDA
5
3F60
SDA-UP-MIPS E IF50 B3
100R
4

IF51 B1
FF57 IF52 B3
DEBUG / RS232 INTERFACE LEVEL IF53 B3
IF54 C3
SHIFTED
1F51 IF55 C6
FF65 3F64
TXD-UP
FF64
1
FOR IF56 C7
FF66 100R 3F65 2
RXD-UP UP IF57 C7
3
F RESET-STBYn
SPI-PROG
100R
4 DEBUG F IF58 D2
5
7 6
USE ONLY IF59 E1
IF61 C4
IF62 C4

1 2 3 4 5 6 7 8 9

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HDMI & CI

HDMI & CI
B01F B01F
1F75 B5 2F62 B10 2F70 B10 2F75 B8 2F80 B9 2F86 D1 2F93 C2 3F76 C2 3F80 C9 5F71 B9 6F72 C7 9F02 A8 9F71 E4 FF00 B2 FF76 B1 IF12 C9 IF72 C5 IF77 B6 IF82 C4 IF90 D7
1T01 A1 2F63 C9 2F71 A7 2F76 B9 2F81 B1 2F88 E5 2F94 D7 3F77 C4 3F81 C9 5F72 E4 7F70 D8 9F03 A8 AF70 B3 FF01 C4 FF81 C1 IF13 C9 IF73 B6 IF78 B8 IF86 C5
2F59 B1 2F64 C9 2F72 A9 2F77 B9 2F82 B9 2F90 C6 3F71 C7 3F78 C7 3F82 B10 5F73 C5 7F75 A6 9F04 B3 AF71 B3 FF71 A1 FF82 C2 IF14 C9 IF74 B8 IF79 C5 IF87 C2
2F60 B1 2F65 B10 2F73 A9 2F78 B6 2F84 C1 2F91 D6 3F72 C7 3F79-1 B8 5F66 C10 5F74 B10 9F00 A6 9F05 C4 AF72 B9 FF74 B1 IF10 A5 IF15 C9 IF75 B6 IF80 B8 IF88 D2
2F61 B1 2F66 C10 2F74 B6 2F79 B8 2F85 C4 2F92 C7 3F75 D2 3F79-4 B8 5F70 D6 5F76 B10 9F01 A6 9F06 C4 AF73 B9 FF75 B2 IF11 A5 IF16 B10 IF76 B8 IF81 B6 IF89 D5

1 2 3 4 5 6 7 8 9 10

IF10

IF11

A 1T01
TX31XX PNX-IF-P
A
2F71

9F00

9F01

9F02

9F03
FF71 +5V-TUN-PIN
15
TUNER 14
4MHZ_REF 10n

2F72

2F73
15p

1p0
I2C_ADR

I2C_SDA

IF_OUT1

IF_OUT2
RF_AGC

I2C_SCL

7F75
B+_TUN
B+_LNA

1
16 13
RF_IO

UPC3221GV-E1
TUN

NC
AF72

2F65
VCC

15p
IF75 2F74 IF73 2F75 IF76 3F79-1
1F75 2 INPUT1 OUTPUT1 7 IF74 1
10

11

12

2p2 RES
1 4
1

I O1 10n 10n 220R IF16

5F71

2F76

2F77

5F74

2F62

2F70
680n

820n
2 5

22p

10p

1p0
IGND O2 2F78 IF77
3 INPUT2 OUTPUT2 6 IF78
2F79 IF80 3F79-4
AF71 TUN-IF-N 3 4
GND IF81 10n

820R
5F76

3F82
330n
AF70 TUN-IF-P

GND1

GND2
FF74 FF76 220R
B TUN-P1 FF00
9F04 IF-AGC
X7251X
36M17
4 VAGC AGC CONTROL
10n AF73
B
RES
RES

2F80

2F82
15p

1p0
2F81

2F59

2F60

100n

4u7

5
2F61 FF75
4n7

4u7

PNX-IF-N
2F93

100n

IF82 3F77
TUN-P6 FF81 PNX-IF-AGC IF12 IF13
3F80 2F63
TUN-P7 FF82 4K7 IF79 IF-
FF01 220R 10n

5F66

680n

22p
IF-AGC IF72
+5V-TUN-PIN 2F66
+5V-TUN-PIN

3F81 IF14 2F64 IF15

9F05

9F06
IF+
C C

BA591
2F85

3F71

6F72

2F92
4K7

1K0
47n

10n
3F72 220R 10n

IF86 2F90
2F84 3F76 IF87 SCL-TUNER 10n

3F78

3K3
15p 47R 3 5F73 2
TUN-P6 TUN-IF-N

5F70

470n
2F86 3F75 IF88 4 1
SDA-TUNER TUN-IF-P
15p 47R ATB2012 2F91
TUN-P7
10n RES

D IF89
SELECT-SAW
IF90
7F70
D
PDTC114EU

2F94
RES

10n
9F71

E 5F72
+5V-TUN-PIN
E
+5V-TUN
30R RES
2F88

22u

1 2 3 4 5 6 7 8 9 10
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Toshiba Supply

Toshiba Supply
B01G B01G
1 2 3

2FA2 C1
2FA3 C2
2FA4 C3
A A 5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2

+3V3 +1V2-BRA-DR1

+1V2-BRA-VDDC

B B

5FA3

5FA4
30R

30R
7FA3
LD1117DT12
FFAF
3 2
IN OUT
COM
2FA2

2FA3

2FA4
100n

100n

10u
1

FFA2

C C

D D

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HDMI

HDMI
B01H B01H
1P05 B1 3FBF-1 C4 3FBF-2 C4 FFB1 C2 FFB2 C2 FFB3 C2 FFB4 C2 FFB5 C1 FFB6 C2

1 2 3 4

A A

HDMI CONNECTOR SIDE


1P05
1 DRX2+ DIN-5V
2
3 DRX2-

B 4
5
DRX1+
B
6 DRX1-
7 DRX0+
8
9 DRX0-

1 3FBF-1 8
10 DRXC+

47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15 3FBF-2
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 7 DIN-5V
16
17 47K
FFB3
C 18
19 FFB4
DIN-5V
DRX-HOTPLUG C
FFB5 21 20
23 22 FFB6

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VGA

VGA
B01I B01I
1 2 3 4 5 6 7 8 9 1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
1FC4 C4
A A 1FC5 D4
FFC1 3FC5
1FC6 F4
R-VGA
2FC1 B4

CDS4C12GTA
18R
2FC2 B4

2FC1

1FC1

RES 6FC1
100p

12V
2FC3 C4
2FC4 C4
FFC2 3FC6
G-VGA 2FC5 D4
B B

CDS4C12GTA
18R
2FC6 E4

RES 6FC2
2FC2

1FC2
100p

12V
2FC7 E4
1E05 2FC8 F4
1
2 3FC7
3FC1 D3
B-VGA
3
3FC2 E3

CDS4C12GTA
4 FFC3 18R
5
3FC3 C6

RES 6FC3
2FC3

1FC3
100p

12V
6
VGA 7
3FC4 D6
8
CONNECTOR
C 9
10
FFC4 C 3FC5 A6
11
12
FFC5
9FC5 H-SYNC-VGA 3FC6 B6
13
3FC7 C6

RES 6FC4

CDS4C12GTA
14

2FC4

1FC4

3FC3
12V
47p

4K7
15 16 6FC1 B5
17

1216-00D-15S-1EF
FFC6 6FC2 B5
FFC7
6FC3 C5
9FC6 V-SYNC-VGA
6FC4 C5

CDS4C12GTA
D D

RES 6FC5
6FC5 D5
2FC5

1FC5

3FC4
12V
47p

4K7
6FC6 E5
RES
9FC1 VGA-SDA-EDID-HDMI 6FC7 E5
3FC1 FFC8
9FC2 VGA-SDA-EDID 6FC8 F5
RES

CDS4C12GTA
10K
9FC1 D6

6FC6
2FC6

12V
47p

9FC2 E6
9FC3 E6
E RES
3FC2 FFC9
9FC3 VGA-SCL-EDID-HDMI
E 9FC4 E6
9FC4 VGA-SCL-EDID
9FC5 C6

CDS4C12GTA
10K RES

9FC6 D6
2FC7

6FC7

12V
47p

FFC1 A4
FFC2 B4
+5V-VGA FFC3 C4
CDS4C12GTA

FFC4 C3
F
2FC8

1FC6

6FC8

F
12V
47p

FFC5 C4
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 103

Temp Sensor + Headphone

Temp Sensor + Headphone


B01J B01J
1 2 3 4 5 6 7 8 9
1328 D6
1329 C6
1FD2 D4
1FD3 D5
2FD1 A4
2FDC D5
2FDD D5
A A
+3V3
3FD1 A3
3FD2 B5

3FD1

3FD2 RES
1K0
RES 3FD3 B3

2FD1

9FD1

9FD2
100n

1K0
3FD4 B2

LTST-C190KGKT
3FD6 C4

8
RES 7FD1
LM75BDP 3FD7 C4
6FD1

+VS
B 3
OS A0
7 IFD1
B 3FDG-1 D4
IFD2
SDA-SSB
3FD3
1
SDA A1
6 IFD3 3FDG-2 D4
100R IFD4
SCL-SSB
3FD4
2
SCL A2
5 IFD5 6FD1 B3

GND
100R
6FD2 D4

3FD6 RES

3FD7 RES

9FD5
1K0

1K0
6FD3 D5
4 7FD1 B3
9FD1 A4
C C 9FD2 A4
9FD5 C5
1329
FFDA D5
1
2
FFDB D5
5 4
3 FFDC D6
502382-0370 IFD1 B4
IFD2 B3
D FFDA 1328
D IFD3 B4
AMP1 2
AMP2 3 IFD4 B3
1
CDS4C12GTA

CDS4C12GTA FFDB
IFD5 B4
8

FFDC
3FDG-1

3FDG-2

2FDC

2FDD
1FD2

6FD2

1FD3

6FD3
1K0

1K0

12V

12V

1n0

1n0
MSJ-035-29D PPO (PHT)
1

E E

1 2 3 4 5 6 7 8 9

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 104

Tuner Brazil

Tuner Brazil
B01K B01K
1 2 3 4 5 6 7 8 9 10 11 12 13
1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
A A 2FF1 A7
5FE0 IF63 IF64 2FF2 B6
+2V5-BRA +1V2-BRA-VDDC 2FF3 B6
30R
2FF4 B6

2FE0

2FE3

2FE4

2FE5

2FF0

2FF1
100n

100n

100n

100n
1u0

1u0
2FF5 B6

+3V3-BRA-FLT
2FF6 B7
2FF7 C6
AGND 2FF8 C6
5FE3 IF65 IF66 5FE4
+3V3-BRA-FLT
+3V3-BRA 2FF9 C7
30R 30R 2FG0 C6
B B 2FG1 C7

2FE6

2FF2

2FF3

2FF4

2FF5

2FF6
100n

100n

100n

100n
1u0

1u0
2FG2 C1
2FG3 C2
AGND
2FG4 D3
5FE5 IF67 IF68 2FG6 D3
+1V2-BRA-DR1
5FE7 IF48 2FG7 E3
30R
+3V3 +3V3-BRA 2FG8 E3
2FE8

2FF7

2FF8

2FF9
100n

100n
1u0

1u0
30R 2FG9 E3
2FH2 D11
2FH3 D12
C IF69 5FE8
+2V5-BRA C 2FH4 D12
30R 7FE3 2FH5 D6
1FE0 LD3985M25
2FH6 E3

2FG0

2FG1
100n
1 3

1u0
5FE9 FF03
25M4 +5V
1
IN OUT
5 +2V5-BRA 2FH7 E3
30R 2FH8 E7
2FG2

4 2
2FG3

3 4
18p

18p

INH BP
3FE5 E7
COM 3FE6 F3
7FE0
3FE7 F3
32

22

20

16
36
56
63

13
35
49
64

34
DR1VDD 48

43

2FH2

2FH3

2FH4
TC90517FG

1u0

10n

1u0
2
AGND AGND AGND
3FE8 F3
AD_DVDD

AD_AVDD

PLLVDD

DR2VDD
19
VDDC Φ VDDS
21
2FH5
I FIL
AGND 3FE9 F3
D 18
O
X
PBVAL
58
1n5
3FG6-4 4 5 33R TS-FE-VALID D 3FG2-1 F6
3 53
DFE6
4 9F27-4 5
3FG2-2 F7
0 RERR TS-DVBS-VALID
2 XSEL 3FG4-1 F7
1 DFE7
RLOCK
54 3FG4-2 F6
IF+ 2FG4 10n IF17 30
IF- 2FG6 10n IF18 29
P
ADI_AI 55
DFE8
2 9F27-2 7 TS-DVBS-SOP
3FG6-2 E7
N RSEORF
3FG6-3 E7
2FG7 100n BFE1 28 59 3FG6-3 3 6 33R
P SBYTE TS-FE-SOP 3FG6-4 D7
2FG8 100n BFE2 27 ADQ_AI
N DFE9
52 9F28 TS-DVBS-CLOCK 5FG0
3FG7 E7
AGND BFE3 SLOCK
2FG9 100n 24 5FE0 A3
BFE4 P
2FH6 100n 25 AD_VREF 61 3FG7 33R TS-FE-CLOCK
N SRCK 30R 5FE3 B3
E AGND
2FH7 100n BFE5 26
AD_VREF SRDT
60 3FG6-2 2 7 33R TS-FE-DATA 5FG2 E 5FE4 B7
39 38
DFF1
1 9F27-1 8
5FE5 B3
AGND DTCLK STSFLG1 TS-DVBS-DATA 30R
IF27 IF28 5FE7 C11
3FE5 AGND
40 9 IF-AGC 5FE8 C7
+3V3-BRA-FLT DTMB AGCCNTI
18K 5FE9 C11

2FH8
8 10

10n
S_INFO AGCCNTR
DFF2 5FG0 E11
3FE6 10K 1 51
41
0
TSMD
STSFLG0 5FG2 E11
1
SYRSTN
42 7FE0 D4
3FE7 10K IF29 7 7FE3 C11
AGCI 3FG2-1
6 RESET-SYSTEMn
11 SLADRS
0
5 10K 3FG2-2 9F27-1 E8
F CKI 1
3FG4-2
10K F 9F27-2 D8
AD_DVSS
AD_AVSS

SCL-SSB 3FE8 100R IF49 45 12


SCL SCL 9F27-4 D8
PLLVSS

SDA-SSB 3FE9 100R 46 TN 14 4K7 3FG4-1


SDA SDA +3V3-BRA-FLT
4K7 9F28 E8
VSS
BFE1 E4
23

31

17

4
15
33
37
44
47
50
57
62

BFE2 E4
BFE3 E4
BFE4 E4
AGND AGND
BFE5 E4
DFE6 D6
DFE7 D6
G G DFE8 D6
DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
H H IF48 C12
IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6
1 2 3 4 5 6 7 8 9 10 11 12 13

3 2009-10-22

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10-11 B01 820400089945 Tuner, HDMI & CI


Common Interface

Common Interface
B01A B01A
1 2 3 4 5 6 7 8 9 10 11
1P00-A D10
1P00-B G10
+3V3
3F06
2F00 A6
CA-RST 100K
+5V
3F01
+5VCA TRANSPORT STREAM FROM CAM
2F00
RES 2F01 A2
CA-CD1n 4 3F07-4 5
+T 0R4 7F00 100n 2F02 B6

20
22u 16V 74LVC245A 10K
2 3F07-2 7
2F01

1
3EN1 CA-CD2n
10K
2F03 D6
3EN2 3F07-3
2F04 E6
RES

19 CA-DATAENn 3 6
A 3F02 IF01
G3
3F07-1
10K
+3V3
A
CA-MOCLK 2
1
18 MOCLK CA-DATADIR 1 8 2F05 G6
100R IF02 2 10K
3F03-1
CA-MOVAL 1 8 3 17 MOVAL 2F06 H6
CA-MOSTRT 3F03-2 2 7 100R 4 16 MOSTRT CA-ADDENn 1 3F08-1 8
100R IF03 5 15 10K 3F01 A2
6 14 MOCLK 2 3F08-2 7
7 13 10K 3F02 A4
8 12 MOVAL 3 3F08-3 6
9 11 10K 3F03-1 A4
4 3F08-4 5
MOSTRT
3F03-2 A4

10
10K

MDO0 1 3F09-1 8
3F04-1 C4
B +3V3 10K
2 3F09-2 7
B 3F04-2 C4
2F02 MDO1
RES 10K
3 3F09-3 6
3F04-3 C4
7F01 100n MDO2
3F04-4 C4

20
74LVC245A 10K
1 MDO3 4 3F09-4 5 IF04
3EN1
3EN2 10K 3F05-1 C4
19
IF05
G3
MDO4 1
3F10-1
8 3F05-2 C4
CA-MDO0 3F04-1 1 8 100R 2 18 MDO0 10K
IF06 2
1
MDO5 2
3F10-2
7 3F05-3 C4
3F04-2 2 7 100R 3 17
CA-MDO1
CA-MDO2 3F04-3 3 6 100R 4 16
MDO1
MDO2 MDO6
10K
3 3F10-3 6 3F05-4 C4
C CA-MDO3
CA-MDO4 3F05-1 1
3F04-4
8 100R
4 5 100R 5
6
15
14
MDO3
MDO4 MDO7
10K
4 3F10-4 5 C 3F06 A9
CA-MDO5
CA-MDO6 3F05-3 3
3F05-2
6 100R
2 7 100R 7
8
13
12
MDO5
MDO6
10K 3F07-1 A9
CA-MDO7 3F05-4 4 5 100R 9 11 MDO7
3F12 3F07-2 A9
IF07 CA-RDY +3V3
3F07-3 A9

10
10K
CA-WAITn 2 3F11-2 7

3F11-3
10K
IF08
3F07-4 A9
+3V3 CA-INPACKn 3 6
2F03 10K
+5VCA
3F08-1 A9
15-BIT ADDRESS RES CA-WP 4 3F11-4 5
7F02 10K 3F08-2 A9
100n 3F11-1

20
74LVC245A 8 1
1
CA-VS1n
10K
+3V3 ROW_A
1P00-A
3F08-3 B9
D 3EN1
3EN2
19
GND1
D3
1 D 3F08-4 B9
G3 CA-ADDENn CA-D03 2
18 2
CA-D04 D4
D5
3 3F09-1 B9
XIO-A00 1 CA-A00 CA-D05 4
2 CA-D06 D6
5 3F09-2 B9
XIO-A01 17 3 CA-A01 CA-D07 D7
6
XIO-A02 16 4 CA-A02 CA-CE1n CE1
7
3F09-3 B9
XIO-A03 15 5 CA-A03 CA-A10 A10
XIO-A04 14 6 CA-A04 CA-OEn OE
8
9
3F09-4 B9
XIO-A05 13 7 CA-A05 CA-A11 A11
XIO-A06 12 8 CA-A06 CA-A09 A9
10
11
3F10-1 C9
11 9 A8
XIO-A07 CA-A07 CA-A08
CA-A13 A13
12 3F10-2 C9
13
10

E CA-A14
CA-WEn
A14
WE|P
14
E 3F10-3 C9
15
+3V3
CA-RDY RDY|BSY
VCC1
16 3F10-4 C9
+5VCA 17
2F04
RES
VPP1
A16
18 3F11-1 D9
CA-MIVAL 19
7F03 100n CA-MICLK A15
20 3F11-2 C9
20

74LVC245A CA-A12 A12


3EN1
1 CA-A07 A7
21
22
3F11-3 D9
CA-A06 A6
3EN2
G3
19 CA-ADDENn CA-A05 A5
23
24
3F11-4 D9
CA-A04 A4
XIO-A08 18
1
2 CA-A08 CA-A03 A3
25
26
3F12 C9
A2
XIO-A09 17
2
3 CA-A09
CA-A02
CA-A01 A1
27 7F00 A5
F XIO-A10 16
15
4
5
CA-A10 CA-A00 A0
D0
28
29 F 7F01 B5
XIO-A11 CA-A11 CA-D00 30
XIO-A12 14
13
6
7
CA-A12 CA-D01 D1
D2
31 7F02 D5
XIO-A13 CA-A13 CA-D02 32
XIO-A14 12
11
8
9
CA-A14 CA-WP WP|IOIS16
GND2
33 7F03 E5
34
70 69 7F04 G5
10

10074595-050MLF 7F05 I5
+3V3 ROW_B IF01 A4
1P00-B
8-BIT DATA
2F05
RES GND3 IF02 A5
35
CD1
G 7F04
100n CA-CD1n 36
G IF03 A4
20

74LVC245A MDO3 D11


37
3EN1
1 CA-DATADIR MDO4
MDO5
D12
D13
38 IF04 B9
3EN2 39
G3
19 CA-DATAENn MDO6 D14
D15
40 IF05 C4
MDO7 41
XIO-D00 18
1
2 CA-D00 CA-CE2n CE2
42 IF06 C5
CA-VS1n VS1
XIO-D01 17
2
3 CA-D01 CA-IORDn IORD
43
44
IF07 C5
XIO-D02 16 4 CA-D02 CA-IOWRn IOWR
XIO-D03 15 5 CA-D03 CA-MISTRT A17
45
46
IF08 D9
XIO-D04 14 6 CA-D04 CA-MDI0 A18
47
XIO-D05 13 7 CA-D05 CA-MDI1 A19
48
XIO-D06 12 8 CA-D06 CA-MDI2 A20
49
XIO-D07 11 9 CA-D07 CA-MDI3 A21
H +5VCA VCC2
50
51 H
10

VPP2
52
CA-MDI4 A22
53
CA-MDI5 A23
54
+3V3 CA-MDI6 A24
55
CA-MDI7 A25
2F06 56 1X04 1X01
CONTROL RES MOCLK VS2
57 REF EMC HOLE REF EMC HOLE
7F05 CA-RST RESET
100n 58
20

74LVC245A CA-WAITn WAIT


59
1 CA-INPACKn INPACK
3EN1 60
CA-REGn REG
3EN2 61
19 CA-ADDENn MOVAL BVD2|SPKR
G3 62
MOSTRT BVD1|STSCHG
63
XIO-D11 18 2 CA-REGn MDO0 D8
I 17
1
2
3
MDO1 D9
D10
64
65 I
XIO-D09 CA-CE1n MDO2 66
XIO-D08 16 4 CA-CE2n CA-CD2n CD2
67
XIO-OEn 15 5 CA-OEn GND4
68
XIO-WEn 14 6 CA-WEn 72 71
XIO-D14 13 7 CA-IORDn
XIO-D15 12 8 CA-IOWRn 10074595-050MLF
CA-WAITn 11 9 XIO-D10
10

5 2010 -03-13

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 106

Flash

Flash
B01B B01B
1 2 3 4

+3V3
A A

2F20

2F21
100n

100n
7F20

12

37
NAND04GW3B2DN6F

B Φ VCC
1
2 B
[FLASH] 3
4Gx16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
C NAND-CE1n
IF21
25
26
C
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
WE
NAND-WPn IF22 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
3F19

48
10K

D VSS
D
13

36
+3V3

1 2 3 4
2F20 A3 3F20-1 B1 3F20-4 C2 3F21-3 C1 3F22-2 C1 3F23 C2 IF21 C3
2F21 A3 3F20-2 B2 3F21-1 C1 3F21-4 C2 3F22-3 C2 3F24 D2 IF22 D3 5 2010-03-12

TUNER, HDMI & CI


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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 107

USB Hub

USB Hub
B01C B01C
1 2 3 4 5 6 7 8 9
1F24 E9
1F25 B1
1P07 B9
1P08 D9
2F25 A2
IF44 +5V 2F26 A2
+3V3 2F27 A2

+T 0R4
2F28 A4

3F25
2F25

100n
2F29 A4
FF40 2F30 A4
+5V-USB1
3F26-1
A 1
100K
A 2F31 A5
2F32 A5
IF43 3F26-2
USB-OC1n 2 7 2F33 A5
100K 2F34 B1
3F26-3 2F35 B2

2F26

2F27

2F28

2F29

2F30

2F31

2F32

2F33
100n

100n

100n

100n

100n

100n
3 6

1u0

1u0
100K
3F25 A8
3F26-4 3F26-1 A8
4 5
3F26-2 A8
100K
3F26-3 A8
3F28

1M0

+3V3 7F25 3F26-4 B8

14

34

36
23
15

10
29
USB2513B-AEZG

5
1F25 3F28 B2
B 1 3 CR PLL
FILT
VDD_3V3 USB-DP 9F25 USB-DP2
B 3F30 C2
24M Φ USB-DM 9F26 USB-DM2 3F31-2 C2
4
2

USB HUB
3F35

2F34

2F35
10K

10p

10p

IF33 IF35 3F31-3 C2


33 13 USB-OC1n SIDE USB BOTTOM
XTALIN|CLKIN OSC1 3F31-4 D2

9F20

9F21
2 USB-DP1
IF34 USBDP_DN1|PRT_DIS_P1
32
XTALOUT USBDM_DN1|PRT_DIS_M1
1 USB-DM1 1P07 3F32 C8
12 +5V-USB1
IF30
26
BC_EN1|PWRTPWR1
FF34
1 3F34-1 C8
RESET-USBn RESET IF36 USB-DM1 2
17 USB-OC2n USB-DP1 FF35 3F34-2 C8
OSC2 3
11
TEST USBDP_DN2|PRT_DIS_P2
4 USB-DP2 4 3F34-3 D8
3 USB-DM2 +5V 5 6
2
3F31-2
7
IF42
28
USBDM_DN2|PRT_DIS_M2
16
3F34-4 D8
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2 3F35 B1
10K IF37 292303-4

C USB-DP IF31
IF32
31
DP OSC3
19 USB-OC3n
C 3F36 D6

+T 0R4
USB-DM 30 USBUP 7 USB-DP3 7F25 B2

3F32
DM USBDP_DN3|PRT_DIS_P3
+3V3 27 6 USB-DM3
VBUS_DET USBDM_DN3|PRT_DIS_M3 9F20 B7
18
3F30 IF41 BC_EN3|PWRTPWR3 3F34-1 FF33
35
RBIAS
1 +5V-USB2 9F21 B7
12K IF40 8
3
3F31-3
6 22 9
100K 9F25 B8
SDA|SMBDATA|NON_REM1 3F34-2 9F26 B8
10K 24 NC 20 USB-OC2n 2 7
3F31-4 IF39 SCL|SMBCLK|CFG_SEL0
4 5 25
HS_IND|CFG_SEL1
21 100K FF30 E8
10K
3
3F34-3
6
FF31 E9
VIA FF32 E9
GND_HS 100K
3F36
FF33 C9
37

38
39
40
41

+3V3 USB-OC3n
3F34-4
4 5
10K FF34 C7
D 100K SIDE USB TOP D FF35 C7
1P08 FF36 D7
FF36
+5V-USB2 1 FF37 D7
USB-DM2 2
USB-DP2 FF37 FF38 E9
3
4 IF45 FF39 E8
FF32 5 6
FF40 A8
292303-4 IF30 C2
IF31 C1
IF32 C1
IF33 B2
E FF39 +5V
FF38
1F24
1
E IF34 B2
IF35 B5
USB-DM3 2
USB-DP3 IF36 C5
3
FF30 4
IF37 C5
FF31 5 IF39 D2
7 6
IF40 C2
502382-0570 IF41 C2
IF42 C2
IF43 A3
IF44 A3
IF45 D9

1 2 3 4 5 6 7 8 9

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SD Card

SD Card
B01D B01D
1 2 3 4

A A
3F40 FF45
+3V3 +3V3-SD
+T 0R4

22u 16V
2F40

B B
+3V3

3F41-2 IF47 3F44-2


2 7 SDIO-DAT3 SDIO-DAT3 2 7 FF47
1P09-1
47K 3F41-3 100R 3F43-2
3 6 SDIO-CMD SDIO-CMD 2 7 FF48
1
47K 100R 2
+3V3-SD 3
3F45 RES 4
SDIO-CLK SDIO-CLK 1 3F44-1 8
C 10K 100R
FF49
5
6 C
3F41-1 3F43-3 7
1 8 SDIO-DAT0 SDIO-DAT0 3 6 FF41
8
47K 3F41-4 100R 3F43-1 9 FF46
4 5 SDIO-DAT1 SDIO-DAT1 1 8 FF42 1314
3F42-1 47K 3F44-3 100R
1 8 SDIO-DAT2 SDIO-DAT2 3 6 FF43 1939115-1
47K 100R

1P09-2
3F42-2 FF44
2 7 SDIO-CDn SDIO-CDn
D 47K
10
11 D
3F42-3 IF46 12
3 6 SDIO-WP SDIO-WP FF50
1939115-1
47K

1 2 3 4
1P09-1 C4 3F41-1 C1 3F42-1 C1 3F43-2 C3 3F44-3 C3 FF43 C3 FF47 C3 IF46 D1
1P09-2 D4 3F41-2 C1 3F42-2 D1 3F43-3 C3 3F45 C1 FF44 D3 FF48 C3 IF47 B1
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 109

PNX85500 Control

PNX85500 Control
B01E B01E
1 2 3 4 5 6 7 8 9
1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
A A 3F51 B1
+3V3-STANDBY +3V3-STANDBY
3F52 B3
3F53 C6
+3V3-STANDBY
+3V3 +3V3 +3V3 3F54 D7
3F51

100n
2F52

RES
10K

3F58 E1
3F59 E3

RES
3F66

10K
3F60 E3

3F52

10K
8

7F52 3F62 D5
B B

3F67
M25P05-AVMN6

RES
10K
BACKLIGHT-BOOST
VCC IF50 3F63 E5
PNX-SPI-SDI IF51 2
Q Φ D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V
3F64 F5
512K IF52
6 PNX-SPI-CLK
FLASH C 3F65 F5
IF53

RES
1
S
IF54
PNX-SPI-CSBn
3F66 B7
3 IF55
3F67 B6

3F68

47K
W PNX-SPI-WPn BOOST-PWM
7F54-1 RES
HOLD
7
+3V3-STANDBY
BC847BPN(COL) 6 3F68 C7
IF61 7F54-2 RES
VSS
FF29
SPI-PROG BC847BPN(COL)
IF56 3F69 D7
4 2
7F52 B2
C IF57
1 C
4

FF04 IF62 5 7F53 B7


SDM
3 7F54-1 C7
7F54-2 C7
3F53 FF58
9CH0
RES
7F58 D1
10K

RES
RES
9CH0 C7

2F53

3F69

3F54

RES
1K0
FF04 C4

1u0

10K
MAIN NVM FF29 C4
+3V3
FF55 E3
D DEBUG ONLY D FF56 E3
IF58 2F58 RES FF61 3F62
1F52 FF57 E2
SCL-SSB 100R

100n
FF62
1
2
SCL FF58 C7
7F58 SDA-SSB
3F63
3 SDA FF61 D4
8

FF63 100R 4 5
Φ FF62 D7
3F58

10K

(8K × 8) 7 FF63 E4
WC
EEPROM 3F59 FF55 FF64 F7
IF59 1 6 SCL-UP-MIPS
0 SCL
2
1 ADR 100R FF56 FF65 F4
E 3
2 SDA
5
3F60
SDA-UP-MIPS E FF66 F4
100R
4

IF50 B3
FF57 IF51 B1
DEBUG / RS232 INTERFACE LEVEL IF52 B3
IF53 B3
SHIFTED
FF65 3F64
1F51 IF54 C3
TXD-UP
100R FF64
1
FOR IF55 C6
FF66 3F65 2 UP
RXD-UP 3 IF56 C7
F RESET-STBYn
SPI-PROG
100R
4 DEBUG F IF57 C7
5
7 6
USE ONLY IF58 D2
IF59 E1
IF61 C4
IF62 C4
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HDMI & CI

HDMI & CI
B01F B01F
1 2 3 4 5 6 7 8 9 10

IF10

IF11

A TH2603
1T01
PNX-IF-P
A
2F71

9F00

9F01

9F02

9F03
FF71 +5V-TUN-PIN
RF-IN 15 14 10n

2F72

2F73
15p

1p0
IF_OUT1
IF_OUT2
RF_AGC
7F75

1
16 13 UPC3221GV-E1

4Mhz
SDA
NC1

NC2

NC3
SCL

+5V
DC

AS

AF72

2F65
VCC

15p
IF75 2F74 IF73 2F75 IF76 3F79-1
1F75 2 INPUT1 OUTPUT1 7 IF74 1
10
11
12

2p2 RES
1 4
1
2
3
4
5
6
7
8
9
I O1 10n 10n 220R IF16

5F71

2F76

2F77

5F74

2F62

2F70
680n

820n
2 5

22p

10p

1p0
IGND O2 2F78 IF77
3 INPUT2 OUTPUT2 6 IF78
TUN-P1 2F79 IF80 3F79-4
AF71 TUN-IF-N 3 4
GND IF81 10n

820R
5F76

3F82
330n
AF70 TUN-IF-P

GND1

GND2
FF74 FF76 220R
B FF00
9F04 IF-AGC
X7251X
36M17
4 VAGC AGC CONTROL
10n AF73
B
RES
RES

2F80

2F82
15p

1p0
2F81

2F59

2F60

100n

4u7

5
2F61 FF75
4n7

4u7

PNX-IF-N
2F93

100n

IF82 3F77
TUN-P6 FF81 PNX-IF-AGC IF12 IF13
3F80 2F63
TUN-P7 FF82 4K7 IF79 IF-
FF01 220R 10n

5F66

680n

22p
IF-AGC IF72
+5V-TUN-PIN 2F66
+5V-TUN-PIN

3F81 IF14 2F64 IF15

9F05

9F06
IF+
C C

BA591
2F85

3F71

6F72

2F92
4K7

1K0
47n

10n
3F72 220R 10n

IF86 2F90
2F84 3F76 IF87 SCL-TUNER 10n

3F78

3K3
15p 47R 3 5F73 2
TUN-P6 TUN-IF-N

5F70

470n
2F86 3F75 IF88 4 1
SDA-TUNER TUN-IF-P
15p 47R ATB2012 2F91
TUN-P7
10n RES

D IF89
SELECT-SAW
IF90
7F70
D
PDTC114EU

2F94
RES

10n
9F71

E 5F72
+5V-TUN-PIN
E
+5V-TUN
30R RES
2F88

22u

1 2 3 4 5 6 7 8 9 10
1F75 B5 2F62 B10 2F70 B10 2F75 B8 2F80 B9 2F86 D1 2F93 C2 3F76 C2 3F80 C9 5F71 B9 6F72 C7 9F02 A8 9F71 E4 FF00 B2 FF76 B1 IF12 C9 IF72 C5 IF77 B6 IF82 C4 IF90 D7
1T01 A1 2F63 C9 2F71 A7 2F76 B9 2F81 B1 2F88 E5 2F94 D7 3F77 C4 3F81 C9 5F72 E4 7F70 D8 9F03 A8 AF70 B3 FF01 C4 FF81 C1 IF13 C9 IF73 B6 IF78 B8 IF86 C5
2F59 B1 2F64 C9 2F72 A9 2F77 B9 2F82 B9 2F90 C6 3F71 C7 3F78 C7 3F82 B10 5F73 C5 7F75 A6 9F04 B3 AF71 B3 FF71 A1 FF82 C2 IF14 C9 IF74 B8 IF79 C5 IF87 C2
2F60 B1 2F65 B10 2F73 A9 2F78 B6 2F84 C1 2F91 D6 3F72 C7 3F79-1 B8 5F66 C10 5F74 B10 9F00 A6 9F05 C4 AF72 B9 FF74 B1 IF10 A5 IF15 C9 IF75 B6 IF80 B8 IF88 D2
2F61 B1 2F66 C10 2F74 B6 2F79 B8 2F85 C4 2F92 C7 3F75 D2 3F79-4 B8 5F70 D6 5F76 B10 9F01 A6 9F06 C4 AF73 B9 FF75 B2 IF11 A5 IF16 B10 IF76 B8 IF81 B6 IF89 D5

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Toshiba Supply

Toshiba Supply
B01G B01G
1 2 3
2FA2 C1
2FA3 C2
2FA4 C3
5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2
A A

+3V3 +1V2-BRA-DR1

+1V2-BRA-VDDC

B B

5FA3

5FA4
30R

30R
7FA3
LD1117DT12
FFAF
3 2
IN OUT
COM
2FA2

2FA3

2FA4
100n

100n

10u
1

FFA2

C C

D D

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HDMI

HDMI
B01H B01H
1 2 3 4

A A

HDMI CONNECTOR SIDE


1P05
1 DRX2+ DIN-5V
2
3 DRX2-

B 4
5
DRX1+
B
6 DRX1-
7 DRX0+
8
9 DRX0-

1 3FBF-1 8
10 DRXC+

47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15 3FBF-2
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 7 DIN-5V
16
17 47K
FFB3
C 18
19 FFB4
DIN-5V
DRX-HOTPLUG C
FFB5 21 20
23 22 FFB6

1 2 3 4
5 2010-03-12

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VGA

VGA
B01I B01I
1 2 3 4 5 6 7 8 9
1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
A A 1FC4 C4
1FC5 D4
FFC1 3FC5
R-VGA 1FC6 F4

CDS4C12GTA
18R
2FC1 B4

2FC1

1FC1

RES 6FC1
100p

12V
2FC2 B4
2FC3 C4
FFC2 3FC6
2FC4 C4
G-VGA
B B 2FC5 D4

CDS4C12GTA
18R

2FC6 E4

RES 6FC2
2FC2

1FC2
100p

12V
2FC7 E4
1E05
1
2FC8 F4
2
3
3FC7
B-VGA 3FC1 D3

CDS4C12GTA
4
5
FFC3 18R
3FC2 E3

RES 6FC3
2FC3

1FC3
100p

12V
VGA
6
7
3FC3 C6
CONNECTOR 8 3FC4 D6
C 9
10
FFC4 C 3FC5 A6
11 FFC5
12
9FC5 H-SYNC-VGA
3FC6 B6
13
3FC7 C6

RES 6FC4

CDS4C12GTA
14

2FC4

1FC4

3FC3
12V
47p

4K7
15
17
16
6FC1 B5
FFC6
1216-00D-15S-1EF 6FC2 B5
FFC7
V-SYNC-VGA
6FC3 C5
9FC6
6FC4 C5

CDS4C12GTA
D D

RES 6FC5
6FC5 D5
2FC5

1FC5

3FC4
12V
47p

4K7
6FC6 E5
RES
9FC1 VGA-SDA-EDID-HDMI 6FC7 E5
3FC1 FFC8
9FC2 VGA-SDA-EDID 6FC8 F5
RES

CDS4C12GTA
10K
9FC1 D6

6FC6
2FC6

12V
47p

9FC2 E6
9FC3 E6
E RES
3FC2 FFC9
9FC3 VGA-SCL-EDID-HDMI
E 9FC4 E6
9FC4 VGA-SCL-EDID
9FC5 C6
CDS4C12GTA
10K RES
9FC6 D6
2FC7

6FC7

12V
47p

FFC1 A4
FFC2 B4
+5V-VGA
FFC3 C4
FFC4 C3
CDS4C12GTA

F FFC5 C4
2FC8

1FC6

6FC8

F
12V
47p

FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4
1 2 3 4 5 6 7 8 9
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Temp Sensor + Headphone

Temp Sensor + Headphone


B01J B01J
1 2 3 4 5 6 7 8 9
1328 D6
1329 C6
1FD2 D4
1FD3 D5
2FD1 A4
2FDC D5
A A 2FDD D5
+3V3 3FD1 A3
3FD2 B5

3FD1

3FD2 RES
1K0
RES
3FD3 B3

2FD1

9FD1

9FD2
100n

1K0
3FD4 B2

LTST-C190KGKT
3FD6 C4

8
RES 7FD1
LM75BDP 3FD7 C4

6FD1

+VS
B 3
OS A0
7 IFD1
B 3FDG-1 D4
IFD2
SDA-SSB
3FD3
1
SDA A1
6 IFD3 3FDG-2 D4
100R IFD4
SCL-SSB
3FD4
2
SCL A2
5 IFD5 6FD1 B3

GND
100R
6FD2 D4

3FD6 RES

3FD7 RES

9FD5
1K0

1K0
6FD3 D5

4
7FD1 B3
9FD1 A4
9FD2 A4
C C
9FD5 C5
FFDA D5
1329
1
FFDB D5
2 FFDC D6
3
5 4
IFD1 B4
502382-0370
IFD2 B3
IFD3 B4
D FFDA 1328
D IFD4 B3
AMP1 2
3
AMP2
1 IFD5 B4
CDS4C12GTA

CDS4C12GTA
FFDB
8

FFDC
3FDG-1

3FDG-2

2FDC

2FDD
1FD2

6FD2

1FD3

6FD3
1K0

1K0

12V

12V

1n0

1n0
MSJ-035-29D PPO (PHT)
1

E E

1 2 3 4 5 6 7 8 9

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Tuner Brazil

Tuner Brazil
B01K B01K
1 2 3 4 5 6 7 8 9 10 11 12 13 1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
2FF1 A7
2FF2 B6
A A 2FF3 B6
5FE0 IF63 IF64
+2V5-BRA +1V2-BRA-VDDC
2FF4 B6
30R 2FF5 B6
2FF6 B7

2FE0

2FE3

2FE4

2FE5

2FF0

2FF1
100n

100n

100n

100n
1u0

1u0

+3V3-BRA-FLT
2FF7 C6
2FF8 C6
AGND
2FF9 C7
5FE3 IF65 IF66 +3V3-BRA-FLT
5FE4 2FG0 C6
+3V3-BRA
2FG1 C7
30R 30R
2FG2 C1
B B

2FE6

2FF2

2FF3

2FF4

2FF5

2FF6
100n

100n

100n

100n
1u0

1u0
2FG3 C2
2FG4 D3
2FG6 D3
AGND
5FE5 IF67 IF68
2FG7 E3
+1V2-BRA-DR1 2FG8 E3
30R 5FE7 IF48
+3V3-BRA
2FG9 E3
+3V3
2FE8

2FF7

2FF8

2FF9
100n

100n
2FH2 D11
1u0

1u0
30R
2FH3 D12
2FH4 D12
2FH5 D6
C IF69 5FE8
+2V5-BRA C 2FH6 E3
30R 7FE3
1FE0 LD3985M25 2FH7 E3

2FG0

2FG1
100n
1 3

1u0
5FE9 FF03 2FH8 E7
1 5 +2V5-BRA
25M4 +5V IN OUT
30R 3FE5 E7
2FG2

4 2
2FG3

3 4
18p

18p

INH BP 3FE6 F3
COM 3FE7 F3
7FE0 3FE8 F3

32

22

20

16
36
56
63

13
35
49
64

34
DR1VDD 48

43

2FH2

2FH3

2FH4
TC90517FG

1u0

10n

1u0
2
AGND AGND AGND 3FE9 F3
AD_DVDD

AD_AVDD

PLLVDD

DR2VDD
19
VDDC Φ VDDS
21
2FH5
3FG2-1 F6
I FIL
AGND
D 18
O
X
PBVAL
58
1n5
3FG6-4 4 5 33R TS-FE-VALID D 3FG2-2 F7
3FG4-1 F7
DFE6
3 53 4 9F27-4 5 TS-DVBS-VALID
2
0
XSEL
RERR 3FG4-2 F6
1 DFE7
54 3FG6-2 E7
RLOCK
IF+ 2FG4 10n IF17 30 3FG6-3 E7
P DFE8
IF- 2FG6 10n IF18 29 ADI_AI 55 2 9F27-2 7 TS-DVBS-SOP
N RSEORF 3FG6-4 D7
2FG7 100n BFE1 28 59 3FG6-3 3 6 33R 3FG7 E7
P SBYTE TS-FE-SOP
2FG8 100n BFE2 27 ADQ_AI
N
52
DFE9
9F28
5FE0 A3
AGND SLOCK TS-DVBS-CLOCK 5FG0
2FG9 100n BFE3 24
P
5FE3 B3
2FH6 100n BFE4 25 AD_VREF 61 3FG7 33R
N SRCK TS-FE-CLOCK 30R 5FE4 B7
E AGND
2FH7 100n BFE5 26
AD_VREF SRDT
60 3FG6-2 2 7 33R TS-FE-DATA 5FG2 E 5FE5 B3
5FE7 C11
DFF1
39 38 1 9F27-1 8 TS-DVBS-DATA
AGND DTCLK STSFLG1 30R 5FE8 C7
IF27 3FE5 IF28 AGND
+3V3-BRA-FLT
40
DTMB AGCCNTI
9 IF-AGC 5FE9 C11
18K 5FG0 E11

2FH8
8 10

10n
S_INFO AGCCNTR 5FG2 E11
DFF2
3FE6 10K 1
0 STSFLG0
51 7FE0 D4
41 TSMD
1
42 7FE3 C11
SYRSTN
3FE7 10K IF29 7
AGCI
9F27-1 E8
6 3FG2-1 RESET-SYSTEMn
11 SLADRS
0
5 10K 3FG2-2
9F27-2 D8
F CKI 1
3FG4-2
10K F 9F27-4 D8
AD_DVSS
AD_AVSS

SCL-SSB 3FE8 100R IF49 45 12 9F28 E8


SCL SCL
PLLVSS

SDA-SSB 3FE9 100R 46 TN 14 4K7 3FG4-1


SDA SDA
4K7
+3V3-BRA-FLT BFE1 E4
VSS
BFE2 E4
23

31

17

4
15
33
37
44
47
50
57
62

BFE3 E4
BFE4 E4
BFE5 E4
DFE6 D6
AGND AGND
DFE7 D6
DFE8 D6
G G DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
IF48 C12
H H IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6

1 2 3 4 5 6 7 8 9 10 11 12 13

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10-12 B02 820400089505 PNX85500


PNX NandFlash - Conditional Access

PNX NandFlash - Conditional Access


B02A B02A
1 2 3 4 5 6 7 8 9 10 11 12 13 14

3S01-1 E2
3S01-2 E3
3S01-3 E2
A 7S00-5 A 3S01-4 E3
PNX85500

FLASH
00
01
D25
D26
XIO-D00
XIO-D01
3S02-1 E3
C24 XIO-D02

NAND-ALE D22
ALE
02
03
04
D23
C23
XIO-D03
XIO-D04
3S02-2 E2
C21 NAND B23
NAND-CLE

XIO-A00 J25
CLE 05
06
A22
E22
XIO-D05
XIO-D06
XIO-D07
3S02-3 E2
00 07
XIO-A01
XIO-A02
J26
H21
H22
01
02
XIO_D
08
09
F24
F25
F26
XIO-D08
XIO-D09 3S02-4 E3
B XIO-A03 03 10 XIO-D10
B
XIO-A04
XIO-A05
XIO-A06
H23
H24
H25
04
05
11
12
E23
E24
E25
XIO-D11

INPACK INPACK IS26 3S15


3S03 F3
06 13
XIO-A07
XIO-A08
H26
G21
07
08
XIO_A
14
15
E26
D24
XIO-D14
XIO-D15
10K 3S04-1 F3
XIO-A09 G22
09
XIO-A10
XIO-A11
G23
G24
10
11
XIO
OE_
WE_
B22
C22
XIO-OEn
XIO-WEn
3S04-2 F3
XIO-A12 G25
XIO-A13
XIO-A14
G26
F22
12
13
14
CLK_BURST
B21
3S15 B6
XIO-A15 IS25 F23 E21 NAND-CE1n
15 CE1_
CE2_
D21
A20
3S1R F7
C NAND RDY2
F21 C
RDY1
WP_
A21 9S08
NAND-RDY1n
NAND-WPn 3S1S G7
IS00
3S1T G7
3S1U G7
3S23 G7
D D
3S24 G7
3S28 G7
3S29 H7
7S00-11 E3
7S00-11
PNX85500 7S00-5 A4
VIDEO_STREAM
E
CA-MDI0
CA-MDI1
CA-MDI2
3S01-1 8
33R
3S01-3 6 3 33R
1
7 3S01-2 2
P21
P22
P23
0
1
0
1
N26
M21
M22
CA-MDO0
CA-MDO1
CA-MDO2 E 9S00 F5
2 2
33R 5 3S02-4 4
CA-MDI3
CA-MDI4
CA-MDI5
7 3S02-2 2 33R
33R 8 3S02-1 1
P24
P25
P26
3
4
MDI MDO
3
4
M23
M24
M25
CA-MDO3
CA-MDO4
CA-MDO5
9S08 C5
5 5
CA-MDI6
CA-MDI7
6
3S02-3
3 33R
33R 5 3S01-4 4
33R
N21
N22
6
7
6
7
M26
L21
CA-MDO6
CA-MDO7 IS00 C5
CA-ADDENn J22
ADD_EN IS25 C3
CA-DATADIR K25 K23 CA-VS1n

CA-DATAENn K26
DATA_DIR

DATA_EN
VS
1
2
K24 9S00 *
RES
CA-MOCLK
IS26 B6
K21 CA-CD1n
3S03 1
N23 CD K22
F CA-MICLK
10R
I
MCLK
2 CA-CD2n
F
CA-MOCLK L25
O CA
3S04-2 +3V3
CA-MISTRT 7 2 N24
MISTRT
3S04-1 33R
CA-MIVAL 8 1 N25 TS-FE-DATA 3S1R
MIVAL
33R 560R
CA-MOSTRT L22 TS-FE-CLOCK 3S1S
MOSTRT
560R
CA-MOVAL L23 TS-FE-VALID 3S1T 1X06
MOVAL EMC HOLE
560R
J21 TS-FE-SOP 3S1U
OOB_EN
560R
L24
G CA-RDY RDY
TS-FE-DATA
G
CA-RST L26 T21 TS-FE-DATA 3S23
RST DATA
T23 TS-FE-ERR RES 470R
ERR
J23 T22 TS-FE-CLOCK TS-FE-CLOCK 3S24
VCCEN TNR_SER1 MICLK
R23 TS-FE-VALID RES 470R
MIVAL
J24 R22 TS-FE-SOP TS-FE-VALID 3S28
VPPEN SOP
470R
TS-FE-SOP 3S29
470R

H H

1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 117

PNX SDRAM

PNX SDRAM
B02B B02B
1 2 3 4 5 6 7 8 9 10 11

2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
A A 3S06 D3
3S07 D3
3S0V F8
3S20 D2
3S22 D2
3S30 C7
3S33 C8
3S6Q E10
B B 7S00-8 B6
7S00-8
PNX85500
DDR2-BA0 H1
0
MEMORY
0
J1 DDR2-A0
FS01 D3
H2 J3
DDR2-BA1
DDR2-BA2 G1
1 BA 1
K1
DDR2-A1
DDR2-A2
FS02 D2
2 2

DDR2-DQM0 D1 M0
3
G4
L3
DDR2-A3
DDR2-A4
IS42 E8
0 4
DDR2-DQM1 D5 G3 DDR2-A5
1 5
DDR2-DQM2 R3 DM L2 DDR2-A6
2 6
DDR2-DQM3 T5 H5 DDR2-A7
3 7
L1 DDR2-A8
A 8
DDR2-D0 F3 J5 DDR2-A9
0 9
C2 J2
C +1V8
DDR2-D1
DDR2-D3 F2
1
2
10
11
M3
DDR2-A10
DDR2-A11 C
DDR2-D2 C3 J4 DDR2-A12
3 12
DDR2-D6 B4 M2 DDR2-A13
4 13
DDR2-D5 F1 K5 DDR2-A14
5 14
DDR2-D4 C1
6
DDR2-D7 E1 N5 3S30 DDR2-CLK_N
7 N
100u 2.0V

F4 CLK N4 10R 3S33 DDR2-CLK_P


180R 1%

180R 1%

DDR2-D8 8 P
3S20

3S06

2S12

DDR2-D9 B2 10R
9
DDR2-D10 E5 E2 DDR2-DQS0_N
10 N
DDR2-D11 C5 DQS0 E3 DDR2-DQS0_P
FS02 11 P
DDR2-D12 A4
DDR2-VREF-CTRL3 FS01 12
DDR2-D13 G5 D3 DDR2-DQS1_N
DDR2-VREF-CTRL2 13 N
B3 DQS1 D4 DDR2-DQS1_P
180R 1%

DDR2-D14 14 P
3S22

F5
D DDR2-D15
U3
15
DQ R1 DDR2-DQS2_N D
180R 1%

DDR2-D16 16 N
3S07

DDR2-D17 P2 DQS2 R2 DDR2-DQS2_P


17 P
DDR2-D19 U2
18
DDR2-D18 P3 T3 DDR2-DQS3_N
19 N
DDR2-D22 N1 DQS3 T4 DDR2-DQS3_P
20 P
DDR2-D23 U1
21
DDR2-D20 P1 K3 DDR2-CAS
22 CASB 3S6Q
DDR2-D21 T1 K4 DDR2-CKE DDR2-CKE
23 CKE
DDR2-D24 V4 L5 DDR2-CS 10K
24 CSB
DDR2-D30 R5 M4 DDR2-ODT
25 ODT
DDR2-D26 U5 M1
26 PCAL
DDR2-D25 P5 M5 DDR2-RAS
27 RASB
DDR2-D28 N3 H3 DDR2-WE
28 WEB
V3
E DDR2-D31
DDR2-D27 R4
29
30 1
A2 DDR2-VREF-CTRL2
E
DDR2-D29 V5 VREF V1 DDR2-VREF-CTRL3
31 2

IS42

2S20

2S17

1%
2S24

2S25
100p

100n

100n

100p

3S0V

261R
F F

1 2 3 4 5 6 7 8 9 10 11

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 118

PNX Digital Video In

PNX Digital Video In


B02C B02C
1 2 3 4 5 6 7 8 9 10 11 12 13 14

2S2E F5
3S0W E5
7S00-6 D6
A A IS01 E6
IS10 E7

B B

C C

D D
7S00-6
PNX85500

HDMIA-RX2+ T25 HDMI_DV


P
HDMIA-RX2- T26 RX0_A
N

HDMIA-RX1+ U25
P
HDMIA-RX1- U26 RX1_A Y26 DDCA-SCL
N SCL
DDC_A Y25 DDCA-SDA
SDA
HDMIA-RX0+ V25 IS10
P
HDMIA-RX0- V26 RX2_A T24
N HOT_PLUG_A
E HDMIA-RXC+ W25
P
E
HDMIA-RXC- W26 RXC_A
N
+3V3 IS01
3S0W W24
RREF
12K
2S2E

10u

RES

F F

G G

H H

I I

1 2 3 4 5 6 7 8 9 10 11 12 13 14
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PNX Audio

PNX Audio
B02D B02D
1 2 3 4 5 6 7 8 9 10 11 12 13 14

2S2G C12 3S19 H5


2S2H D12 3S25 H9
2S2J G12 3S32 G12
A A 2S2K F12 3S34 G11
2S2L D4 3S36-1 C12
3S0Z
3S53-1 +2V5-AUDIO +24V-AUDIO-POWER 2S2R B7 3S36-2 B11
4R7 +24V-AUDIO-VDD
100R +3V3 2S2S B9 3S36-3 D11
3S53-2
2S2T B8 3S36-4 D12

2S3J

220n
7S08
100R LD3985M25
1
3S12-1
1 3S16-1 8
2S2W 3S53-3 FS08 FS03 2S2V B3 3S37 F11
AUDIO-IN1-L 8 10K 5 1
22K 1u0 100R IS12
OUT IN
IS13 3S14
4 2S2W B3 3S38 B13

RES
4 3 ADAC(1) 12 7S05-4
2
B 3S53-4 BP INH +2V5 LM324 14 3S38
B 2S2Y C3 3S39 C13

2S2R

2S2S
3S16-2 7

10u
2 3S12-2 2S2V 22K +AUDIO-L
AUDIO-IN1-R 7 10K COM IS02 13

10u
100R 100R
2S2Z B3 3S3F E4

2S2T

100n
22K 1u0 11

2S34

100n
2S30 C3 3S3G-1 C7

2
3S16-3 3 6
3S12-3 6 2S2Z
3 10K
AUDIO-IN2-L
2S31 C3 3S3G-2 D8
22K 1u0 10K
2 3S36-2 7
IS0V 4
3S16-4 5 8 3S36-1 1
2S32 D3 3S3G-3 C8
2S2Y 10K
4 3S12-4

100u 4V
2S33 C3 3S3G-4 D7

3S51

2S42

2S41
10K

4R7
5

1u0
AUDIO-IN2-R 2S2G
22K 1u0
4 3S17-4 5
47p 2S34 B9 3S3H D7
3S13-4 IS0R 2S31 7S00-2
AUDIO-IN3-L 10K PNX85500 +24V-AUDIO-VDD 2S36 C6 3S3U D8
C 4
22K
5
3
1u0
AE10 AUDIO AC7
2S36
1
3S3G-1
8 ADAC(1)
C 2S38 E9 3S51 C6
6 L P
3S13-3 3S17-3 AF10 AIN1 ADACL AB7 IS1N
AUDIO-IN3-R 3 6 10K
2S30 R N 1u0 33R
3
3S3G-3
6 ADAC(2) ADAC(2)
IS03
10
4
7S05-3
LM324 8 3S39
2S39 E9 3S53-1 A6
AD10 AC6 -AUDIO-R
22K
3S17-1
1u0
AC10
L
R
AIN2 ADACR
P
N
AB6
33R
9
100R
2S3A E8 3S53-2 B6
1 8
AUDIO-IN4-L
3S13-1
10K
2S33
AE9 AD7 11 2S3B E8 3S53-3 B6
L 1 3S3G-2
1 22K 8 AF9 AIN3 AE7 2 7
1u0 R 2
AF7
ADAC(3)
2S3C E8 3S53-4 B6
2 3 33R
4 3S3G-4 5
AUDIO-IN4-R 2 3S13-2
3S17-2 7
10K
2S32
AD9
AC9
L
AIN4
ADAC
4
AD6
AE6 IS1S 33R
ADAC(4)
2S3D E8 3S6L F12
7 R 5
22K 1u0 AF8
6
AF6
2S3E E3 3S6M H8
L
D 3S10
AE8
R
AIN5
OSCLK
AD4
AD1
3 3S36-3 6
10K
5 3S36-4 4
D 2S3F E2 7S00-2 C5
I2S_OUT SCK 3S3H 10K
2S2L 100R AB9
POS WS
AD2 ADAC(5) 2S2H 2S3G E3 7S05-1 E12
IS1B AB8 VR_AADC 33R
1u0 NEG
IS19 1
AE1
3S3U 47p
2S3H E3 7S05-2 G12
AD8 AF2 ADAC(6)

IS1A
VREF_AADC 2
I2S_OUT_SD 3
AE3
33R
+24V-AUDIO-VDD 2S3J B11 7S05-3 C12
AC8 AF3
3S3F
VCOM_AADC 4 2S3K G6 7S05-4 B12
AF5
SPDIF_OUT 2S3L H8 7S08 B8

2S3D

2S3C

2S3B

2S3A

2S39

2S38
1n0

1n0

1n0

1n0

1n0

1n0
56R DBS8 AE5
SPDIF_IN1 IS07 4 2S3M H9 7S09-1 G6
2S3G
2S3H
2S3E
2S3F

100n

100n

3 7S05-1
10u

10u

ADAC(5)
LM324 1
9S06

AUDIO-OUT-L
2S3Q G5 7S09-2 H6
E 2 E
11 2S41 C6 7S09-3 H7
2S42 C6 7S09-4 I7
3S0Z A11 9S06 E4
3S10 D4 DBS8 E4
3S37 3S6L
3S11 F5 FS03 B12
10K 22K
2S2K
3S12-1 B2 FS08 B7
+3V3 47p
3S12-2 B2 IS02 B11
F +3V3-ARC F 3S12-3 B2 IS03 C11
+24V-AUDIO-VDD
3S12-4 C2 IS06 G11
3S11 IS1L
3S13-1 C2 IS07 E11
1R0
3S13-2 D2 IS0R C2
4
3S13-3 C2 IS0V C2
2S3Q

100n

ADAC(6) 5 7S05-2
LM324 7
IS06 AUDIO-OUT-R
6 3S13-4 C2 IS12 B8
7S09-1
11 3S14 B9 IS13 B9
14

74LVC00APW
G SPDIF-OUT-PNX SPDIF-OUT-PNX
IS1D
1 & 2S3K G 3S16-1 B3 IS19 D3
3 IS1G 1 3S18-1 8 SPDIF-OUT
2
100n 220R
3S16-2 B3 IS1A D3
3S34 3S32

2 3S18-2 7

3 3S18-3 6
+3V3 3S16-3 B3 IS1B D4

220R

220R
7

+3V3 10K 22K


2S2J 3S16-4 C3 IS1D G5
+3V3-ARC 47p 3S17-1 C3 IS1E H5
IS1G G7
3S19

+3V3-ARC
3S17-2 D3
10K

7S09-2
14

74LVC00APW 7S09-3
14

4 &
6
74LVC00APW
9
3S17-3 C3 IS1K H9
& 2S3L 180R IS1K 2S3M IS44
IS1E
SEL-HDMI-ARC 5 8 eHDMI+ 3S17-4 C3 IS1L F5
H +3V3
10
100n 3S6M 100n H 3S18-1 G7 IS1N C7
7

3S18-2 G8 IS1S D7

3S25

68R
3S18-3 G8 IS44 H9
+3V3-ARC

7S09-4
14

74LVC00APW
12 &
11
I +3V3
13 I
7

1 2 3 4 5 6 7 8 9 10 11 12 13 14

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PNX Mips

PNX Mips
B02E B02E
1 2 3 4 5 6 7 8 9 10 11 12 13 14
1F10 A12
2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
+3V3
A 7S00-3
PNX85500 A 3S40 A1
CONTROL 3S45 A1
C25 1 3S56 2 SDA-UP-MIPS SDA-UP-MIPS
3S69 1F10
3S45 IS05
BOOTMODE 1
SDA
C26 100R 1 2 3S57 SCL-UP-MIPS SCL-UP-MIPS 3S6A 4K7 4K7 EJTAG-TRSTn-PNX85500 FS44 3S55 C3
+3V3 SCL 1
10K
Y21 B26 1 3S58 2
100R
3S6B 4K7
EJTAG-TMS-PNX85500 FS49
FS50
2 3S56 A5
BOOTMODE SDA-SET SDA-SET EJTAG-TDO-PNX85500
3S40
GPIO1 GPIO1 Y22
GPIO_0
2
SDA
A25 100R 1 2 3S5W SCL-SET SCL-SET 3S6C 4K7 EJTAG-TCK-PNX85500 FS51
3 FOR FACTORY 3S57 A6
+3V3 GPIO_1 SCL 4
10K RXD1-MIPS Y23
GPIO_2
100R EJTAG-TDI-PNX85500 FS52
5 USE ONLY 3S58 A5
DS52 TXD1-MIPS Y24 B25 1 3S5Y 2 SDA-SSB SDA-SSB 3S6D 2K2
3S82 RES GPIO_3 SDA 3S5Z 6
+3V3 BOOST-PWM RXD2-MIPS W21
W22
GPIO_4
3
SCL
A24 100R 1
100R
2 SCL-SSB SCL-SSB 3S6E 2K2 EJTAG-DETECTn FS53
7 3S5W B6
10K TXD2-MIPS GPIO_5 8
+3V3
3S80 FS10 TXD2-MIPS PNX-SPI-CS-AMBIn W23
GPIO_6 SDA
B24 1 3S60 2 SDA-TUNER SDA-TUNER 3S6F 4K7 10 9 3S5Y B5
3S81 10K FS11 RXD2-MIPS PNX-SPI-CS-BLn V22 4 A23 100R 1 2 3S61 SCL-TUNER SCL-TUNER 3S6G 4K7
+3V3 GPIO_7 SCL 3S5Z B6
B +3V3
3S21
10K
PNX-SPI-CS-AMBIn
BOOST-PWM
SELECT-SAW
V23
U23
GPIO_10
GPIO_11 TRSTN
AA25
100R
EJTAG-TRSTn-PNX85500 EJTAG-TRSTn-PNX85500 3S6K B 3S60 B5
IS04 AA24 EJTAG-TMS-PNX85500 EJTAG-TMS-PNX85500 1 8 3S6H-1 10K +3V3
10K TMS +3V3-STANDBY FS57
3S62 PNX-SPI-CS-BLn
USB-DM R26
DN TCK
AA23 EJTAG-TCK-PNX85500 EJTAG-TCK-PNX85500 10K 3 6 3S6H-3 BM08B-SRSS-TBT 3S61 B6
USB-DP R25 AB26 EJTAG-TDO-PNX85500 EJTAG-TDO-PNX85500 10K 2 7 3S6H-2
+3V3
IS4Z R24 DP USB TDO
AB25 EJTAG-TDI-PNX85500 EJTAG-TDI-PNX85500 10K 4 5 3S6H-4 3S62 B1
10K RREF TDI
AE4 3S00
10K 3S64 C1
RESET_SYS RESET-SYSTEMn
3S55 3S65 E11
5K6
3S64 FS64 33R
SELECT-SAW AD5 BACKLIGHT-PWM
+3V3 BL_PWM 3S66 E11
10K
CLK_54_OUT
AC5 3S67 E11

3S26

3S27
3S6J

10K

10K

10K
3S68 E11
C +3V3
3S83
RXD1-MIPS
C 3S69 A9
10K 3S6A A8
+3V3 +3V3
+3V3
3S84
TXD1-MIPS
3S72 IS40 3S6B A9
PXCLK54
10K 3S6C B8
47R
3S6D B9
3S6E B8
3S6F B9
RES
3S6G B8
D D 3S6H-1 B8
+3V3 3S6H-2 B9
3S6H-3 B9
2S89
3S6H-4 B9
100n +3V3 3S6J C5

3
7S01
PCA9540B
3S6K B9
3S65
VDD SC0 5 SCL-DISP SCL-DISP 2 1 3S72 C6
3S66 4K7 3S80 B1
SC1 8 SCL-BL SCL-BL 2 1
3S67 4K7 3S81 B1
E SCL-SET 1 SCL
INP
I 2 C
-BUS
SD0 4 SDA-DISP SDA-DISP 2 1
3S68 4K7
E 3S82 B1
SDA-SET 2 SDA FIL SD1 7 SDA-BL SDA-BL 2 1
CTRL
4K7 3S83 C1
VSS 3S84 C1
7S00-3 A4

6
FS31
7S00-4 G12
7S01 E8
9S10 F8
9S10 SCL-BL
9S11 F8
IS08
F SCL-SET 9S11 FS2W SCL-DISP
F 9S12 F8
9S12 FS2Y SDA-DISP 9S13 F8
SDA-SET
IS09
9S13 SDA-BL
DS52 B2
FS10 B2
FS11 B2
7S00-4
FS2W F9
PNX85500 FS2Y F9
ETH-RXCLK AA3
RXCLK ETHERNET FS31 F8
FS44 A12
G ETH-RXD(0)
ETH-RXD(1)
Y5
Y6
0
1 TXCLK
AA2 ETH-TXCLK
G FS49 A12
ETH-RXD(2) IS50 AB4 RXD ETH
2
ETH-RXD(3) AC1
3 0
AA1 ETH-TXD(0) FS50 A12
AA4 ETH-TXD(1)
ETH-RXDV AC2 TXD
1
AB1 ETH-TXD(2)
FS51 B12
RXDV 2
ETH-RXER Y4
RXER 3
AB2 ETH-TXD(3) FS52 B12
ETH AA5 ETH-TXEN
TXEN
SDIO-DAT3 W2
CC_DAT3 TXER
AB3 ETH-TXER FS53 B12
SDIO-CLK W1 AC3 ETH-COL
SDIO-CMD W6
CLK COL
Y2 ETH-CRS
FS57 B12
CMD CRS
SDIO-DAT0 W5
0 MDC
Y3 ETH-MDC FS64 C2
SDIO-DAT1 W4 SDIO Y1 ETH-MDIO
1 DAT MDIO
SDIO-DAT2 W3
2
IS04 B2
H SDIO-CDn
SDIO-WP
U6
V6
SDCD
SDWP
H IS05 A2
IS08 F8
IS09 F8
IS40 C6
IS4Z B4
IS50 G12

1 2 3 4 5 6 7 8 9 10 11 12 13 14

5 2009-10-22

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 121

PNX Video Out - LVDS

PNX Video Out - LVDS


B02F B02F
1 2 3 4 5 6 7 8 9 10 11 12 13 14

7S00-7 C8

A A

B B

C 7S00-7
PNX85500 C
PX1A- A7 LVDS D7 PX3A-
N N
PX1A+ B7 A A E7 PX3A+
P P

PX1B- C8 E8 PX3B-
N N
PX1B+ B8 B B D8 PX3B+
P P

PX1CLK- C10 E10 PX3CLK-


N N
PX1CLK+ B10 CLK CLK D10 PX3CLK+
P P

PX1C- A9 LOUT1 LOUT3 D9 PX3C-


N N
PX1C+ B9 C C E9 PX3C+
P P
D PX1D- A11
N N
D11 PX3D- D
PX1D+ B11 D D E11 PX3D+
P P

PX1E- C12 E12 PX3E-


N N
PX1E+ B12 E E D12 PX3E+
P P

PX2A- A14 D14 PX4A-


N N
PX2A+ B14 A A E14 PX4A+
P P

PX2B- C15 E15 PX4B-


N N
PX2B+ B15 B B D15 PX4B+
P P

PX2CLK- C17 E17 PX4CLK-


N N
B17 CLK CLK D17
E PX2CLK+ P
LOUT2 LOUT4
P PX4CLK+
E
PX2C- A16 D16 PX4C-
N
PX2C+ B16 N C E16 PX4C+
C P
P
PX2D- A18 D18 PX4D-
N
PX2D+ B18 N D E18 PX4D+
D P
P
PX2E- C19 E19 PX4E-
N
PX2E+ B19 N E D19 PX4E+
E P
P

F F

G G

1 2 3 4 5 6 7 8 9 10 11 12 13 14

5 2009-10-29

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 122

PNX Stand-by Controller

PNX Stand-by Controller


B02G B02G
1 2 3 4 5 6 7 8 9 10 11 12 13
1S02 B8
2S10 B6
2S11 B5
2S13 B6
2S37 B5
2S4D C3
2S4E E2
A A 2S4F B9

+1V1

POL
2S4G B9
2S4K G10
IS3B 3S1B C2
3S1C C1

5S04
RES

30R
3S1D C2

2S10

100n
1u0
2S13 3S1E C1
2S37 3S1F C2
1u0
3S1G D2

9S24
RES
3S1H D1
B 2S11 B 3S1J D2
100n IS20 3S1K D1
DS50 2S4G
3S1L E2

3
1 10p 3S1P D11

AC17
AA17

AF26

1S02

54M
7S00-9
PNX85500 2S4F
3S2A D2
3S2F D7

VDDA_1V1_DCS

VDDA_ADC2V5

VDD_XTAL
AE17

1
+3V3-STANDBY 2S4D +3V3-STANDBY
3S1B 1n0 RC RC AD19
XTAL_IN 10p 3S2G D7
0
3S1C RES 10K TACHO TACHO AE19
1 XTAL_OUT
AF17 3S2H D7
10K 3S1D CEC-HDMI CEC-HDMI AF19
3S1E RES 27K BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP AA20
2 P1
AA26 RESET-STBYn
3S2K D7
3 RESET_IN
C +3V3-STANDBY
10K 3S1F
10K
SDM SDM AB20
7
STANDBY EA
AB24 EA EA
IS3F 3S44 C 3S2L D10
3S2M E10
3S3L RES LCD-PWR-ONn LCD-PWR-ONn AC20
0 ALE IS3E 10K 3S43
3S3M 10K EJTAG-DETECTn EJTAG-DETECTn AD20
1 ALE
AB23 ALE 3S2S E10
10K 3S3N RES AE20
3S3P 10K
LAMP-ON LAMP-ON
AF20
2
AC26
IS3D
10K 3S42
10K 3S2V F11
STANDBY STANDBY 3 PSEN PSEN PSEN
10K 3S3Q RES FAN-CTRL1 FAN-CTRL1 AA21 P2 3S3L C2
RES 3S3S 4 3S2F 100R RES 3S6V
10K FAN-CTRL2 FAN-CTRL2 AB21 AC23 SDA-UP-MIPS SDA-UP-MIPS 3S3M C1
5 SDA
10K 3S3R POWER-OK POWER-OK AC21 MC AC24 3S2G 100R SCL-UP-MIPS SCL-UP-MIPS 4K7 3S6W
3S3T 10K RES ENABLE-3V3n ENABLE-3V3n AD21
6 SCL
RES
3S3N C2
7 LED1 RES 3S1P 4K7
+3V3-STANDBY 10K AD26 3S2H 100R LED1 3S3P C1
3S1G 0 3S2K 100R
RXD-UP RXD-UP AE21 PWM AC25 LED2 LED2 10K 3S41
3S1H 10K TXD-UP TXD-UP AF21
0 1 3S3Q C2
1 10K
10K
3S2A RES
DETECT2 AA22
2 SDO
AE23 PNX-SPI-SDO 3S3R D2
D 10K
DETECT2 AB22
AC22
3
4
P3
SPI
SDI
CLK
AF25
AF24
PNX-SPI-SDI
PNX-SPI-CLK
D 3S3S D1
AD22
5 CSB
AF23 PNX-SPI-CSBn 3S3T D1
3S1K RES
RESET-SYSTEMn AD23 AB17 IS2V RES 3S2L 3S3W E9
RESET-SYSTEMn 0 0 CTRL-DISP CTRL-DISP
10K AV2-BLK AE26
1 1
AA18 IS2Z RESET-DVBS RESET-DVBS 10K RES 3S46 3S3Y D9
AE25 P5 AD18 RES 3S3Y 10K
3S1J KEYBOARD
AV1-BLK
AE24
2 2
AE18
RESET-USBn RESET-USBn
10K 3S47 +3V3-STANDBY 3S41 D12
KEYBOARD 3 3 RESET-ETHERNETn RESET-ETHERNETn RES
100K LIGHT-SENSOR P0 AF18 SEL-HDMI-ARC SEL-HDMI-ARC 3S2S 10K 3S42 C11
2S4E 4 3S2M
AV1-STATUS AF22 AA19 RESET-AVPIP RESET-AVPIP 10K RES 3S43 C11
4 5

VSS_XTAL
AV2-STATUS AE22 P6 AB19 RESET-AUDIO RESET-AUDIO 3S3W 10K RES
100n 5 6
AC19 AUDIO-MUTE-UP AUDIO-MUTE-UP 4K7 3S49 3S44 C11
7

AD17
3S1L
SPI-PROG SPI-PROG 4K7 3S46 D10
PNX-SPI-WPn
10K 3S47 E10
E E 3S49 E10
3S6V C11
3S6W D12
5S04 B6
7S00-9 B6
7S20 G10
9S0D G9
9S0E G9
9S24 B6
F F DS50 B8
+3V3-STANDBY +3V3-STANDBY FS0Z G11
FS45 G9
IS20 B6

1 3S2V 2
IS2U G10

10K
9S0E
FS0Z IS2V D7
7S20 RESET-STBYn
NCP303LSN28 IS2Z D7
FS45 2 IS3B A6
INP
1 IS2U 1
OUTP IS3D C10
5
CD
NC GND IS3E C10
G G IS3F C10

3
9S0D

2S4K

100n
RES
H H

1 2 3 4 5 6 7 8 9 10 11 12 13

5 2009-10-22

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 123

PNX Power

PNX Power
B02H B02H
1 2 3 4 5 6 7 8 9 10 11 12 13 14
IS3Q 5S80
2S21 F6
+1V1
30R 2S23 B6

RES 10u
2S26 A6

2S6A

2S5A
100n
2S27 B3

1
2S28 B3
5S81 2S29 C6
2S43 B2
A +2V5
A

2
30R 2S45 F11

RES 10u
2S6B

2S5B
100n
2S46 F11
2S4M B12
2S4N C11

1
+1V8
IS3S 5S82 2S4P C11

2S26

2S60

2S61

2S62

2S63

2S64

2S65

2S66

2S67
100n

100n

100n

100n

100n

100n

100n

100n
47u
+3V3 2S4Q B3
30R

RES 10u
2S4R B4

2S5C

2S5D
100n
2S4S F5
2S4T H11
SENSE+1V1 c001
2S4U D11
5S93
7S00-10 2S4V D11

G6

G7
R6
R7
U7

C6
D6
A5
A6
B5
B6

E6
F6

F7
L6
L7
+2V5
B PNX85500 30R
B 2S4W D11

2S6E 2

220u 6.3V
VDD_1V8 2S4Y D11

2S4M
2S6D

100n

100n
+1V1 AF1 V20

7
AE2 HDMI_VDDA_1V1 V21 2S4Z E11

5
AD3

1
2S50 E11

2S5G-1

2S5G-2

2S5G-3

2S5G-4

2S5H-1

2S5H-2

2S5H-3

2S5H-4
2S4Q

2S4R
2S43

2S28

2S27

2S23
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n
AC4 VDD U20

22u

22u

47u

1
AB5 HDMI_VDDA_2V5 U21 2S51 E9
H20
2S52 E9

4
F11 U22 +2V5-LVDS

2
HDMI_VDDA_3V3_TERM 2S53 H11
G11
F13 N6 2S55 G11

2S4N

2S4P
100n
G13 VDD_2V5 N7

10u
F15 2S56 G11

2S5J-3 6

2S5J-1 8
8

5
G15 C7 2S57 G11

2S5K-1

2S5K-2

2S5K-3

2S5K-4

2S5J-2

2S5J-4
C C

100n

100n

100n

100n

100n

100n

100n

100n

100u 2.0V
F17 C9
G17 C11
2S58 H11
2S29 5S85 2S59 I11
F19 VDD_2V5_LVDS C14

4
+3V3

2
1 2S6G 2
G19 C16 2S5A A11

1
30R

2S6N

2S6C

2S6P
2S6F

100n

100n

100n

100n
J9 C18

10u
J11 2S5B A11
AA16
AA8

2S5C B11
Y11
Y14

J13 W20
Y16
Y9

7S00-12

1
PNX85500 J15 P20
J17 M20
2S5D B11
VSSA
A1 M7 L9 VDD_3V3 K20 2S5G-1 B4
A10 N2 L11 V7 +3V3-STANDBY
2S5G-2 B4

2S4U
2S4V

100n
A12 N20 L13 Y8

10u
A15 P10 L15 2S5G-3 B4
VDD_1V1
A17 P12 L17 Y19 2S5G-4 B5
D A19
A26 VSS
P14
P16
N9
N11
VDD_3V3_SBY Y18
IS3K 5S83
D 2S5H-1 B5
A3 P18 N13
VDDA_1V1_LVDS_PLL
B13 2S5H-2 B5
A8 P4 N15 +1V1
IS3L 30R 2S5H-3 B5

2S4W
2S4Y

100n
B1 P6 N17 AA15

RES 1u0
B20 P7 R9 Y15 2S5H-4 B5
VDDA_1V2
C20 T10 R11 AA13 2S5J-1 C5
C4 T12 R13
D2 VSS T14 R15 Y12
5S95 +2V5 2S5J-2 C5
VSS VDDA_2V5 5S84
D20 T16 R17
30R
2S5J-3 C5

6.3V
E13 T18 U9 AA9 +1V2
VDDA_2V5_AADC 30R 2S5J-4 C5

2S4Z
2S51

2S52

2S50
100n

100n
E20 T2 U11

10u
E4 T6 U13 AA7 c000 SENSE+1V2 2S5K-1 C4

10u
VDDA_2V5_ADAC
F10 T7 U15 2S5K-2 C4
E F12
F14
U4
V10
U17
J6
VDDA_2V5_DCS
Y17
E 2S5K-3 C4
F16 V12 AA6
VDDA_2V5_LVDS_BG
D13 2S5K-4 C5
F18 V14 Y7
F20 V16 W7 T20 POL 2S5M G11

VSSA_1V1_LVDS_PLL

VSSA_2V5_LVDS_BG
VDDA_2V5_USB 2S5P F5
F8 V18 F9
G10 V2 G9 Y13 +2V5-AUDIO 2S60 A6
VDDA_2V5_VADC
G12 Y20

V24 HDMI_AGND
5S94 2S61 A6

2S46

100n
J7 Y10

VSSA_USB
VSS +1V1 VDD_1V1_DDR VDDA_2V5_VDAC
30R 2S62 A7
2
G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

R21
VDDA_3V3_USB 2S63 A7
2S4S

2S5P

2S21
100n
10u

1u0

RES
2S64 A7

U24

A13

C13

R20
2S65 A7
1

F +2V5-AUDIO F 2S66 A7

2S45

100n
2S67 A8
2S6A A11
2S6B A11
5S87 2S6C C11
+2V5 2S6D B11
30R
2S6E B11

2S55

2S56
100n

1u0
2S6F C11
2S6G C11
2S6H H11
G 5S88 G 2S6K H11
+2V5-LVDS
30R 2S6L I11

2S5M

2S57
100n

10u
2S6M I11
2S6N C11
2S6P C12
5S89
2SHW I11
+2V5

2
30R 5S80 A12

2S6H

2S6K
100n

100n
2S58

10u
5S81 A12
5S82 A12

1
5S83 D12
H 5S90 H 5S84 E12
+2V5
30R 5S85 C12
5S87 F12

2S4T

2S53
100n

10u
5S88 G12
5S89 H12
5S90 H12
5S92 I12
5S93 B12

2SHW

100n
5S94 F5
5S95 E10
I I 7S00-10 B6
IS58 5S92 7S00-12 C1
+3V3 IS3K D10

2
30R

2S6M

2S6L

2S59
100n

100n
IS3L D10

1u0
IS3Q A10

1
IS3S A10
IS58 I10
c000 E13
c001 B5

1 2 3 4 5 6 7 8 9 10 11 12 13 14
5 2009-10-22

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8204 000 8950

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2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 124

PNX Analog Video

PNX Analog Video


B02I B02I
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2S14 D12
2S15 D12
2S16 D12
AV1-CVBS 2S87
2S18 D12
22n 2S8A 9S17 Y-SVHS
2S19 D12

3S59
47R
Connectivity 22n
2S22 A11

3S5B
47R
A A 2S40 B11
AV1-R 2S7J 2S75 F11
22n 2S22 C-SVHS 2S76 F11

3S4J
56R
22n 2S77 F12

3S05

56R
2S78 G12
2S7E G6
EU: SCART1 CVBS-MON-OUT1 2S7H B6
AV1-B 2S7K
AP: - 2S7J A6

3S5E

560R
22n

2S7K B6

3S4L
56R
B B 2S7L C6
IS4V
2S7M C6
2S7N D6

560R
2S40

3S08
47p
2S7H
AV1-G 2S7P D6
22n 2S7Q E6

3S4K
56R
IS4W
2S7R F6
2S7U F6

3S09

8K2
2S84 G6
C C
YPBPR1-SYNCIN1
2S7M
2S85 H6
10n
2S7L
2S86 H6
AV3-Y
2S87 A6
22n
2S8A A11

3S4P
56R
2S8G E6
2S7N
AV3-PR 3S05 A11
EU: YPBPR1 22n 3S08 B11

3S4R
56R
D AP: YPBPR1
7S00-1
PNX85500 D 3S09 C11
2S7P ANALOG_VIDEO 3S4G G6
AV3-PB
22n
AB15
CVBS_Y1 ATV_CVBS_Y3 AC12 3S4J A6

2S19

2S18

2S16

2S15

2S14
3S4T
AC13 IS5C

56R
AF13

22n

22n

22n

22n

22n
AD13
R
B AV1
C3
3S4K C6
AE13 AD11
G CVBS_Y7
C7
AC11 3S4L B6
2S8G AF15
AV2-CVBS
AE15
SYNCIN1
AF11
BS13 3S4P D6
22n Y_G1 CVBS1_OUT
AC15
PR_R_C1 CVBS2_OUT AE11 3S4R D6

3S5L
AD15

47R
PB_B1
RESREF AB10 3S4T D6
AB14 AA11 IS5E 3S5S
E 2S7Q
AF14
CVBS_Y2
SYNCIN2
CURREF
10K E 3S4U F6
YPBPR2-SYNCIN2 AE14 AC16 IS5D
10n
AC14
Y_G2
PR_R_C2
1
2 AB16 IS5F 3S4W F6
AD14 IS5G
PB_B2
REF 4
3 AB13
AB12 IS5H
3S50 H6
AF16
AD16
R 5 AA12
AA10
IS5J
3S75 3S52 H6
G VGA 6 PNX-IF-AGC
AE16
B 47K 3S54 I6

2S75
2S7R AB18 BS15

10n
AV4-Y AD12
AC18
HSYNC_IN
IN
IF_AGC
RF_AGC AB11 BS17 3S59 A6
EU: 22n AF4 VSYNC
SCART2 OUT 3S5B A11
3S4U

AD24 BS09
56R

SCL VGA_EDID P AE12


AP: YPBPR2 AD25
SDA TUNER N AF12 BS10
3S76 IS11 3S5E B11
F +CVBS 47K
PNX-RF-AGC
F 3S5L E6

2S76
AGND

10n
3S5S E9

AA14
AV4-PR 2S7U

22n 3S5T-1 I5
3S4W
56R

2S77
PNX-IF-P 3S5T-2 I11
10n 3S5T-3 I5
3S5T-4 I11
2S7E
AV4-PB 3S5V-1 I5
22n 2S78
3S5V-2 I12
3S4G
56R

G 10n
PNX-IF-N
G 3S5V-3 I5
3S5V-4 I12
2S84
R-VGA 3S75 E12
22n
3S76 F12
3S50
56R

7S00-1 D8
2S85
9S14 I3
G-VGA
9S15 I3
22n
9S17 A13
3S52
56R

H H
BS09 F9
2S86
BS10 F10
B-VGA
22n
BS13 E9
3S54
56R

EU: VGA BS15 F9

4 3S5T-4 5

2 3S5T-2 7

4 3S5V-4 5

2 3S5V-2 7
AP: VGA
BS17 F10

100R

100R

100R

100R
H-SYNC-VGA 1 3S5T-1 8 IS11 F13
100R
IS4V B10
V-SYNC-VGA 3 3S5T-3 6
100R
IS4W C10
IS5C D9
I VGA-SCL-EDID 3 3S5V-3 6
I IS5D E9
100R
IS5E E9
VGA-SDA-EDID 1 3S5V-1 8
100R
IS5F E9
VGA-SCL-EDID-TCON 9S14
* IS5G E9
VGA-SDA-EDID-TCON 9S15
* *
= TCON ONLY
IS5H E9
IS5J E9
1 2 3 4 5 6 7 8 9 10 11 12 13 14
5 2009-10-22

PNX85500
8204 000 8950

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2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 125

10-13 B02 820400089506 PNX85500


PNX NandFlash - Conditional Access

PNX NandFlash - Conditional Access


B02A B02A
1 2 3 4 5 6 7 8 9 10 11 12 13 14
3S01-1 E2
3S01-2 E3
3S01-3 E2
3S01-4 E3
3S02-1 E3
3S02-2 E2
3S02-3 E2
A A 3S02-4 E3
7S00-5
PNX85500 3S03 F3
FLASH D25 XIO-D00 3S04-1 F3
00
D26 XIO-D01
01
02
C24 XIO-D02 3S04-2 F3
D23 XIO-D03
NAND-ALE D22
03
C23 XIO-D04
3S15 B6
ALE 04
NAND-CLE C21
CLE
NAND
05
B23
A22
XIO-D05
XIO-D06
3S1R F7
06
XIO-A00 J25
J26
00
XIO_D
07
E22
F24
XIO-D07 3S1S G7
XIO-A01 01 08 XIO-D08
XIO-A02 H21
02 09
F25 XIO-D09 3S1T G7
H22 F26
B XIO-A03
XIO-A04 H23
03
04
10
11
E23
XIO-D10
XIO-D11 B 3S1U G7
XIO-A05 H24 E24
XIO-A06 H25
05 12
E25 INPACK INPACK IS26 3S15 3S23 G7
06 13
H26 E26
XIO-A07
XIO-A08 G21
07
XIO_A
14
D24
XIO-D14
XIO-D15
10K 3S24 G7
08 15
XIO-A09 G22
G23
09
B22
3S28 G7
XIO-A10 10 OE_ XIO-OEn
XIO-A11 G24
11
XIO
WE_
C22 XIO-WEn 3S29 H7
XIO-A12 G25
XIO-A13 G26
12
13 CLK_BURST
B21 7S00-11 E3
XIO-A14 F22
XIO-A15 IS25 F23
14
15 CE1_
E21 NAND-CE1n
7S00-5 A4
D21
CE2_
A20
9S00 F5
C NAND RDY2
RDY1
F21 NAND-RDY1n C 9S08 C5
A21 9S08 NAND-WPn
WP_
IS00
IS00 C5
IS25 C3
IS26 B6

D D

7S00-11
PNX85500

CA-MDI0 3S01-1 8 1 P21 VIDEO_STREAM N26 CA-MDO0


0 0
33R 7 3S01-2 2 P22 M21
E CA-MDI1
CA-MDI2 3S01-3 6 3 33R P23
1
2
1
2
M22
CA-MDO1
CA-MDO2 E
CA-MDI3 33R 5 3S02-4 4 P24 M23 CA-MDO3
3S02-2 3 3
CA-MDI4 7 2 33R P25 MDI MDO M24 CA-MDO4
4 4
CA-MDI5 33R 8 3S02-1 1 P26 M25 CA-MDO5
5 5
CA-MDI6 6 3 33R N21 M26 CA-MDO6
6 6
CA-MDI7 3S02-3 33R 5 3S01-4 4 N22 L21 CA-MDO7
7 7
33R
CA-ADDENn J22
ADD_EN

CA-DATADIR K25 K23 CA-VS1n


DATA_DIR 1
VS K24 9S00 * CA-MOCLK
2
CA-DATAENn K26 RES
DATA_EN
K21 CA-CD1n
3S03 1
N23 CD K22
F CA-MICLK
10R
I
MCLK
2 CA-CD2n
F
CA-MOCLK L25
O CA
3S04-2 +3V3
CA-MISTRT 7 2 N24
MISTRT
3S04-1 33R
CA-MIVAL 8 1 N25 TS-FE-DATA 3S1R
MIVAL
33R 560R
CA-MOSTRT L22 TS-FE-CLOCK 3S1S
MOSTRT
560R
CA-MOVAL L23 TS-FE-VALID 3S1T
MOVAL
560R
J21 TS-FE-SOP 3S1U
OOB_EN
560R
L24
G CA-RDY RDY
TS-FE-DATA
G 1X06
EMC HOLE
CA-RST L26 T21 TS-FE-DATA 3S23
RST DATA
T23 TS-FE-ERR RES 470R
ERR
J23 T22 TS-FE-CLOCK TS-FE-CLOCK 3S24
VCCEN TNR_SER1 MICLK
R23 TS-FE-VALID RES 470R
MIVAL
J24 R22 TS-FE-SOP TS-FE-VALID 3S28
VPPEN SOP
470R
TS-FE-SOP 3S29
470R

H H

1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 126

PNX SDRAM

PNX SDRAM
B02B B02B
1 2 3 4 5 6 7 8 9 10 11
2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
A A 3S06 D3
3S07 D3
3S0V F8
3S20 D2
3S22 D2
B B 3S30 C7
7S00-8

DDR2-BA0
PNX85500
H1 MEMORY J1 DDR2-A0
3S33 C8
0 0
DDR2-BA1
DDR2-BA2
H2
G1
1 BA
2
1
2
J3
K1
G4
DDR2-A1
DDR2-A2 3S6P E10
3 DDR2-A3
DDR2-DQM0
DDR2-DQM1
D1
D5
0
1
M0 4
5
L3
G3
DDR2-A4
DDR2-A5
3S6Q E10
DDR2-DQM2 R3 DM L2 DDR2-A6
DDR2-DQM3 T5
2
3
6
7
H5
L1
DDR2-A7
DDR2-A8
7S00-8 B6
A 8

C FS01 D3
DDR2-D0 F3 J5 DDR2-A9
0 9
C +1V8
DDR2-D1
DDR2-D3
C2
F2
1
2
10
11
J2
M3
DDR2-A10
DDR2-A11
DDR2-D2
DDR2-D6
C3
B4
3
4
12
13
J4
M2
DDR2-A12
DDR2-A13
FS02 D2
DDR2-D5 F1 K5 DDR2-A14
DDR2-D4
DDR2-D7
C1
E1
5
6
7
14

N
N5 3S30 DDR2-CLK_N
IS42 E8
100u 2.0V

F4 CLK N4 3S33 DDR2-CLK_P


180R 1%

180R 1%

DDR2-D8 8 P 10R
3S20

3S06

2S12

DDR2-D9 B2 10R
9
DDR2-D10 E5 E2 DDR2-DQS0_N
10 N
DDR2-D11 C5 DQS0 E3 DDR2-DQS0_P
FS02 11 P
DDR2-D12 A4
DDR2-VREF-CTRL3 FS01 12
DDR2-D13 G5 D3 DDR2-DQS1_N
DDR2-VREF-CTRL2 13 N
B3 DQS1 D4 DDR2-DQS1_P
180R 1%

DDR2-D14 14 P
3S22

D DDR2-D15 F5
U3
15
DQ R1 D
180R 1%

DDR2-D16 16 N DDR2-DQS2_N
3S07

DDR2-D17 P2 DQS2 R2 DDR2-DQS2_P


17 P
DDR2-D19 U2
18
DDR2-D18 P3 T3 DDR2-DQS3_N
19 N
DDR2-D22 N1 DQS3 T4 DDR2-DQS3_P
20 P
DDR2-D23 U1
21
DDR2-D20 P1 K3 DDR2-CAS
22 CASB 3S6Q
DDR2-D21 T1 K4 DDR2-CKE DDR2-CKE
23 CKE
DDR2-D24 V4 L5 DDR2-CS 10K
24 CSB
DDR2-D30 R5 M4 DDR2-ODT
25 ODT
DDR2-D26 U5 M1
26 PCAL 3S6P
DDR2-D25 P5 M5 DDR2-RAS DDR2-ODT
27 RASB
DDR2-D28 N3 H3 DDR2-WE 10K
28 WEB
E DDR2-D31
DDR2-D27
V3
R4
29
30 1
A2 DDR2-VREF-CTRL2
E
DDR2-D29 V5 VREF V1 DDR2-VREF-CTRL3
31 2

IS42

2S20

2S17

1%
2S24

2S25
100p

100n

100n

100p

3S0V

261R
F F

1 2 3 4 5 6 7 8 9 10 11

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 127

PNX Digital Video In

PNX Digital Video In


B02C B02C
1 2 3 4 5 6 7 8 9 10 11 12 13 14

2S2E F5
3S0W E5
A A 7S00-6 D6
IS01 E6
IS10 E7

B B

C C

D D
7S00-6
PNX85500

HDMIA-RX2+ T25 HDMI_DV


P
HDMIA-RX2- T26 RX0_A
N

HDMIA-RX1+ U25
P
HDMIA-RX1- U26 RX1_A Y26 DDCA-SCL
N SCL
DDC_A Y25 DDCA-SDA
SDA
HDMIA-RX0+ V25 IS10
P
HDMIA-RX0- V26 RX2_A T24
N HOT_PLUG_A
E HDMIA-RXC+ W25
P
E
HDMIA-RXC- W26 RXC_A
N
+3V3 IS01
3S0W W24
RREF
12K
2S2E

10u

RES

F F

G G

H H

I I

1 2 3 4 5 6 7 8 9 10 11 12 13 14
6 2009-12-07

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PNX Audio

PNX Audio
B02D B02D
2S2G C12 IS1G G7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 2S2H D12 IS1K H9
2S2J G12 IS1L F5
2S2K F12 IS1N C7
2S2L D4 IS1S D7
2S2R B7 IS44 H9
2S2S B9
2S2T B8
2S2V B3
A A 2S2W B3
2S2Y C3
2S2Z B3
3S0Z 2S30 C3
3S53-1 +2V5-AUDIO +24V-AUDIO-POWER 2S31 C3
4R7 +24V-AUDIO-VDD
100R
2S32 D3
+3V3
3S53-2
2S33 C3

2S3J

220n
7S08 2S34 B9
100R LD3985M25
1 3S16-1 8 2S36 C6
1 2S2W FS03
3S12-1 8 10K 3S53-3 FS08 5 1 2S38 E9
AUDIO-IN1-L OUT IN
22K 100R IS12 4 2S39 E9
1u0 IS13 3S14

RES
4 3 ADAC(1) 12 7S05-4 2S3A E8
2 BP INH
B 3S53-4 +2V5 LM324 14 3S38
B

2S2R

2S2S
3S16-2 7

10u
2 3S12-2 2S2V 22K +AUDIO-L 2S3B E8
AUDIO-IN1-R 7 10K COM IS02 13

10u
100R 100R 2S3C E8

2S2T

100n
22K 1u0 11 2S3D E8

2S34

100n
2
3S16-3 3 6
3S12-3 6 2S3E E3
3 2S2Z
AUDIO-IN2-L 10K 2S3F E2
22K 1u0 10K 2S3G E3
2 3S36-2 7
3S16-4 5 8 3S36-1 1
2S3H E3
IS0V 4 2S2Y 10K
4 3S12-4

100u 4V
2S3J B11

3S51

2S42

2S41
10K

4R7
5

1u0
AUDIO-IN2-R 2S2G
22K
2S3K G6
1u0
47p 2S3L H8
3S13-4 IS0R 4 3S17-4 5 7S00-2 2S3M H9
2S31
AUDIO-IN3-L 10K PNX85500 +24V-AUDIO-VDD
2S3Q G5
C 4
22K
5
3
1u0
AE10 AUDIO AC7
2S36
1
3S3G-1
8 ADAC(1)
C 2S41 C6
L P
3S13-3 3S17-3 6 AF10 AIN1 ADACL AB7 IS1N 33R 3S3G-3 4
2S42 C6
2S30 R N 1u0 IS03
AUDIO-IN3-R 3 6 10K 3 6 ADAC(2) ADAC(2) 10 7S05-3 3S0Z A11
AD10 AC6 LM324 8 3S39
22K 1u0 L P 33R -AUDIO-R 3S10 D4
AC10 AIN2 ADACR AB6 9
3S17-1 R N 100R 3S11 F5
1 8
3S13-1 2S33 11 3S12-1 B2
AUDIO-IN4-L 10K AE9 AD7
L 1 3S3G-2
1 22K 8 AF9 AIN3 AE7 2 7 ADAC(3) 3S12-2 B2
1u0 R 2
AF7 3S12-3 B2
2 3 33R
3S17-2 7 AD9 ADAC AD6 4 3S3G-4 5 ADAC(4) 3S12-4 C2
2S32 L 4
AUDIO-IN4-R 2 3S13-2 10K AC9 AIN4 AE6 IS1S 33R
7 R 5
AF6
3S13-1 C2
22K 1u0 6 3S13-2 D2
AF8
L
D 3S10
AE8
R
AIN5
OSCLK
AD4
AD1
3 3S36-3 6
10K
5 3S36-4 4
D 3S13-3 C2
3S13-4 C2
I2S_OUT SCK 3S3H 10K
2S2L 100R AB9 AD2 ADAC(5) 3S14 B9
POS WS 2S2H
IS1B AB8 VR_AADC 33R
1u0 NEG
AE1
3S16-1 B3
IS19 1 3S3U 47p
AD8 AF2 ADAC(6)
3S16-2 B3
VREF_AADC 2
AE3 +24V-AUDIO-VDD 3S16-3 B3
IS1A I2S_OUT_SD 3 33R
AC8 AF3 3S16-4 C3
VCOM_AADC 4
3S3F 3S17-1 C3
AF5
SPDIF_OUT 3S17-2 D3

2S3D

2S3C

2S3B

2S3A

2S39

2S38
1n0

1n0

1n0

1n0

1n0

1n0
56R DBS8 3S17-3 C3
AE5 IS07 4
SPDIF_IN1
2S3G
2S3H
2S3E

3S17-4 C3
2S3F

100n

100n

3 7S05-1
10u

10u

ADAC(5)
LM324 1
9S06

AUDIO-OUT-L 3S18-1 G7
E 2 E 3S18-2 G8
11 3S18-3 G8
3S19 H5
3S25 H9
3S32 G12
3S34 G11
3S36-1 C12
3S37 3S6L 3S36-2 B11
10K 22K
3S36-3 D11
2S2K 3S36-4 D12
3S37 F11
+3V3 47p 3S38 B13
F +3V3-ARC F 3S39 C13
+24V-AUDIO-VDD 3S3F E4
3S11
3S3G-1 C7
IS1L 3S3G-2 D8
1R0 3S3G-3 C8
3S3G-4 D7
4
2S3Q

3S3H D7
100n

ADAC(6) 5 7S05-2
LM324 7
IS06 AUDIO-OUT-R 3S3U D8
6 3S51 C6
11 3S53-1 A6
7S09-1
3S53-2 B6
14

74LVC00APW
IS1D
G SPDIF-OUT-PNX SPDIF-OUT-PNX 1 &
3
2S3K
IS1G 1 3S18-1 8 SPDIF-OUT
G 3S53-3 B6
3S53-4 B6
2 220R 3S6L F12
100n 3S34 3S32

2 3S18-2 7

3 3S18-3 6
+3V3 3S6M H8

220R

220R
7

+3V3 10K 22K 7S00-2 C5


2S2J
7S05-1 E12
47p 7S05-2 G12
+3V3-ARC
7S05-3 C12
3S19

+3V3-ARC
10K

7S09-2 7S05-4 B12


14

74LVC00APW 7S09-3
7S08 B8
14

4 & 74LVC00APW
6 9 & IS1K IS44 7S09-1 G6
IS1E 2S3L 180R 2S3M
SEL-HDMI-ARC 5 8 eHDMI+ 7S09-2 H6
H +3V3
10
100n 3S6M 100n H 7S09-3 H7
7

7S09-4 I7
7

9S06 E4

3S25

68R
DBS8 E4
FS03 B12
FS08 B7
+3V3-ARC IS02 B11
IS03 C11
7S09-4 IS06 G11
14

74LVC00APW IS07 E11


12 & IS0R C2
11
IS0V C2
I +3V3
13 I IS12 B8
IS13 B9
7

IS19 D3
IS1A D3
IS1B D4
IS1D G5
IS1E H5

1 2 3 4 5 6 7 8 9 10 11 12 13 14

6 2009-12-07

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PNX Mips

PNX Mips
B02E B02E
1F10 A12
1 2 3 4 5 6 7 8 9 10 11 12 13 14 2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
3S40 A1
3S45 A1
3S55 C3
3S56 A5
3S57 A6
+3V3 3S58 A5
A 7S00-3
PNX85500 A 3S5W B6
3S5Y B5
CONTROL C25 1 3S56 2 3S69 1F10 3S5Z B6
IS05 SDA SDA-UP-MIPS SDA-UP-MIPS
3S45 1 C26 100R 1 2 3S57 3S6A 4K7 4K7 FS44
+3V3 BOOTMODE SCL SCL-UP-MIPS SCL-UP-MIPS EJTAG-TRSTn-PNX85500 1 3S60 B5
100R EJTAG-TMS-PNX85500 FS49
10K 2 3S61 B6
BOOTMODE Y21 B26 1 3S58 2 SDA-SET SDA-SET 3S6B 4K7 EJTAG-TDO-PNX85500 FS50
3S40
GPIO1 GPIO1 Y22
GPIO_0
2
SDA
A25 100R 1 2 3S5W SCL-SET SCL-SET 3S6C 4K7 EJTAG-TCK-PNX85500 FS51
3 FOR FACTORY 3S62 B1
+3V3 GPIO_1 SCL 4
RXD1-MIPS Y23 100R EJTAG-TDI-PNX85500 FS52 USE ONLY 3S64 C1
10K GPIO_2 5
DS52 TXD1-MIPS Y24 B25 1 3S5Y 2 SDA-SSB SDA-SSB 3S6D 2K2 3S65 E11
3S82 RES GPIO_3 SDA 3S5Z 6
BOOST-PWM RXD2-MIPS W21 3 A24 100R 1 2 SCL-SSB SCL-SSB 3S6E 2K2 EJTAG-DETECTn FS53 3S66 E11
+3V3 GPIO_4 SCL 7
TXD2-MIPS W22 100R
10K GPIO_5 8 3S67 E11
3S80 FS10 TXD2-MIPS PNX-SPI-CS-AMBIn W23 B24 1 3S60 2 SDA-TUNER SDA-TUNER 3S6F 4K7 10 9
+3V3 GPIO_6 SDA 3S68 E11
3S81 10K FS11 RXD2-MIPS PNX-SPI-CS-BLn V22 4 A23 100R 1 2 3S61 SCL-TUNER SCL-TUNER 3S6G 4K7
+3V3 GPIO_7 SCL 3S69 A9
B +3V3
3S21
10K
PNX-SPI-CS-AMBIn
BOOST-PWM
SELECT-SAW
V23
U23
GPIO_10
GPIO_11 TRSTN
AA25
100R
EJTAG-TRSTn-PNX85500 EJTAG-TRSTn-PNX85500 3S6K B 3S6A A8
IS04 AA24 EJTAG-TMS-PNX85500 EJTAG-TMS-PNX85500 1 8 3S6H-1 10K +3V3 3S6B A9
10K TMS +3V3-STANDBY FS57 BM08B-SRSS-TBT
USB-DM R26 AA23 EJTAG-TCK-PNX85500 EJTAG-TCK-PNX85500 10K 3 6 3S6H-3
3S62 PNX-SPI-CS-BLn DN TCK 3S6C B8
+3V3 USB-DP R25 AB26 EJTAG-TDO-PNX85500 EJTAG-TDO-PNX85500 10K 2 7 3S6H-2
IS4Z R24 DP USB TDO
AB25 EJTAG-TDI-PNX85500 EJTAG-TDI-PNX85500 10K 4 5 3S6H-4 3S6D B9
10K RREF TDI
10K 3S6E B8
3S00
3S55
RESET_SYS
AE4 RESET-SYSTEMn 3S6F B9
5K6
3S64 FS64 33R 3S6G B8
SELECT-SAW AD5 BACKLIGHT-PWM
+3V3 BL_PWM 3S6H-1 B8
10K 3S6H-2 B9
AC5
CLK_54_OUT 3S6H-3 B9

3S26

3S27
3S6J

10K

10K

10K
3S6H-4 B9
C +3V3
3S83
RXD1-MIPS
C 3S6J C5
3S6K B9
10K 3S72 C6
3S84 +3V3 +3V3
TXD1-MIPS IS40 3S80 B1
+3V3 3S72
10K PXCLK54 3S81 B1
47R 3S82 B1
3S83 C1
3S84 C1
7S00-3 A4
7S00-4 G12
RES
7S01 E8
9S10 F8
D D 9S11 F8
+3V3 9S12 F8
9S13 F8
2S89 DS52 B2
FS10 B2
100n +3V3 FS11 B2
FS2W F9

3
7S01
PCA9540B 3S65 FS2Y F9
VDD SC0 5 SCL-DISP SCL-DISP 2 1 FS31 F8
3S66 4K7 FS44 A12
SC1 8 SCL-BL SCL-BL 2 1
FS49 A12
3S67 4K7
FS50 A12
E SCL-SET 1 SCL
INP
I 2 C
-BUS
SD0 4 SDA-DISP SDA-DISP 2
3S68
1
4K7 E FS51 B12
2 SDA FIL SD1 7 2 1
SDA-SET CTRL SDA-BL SDA-BL FS52 B12
4K7
FS53 B12
VSS
FS57 B12
FS64 C2

6
FS31 IS04 B2
IS05 A2
IS08 F8
IS09 F8
9S10 SCL-BL IS40 C6
IS08 IS4Z B4
F SCL-SET 9S11 FS2W SCL-DISP
F IS50 G12
9S12 FS2Y SDA-DISP
IS09
SDA-SET 9S13 SDA-BL

7S00-4
PNX85500

ETH-RXCLK AA3
RXCLK ETHERNET

G ETH-RXD(0)
ETH-RXD(1)
Y5
Y6
0
1 TXCLK
AA2 ETH-TXCLK
G
ETH-RXD(2) IS50 AB4 RXD ETH
2
ETH-RXD(3) AC1 AA1 ETH-TXD(0)
3 0
AA4 ETH-TXD(1)
1
ETH-RXDV AC2 TXD AB1 ETH-TXD(2)
RXDV 2
ETH-RXER Y4 AB2 ETH-TXD(3)
RXER 3
ETH AA5 ETH-TXEN
TXEN
SDIO-DAT3 W2 AB3 ETH-TXER
CC_DAT3 TXER
SDIO-CLK W1 AC3 ETH-COL
CLK COL
SDIO-CMD W6 Y2 ETH-CRS
CMD CRS
SDIO-DAT0 W5 Y3 ETH-MDC
0 MDC
SDIO-DAT1 W4 SDIO Y1 ETH-MDIO
1 DAT MDIO
SDIO-DAT2 W3
2
H SDIO-CDn
SDIO-WP
U6
V6
SDCD
SDWP
H

1 2 3 4 5 6 7 8 9 10 11 12 13 14

6 2009-12-07

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 130

PNX Video Out - LVDS

PNX Video Out - LVDS


B02F B02F
1 2 3 4 5 6 7 8 9 10 11 12 13 14
7S00-7 C8

A A

B B

C 7S00-7
PNX85500 C
PX1A- A7 LVDS D7 PX3A-
N N
PX1A+ B7 A A E7 PX3A+
P P

PX1B- C8 E8 PX3B-
N N
PX1B+ B8 B B D8 PX3B+
P P

PX1CLK- C10 E10 PX3CLK-


N N
PX1CLK+ B10 CLK CLK D10 PX3CLK+
P P

PX1C- A9 LOUT1 LOUT3 D9 PX3C-


N N
PX1C+ B9 C C E9 PX3C+
P P
D PX1D- A11
N N
D11 PX3D- D
PX1D+ B11 D D E11 PX3D+
P P

PX1E- C12 E12 PX3E-


N N
PX1E+ B12 E E D12 PX3E+
P P

PX2A- A14 D14 PX4A-


N N
PX2A+ B14 A A E14 PX4A+
P P

PX2B- C15 E15 PX4B-


N N
PX2B+ B15 B B D15 PX4B+
P P

PX2CLK- C17 E17 PX4CLK-


N N
B17 CLK CLK D17
E PX2CLK+ P
LOUT2 LOUT4
P PX4CLK+
E
PX2C- A16 D16 PX4C-
N
PX2C+ B16 N C E16 PX4C+
C P
P
PX2D- A18 D18 PX4D-
N
PX2D+ B18 N D E18 PX4D+
D P
P
PX2E- C19 E19 PX4E-
N
PX2E+ B19 N E D19 PX4E+
E P
P

F F

G G

1 2 3 4 5 6 7 8 9 10 11 12 13 14

6 2009-12-07

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PNX Stand-by Controller

PNX Stand-by Controller


B02G B02G
1 2 3 4 5 6 7 8 9 10 11 12 13
1S02 B8
2S10 B6
2S11 B5
2S13 B6
2S37 B5
2S4D C3
2S4E E2
2S4F B9
2S4G B9
A A 2S4K G10

+1V1

POL
3S1B C2
3S1C C1
3S1D C2
IS3B
3S1E C1
3S1F C2

5S04
RES

30R
3S1G D2

2S10

100n
1u0
2S13 3S1H D1
2S37 3S1J D2
3S1K D1
1u0 3S1L E2

9S24
RES
3S1P D11
B 2S11 B 3S2A D2
100n 3S2F D7
IS20 DS50 2S4G 3S2G D7

3
3S2H D7
1 10p

AC17
3S2K D7

AA17

AF26

1S02

54M
7S00-9
PNX85500 2S4F 3S2L D10

VDDA_1V1_DCS

VDDA_ADC2V5

VDD_XTAL
3S2M E10
AE17

1
+3V3-STANDBY 2S4D XTAL_IN 10p +3V3-STANDBY 3S2S E10
3S1B 1n0 AD19
RC RC
3S1C RES 10K AE19
0
AF17
3S2V F11
TACHO TACHO 1 XTAL_OUT
10K 3S1D CEC-HDMI CEC-HDMI AF19 3S3L C2
2 P1
3S1E RES 27K BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP AA20 AA26 RESET-STBYn 3S3M C1
3 RESET_IN
C +3V3-STANDBY
10K 3S1F
10K
SDM SDM AB20
7
STANDBY EA
AB24 EA EA
IS3F 3S44 C 3S3N C2
3S3P C1
3S3L RES LCD-PWR-ONn LCD-PWR-ONn AC20
0 ALE IS3E 10K 3S43 3S3Q C2
3S3M 10K EJTAG-DETECTn EJTAG-DETECTn AD20 AB23 ALE
3S3N RES 1 ALE 3S3R D2
10K LAMP-ON LAMP-ON AE20 IS3D 10K
2 10K 3S42
3S3P 10K STANDBY STANDBY AF20 AC26 PSEN PSEN 3S3S D1
3 PSEN
10K 3S3Q RES FAN-CTRL1 FAN-CTRL1 AA21 P2 3S3T D1
RES 3S3S 4 3S2F 100R RES 3S6V
10K FAN-CTRL2 FAN-CTRL2 AB21 AC23 SDA-UP-MIPS SDA-UP-MIPS 3S3W E9
5 SDA
10K 3S3R POWER-OK POWER-OK AC21 MC AC24 3S2G 100R SCL-UP-MIPS SCL-UP-MIPS 4K7 3S6W
3S3T 10K RES AD21
6 SCL 3S3Y D9
ENABLE-3V3n ENABLE-3V3n 7 4K7 RES
10K AD26 3S2H 100R LED1
LED1 RES 3S1P 3S41 D12
+3V3-STANDBY 3S1G 0
RXD-UP RXD-UP AE21 PWM AC25 3S2K 100R LED2 LED2 10K 3S41 3S42 C11
0 1
3S1H 10K TXD-UP TXD-UP AF21 3S43 C11
1 10K
10K DETECT2 AA22 AE23 PNX-SPI-SDO 3S44 C11
3S2A RES 2 SDO
D 10K
DETECT2 AB22
AC22
3
4
P3
SPI
SDI
CLK
AF25
AF24
PNX-SPI-SDI
PNX-SPI-CLK
D 3S46 D10
AD22 AF23 PNX-SPI-CSBn
3S47 E10
5 CSB
3S49 E10
3S1K RES RES 3S2L
RESET-SYSTEMn RESET-SYSTEMn AD23 AB17 IS2V CTRL-DISP CTRL-DISP 3S6V C11
0 0 RES 3S46
AV2-BLK AE26 AA18 IS2Z RESET-DVBS RESET-DVBS 10K 3S6W D12
10K 1 1
AV1-BLK AE25 P5 AD18 RESET-USBn RESET-USBn RES 3S3Y 10K
3S1J KEYBOARD AE24
2 2
AE18 10K 3S47 +3V3-STANDBY 5S04 B6
KEYBOARD 3 3 RESET-ETHERNETn RESET-ETHERNETn RES
LIGHT-SENSOR P0 AF18 SEL-HDMI-ARC SEL-HDMI-ARC 3S2S 10K 7S00-9 B6
100K 2S4E 4
AV1-STATUS AF22 AA19 RESET-AVPIP RESET-AVPIP 10K RES 3S2M 7S20 G10
4 5

VSS_XTAL
AV2-STATUS AE22 P6 AB19 RESET-AUDIO RESET-AUDIO 3S3W 10K RES 9S0D G9
100n 5 6
AC19 AUDIO-MUTE-UP AUDIO-MUTE-UP 4K7 3S49 9S0E G9
7

AD17
3S1L
SPI-PROG SPI-PROG 4K7
9S24 B6
10K PNX-SPI-WPn
DS50 B8
E E FS0Z G11
FS45 G9
IS20 B6
IS2U G10
IS2V D7
IS2Z D7
IS3B A6
IS3D C10
IS3E C10
IS3F C10

F F
+3V3-STANDBY +3V3-STANDBY

1 3S2V 2
10K
9S0E
FS0Z
7S20 RESET-STBYn
NCP303LSN28
FS45 2
INP
1 IS2U 1
OUTP
5
CD
NC GND
G G

3
9S0D

2S4K

100n
RES
H H

1 2 3 4 5 6 7 8 9 10 11 12 13

6 2009-12-07

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 132

PNX Power

PNX Power
B02H B02H
1 2 3 4 5 6 7 8 9 10 11 12 13 14 2S21 F6 2S5K-4 C5
IS3Q 5S80 2S23 B6 2S5M G11
+1V1
30R 2S26 A6 2S5P F5

RES 10u
2S6A

2S5A
100n
2S27 B3 2S60 A6
2S28 B3 2S61 A6

1
5S81 2S29 C6 2S62 A7
A +2V5
A 2S43 B2 2S63 A7

2
30R

RES 10u
2S45 F11 2S64 A7

2S6B

2S5B
100n
2S46 F11 2S65 A7
2S4M B12 2S66 A7

1
+1V8
IS3S 5S82

2S26

2S60

2S61

2S62

2S63

2S64

2S65

2S66

2S67

2S68
100n

100n

100n

100n

100n

100n

100n

100n

100n
2S4N C11 2S67 A8

47u
+3V3
30R

2
2S4P C11

RES 10u
2S68 A8

2S5C

2S5D
100n
2S4Q B3 2S6A A11
2S4R B4 2S6B A11
SENSE+1V1 c001
7S00-10
5S93
2S4S F5 2S6C C11

G6

G7
R6
R7
U7

C6
D6
A5
A6
B5
B6

E6
F6

F7
L6
L7
+2V5
B PNX85500 30R
B 2S4T H11 2S6D B11

2S6E 2

220u 6.3V
VDD_1V8

2S4M
2S6D

100n

100n
AF1 V20
+1V1 2S4U D11 2S6E B11

7
AE2 HDMI_VDDA_1V1 V21

5
AD3
2S4V D11 2S6F C11

1
2S5G-1

2S5G-2

2S5G-3

2S5G-4

2S5H-1

2S5H-2

2S5H-3

2S5H-4
2S4Q

2S4R
2S43

2S28

2S27

2S23
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n
AC4 VDD U20

22u

22u

47u

1
AB5
H20
HDMI_VDDA_2V5 U21 2S4W D11 2S6G C11

4
F11 U22 +2V5-LVDS 2S4Y D11 2S6H H11

2
HDMI_VDDA_3V3_TERM
G11
F13 N6 2S4Z E11 2S6K H11

2S4N

2S4P
100n
G13 VDD_2V5 N7

10u
F15 2S50 E11 2S6L I11

2S5J-3 6

2S5J-1 8
8

5
G15 C7
2S51 E9 2S6M I11

2S5K-1

2S5K-2

2S5K-3

2S5K-4

2S5J-2

2S5J-4
C C

100n

100n

100n

100n

100n

100n

100n

100n

100u 2.0V
F17 C9
G17 C11
2S29 F19 VDD_2V5_LVDS C14
5S85 2S52 E9 2S6N C11
1

4
+3V3

2
1 2S6G 2
G19 C16
2S53 H11 2S6P C12

1
30R

2S6N

2S6C

2S6P
2S6F

100n

100n

100n

100n
J9 C18

10u
J11 2S55 G11 2SHW I11
AA16
AA8
Y11
Y14

J13 W20
Y16
Y9

7S00-12

1
PNX85500 J15 P20 2S56 G11 5S80 A12
VSSA J17 M20
A1 M7 L9 VDD_3V3 K20
+3V3-STANDBY
2S57 G11 5S81 A12
A10 N2 L11 V7
2S58 H11 5S82 A12

2S4U
2S4V

100n
A12 N20 L13 Y8

10u
A15 P10 L15
A17 P12 L17
VDD_1V1
Y19 2S59 I11 5S83 D12
D A19
A26 VSS
P14
P16
N9
N11
VDD_3V3_SBY Y18
IS3K 5S83
D 2S5A A11 5S84 E12
A3
A8
P18
P4
N13
N15
VDDA_1V1_LVDS_PLL
B13
+1V1 2S5B A11 5S85 C12
IS3L 30R

2S4W
2S4Y
2S5C B11

100n
B1 P6 N17 AA15
5S87 F12

RES 1u0
B20 P7 R9 Y15
VDDA_1V2
C20 T10 R11 AA13 2S5D B11 5S88 G12
C4 T12 R13 5S95 +2V5
D2
VSS
VSS T14 R15
VDDA_2V5
Y12
5S84 2S5G-1 B4 5S89 H12
D20 T16 R17
30R 2S5G-2 B4 5S90 H12

6.3V
E13 T18 U9 AA9 +1V2
VDDA_2V5_AADC 30R

2S4Z
2S51

2S52

2S50
100n

100n
E20 T2 U11

10u
E4 T6 U13 AA7 c000 SENSE+1V2 2S5G-3 B4 5S92 I12

10u
VDDA_2V5_ADAC
F10 T7 U15
2S5G-4 B5 5S93 B12
E F12
F14
U4
V10
U17
J6
VDDA_2V5_DCS
Y17
E 2S5H-1 B5 5S94 F5
F16 V12 AA6 D13
VDDA_2V5_LVDS_BG
F18
F20
V14
V16
Y7
W7 T20 POL 2S5H-2 B5 5S95 E10

VSSA_1V1_LVDS_PLL

VSSA_2V5_LVDS_BG
VDDA_2V5_USB
F8 V18 F9 2S5H-3 B5 7S00-10 B6
G10 V2 G9 Y13 +2V5-AUDIO
VDDA_2V5_VADC
G12 Y20 2S5H-4 B5 7S00-12 C1

V24 HDMI_AGND
5S94

2S46

100n
J7 Y10

VSSA_USB
VSS +1V1
30R
VDD_1V1_DDR VDDA_2V5_VDAC
2S5J-1 C5 IS3K D10
2
G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

R21
VDDA_3V3_USB 2S5J-2 C5 IS3L D10
2S4S

2S5P

2S21
100n
10u

1u0

RES
2S5J-3 C5 IS3Q A10

U24

A13

C13

R20
1

F +2V5-AUDIO F 2S5J-4 C5 IS3S A10


2S5K-1 C4

2S45

100n
IS58 I10
2S5K-2 C4 c000 E13
5S87 2S5K-3 C4 c001 B5
+2V5
30R

2S55

2S56
100n

1u0
G 5S88
+2V5-LVDS
G
30R

2S5M

2S57
100n

10u
5S89
+2V5

2
30R

2S6H

2S6K
100n

100n
2S58

10u
1

1
H 5S90
+2V5
H
30R

2S4T

2S53
100n

10u
2SHW

100n
I I
IS58 5S92
+3V3

2
30R

2S6M

2S6L

2S59
100n

100n

1u0
1

1
1 2 3 4 5 6 7 8 9 10 11 12 13 14
6 2009-12-07

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8204 000 8950

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2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 133

PNX Analog Video

PNX Analog Video


B02I B02I
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2S14 D12
2S15 D12
2S16 D12
2S87
AV1-CVBS
2S18 D12
22n 2S8A 9S17 Y-SVHS 2S19 D12

3S59
47R
Connectivity 22n
2S22 A11

3S5B
47R
A A 2S40 B11
AV1-R 2S7J 2S75 F11
22n 2S22 C-SVHS
2S76 F11

3S4J
2S77 F12

56R
22n

3S05

56R
2S78 G12
2S7E G6
EU: SCART1 CVBS-MON-OUT1 2S7H B6
AV1-B 2S7K
AP: - 2S7J A6

3S5E

560R
22n

2S7K B6

3S4L
56R
B B 2S7L C6
IS4V
2S7M C6
2S7N D6

560R
2S40

3S08
47p
2S7H
AV1-G 2S7P D6
22n 2S7Q E6

3S4K
56R
IS4W
2S7R F6
2S7U F6

3S09

8K2
C C 2S84 G6
2S7M
YPBPR1-SYNCIN1 2S85 H6
10n
2S7L
2S86 H6
AV3-Y
2S87 A6
22n

3S4P
2S8A A11

56R
2S8G E6
2S7N
AV3-PR 3S05 A11
EU: YPBPR1 22n
3S08 B11

3S4R
56R
D AP: YPBPR1
7S00-1
PNX85500 D 3S09 C11
2S7P ANALOG_VIDEO 3S4G G6
AV3-PB
22n
AB15
CVBS_Y1 ATV_CVBS_Y3 AC12 3S4J A6

2S19

2S18

2S16

2S15

2S14
3S4T
AC13 IS5C

56R
AF13

22n

22n

22n

22n

22n
R C3
AD13
AE13
B AV1
AD11
3S4K C6
G CVBS_Y7
C7
AC11 3S4L B6
AV2-CVBS 2S8G AF15
AE15
SYNCIN1
Y_G1 CVBS1_OUT
AF11
BS13
3S4P D6
22n AC15 AE11
PR_R_C1 CVBS2_OUT 3S4R D6

3S5L
AD15

47R
PB_B1
AB14
RESREF AB10
AA11 IS5E 3S5S
3S4T D6
E 2S7Q
AF14
CVBS_Y2
SYNCIN2
CURREF
10K E 3S4U F6
YPBPR2-SYNCIN2 AE14 AC16 IS5D
Y_G2 1
10n
AC14
PR_R_C2 2 AB16 IS5F
IS5G
3S4W F6
AD14 AB13
PB_B2 3
REF 4 AB12 IS5H 3S50 H6
AF16 AA12 IS5J
AD16
R
G VGA
5
6
AA10 3S75
PNX-IF-AGC 3S52 H6
AE16
B 47K 3S54 I6

2S75
2S7R AB18 BS15

10n
AV4-Y HSYNC_IN IF_AGC AD12
AC18 BS17
EU: 22n AF4
IN
VSYNC
RF_AGC AB11
3S59 A6
SCART2 OUT
3S4U

AD24 BS09 3S5B A11


56R

SCL VGA_EDID P AE12


AP: YPBPR2 AD25
SDA TUNER N AF12 BS10
3S76 IS11
3S5E B11
F +CVBS 47K
PNX-RF-AGC
F
3S5L E6

2S76
AGND

10n
AA14
AV4-PR 2S7U
3S5S E9
22n
3S5T-1 I5
3S4W
56R

2S77
PNX-IF-P 3S5T-2 I11
10n
3S5T-3 I5
2S7E
3S5T-4 I11
AV4-PB
22n 2S78
3S5V-1 I5
3S4G
56R

G 10n
PNX-IF-N
G 3S5V-2 I12
3S5V-3 I5
R-VGA
2S84 3S5V-4 I12
22n 3S75 E12
3S50
56R

3S76 F12
7S00-1 D8
G-VGA
2S85 9S14 I3
22n 9S15 I3
3S52
56R

H H 9S17 A13
BS09 F9
2S86
B-VGA BS10 F10
22n BS13 E9
3S54
56R

EU: VGA
BS15 F9

4 3S5T-4 5

2 3S5T-2 7

4 3S5V-4 5

2 3S5V-2 7
AP: VGA

100R

100R

100R

100R
H-SYNC-VGA 1 3S5T-1 8
BS17 F10
100R IS11 F13
V-SYNC-VGA 3 3S5T-3 6 IS4V B10
100R
IS4W C10
I VGA-SCL-EDID 3 3S5V-3 6
I IS5C D9
100R IS5D E9
VGA-SDA-EDID 1 3S5V-1 8 IS5E E9
100R
VGA-SCL-EDID-TCON 9S14
* IS5F E9
VGA-SDA-EDID-TCON 9S15
* *
= TCON ONLY IS5G E9
IS5H E9
IS5J E9
1 2 3 4 5 6 7 8 9 10 11 12 13 14
6 2009-12-07

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 134

10-14 B02 820400089507 PNX85500


PNX NandFlash - Conditional Access

PNX NandFlash - Conditional Access


B02A B02A
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2S09 F3
3S01-1 E5
3S01-2 E6
3S01-3 E5
A A 3S01-4 E6
7S00-5
PNX85500
3S02-1 E6
FLASH
00
D25 XIO-D00
3S02-2 E6
D26
01
02
C24
XIO-D01
XIO-D02 3S02-3 E5
D23 XIO-D03
NAND-ALE
NAND-CLE
D22
C21
ALE
NAND
03
04
C23
B23
XIO-D04
XIO-D05
3S02-4 E6
CLE 05

XIO-A00 J25
00
06
07
A22
E22
XIO-D06
XIO-D07 3S03 F6
XIO-A01 J26 XIO_D F24 XIO-D08
B XIO-A02
XIO-A03
H21
H22
01
02
08
09
F25
F26
XIO-D09
XIO-D10
B 3S04-1 F6
03 10
XIO-A04
XIO-A05
H23
H24
04
05
11
12
E23
E24
XIO-D11
3S04-2 F3
IS26 3S15
H25 E25
XIO-A06
XIO-A07 H26
06
07
13
14
E26
INPACK
XIO-D14
INPACK
10K
3S15 B9
XIO-A08 G21 XIO_A D24 XIO-D15
08 15
XIO-A09
XIO-A10
G22
G23
09
B22 XIO-OEn
3S1R F10
10 OE_
XIO-A11
XIO-A12
G24
G25
11
12
XIO
WE_
C22 XIO-WEn
3S1S F10
XIO-A13 G26 B21
XIO-A14
XIO-A15 IS25
F22
F23
13
14
CLK_BURST
E21 NAND-CE1n
3S1T G10
15 CE1_
C CE2_
NAND RDY2
D21
A20 C 3S1U G10
F21
RDY1
WP_
A21 9S08
NAND-RDY1n
NAND-WPn 3S23 G10
IS00
3S24 G10
3S28 G10
3S29 G10
7S00-11 E7
D D 7S00-5 A7
7S02 F2
9S00 F8
7S00-11
9S01 F4
PNX85500
9S08 C8
CA-MDI0 3S01-1 8 1 P21 VIDEO_STREAM N26 CA-MDO0
CA-MDI1 33R 7 3S01-2 2 P22
0
1
0
1
M21 CA-MDO1 IS00 C8
E CA-MDI2
CA-MDI3
3S01-3 6 3 33R
33R 5 3S02-4 4
P23
P24
2
3
2
3
M22
M23
CA-MDO2
CA-MDO3
E IS25 C6
CA-MDI4 7 3S02-2 2 33R P25 MDI MDO M24 CA-MDO4
4 4
33R 8 3S02-1 1
CA-MDI5
CA-MDI6 6 3 33R
P26
N21
5
6
5
6
M25
M26
CA-MDO5
CA-MDO6 IS26 B9
CA-MDI7 3S02-3 33R 5 3S01-4 4 N22 L21 CA-MDO7
7 7
33R
CA-ADDENn J22
ADD_EN
+3V3
CA-DATADIR K25 K23 CA-VS1n
DATA_DIR 1
VS K24 9S00 CA-MOCLK
2S09 2
*
CA-DATAENn K26 RES
DATA_EN
K21 CA-CD1n
100n 3S03 1
CA-MICLK N23 CD K22 CA-CD2n
I 2
F 7S02
74LVC1G08GW
10R
L25
MCLK
CA F
5

CA-MOCLK O
1 3S04 +3V3
4 9S01 N24
MISTRT
2 3S31
33R 3S1R
CA-MIVAL N25 TS-FE-DATA
MIVAL
3

CA-MISTRT 33R 560R


CA-MOSTRT L22 TS-FE-CLOCK 3S1S
MOSTRT
560R
CA-MIVAL CA-MOVAL L23 TS-FE-VALID 3S1T
MOVAL
560R
J21 TS-FE-SOP 3S1U
OOB_EN
560R
CA-RDY L24
RDY
G CA-RST L26
RST DATA
T21 TS-FE-DATA TS-FE-DATA 3S23 G
T23 TS-FE-ERR RES 470R
ERR
J23 T22 TS-FE-CLOCK TS-FE-CLOCK 3S24
VCCEN TNR_SER1 MICLK
R23 TS-FE-VALID RES 470R
MIVAL
J24 R22 TS-FE-SOP TS-FE-VALID 3S28
VPPEN SOP
470R
TS-FE-SOP 3S29
470R

H H 1X06
EMC HOLE

1 2 3 4 5 6 7 8 9 10 11 12 13 14
7 2010-03-03

PNX85500
8204 000 8950

18770_976_100713.eps
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2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 135

PNX SDRAM

PNX SDRAM
B02B B02B
1 2 3 4 5 6 7 8 9 10 11
2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
3S06 D3
A A 3S07 D3
3S0V F8
3S20 D2
3S22 D2
3S30 C7
3S33 C8
3S6P E10
B B 3S6Q E10
7S00-8
PNX85500
DDR2-BA0 H1 MEMORY J1 DDR2-A0
7S00-8 B6
0 0
DDR2-BA1
DDR2-BA2
H2
G1
1 BA 1
J3
K1
DDR2-A1
DDR2-A2
FS01 D3
2 2

DDR2-DQM0 D1 M0
3
G4
L3
DDR2-A3
DDR2-A4
FS02 D2
0 4
DDR2-DQM1
DDR2-DQM2
D5
R3
1
DM
5
G3
L2
DDR2-A5
DDR2-A6
IS42 E8
2 6
DDR2-DQM3 T5 H5 DDR2-A7
3 7
L1 DDR2-A8
A 8
DDR2-D0 F3 J5 DDR2-A9
0 9
C +1V8
DDR2-D1
DDR2-D3
C2
F2
1
2
10
11
J2
M3
DDR2-A10
DDR2-A11 C
DDR2-D2 C3 J4 DDR2-A12
3 12
DDR2-D6 B4 M2 DDR2-A13
4 13
DDR2-D5 F1 K5 DDR2-A14
5 14
DDR2-D4 C1
6
DDR2-D7 E1 N5 3S30 DDR2-CLK_N
7 N
100u 2.0V

F4 CLK N4 10R 3S33 DDR2-CLK_P


180R 1%

180R 1%

DDR2-D8 8 P
3S20

3S06

2S12

DDR2-D9 B2 10R
9
DDR2-D10 E5 E2 DDR2-DQS0_N
10 N
DDR2-D11 C5 DQS0 E3 DDR2-DQS0_P
FS02 11 P
DDR2-D12 A4
DDR2-VREF-CTRL3 FS01 12
DDR2-D13 G5 D3 DDR2-DQS1_N
DDR2-VREF-CTRL2 13 N
B3 DQS1 D4 DDR2-DQS1_P
180R 1%

DDR2-D14 14 P
3S22

D DDR2-D15 F5
U3
15
DQ R1 DDR2-DQS2_N D
180R 1%

DDR2-D16 16 N
3S07

DDR2-D17 P2 DQS2 R2 DDR2-DQS2_P


17 P
DDR2-D19 U2
18
DDR2-D18 P3 T3 DDR2-DQS3_N
19 N
DDR2-D22 N1 DQS3 T4 DDR2-DQS3_P
20 P
DDR2-D23 U1
21
DDR2-D20 P1 K3 DDR2-CAS
22 CASB 3S6Q
DDR2-D21 T1 K4 DDR2-CKE DDR2-CKE
23 CKE
DDR2-D24 V4 L5 DDR2-CS 10K
24 CSB
DDR2-D30 R5 M4 DDR2-ODT
25 ODT
DDR2-D26 U5 M1
26 PCAL 3S6P
DDR2-D25 P5 M5 DDR2-RAS DDR2-ODT
27 RASB
DDR2-D28 N3 H3 DDR2-WE 10K
28 WEB
E DDR2-D31
DDR2-D27
V3
R4
29
30 1
A2 DDR2-VREF-CTRL2
E
DDR2-D29 V5 VREF V1 DDR2-VREF-CTRL3
31 2

IS42

2S20

2S17

1%
2S24

2S25
100p

100n

100n

100p

3S0V

261R
F F

1 2 3 4 5 6 7 8 9 10 11

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 136

PNX Digital Video In

PNX Digital Video In


B02C B02C
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2S2E F5
B02C PNX 85500 : DIGITAL VIDEO IN B02C 3S0W E5
7S00-6 D6
A A IS01 E6
IS10 E7

B B

C C

D D
7S00-6
PNX85500

HDMIA-RX2+ T25 HDMI_DV


P
HDMIA-RX2- T26 RX0_A
N

HDMIA-RX1+ U25
P
HDMIA-RX1- U26 RX1_A Y26 DDCA-SCL
N SCL
DDC_A Y25 DDCA-SDA
SDA
HDMIA-RX0+ V25 IS10
P
HDMIA-RX0- V26 RX2_A T24
N HOT_PLUG_A
E HDMIA-RXC+ W25
P
E
HDMIA-RXC- W26 RXC_A
N
+3V3 IS01
3S0W W24
RREF
12K
2S2E

10u

RES

F F

G G

H H

I I

1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 137

PNX Audio

PNX Audio
B02D B02D
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2S2G C12 3S19 H5
2S2H D12 3S25 H9
2S2J G12 3S32 G12
A A 2S2K F12 3S34 G11
2S2L D4 3S36-1 C12
3S0Z
3S53-1 +2V5-AUDIO +24V-AUDIO-POWER 2S2R B7 3S36-2 B11
4R7 +24V-AUDIO-VDD
100R +3V3 2S2S B9 3S36-3 D11
3S53-2

2S3J

220n
100R
7S08
LD3985M25 2S2T B8 3S36-4 D12
1 1 3S16-1 8
AUDIO-IN1-L
3S12-1 8 10K
2S2W 3S53-3 FS08 5
OUT IN
1
FS03
2S2V B3 3S37 F11
22K 100R IS12 4
1u0 IS13 3S14
2S2W B3 3S38 B13

RES
4 3 ADAC(1) 12 7S05-4
2 BP INH
B 3S53-4 +2V5 LM324 14 3S38
B

2S2R

2S2S
3S16-2 7

10u
2 3S12-2 2S2V 22K +AUDIO-L
AUDIO-IN1-R 7 10K COM IS02 13
2S2Y C3 3S39 C13

10u
100R 100R

2S2T

100n
22K 1u0 11

2S34

100n
2S2Z B3 3S3F E4

2
3S16-3 3 6
3S12-3 6 2S2Z
3 10K
AUDIO-IN2-L
22K 1u0 10K
2S30 C3 3S3G-1 C7
2 3S36-2 7

4 3S12-4
IS0V 4
3S16-4 5
2S2Y 10K
8 3S36-1 1 2S31 C3 3S3G-2 D8

100u 4V
3S51

2S42

2S41
10K

4R7
5

1u0
AUDIO-IN2-R 2S2G
22K 1u0 2S32 D3 3S3G-3 C8
47p
4 3S17-4 5
AUDIO-IN3-L
3S13-4 IS0R
10K
2S31 7S00-2
PNX85500 +24V-AUDIO-VDD
2S33 C3 3S3G-4 D7
C 4
22K
5
3
1u0
AE10 AUDIO AC7
2S36
1
3S3G-1
8 ADAC(1)
C 2S34 B9 3S3H D7
6 L P
3S17-3 AF10 AIN1 ADACL AB7
AUDIO-IN3-R 3
3S13-3
6 10K
2S30 R N 1u0 IS1N 33R
3
3S3G-3
6 ADAC(2) ADAC(2)
IS03
10
4
7S05-3
LM324 8 3S39
2S36 C6 3S3U D8
AD10 AC6 -AUDIO-R
22K
3S17-1
1u0
AC10
L
R
AIN2 ADACR
P
N
AB6
33R
9
100R 2S38 E9 3S51 C6
1 8
3S13-1 2S33
AUDIO-IN4-L
1 22K 8
10K AE9
AF9
L
AIN3
1
AD7
AE7 2
3S3G-2
7 ADAC(3)
11
2S39 E9 3S53-1 A6
1u0 R 2
3S17-2
2
7 AD9 ADAC
3
AF7
AD6 4 3S3G-4 5
33R
ADAC(4)
2S3A E8 3S53-2 B6
2S32 L 4
2 3S13-2 IS1S
AUDIO-IN4-R
22K
7
10K

1u0
AC9
R
AIN4
5
6
AE6
AF6
33R
2S3B E8 3S53-3 B6
AF8
D AE8
L
R
AIN5
OSCLK
AD4 3 3S36-3 6
10K
D 2S3C E8 3S53-4 B6
3S10 AD1 5 3S36-4 4
10K
2S2L 100R AB9
AB8
POS
I2S_OUT
VR_AADC
SCK
WS
AD2
3S3H
ADAC(5) 2S2H 2S3D E8 3S6L F12
1u0 IS1B NEG 33R
IS19
AD8
1
AE1
AF2
3S3U
ADAC(6)
47p 2S3E E3 3S6M H8
VREF_AADC 2
IS1A AC8
I2S_OUT_SD 3
AE3
AF3 33R
+24V-AUDIO-VDD
2S3F E2 7S00-2 C5
VCOM_AADC 4
3S3F
AF5
SPDIF_OUT
2S3G E3 7S05-1 E12

2S3D

2S3C

2S3B

2S3A

2S39

2S38
1n0

1n0

1n0

1n0

1n0

1n0
56R DBS8 AE5
SPDIF_IN1 IS07 4 2S3H E3 7S05-2 G12
2S3G
2S3H
2S3E
2S3F

100n

100n

3 7S05-1
10u

10u

ADAC(5)
LM324 1
2S3J B11 7S05-3 C12
9S06

AUDIO-OUT-L
E 2 E
11 2S3K G6 7S05-4 B12
2S3L H8 7S08 B8
2S3M H9 7S09-1 G6
3S37 3S6L
2S3Q G5 7S09-2 H6
10K 22K 2S41 C6 7S09-3 H7
2S2K

+3V3
2S42 C6 7S09-4 I7
47p
F +3V3-ARC F 3S0Z A11 9S06 E4
+24V-AUDIO-VDD

3S11
3S10 D4 DBS8 E4
IS1L
1R0 3S11 F5 FS03 B12
4 3S12-1 B2 FS08 B7
2S3Q

100n

ADAC(6) 5 7S05-2
LM324 7
IS06
6
AUDIO-OUT-R
3S12-2 B2 IS02 B11
7S09-1
11 3S12-3 B2 IS03 C11
14

74LVC00APW
G SPDIF-OUT-PNX SPDIF-OUT-PNX
IS1D
1 & 2S3K G 3S12-4 C2 IS06 G11
3 IS1G 1 3S18-1 8 SPDIF-OUT
2
100n 220R 3S34 3S32
3S13-1 C2 IS07 E11
2 3S18-2 7

3 3S18-3 6
+3V3
220R
3S13-2 D2 IS0R C2

220R
7

+3V3 10K 22K


2S2J
3S13-3 C2 IS0V C2
+3V3-ARC 47p
3S13-4 C2 IS12 B8
3S19

+3V3-ARC
10K

7S09-2
14

74LVC00APW 7S09-3
3S14 B9 IS13 B9
14

4 & 74LVC00APW
6 9 & IS1K IS44
SEL-HDMI-ARC
IS1E
5 8
2S3L 180R 2S3M
eHDMI+ 3S16-1 B3 IS19 D3
H +3V3
10
100n 3S6M 100n H
3S16-2 B3 IS1A D3
7

IS1B D4
3S25
3S16-3 B3
68R
3S16-4 C3 IS1D G5
+3V3-ARC 3S17-1 C3 IS1E H5
7S09-4 3S17-2 D3 IS1G G7
14

74LVC00APW
12 &
11
3S17-3 C3 IS1K H9
I +3V3
13 I 3S17-4 C3 IS1L F5
7

3S18-1 G7 IS1N C7
3S18-2 G8 IS1S D7
3S18-3 G8 IS44 H9
1 2 3 4 5 6 7 8 9 10 11 12 13 14

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 138

PNX Mips

PNX Mips
B02E B02E
1 2 3 4 5 6 7 8 9 10 11 12 13 14
1F10 A12
2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
+3V3 3S40 A1
A 7S00-3
PNX85500 A 3S45 A1
CONTROL 1 3S56 2 3S69 1F10
3S45 IS05 SDA
C25
2 3S57
SDA-UP-MIPS SDA-UP-MIPS
FS44
3S55 C3
BOOTMODE 1 C26 100R 1 SCL-UP-MIPS SCL-UP-MIPS 3S6A 4K7 4K7 EJTAG-TRSTn-PNX85500
+3V3
10K
SCL
100R EJTAG-TMS-PNX85500 FS49
1
2
3S56 A5
BOOTMODE Y21 B26 1 3S58 2 SDA-SET SDA-SET 3S6B 4K7 EJTAG-TDO-PNX85500 FS50
+3V3
3S40
GPIO1 GPIO1 Y22
GPIO_0
2
SDA
A25 100R 1 2 3S5W SCL-SET SCL-SET 3S6C 4K7 EJTAG-TCK-PNX85500 FS51
3 FOR FACTORY 3S57 A6
GPIO_1 SCL 4
10K
DS52
RXD1-MIPS Y23
Y24
GPIO_2
B25 1 3S5Y 2
100R
3S6D 2K2
EJTAG-TDI-PNX85500 FS52
5 USE ONLY 3S58 A5
TXD1-MIPS GPIO_3 SDA SDA-SSB SDA-SSB 6
+3V3
3S82 RES
BOOST-PWM RXD2-MIPS W21
GPIO_4
3
SCL
A24 100R 1 2 3S5Z SCL-SSB SCL-SSB 3S6E 2K2 EJTAG-DETECTn FS53
7
3S5W B6
TXD2-MIPS W22 100R
3S80
10K
FS10 TXD2-MIPS PNX-SPI-CS-AMBIn W23
GPIO_5
B24 1 3S60 2 SDA-TUNER SDA-TUNER 3S6F 4K7 10 9
8 3S5Y B5
+3V3 GPIO_6 SDA
3S81 10K FS11 RXD2-MIPS V22 4 A23 100R 1 2 3S61 3S6G 4K7
+3V3 PNX-SPI-CS-BLn GPIO_7 SCL SCL-TUNER SCL-TUNER 3S5Z B6
B +3V3
3S21
10K
PNX-SPI-CS-AMBIn
BOOST-PWM
SELECT-SAW
V23
U23
GPIO_10
GPIO_11 TRSTN
AA25
100R
EJTAG-TRSTn-PNX85500 EJTAG-TRSTn-PNX85500 3S6K B 3S60 B5
IS04 AA24 EJTAG-TMS-PNX85500 EJTAG-TMS-PNX85500 1 8 3S6H-1 10K +3V3
10K FS57
USB-DM R26
DN
TMS
TCK
AA23 EJTAG-TCK-PNX85500 EJTAG-TCK-PNX85500 10K 3 6 3S6H-3
+3V3-STANDBY BM08B-SRSS-TBT 3S61 B6
3S62 PNX-SPI-CS-BLn
R25 AB26 10K 2 7 3S6H-2
+3V3 USB-DP
IS4Z R24 DP USB TDO
AB25
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500 10K 4 5 3S6H-4
3S62 B1
10K RREF TDI
3S00
10K 3S64 C1
AE4 RESET-SYSTEMn
RESET_SYS
3S55 3S65 E11
5K6
3S64 FS64 33R
SELECT-SAW AD5 BACKLIGHT-PWM
+3V3 BL_PWM 3S66 E11
10K
CLK_54_OUT
AC5 3S67 E11

3S26

3S27
3S6J

10K

10K

10K
3S68 E11
C +3V3
3S83
RXD1-MIPS
C 3S69 A9
10K
+3V3 +3V3
3S6A A8
3S84
+3V3 TXD1-MIPS
3S72 IS40 3S6B A9
10K PXCLK54
47R
3S6C B8
3S6D B9
3S6E B8
RES
3S6F B9
3S6G B8
D D 3S6H-1 B8
+3V3 3S6H-2 B9
2S89
3S6H-3 B9
3S6H-4 B9
100n +3V3
3S6J C5

3
7S01
PCA9540B 3S65
3S6K B9
VDD SC0 5 SCL-DISP SCL-DISP 2 1
3S72 C6
3S66 4K7
SC1 8 SCL-BL SCL-BL 2 1 3S80 B1
3S67 4K7
E SCL-SET 1 SCL
I 2 C
SD0 4 SDA-DISP SDA-DISP 2 1
E 3S81 B1
INP 4K7
SDA-SET 2 SDA FIL
-BUS
CTRL SD1 7 SDA-BL SDA-BL 2
3S68
1 3S82 B1
4K7
VSS
3S83 C1
3S84 C1

6
FS31 7S00-3 A4
7S00-4 G12
7S01 E8
9S10 SCL-BL 9S10 F8
IS08 9S11 F8
F SCL-SET 9S11 FS2W SCL-DISP
F 9S12 F8
9S12 FS2Y SDA-DISP
IS09 9S13 F8
SDA-SET 9S13 SDA-BL
DS52 B2
FS10 B2
FS11 B2
7S00-4
PNX85500 FS2W F9
ETH-RXCLK AA3 ETHERNET FS2Y F9
RXCLK
FS31 F8
G ETH-RXD(0)
ETH-RXD(1)
Y5
Y6
0
1 TXCLK
AA2 ETH-TXCLK
G FS44 A12
ETH-RXD(2) IS50 AB4 RXD ETH
ETH-RXD(3) AC1
2
AA1 ETH-TXD(0)
FS49 A12
3 0
AA4
ETH-RXDV AC2 TXD
1
AB1
ETH-TXD(1)
ETH-TXD(2)
FS50 A12
RXDV 2
ETH-RXER Y4
RXER 3
AB2 ETH-TXD(3) FS51 B12
ETH AA5 ETH-TXEN
SDIO-DAT3 W2
CC_DAT3
TXEN
TXER
AB3 ETH-TXER FS52 B12
W1 AC3
SDIO-CLK
SDIO-CMD W6
CLK COL
Y2
ETH-COL
ETH-CRS
FS53 B12
CMD CRS
SDIO-DAT0 W5
0 MDC
Y3 ETH-MDC FS57 B12
SDIO-DAT1 W4 SDIO Y1 ETH-MDIO
1 DAT MDIO
SDIO-DAT2 W3
2
FS64 C2
H SDIO-CDn
SDIO-WP
U6
V6
SDCD
SDWP
H IS04 B2
IS05 A2
IS08 F8
IS09 F8
IS40 C6
IS4Z B4
IS50 G12

1 2 3 4 5 6 7 8 9 10 11 12 13 14

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 139

PNX Video Out - LVDS

PNX Video Out - LVDS


B02F B02F
1 2 3 4 5 6 7 8 9 10 11 12 13 14
7S00-7 C8

A A

B B

C 7S00-7
PNX85500 C
PX1A- A7 LVDS D7 PX3A-
N N
PX1A+ B7 A A E7 PX3A+
P P

PX1B- C8 E8 PX3B-
N N
PX1B+ B8 B B D8 PX3B+
P P

PX1CLK- C10 E10 PX3CLK-


N N
PX1CLK+ B10 CLK CLK D10 PX3CLK+
P P

PX1C- A9 LOUT1 LOUT3 D9 PX3C-


N N
PX1C+ B9 C C E9 PX3C+
P P
D PX1D- A11
N N
D11 PX3D- D
PX1D+ B11 D D E11 PX3D+
P P

PX1E- C12 E12 PX3E-


N N
PX1E+ B12 E E D12 PX3E+
P P

PX2A- A14 D14 PX4A-


N N
PX2A+ B14 A A E14 PX4A+
P P

PX2B- C15 E15 PX4B-


N N
PX2B+ B15 B B D15 PX4B+
P P

PX2CLK- C17 E17 PX4CLK-


N N
B17 CLK CLK D17
E PX2CLK+ P
LOUT2 LOUT4
P PX4CLK+
E
PX2C- A16 D16 PX4C-
N
PX2C+ B16 N C E16 PX4C+
C P
P
PX2D- A18 D18 PX4D-
N
PX2D+ B18 N D E18 PX4D+
D P
P
PX2E- C19 E19 PX4E-
N
PX2E+ B19 N E D19 PX4E+
E P
P

F F

G G

1 2 3 4 5 6 7 8 9 10 11 12 13 14

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 140

PNX Stand-by Controller

PNX Stand-by Controller


B02G B02G
1 2 3 4 5 6 7 8 9 10 11 12 13
1S02 B8
2S10 B6
2S11 B5
2S13 B6
2S37 B5
A A 2S4D C3

+1V1
2S4E E2

POL
2S4F B9
IS3B
2S4G B9
2S4K G10

5S04
RES

30R

2S10

100n
1u0
2S13 3S1B C2
2S37 3S1C C1
1u0 3S1D C2

9S24
RES
B 2S11 B 3S1E C1
100n IS20
3S1F C2
DS50 2S4G
3S1G D2

3
1 10p 3S1H D1

AC17
AA17

AF26

1S02

54M
7S00-9
PNX85500 2S4F 3S1J D2

VDDA_1V1_DCS

VDDA_ADC2V5

VDD_XTAL
AE17
3S1K D1

1
+3V3-STANDBY 2S4D XTAL_IN 10p +3V3-STANDBY
3S1B 1n0 AD19
RC RC 0
3S1C RES 10K
3S1D
TACHO TACHO AE19
1 XTAL_OUT
AF17 3S1L E2
10K CEC-HDMI CEC-HDMI AF19
2 P1
3S1E RES 27K BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP AA20
3 RESET_IN
AA26 RESET-STBYn 3S1P D11
C +3V3-STANDBY
10K 3S1F
10K
SDM SDM AB20
7
STANDBY EA
AB24 EA EA
IS3F 3S44 C 3S2A D2
3S3L RES AC20
3S3M 10K
LCD-PWR-ONn
EJTAG-DETECTn
LCD-PWR-ONn
EJTAG-DETECTn AD20
0
AB23 ALE
ALE IS3E 10K 3S43 3S2F D7
3S3N RES 1 ALE
3S3P
10K
10K
LAMP-ON
STANDBY
LAMP-ON
STANDBY
AE20
AF20
2
AC26 PSEN PSEN
IS3D
10K 3S42
10K 3S2G D7
3 PSEN
RES 3S3S
10K 3S3Q RES FAN-CTRL1 FAN-CTRL1 AA21
4
P2
3S2F 100R RES 3S6V
3S2H D7
10K FAN-CTRL2 FAN-CTRL2 AB21 AC23 SDA-UP-MIPS SDA-UP-MIPS
10K 3S3R POWER-OK POWER-OK AC21
5
6
MC
SDA
SCL
AC24 3S2G 100R SCL-UP-MIPS SCL-UP-MIPS 4K7 3S6W 3S2K D7
3S3T 10K RES ENABLE-3V3n ENABLE-3V3n AD21
+3V3-STANDBY 10K
7
0
AD26 3S2H 100R LED1
LED1 RES 3S1P 4K7 RES
3S2L D10
3S1G 3S2K 100R
AE21 PWM AC25 LED2 10K 3S41
3S1H 10K
RXD-UP
TXD-UP
RXD-UP
TXD-UP AF21
0 1 LED2
3S2M E10
1 10K
10K
3S2A RES
DETECT2 AA22
2 SDO
AE23 PNX-SPI-SDO 3S2S E10
D 10K
DETECT2 AB22
AC22
3
4
P3
SPI
SDI
CLK
AF25
AF24
PNX-SPI-SDI
PNX-SPI-CLK
D 3S2V F11
AD22 AF23 PNX-SPI-CSBn
3S1K RES
5 CSB
3S3L C2
RESET-SYSTEMn RESET-SYSTEMn AD23 AB17 IS2V CTRL-DISP CTRL-DISP RES 3S2L
10K AV2-BLK AE26
0 0
AA18 IS2Z RESET-DVBS RESET-DVBS 10K RES 3S46 3S3M C1
1 1 RES 3S3Y
AE25 P5 AD18 10K
3S1J KEYBOARD
AV1-BLK
KEYBOARD AE24
2 2
AE18
RESET-USBn
RESET-ETHERNETn
RESET-USBn
RESET-ETHERNETn 10K RES 3S47 +3V3-STANDBY 3S3N C2
3 3
100K 2S4E LIGHT-SENSOR
AF22
P0
4
AF18
AA19
SEL-HDMI-ARC SEL-HDMI-ARC
10K
3S2S
RES
10K
3S2M
3S3P C1
AV1-STATUS 4 5 RESET-AVPIP RESET-AVPIP

VSS_XTAL
100n AV2-STATUS AE22
5
P6
6
AB19 RESET-AUDIO RESET-AUDIO 3S3W 10K RES 3S3Q C2
AC19 AUDIO-MUTE-UP AUDIO-MUTE-UP 4K7 3S49
7
3S3R D2

AD17
3S1L
SPI-PROG SPI-PROG 4K7
PNX-SPI-WPn
10K 3S3S D1
E E 3S3T D1
3S3W E9
3S3Y D9
3S41 D12
3S42 C11
3S43 C11
3S44 C11
F F 3S46 D10
+3V3-STANDBY +3V3-STANDBY 3S47 E10
3S49 E10

1 3S2V 2
3S6V C11

10K
3S6W D12

9S0E
FS0Z
7S20 RESET-STBYn
NCP303LSN28 5S04 B6
2
FS45
1 IS2U
INP
OUTP
1 7S00-9 B6
5
CD
NC GND
7S20 G10
G G 9S0D G9

3
9S0E G9

9S0D

2S4K

100n
RES
9S24 B6
DS50 B8
FS0Z G11
FS45 G9
IS20 B6
IS2U G10
H H IS2V D7
IS2Z D7
IS3B A6
IS3D C10
IS3E C10
IS3F C10
1 2 3 4 5 6 7 8 9 10 11 12 13

7 2010-03-03

PNX85500
8204 000 8950

18770_982_100713.eps
100713

2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 141

PNX Power

PNX Power
B02H B02H
1 2 3 4 5 6 7 8 9 10 11 12 13 14
IS3Q 5S80 2S21 F6
+1V1 2S23 B6
30R

RES 10u
2S26 A6

2S6A

2S5A
100n
2S27 B3
2S28 B3

1
2S29 C6
5S81
2S43 B2
A +2V5
A

2
30R 2S45 F11

RES 10u
2S46 F11

2S6B

2S5B
100n
2S4M B12
2S4N C11

1
+1V8
IS3S 5S82 2S4P C11

2S26

2S60

2S61

2S62

2S63

2S64

2S65

2S66

2S67

2S68
100n

100n

100n

100n

100n

100n

100n

100n

100n
47u
+3V3 2S4Q B3
30R 2S4R B4

RES 10u
2S5C

2S5D
100n
2S4S F5
2S4T H11
2S4U D11
SENSE+1V1 c001
5S93 2S4V D11
7S00-10

G6

G7
R6
R7
U7

C6
D6
A5
A6
B5
B6

E6
2S4W D11

F6

F7
L6
L7
+2V5
B PNX85500 30R
B

2S6E 2

220u 6.3V
VDD_1V8 2S4Y D11

2S4M
2S6D

100n

100n
+1V1 AF1 V20
2S4Z E11

7
AE2 HDMI_VDDA_1V1 V21

5
AD3 2S50 E11

1
2S5G-1

2S5G-2

2S5G-3

2S5G-4

2S5H-1

2S5H-2

2S5H-3

2S5H-4
2S4Q

2S4R
2S43

2S28

2S27

2S23
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n
AC4 VDD U20

22u

22u

47u
2S51 E9

1
AB5 HDMI_VDDA_2V5 U21
H20 2S52 E9

4
F11 U22 +2V5-LVDS 2S53 H11

2
HDMI_VDDA_3V3_TERM
G11
F13 N6 2S55 G11

2S4N

2S4P
2S56 G11

100n
G13 VDD_2V5 N7

10u
F15
2S57 G11

2S5J-3 6

2S5J-1 8
8

5
G15 C7

2S5K-1

2S5K-2

2S5K-3

2S5K-4

2S5J-2

2S5J-4
2S58 H11
C C

100n

100n

100n

100n

100n

100n

100n

100n

100u 2.0V
F17 C9
G17 C11 2S59 I11
2S29 5S85
F19 VDD_2V5_LVDS C14

4
+3V3 2S5A A11

2
1 2S6G 2
G19 C16

1
30R

2S6N

2S6C

2S6P
2S6F
2S5B A11

100n

100n

100n

100n
J9 C18

10u
J11
2S5C B11
AA16
AA8
Y11
Y14

J13 W20
Y16
Y9

7S00-12

1
PNX85500 J15 P20 2S5D B11
VSSA J17 M20 2S5G-1 B4
A1 M7 L9 VDD_3V3 K20
A10 N2 L11 V7 +3V3-STANDBY 2S5G-2 B4

2S4U
2S4V
2S5G-3 B4

100n
A12 N20 L13 Y8

10u
A15 P10 L15
A17 P12 L17
VDD_1V1
Y19
2S5G-4 B5
2S5H-1 B5
D A19
A26 VSS
P14
P16
N9
N11
VDD_3V3_SBY Y18
IS3K 5S83
D 2S5H-2 B5
A3 P18 N13 B13
A8 P4 N15
VDDA_1V1_LVDS_PLL +1V1 2S5H-3 B5
IS3L 30R

2S4W
2S4Y
2S5H-4 B5

100n
B1 P6 N17 AA15

RES 1u0
B20 P7 R9 Y15
C20 T10 R11
VDDA_1V2
AA13
2S5J-1 C5
C4 T12 R13 5S95 +2V5
2S5J-2 C5
D2 VSS T14 R15 Y12 2S5J-3 C5
VSS VDDA_2V5 5S84
D20 T16 R17
30R 2S5J-4 C5

6.3V
E13 T18 U9 AA9 +1V2
VDDA_2V5_AADC 30R

2S4Z
2S51

2S52

2S50
100n

100n
E20 T2 U11 2S5K-1 C4

10u
E4 T6 U13 AA7 c000 SENSE+1V2
2S5K-2 C4

10u
VDDA_2V5_ADAC
F10 T7 U15
2S5K-3 C4
E F12
F14
U4
V10
U17
J6
VDDA_2V5_DCS
Y17
E 2S5K-4 C5
F16 V12 AA6 D13
F18 V14 Y7
VDDA_2V5_LVDS_BG 2S5M G11
POL
F20 V16 W7 T20 2S5P F5

VSSA_1V1_LVDS_PLL

VSSA_2V5_LVDS_BG
VDDA_2V5_USB
F8 V18 F9
G10 V2 G9 Y13
2S60 A6
VDDA_2V5_VADC +2V5-AUDIO
G12 Y20 2S61 A6

V24 HDMI_AGND
5S94

2S46

100n
J7 Y10 2S62 A7

VSSA_USB
VSS +1V1 VDD_1V1_DDR VDDA_2V5_VDAC
30R
2S63 A7
2
G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6

R21
VDDA_3V3_USB
2S4S

2S5P

2S21
100n

2S64 A7
10u

1u0

RES
2S65 A7

U24

A13

C13

R20
1

2S66 A7
F +2V5-AUDIO F 2S67 A8

2S45

100n
2S68 A8
2S6A A11
2S6B A11
5S87
2S6C C11
+2V5
30R 2S6D B11
2S6E B11

2S55

2S56
100n

1u0
2S6F C11
2S6G C11
2S6H H11
G 5S88
+2V5-LVDS
G 2S6K H11
30R 2S6L I11

2S5M

2S57
100n

10u
2S6M I11
2S6N C11
5S89 2S6P C12
+2V5 2SHW I11

2
30R 5S80 A12

2S6H

2S6K
100n

100n
2S58

10u
5S81 A12

1
5S82 A12
5S83 D12
H 5S90
+2V5
H 5S84 E12
30R 5S85 C12

2S4T

2S53
100n
5S87 F12

10u
5S88 G12
5S89 H12
5S90 H12
5S92 I12
5S93 B12

2SHW

100n
5S94 F5
5S95 E10
I I 7S00-10 B6
IS58 5S92
7S00-12 C1
+3V3

2
30R IS3K D10

2S6M

2S6L

2S59
100n

100n

1u0
IS3L D10
IS3Q A10

1
IS3S A10
IS58 I10
c000 E13
c001 B5

1 2 3 4 5 6 7 8 9 10 11 12 13 14
7 2010-03-03

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8204 000 8950

18770_983_100713.eps
100713

2010-Nov-12 back to
div. table
Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 142

PNX Analog Video

PNX Analog Video


B02I B02I
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2S14 D12
2S15 D12
2S16 D12
AV1-CVBS 2S87
2S18 D12
22n 2S8A 9S17 Y-SVHS
2S19 D12

3S59
47R
Connectivity 22n
2S22 A11

3S5B
47R
A A 2S40 B11
AV1-R 2S7J 2S75 F11
22n 2S22 C-SVHS 2S76 F11

3S4J
56R
22n 2S77 F12

3S05

56R
2S78 G12
2S7E G6
EU: SCART1 CVBS-MON-OUT1 2S7H B6
AV1-B 2S7K
AP: - 2S7J A6

3S5E

560R
22n

2S7K B6

3S4L
56R
B B 2S7L C6
IS4V
2S7M C6
2S7N D6

560R
2S40

3S08
47p
2S7H
AV1-G 2S7P D6
22n 2S7Q E6

3S4K
56R
IS4W
2S7R F6
2S7U F6

3S09

8K2
2S84 G6
C 2S7M
C 2S85 H6
YPBPR1-SYNCIN1
10n 2S86 H6
2S7L
AV3-Y 2S87 A6
22n
2S8A A11

3S4P
56R
2S8G E6
AV3-PR
2S7N 3S05 A11
EU: YPBPR1 22n 3S08 B11

3S4R
56R
D AP: YPBPR1
7S00-1
PNX85500 D 3S09 C11
2S7P ANALOG_VIDEO 3S4G G6
AV3-PB
22n
AB15
CVBS_Y1 ATV_CVBS_Y3 AC12 3S4J A6

2S19

2S18

2S16

2S15

2S14
3S4T
AC13 IS5C

56R
AF13

22n

22n

22n

22n

22n
AD13
R C3 3S4K C6
B AV1
AE13
G CVBS_Y7
AD11
AC11
3S4L B6
C7
AV2-CVBS 2S8G AF15
AE15
SYNCIN1 BS13 3S4P D6
AF11
Y_G1 CVBS1_OUT
22n AC15
PR_R_C1 CVBS2_OUT AE11 3S4R D6

3S5L
AD15

47R
PB_B1
RESREF AB10 3S4T D6
AB14 AA11 IS5E 3S5S
E 2S7Q
AF14
CVBS_Y2
SYNCIN2
CURREF
10K E 3S4U F6
YPBPR2-SYNCIN2 AE14
AC14
Y_G2 1 AC16
AB16
IS5D
IS5F
3S4W F6
10n PR_R_C2 2
AD14
PB_B2 3 AB13 IS5G 3S50 H6
REF 4 AB12 IS5H
AF16
R 5 AA12 IS5J
3S75
3S52 H6
AD16 AA10 PNX-IF-AGC
AE16
G VGA
B
6
47K
3S54 I6

2S75
2S7R AB18 BS15

10n
AV4-Y AD12
AC18
HSYNC_IN IF_AGC
AB11 BS17 3S59 A6
22n IN RF_AGC
EU: SCART2 AF4
OUT
VSYNC
3S5B A11
3S4U

AD24 BS09
56R

SCL VGA_EDID P AE12


AP: YPBPR2 AD25
SDA TUNER N AF12 BS10
3S76 IS11 3S5E B11
F +CVBS 47K
PNX-RF-AGC
F 3S5L E6

2S76
AGND

10n
3S5S E9

AA14
AV4-PR 2S7U

22n 3S5T-1 I5
3S4W

3S5T-2 I11
56R

2S77
PNX-IF-P
10n 3S5T-3 I5
3S5T-4 I11
AV4-PB
2S7E 3S5V-1 I5
22n 2S78 3S5V-2 I12
3S4G
56R

G 10n
PNX-IF-N
G 3S5V-3 I5
3S5V-4 I12
2S84
R-VGA 3S75 E12
22n 3S76 F12
3S50
56R

7S00-1 D8
9S14 I3
2S85
G-VGA 9S15 I3
22n
9S17 A13
3S52
56R

H H BS09 F9
BS10 F10
2S86
B-VGA BS13 E9
22n
BS15 F9
3S54
56R

EU: VGA
BS17 F10

4 3S5T-4 5

2 3S5T-2 7

4 3S5V-4 5

2 3S5V-2 7
AP: VGA

100R

100R

100R

100R
H-SYNC-VGA 1 3S5T-1 8 IS11 F13
100R IS4V B10
V-SYNC-VGA 3 3S5T-3 6 IS4W C10
100R
IS5C D9
I VGA-SCL-EDID 3 3S5V-3 6
I IS5D E9
100R IS5E E9
1 3S5V-1 8
VGA-SDA-EDID
IS5F E9
100R
VGA-SCL-EDID-TCON 9S14
* IS5G E9
VGA-SDA-EDID-TCON 9S15
* *
= TCON ONLY IS5H E9
IS5J E9

1 2 3 4 5 6 7 8 9 10 11 12 13 14
7 2010-03-03

PNX85500
8204 000 8950

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100713

2010-Nov-12 back to
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 143

10-15 B03 820400089514 CLASS D


Audio

Audio
B03A B03A
1 2 3 4 5 6 7 8 9 1735 E8 FD06 E8
1D38 E9 FD07 F4
1D50 E8 FD14 A5
1D52 F8 ID05 C8
2D01 F7 ID06 C8

+AVCC
2D02 F4 ID07 C8
7D03-1 +24V-AUDIO-POWER 2D03 E3 ID08 C8
3D09 BC847BS(COL) FD14 2D05 A5 ID09 C7

1
+24V-AUDIO-POWER
2D06 A5 ID10 C7
4R7
A A 2D07 B5 ID11 A4

2D06

220n
2D08 B6 ID12 A5
2D09 C7 ID13 E3

2
3D16 ID12
ID11 2D10 C7 ID14 B3

5D07

220R
5D08

220R
22K
2D11 C8 ID15 B3

10u 35V
GND-AUDIO

2D05
2D12 C8 ID18 C5
2D13 F8 ID19 C5
ID27 ID28
FD01 2D28 ID14 2D24 2D14 E8 ID27 B6
-AUDIO-R
2D16 C4 ID28 B6

220u 35V

220u 35V
1u0 47n 2D17 C4 ID29 C5

8
2D20

2D07

2D19

2D08
220n

220n
6

3D02-1

3D14-4

3D14-3

3D14-2

3D14-1

2D22

2D26
220n

220n
2D19 B6 ID30 C5

4K7

22K

22K

22K

22K
3D02-3
A-PLOP 6 3 2 7D15-1 2D20 B5 ID31 C6
B BC847BS(COL)
B 2D21 D8 ID32 C6

1
4K7
1
2D22 B8 ID33 F4
2D23 B4 ID34 D3
GND-AUDIO GND-AUDIO 2D24 B4 ID35 D3
2D26 B8 ID36 E2
7D10-1
FD03 2D29 ID15 2D23 TPA3120D2PWP 2D27 D8 ID37 D4

19
20

10
12
+AUDIO-L

1
3
2D28 B2 ID38 D5
1u0 47n AVCC L R
2D29 B2 ID39 E2

5
3

3D02-4
PVCC ID32 2D10
Φ 16 3D01-1 D3

4K7
3D02-2 ID19 BSR ID10 5D02 5D05 2D12 RIGHT-SPEAKER
7 2 5 7D15-2 6 3D01-2 D3
BC847BS(COL) ID18
R CLASS-D 15
220n
ID06 ID08 3D01-4 E2

4
4K7 IN R 22u 220R 25V 220u
4 5 AUDIO AMP
L OUT 3D02 B3
C 18
0
L
22
ID31 2D09
ID09 5D01 5D04 ID07 2D11 LEFT-SPEAKER C 3D02 C3
17
1
GAIN
BSL
21 22u ID05 220R 25V 220u
3D02 B4
GND-AUDIO 2D16 ID29 220n 3D02 C4
11
VCLAMP 3D04 E2
2D17 1u0 7
BYPASS 3D06-1 F4
1u0 ID30 4
MUTE 3D06-2 F4
2
AUDIO-MUTE-UP ID37 SD
3D06-3 F3
PGND
AGND L R 3D06-4 F3
A-STBY ID38 GND_HS
3D09 A3

8
9

23
24

13
14

25
3D10-1 D8

5
3D15-4
+3V3-STANDBY 3D10-2 D8
8

8
4K7
3D01-1

3D10-4

3D10-3

3D10-2

3D10-1
D D

2D21

2D27
220n

220n
6 3D10-3 D7
47K

22K

22K

22K

22K
CD10
MAINS SWITCH DETECT 3D10-4 D7
4
7D11-1 2
3D14-1 B8
1

1
BC847BS(COL)
ID34 GND-AUDIO 3D14-2 B8
1 3 +3V3-STANDBY
+3V3-STANDBY ID35 3D14-3 B7
3D01-2
7D11-2 5 2 7 DETECT2 3D14-4 B7
5

BC847BS(COL) 3D15-1 E2
47K
3D01-4

6 4
47K

GND-AUDIO GND-AUDIO 3D15-2 E3

40
39
38
2D03
100p

GND-AUDIO 7D10-2
7D13-1 2 TPA3120D2PWP 3D15-4 D5
4

BC847BS(COL) LEFT-SPEAKER 3D16 A5


ID36 VIA
1 3
GND-AUDIO GND-AUDIO 26 37 5D01 C7
ID39 +AVCC 27 36
VIA 5D02 C7

V_NOM
3D15-1 3D15-2 ID13 6D01
E E

1D50

2D14
7D13-2 5 1 8 7 2 28 VIA VIA 35

10n
BC847BS(COL)
5D03 E7
4K7 4K7 29 34
BZX384-C GND-AUDIO GND-AUDIO 5D04 C8
4
VIA 5D05 C8
3D04
2K2

MAINS-OK
1735 1D38 5D07 A6
30
31
32
33

FD05 5D08 A6
GND-AUDIO GND-AUDIO 5D03 1 1
FD06
2 2 6D01 E3
GND-AUDIO 220R 3 3 7D03-1 A5

2D01
GND-AUDIO FD02

10n
GND-AUDIO 4 7D03-2 F5

2D13
3 7D03-2 1735446-3

10n
BC847BS(COL) 1735446-4 7D10-1 B6
3D06-4 FD07 3D06-2
LEFT-SPEAKER 5 7D10-2 E5
4 100K 5 7 2
100K 7D11-1 D2
4
7D11-2 D3
F 8
3D06-1
1
ID33
RIGHT-SPEAKER
F 7D13-1 E1
7D13-2 E2

V_NOM
100K

1D52
GND-AUDIO 7D15 B3
7D15 C3
2D02
RIGHT-SPEAKER 3
3D06-3
6 CD10 D5
FD01 B1
100K 10u
GND-AUDIO
FD02 F8
FD03 B1
FD05 E8
1 2 3 4 5 6 7 8 9
4 2009-10-22

CLASS D
8204 000 8951

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 144

DC/DC

DC/DC
B03B B03B
2U00 D2 2U04 F4 2U08 G9 2U12 F11 2U16 C10 2U20 B14 2U24 B5 3U01 F1 3U05 E4 3U11 B6 3U19 G9 3U23-1 C9 3U24-1 F9 3U27 D5 5U02 B13 7U01 D8 7U04 E8 FU02 B9 FU06 E8 IU04 G3 IU08 D4 IU12 D7 IU16 E5 IU20 G9 IU24 E3
2U01 E3 2U05 F4 2U09 F9 2U13 F12 2U17 C9 2U21 C6 2U25 B12 3U02 F2 3U08 G2 3U14 D7 3U20 F11 3U23-2 C9 3U24-2 F9 3U28 D5 5U03 A13 7U02-1 B6 CU00 H7 FU03 C14 IU01 F3 IU05 D3 IU09 C6 IU13 D7 IU17 F9 IU21 H9 IU25 F4
2U02 D4 2U06 F1 2U10 F10 2U14 E14 2U18 D9 2U22 D8 2U29 G14 3U03 F3 3U09 H3 3U17 G10 3U21 G13 3U23-3 C9 3U24-3 F9 5U00 C10 6U00 E8 7U02-2 C6 FU00 G13 FU04 F4 IU02 F3 IU06 D3 IU10 B 6 IU14 E8 IU18 F9 IU22 B13
2U03 E2 2U07 H3 2U11 F9 2U15 C10 2U19 B12 2U23 B5 3U00 F1 3U04 D3 3U10 H3 3U18 G10 3U22 G2 3U23-4 C8 3U24-4 F8 5U01 E10 7U00 F1 7U03 E3 FU01 E14 FU05 B9 IU03 F1 IU07 D4 IU11 C6 IU15 C9 IU19 G10 IU23 C9

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

A A

5U03 RES

30R
FU05 5U02 IU22
+12V
30R
7U02-1

2U24

2U23

2U25

2U19

2U20
10u

10u

10u

10u

1u0
SI4952DY
B IU10
7 8 B
2
12V/1V8 CONVERSION

1
3U11

3R3
2U21 FU02 5U00 FU03
+1V8
IU11 220p 3u6

3 3U23-3 6

2 3U23-2 7

1 3U23-1 8

22u
3U23-4

2U15

2U16
47R

47R

47R

47R

47u
7U02-2
SI4952DY

4
5 6
C IU09
4 IU23 C

2U17

1n0
IU15
7U01
SI4778DY

2U18

1n0
3U27 5 6 7 8
IU08 IU12
4
10R 1 2 3

D D
2U00

3U14
10u

3R3
3U04

3R3

2U22
IU06 2U02 IU07
IU05 IU13 220p
3U28

10R

100n
2U01

3U05
100n

3R3

7U04
7U03 SI4778DY
TPS53126PW
5 6 78
IU16
2 23 4
1 1 1 2 3
IU24 11 VBST DRVL 14 IU14
2 2
12V/1V1 CONVERSION
E ENABLE-1V8
3
10
1
2
EN DRVH
1
2
1
12 E
1n0 RES

FU06 5U01 FU01


2U03

+1V1 4 24 +1V1
1 1

STPS2L30A
+1V8 9 VO SW 13

RES 100u 2.0V


2 2 2u0

6U00

2U14
5 22

3U24-4

3U24-3

3U24-2

3U24-1
1 1

3U20

2U12

2U13
8 VFB PGND 15

22u
47R

47R

47R

47R

10R
RES

47u
RES GND-SIG 2 2
7U00 3U02 IU01
BC847BW 21 7
1 1
3 22K 3U03 16 TRIP TEST 17
IU03 2 2
1 22K IU02 GND-SIG
GND-SIG
20 18 FU04 IU17
GND-SIG VIN V5FILT
2 19 IU25
VREG5
F F

2U11

1n0
+3V3-STANDBY 3U00 2U06
+1V1 GND
2U04

2U05
6

10u

1u0

10K 100n
IU18
10K
3U01

GND-SIG

2U09

2U10
1n0

1u0
GND-SIG
3U21 FU00
IU19 SENSE+1V1
100R 1%

3U17

1% 330R

2U29

100n
RES
G IU20 G

100p RES

3U19
2U08

3U18
5K6

1% 1K0
3U08 3U22
IU04
+1V8
330R 1% 1K0 1% IU21
RES 100p
1K0 1%
3U09

3U10

2U07
22K

GND-SIG GND-SIG GND-SIG


CU00

H GND-SIG GND-SIG GND-SIG


GND-SIG
H

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
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DC/DC

DC/DC
B03C B03C
1 2 3 4 5 6 7 8 9 1M95 E1 3U84 D2
1M99 C1 6U40 E3
1U40 E2 7U40-1 F4
2U41 B1 7U40-2 E4
2U42 C2 7U41-1 F4
2U43 D2 7U41-2 F5
2U44 D3 7U42 B5
2U45 D3 7U43 B3
2U46 D3 7U48-1 C6
A +3V3 +3V3-STANDBY A 2U47 E1 7U48-2 E6
2U48 F1 9U41 B5
LED-2
2U49 F1 9U42 B4

RES 10K

RES 10K
3U74

3U75
+5V +3V3-STANDBY
2U50 F1 FU07 C3
IU43
2U51 D1 FU48 C1
9U41
2U52 D1 FU49 C1

RES 10K
2U53 D2 FU50 C1

3U68

3U69
10K
LED-1
IU44 2U54 F2 FU51 C1
3U41 LED2 LED2 3U59
IU45 2U55 F3 FU52 C3
B ∗ optionally 1M99 is a 9 pin connector 9U42
RES
10K RES 10K RES
B 2U68 E1 FU53 C2
7U42 RES +3V3 2U71 D5 FU54 C2
BC847BW 2U72 D1
IU47
FU55 C1
2U41 RES

3U70 3U53
7U43 LED1 LED1 3U41 B5 FU56 D1
BC847BW
100p 10K 10K 3U42 C3 FU57 D1
+12VD
3U43 C3 FU58 E1
3U44 C3 FU59 E1
1M99
FU48 2U42 3U45 C3 FU60 E1
1 3U81 IU56
2
FU49
1u0 +3V3 3U53 B6 FU61 E1
FU50
3 10K 3U56 D3 FU62 E1
4
C 5
FU51
FU52
3U45
LAMP-ON
IU64
C 3U59 B6
3U60-1 F5
FU63 E1
FU64 F1
6 100R 3U82
FU53 3U42 BACKLIGHT-PWM_BL-VS
7 3U60-2 F4 FU65 F1
8 100R 1K0 RES
9
FU55 3U64 3U43 BACKLIGHT-BOOST
7U48-1
3U60-3 E5 FU66 F1
10 1K0 FU54 100R
3U44
FU07
BACKLIGHT-PWM-ANA-DISP 4
3U83-4
5
BC857BS(COL)
ENABLE-3V3-5V
3U60-4 F5 FU67 F1

6
11 3U61 E5 FU68 F1
RES 1K0
RES 100p

RES 100p

12 100R 100K
100p
2U51

2U52

2U53

3U65

1n0

10n
10n

3U62-1 F4
1n0

3U56 IU41 FU72 F4


100p

1
1-1735446-2
3U62-2 E3

3U83-1
FU73 E5
2U72

100K
+3V3

2
10K
2U44

2U45

2U46
2U43

2U71
3U62-3 E4

100n
FU74 D1
RES

IU55 3U62-4 E3

8
POWER-OK
IU40 E5
D 3U66
BL-SPI-SDO
D 3U63 F5
3U64 C2
IU41 D5
FU56 IU43 B5
RES 100R 3U67
BL-SPI-CSn +3V3-STANDBY
3U65 D2 IU44 B5
FU57
100R RES 3U84 3U66 D2 IU45 B4
BL-SPI-CLK

3
FU74 3U67 D2 IU47 B4
100R RES 3U71
STANDBY 3U68 B3 IU48 E4
7U48-2
2U68 100R BC857BS(COL) 3U69 B3 IU49 E3

5
3U70 B4 IU50 F4
5

7U40-2 3U83-2
3U62-4

1u0 3U83-3 7 2
3 6 3U71 D3 IU51 F3
10K

BC847BPN(COL)
2U47
4
IU48 100K IU40 100K 3U72 F3 IU52 F5
4

10n
E 1M95
+3V3-STANDBY
5
E 3U73 F3 IU55 D3
2

FU58 3
3U74 A4 IU56 C3
3U62-2

1 3U60-3 FU73
FU59 3 6 ENABLE-1V8
10K

2 IU61
FU60 3U75 A4 IU57 F6
BZX384-C6V2

3 22K
RES 10K
6

3U61

FU61 3U76 F2 IU61 E4


7

3U62-3

4
6U40

FU62
10K

5
FU63
1U40 +12V IU49 3U80 F4 IU62 F4
6 6
2

FU64 7U40-1 3U81 C3 IU63 F3


3
3U60-2

7 T 3.0A 32V IU51 FU72


22K

FU65 BC847BPN(COL) DETECT2 3U82 C5


8 FU66 2 IU64 C6
9 +24V-AUDIO-POWER
3U83-1 D6
3U72

FU67 1
1K0

7U41-2
7

10 FU68 3U76
1u0 RES

MAINS-OK 3 BC847BS(COL) 3U83-2 E5


11 IU63
5
2U55

100R IU57
3U83-3 E5
3U60-4

3U60-1 ENABLE-3V3n
100p RES

3U80
100p RES

1-1735446-1 5 8 1
4K7

22K

F GND-AUDIO 3U73 3U62-1 IU50


IU62
22K F 3U83-4 C5
2U48

2U49

2U50

2U54

4 IU52
10n

10n

+3V3-STANDBY
8 1
10K 6
3K3
3U63

RES 10K

7U41-1
BC847BS(COL) 2
1

1 2 3 4 5 6 7 8 9
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DC/DC

DC/DC
B03D B03D
1 2 3 4 5 6 7 8 9 2UA0 A5 3UB3 F6
2UA1 A4 3UB4 F5
2UA2 B5 3UB5 F5
RESERVED 2UA3 B5 3UB6-1 C2
2UA4 A7 3UB6-2 C2
+2V5-REF +12V +3V3
7UC0
LF25ABDT
∗ 2UA5 B6 3UB6-3 C2

3K3 1%

1K0
2UA0
2UA6 B7 3UB6-4 C2

3UA4
+12V 1 3
A 3UA1
100n 7UA2
PHD38N02LT
IN
COM
OUT
A 2UA7 D4 3UB7-1 D3

2UA4
3UB7-2 D2

1u0
7UA1-1 2UA8 D5
*
3UA0

8
IUA1 3 LM833

2K2
IUA3 IUA4

2
3UA5
2
1 1 2UA9 D5 3UB7-3 D2

100n
FUA0

3
22R
2UB0 C7 3UB7-4 C2

2UA1
FUA1

3K3 1%
+2V5-REF

4
3UA3

2UA3
47K
1
3UA2 2UB1 D6 5UA0 E8

1n0
7UA0
TS2431 2UB2 D7 7U06-1 F2

2UA2
K

IUA9
2UB3 F6 7U06-2 F1

330p
R

2
2UB4 F6 7UA0 B2

3UA6
A

B B

1K0
3 FUA4
2UB5 F8 7UA1-1 A5
3UA7
+2V5 2UB6 F8 7UA1-2 C5
IUA2 1K0
2UB7 F7 7UA2 A6

22K

1u0

1u0
3UA8

2UA5

2UA6
CUA0 +2V5-LVDS
IUB6
+5V5-TUN +5V-TUN 2UB8 D2 7UA3 C6
3U12 C3 7UA4 E5
7UA6 3U13 C3 7UA5 E8
BC817-25W
3U15-1 C8 7UA6 C3
3U12

330R
1%
3UB6-2
2 7

+12V IUB3

C 3UB6-3
3
1K0 IUB2
6 6 +12V
+1V8
+3V3
∗ +3V3 C
3U15-2 C8
3U15-3 D8
7UA7-1 C3
1K0 +5V 1
3U15-1
8 +5V 1
3U16-1
8 7UA7-2 D2
3UB6-4
4 5
1K0
2 IU26 100R 100R 3U15-4 D8 7UC0 A8
3UB6-1 7UA3 3U15-2 3U16-2
3U16-1 C9

2UB0
IUB5
1 8 3 1 7UA7-1 PHD38N02LT 2 7 2 7 CUA0 B9

1u0
BC847BS(COL)
3U13

330R
1%

+2V5-REF 1K0 7UA1-2 100R 100R


3UB7-4 3U16-2 C9 FUA0 A2

8
4 5 5 IUA7 5 LM833 FUA2 3UB0 IUA5 3U15-3 3U16-3
7 3 6 3 6
470R
7UA7-2 4 IUB4 6 100R 100R
3U16-3 D9 FUA1 A7
BC847BS(COL) 22R
3U16-4 D9 FUA2 D5

4
3U15-4 3U16-4
470R

470R

100n

FUA3 4 5 4 5
3U25-1 E3
7

2UA7

+1V2 100R 100R FUA3 D7


3UB7-2

3UB7-3

3UB7-1
2UB8

2UA9
470R
22u

1n0
3U25-2 E3 FUA4 B9
D D

2UB1

2UB2
RES 1u0

1u0
3U25-3 E2 IU26 C3
2

2UA8

330p
IUA8
∗ NOT FOR 5000 SERIES 3U25-4 E2 IU29 E2
3U26-1 F3

3UA9
IU30 F3

1K0
ENABLE-1V8 3U26-2 F3 IUA1 A4
4
3U25-4
5 3U26-3 F3 IUA2 B5
3UB1 SENSE+1V2
100K RES RESERVED 3U26-4 F3 IUA3 A6
7
100K RES

IUA6 5UA0
3U25-2

1K0
3U25-3
3U29-1 E3 IUA4 A6
3 6
30R 3U29-2 E3 IUA5 C6
E E
2

100K RES 3U29-1 RES


1 8 +12V 7UA5
LDS3985M50
3U29-3 E3 IUA6 E5
470R
IU29 3U29-2 RES 3U29-4 F3 IUA7 C4
1

2 7 1 5
100K RES

+5V5-TUN +5V-TUN
3U25-1

IN OUT
3UA0 A2 IUA8 D5

3UB2

4K7
470R 7UA4 3 4
3 6 +3V3 3
3U29-3
6
RES TS431AILT INH BP IUB1
3UA1 A3 IUA9 B6
8

RES 5 3 COM
RES IU30 470R A K 3UA2 B3 IUB0 F6

2UB7

2UB5

2UB6
100n
7U06-2 5 7U06-1 2

1u0

1u0
3U29-4 RES
BC847BS(COL) BC847BS(COL) 4 5 2 1 3UA3 B4 IUB1 E8

2
NC NC
3UB3

4 1 470R REF 4K7

3U26-1 RES
3UA4 A4 IUB2 C2
1 8
3UA5 A6 IUB3 C3
4

470R
F 2
3U26-2
7
RES
3UB5 3UB4 IUB0 2UB3
F 3UA6 B5 IUB4 D3
470R +5V 3UA7 B6 IUB5 C2
100K 1K0 22n
+3V3 3
3U26-3
6
RES
2UB4
3UA8 B5 IUB6 B3
470R 3UA9 D5
3U26-4 RES 330p
4 5 RES 3UB0 D6
470R
3UB1 E6
3UB2 E6
1 2 3 4 5 6 7 8 9
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DC/DC

DC/DC
B03E B03E
1 2 3 4 5 6 7 8
2U27 B8
2U28 D8
2UD0 A2
2UD1 A2
2UD2 A3
2UD3 B3
A 5UD0 IUD0
A 2UD4 B5
+12V
30R +5V5-TUN 2UD5 B5
7UD0-1
2UD6 B6

2UD0

2UD1

2UD2
ST1S10PH

10u

10u

10u

6
A

SW
ENABLE-3V3-5V 2 7
IUD3 5UD1 IUD7
6UD0 FUD3 2UD7 B6
INH SW +5V
VIN
3u6 SS36 +1V1
2UD8 C2

RES 2UE9
5 3

220u 16V
RES 1n0
SYNC VFB 2UD9 C2

2UD3

2UD4

2UD5

2UD6

RES 2U27

100n
GND

22u

22u

22u
A P HS 2UE0 C3

9
6
2UE1 D5
7U05-1 2
2UE2 D6
B IUD6 2UD7
BC847BS(COL)
RES 1
IU27
B 2UE3 D6
7UD0-2 4n7 2UE4 D6

13

15

RES 3U06
ST1S10PH

10K
3UD2

3UD0

3UD1
2UE5 E4

68K

33K
1%

1%
10 VIA 12 120K
2UE6 E6
11
2UE7 F4

14
2UE8 F5
2UE9 B8
∗∗ 5UD3
3U06 B8
C +12V
IUD1
C 3U07 D8
30R
7UD1-1
3UD0 B5
2UD8

2UD9

2UE0

ST1S10PH 3UD1 B5
10u

10u

10u

6
A

SW
IUD4 5UD2 FUD2
ENABLE-3V3-5V 2
INH SW
7 +3V3 3UD2 B6
VIN
5 3
3u6 +1V1 3UD3 D5

220u 16V
SYNC VFB
3UD4 D5

2UE1

2UE2

2UE3

2UE4

RES 2U28
1% 100K

100n
GND

4n7

22u

22u
A P HS 3UD3
3UD5 D5
4

9
3 BC847BS(COL)

5 IU28
5UD0 A2
7U05-2
RES 5UD1 A5
D 7UD1-2
IUD2 4 D 5UD2 C5
13

15

5UD3 C2

RES 3U07
ST1S10PH

10K
3UD4

3UD5

33K
1M0

1%
10 VIA 12 6UD0 A6
11
6UD1 E4
7U05-1 B7
14

7U05-2 D7
7UD0-1 A4

7UD2
LD1117DT25 7UD0-2 B4
6UD1 IUD5 7UD1-1 C4
E +5V 3
IN OUT
2 +2V5 E 7UD1-2 D4
S1D COM (∗) FOR 5000 SERIES ONLY

22u 16V
7UD2 E5
2UE5

2UE6
100n

(∗∗) NOT FOR 5000 SERIES 7UD3 F5


1

FUD2 C5
FUD3 A7
7UD3 IU27 B8
LD1117DT33
IU28 D8
3 2
IN OUT +3V3 IUD0 A2
F COM F IUD1 C2
22u 16V
2UE7

2UE8
100n

IUD2 D5
1

IUD3 A5
IUD4 C5
IUD5 E4
IUD6 B6
IUD7 A5
1 2 3 4 5 6 7 8
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Temp Sensor + AmbiLight

Temp Sensor + AmbiLight


B03F B03F
1 2 3 4 5 6 7
1UM0 A4
5UM0 A3
5UM1 A3
FUM0 A5
IUM0 A4
5UM1 IUM0 1UM0 FUM0
+3V3 V-AMBI

A 30R
5UM0
T 1.0A 63V
A
+5V
RES 30R

B B

C C

D D

E E

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Fan Control

Fan-Control
B03G B03G
1 2 3 4 5 6 7 8 9
2US3 A7
+12V +12V
3US2 A3
+3V3 3US3 B3

8
3US4-1
3US4-1 A4

10K

7
+12V

3US5-2
3US2

2US3

100n
A A

10K
3US4-2 D4

10K

1
3 7US1-1
3US7 LM339P
9

2
FAN-CTRL1
1K0
8
14
IUS3 3US5-3
6 3
IUS6
3US4-3 C4
10K
IUT1 12
7US2
BC807-25W 3US4-4 C5
+12V

+3V3
IUS7
3US5-1 B6

3US9
3US5-2 A6

22R
8
3US5-1
+12V

10K
3US5-3 A5

3US3

10K
B 3 7US1-2
B

1
IUT2
11 LM339P
13
IUS4 3US5-4
5 4 BC807-25W
3US5-4 B5
FAN-CTRL2 10 7US3

12
10K IUS8
3US6 C6
IUS9
3US7 A4

3US6
3US9 B6

47R
FAN-DRV 7US1-1 A5
C
+3V3
C 7US1-2 B5
+12V 7US1-3 C5

5
IUS5

3US4-4
+12V
7US1-4 D5

10K
6
3US4-3

10K
7US1-3
7US2 A6

4
3
5 LM339P
2

3
TACH01 4
7US3 B6

12
+12V
9US0 D4
IUS0 D5
9US0

D D
RES

+12V
7

IUS3 A5
3US4-2

10K

7US1-4

3
7 LM339P
1
IUS4 B5
2

IUS0
TACH02 6

IUS5 C5
12

TACHO IUS6 A6
IUS7 B7
E E IUS8 B6
IUS9 B6
IUT1 A4
IUT2 B4

F F

1 2 3 4 5 6 7 8 9
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Vdisp Switch

VDisp-Switch
B03H B03H
1 2 3 4 5 6 7 2UU0 C6
2UU1 C4
3UU0-1 C4
1 9UU0-1 8
RES 3UU0-2 C4
2 9UU0-2 7
RES 3UU0-3 C2
3 9UU0-3 6
RES
4 9UU0-4 5
3UU1 C4
A RES
1 9UU1-1 8
A 3UU2 D6
RES
2 9UU1-2
3UU3-1 C4
7
RES
3 9UU1-3 6
3UU3-2 C5
RES
4 9UU1-4 5
FUU0 3UU3-3 C6
RES 3UU3-4 C7
7UU0 B4
7UU1 B5
7UU2-1 C3
B 7UU0
B 7UU2-2 C3
SI4835DDY
RES 7UU1 +VDISP-INT 7UU3 C6
+12VD SI3441BDV
9UU0-1 A4
8
3UU3-1
1
9UU0-2 A4
4
PUMD12
47K RES
IUU3
9UU0-3 A4
7UU2-2 3UU1 2UU1 3UU3-2
5
47R IUU2
2
47K RES
7
9UU0-4 A4
IUU1 1u0
3
C
IUU0
7
3UU0-2
2
7UU3 RES
BC847BW C 9UU1-1 A4

1
47K 9UU1-2 A4

3UU0-1
6

47K
3 IUU4 3UU3-3 IUU5 3UU3-4
1 6 3 4 5
3UU0-3
2 7UU2-1
+3V3
9UU1-3 A4

8
+3V3-STANDBY 47K RES 47K RES
6 3 PUMD12
47K 2
9UU1-4 A4

2UU0

100n
1

FUU0 A5
IUU6
VDISP-SWITCH IUU0 C3
3UU2

4K7 RES
+3V3 IUU1 C4
D D IUU2 C5
LCD-PWR-ONn IUU3 C6
IUU4 C6
IUU5 C7
IUU6 D6

E E

1 2 3 4 5 6 7
4 2009-10-22

DC/DC / CLASS D
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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 151

10-16 B03 820400089515 CLASS D


Audio

Audio
B03A B03A
1 2 3 4 5 6 7 8 9
1735 E8 3D16 A5
1D38 E9 5D01 C7

+AVCC
1D50 E8 5D02 C7
3D09
7D03-1
BC847BS(COL) FD14
+24V-AUDIO-POWER 1D52 F8 5D03 E7
2D01 F7 5D04 C8

1
+24V-AUDIO-POWER
4R7
A A 2D02 F4 5D05 C8

2D06

220n
2D03 E3 5D07 A6

2
3D16 ID12
ID11 2D05 A5 5D08 A6

5D07

220R
5D08

220R
22K
2D06 A5 6D01 E3

10u 35V
GND-AUDIO

2D05
2D07 B5 7D03-1 A5
ID27 ID28
-AUDIO-R
FD01 2D28 ID14 2D24 2D08 B6 7D03-2 F5
2D09 C7 7D10-1 B6

220u 35V

220u 35V
1u0 47n

8
2D20

2D07

2D19

2D08
220n

220n
6

3D02-1

3D14-4

3D14-3

3D14-2

3D14-1
2D10 C7 7D10-2 E5

2D22

2D26
220n

220n
4K7

22K

22K

22K

22K
3D02-3
A-PLOP 6 3 2 7D15-1
2D11 C8 7D11-1 D2
B BC847BS(COL)
B

1
4K7
1
2D12 C8 7D11-2 D3
GND-AUDIO GND-AUDIO
2D13 F8 7D13-1 E1
2D14 E8 7D13-2 E2
7D10-1
FD03 2D29 ID15 2D23 TPA3120D2PWP 2D16 C4 7D15 B3

19
20

10
12
+AUDIO-L

1
3
1u0 47n AVCC L R 2D17 C4 7D15 C3

5
3
2D19 B6 CD10 D5

3D02-4
PVCC ID32 2D10
Φ 16

4K7
3D02-2 ID19 BSR ID10 5D02 5D05 2D12 RIGHT-SPEAKER
7 2 5 6
7D15-2
BC847BS(COL) R CLASS-D 15
220n
ID06
2D20 B5 FD01 B1
ID18 ID08

4
4K7 IN R 22u 220R 25V 220u
4 5 AUDIO AMP 2D21 D8 FD02 F8
L OUT
C 18
0
L
22
ID31 2D09
ID09 5D01 5D04 ID07 2D11 LEFT-SPEAKER C 2D22 B8 FD03 B1
17 GAIN 21 22u
1 BSL ID05 220R 25V 220u 2D23 B4 FD05 E8
GND-AUDIO 2D16 ID29 220n
11
VCLAMP 2D24 B4 FD06 E8
2D17 1u0 7
1u0 ID30 4
BYPASS
MUTE
2D26 B8 FD07 F4
2
AUDIO-MUTE-UP ID37 SD 2D27 D8 FD14 A5
PGND
ID38 AGND L R GND_HS
2D28 B2 ID05 C8
A-STBY
2D29 B2 ID06 C8

8
9

23
24

13
14

25
5
3D01-1 D3 ID07 C8

3D15-4
+3V3-STANDBY
8

8
4K7
3D01-1

3D10-4

3D10-3

3D10-2

3D10-1
D D ID08 C8

2D21

2D27
3D01-2 D3

220n

220n
6
47K

22K

22K

22K

22K
CD10
MAINS SWITCH DETECT
7D11-1 2 4 3D01-4 E2 ID09 C7
1

1
BC847BS(COL)
1 3
ID34
+3V3-STANDBY
GND-AUDIO 3D02 B3 ID10 C7
+3V3-STANDBY ID35
3D01-2 3D02 C3 ID11 A4
7D11-2 5 2 7 DETECT2
3D02 B4 ID12 A5
5

BC847BS(COL)
47K
3D01-4

6 4
47K

GND-AUDIO GND-AUDIO 3D02 C4 ID13 E3

40
39
38
2D03
100p

GND-AUDIO 7D10-2
7D13-1 2 TPA3120D2PWP 3D04 E2 ID14 B3
4

BC847BS(COL) LEFT-SPEAKER
ID36 VIA
1 3
GND-AUDIO GND-AUDIO 26 37 3D06-1 F4 ID15 B3
ID39 +AVCC 27 36
VIA 3D06-2 F4 ID18 C5

V_NOM
3D15-1 3D15-2 ID13 6D01
E E

1D50

2D14
7D13-2 5 1 8 7 2 28 VIA VIA 35

10n
BC847BS(COL)
4
4K7 4K7 BZX384-C GND-AUDIO
29 34
GND-AUDIO 3D06-3 F3 ID19 C5
VIA
3D06-4 F3 ID27 B6
3D04
2K2

MAINS-OK
1735 1D38
3D09 A3 ID28 B6
30
31
32
33

FD05
GND-AUDIO GND-AUDIO 5D03 1 1
FD06
2 2 3D10-1 D8 ID29 C5
GND-AUDIO 220R 3 3
3D10-2 D8 ID30 C5

2D01
GND-AUDIO FD02

10n
GND-AUDIO 4

2D13
3 7D03-2 1735446-3

10n
BC847BS(COL) 1735446-4 3D10-3 D7 ID31 C6
3D06-4 FD07 3D06-2
LEFT-SPEAKER
4
5
3D10-4 D7 ID32 C6
100K 5 7 100K 2
4 3D14-1 B8 ID33 F4
F 8
3D06-1
1
ID33
RIGHT-SPEAKER
F 3D14-2 B8 ID34 D3
3D14-3 B7 ID35 D3

V_NOM
100K

1D52
GND-AUDIO
3D14-4 B7 ID36 E2
2D02
RIGHT-SPEAKER 3
3D06-3
6 3D15-1 E2 ID37 D4
100K 10u 3D15-2 E3 ID38 D5
GND-AUDIO
3D15-4 D5 ID39 E2

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 152

DC/DC

DC/DC
B03B B03B
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

A A

5U03 RES

30R
FU05 5U02 IU22
+12V
30R
7U02-1

2U24

2U23

2U25

2U19

2U20
10u

10u

10u

10u

1u0
SI4952DY
B IU10
7 8 B
2
12V/1V8 CONVERSION

1
3U11

3R3
2U21 FU02 5U00 FU03
+1V8
IU11 220p 3u6

3 3U23-3 6

2 3U23-2 7

1 3U23-1 8

22u
3U23-4

2U15

2U16
47R

47R

47R

47R

47u
7U02-2
SI4952DY

4
5 6
C IU09
4 IU23 C

2U17

1n0
IU15
7U01
SI4778DY

2U18

1n0
3U27 5 6 7 8
IU08 IU12
4
10R 1 2 3

D D
2U00

3U14
10u

3R3
3U04

3R3

2U22
IU06 2U02 IU07
IU05 IU13 220p

3U28

10R
100n
2U01

3U05
100n

3R3

7U04
7U03 SI4778DY
TPS53126PW
5 6 78
IU16
2 23 4
1 1 1 2 3
IU24 11 VBST DRVL 14 IU14
2 2
12V/1V1 CONVERSION
E ENABLE-1V8
3
10
1
2
EN DRVH
1
2
1
12 E
1n0 RES

FU06 5U01 FU01


2U03

+1V1 4 24 +1V1
1 1

STPS2L30A
+1V8 9 VO SW 13

RES 100u 2.0V


2 2 2u0

6U00

2U14
5 22

3U24-4

3U24-3

3U24-2

3U24-1
1 1

3U20

2U12

2U13
8 VFB PGND 15

22u
47R

47R

47R

47R

10R
RES

47u
RES GND-SIG 2 2
7U00 3U02 IU01
BC847BW 21 7
1 1
3 22K 3U03 16 TRIP TEST 17
IU03 2 2
1 22K IU02 GND-SIG
GND-SIG
20 18 FU04 IU17
GND-SIG VIN V5FILT
2 19 IU25
VREG5
F F

2U11

1n0
+3V3-STANDBY 3U00 2U06
+1V1 GND
2U04

2U05
6

10u

1u0

10K 100n
IU18
10K
3U01

GND-SIG

2U09

2U10
1n0

1u0
GND-SIG
3U21 FU00
IU19 SENSE+1V1
100R 1%

3U17

1% 330R

2U29

100n
RES
G IU20 G

100p RES

3U19
2U08

3U18
5K6

1% 1K0
3U08 3U22
IU04
+1V8
330R 1% 1K0 1% IU21
RES 100p
1K0 1%
3U09

3U10

2U07
22K

GND-SIG GND-SIG GND-SIG


CU00

H GND-SIG GND-SIG GND-SIG


GND-SIG
H

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
2U00 D2 2U04 F4 2U08 G9 2U12 F11 2U16 C10 2U20 B14 2U24 B5 3U01 F1 3U05 E4 3U11 B6 3U19 G9 3U23-1 C9 3U24-1 F9 3U27 D5 5U02 B13 7U01 D8 7U04 E8 FU02 B9 FU06 E8 IU04 G3 IU08 D4 IU12 D7 IU16 E5 IU20 G9 IU24 E3
2U01 E3 2U05 F4 2U09 F9 2U13 F12 2U17 C9 2U21 C6 2U25 B12 3U02 F2 3U08 G2 3U14 D7 3U20 F11 3U23-2 C9 3U24-2 F9 3U28 D5 5U03 A13 7U02-1 B6 CU00 H7 FU03 C14 IU01 F3 IU05 D3 IU09 C6 IU13 D7 IU17 F9 IU21 H9 IU25 F4
2U02 D4 2U06 F1 2U10 F10 2U14 E14 2U18 D9 2U22 D8 2U29 G14 3U03 F3 3U09 H3 3U17 G10 3U21 G13 3U23-3 C9 3U24-3 F9 5U00 C10 6U00 E8 7U02-2 C6 FU00 G13 FU04 F4 IU02 F3 IU06 D3 IU10 B 6 IU14 E8 IU18 F9 IU22 B13
2U03 E2 2U07 H3 2U11 F9 2U15 C10 2U19 B12 2U23 B5 3U00 F1 3U04 D3 3U10 H3 3U18 G10 3U22 G2 3U23-4 C8 3U24-4 F8 5U01 E10 7U00 F1 7U03 E3 FU01 E14 FU05 B9 IU03 F1 IU07 D4 IU11 C6 IU15 C9 IU19 G10 IU23 C9

5 2010-02-19

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 153

DC/DC

DC/DC
B03C B03C
1 2 3 4 5 6 7 8 9
1M95 E1 3U83-3 E5
1M99 C1 3U83-4 C5
1U40 E2 3U84 D2
2U41 B1 6U40 E3
2U42 C2 7U40-1 F4
2U43 D2 7U40-2 E4
2U44 D3 7U41-1 F4
A +3V3 +3V3-STANDBY A 2U45 D3 7U41-2 F5
LED-2
2U46 D3 7U42 B5
2U47 E1 7U43 B3

RES 10K

RES 10K
3U74

3U75
+5V +3V3-STANDBY 2U48 F1 7U48-1 C6
9U41
IU43 2U49 F1 7U48-2 E6
2U50 F1 9U41 B5

RES 10K
3U68

3U69
10K
LED-1
IU44
2U51 D1 9U42 B4
3U41 LED2 LED2 3U59
IU45 2U52 D1 FU07 C3
B ∗ optionally 1M99 is a 9 pin connector
9U42
RES
10K RES 10K RES
B 2U53 D2 FU48 C1
7U42 RES
BC847BW
+3V3 2U54 F2 FU49 C1
2U41 RES IU47 3U70 LED1 3U53
2U55 F3 FU50 C1

7U43 LED1
BC847BW
10K 10K
2U68 E1 FU51 C1
100p
2U71 D5 FU52 C3
+12VD
2U72 D1 FU53 C2
1M99
FU48 2U42 3U41 B5 FU54 C2
1 3U81 IU56
2
FU49
1u0 +3V3 3U42 C3 FU55 C1
FU50
3 10K 3U43 C3 FU56 D1
4
C 5
FU51
FU52
3U45
LAMP-ON
IU64
C 3U44 C3 FU57 D1
6 100R
7
FU53 3U42 BACKLIGHT-PWM_BL-VS
3U82 3U45 C3 FU58 E1
8
FU55 3U64
100R
3U43 BACKLIGHT-BOOST
1K0 RES 3U53 B6 FU59 E1
9 7U48-1
10 1K0 FU54 100R FU07 3U83-4 BC857BS(COL) 3U56 D3 FU60 E1
3U44 BACKLIGHT-PWM-ANA-DISP 4 5 ENABLE-3V3-5V

6
11 3U59 B6 FU61 E1
RES 1K0
RES 100p

RES 100p

12 100R 100K
100p
2U51

2U52

2U53

3U65

1n0

10n

FU62 E1
10n

3U60-1 F5
1n0

3U56 IU41
100p

1
1-1735446-2

3U83-1
3U60-2 F4 FU63 E1
2U72

100K
+3V3

2
10K
2U44

2U45

2U46
2U43

2U71

100n
3U60-3 E5 FU64 F1
RES

IU55

8
POWER-OK 3U60-4 F5 FU65 F1
D 3U66
BL-SPI-SDO
D 3U61 E5 FU66 F1
FU56
RES 100R 3U67 3U62-1 F4 FU67 F1
FU57 BL-SPI-CSn +3V3-STANDBY
100R RES 3U84 3U62-2 E3 FU68 F1
BL-SPI-CLK
FU72 F4

3
FU74
100R RES
3U62-3 E4
3U71
STANDBY
7U48-2
3U62-4 E3 FU73 E5
2U68 100R BC857BS(COL) 3U63 F5 FU74 D1

5
5

7U40-2 3U83-2 3U64 C2 IU40 E5


3U62-4

1u0 3U83-3 7 2
3 6
10K

BC847BPN(COL)
2U47
IU48
4
100K IU40 100K 3U65 D2 IU41 D5
3U66 D2 IU43 B5
4

10n
E 1M95
+3V3-STANDBY
5
E
2

3
FU58 3U67 D2 IU44 B5
3U62-2

1 3U60-3 FU73
FU59 3 6 ENABLE-1V8
10K

IU61 IU45 B4
2
FU60 3U68 B3
BZX384-C6V2

3 22K
RES 10K
6

3U61

FU61 3U69 B3 IU47 B4


7

3U62-3

4
6U40

FU62
10K

5 1U40 IU49
6
FU63
+12V 3U70 B4 IU48 E4
6
2

FU64 7U40-1
3U71 D3 IU49 E3
3
3U60-2

7 T 3.0A 32V IU51 FU72


22K

FU65 BC847BPN(COL) DETECT2


8 FU66
9 +24V-AUDIO-POWER 2 3U72 F3 IU50 F4
3U72

FU67 1
1K0

7U41-2
7

10 FU68 3U76 3U73 F3 IU51 F3


1u0 RES

MAINS-OK 3 BC847BS(COL)
11 IU63
5
2U55

100R IU57 3U74 A4 IU52 F5


3U60-4

3U60-1 ENABLE-3V3n
100p RES

3U80
100p RES

1-1735446-1 5 8 1
4K7

22K

F GND-AUDIO 3U73 3U62-1 IU50


IU62
22K F 3U75 A4 IU55 D3
2U48

2U49

2U50

2U54

4 IU52
10n

10n

3U76 F2 IU56 C3
4

+3V3-STANDBY
8 1
10K 6
3K3
3U63

3U80 F4 IU57 F6
RES 10K

7U41-1
BC847BS(COL) 2
1 3U81 C3 IU61 E4
3U82 C5 IU62 F4
3U83-1 D6 IU63 F3
3U83-2 E5 IU64 C6

1 2 3 4 5 6 7 8 9
5 2010-02-19

DC/DC
8204 000 8951

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 154

DC/DC

DC/DC
B03D B03D
1 2 3 4 5 6 7 8 9
2UA0 A5 3UB1 E6
2UA1 A4 3UB2 E6
RESERVED 2UA2 B5 3UB3 F6
+12V +3V3 2UA3 B5 3UB4 F5
+2V5-REF 7UC0
LF25ABDT * 2UA4 A7 3UB5 F5

3K3 1%

1K0
2UA0

3UA4
+12V
A 3UA1
1
IN OUT
3
A 2UA5 B6 3UB6-1 C2
100n 7UA2
PHD38N02LT COM 2UA6 B7 3UB6-2 C2

2UA4

1u0
7UA1-1
* 2UA7 D4 3UB6-3 C2
3UA0

8
IUA1 3 LM833

2K2
IUA3 IUA4

2
3UA5
1 1
2
2UA8 D5 3UB6-4 C2

100n
FUA0

3
22R

2UA1
FUA1 2UA9 D5 3UB7-1 D3

3K3 1%
+2V5-REF

4
3UA3

2UA3
47K
1
3UA2 2UB0 C7 3UB7-2 D2

1n0
7UA0
TS2431 2UB1 D6 3UB7-3 D2

2UA2
K

IUA9

330p
2UB2 D7 3UB7-4 C2
R

2
2UB3 F6 5UA0 E8

3UA6
A

B B

1K0
3 FUA4
2UB4 F6 7U06-1 F2
3UA7
+2V5
2UB5 F8 7U06-2 F1
IUA2 1K0
2UB6 F8 7UA0 B2

22K

1u0

1u0
3UA8

2UA5

2UA6
CUA0 +2V5-LVDS
IUB6
+5V5-TUN +5V-TUN 2UB7 F7 7UA1-1 A5
2UB8 D2 7UA1-2 C5
7UA6 3U12 C3 7UA2 A6
BC817-25W
3U13 C3 7UA3 C6
3U12

330R
3UB6-2 1%
+12V 2 7 IUB3
3U15-1 C8 7UA4 E5
C 3UB6-3
3
1K0 IUB2
6 6 +12V
+1V8

3U15-1 +3V3 ∗
3U16-1 +3V3 C 3U15-2 C8 7UA5 E8
1K0 +5V 1 8 +5V 1 8
3UB6-4
4 5
1K0
2 IU26 100R 100R 3U15-3 D8 7UA6 C3
3UB6-1 7UA3 3U15-2 3U16-2
3U15-4 D8 7UA7-1 C3

2UB0
1 8 IUB5 3 1 7UA7-1 PHD38N02LT 2 7 2 7

1u0
BC847BS(COL)
3U13

330R
1%

+2V5-REF 1K0 7UA1-2


3UB7-4 100R 100R 3U16-1 C9 7UA7-2 D2

8
4 5 5 IUA7 5 LM833 FUA2 3UB0 IUA5 3U15-3 3U16-3
7 3 6 3 6
470R
7UA7-2 4 6
3U16-2 C9 7UC0 A8
IUB4 22R 100R 100R
BC847BS(COL)
3U16-3 D9 CUA0 B9

4
3U15-4 3U16-4
470R

470R

100n

FUA3 4 5 4 5
3U16-4 D9 FUA0 A2
7

2UA7

+1V2 100R 100R


3UB7-2

3UB7-3

3UB7-1
2UB8

2UA9
470R
22u

1n0
3U25-1 E3 FUA1 A7
D D

2UB1

2UB2
3U25-2 E3 FUA2 D5

RES 1u0

1u0
2

2UA8

330p
IUA8
∗ NOT FOR 5000 SERIES 3U25-3 E2 FUA3 D7
3U25-4 E2 FUA4 B9

3UA9

1K0
ENABLE-1V8
3U26-1 F3 IU26 C3
3U25-4 3U26-2 F3 IU29 E2
4 5
100K RES
3UB1 SENSE+1V2
RESERVED 3U26-3 F3 IU30 F3
7
100K RES

IUA6 5UA0 3U26-4 F3 IUA1 A4


3U25-2

1K0
3U25-3
3 6
30R 3U29-1 E3 IUA2 B5
E E
2

100K RES 3U29-1 RES


1 8 +12V 7UA5 3U29-2 E3 IUA3 A6
470R LDS3985M50
IU29 RES
3U29-3 E3 IUA4 A6
3U29-2
1

2 7 1 5
100K RES

+5V5-TUN +5V-TUN 3U29-4 F3 IUA5 C6


3U25-1

IN OUT

3UB2

4K7
470R 7UA4
3 6 3
3U29-3
6
RES TS431AILT
3
INH BP
4 IUB1 3UA0 A2 IUA6 E5
+3V3
8

RES RES IU30 470R 5


A K
3 COM 3UA1 A3 IUA7 C4

2UB7

2UB5

2UB6
100n
7U06-2 5 7U06-1 2

1u0

1u0
BC847BS(COL) BC847BS(COL) 4
3U29-4
5
RES
2 1 3UA2 B3 IUA8 D5

2
NC NC
3UB3
4 1 470R REF 4K7 3UA3 B4 IUA9 B6
3U26-1 RES
1 8 3UA4 A4 IUB0 F6
4

470R
3UA5 A6 IUB1 E8
F 2
3U26-2
7
RES
3UB5 3UB4 IUB0 2UB3
F 3UA6 B5 IUB2 C2
470R +5V

3
3U26-3
6
RES 100K 1K0 22n 3UA7 B6 IUB3 C3
+3V3 2UB4
470R 3UA8 B5 IUB4 D3
4
3U26-4
5
RES 330p
RES
3UA9 D5 IUB5 C2
470R 3UB0 D6 IUB6 B3

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 155

DC/DC

DC/DC
B03E B03E
1 2 3 4 5 6 7 8
2U27 B8
2U28 D8
2UD0 A2
2UD1 A2
2UD2 A3
2UD3 B3
A 5UD0 IUD0
A 2UD4 B5
+12V
30R +5V5-TUN 2UD5 B5
7UD0-1
2UD6 B6

2UD0

2UD1

2UD2
ST1S10PH

10u

10u

10u

6
A

SW
ENABLE-3V3-5V 2 7
IUD3 5UD1 IUD7
6UD0 FUD3 2UD7 B6
INH SW +5V
VIN
3u6
2UD8 C2
SS36 +1V1

RES 2UE9
5 3

220u 16V
2UD9 C2

RES 1n0
SYNC VFB

2UD3

2UD4

2UD5

2UD6

RES 2U27

100n
GND

22u

22u

22u
A P HS 2UE0 C3

9
6
2UE1 D5
7U05-1 2 2UE2 D6
B IUD6 2UD7
BC847BS(COL)
RES 1
IU27
B 2UE3 D6
7UD0-2 4n7 2UE4 D6

13

15

RES 3U06
ST1S10PH

10K
3UD2
2UE5 E4

3UD0

3UD1
68K

33K
1%

1%
10 VIA 12 120K 2UE6 E6
11 2UE7 F4

14
2UE8 F5
2UE9 B8
3U06 B8
∗∗ 5UD3 3U07 D8
C +12V
IUD1
C 3UD0 B5
30R
7UD1-1
3UD1 B5
2UD8

2UD9

2UE0

ST1S10PH
10u

10u

10u

6
A

SW
2 7
IUD4 5UD2 FUD2 3UD2 B6
ENABLE-3V3-5V INH SW +3V3
VIN
3u6
3UD3 D5
5 3 +1V1
3UD4 D5

220u 16V
SYNC VFB

2UE1

2UE2

2UE3

2UE4

RES 2U28
1% 100K

100n
GND

4n7

22u

22u
4 A P HS 3UD3 3UD5 D5
8

9
3 BC847BS(COL)
5UD0 A2
IU28
7U05-2 5 5UD1 A5
RES
D IUD2 4 D 5UD2 C5
7UD1-2 5UD3 C2
13

15

RES 3U07
ST1S10PH

10K
6UD0 A6

3UD4

3UD5

33K
1M0

1%
10 VIA 12
6UD1 E4
11 7U05-1 B7
14

7U05-2 D7
7UD0-1 A4
7UD0-2 B4

7UD2
LD1117DT25
6UD1
7UD1-1 C4
IUD5
E +5V 3
IN OUT
2 +2V5 E 7UD1-2 D4
S1D COM
(∗) FOR 5000 SERIES ONLY 7UD2 E5

22u 16V
2UE5

2UE6
100n

7UD3 F5
(∗∗) NOT FOR 5000 SERIES
1

FUD2 C5
FUD3 A7
IU27 B8
7UD3
LD1117DT33 IU28 D8
IUD0 A2
3 2 +3V3
IN OUT IUD1 C2
F COM F IUD2 D5
22u 16V
2UE7

2UE8
100n

IUD3 A5
1

IUD4 C5
IUD5 E4
IUD6 B6
IUD7 A5

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 156

Temp Sensor + AmbiLight

Temp Sensor + AmbiLight


B03F B03F
1 2 3 4 5 6 7
1UM0 A4
5UM0 A3
5UM1 A3
FUM0 A5
IUM0 A4

5UM1 IUM0 1UM0 FUM0


+3V3 V-AMBI

A 30R
5UM0
T 1.0A 63V
A
+5V
RES 30R

B B

C C

D D

E E

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 157

Fan Control

Fan-Control
B03G B03G
1 2 3 4 5 6 7 8 9
+12V +12V 2US3 A7
3US2 A3
+3V3 3US3 B3

8
3US4-1 A4

3US4-1

10K
3US4-2 D4

7
+12V

3US5-2
3US2

2US3

100n
A A

10K
10K
3US4-3 C4

1
3 7US1-1
3US7
9 LM339P 3US4-4 C5

2
IUS3 3US5-3 IUS6
14 6 3
FAN-CTRL1
1K0
8
3US5-1 B6
10K
IUT1
7US2 3US5-2 A6
12 BC807-25W
+12V 3US5-3 A5
IUS7
+3V3
3US5-4 B5
3US6 C6

3US9

22R
8
3US7 A4

3US5-1
+12V

10K
3US9 B6

3US3

10K
B 3 7US1-2
B 7US1-1 A5

1
11 LM339P
IUS4 3US5-4 7US1-2 B5
IUT2 13 5 4 BC807-25W
FAN-CTRL2 10 7US3
10K IUS8 7US1-3 C5
12
IUS9
7US1-4 D5
7US2 A6
7US3 B6

3US6

47R
9US0 D4
FAN-DRV IUS0 D5
IUS3 A5
+3V3
C C IUS4 B5
+12V IUS5 C5

5
IUS5 IUS6 A6

3US4-4
+12V

10K
IUS7 B7

6
3US4-3
IUS8 B6

10K
7US1-3

4
3
5 LM339P
2 IUS9 B6

3
4
TACH01 IUT1 A4

12
IUT2 B4
+12V
9US0

D D
RES

+12V
7
3US4-2

10K

7US1-4

3
7 LM339P
1
2

IUS0
TACH02 6
12

TACHO

E E

F F

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 158

Vdisp Switch

VDisp-Switch
B03H B03H
1 2 3 4 5 6 7
2UU0 C6
1 9UU0-1 8
2UU1 C4
RES 3UU0-1 C4
2 9UU0-2 7
RES 3UU0-2 C4
3 9UU0-3 6
RES 3UU0-3 C2
4 9UU0-4 5
A RES A 3UU1 C4
1 9UU1-1
RES
8 3UU2 D6
2 9UU1-2 7 3UU3-1 C4
RES
3 9UU1-3 6 3UU3-2 C5
RES
4 9UU1-4 5
FUU0
3UU3-3 C6
RES
3UU3-4 C7
7UU0 B4
7UU1 B5
7UU2-1 C3
B 7UU0
B 7UU2-2 C3
SI4835DDY
RES 7UU1 +VDISP-INT 7UU3 C6
+12VD SI3441BDV 9UU0-1 A4
9UU0-2 A4
3UU3-1
4
8 1
9UU0-3 A4
47K RES
5
PUMD12
7UU2-2 3UU1 2UU1
2
3UU3-2
7
IUU3 9UU0-4 A4
47R IUU1 1u0 IUU2 47K RES 9UU1-1 A4
3 7UU3 RES
IUU0
C 7
3UU0-2
2 BC847BW C 9UU1-2 A4

1
47K 9UU1-3 A4

3UU0-1
6

47K
3 IUU4 3UU3-3 IUU5 3UU3-4
1 6 3 4 5
3UU0-3
2 7UU2-1
+3V3 9UU1-4 A4

8
+3V3-STANDBY 47K RES 47K RES
PUMD12
6
47K
3 2 FUU0 A5

2UU0

100n
1
IUU0 C3
VDISP-SWITCH IUU6 IUU1 C4
3UU2
+3V3
IUU2 C5
4K7 RES IUU3 C6
D D IUU4 C6
LCD-PWR-ONn IUU5 C7
IUU6 D6

E E

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Circuit Diagrams and PWB Layouts Q552.1A LA 10. EN 159

10-17 B03 820400089516 CLASS D


Audio

Audio
B03A B03A
1735 E8 FD06 E8
1 2 3 4 5 6 7 8 9 1D38 E9 FD07 F4
1D50 E8 FD14 A5
1D52 F8 ID05 C8

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