Modes of Transfer

Introduction
The following blog discusses one of the important topics involved in Computer
Organization and Architecture. The method used for transferring information
between external I/O devices and internal storage is known as the I/O interface. We
use special communication links to interface the CPU with the peripherals connected
to any computer system. We use these communication links to resolve the
differences between the CPU and peripheral.

I/O Module Diagram

In this article, we will discuss different modes of transfer between the CPU to the I/O
devices.
Modes of Transfer
We store the binary information received through an external device in the memory
unit. The information transferred from the CPU to external devices originates from
the memory unit. Although the CPU processes the data, the target and source are
always the memory unit. We can transfer this information using three different modes
of transfer.
1. Programmed I/O
2. Interrupt- initiated I/O
3. Direct memory access( DMA)

We will see each of them in detail in the upcoming sections.

Programmed I/O
Programmed I/O uses the I/O instructions written in the computer program. The
instructions in the program initiate every data item transfer. Usually, the data transfer
is from a memory and CPU register. This case requires constant monitoring by the
peripheral device's CPU.
Advantages:
• Programmed I/O is simple to implement.
• It requires very little hardware support.
• CPU checks status bits periodically.
Disadvantages:
• The processor has to wait for a long time for the I/O module to be ready for
either transmission or reception of data.
• The performance of the entire system is severely degraded.
Interrupt-initiated I/O
In the above section, we saw that the CPU is kept busy unnecessarily. We can avoid
this situation by using an interrupt-driven method for data transfer. The interrupt
facilities and special commands inform the interface for issuing an interrupt request
signal as soon as the data is available from any device. In the meantime, the CPU
can execute other programs, and the interface will keep monitoring the i/O device.
Whenever it determines that the device is ready for transferring data interface
initiates an interrupt request signal to the CPU. As soon as the CPU detects an
external interrupt signal, it stops the program it was already executing, branches to
the service program to process the I/O transfer, and returns to the program it was
initially running.
Working of CPU in terms of interrupts:
• CPU issues read command.
• It starts executing other programs.
• Check for interruptions at the end of each instruction cycle.
• On interruptions:-
o Process interrupt by fetching data and storing it.
o See operation system notes.
• Starts working on the program it was executing.

Advantages:
• It is faster and more efficient than Programmed I/O.
• It requires very little hardware support.
• CPU does not check status bits periodically.
Disadvantages:
• It can be tricky to implement if using a low-level language.
• It can be tough to get various pieces of work well together.
• The hardware manufacturer / OS maker usually implements it, e.g., Microsoft.
Direct Memory Access (DMA)
The data transfer between any fast storage media like a memory unit and a magnetic
disk gets limited with the speed of the CPU. Thus it will be best to allow the
peripherals to directly communicate with the storage using the memory buses by
removing the intervention of the CPU. This mode of transfer of data technique is
known as Direct Memory Access (DMA). During Direct Memory Access, the CPU is
idle and has no control over the memory buses. The DMA controller takes over the
buses and directly manages data transfer between the memory unit and I/O devices.
 CPU Bus Signal for DMA transfer

Bus Request - We use bus requests in the DMA controller to ask the CPU to
relinquish the control buses.
Bus Grant - CPU activates bus grant to inform the DMA controller that DMA can
take control of the control buses. Once the control is taken, it can transfer data in
many ways.
Types of DMA transfer using DMA controller:
• Burst Transfer: In this transfer, DMA will return the bus control after the
complete data transfer. A register is used as a byte count, which decrements for
every byte transfer, and once it becomes zero, the DMA Controller will release
the control bus. When the DMA Controller operates in burst mode, the CPU is
halted for the duration of the data transfer.
• Cyclic Stealing: It is an alternative method for data transfer in which the DMA
controller will transfer one word at a time. After that, it will return the control of
the buses to the CPU. The CPU operation is only delayed for one memory cycle
to allow the data transfer to “steal” one memory cycle.
Frequently Asked Questions
What is Interleaved mode for data transfer?
It is a type of DMA transfer where the DMA controller will take over the system buses
only when the CPU is not using it.
How to find CPU busy % in Burst transfer?
We can use the formula mentioned below to calculate the CPU busy % in Burst
transfer:
X µsec = data preparation time or transfer time (words/block)
Y µsec = cycle time or memory cycle time or transfer time (words/block)
% CPU idle (Blocked)=(Y/X+Y)*100
% CPU Busy=(X/X+Y)*100
How to find CPU busy % in Cyclic Stealing?
We can use the formula mentioned below CPU busy % in Cyclic Stealing:
X µsec = data preparation time or transfer time (words/block)
Y µsec = cycle time or memory cycle time or transfer time (words/block)
% CPU idle (Blocked) =(Y/X)*100
% CPU busy=(X/Y)*100
What is the Interleaved mode?
In this technique, the DMA controller takes over the system’s bus when the
microprocessor is not using it at an alternate half-cycle i.e. half-cycle of DMA + half-
cycle of the processor.
Conclusion
We learned about different modes of transfer of data between the CPU and I/O
devices. Our article can be summarized as follows:
• We have three different modes of transfer: Programmed i/O, Interrupt-initiated
I/O, and Direct Memory Access (DMA).
• Programmed i/O and Interrupt-initiated I/O are modes of transfer that involve the
CPU for data transfer.
• Modes of transfer which does not involve CPU but instead directly connect with
the memory device for transferring data is DMA.
What Is Direct Memory Access?

Direct memory access (DMA) is a process that allows specific hardware devices to
access system memory independently of the CPU. This enables the device to
perform tasks without interrupting the main processor, improving performance. DMA
is used for devices such as disk controllers and network cards. You can also use it
for data transfer between the memory and peripheral devices such as sound cards
and graphics cards.

How Direct Memory Access Works?

DMA works by having a dedicated DMA controller that manages the data transfers
between memory and the various devices that need to access it. The DMA controller
will first need to be configured with the desired source and destination addresses, as
well as the size of the data transfer. Once everything is configured, the DMA
controller will initiate the transfer and monitor it until it is complete.

Since the DMA controller is handling the data transfer, the CPU is free to perform
other tasks while the transfer is taking place. This can significantly improve the
system's overall performance, as the CPU is not tied up with data transfer tasks.

There are some drawbacks to using DMA, however. First, it can be more difficult to
debug issues when DMA is being used, as the CPU is not directly involved in the
data transfer process. Secondly, DMA transfers can be slower than CPU-based
transfers, as the DMA controller needs to access memory in a specific way. But,
overall, DMA can be a valuable tool for speeding up data transfers and freeing up
the CPU for other tasks.
Different Modes of Operation

DMA has three modes of operation: burst mode, cycle stealing mode, and
transparent mode.

• Burst mode. In burst mode, the DMA controller takes control of the bus for a short
time to perform a data transfer. The CPU can still access memory, but there may be
a brief delay while the DMA controller finishes its task.
• Cycle stealing mode. In cycle stealing mode, the DMA controller takes control of the
bus whenever the CPU is not using it. This can cause problems if the DMA controller
needs to access memory while the CPU is also trying to use the bus.
• Transparent mode. In transparent mode, the DMA controller has full control of the
bus and can access memory without involving the CPU. This is the most efficient way
for the DMA controller to access memory, but it can cause problems if the CPU
needs to access memory while the DMA controller is using the bus.
How to Enable Direct Memory Access?

DMA can be enabled in the BIOS or by using a software utility. To enable DMA in the
BIOS, enter the BIOS setup utility and look for an option to enable or disable DMA.
The exact location of this option varies depending on your motherboard and BIOS,
but it is typically located in the "Advanced" or "Chipset" section. Once you have
found the option, set it to "Enabled" and save your changes.

You can try using a software utility if you cannot find an option to enable DMA in the
BIOS. Windows includes a utility called "Device Manager" that can be used to enable
or disable DMA for devices. To access Device Manager, click Start, then type
"device manager" into the search box. Device Manager will then show a list of all the
devices installed on your computer. Find the device you want to enable DMA for and
double-click it to open its properties. In the properties window, go to "Details" tab,
then find the "DMA" setting and set it to "Enabled". Save your changes and close
Device Manager.
Enabling DMA may require a restart of your computer for the changes to take effect.
Consult your motherboard or BIOS documentation for more information on enabling
DMA.

Final words

Direct Memory Access is an important technology that can improve the performance
of your computer. You can get the most out of your system by understanding how it
works and enabling it.
Discuss the I/O Interface in Computer Architecture?
The I/O interface supports a method by which data is transferred between internal
storage and external I/O devices. All the peripherals connected to a computer require
special communication connections for interfacing them with the CPU.

I/O Bus and Interface Modules

The I/O bus is the route used for peripheral devices to interact with the computer
processor. A typical connection of the I/O bus to I/O devices is shown in the figure.

The I/O bus includes data lines, address lines, and control lines. In any general-
purpose computer, the magnetic disk, printer, and keyboard, and display terminal are
commonly employed. Each peripheral unit has an interface unit associated with it.
Each interface decodes the control and address received from the I/O bus.
It can describe the address and control received from the peripheral and supports
signals for the peripheral controller. It also conducts the transfer of information
between peripheral and processor and also integrates the data flow.
The I/O bus is linked to all peripheral interfaces from the processor. The processor
locates a device address on the address line to interact with a specific device. Each
interface contains an address decoder attached to the I/O bus that monitors the
address lines.
When the address is recognized by the interface, it activates the direction between
the bus lines and the device that it controls. The interface disables the peripherals
whose address does not equivalent to the address in the bus.

An interface receives any of the following four commands −

• Control − A command control is given to activate the peripheral and to

inform its next task. This control command depends on the peripheral,
and each peripheral receives its sequence of control commands,
depending on its mode of operation.
• Status − A status command can test multiple test conditions in the
interface and the peripheral.
• Data Output − A data output command creates the interface counter to
the command by sending data from the bus to one of its registers.
• Data Input − The data input command is opposite to the data output
command. In data input, the interface gets an element of data from the
peripheral and places it in its buffer register.
Asynchronous Data Transfer in Computer
Organization
The internal operations in an individual unit of a digital system are synchronized using
clock pulse. It means clock pulse is given to all registers within a unit. And all data transfer
among internal registers occurs simultaneously during the occurrence of the clock pulse.
Now, suppose any two units of a digital system are designed independently, such as CPU
and I/O interface.

If the registers in the I/O interface share a common clock with CPU registers, then transfer
between the two units is said to be synchronous. But in most cases, the internal timing in
each unit is independent of each other, so each uses its private clock for its internal
registers. In this case, the two units are said to be asynchronous to each other, and if data
transfer occurs between them, this data transfer is called Asynchronous Data Transfer.

But, the Asynchronous Data Transfer between two independent units requires that
control signals be transmitted between the communicating units so that the time can be
indicated at which they send data. These two methods can achieve this asynchronous way
of data transfer:

o Strobe control: A strobe pulse is supplied by one unit to indicate to the other unit when
the transfer has to occur.
o Handshaking: This method is commonly used to accompany each data item being
transferred with a control signal that indicates data in the bus. The unit receiving the data
item responds with another signal to acknowledge receipt of the data.

The strobe pulse and handshaking method of asynchronous data transfer is not restricted
to I/O transfer. They are used extensively on numerous occasions requiring the transfer
of data between two independent units. So, here we consider the transmitting unit as a
source and receiving unit as a destination. the CPU is the source during output or write
transfer and the destination unit during input or read transfer.

Therefore, the control sequence during an asynchronous transfer depends on whether

the transfer is initiated by the source or by the destination.

So, while discussing each data transfer method asynchronously, you can see the control
sequence in both terms when it is initiated by source or by destination. In this way, each
data transfer method can be further divided into parts, source initiated and destination
initiated.

Asynchronous Data Transfer Methods

The asynchronous data transfer between two independent units requires that control
signals be transmitted between the communicating units to indicate when they send the
data. Thus, the two methods can achieve the asynchronous way of data transfer.
1. Strobe Control Method

The Strobe Control method of asynchronous data transfer employs a single control line
to time each transfer. This control line is also known as a strobe, and it may be achieved
either by source or destination, depending on which initiate the transfer.

a. Source initiated strobe: In the below block diagram, you can see that strobe is initiated
by source, and as shown in the timing diagram, the source unit first places the data on the data
bus.

After a brief delay to ensure that the data resolve to a stable value, the source activates a strobe
pulse. The information on the data bus and strobe control signal remains in the active state for a
sufficient time to allow the destination unit to receive the data.
The destination unit uses a falling edge of strobe control to transfer the contents of a data bus to
one of its internal registers. The source removes the data from the data bus after it disables its
strobe pulse. Thus, new valid data will be available only after the strobe is enabled again.
In this case, the strobe may be a memory-write control signal from the CPU to a memory unit. The
CPU places the word on the data bus and informs the memory unit, which is the destination.
b. Destination initiated strobe: In the below block diagram, you see that the strobe
initiated by destination, and in the timing diagram, the destination unit first activates the
strobe pulse, informing the source to provide the data.
 The source unit responds by placing the requested binary information on the data bus.
The data must be valid and remain on the bus long enough for the destination unit to
accept it.
The falling edge of the strobe pulse can use again to trigger a destination register. The
destination unit then disables the strobe. Finally, and source removes the data from the
data bus after a determined time interval.
In this case, the strobe may be a memory read control from the CPU to a memory unit. The
CPU initiates the read operation to inform the memory, which is a source unit, to place
the selected word into the data bus.

2. Handshaking Method

The strobe method has the disadvantage that the source unit that initiates the transfer
has no way of knowing whether the destination has received the data that was placed in
the bus. Similarly, a destination unit that initiates the transfer has no way of knowing
whether the source unit has placed data on the bus.

So this problem is solved by the handshaking method. The handshaking method

introduces a second control signal line that replays the unit that initiates the transfer.

In this method, one control line is in the same direction as the data flow in the bus from
the source to the destination. The source unit uses it to inform the destination unit
whether there are valid data in the bus.

The other control line is in the other direction from the destination to the source. This is
because the destination unit uses it to inform the source whether it can accept data. And
in it also, the sequence of control depends on the unit that initiates the transfer. So it
means the sequence of control depends on whether the transfer is initiated by source and
destination.
o Source initiated handshaking: In the below block diagram, you can see that two
handshaking lines are "data valid", which is generated by the source unit, and "data
accepted", generated by the destination unit.

The timing diagram shows the timing relationship of the exchange of signals between the
two units. The source initiates a transfer by placing data on the bus and enabling its data
valid signal. The destination unit then activates the data accepted signal after it accepts
the data from the bus.
The source unit then disables its valid data signal, which invalidates the data on the bus.
After this, the destination unit disables its data accepted signal, and the system goes into
its initial state. The source unit does not send the next data item until after the destination
unit shows readiness to accept new data by disabling the data accepted signal.
This sequence of events described in its sequence diagram, which shows the above
sequence in which the system is present at any given time.
o Destination initiated handshaking: In the below block diagram, you see that the two
handshaking lines are "data valid", generated by the source unit, and "ready for data"
generated by the destination unit.
Note that the name of signal data accepted generated by the destination unit has been
changed to ready for data to reflect its new meaning.
 The destination transfer is initiated, so the source unit does not place data on the data bus
until it receives a ready data signal from the destination unit. After that, the handshaking
process is the same as that of the source initiated.
The sequence of events is shown in its sequence diagram, and the timing relationship
between signals is shown in its timing diagram. Therefore, the sequence of events in both
cases would be identical.

Advantages of Asynchronous Data Transfer

Asynchronous Data Transfer in computer organization has the following advantages,
such as:

o It is more flexible, and devices can exchange information at their own pace. In addition,
individual data characters can complete themselves so that even if one packet is
corrupted, its predecessors and successors will not be affected.
o It does not require complex processes by the receiving device. Furthermore, it means that
inconsistency in data transfer does not result in a big crisis since the device can keep up
with the data stream. It also makes asynchronous transfers suitable for applications
where character data is generated irregularly.
Disadvantages of Asynchronous Data Transfer
There are also some disadvantages of using asynchronous data for transfer in computer
organization, such as:

o The success of these transmissions depends on the start bits and their recognition.
Unfortunately, this can be easily susceptible to line interference, causing these bits to be
corrupted or distorted.
o A large portion of the transmitted data is used to control and identify header bits and thus
carries no helpful information related to the transmitted data. This invariably means that
more data packets need to be sent.
Computer Architecture: Input/Output
Processor(I/O)

An input-output processor (IOP) is a processor with direct memory access capability. In this,
the computer system is divided into a memory unit and number of processors.

Each IOP controls and manage the input-output tasks. The IOP is similar to CPU except that
it handles only the details of I/O processing. The IOP can fetch and execute its own
instructions. These IOP instructions are designed to manage I/O transfers only.

Block Diagram Of I/O Processor

Below is a block diagram of a computer along with various I/O Processors. The memory unit
occupies the central position and can communicate with each processor.

The CPU processes the data required for solving the computational tasks. The IOP provides a
path for transfer of data between peripherals and memory. The CPU assigns the task of
initiating the I/O program.

The IOP operates independent from CPU and transfer data between peripherals and memory.

The communication between the IOP and the devices is similar to the program control
method of transfer. And the communication with the memory is similar to the direct memory
access method.
In large scale computers, each processor is independent of other processors and any processor
can initiate the operation.

The CPU can act as master and the IOP act as slave processor. The CPU assigns the task of
initiating operations but it is the IOP, who executes the instructions, and not the CPU. CPU
instructions provide operations to start an I/O transfer. The IOP asks for CPU through
interrupt.

Instructions that are read from memory by an IOP are also called commands to distinguish
them from instructions that are read by CPU. Commands are prepared by programmers and
are stored in memory. Command words make the program for IOP. CPU informs the IOP
where to find the commands in memory.
Data Transmission – Parallel vs
Serial
What is data transmission?
Data transmission refers to the process of transferring data between two or more digital
devices. Data is transmitted from one device to another in analog or digital format.
Basically, data transmission enables devices or components within devices to speak to
each other.

How does data transmission work between

digital devices?
Data is transferred in the form of bits between two or more digital devices. There are
two methods used to transmit data between digital devices: serial transmission and
parallel transmission. Serial data transmission sends data bits one after another over a
single channel. Parallel data transmission sends multiple data bits at the same time over
multiple channels.

What is serial transmission?

When data is sent or received using serial data transmission, the data bits are organized
in a specific order, since they can only be sent one after another. The order of the data
bits is important as it dictates how the transmission is organized when it is received. It
is viewed as a reliable data transmission method because a data bit is only sent if the
previous data bit has already been received.

Example of Serial Data Transmission

Serial transmission has two classifications: asynchronous and synchronous.

Asynchronous Serial Transmission

Data bits can be sent at any point in time. Stop bits and start bits are used between data
bytes to synchronize the transmitter and receiver and to ensure that the data is
transmitted correctly. The time between sending and receiving data bits is not constant,
so gaps are used to provide time between transmissions.

The advantage of using the asynchronous method is that no synchronization is required

between the transmitter and receiver devices. It is also a more cost effective method. A
disadvantage is that data transmission can be slower, but this is not always the case.

Synchronous Serial Transmission

Data bits are transmitted as a continuous stream in time with a master clock. The data
transmitter and receiver both operate using a synchronized clock frequency; therefore,
start bits, stop bits, and gaps are not used. This means that data moves faster and timing
errors are less frequent because the transmitter and receiver time is synced. However,
data accuracy is highly dependent on timing being synced correctly between devices. In
comparison with asynchronous serial transmission, this method is usually more
expensive.

When is serial transmission used to send

data?
Serial transmission is normally used for long-distance data transfer. It is also used in
cases where the amount of data being sent is relatively small. It ensures that data
integrity is maintained as it transmits the data bits in a specific order, one after another.
In this way, data bits are received in-sync with one another.

What is parallel transmission?

When data is sent using parallel data transmission, multiple data bits are transmitted
over multiple channels at the same time. This means that data can be sent much faster
than using serial transmission methods.

Example of Parallel Data Transmission

Given that multiple bits are sent over multiple channels at the same time, the order in
which a bit string is received can depend on various conditions, such as proximity to the
data source, user location, and bandwidth availability. Two examples of parallel
interfaces can be seen below. In the first parallel interface, the data is sent and received
in the correct order. In the second parallel interface, the data is sent in the correct order,
but some bits were received faster than others.

Example of Parallel Transmission – Data Received Correctly

Example of Parallel Transmission – Data Received Incorrectly

Advantages and Disadvantages of Using

Parallel Data Transmission
The main advantages of parallel transmission over serial transmission are:

• it is easier to program;
• and data is sent faster.

Although parallel transmission can transfer data faster, it requires more transmission
channels than serial transmission. This means that data bits can be out of sync,
depending on transfer distance and how fast each bit loads. A simple of example of
where this can be seen is with a voice over IP (VOIP) call when distortion or
interference is noticeable. It can also be seen when there is skipping or interference on a
video stream.
When is parallel transmission used to send
data?
Parallel transmission is used when:

• a large amount of data is being sent;

• the data being sent is time-sensitive;
• and the data needs to be sent quickly.

A scenario where parallel transmission is used to send data is video streaming. When a
video is streamed to a viewer, bits need to be received quickly to prevent a video
pausing or buffering. Video streaming also requires the transmission of large volumes of
data. The data being sent is also time-sensitive as slow data streams result in poor
viewer experience.
Transmission modes
o The way in which data is transmitted from one device to another device is known
as transmission mode.
o The transmission mode is also known as the communication mode.
o Each communication channel has a direction associated with it, and transmission media
provide the direction. Therefore, the transmission mode is also known as a directional
mode.
o The transmission mode is defined in the physical layer.

The Transmission mode is divided into three categories:

o Simplex mode
o Half-duplex mode
o Full-duplex mode

Simplex mode

o In Simplex mode, the communication is unidirectional, i.e., the data flow in one direction.
o A device can only send the data but cannot receive it or it can receive the data but cannot
send the data.
o This transmission mode is not very popular as mainly communications require the two-
way exchange of data. The simplex mode is used in the business field as in sales that do
not require any corresponding reply.
 o The radio station is a simplex channel as it transmits the signal to the listeners but never
allows them to transmit back.
o Keyboard and Monitor are the examples of the simplex mode as a keyboard can only
accept the data from the user and monitor can only be used to display the data on the
screen.
o The main advantage of the simplex mode is that the full capacity of the communication
channel can be utilized during transmission.

Advantage of Simplex mode:

o In simplex mode, the station can utilize the entire bandwidth of the communication
channel, so that more data can be transmitted at a time.

Disadvantage of Simplex mode:

o Communication is unidirectional, so it has no inter-communication between devices.

Half-Duplex mode

o In a Half-duplex channel, direction can be reversed, i.e., the station can transmit and
receive the data as well.
o Messages flow in both the directions, but not at the same time.
o The entire bandwidth of the communication channel is utilized in one direction at a time.
o In half-duplex mode, it is possible to perform the error detection, and if any error occurs,
then the receiver requests the sender to retransmit the data.
o A Walkie-talkie is an example of the Half-duplex mode. In Walkie-talkie, one party
speaks, and another party listens. After a pause, the other speaks and first party listens.
Speaking simultaneously will create the distorted sound which cannot be understood.

Advantage of Half-duplex mode:

o In half-duplex mode, both the devices can send and receive the data and also can utilize
the entire bandwidth of the communication channel during the transmission of data.
Disadvantage of Half-Duplex mode:
o In half-duplex mode, when one device is sending the data, then another has to wait, this
causes the delay in sending the data at the right time.

Full-duplex mode

o In Full duplex mode, the communication is bi-directional, i.e., the data flow in both the
directions.
o Both the stations can send and receive the message simultaneously.
o Full-duplex mode has two simplex channels. One channel has traffic moving in one
direction, and another channel has traffic flowing in the opposite direction.
o The Full-duplex mode is the fastest mode of communication between devices.
o The most common example of the full-duplex mode is a telephone network. When two
people are communicating with each other by a telephone line, both can talk and listen at
the same time.

Advantage of Full-duplex mode:

o Both the stations can send and receive the data at the same time.

Disadvantage of Full-duplex mode:

o If there is no dedicated path exists between the devices, then the capacity of the
communication channel is divided into two parts.

Differences b/w Simplex, Half-duplex and Full-

duplex mode
Basis for Simplex Half-duplex Full-duplex mode
comparison mode mode
Direction of In simplex In half-duplex In full-duplex mode, the communication is
communication mode, the mode, the bidirectional.
communication communication
is is bidirectional,
unidirectional. but one at a
time.

Send/Receive A device can Both the Both the devices can send and receive the data
only send the devices can simultaneously.
data but cannot send and
receive it or it receive the
can only data, but one at
receive the a time.
data but cannot
send it.

Performance The The The Full-

performance of performance of duplex mode
half-duplex full-duplex has better
mode is better mode is better performance
than the than the half- among simplex
simplex mode. duplex mode. and half-duplex
mode as it
doubles the
utilization of
the capacity of
the
communication
channel.

Example Examples of Example of Example of the Full-duplex mode is a telephone

Simplex mode half-duplex is network.
are radio, Walkie-Talkies.
keyboard, and
monitor.