Basics of Embedded Systems (RX63N) - Exercises

Basics of Embedded Systems
(RX63N-GR)_Exercises
Table of contents
Embedded Systems Fundamentals Exercise.......................................................................................... 2
Notes about the exercises ...................................................................................................................... 2
Exercise 1 Transfer................................................................................................................................. 5
Exercise 2 Arithmetic operation (Addition) ............................................................................................. 8
Exercise 3 Arithmetic operation (Subtraction)........................................................................................ 9
Exercise 4 Logical operations .............................................................................................................. 10
Exercise 5 Shift operation .....................................................................................................................11
Exercise 6 Bit manipulation .................................................................................................................. 12
Exercise 7 Conditional branch instructions .......................................................................................... 14
Exercise 8 Repeat ................................................................................................................................ 16
Exercise 9 Post-increment register indirect control.............................................................................. 17
Exercise 10 Pre-decrement register indirect control .......................................................................... 18
Exercise 11 Indexed register indirect control...................................................................................... 19
Exercise 12 Stack operation ............................................................................................................... 20
Exercise 13 Subroutine....................................................................................................................... 22
Additional exercises ................................................................................................................................. 23
Additional Exercise 1 Transfer ........................................................................................................... 23
Additional Exercise 2 Addition ........................................................................................................... 23
Additional Exercise 3 Subtraction ...................................................................................................... 24
Additional Exercise 4 Logical operations ........................................................................................... 24
Additional Exercise 5 Shift operations ............................................................................................... 24
Additional Exercise 6 Bit manipulation............................................................................................... 24
Additional Exercise 7 Conditional branch .......................................................................................... 25
Additional Exercise 8 Repeat............................................................................................................. 25
Additional Exercise 9 Post-increment register indirect control .......................................................... 25
Additional Exercise 10 Pre-decrement register indirect control......................................................... 25
Additional Exercise 11 Indexed register indirect control .................................................................... 25
Additional Exercise 12 Stack operation ............................................................................................. 25
Additional Exercise 13 Subroutine ..................................................................................................... 26
1 ©emBex Education Inc.

Embedded Systems Fundamentals Exercise
Notes about the exercises
 When launching a new project, remember to complete the initial settings as shown below.
・ Microcontroller: RX
・ Selection of chip: RX63N/R5F563NYDxFP (100pin)
・ Type of project: Empty application (CC-RX)
 For addition of a file, follow the steps listed below.
・ Right-click on the file in the project tree.
・ Addition/add a new file.
・ For a file name, designate the extension of ".src" referring to "assembler source file
(*.src;*.s)."
 For details about utilization of CS+, refer to the Training Document (CS+ User's Guide).
 The format of source is as shown below.

.SECTION RAM,DATA
.ORG 00000000H
... ; Define a variable here.
.SECTION CONST,ROMDATA
.ORG 0FFFF8000H
... ; Define the const Data having an initial value here.
.SECTION PROC,CODE
.ORG 0FFFF8100H
... ; Describe mnemonic here.
.SECTION RESET,ROMDATA ; Set a reset vector.
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END
 For instructions and addressing modes, always refer to the "RX Family User's Manual: Software." In
the Text, relevant pages are titled as "Instruction (UMSXXX)." (UMS: User's Manual: Software)
 Where the number of Errors is found one or more as a result of build, it suggests some problems in
the editing of source file, so be sure to make proper corrections. In the Exercises, take no account of
the warnings listed below for the present.
W0561100:Cannot find "B_1" specified in option "start"
W0561100:Cannot find "R_1" specified in option "start"
W0561100:Cannot find "B_2" specified in option "start"
W0561100:Cannot find "R_2" specified in option "start"
…

 Proceeding with the exercises
Under the C drive (C:), create a workspace folder, into which copy the exercise template.
Open the project for the exercise to work on. Click on the en01_MOV.mtpj file in the en01_MOV
folder to activate CS+.
Write a program to the field designated in the list.
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - -
; Project name : Embedded Systems Fundamentals with Renesas RX63N Exercise 1
; File name : en01_MOV.src
; Features : Transfer
; Question : Write the constant value 12H into the memory (1-byte variable RESULT).
; Revision history : 1.01 July 24, 2019 Newly issued by Kenshu Taro
; Copyright (c) 2018-2020 emBex Education inc. All Rights Reserved
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - -
Declare a constant.
Data for transfer
RAM variable area
Program
; ↓↓↓Start of input by trainee↓↓↓

Specify the address.
Write data.
; ↑↑↑End of input by trainee↑↑↑
Termination loop

Execute the "Build Project" from the build tag.
Where there is no build error found, execute the "Download to debug tool" through the debug tag.
 Execute the instructions one after another based on the step-in execution and check the operation,
referring to the register and memory.
Step-in execution
button
Register reference
Declare a constant.
; Data for transfer

RAM variable area
Program
; ↓↓↓Start of input by trainee↓↓↓

Specify the address.
Write data.
; ↑↑↑End of input by trainee↑↑↑
;Termination loop
Power ON reset
Memory
reference

Exercise 1 Transfer MOV, MOVU
■ Question 1
Write the (immediate) numeric value 12H into the memory (1byte variable D_SET).
 RX63N does not allow loading data into memory with a single instruction. Follow the steps listed
below.
Specify the address of variable RESULT in the general-purpose register.
Write the constant value 12H in the variable area in RAM (register indirect addressing).
 Click on the en01a_MOV.mtpj file in the en01a_MOV folder to activate CS+. To the en01a_MOV.src,
into which pseudo-instructions have been loaded, enter the flowchart section with mnemonic.
; Declare a constant.
IMM .EQU 12H ; Value for transfer
START
; RAM variable area

.SECTION RAM,DATA
Specify the address of D_SET to R11.
.ORG 00000080H
D_SET: .BLKB 1 ; Variable for
transfer
Write the constant value 12H into the

memory designated by R11. ; Program
.SECTION PROC,CODE
.ORG 0FFFF8100H
END ; ↓↓↓Start of input by trainee↓↓↓

HAJIME: MOV.L #D_SET,R11 ; Specify the address.
MOV.B #IMM,[R11] ; Write data.
; ↑↑↑End of input by trainee↑↑↑
OWARI: BRA OWARI ; Termination loop
; Power ON reset
.SECTION RESET,ROMDATA
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
; Stop the assembling.
.END
 Following build and download, check the operation on the simulator by step-in performance.

■ Question 2
Write the 1byte constant DATA value into the memory (1byte variable SET).
 Click on the en01b_MOV2.mtpj file in the en01b_MOV folder to activate CS+. To the
en01b_MOV.src, into which pseudo-instructions have been loaded, enter the flowchart section with
mnemonic.
 For transfer to the memory, give consider to the size of both source and destination of transfer.
; RAM variable area

.SECTION RAM,DATA
START
.ORG 00000080H
D_SET: .BLKB 1 ; Variable for transfer
Specify the address of DATA to R10.

; ROM variable area
Specify the address of D_SET to R11. .ORG 0FFFF8000H
DATA: .BYTE 12H ; Data for transfer
; Program
Write the data designated by R10 into the .SECTION PROC,CODE
memory designated by R11. .ORG 0FFFF8100H
; ↓↓↓Start of input by trainee↓↓↓

HAJIME: MOV.L #DATA,R10 ; Specify the address of transfer source
END MOV.L #D_SET,R11 ; Specify the address of transfer
destination.
MOV.B [R10],[R11] ; Transfer the data.
; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END

 RX63N does not allow reading data from memory with a single instruction. Addressing to data
reading, and addressing to data writing constitute a sequence of processes. The flowcharts listed
from now on are represented as shown in the lower left diagram.
START
MOV.L #DATA1,R11 ; Specify the address.
Read the data in variable DATA1 into R12. MOV.B [R11],R12 ; Read data.
・
・・
・・
・
・・
・・
MOV.L #D_DATA,R13 ; Specify the address.

Write the data in R12 into D_DATA. MOV.B R12,[R13] ; Write data.
END
 Precautions when reading byte and word data out from memory
When reading byte and word data out from memory, remember to use the sign extension for MOV
instruction. Extend the MSB (most significant bit) for byte and word data up to 32 bit.
In case where you do not want to apply sign extension, use the MOVU instruction.
DATA: .BYTE 87H :
MOV.L #DATA,R10 ; Specify the address. R11: FFFFFF87H

MOV.B [R10],R11 ; Read data (with sign extension).
MOVU.B [R10],R12 ; Read data (without sign extension). R12: 00000087H

Exercise 2 Arithmetic operation (Addition) ADD
Add the data of 4byte constant DATA1 and the data of 4byte constant DATA2 and write the
result into 4byte variable R_ADD.
 Click on the en02_ADD.mtpj file in the en02_ADD folder to activate CS+. To the en02_ADD.src, into
which pseudo-instructions have been loaded, enter the flowchart section with mnemonic.
; RAM variable area

START
STARTSTR .SECTION RAM,DATA
.ORG 00000080H
R_ADD: .BLKL 1 ; Variable to write the results of the
arithmetic operation
Read the data in DATA1 into R11.
; ROM constants area
.ORG 0FFFF8000H
Read the data in DATA2 into R12.
DATA1: .LWORD 0CBA9H ; Data 1 for arithmetic operation
DATA2: .LWORD 4321H ; Data 2 for arithmetic operation
; Program
Add R11 and R12 and write the result into R12. .SECTION PROC,CODE
.ORG 0FFFF8100H

Write the data in R12 into R_ADD. HAJIME: MOV.L #DATA1,R10 ; Specify the address for Data 1 for
arithmetic operation.
MOV.L [R10],R11 ; Set the value of Data 1 for
arithmetic operation to R11.
END MOV.L #DATA2,R10 ; Specify the address for Data 2 for
ADD R11,R12 ; Add R11 and R12 and place the result
to R12.
 Following build and download, check MOV.L #R_DATA,R10 ; Specify the address for the variable
to store the result of arithmetic
the operation on the simulator by operation.
step-in performance. MOV.L R12,[R10] ; Store the result of the addition.

; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END
 Anticipate the result of addition and compare it with the result of simulator.
Anticipated result Result
Storage
Instruction location Binary number Hexadecimal Hexadecimal
number number
DATA1 0000 0000 0000 0000 1100 1011 1010 1001 0CBA9H
DATA2 0000 0000 0000 0000 0000 0100 0011 0010 432H
Addition R_ADD
 In this Exercise, the instruction syntax ADD src,dest with the two (2) operands, src and dest, has
been used. For instructions with two operands, the result of addition of dest and src will be stored in
the dest and the dest is overwritten.
 On the other hand, where the instruction syntax ADD src,src2,dest with the three (3) operands, src,
src2, and dest, is used, the result of addition of src and src2 will be stored in the dest and the src
and src2 are not either overwritten.

Exercise 3 Arithmetic operation (Subtraction) SUB
Subtract the data in 4byte constant DATA2 from 4byte constant DATA1 and write the result
into 4byte variable R_SUB.
 Click on the en03_SUB.mtpj file in the en03_SUB folder to activate CS+. To the en03_SUB.src, into
; RAM variable area

.SECTION RAM,DATA
START .ORG 00000080H
R_SUB: .BLKL 1 ; Write the result of arithmetic
operation.
Read the data in DATA1 into R11. ; ROM constants area

.ORG 0FFFF8000H
DATA1: .LWORD 0CBA9H ; Data 1 for arithmetic operation
Read the data in DATA2 into R12. DATA2: .LWORD 4321H ; Data 2 for arithmetic operation
; Program
.SECTION PROC,CODE
Subtract R12 from R11 and write the result into
.ORG 0FFFF8100H
R11.

HAJIME: MOV.L #DATA1,R10 ; Specify the address for Data 1 for
Write the data in R11 into R_SUB. arithmetic operation.
MOV.L #DATA2,R10 ; Specify the address for Data 2 for
END arithmetic operation.
SUB R12,R11 ; Subtract R12 from R11 and write the
result into R11.
MOV.L #R_SUB,R10 ; Specify the address for the variables
to store the result of arithmetic
 Following build and download, check operation.
MOV.L R11,[R10] ; Store the result of subtraction.
the operation on the simulator by ; ↑↑↑End of input by trainee↑↑↑
step-in performance. OWARI: BRA OWARI ; Termination loop
; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END
 Anticipate the result of subtraction and compare it with the result of simulator.
Storage
number number
DATA1 0000 0000 0000 0000 1100 1011 1010 1001 0CBA9H
DATA2 0000 0000 0000 0000 0000 0100 0011 0010 432H
Subtraction R_SUB
 In this Exercise, the instruction syntax SUB src,dest with the two (2) operands, src and dest, has
been used. For instructions with two operands, the result of subtraction of src from dest will be
stored in the dest and the dest is overwritten.
 On the other hand, where the instruction syntax SUB src,src2,dest with the three (3) operands, src,
src2, and dest, is used, the result of subtraction of src from src2 will be stored in the dest and the src
and src2 are not either overwritten.

Exercise 4 Logical operations AND, OR, XOR, NOT
Obtain the logical product (=conjunction; AND) of 4byte constant DATA1 and DATA1 and write
it into 4byte variable R_AND. Then, change the instructions to logical sum (=disjunction; OR),
exclusive OR (XOR), and logical reversal to review the results.
 Click on the en04_LOG.mtpj file in the en04_LOG folder to activate CS+. To the en04_LOG.src, into
; RAM variable area

START .SECTION RAM,DATA
.ORG 00000080H
R_DATA: .BLKL 1 ; Write the result of logical operations.
Read the data of DATA1 into R13.
.ORG 0FFFF8000H
Read the data of DATA2 into R14. DATA1: .LWORD 7F5F3F1FH ; Data 1 for logical operation
DATA2: .LWORD 0F7F5F3F1H ; Data 2 for logical operation
Place the result of logical product of R13 ; Program

and R14 to R14.
.SECTION PROC,CODE
.ORG 0FFFF8100H
Write the data in R14 into R_ADD.
HAJIME: MOV.L #DATA1,R10 ; Specify the address for Data 1 for
MOV.L [R10],R13 ; Set the value of Data 1 to R13.
END MOV.L #DATA2,R10 ; Specify the address for Data 2 for
MOV.L [R10],R14 ; Set the value of Data 2 to R13.
AND R13,R14 ; Write the result of logical product of R13
 Following build and download, and R14 to R14.
MOV.L #R_DATA,R10 ; Specify the address for the variables to
check the operation on the store the result of arithmetic operation.
simulator by step-in MOV.L R14,[R10] ; Store the result of arithmetic operation.
performance. OWARI: BRA OWARI ; Termination loop
 Perform OR, XOR, and logical ; Power ON reset
inversion to write the variable .ORG 0FFFFFFFCH
R_OR,R_XOR,R_NOT. (Define .LWORD 0FFFF8100H
NOT as a logical inversion of .END
DATAX.) Remember that for
those instructions AND, OR, and XOR with two (2) operands, the data in the dest will be rewritten
into the result of arithmetic operation. The instructions AND and OR may be specified with three (3)
operands. Let's try coding.
Note) XOR cannot be specified with three (3) operands.
 Anticipate the result of logical operation and compare it with the result of simulator.
Storage
Instruction location
Binary number Hexadecimal Hexadecimal
number number
DATA1 0111 1111 0101 1111 0011 1111 0001 1111 7F5F3F1FH
DATA2 1111 0111 1111 0101 1111 0011 1111 0001 0F7F5F3F1H
Logical product R_AND
Logical sum R_OR
Exclusive OR R_XOR
Logical inversion R_NOT
of DATA1

Exercise 5 Shift operation SHLL, SHLR, SHAR
Write the result of 3bit logical leftshift of 4byte constant DATA into the 4byte variable
R_SHLL and the result of 3bit logical rightshift into the R_SHLR.
 Click on the en05_SHF.mtpj file in the en05_SHF folder to activate CS+. To the en05_SHF.src, into
; RAM variable area

START
.SECTION RAM,DATA
.ORG 00000000H
R_SHLL: .BLKL 1 ; Write the result of left-shift.
Read the data of DATA into R13. R_SHLR: .BLKL 1 ; Write the result of right-shift.

Logically shift R13 to left by 3 bits. .SECTION CONST,ROMDATA
.ORG 0FFFF8000H
DATA: .LWORD 0F0F0F0FH ; Source data for shift
Write R13 into R_SHLL.
; Program
.SECTION PROC,CODE
Read the data of DATA into R14. .ORG 0FFFF8100H
HAJIME: MOV.L #DATA,R10 ; Specify the address for DATA.
Logically shift R14 to left by 3 bits.
MOV.L [R10],R13 ; Set the value of DATA to R13.
SHLL #3,R13 ; Logically shift R13 to left by 3
Write the data in R14 into R_SHLR. bits.
MOV.L #R_SHLL,R10 ; Specify the address for R_SHLL.
MOV.L R13,[R10] ; Set the value for R13.
END MOV.L #DATA,R10 ; Specify the address for DATA.

MOV.L [R10],R14 ; Set the value of DATA to R14.
SHLR #3,R14 ; Logically shift R14 to right by 3
bits.
MOV.L #R_SHLR,R10 ; Specify the address for R_SHLR.
 Following build and download, check MOV.L R14,[R10] ; Set the value for R14.
the operation on the simulator by OWARI: BRA OWARI ; Termination loop
step-in performance.
; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END
 Anticipate the results of logical left shift and logical right shift and compare them with the results of
simulator.
Storage
Instruction location
Binary number Hexadecimal Hexadecimal
number number
DATA 0000 1111 0000 1111 0000 1111 0000 1111 0F0F0F0FH
Logical left shift R_SHLL
Logical right shift R_SHLR

Exercise 6 Bit manipulation BCLR, BSET, BNOT, BTST
■ Question 1
Write the constant value 0FH into the 1byte variable DATA and set bit 7 to "1" and bit 3 to "0."
 The instructions BCLR, BSET, and BNOT are executable on the memory (RAM) for 8-bit data.
Specify the address for the target memory in the register first then execute the instructions through
register indirect addressing. Data larger than 8 bit can only be processed in the general-purpose
register.
 Click on the en06_BIT.mtpj file in the en06_BIT folder to activate CS+. To the en06_BIT.src, into
; Declare a constant.
S_IMM .EQU 0FH ; Initial value
START ; RAM variable area

.SECTION RAM,DATA
.ORG 00000080H
DATA: .BLKB 1 ; Variable subject to bit
manipulation
Write 0FH into Variable DATA.
; Program
.SECTION PROC,CODE
.ORG 0FFFF8100H

Set bit 7 of data in Variable DATA to "1."
HAJIME: MOV.L #DATA,R10 ; Specify the address for DATA.
MOV.B #S_IMM,[R10] ; Set the initial value (0FH) to
DATA.
BSET #7,[R10] ; Set bit 7.
Set Bit 3 of data in Variable DATA to "0." BCLR #3,[R10] ; Clear bit 3.

END ; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
 Following build and download, check the ; Stop the assembling.
.END
operation on the simulator by step-in
performance.
 Anticipate the steps of bit manipulation and compare with the results of simulator.

Storage
number number
DATA 0000 1111 0FH
BSET(7) DATA
BCLR(3) DATA
 Bit manipulation instructions also include BTST instruction to check specific bits, but its instruction
syntax is BTST src,src2 without dest. It checks the bit of src2 designated by src and reflects the
result into PSW. It behaves similarly to the CMP instruction discussed in the next Exercise.

■ Question 2
Write "0F0FH" into the register R13 then set bit 31 in R13 to "1" and bit 15 to "0." In addition,
check the manipulated bits and review the result of PSW.
 The instructions BCLR, BSET, and BNOT will be processed in 32 bits in the general-purpose
register.
 Click on the en06b_BIT.mtpj file in the en06b_BIT folder to activate CS+. To the en06b_BIT.src, into
; Program
START .SECTION PROC,CODE
.ORG 0FFFF8100H

Write 0F0FH into variable R13. HAJIME: MOV.L #0F0FH,R13 ; Set 0F0FH to R13.
BSET #31,R13 ; Set bit 31.
BTST #31,R13 ; Check bit 31.
Set bit 31 in R13 to "1."
BCLR #15,R13 ; Clear bit 15.
BTST #15,R13 ; Check bit 15.
Check bit 31 in R13. ; ↑↑↑End of input by trainee↑↑↑

Set bit 15 in R13 to "0."
; Power ON reset
Check bit 15 in R13. .ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END
END
 Following build and download, check the

operation on the simulator by step-in
performance.
 Anticipate the steps of bit manipulation and compare with the results of simulator.

Storage
number number
R13 0000 0000 0000 0000 0000 1111 0000 1111 00000F0FH
BSET(31) R13
BCLR(15) R13

Exercise 7 Conditional branch instructions CMP, BCnd
Compare between 1byte constants, DATA1 and DATA2, then write the larger data into 1byte
variables R_BIG. Even where DATA1 and DATA2 are found equal to each other in the value,
write the value into R_BIG.
* Even where DATA1 and DATA2 are found equal to each other in the value, write the value into
R_BIG.
 For judgement criteria for the conditional branch instructions, use the CMP instruction as a rule. This
instruction refers to SUB instruction in practice and it does not affect any operand but only affect the
CZSO flag in PSW. It controls whether or not branch takes place with BCnd depending on the state
of PSW.
 The instructions for arithmetic and logical operations affect the CZSO flag in PSW when being
executed. Consequently, the CMP instruction could be omitted in many cases.
 Click on the en07_JUG.mtpj file in the en07_JUG folder to activate CS+. To the en07_JUG.src, into
; RAM variable area

.SECTION RAM,DATA
START .ORG 00000080H
R_BIG: .BLKB 1 ; Write larger (or equal) data.

Read the data in variable DATA1 into R13. .SECTION CONST,ROMDATA
.ORG 0FFFF8000H
DATA1: .BYTE 12H
DATA2: .BYTE 34H
Read the data in variable DATA2 into R14.
; Program
.SECTION PROC,CODE
Compare between R13 and R14. .ORG 0FFFF8100H

Yes HAJIME: MOV.L #DATA1,R10 ; Specify the address for DATA1.
MOV.B [R10],R13 ; Set the value of DATA1 to R13.
PSW: C = 1
MOV.L #DATA2,R10 ; Specify the address for DATA2.
MOV.B [R10],R14 ; Set the value of DATA2 to R14.
No CMP R13,R14 ; Compare between R13 (DATA1) and
R14 (DATA2).
Set the data in R13 to R14. BC BIG ; Branch to BIG when R14 > R13 (C = 1).
MOV.B R13,R14 ; Transfer the data in R13 to
R14.
BIG: MOV.L #R_BIG,R10 ; Specify the address for R_BIG.
Write the data in R14 into R_BIG. MOV.B R14,[R10] ; Set data to R_BIG.

END
; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END
 Varying DATA1 and DATA2, repeat build and download and check the behaviors for any difference
through step-in performance.

 Processor status word (PSW) (UMS020)
1.2.2.4 Processor status word (PSW)
b27
(Note)
Value after reset
Value after reset
Note Since interrupt priority levels for RX610 Group are from 0 to 7, b27 is reserved. Writing to b27 is ineffective.
Bit Symbol Bit name Function R/W

b0 C Carry flag 0: No carry has occurred. R/W
1: A carry has occurred.
b1 Z Zero flag 0: Operation result is non-zero. R/W
1: Operation result is 0.
b2 S Sign flag 0: Operation result is a positive value or 0. R/W
1: Operation result is a negative value.
b3 O Overflow flag 0: No overflow has occurred. R/W
1: Overflow has occurred.
b15-b4 — Reserved bit When writing, write "0" to this bit. R/W
The value read is always "0."
b16 I (Note 1) Interrupt enable bit 0: Interrupt disabled R/W
1: Interrupt enabled
(Note 1)
b17 U Stack pointer designation bit 0: Interrupt stack pointer (ISP) is selected. R/W
1: User stack pointer (USP) is selected.
(Notes 1, 2, and
b20 PM Processor mode setting bit 0: Supervisor mode is selected. R/W
3)
1: User mode is selected.
(Notes 1 b27 b24
b27-b24 IPL[3.0] Processor interrupt priority R/W
and 4)
level 0 0 0 0: Priority level 0 (Lowest)
0 0 0 1: Priority level 1
1 1 1 1: Priority level 15 (Highest)
Note 1 In the user mode, writing into IPL[3:0], PM, U, and I bits with either instruction, MVTC or POPC, becomes ignored. In additio n,
where an attempt is made for writing into IPL[3:0] with the MVTIPL instruction, the privileged operation exception results.
Note 2 In the supervisor mode, writing into PM bit with either instruction, MVTC or POPC, becomes ignored. Writing into any other
bits will be valid.
Note 3 When changing the supervisor mode to the user mode, set the PM bit in PSW saved in the stack to "1" then execute the RTE
instruction, or set the PM bit in backup PSW (BPSW) to "1" then execute the RTFI instruction.
Note 4 Since interrupt priority levels for RX610 Group are from 0 to 7, b27 is reserved. Writing to b27 is ineffective.

Exercise 8 Repeat BCnd
Sum the numbers from 1 to 10 and write the result to the variable SUM.
 Click on the en08_LOP.mRpj file in the en08_LOP folder to activate CS+. To the en08_LOP.src, into
; Constant definition
MAX_NUM .EQU 10 ; Maximum value to sum
START
; RAM variable area
.SECTION RAM,DATA
.ORG 00000080H
Set the first added number to R11.
SUM: .BLKL 1 ; Variable to write the sum total
; Program
.SECTION PROC,CODE
Initialize the register R12 into which the
result of addition is to be stored. .ORG 0FFFF8100H

HAJIME: MOV.L #1,R11 ; Set the first added number to the R11 register.
MOV.L #0,R12 ; Initialize the register R12 into which the
Add R11 and R12 and place the result to result of addition is to be loaded.
R12. LOOP: ADD R1,R12 ; Add R11 and R12 and place the result to R12.
ADD #1,R11 ; Increment R11.
CMP #MAX_NUM,R11 ; Determine whether or not the data is final for
Increment R11. addition.
BLE LOOP ; Return to LOOP if addition is in progress.
MOV.L #SUM,R13 ; Specify the address for SUM.
YES MOV.L R12,[R13] ; Write the result of addition into SUM.
R11 <= 10 ; ↑↑↑End of input by trainee↑↑↑

NO
; Power ON reset
.ORG 0FFFFFFFCH
Write the data in R12 into SUM.
.LWORD 0FFFF8100H
.END
END

Exercise 9 Postincrement register indirect control
Set ten (10) 1byte data in ROM to the variables array in RAM.
Use the postincrement register indirect control.
 The post-increment register indirect control will add 1/2/4 to the data in the register based on the
size specifier after execution of the instruction. It can be used with the instructions, either MOV or
MOVU, so it is helpful when gaining access to the continuous regions in memory sequentially.
 Click on the en09_PIN.mtpj file in the en09_PIN folder to activate CS+. To the en09_PIN.src, into
; Set a constant.
CNT_LP .EQU 10 ; The number of data elements
START
; RAM variable area
Initialize R11 to serve as the counter of the .SECTION RAM,DATA
number of processing times. .ORG 00000080H
DATA_T: .BLKB 10 ; Variables array
Set the MAX value of processing times to R12.
.ORG 0FFFF8000H
Specify the address for array data in ROM.
DATA_S: .BYTE 97,34,78,60,56,87,03,71,15,67; Array data
Specify the address for variable data in RAM. ; Program

.SECTION PROC,CODE
.ORG 0FFFF8100H

Compare the number of HAJIME: MOV.L #0,R11 ; Initialize R11 to serve as the
processing times. counter of the number of processing
times.
MOV.L #CNT_LP,R12 ; Set the MAX value of processing times
to R12.
Complete the processing
MOV.L #DATA_S, R13 ; Specify the address for array data
for data elements.
(ROM).
MOV.L #DATA_T,R14 ; Specify the address for variable data
(RAM).
Read the array data. LOOP: CMP R11,R12 ; Compare the number of processing
times.
BZ OWARI ; Terminate when the processing has
been completed.
Set data to the variables array.
MOV.B [R13+],R10 ; Read the array data (post-increment).
MOV.B R10,[R14+] ; Set to variables array (post-
increment).
Count UP the counter of the number ADD #1,R11 ; Count UP the counter of the number of
of processing times. processing times.
BRA LOOP ; Proceed to the next processing.
Proceed to the next ; ↑↑↑End of input by trainee↑↑↑

processing. OWARI: BRA OWARI ; Termination loop
; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
END
.END
 The post-increment register indirect control is often used in copying data area.

Exercise 10 Predecrement register indirect control
Set ten (10) 1byte data in ROM to the variables array in RAM in reverse order.
Use the predecrement register indirect control.
 The pre-decrement register indirect control will subtract 1/2/4 from the data in the register based on
the size specifier before execution of the instruction and then execute the instruction. It can be used
with the instruction, either MOV or MOVU.
 Click on the en10_PDE.mtpj file in the en10_PDE folder to activate CS+. To the en10_PDE.src, into
; Set a constant.
START CNT_LP .EQU 10 ; The number of data elements
; RAM variable area
.SECTION RAM,DATA
Initialize R11 to serve as the counter of the .ORG 00000080H
number of processing times. DATA_T: .BLKB 10 ; Variables array
Set the MAX value of processing times to R12. ; ROM constants area
Specify the address for array data in ROM. .ORG 0FFFF8000H
DATA_S: .BYTE 97,34,78,60,56,87,03,71,15,67 ; Array data
Adding the number of data elements to the

; Program
address of array data
.SECTION PROC,CODE
.ORG 0FFFF8100H
Specify the address for variable data in
RAM.
HAJIME: MOV.L #0,R11 ; Initialize R11 to serve as the
counter of the number of processing
Compare the number of times.
processing times. MOV.L #CNT_LP,R12 ; Set the MAX value of the number of
processing times to R12.
Complete the processing (ROM).
for data elements. ADD #CNT_LP,R13 ; Add the number of data elements to
the address of array.
Read the array data. (RAM).
LOOP: CMP R11,R12 ; Compare the number of processing
times.
been completed.
MOV.B [-R13],R10 ; Read the array data (pre-decrement).
Count UP the counter of the number MOV.B R10,[R14+] ; Set to variables array (post-
of processing times. increment).
ADD #1,R11 ; Count UP the counter of the number of
processing times.
Proceed to the next
processing.
; Power ON reset
END .ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
.END

Exercise 11 Indexed register indirect control
Use the indexed register indirect control.
 The indexed register indirect is used to fetch specific data from sequential data such as array in
memory.
Describe the instruction in the format of MOV.B [Ri,Rb],Rd .
The content in the memory designated by the value of addition of the content in Rb (base) and Ri
(index) will be stored in Rd.
 Click on the en11_IND.mtpj file in the en11_IND folder to activate CS+. To the en11_IND.src, into
; Set a constant.
START
; RAM variable area
DATA_T: .BLKB 10 ; Variables array
Set the MAX value of processing times to R12.
.ORG 0FFFF8000H
DATA_S: .BYTE 97,34,78,60,56,87,03,71,15,67; Array data
; Program
Specify the address for variable data in RAM.
.SECTION PROC,CODE
.ORG 0FFFF8100H

Compare the number of HAJIME: MOV.L #0,R11 ; Initialize R11 to serve as the
processing times. counter of the number of processing
times.
MOV.L #CNT_LP,R12 ; Set the MAX value of the number of
Complete the processing
for data elements.
(ROM).
(RAM).
Read the array data. LOOP: CMP R11,R12 ; Compare the number of processing
times.
been completed.
Set data to the variables array. MOV.B [R13+],R10 ; Read the array data (indexed
register).
MOV.B R10,[R14+] ; Set to variables array (indexed
Count UP the counter of the number register).
of processing times. ADD #1,R11 ; Count UP the counter of the number of
processing times.
Proceed to the next
processing. ; ↑↑↑End of input by trainee↑↑↑
; Power ON reset
.ORG 0FFFFFFFCH
.LWORD 0FFFF8100H
END ; Stop the assembling.
.END

Exercise 12 Stack operation
Using a stack, set three (3) 4byte data held in constant data in ROM to the variables array in
RAM in reverse order.
 Typical CPUs are allowed to use the special RAM space called stack. A stack puts up data on top
of each other in the order from higher to lower addresses. By only managing the stacking order of
data, there is no need to name and manage the individual data areas. In the following exercise,
let's try using the stack.
 Once the PUSH instruction is executed, the CPU subtracts 4 (byte) from SP (stack pointer) then
saves the content in the specified general-purpose register into the address designated by SP.
* The 4 byte refers to the size of the register.
 Once the POP instruction is executed, the CPU returns the data at the address designated by SP
to the specified general-purpose register.
 Using the stack requires setting SP (R0).
 Click on the en12_STC.mtpj file in the en12_STC folder to activate CS+. To the en12_STC.src, into
Column: Stack area
1. It is automatically managed by the stack pointer (SP) that the RAM made
available as a stack has been used up to where (which address) and the
address used next is which. Simply by specifying the address of the stack area
first at SP, the programmer hereafter needs not to be conscious about where
the SP lies at present. Consequently, required is only setting the value of "the
final address in the area used as stack + 1" to SP (R0 acts as SP in the RX63
series) before using the stack for calling the subroutine. The stack area is
allowed to use any RAM space, but it normally uses the built-in RAM space.
2. For the program to use the stack area, the programmer must give consideration
to the capacity of stack (what byte is required as the whole). Determine the
stack capacity to be used after creating the program and check if the
corresponding RAM space is freely available.

; Set a constant.
START INIT_SP .EQU 100H ; Initial stack pointer
Set the initial stack pointer to R0. ; RAM variable area

.SECTION RAM,DATA
Initialize R11 to serve as the counter of the .ORG 00000080H
number of processing times. M_TBL: .BLKL 3 ; Variables array
Set the MAX value of processing times to

R12. ; ROM constants area
.ORG 0FFFF8000H
DATA: .LWORD 0ABCDEF01H, 0CDEF0123H, 0EF012345H; Array data
Specify the address for variable data in ; Program

RAM. .SECTION PROC,CODE
.ORG 0FFFF8100H
Compare the number of ; ↓↓↓Start of input by trainee↓↓↓

processing times. HAJIME: MOV.L #INIT_SP,R0 ; Set the initial stack pointer to R0.
MOV.L #0,R11 ; Initialize R11 to serve as the
counter of the number of processing
Complete the times.
processing for data
elements. MOV.L #CNT_LP,R12 ; Set the MAX value of the number of
MOV.L #DATA, R13 ; Specify the address for array data
Read the array data. (ROM).
MOV.L #M_TBL,R14 ; Specify the address for variable data
Store the data into the stack. (RAM).
LOOP: CMP R11,R12 ; Compare the number of processing
times.
Count UP the counter of the
number of processing times. BZ LOOP2 ; Proceed to LOOP2 when the processing
is found completed.
MOV.L [R13+],R10 ; Read the data from ROM.
PUSH.L R10 ; Store the data in the stack.
Proceed to processing
of the next data. ADD #1,R11 ; Count UP the counter of the number of
processing times.
BRA LOOP ; Proceed to processing of the next
data (to LOOP).
LOOP2: CMP #0,R11 ; Compare the number of processing
Compare the number of
processing times. times.
been completed (proceed to OWARI).
Complete the POP R10 ; Acquire the data from the stack.
processing for data MOV.L R10,[R14+] ; Set the data to the variables array.
elements.
SUB #1,R11 ; Count DOWN the counter of the number
of processing times.
Acquire data from the stack. BRA LOOP2 ; Proceed to processing of the next
data (to LOOP2).

Count DOWN the counter of the
number of processing times.
; Power ON reset
.ORG 0FFFFFFFCH
Proceed to processing .LWORD 0FFFF8100H
of the next data.

.END
END
Following build and download, check the operation on the simulator by step-in performance.

Exercise 13 Subroutine BSR, JSR, RTS
In this step, remember to define as the subroutine the section in which data in ROM is to be
included into variables array in RAM.
 The subroutine is a sequence of procedures that performs a specified task composed of a set of
features in a program. So, once one subroutine is described, it becomes not necessary to describe
similar processing repeatedly.
 Click on the en13_SRT.mtpj file in the en13_SRT folder to activate CS+. To the en13_SRT.src, into
START
; Set a constant.
INIT_SP .EQU 100H ; Initial stack pointer
Set the initial stack pointer to R0.
; RAM variable area
DATA_1: .BLKB 10 ; Variables array
Set the MAX value of the number of
processing times to R12. ; ROM constants area
Specify the address for array data in ROM. .ORG 0FFFF8000H
DATA: .BYTE 97,34,78,60,56,87,03,71,15,67 ; Array data
Specify the address for variable data in

; Program
RAM.
.SECTION PROC,CODE
.ORG 0FFFF8100H
Compare the number of
processing times.
HAJIME: MOV.L #INIT_SP,R0 ; Set the initial stack pointer to R0.
MOV.L #0,R11 ; Initialize R11 to serve as the counter
of the number of processing times.
Complete the
processing for data MOV.L #CNT_LP,R12 ; Set the MAX value of the number of
elements. processing times to R12.
MOV.L #DATA, R13 ; Specify the address for ROM constants
data.
Subroutine
SET_DT MOV.L #DATA_1,R14 ; Specify the address for RAM variable
data.
LOOP: CMP R11,R12 ; Compare the number of processing times.
BZ OWARI ; Complete the processing for data
Proceed to the next elements.
processing.
BSR SET_DT ; Call the subroutine.
BRA LOOP ; Proceed to processing of the next data.

END OWARI: BRA OWARI ; Termination loop

SET_DT: MOV.B [R11,R13],R10 ; Read array data.
MOV.B R10,[R11,R14] ; Set to variables array.
SET_DT
ADD #1,R11 ; Count UP the counter of the number of
processing times.
RETURN: RTS ; Return
Read the array data.
Set data to the variables array. ; Power ON reset

.ORG 0FFFFFFFCH
Count UP the counter of the .LWORD 0FFFF8100H
number of processing times.
.END
RTS

Additional exercises
Additional exercises are listed below. Follow the instructor's directions to work on the exercises.
Consider a flowchart, select appropriate instructions among the assembler pseudo-instructions, and
describe them fully.
Additional Exercise 1 Transfer

1) Write (12H) into 1-byte variable SET_B, (34ABH) into 2-byte variable SET_W, and
(5F6E4D3CH) into 4-byte variable SET_L, respectively.
2) Write 1-byte constant data DATA_1 (12H) into 1-byte variable SET_B, 2-byte constant data
DATA_2 (34ABH) into 2-byte variable SET_W, and 4-byte constant data DATA_3
(5F6E4D3CH) into 4-byte variable SET_L, respectively.
3) Write 1-byte constant data DATA_1 (8AH) into 4-byte variable SET_1 with a sign and into 4-
byte variable SET_2 without any sign, respectively.
Additional Exercise 2 Addition

1) Write the result of adding 2-byte constant data DATA2 (12FFH) to 4-byte constant data DATA1
(07FFFFF01H) with signed 2-byte into 4-byte variable R_ADD_1, with signed 1-byte into 4-
byte variable R_ADD_2, and with unsigned 1-byte into 4-byte variable R_ADD_3, respectively.
● The values stored after execution will be as shown below.
R_ADD_1 : 80001200H
R_ADD_2 : 7FFFFF00H
R_ADD_3 : 80000000H
2) Add 4-byte constant DATA1 (12345678H) and 4-byte constant DATA2 (0FEDCBA98H) to each
other with consideration given to occurrence of a carry. Write the result into 4-byte variable
R_ADD_L (storing lower data) and 4-byte variable R_ADD_H (storing higher data).
R_ADD_L : 11111110H
R_ADD_H : 00000001H

Additional Exercise 3 Subtraction
1) Write the result of subtracting 4-byte constant data DATA2 (1234FF02H) from 4-byte constant
data DATA1 (7FFFFF01H) with signed 4-byte into 4-byte variable R_SUB_1, with signed 2-
byte into 4-byte variable R_SUB_2, and with unsigned 2-byte into 4-byte variable R_SUB_3,
respectively.
R_SUB_1 : 6DCAFFFFH
R_SUB_2 : 7FFFFFFFH
R_SUB_3: 7FFEFFFFH (Note that a difference of 10000H occurs compared to
R_SUB_2.)
2) Assuming that the value of DATA2 in above 1) is (1234FF01H), anticipate the respective
values of R_SUB_1, R_SUB_2, and R_SUB_3.
Check the anticipated values against the values of actually executed results.
Additional Exercise 4 Logical operations

1) Write 2-byte constant data DATA1 (0FC3H) into 2-byte variable R_LOG based on the logical
operation by leaving the values in even bits unchanged and setting only the values in odd bits
to "1."
2) Store the value of combining higher order 8 bits of 2-byte constant data DATA1 (1357H) and
lower order 8 bits of 2-byte constant data DATA2 (9BDFH) into 2-byte variable R_ROG.
Additional Exercise 5 Shift operations

1) Double 2-byte constant data DATA1 (0789H) with the shift instruction and write the result into
2-byte variable RESULT.
2) Increase 1-byte constant data DATA1 (5FH) ten (10) times with the shift and addition
instructions and write the result into 2-byte variable RESULT.
Additional Exercise 6 Bit manipulation

Store a 16-bit value (0F0F0H) into 2-byte variable DATA with the immediate instruction and set bits
1, 3, 9, and 11 to "1" with the bit manipulation instructions.

Additional Exercise 7 Conditional branch
Compare data between 2-byte constant data DATA1 and DATA2 then write the larger data into 2-
byte variable R_RST1. (Where the two values are found equal to each other, set a value of -1 to
R_RST1.)
In addition, compare data between 1-byte constant data DATA3 and DATA4 then write the smaller
data into 1-byte variable R_RST2. (Where the two values are found equal to each other, set a
value of -1 to R_RST2.)
Additional Exercise 8 Repeat

Sum numbers 1 to 10 and write the result into 4-byte variable SUM1.
In addition, calculate the sum total of (1) + (2+2) + (3+3+3) + (4+4+4+4) through to
(10+10+10+10+10+10+10+10+10+10), and write the result into 4-byte variable SUM2.
Additional Exercise 9 Post-increment register indirect control

Read sequentially the 2-byte constant data DATA in which 10 pieces of data are stored and then
write only the values of 50 or larger into 4-byte variable RESULT (with the number of arrays of 10).
Use the post-increment register indirect control.
Additional Exercise 10 Pre-decrement register indirect control

Read sequentially the 1-byte constant data DATA in which 10 pieces of data are stored and then
write into 1-byte variable RESULT (with the number of arrays of 10) the data in sequence from the
beginning when found less than 50 or from the end when found 50 or larger.
For the respective pieces of data, use the post-increment register indirect control and pre-
decrement register indirect control.
Additional Exercise 11 Indexed register indirect control

Using the indexed register indirect control, conduct the tasks listed below.
Write 1-byte constant data ROM_B in which 10 pieces of data are stored to 1-byte variable RAM_B
(with the number of arrays 10).
Write 2-byte constant data ROM_W in which 10 pieces of data are stored to 2-byte variable
RAM_W (with the number of arrays 10).
Write 4-byte constant data ROM_B in which 10 pieces of data are stored to 4-byte variable RAM_L
(with the number of arrays 10).
Additional Exercise 12 Stack operation

From 2-byte constant data DATA in which 10 pieces of data are stored, write numeric data of less
than 1000 into 2-byte variable M_TBL (with the number of arrays 10) in reverse order, using the
stack.
Additional Exercise 13 Subroutine
From 2-byte constant data DATA in which 10 pieces of data are stored, write the data less than
1000 into 2-byte variable M_TBL (with the number of arrays 10).
Create the subroutine to compare the two values and the subroutine to transfer constant data to
variables. Through the subroutine for comparison, call the subroutine for transfer.

Basics of Embedded Systems (RX63N) - Exercises

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Basics of Embedded Systems

1 ©emBex Education Inc.

 The format of source is as shown below.

2 ©emBex Education Inc.

Write a program to the field designated in the list.

RAM variable area

; ↓↓↓Start of input by trainee↓↓↓

3 ©emBex Education Inc.

; Data for transfer

; ↓↓↓Start of input by trainee↓↓↓

4 ©emBex Education Inc.

; RAM variable area

Write the constant value 12H into the

END ; ↓↓↓Start of input by trainee↓↓↓

OWARI: BRA OWARI ; Termination loop

5 ©emBex Education Inc.

; RAM variable area

Specify the address of DATA to R10.

; ↓↓↓Start of input by trainee↓↓↓

OWARI: BRA OWARI ; Termination loop

6 ©emBex Education Inc.

MOV.L #D_DATA,R13 ; Specify the address.

DATA: .BYTE 87H :

MOV.L #DATA,R10 ; Specify the address. R11: FFFFFF87H

7 ©emBex Education Inc.

; RAM variable area

; ↓↓↓Start of input by trainee↓↓↓

OWARI: BRA OWARI ; Termination loop

8 ©emBex Education Inc.

; RAM variable area

Read the data in DATA1 into R11. ; ROM constants area

; ↓↓↓Start of input by trainee↓↓↓

9 ©emBex Education Inc.

; RAM variable area

Place the result of logical product of R13 ; Program

10 ©emBex Education Inc.

; RAM variable area

; ROM constants area

END MOV.L #DATA,R10 ; Specify the address for DATA.

11 ©emBex Education Inc.

START ; RAM variable area

; ↓↓↓Start of input by trainee↓↓↓

OWARI: BRA OWARI ; Termination loop

Anticipated result Result

12 ©emBex Education Inc.

; ↓↓↓Start of input by trainee↓↓↓

OWARI: BRA OWARI ; Termination loop

 Following build and download, check the

Anticipated result Result

13 ©emBex Education Inc.

; RAM variable area

; ROM constants area

; ↓↓↓Start of input by trainee↓↓↓

OWARI: BRA OWARI ; Termination loop

14 ©emBex Education Inc.

Value after reset

Value after reset

Bit Symbol Bit name Function R/W

15 ©emBex Education Inc.

; ↓↓↓Start of input by trainee↓↓↓

OWARI: BRA OWARI ; Termination loop

16 ©emBex Education Inc.

Specify the address for variable data in RAM. ; Program