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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers

July 2005

HCPL0600, HCPL0601, HCPL0611,


HCPL0630, HCPL0631, HCPL0661
High Speed-10 MBit/s Logic Gate Optocouplers
Single Channel: HCPL0600, HCPL0601, HCPL0611
Dual Channel: HCPL0630, HCPL0631, HCPL0661
Features ■ Switching power supplies
■ Pulse transformer replacement
■ Compact SO8 package
■ Computer-peripheral interface
■ Very high speed-10 MBit/s
■ Superior CMR Description
■ Fan-out of 8 over -40°C to +85°C
The HCPL06XX optocouplers consist of an AlGaAS LED, opti-
■ Logic gate output
cally coupled to a very high speed integrated photo-detector
■ Strobable output (single channel devices) logic gate with a strobable output (single channel devices). The
■ Wired OR-open collector devices are housed in a compact small-outline package. This
■ U.L. recognized (File # E90700) output features an open collector, thereby permitting wired OR
■ VDE approval pending outputs. The HCPL0600 and HCPL0601 output consists of
bipolar transistors on a bipolar process while the HCPL0611,
HCPL0630 and HCPL0631 output consists of bipolar transistors
Applications on a CMOS process for reduced power consumption. The cou-
■ Ground loop elimination pled parameters are guaranteed over the temperature range of -
■ LSTTL to TTL, LSTTL or 5-volt CMOS 40°C to +85°C. A maximum input signal of 5 mA will provide a
■ Line receiver, data transmission minimum output sink current of 13 mA (fan out of 8). An internal
noise shield provides superior common mode rejection.
■ Data multiplexing

Package Dimensions

0.164 (4.16)
0.144 (3.66)
SEATING PLANE

Pin 1
0.202 (5.13)
0.182 (4.63)

0.019 (0.48)

0.143 (3.63) 0.010 (0.25)


0.123 (3.13) 0.006 (0.16)

0.244 (6.19)
0.008 (0.20)
0.224 (5.69)
0.021 (0.53) 0.003 (0.08)
0.011 (0.28) 0.050 (1.27)
TYP

Lead Coplanarity : 0.004 (0.10) MAX

NOTE
All dimensions are in inches (millimeters)

©2005 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com


HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
N/C 1 8 VCC N/C 1 8 VCC + 1 8 VCC

V
F1

+ 2 7 VE _ 2 7 V01
+ 2 7 VE

VF VF

_ _ _
3 6 VO 3 6 VO 3 6 V02

V
F2

N/C 4 5 GND 5 GND


N/C 4 5 GND + 4

Single-channel circuit Single-channel circuit Dual-channel circuit


drawing (HCPL0600 and drawing (HCPL0611) drawing (HCPL0630, HCPL0631
HCPL0601) and HCPL0661)

TRUTH TABLE (Positive Logic)


Input Enable Output
H H L
L H H
H L H
L L H
H* NC* L*
L* NC* H*

*Dual channel devices or single channel devices with pin 7 not connected.
A 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (No derating required up to 85°C)
Parameter Symbol Value Units
Storage Temperature TSTG -40 to +125 °C
Operating Temperature TOPR -40 to +85 °C
EMITTER Single Channel IF 50 mA
DC/Average Forward Input Current (each channel) Dual Channel
Enable Input Voltage Single Channel VE 5.5 V
Not to exceed VCC by more than 500 mV
Reverse Input Voltage (each channel) VR 5.0 V
Power Dissipation Single Channel PI 45 mW
Dual Channel
DETECTOR
Supply Voltage VCC 7.0 V
(1 minute max)
Output Current (each channel) IO 50 mA
Output Voltage (each channel) VO 7.0 V
Collector Output Power Dissipation Single Channel PO 85 mW
Dual Channel

Recommended Operating Conditions


Parameter Symbol Min Max Units
Input Current, Low Level IFL 0 250 µA
Input Current, High Level IFH *6.3 15 mA
Supply Voltage, Output VCC 4.5 5.5 V
Enable Voltage, Low Level VEL 0 0.8 V
Enable Voltage, High Level VEH 2.0 VCC V
Operating Temperature TA -40 +85 °C
Fan Out (TTL load) N 8 TTL Loads
Output Pull-up RL 330 4K Ω

*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics (TA = -40°C to +85°C Unless otherwise specified.)
Individual Component Characteristics
Parameter Test Conditions Symbol Min Typ** Max Unit
EMITTER (IF = 10 mA) VF 1.8 V
Input Forward Voltage TA =25°C 1.75
Input Reverse Breakdown Voltage (IR = 10 µA) BVR 5.0 V
Input Capacitance (VF = 0, f = 1 MHz) CIN pF
Input Diode Temperature Coefficient (IF = 10 mA) ∆VF/∆TA mV/°C
DETECTOR (VE = 0.5 V) Single Channel ICCH 10 mA
High Level Supply Current (IF = 0 mA, VCC = 5.5 V) Dual Channel 15
Low Level Supply Current (VE = 0.5 V) Single Channel ICCL 13 mA
(IF = 10 mA, VCC = 5.5V) Dual Channel 21
Low Level Enable Current (VCC = 5.5 V, VE = 0.5 V) Single Channel IEL -1.6 mA
High Level Enable Current (VCC = 5.5 V, VE = 2.0 V) Single Channel IEH -1.6 mA
High Level Enable Voltage (VCC = 5.5 V, IF = 10 mA) Single Channel VEH 2.0 V
Low Level Enable Voltage (VCC = 5.5 V, IF = 10 mA)(Note 2) Single Channel VEL 0.8 V

Switching Characteristics (TA = -40°C to +85°C, VCC = 5 V, IF = 7.5 mA Unless otherwise specified.)
AC Characteristics Test Conditions Device Symbol Min Typ Max Unit
Propagation Delay Time (Note 3) (TA =25°C) All TPLH 20 75 ns
to Output High Level (RL = 350Ω, CL = 15 pF) (Fig. 12) 100
Propagation Delay Time (Note 4) (TA =25°C) All TPHL 25 75 ns
to Output Low Level (RL = 350Ω, CL = 15 pF) (Fig. 12) 100
Pulse Width Distortion (RL = 350Ω, CL = 15 pF) (Fig. 12) All |TPHL-TPLH| 35 ns
Output Rise Time (10-90%) (RL = 350Ω, CL = 15 pF)(Note 5) (Fig. 12) All tr 50 ns
Output Fall Time (90-10%) (RL = 350Ω, CL = 15 pF)(Note 6) (Fig. 12) All tf 12 ns
Enable Propagation Delay (IF = 7.5 mA, VEH = 3.5 V) HCPL0600 tELH 20 ns
Time to Output High Level (RL = 350Ω, CL = 15 pF) (Note 7) (Fig. 13) HCPL0601
HCPL0611
Enable Propagation Delay (IF = 7.5 mA, VEH = 3.5 V) HCPL0600 tEHL 20 ns
Time to Output Low Level (RL = 350Ω, CL = 15 pF) (Note 8) (Fig. 13) HCPL0601
HCPL0611
Common Mode (RL = 350Ω) (TA =25°C) |VCM| = 10 V HCPL0600 |CMH| V/µs
Transient Immunity (IF = 0 mA, VOH (Min.) = HCPL0630
(at Output High Level) 2.0 V) (Note 9)(Fig. 14) |VCM| = 50 V HCPL0601 5000
HCPL0631
|VCM| = 1,000 V HCPL0611 25,000
HCPL0661
Common Mode (RL = 350Ω) (TA =25°C) |VCM| = 10 V HCPL0600 |CMH| V/µs
Transient Immunity (IF = 7.5 mA, VOL (Max.) = HCPL0630
(at Output Low Level) 0.8 V) (Note 10)(Fig. 14) |VCM| = 50 V HCPL0601 5000
HCPL0631
|VCM| = 1,000 V HCPL0611 25,000
HCPL0661

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40°C to +85°C Unless otherwise specified.)
DC Characteristics Test Conditions Symbol Min Typ** Max Unit
High Level Output Current (VCC = 5.5 V, VO = 5.5 V) IOH 100 µA
(IF = 250 µA, VE = 2.0 V) (Note 2)
Low Level Output Voltage (VCC = 5.5 V, IF = 5 mA) VOL 0.6 V
(VE = 2.0 V, IOL = 13 mA) (Note 2)
Input Threshold Current (VCC = 5.5 V, VO = 0.6 V, IFT 5 mA
VE = 2.0 V, IOL = 13 mA)

Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified.)


Characteristics Test Conditions Symbol Min Typ** Max Unit
Input-Output (Relative humidity = 45%) II-O 1.0* µA
Insulation Leakage Current (TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 11)
Withstand Insulation Test Voltage (RH < 50%, TA = 25°C) VISO 2500 VRMS
(Note 11) ( t = 1 min.)
Resistance (Input to Output) (VI-O = 500 V) (Note 11) RI-O 1012 Ω
Capacitance (Input to Output) (f = 1 MHz) (Note 11) CI-O 0.6 pF

** All typical values are at VCC = 5 V, TA = 25°C


NOTES
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and
GND pins of each device.
2. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
3. tPLH - Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V
level on the LOW to HIGH transition of the output voltage pulse.
4. tPHL - Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V
level on the HIGH to LOW transition of the output voltage pulse.
5. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
6. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
7. tELH - Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to
the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
8. tEHL - Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to
the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
9. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V OUT
> 2.0 V). Measured in volts per microsecond (V/µs).
10. CML - The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e.,
VOUT < 0.8 V). Measured in volts per microsecond (V/µs).
11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600 and HCPL0601 only)
Fig. 1 Forward Current vs. Input Forward Voltage Fig. 2 Output Voltage vs. Forward Current
100 6
TA = 25°C
VCC = 5V
5
IF - FORWARD CURRENT (mA)

10

Vo - OUTPUT VOLTAGE (V)


TA = 85°C
4
TA = 70°C TA = -40°C
1
RL = 350Ω
TA = 25°C
3
TA = 0°C
0.1 RL = 1kΩ
2

0.01
1

0.001 0
0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 0 1 2 3 4 5

VF - FORWARD VOLTAGE (V) IF - FORWARD INPUT CURRENT (mA)

Fig. 3 Input Threshold Current vs. Temperature Fig. 4 High Level Output Current vs. Temperature
5 16
IOH - HIGH LEVEL OUTPUT CURRENT (µA)
ITH - INPUT THRESHOLD CURRENT (mA)

VCC = 5V
VO = 0.6V 14

4
12

10
3

RL = 350Ω 8

2 6
RL = 1KΩ
4
1
2 VO = VCC = 5.5V
VE = 2V
IF = 250 µA
0
0
-40 -20 0 20 40 60 80 100
-40 -20 0 20 40 60 80 100
TA - TEMPERATURE (˚C) TA - TEMPERATURE (˚C)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600 and HCPL0601 only)

Fig. 5 Low Level Output Voltage vs. Temperature Fig. 6 Low Level Output Current vs. Temperature
0.8 60
V = 5.5V V = 5V
CC

IOL - LOW LEVEL OUTPUT CURRENT (mA)


CC
VOL - LOW LEVEL OUTPUT VOLTAGE (V)

VE = 2V VE = 2V
0.7 55
IF = 5mA VOL = 0.6V

0.6 50

IF = 10-15mA
0.5 45
IO = 12.8mA
0.4 IO = 16mA 40
IF = 5mA

0.3 35

IO = 6.4mA
0.2 30
IO = 9.6mA

0.1 25

0.0 20
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100

TA - TEMPERATURE (˚C) TA - TEMPERATURE (˚C)

Fig. 7 Propagation Delay vs. Temperature Fig. 8 Propagation Delay vs. Pulse Input Current
100 90
V = 5V V = 5V
CC CC
IF = 7.5mA TA = 25°C
90
80
TP - PROPAGATION DELAY (ns)
TP - PROPAGATION DELAY (ns)

80 tPLH
70
RL = 1kΩ
70 tPLH
RL = 1kΩ 60
tPLH
60
tPLH RL = 350Ω
50
RL = 350Ω
50

tPHL 40
40 tPHL
RL = 350Ω & 1kΩ
RL = 350Ω & 1kΩ

30 30

20 20
-40 -20 0 20 40 60 80 100 5 7 9 11 13 15

TA - TEMPERATURE (˚C) IF - PULSE INPUT CURRENT (mA)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600 and HCPL0601 only)

Fig. 9 Typical Enable Propagation Delay vs. Temparature Fig. 10 Typical Rise and Fall Time vs. Temperature
90 240
V = 5V V = 5V
CC CC
tE - ENABLE PROPAGATION DELAY (ns)

80 VEH = 3V IF = 7.5mA
VEL = 0V 200
70 IF = 7.5mA
tELH tr
RL = 1kΩ RL = 1kΩ

tf - FALL TIME (ns)


60 160

50
tELH 120
RL = 350Ω
40

30 80
tr
tEHL RL = 350Ω
20 RL = 350Ω & 1kΩ
40
tf
10
RL = 350Ω & 1kΩ

0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100

TA - TEMPERATURE (˚C) TA - TEMPERATURE (˚C)

Fig. 11 Typical Pulse Width Distortion vs. Temperature

40
V = 5V
CC
PWD - PULSE WIDTH DISTORTION (ns)

IF = 7.5mA
35

30

25
RL = 1kΩ
20

15

10
RL = 350Ω
5

0
-40 -20 0 20 40 60 80 100

TA - TEMPERATURE (˚C)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0611, HCPL0630, HCPL0631 and HCPL0661 only)
Fig. 13 Input Threshold Current vs.
Fig. 12 Input Forward Current vs. Forward Voltage Ambient Temperature (HCPL0611 only)
100 2.5
VCC = 5.5V
VO = 0.6V

ITH - INPUT THRESHOLD CURRENT (mA)


VE = 2V
IF - FORWARD CURRENT (mA)

10 2.0

TA = 100°C
RL = 350Ω
1 1.5
RL = 1kΩ
TA = 85°C TA = -40°C

0.1 1.0
TA = 0°C
RL = 4kΩ
TA = 25°C
0.01 0.5

0.001 0.0
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 -40 -20 0 20 40 60 80 100
VF - FORWARD VOLTAGE (V) TA - AMBIENT TEMPERATURE (°C)

Fig. 14 Input Threshold Current vs. Ambient Temperature Fig. 15 High Level Output Current vs.
(HCPL0630, HCPL0631 and HCPL0661 only) Ambient Temperature
2.5 20
VCC = 5.5V VO = VCC = 5.5V
IOH - HIGH LEVEL OUTPUT CURRENT (nA)

VE = 2V (Single Channel Only)


ITH - INPUT THRESHOLD CURRENT (mA)

VO = 0.6V
IF = 250 µA
2.0 16

RL = 350Ω
1.5 12

1.0 8
RL = 1kΩ

RL = 4kΩ
0.5 4

0.0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
TA - AMBIENT TEMPERATURE (°C) TA - AMBIENT TEMPERATURE (°C)

Fig. 16 Low Level Output Current vs. Fig. 17 Low Level Output Voltage vs.
Ambient Temperature Ambient Temperature
40 0.6
V = 5.5V V = 5.5V
IOL - LOW LEVEL OUTPUT CURRENT (mA)

VOL - LOW LEVEL OUTPUT VOLTAGE (V)

CC CC
VE = 2V (Single Channel Only) VE = 2V (Single Channel Only)
35 VOL = 0.6V
0.5
IF = 5mA
IF = 5 - 15mA

30 0.4
IO = 12.8mA IO = 16mA

25 0.3

20 0.2
IO = 6.4mA IO = 9.6mA

15 0.1

10 0.0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100

TA - AMBIENT TEMPERATURE (°C) TA - AMBIENT TEMPERATURE (°C)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0611, HCPL0630, HCPL0631 and HCPL0661 only)

Fig. 18 Pulse Width Distortion vs. Fig. 19 Propagation Delay vs.


Ambient Temperature Ambient Temperature
70 120
V = 5V V = 5V
CC CC
PWD - PULSE WIDTH DISTORTION (ns)

IF = 7.5mA IF = 7.5mA
60
100

TP - PROPAGATION DELAY (ns)


50 RL = 4kΩ
80
tPLH
tPLH
40 RL = 4kΩ
RL = 1kΩ
60
30

40 tPLH
20
RL = 1kΩ tPHL RL = 350Ω
RL = 350Ω, 1kΩ, 4kΩ
RL = 350Ω 20
10

0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
TA - AMBIENT TEMPERATURE (°C) TA - AMBIENT TEMPERATURE (°C)

Fig. 20 Rise and Fall Times vs.


Ambient Temperature
350 7
V = 5V
CC
IF = 7.5mA
300 6
tr - RL = 4kΩ
250 5

tf - FALL TIME (ns)


tr - RISE TIME (ns)

200 4

150 3
tf - RL = 350Ω, 1kΩ, 4kΩ

100 2
tr - RL = 1kΩ

50 1
tr - RL = 350Ω

0 0
-40 -20 0 20 40 60 80 100

TA - AMBIENT TEMPERATURE (°C)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Pulse Gen. Pulse Gen. I F = 7.5 mA
+5V
tf = tr = 5 ns ZO = 50 Ω
ZO = 50 Ω tf = tr = 5 ns
Dual Channel +5 V Input I F = 3.75 mA
IF (I F)
1 VCC 8 1 VCC 8
t PHL tPLH
Input RL Output VO
.1µf Output
2 7 RL Monitoring 2 7 Monitoring
Bypass (VO )
Node Node 1.5 V
Input 0.1µF
Output
Monitor 3 6 3 6 Bypass
(VO)
(IF) CL RM CL* 90%
4 GND 5
Output
47Ω 4 5
GND (VO )
10%

tf tr

Test Circuit for HCPL0600, Test Circuit for HCPL0630,


HCPL0601 and HCPL0611 HCPL0631 and HCPL0661

Fig. 21 Test Circuit and Waveforms for tPLH, tPHL, tr and tf.

Pulse
Generator Input
tr = 5ns Monitor
Z O = 50Ω (V E)

+5V

3.0 V
VCC Input
(VE ) 1.5 V
1 8
t EHL t ELH
7.5 mA
Output
2 7 .1µf
RL
(VO )
bypass 1.5 V
Output
3 6 (VO )
CL

4 5
GND

Fig. 22 Test Circuit tEHL and tELH.

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
VCC
1 8 +5V

IF
A 2 7 0.1µf 350Ω
bypass
B
Output
VFF 3 6 (VO)

4 5
GND

VCM

Pulse Gen

Test Circuit for HCPL0600, and HCPL0601

Peak

VCM
0V

5V CM H
Switching Pos. (A), IF = 0
VO
VO (Min)

VO (Max)

Switching Pos. (B), IF = 7.5 mA


VO
0.5 V CM L

Fig. 23 Test Circuit Common Mode Transient Immunity


(HCPL0600 and HCPL0601)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
IF

VCC Dual Channel


1 8 +3.3V B
1 VCC 8 +3.3V
A
IF RL Output VO
A 2 7 0.1µf 350Ω
bypass
2 7 Monitoring
B VFF Node
0.1µF
Output
VFF 3 6 3 6 Bypass
(VO)

GND
4 5
4 5
GND
VCM
VCM + –
Pulse
Pulse Gen Generator
ZO = 50 Ω
Test Circuit for HCPL0611
Test Circuit for HCPL0630, HCPL0631 and HCPL0661

VCM
0V

Peak

3.3V CM H
Switching Pos. (A), IF = 0
VO
VO (Min)

VO (Max)

Switching Pos. (B), IF = 7.5 mA


VO
0.5 V CM L

Fig. 24 Test Circuit Common Mode Transient Immunity


(HCPL0611, HCPL0630, HCPL0631 and HCPL0661)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
8-Pin Small Outline

0.024 (0.61)

0.060 (1.52)

0.275 (6.99)
0.155 (3.94)

0.050 (1.27)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Ordering Information
Option Order Entry Identifier Description
No Suffix HCPL0600 Shipped in tubes (50 units per tube)
V HCPL0600V VDE0884 (pending approval)
R1 HCPL0600R1 Tape and Reel (500 units per reel)
R1V HCPL0600R1V VDE0884 (pending approval), Tape and Reel (500 units per reel)
R2 HCPL0600R2 Tape and Reel (2500 units per reel)
R2V HCPL0600R2V VDE0884 (pending approval), Tape and Reel (2500 units per reel)

Marking Information
1

0600 2

6
V X YY S

3 4 5

Definitions
1 Fairchild logo
2 Device number
3 VDE mark (Note: Only appears on parts ordered with VDE option –
See order entry table)
4 One digit year code, e.g., ‘3’
5 Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specifications

8.0 ± 0.10
3.50 ± 0.20
2.0 ± 0.05 Ø1.5 MIN
0.30 MAX 4.0 ± 0.10 1.75 ± 0.10

5.5 ± 0.05

8.3 ± 0.10 12.0 ± 0.3


5.20 ± 0.20

0.1 MAX 6.40 ± 0.20 Ø1.5 ± 0.1/-0

User Direction of Feed

Reflow Profile

300
260°C
280
260
>245°C = 42 Sec
240
220
200
180
Time above
160 183°C = 90 Sec
°C
140
120
100 1.822°C/Sec Ramp up rate
80
60
40
20 33 Sec

0
0 60 120 180 270 360
Time (s)

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 High Speed-10 MBit/s Logic Gate Optocouplers
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™ FAST ISOPLANAR™ PowerSaver™ SuperSOT™-8
ActiveArray™ FASTr™ LittleFET™ PowerTrench SyncFET™
Bottomless™ FPS™ MICROCOUPLER™ QFET TinyLogic
Build it Now™ FRFET™ MicroFET™ QS™ TINYOPTO™
CoolFET™ GlobalOptoisolator™ MicroPak™ QT Optoelectronics™ TruTranslation™
CROSSVOLT™ GTO™ MICROWIRE™ Quiet Series™ UHC™
DOME™ HiSeC™ MSX™ RapidConfigure™ UltraFET
EcoSPARK™ I2C™ MSXPro™ RapidConnect™ UniFET™
2
E CMOS™ i-Lo™ OCX™ µSerDes™ VCX™
EnSigna™ ImpliedDisconnect™ OCXPro™ SILENT SWITCHER Wire™
FACT™ IntelliMAX™ OPTOLOGIC SMART START™
FACT Quiet Series™ OPTOPLANAR™ SPM™
PACMAN™ Stealth™
Across the board. Around the world.™
POP™ SuperFET™
The Power Franchise
Power247™ SuperSOT™-3
Programmable Active Droop™
PowerEdge™ SuperSOT™-6
DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and


supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product


that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. I16

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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1

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