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Compal Confidential
2 Schematic Document 2

Intel Braswell M
UMA

2015-6-09 Rev: 1.0


3 3

ZZZ PCB@

PCB 1EE LA-C571P REV1 M/B 2


DA6001DX010

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Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P01-Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 1 of 44
A B C D E
5 4 3 2 1

204pin DDR3L-SO-DIMM X1
port 1 port 0 P.19
Memory BUS
XDP-60Pin Single Channel
D
eDP Conn. HDMI Conn. Debug D
1.35V DDR3L 1066/1333/1600
P.20 P.21 Conn. P.16

DDI x2
PCIE x1

port 1 SOC USB2.0 x5 port 0 port 1 port 2 port 3 Port4

NGFF Intel Braswell-M


WLAN/BT4.0
Quad Core (4C/4T) USB 3.0 USB 2.0 HD Camera USB HUB USB2.0
P.28 Conn.
SDMMC Conn Conn FE1.1s(STT) Conn.
P.25 P.25 P.20 P.26 P.25
TDP: 6W
C C
port 1 Debug Port

USB3.0
eMMC FCBGA 1170-Pin
THGBMBG8D4KBAIR
14nm HD Audio
P.22
0.593mm Ball Pitch Card Reader Touch BT 4.0
SATA III x2 RTS5170
page 08~16 Port4 P.24 Port1 P.20 Port2 P.28
port 1 port 0
SM BUS LPC BUS
SATA ODD SATA HDD SPI HDA Codec
Conn. Conn. ALC3234
B P.27 P.27 P.23 B
EC
ENE KB9022 SPI ROM
1.8V (8MB) Speaker Int. MIC
P.32 P.11
P.23 P.23

Touch Pad Int.KBD Combo Jack


P.29 P.29 P.25

RTC CKT.
P.12
A A

DC/DC Interface CKT. LED/Power On/Off Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title
P.30 P.29 P02-Block diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 2 of 44
5 4 3 2 1

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A B C D E

VGG_PWRGD RT8171BGQW 6400mA


+VCC_CORE
(PU600)
VR12_1_VR_ON
RT8171BGQW 11000mA
+VGG_CORE MODEL NAME: Power Rail Block Diagram
(PU800)
PCB NAME: LA-C571PR02 2015/03/27
SYX196DQNC 3500mA
SPOK
(PU500)
5700mA
+1.05VALWP 5700mA
(PJP500)
+1.05VALW (JPC4)
+1.05V_VNN REVISION: 0.2
DATE: 2015/04/13
1 1
ADAPTER
1500mA
+INV_PWR_SRC 8uA
(FX2)
+CHTRTC
(JP12)
TPS51225CRUKR 12mA +3VLP 12mA
B+_3/5V
UE1
(PU100)
CHARGER B+
SYSON 1000mA 1000mA 200mA
+0.675VSP +0.675VS +5VS_TOUCH
(PJP202) (RX28 , 0603 ,Short Pad)
RT8207PGQW
SUSP# (PU200) 4500mA 4500mA 2500mA
+1.35VP +1.35V_DDR_VDDQ 1000mA
(PJP201) (JPC3) (JPC6) +VDISPLAY_VCC
(FX1 , 1206)
BATTERY +1.35V
2000mA
JDIMM1 1500mA +5VS_ODD
+5VS_ODD_R1
(JP7) (RS12 , Short Pad)
1500mA
+5V_3V_HDD
USB_EN# (JP13)
SY6288D20AAC 1500mA
+5V_USB_PWR1
(UI5) +5VS EN_DFAN1 NCT3942S 1000 mA
6620mA 6620mA +FAN_POWER
EC_ON TPS51225CRUKR (UE3)
+5VALWP
(PU100) (PJP100) USB_EN# 1500mA 20 mA
SY6288D20AAC CAPS_LED
+5V_USB_PWR2 KB_CAPS_PWR
(UI4) (RE60)

+5VALW 1000mA
+5V_PVDD
SUSP# EM5209VF 4315mA (RV54 0805 Short Pad )
2 2
5VS_EN (U38) (JP37) 1000mA
+5V_AUDIO
(RV59 0603 Short Pad)

20 mA
+3VALW_EC
(RE6)

(RE2 0603 Short Pad)


+3VS_TPIN

EC_ON TPS51225CRUKR 6560 mA 6560 mA


+3VALWP
(PU100) (PJP101) UC23
USB SW
FSUSB42MUX

+1.8VALW_PWRGD 200mA
EM5209VF
3V_SOC_EN +3V_SOC
U37 (JP39)

VR12.1_VR_ON SY8032ABC 800mA 700mA


+1.15VALWP +1.15VALW
(PU300) (PJP301)
+3VALW 550mA
+1.24VALW_PWRGD SY8032ABC 1680mA 700mA +3V_+1.8V_SDIO
+1.8VALWP (RC190)
(PJP400) (PU400) (PJP401)
500mA
+1.8V_XDP_AB
3 +1.8VALW (RC191) 3

35mA
+1.8V_SPI
(RC87)
SUSP# EM5209VF 550mA (RC192)
+1.8VS +1.8VS_XDP_CD
1.8VS_ON (U37) (JP38)

SUSP# G971ADJF11U 750mA 750mA


+1.5VSP UA1 ,
(PJP404) (PU402) (PJP405) +1.5VS Audio

+1.15VALW_PWRGD SY8032ABC 700mA 700mA


+1.24VALWP +1.24VALW +1.24V_USB_VDDQ
(PJP302) (PU301) (PJP303) (JPC5)

SUSP# EM5209VF 5364mA


ENVDD_R SY6288C20AAC 1500mA
3VS_EN (U38) +LCDVDD
(JP36) (UX4)

150mA
+3VS_CAM
(RX27 0603 Short PAD)

(RM7 1206)
+3VS_WLAN_NGFF
+3VS

(RR9 , 0603 Short Pad)


+3VS_CARD
4 4

(U2407)
thermal sensor

1500mA
+5V_3V_HDD
@(JP14)

200mA
+5VS_TOUCH
Security Classification Compal Secret Data Compal Electronics, Inc.
@(RX29) Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P03-DB block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 3 of 44
A B C D E
A B C D E

Voltage Rails Board ID / SKU ID Table for AD channel


Power Plane Description S0 S3 S4/S5
VIN 19V Adapter power supply ON ON ON
BATT+ 12V Battery power supply ON ON ON
B+ AC or battery power rail for power circuit. (19V/12V) ON ON ON
1 1
+RTCVCC RTC Battery Power ON ON ON
+1.05VALW +1.05v Always power rail ON ON ON
+1.24VALW +1.24v Always power rail ON ON ON
+1.8VALW +1.8v Always power rail ON ON ON
+3VALW +3.3v Always power rail ON ON ON
+3V_SOC +3V_SOC Always power rail ON ON ON
+5VALW +5.0v Always power rail ON ON ON
+1.35V +1.35V power rail for DDR3L ON ON OFF
+VCC_CORE Core voltage for SOC ON OFF OFF
+VGG_CORE GFX voltage for SOC ON OFF OFF
BOM Option Table
+0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF
+1.15VALW +1.15VALW system power rail ON OFF OFF BOARD ID Table Item BOM Structure
2
+1.35VS +1.35v system power rail ON OFF OFF
Unpop @ 2

+1.5VS +1.5v system power rail ON OFF OFF


Board ID PCB Revision Connector CONN@
0 0.1 XDP (Debug Port) XDP@
+1.8VS +1.8v system power rail ON OFF OFF
+3VS +3.3v system power rail ON OFF OFF
1 0.2 EMC requirement EMI@
+5VS +5.0v system power rail ON OFF OFF
2 0.3 EMC requirement unpop NEMI@
3 1.0 LPC18 LPC18@
LPC33 LPC33@
Rvs. RF requirement RF@
ESD requirement ESD@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. XDP (Debug Port) unpop NXDP@
ESD requirement unpop NESD@
For JUMP JP@
3
For PCB PCB@ 3

For CPU SOC@ SOC1@


SATA re-Driver 601@
Test Point TP@
SATA re-Driver unpop N601@

43 level BOM table


43 Level Description BOM Structure
4319Y031L01 MB AC571 AAL14 BSW U PEN HDMI EMI@/ESD@/XDP@/LPC33@/PCB@/ODD@/SOC@/601@/N601@/PARADE@
4319Y031L02 MB AC571 AAL14 BSW U CEL HDMI EMI@/ESD@/XDP@/LPC33@/PCB@/ODD@/SOC1@/601@/N601@/PARADE@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/02/26 2015/02/25 Title
Issued Date Deciphered Date P04-Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 4 of 44
A B C D E

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MODEL NAME: SMbus Block Diagram


PCB NAME: LA-C571 PR02 2015/03/27
RC209 0 , XDP@
SOC_SMB_CLK SMB_XDP_SCL
53
JXDP1 REVISION: 0.2
HW3 follow Intel SCL RC208 SMB_XDP_SDA
51 CONN@ DATE: 2015/04/13
D
0p92 P.43 use 1k Ohm 0 , XDP@
D

SOC_SMB_DATA

RP68 2.2K
+1.8VALW R1184 1K

2.2K +3VALW RP36


1K 2.2K
RP68
+1.8VALW R1183 +3VS +3VS
RP36 2.2K
Q2516 Q2517
AM6 SOC_SMB_CLK SOC_SMB_CLK_L EC_SMB_CK2
Dual Dual EC_SMB_CK2 202 DIMMA SMBUS Address [?]
SOC AM7 SOC_SMB_DATA
N-MOS
SOC_SMB_DATA_L
N-MOS
DMN63D8
EC_SMB_DA2 EC_SMB_DA2 200

BSW DMN63D8

0 ,@
0 ,@
RE32 RE33

RC174 1K,@
C
+1.8VALW R1181 10K C

1K,@ R1182 10K


+3VALW 10K RE17 +3VS_TP
RC175
+1.8VALW +3VS 10K RE19
RC158 Q2514 Q2515
AB2 I2C_5_SCL I2C_5_SCL_R I2C_5_SCL_R_L I2C5_SCL_TP_R I2C5_SCL_TP_R
0 ohm Dual Dual I2C Address [?]
TP
0 ohm N-MOS N-MOS
AC3 I2C_5_SDA I2C_5_SDA_R I2C_5_SDA_R_L I2C5_SDA_TP_R I2C5_SDA_TP_R
RC159

RE15@
Reserve
Reserve
RE16@

R2451 2.2K

+3VS
2.2K
RE22
KBC 79 EC_SMB_CK2_EC
0 ohm
R2449
THERMAL_SMB_CK2 10 U2407
Thermal
Sensor SMBUS Address [?]
B
KB9022QD 80 EC_SMB_DA2_EC
0 ohm
RE23
THERMAL_SMB_DA2 9
B

RP36 2.2K

RP36 +3VALW_EC
2.2K
PR717
77 0 ohm 10
EC_SMB_CK1 PU700 POWER
Charger SMBUS Address [?]
78 0 ohm 9
EC_SMB_DA1 PR719

PR8
100 ohm 6
CLK_SMB PBATT1 BATT SMBUS Address [?]
100 ohm CONN
DAT_SMB 5
PR9

RE10 4.7K

RE9 +3VS_TP
4.7K

87 TP_CLK 8 JTP
A 88 TP_DATA 7 A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P05-SMBus block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 5 of 44
5 4 3 2 1
5 4 3 2 1

D D

S5->S0 S0->S3 S3->S0 S0->S5


ACIN
ACIN 2.785ms

+3VLP
+3VLP 2.948ms

EC_ON
EC_ON 455.9us

+3VALW
+3VALW 499.1us

+5VALW
+5VALW 4.732ms

SPOK
SPOK 229.8us
VNN
VNN 3.259ms
+1.24VALW
+1.24VALW 4.368ms
+1.8VALW
+1.8VALW 8.809ms
+3V_SOC
+3V_SOC

C C

ON/OFF
ON/OFF
98ms
EC_RSMRST#
EC_RSMRST# 60ms 211.8ms
80.81ms PBTN_OUT#
PBTN_OUT#
102.5ms
EC_SLP_S4# EC_SLP_S4#
102.5ms
EC_SLP_S3# EC_SLP_S3#
140ms 211ms
SYSON SYSON
140.5ms 212.1ms
+1.35V +1.35V
146.2ms 206.8ms
DDR_PWROK 134.4ms DDR_PWROK
280.8ms 43.7ms 48.71ms
VR_ON 716.6us
VR_ON
717us

37.52ms 28.6ms
B
+1.15VALW 2.917ms 2.933ms
+1.15VALW B

198.5us 197.8us
+VCC_CORE 1.388ms 1.403ms +SOC_VCC
+VGG_CORE 3.12ms
194.1us 198.9us
+SOC_VGG
5.737us 3.119ms 4.839us
VGATE VGATE
282.2ms 24.9ms 155.5ms 31.38ms
SUSP# SUSP#
1.702ms 1.699ms

1.574ms 1.615ms
+1.5VS 2.509ms 2.553ms +1.5VS
14.2ms 14.14ms
+1.8VS 3.715ms 3.718ms +1.8VS
19.34ms 18.96ms
+3VS 3.94ms 3.966ms +3VS
19.94ms 19.58ms
+5VS 7.981ms 7.966ms
+5VS
28.1ms 27.9ms
+0.675VS +0.675VS
120.9ms 1.97us 121ms 2.939us
SOC_VCCA_PWROK SOC_VCCA_PWROK
135.1ms 30.85ms 135.8ms 23.68ms
PMC_PLTRST# PMC_PLTRST#

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/11/10 2015/11/25 Title
Issued Date Deciphered Date P06-Power Sequence

WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 6 of 44
5 4 3 2 1
5 4 3 2 1

MODEL NAME: Power Sequence Block Diagram V0.2 Modify


PCB NAME: LA-C571PR02 2015/03/27 1.05VALW_PWRGD
RE62
REVISION: 0.2 15c
DATE: 2015/04/13 (VR12.1_VR_ON)
RE64

V0.2 Modify
+1.15VALW_PWRGD
SYX198DQNC A7 @ +1.15VALWP_ON
D
(PU500) A8 @ A9 A10 D
+1.24VALWP_ON SY8032ABC SY8032ABC +1.8VALW_PG EM5209VF
+1.05VALW 2 PR300 1 SY8032ABC (U37)
(PU300) 5 PR308 1 (PU301) (PU400)
(+1.05V_VNN) +1.15VALW +1.24VALW +1.8VALW 3V_SOC_EN +3V_SOC
1.05VALW_PWRGD +1.24VALW_PWRGD
1

RE63
1.15VALWP_EC

PR500
V0.3 Modify
AV28
DDR_PWROK
SOC_DRAM_PWROK

A6 B7 15a
SPOK 25
18 SOC
SPOK USOC1
A5 B6 17a
A1 1
AC VIN Level SOC_VCCA_PWROK
A2 +3VALW UC7 AV26
MODE PU700 B+ PU100 +5VALW 17
ISL88731 TPS51225 PCH_PWROK
32 G16
CHRTZ-T CRUKR
BATT+ +3VLP,VL 12 EC_RSMRST#
A3 B3 100 F18

DC 13
MODE PBTN_OUT# PMU_RSTBTN#
C
B1 122 R27 M16 C
BATT+ PQ706 B2 VCOUT0_PH UE1
104
PMOS EC9022QD 15b R35, @

SIO_SLP_S3# PMU_SLP_S3#
Level B14
A4 B5 6 QC7
112
EC_ON 14 V0.2 Modify
SIO_SLP_S4# PMU_SLP_S4#
A11 B4 123 R34 C12

ON/OFFBTN# 114 EC_KBRST#


2 V40 F14

13
PLT_RST# 121 97 116 95 AD42 PMU_PLTRST#
18 15 AD41
15c SYSON RT8207PGQW
8 AD40 UC5
(PU200)
SUSP#
7

VR_ON_EC
10

VGATE
18

SVID Bus
16
15a PLT_RST#
DDR_PWROK
SOC_DRAM_PWROK

SUSP# EM5209VF
B
(U38) B

15g +5VS, +3VS

15d
SUSP# EM5209VF
(U37)
+1.8VS

SUSP# G971ADJF11U
(PU402)
+1.5VS 13,14,15

SVID Bus
RE12

15d
15c +VGG_CORE
VR_ON (VR12.1_VR_ON) RT8171BGQW
R464 26 (PU800)
17
SVID Bus
13,14,15 15f
15e VGG_PWRGD +VCC_CORE
26 RT8171BGQW
(PU600)
A 17 A

15g
VGATE

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P07-Power Sequence Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 7 of 44

5 4 3 2 1
5 4 3 2 1

Main Func = CPU


@
UC1A CHV_MCP_EDS

<19> DDR_M0_MA[0..15] DDR0


DDR_M0_MA15 BD49
BD47 DDR3_M0_MA_15 BG33 DDR_M0_D[32..63] <19>
DDR_M0_MA14 DDR_M0_D60
DDR_M0_MA13 BF44 DDR3_M0_MA_14 DDR3_M0_DQ_63 BH28 DDR_M0_D58
DDR_M0_MA12 BF48 DDR3_M0_MA_13 DDR3_M0_DQ_62 BJ29 DDR_M0_D62
DDR_M0_MA11 BB49 DDR3_M0_MA_12 DDR3_M0_DQ_61 BG28 DDR_M0_D59
DDR_M0_MA10 BJ45 DDR3_M0_MA_11 DDR3_M0_DQ_60 BG32 DDR_M0_D57
DDR_M0_MA9 BE52 DDR3_M0_MA_10 DDR3_M0_DQ_59 BH34 DDR_M0_D61
DDR_M0_MA8 BD44 DDR3_M0_MA_9 DDR3_M0_DQ_58 BG29 DDR_M0_D63
DDR_M0_MA7 BE46 DDR3_M0_MA_8 DDR3_M0_DQ_57 BJ33 DDR_M0_D56
DDR_M0_MA6 BB46 DDR3_M0_MA_7 DDR3_M0_DQ_56
DDR_M0_MA5 BH48 DDR3_M0_MA_6 BD28 DDR_M0_D55
D DDR3_M0_MA_5 DDR3_M0_DQ_55 D
DDR_M0_MA4 BD42 BF30 DDR_M0_D54
DDR_M0_MA3 BH47 DDR3_M0_MA_4 DDR3_M0_DQ_54 BA34 DDR_M0_D53
DDR_M0_MA2 BJ48 DDR3_M0_MA_3 DDR3_M0_DQ_53 BD34 DDR_M0_D52
DDR_M0_MA1 BC42 DDR3_M0_MA_2 DDR3_M0_DQ_52 BD30 DDR_M0_D51
DDR_M0_MA0 BB47 DDR3_M0_MA_1 DDR3_M0_DQ_51 BA32 DDR_M0_D50
DDR3_M0_MA_0 DDR3_M0_DQ_50 BC34 DDR_M0_D49
DDR_M0_BS2 BF52 DDR3_M0_DQ_49 BF34 DDR_M0_D48
<19> DDR_M0_BS2 DDR3_M0_BS_2 DDR3_M0_DQ_48
DDR_M0_BS1 AY40
<19> DDR_M0_BS1 BH46 DDR3_M0_BS_1 AV32
DDR_M0_BS0 DDR_M0_D47
<19> DDR_M0_BS0 DDR3_M0_BS_0 DDR3_M0_DQ_47 AV34 DDR_M0_D46
UC1 UC1 DDR_M0_CAS# BG45 DDR3_M0_DQ_46 BD36 DDR_M0_D45
<19> DDR_M0_CAS# BA40 DDR3_M0_CASB DDR3_M0_DQ_45 BF36
SOC@ SOC1@ DDR_M0_RAS# DDR_M0_D44
<19> DDR_M0_RAS# DDR3_M0_RASB DDR3_M0_DQ_44
DDR_M0_WE# BH44 AU32 DDR_M0_D43
<19> DDR_M0_WE# DDR3_M0_WEB DDR3_M0_DQ_43
DDR_M0_CS#1 AU38 AU34 DDR_M0_D42
<19> DDR_M0_CS#1 DDR3_M0_CSB_1 DDR3_M0_DQ_42
S IC A31 FH8066501715906 QJ4S C0 1.6G S IC A31 FH8066501715914 QJ4V C0 1.6G DDR_M0_CS#0 AY38 BA36 DDR_M0_D41
<19> DDR_M0_CS#0 DDR3_M0_CSB_0 DDR3_M0_DQ_41
Part Number = SA00008U62L Part Number = SA00008U52L BC36 DDR_M0_D40
DDR_M0_CLK1 BD38 DDR3_M0_DQ_40
<19> DDR_M0_CLK1 DDR3_M0_CK_1
DDR_M0_CLK#1 BF38 BH38 DDR_M0_D39
<19> DDR_M0_CLK#1 DDR3_M0_CKB_1 DDR3_M0_DQ_39
DDR_M0_CKE1 AY42 BH36 DDR_M0_D38
<19> DDR_M0_CKE1 DDR3_M0_CKE_1 DDR3_M0_DQ_38 BJ41 DDR_M0_D37
DDR_M0_CLK0 BD40 DDR3_M0_DQ_37 BH42 DDR_M0_D36
<19> DDR_M0_CLK0 DDR3_M0_CK_0 DDR3_M0_DQ_36
DDR_M0_CLK#0 BF40 BJ37 DDR_M0_D35
<19> DDR_M0_CLK#0 DDR3_M0_CKB_0 DDR3_M0_DQ_35
DDR_M0_CKE0 BB44 BG37 DDR_M0_D34
<19> DDR_M0_CKE0 DDR3_M0_CKE_0 DDR3_M0_DQ_34 BG43 DDR_M0_D33
AT30 DDR3_M0_DQ_33 BG42 DDR_M0_D32
AU30 RSVD1 DDR3_M0_DQ_32
RSVD2 DDR_M0_D[0..31] <19>
BB51 DDR_M0_D31
DDR_M0_ODT0 AV36 DDR3_M0_DQ_31 AW53 DDR_M0_D25
<19> DDR_M0_ODT0 DDR3_M0_ODT_0 DDR3_M0_DQ_30
DDR_M0_ODT1 BA38 BC52 DDR_M0_D30
<19> DDR_M0_ODT1 DDR3_M0_ODT_1 DDR3_M0_DQ_29 AW51 DDR_M0_D24
AT28 DDR3_M0_DQ_28 AV51 DDR_M0_D28
+0.675V_M0_VREFCA DDR3_M0_OCAVREF DDR3_M0_DQ_27
+0.675V_M0_VREFDQ AU28 BC53 DDR_M0_D26
DDR3_M0_ODQVREF DDR3_M0_DQ_26 AV52 DDR_M0_D29
DDR_M0_DRAMRST# BA42 DDR3_M0_DQ_25 BD52 DDR_M0_D27
<19> DDR_M0_DRAMRST# DDR3_M0_DRAMRSTB DDR3_M0_DQ_24
SOC_DRAM_PWROK AV28
C DDR3_DRAM_PWROK AV42 DDR_M0_D18 C
DDR_M0_RCOMP BA28 DDR3_M0_DQ_23 AP41 DDR_M0_D16
DDR3_M0_RCOMPPD DDR3_M0_DQ_22 AV41 DDR_M0_D23
<19> DDR_M0_DM[4..7] DDR3_M0_DQ_21
DDR_M0_DM7 BH30 AT44 DDR_M0_D22
DDR_M0_DM6 BD32 DDR3_M0_DM_7 DDR3_M0_DQ_20 AP40 DDR_M0_D21
DDR_M0_DM5 AY36 DDR3_M0_DM_6 DDR3_M0_DQ_19 AT38 DDR_M0_D19
DDR_M0_DM4 BG41 DDR3_M0_DM_5 DDR3_M0_DQ_18 AP42 DDR_M0_D17
<19> DDR_M0_DM[0..3] DDR3_M0_DM_4 DDR3_M0_DQ_17
DDR_M0_DM3 BA53 AT40 DDR_M0_D20
DDR_M0_DM2 AP44 DDR3_M0_DM_3 DDR3_M0_DQ_16
DDR_M0_DM1 AT48 DDR3_M0_DM_2 AV45 DDR_M0_D15
DDR_M0_DM0 AP52 DDR3_M0_DM_1 DDR3_M0_DQ_15 AY50 DDR_M0_D14
DDR3_M0_DM_0 DDR3_M0_DQ_14 AT50 DDR_M0_D13
DDR_M0_DQS7 BH32 DDR3_M0_DQ_13 AP47 DDR_M0_D12
<19> DDR_M0_DQS[0..7] DDR3_M0_DQS_7 DDR3_M0_DQ_12
DDR_M0_DQS#7 BG31 AV50 DDR_M0_D11
<19> DDR_M0_DQS#[0..7] DDR3_M0_DQSB_7 DDR3_M0_DQ_11
DDR_M0_DQS6 BC30 AY48 DDR_M0_D10
DDR_M0_DQS#6 BC32 DDR3_M0_DQS_6 DDR3_M0_DQ_10 AT47 DDR_M0_D9
DDR_M0_DQS5 AT32 DDR3_M0_DQSB_6 DDR3_M0_DQ_9 AP48 DDR_M0_D8
DDR_M0_DQS#5 AT34 DDR3_M0_DQS_5 DDR3_M0_DQ_8
DDR_M0_DQS4 BH40 DDR3_M0_DQSB_5 AP51 DDR_M0_D7
DDR_M0_DQS#4 BG39 DDR3_M0_DQS_4 DDR3_M0_DQ_7 AR53 DDR_M0_D6
DDR_M0_DQS3 AY52 DDR3_M0_DQSB_4 DDR3_M0_DQ_6 AK52 DDR_M0_D5
DDR_M0_DQS#3 BA51 DDR3_M0_DQS_3 DDR3_M0_DQ_5 AL53 DDR_M0_D4
DDR_M0_DQS2 AT42 DDR3_M0_DQSB_3 DDR3_M0_DQ_4 AR51 DDR_M0_D3
DDR_M0_DQS#2 AT41 DDR3_M0_DQS_2 DDR3_M0_DQ_3 AT52 DDR_M0_D2
DDR_M0_DQS1 AV47 DDR3_M0_DQSB_2 DDR3_M0_DQ_2 AL51 DDR_M0_D1
DDR_M0_DQS#1 AV48 DDR3_M0_DQS_1 DDR3_M0_DQ_1 AK51 DDR_M0_D0
DDR_M0_DQS0 AM52 DDR3_M0_DQSB_1 DDR3_M0_DQ_0
DDR_M0_DQS#0 AM51 DDR3_M0_DQS_0
182_0402_1% 1 2 RC1 DDR_M0_RCOMP DDR3_M0_DQSB_0 1 OF 13
BSW-MCP-EDS_FCBGA1170

Place close to SOC pins


B Power Name and Connection Check OK 8 mils minimum for maximum of 300 mils in breakout area B

+1.35V_DDR_VDDQ +0.675V_M0_VREFCA_R +0.675V_M0_VREFCA

+1.35V
RC2 1 2 4.7K_0402_1% 1 2
SHORT@
SD034470180 RC3 0_0402_5%
2

@ 1
RC5
10K_0402_1% RC6 1 2 4.7K_0402_1% CC1
Pull high 10K on page 36 .1U_0402_16V7K
2
1

SOC_DRAM_PWROK RC180 1 2 0_0402_5%


SHORT@ DDR_PWROK
DDR_PWROK <36>
DDR_PWROK(BTM) From Power controller
+1.35V_DDR_VDDQ +0.675V_M0_VREFDQ_R +0.675V_M0_VREFDQ

RC8 1 2 4.7K_0402_1% 1 2
SHORT@
RC9 0_0402_5%
1
RC10 1 2 4.7K_0402_1% CC3
.1U_0402_16V7K
2

Place close to SOC pins Place close to SOC pins

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P08-BSW(1/8) DDR3L-CH0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 8 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


@
CHV_MCP_EDS
UC1B

BD5 DDR1
BD7 DDR3_M1_MA_15 BG21
BF10 DDR3_M1_MA_14 DDR3_M1_DQ_63 BH26
BF6 DDR3_M1_MA_13 DDR3_M1_DQ_62 BJ25
BB5 DDR3_M1_MA_12 DDR3_M1_DQ_61 BG26
BJ9 DDR3_M1_MA_11 DDR3_M1_DQ_60 BG22
BE2 DDR3_M1_MA_10 DDR3_M1_DQ_59 BH20
BD10 DDR3_M1_MA_9 DDR3_M1_DQ_58 BG25
BE8 DDR3_M1_MA_8 DDR3_M1_DQ_57 BJ21
BB8 DDR3_M1_MA_7 DDR3_M1_DQ_56
BH6 DDR3_M1_MA_6 BD26
D DDR3_M1_MA_5 DDR3_M1_DQ_55 D
BD12 BF24
BH7 DDR3_M1_MA_4 DDR3_M1_DQ_54 BA20
BJ6 DDR3_M1_MA_3 DDR3_M1_DQ_53 BD20
BC12 DDR3_M1_MA_2 DDR3_M1_DQ_52 BD24
BB7 DDR3_M1_MA_1 DDR3_M1_DQ_51 BA22
DDR3_M1_MA_0 DDR3_M1_DQ_50 BC20
BF2 DDR3_M1_DQ_49 BF20
AY14 DDR3_M1_BS_2 DDR3_M1_DQ_48
BH8 DDR3_M1_BS_1 AV22
DDR3_M1_BS_0 DDR3_M1_DQ_47 AV20
BG9 DDR3_M1_DQ_46 BD18
BA14 DDR3_M1_CASB DDR3_M1_DQ_45 BF18
BH10 DDR3_M1_RASB DDR3_M1_DQ_44 AU22
AU16 DDR3_M1_WEB DDR3_M1_DQ_43 AU20
AY16 DDR3_M1_CSB_1 DDR3_M1_DQ_42 BA18
DDR3_M1_CSB_0 DDR3_M1_DQ_41 BC18
BD16 DDR3_M1_DQ_40
BF16 DDR3_M1_CK_1 BH16
AY12 DDR3_M1_CKB_1 DDR3_M1_DQ_39 BH18
DDR3_M1_CKE_1 DDR3_M1_DQ_38 BJ13
BD14 DDR3_M1_DQ_37 BH12
BF14 DDR3_M1_CK_0 DDR3_M1_DQ_36 BJ17
BB10 DDR3_M1_CKB_0 DDR3_M1_DQ_35 BG17
DDR3_M1_CKE_0 DDR3_M1_DQ_34 BG11
AT24 DDR3_M1_DQ_33 BG12
AU24 RSVD1 DDR3_M1_DQ_32
RSVD2 BB3
AV18 DDR3_M1_DQ_31 AW1
BA16 DDR3_M1_ODT_0 DDR3_M1_DQ_30 BC2
DDR3_M1_ODT_1 DDR3_M1_DQ_29 AW3
AT26 DDR3_M1_DQ_28 AV3
AU26 DDR3_M1_OCAVREF DDR3_M1_DQ_27 BC1
DDR3_M1_ODQVREF DDR3_M1_DQ_26 AV2
BA12 DDR3_M1_DQ_25 BD2
SOC_VCCA_PWROK AV26 DDR3_M1_DRAMRSTB DDR3_M1_DQ_24
C <12> SOC_VCCA_PWROK DDR3_VCCA_PWROK C
AV12
182_0402_1% 1 @ 2 RC11 DDR_M1_RCOMP BA26 DDR3_M1_DQ_23 AP13
DDR3_M1_RCOMPPD DDR3_M1_DQ_22 AV13
BH24 DDR3_M1_DQ_21 AT10
BD22 DDR3_M1_DM_7 DDR3_M1_DQ_20 AP14
AY18 DDR3_M1_DM_6 DDR3_M1_DQ_19 AT16
BG13 DDR3_M1_DM_5 DDR3_M1_DQ_18 AP12
Place close to SOC pins BA1 DDR3_M1_DM_4 DDR3_M1_DQ_17 AT14
AP10 DDR3_M1_DM_3 DDR3_M1_DQ_16
AT6 DDR3_M1_DM_2 AV9
AP2 DDR3_M1_DM_1 DDR3_M1_DQ_15 AY4
DDR3_M1_DM_0 DDR3_M1_DQ_14 AT4
BH22 DDR3_M1_DQ_13 AP7
BG23 DDR3_M1_DQS_7 DDR3_M1_DQ_12 AV4
BC24 DDR3_M1_DQSB_7 DDR3_M1_DQ_11 AY6
BC22 DDR3_M1_DQS_6 DDR3_M1_DQ_10 AT7
AT22 DDR3_M1_DQSB_6 DDR3_M1_DQ_9 AP6
AT20 DDR3_M1_DQS_5 DDR3_M1_DQ_8
BH14 DDR3_M1_DQSB_5 AP3
BG15 DDR3_M1_DQS_4 DDR3_M1_DQ_7 AR1
AY2 DDR3_M1_DQSB_4 DDR3_M1_DQ_6 AK2
BA3 DDR3_M1_DQS_3 DDR3_M1_DQ_5 AL1
AT12 DDR3_M1_DQSB_3 DDR3_M1_DQ_4 AR3
AT13 DDR3_M1_DQS_2 DDR3_M1_DQ_3 AT2
AV7 DDR3_M1_DQSB_2 DDR3_M1_DQ_2 AL3
AV6 DDR3_M1_DQS_1 DDR3_M1_DQ_1 AK3
AM2 DDR3_M1_DQSB_1 DDR3_M1_DQ_0
AM3 DDR3_M1_DQS_0
DDR3_M1_DQSB_0
2 OF 13
BSW-MCP-EDS_FCBGA1170
1 2 SOC_VCCA_PWROK
C1159 22P_0402_50V8J
ESD@

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P09-BSW(2/8) DDR3L-CH1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 9 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


@
CHV_MCP_EDS
UC1C

M44
RSVD15 K44
RSVD12
K48
HDMI_TX2+ D50 RSVD14 K47
<21> HDMI_TX2+ C51 DDI0_TXP_0 RSVD13
HDMI_TX2-
<21> HDMI_TX2- DDI0_TXN_0
D
T44 D
MCSI_1_CLKP

MCSI and Camera interface


HDMI_TX1+ H49 T45
<21> HDMI_TX1+ H50 DDI0_TXP_1 MCSI_1_CLKN
HDMI_TX1-
<21> HDMI_TX1- DDI0_TXN_1 Y47
HDMI_TX0+ F53 DDI0 MCSI_1_DP_0 Y48
<21> HDMI_TX0+ DDI0_TXP_2 MCSI_1_DN_0
HDMI_TX0- F52 V45
<21> HDMI_TX0- DDI0_TXN_2 MCSI_1_DP_1
<HDMI> V47
HDMI_CLK+ G53 MCSI_1_DN_1 V50
<21> HDMI_CLK+ DDI0_TXP_3 MCSI_1_DP_2
HDMI_CLK- G52 V48
<21> HDMI_CLK- DDI0_TXN_3 MCSI_1_DN_2 T41
SOC_DP0_AUXP H47 MCSI_1_DP_3 T42
T78 @TP DDI0_AUXP MCSI_1_DN_3
T79 @TP SOC_DP0_AUXN H46
DDI0_AUXN P50
SOC_DP0_HPD# W51 MCSI_2_CLKP P48
<21> SOC_DP0_HPD# HV_DDI0_HPD MCSI_2_CLKN
SOC_DP0_CTRL_CLK Y51 P47
<21> SOC_DP0_CTRL_CLK HV_DDI0_DDC_SCL MCSI_2_DP_0
SOC_DP0_CTRL_DATA Y52 P45
<21> SOC_DP0_CTRL_DATA HV_DDI0_DDC_SDA MCSI_2_DN_0 M48
SOC_DDI0_ENBKL V52 MCSI_2_DP_1 M47
T65 @TP PANEL0_BKLTEN MCSI_2_DN_1
SOC_DDI0_PWM V51
T66 @TP PANEL0_BKLTCTL
T67 @TP SOC_DDI0_ENVDD W53 T50
1 2 DDI0_PLLOBS_P F38 PANEL0_VDDEN RSVD17 T48
RC20 DDI0_PLLOBS_N G38 DDI0_PLLOBS_P RSVD16
402_0402_1% DDI0_PLLOBS_N P44 MCSI_COMP 1 2
EDP_CPU_LANE_P0 J51 MCSI_COMP RC21 150_0402_1%
<20> EDP_CPU_LANE_P0 DDI1_TXP_0
EDP_CPU_LANE_N0 H51 AB41 GP_CAMSB00
<20> EDP_CPU_LANE_N0 DDI1_TXN_0 GP_CAMERASB00 GP_CAMSB00 <16>
AB45 GP_CAMSB01
GP_CAMERASB01 GP_CAMSB01 <16>
EDP_CPU_LANE_P1 K51 AB44 GP_CAMSB02
<20> EDP_CPU_LANE_P1 DDI1_TXP_1 GP_CAMERASB02 GP_CAMSB02 <16>
EDP_CPU_LANE_N1 K52 AC53 GP_CAMSB03
<20> EDP_CPU_LANE_N1 DDI1_TXN_1 DDI1 GP_CAMERASB03 GP_CAMSB03 <16>
AB51 GP_CAMSB04
GP_CAMERASB04 GP_CAMSB04 <16>
T68 @TP EDP_TXP2 L53 AB52 GP_CAMSB05
DDI1_TXP_2 GP_CAMERASB05 GP_CAMSB05 <16>
T69 @TP EDP_TXN2 L51 AA51 GP_CAMSB06
DDI1_TXN_2 GP_CAMERASB06 GP_CAMSB06 <16>
AB40 GP_CAMSB07
GP_CAMERASB07 GP_CAMSB07 <16>
<eDP> EDP_TXP3 M52 Y44 GP_CAMSB08
T70 @TP DDI1_TXP_3 GP_CAMERASB08 GP_CAMSB08 <11,16>
EDP_TXN3 M51
T71 @TP DDI1_TXN_3 Y42
C EDP_CPU_AUX M42 GP_CAMERASB09 Y41 C
<20> EDP_CPU_AUX DDI1_AUXP GP_CAMERASB10
EDP_CPU_AUX# K42 V40 GP_CAMSB11
<20> EDP_CPU_AUX# DDI1_AUXN GP_CAMERASB11 GP_CAMSB11 <11>
EDP_CPU_HPD R51
<20> EDP_CPU_HPD HV_DDI1_HPD
SOC_DDI1_ENBKL P51
<18> SOC_DDI1_ENBKL PANEL1_BKLTEN
SOC_DDI1_PWM P52 M7 EMMC_1_CLK
<18> SOC_DDI1_PWM PANEL1_BKLTCTL SDMMC1_CLK EMMC_1_CLK <22>
SOC_DDI1_ENVDD R53 P6 EMMC_1_CMD
<18> SOC_DDI1_ENVDD PANEL1_VDDEN SDMMC1_CMD EMMC_1_CMD <22>
1 2 DDI1_PLLOBS_P F47
RC22 DDI1_PLLOBS_N F49 DDI1_PLLOBS_P M6 EMMC_1_D0
DDI1_PLLOBS_N SDMMC1_D0 EMMC_1_D0 <22>
402_0402_1% M4 EMMC_1_D1
SDMMC1_D1 EMMC_1_D1 <22>
F40 P9 EMMC_1_D2 <eMMC>
G40 DDI2_TXP_0 SDMMC1_D2 P7 EMMC_1_D2 <22>
SDMMC1 EMMC_1_D3
DDI2_TXN_0 SDMMC1_D3_CD_B EMMC_1_D3 <22>
T6 EMMC_1_D4
MMC1_D4_SD_WE EMMC_1_D4 <22>
J40 T7 EMMC_1_D5
DDI2_TXP_1 MMC1_D5 EMMC_1_D5 <22>
K40 DDI2 T10 EMMC_1_D6
DDI2_TXN_1 MMC1_D6 EMMC_1_D6 <22>
T12 EMMC_1_D7
MMC1_D7 EMMC_1_D7 <22>
F42 T13 EMMC_1_RCLK
G42 DDI2_TXP_2 MMC1_RCLK P13 EMMC_1_RCOMP 1 2 EMMC_1_RCLK <22>
DDI2_TXN_2 SDMMC1_RCOMP RC23 100_0402_1%
D44
F44 DDI2_TXP_3 K10
DDI2_TXN_3 SDMMC2_CLK K9
D48 SDMMC2_CMD
C49 DDI2_AUXP M12
DDI2_AUXN SDMMC2_D0 M10
U51 SDMMC2_D1 K7
HV_DDI2_HPD SDMMC2_D2 K6 SOC_LID_OUT#
SDMMC2
SDMMC2_D3_CD_B SOC_LID_OUT# <18>
UART_0_CTXD_DRXD_OP RC391 1 2 0_0402_5%
SHORT@ SOC_DP2_CTRL_CLK T51
<25> UART_0_CTXD_DRXD_OP HV_DDI2_DDC_SCL
<WIN7 Kernel DBG> <25> UART_0_CRXD_DTXD_OP UART_0_CRXD_DTXD_OP RC392 1 2 0_0402_5%
SHORT@ SOC_DP2_CTRL_DATA T52 F2
HV_DDI2_DDC_SDA SDMMC3_CLK D2
B53 SDMMC3_CMD K3
A52 RSVD6 SDMMC3_CD_B
E52 RSVD3 J1
D52 RSVD9 SDMMC3_D0 J3
B B50 RSVD8 NC's SDMMC3_D1 H3 B
B49 RSVD5 SDMMC3_D2 G2
E53 RSVD4 SDMMC3_D3
C53 RSVD10 K2
SDMMC3
A51 RSVD7 SDMMC3_1P8_EN L3
A49 RSVD2 SDMMC3_PWR_EN_B P12 SDIO_3_RCOMP
G44 RSVD1 SDMMC3_RCOMP
RSVD11

1
@
RC33
3 OF 13 80.6_0402_1%
BSW-MCP-EDS_FCBGA1170 Should be 80_0402_1%

2
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P10-BSW(3/8) DDI,MCSI,SDMMC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 10 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = CPU @


CHV_MCP_EDS
BIOS ROM
UC1D

C24 C31 SATA_PTX_DRX_P0_C +1.8VALW +1.8V_SPI


B24 PCIE_TXP0 SATA_TXP0 B30 SATA_PTX_DRX_P0_C <27> +1.8V_SPI
SATA_PTX_DRX_N0_C <HDD>
PCIE_TXN0 SATA_TXN0 SATA_PTX_DRX_N0_C <27>
G20 N28 SATA_PRX_DTX_P0_C SATA_PRX_DTX_P0_C <27> 1 2
SHORT@
J20 PCIE_RXP0 SATA_RXP0 M28 SATA_PRX_DTX_N0_C RC86 1 2 3.3K_0402_5% SPI_CS#0 RC87 0_0402_5%
PCIE_RXN0 SATA_RXN0 SATA_PRX_DTX_N0_C <27>
C29 SATA_PTX_DRX_P1_C @ RC88 1 2 3.3K_0402_5% SPI_CS#2 1
SATA_TXP1 SATA_PTX_DRX_P1_C <27>
A25 A29 SATA_PTX_DRX_N1_C <ODD>
C25 PCIE_TXP1 SATA_TXN1 J28 SATA_PTX_DRX_N1_C <27>
SATA_PRX_DTX_P1_C SATA_PRX_DTX_P1_C <27> @ RC98 1 2 20K_0402_5% SPI_MOSI CC76
D20 PCIE_TXN1 SATA_RXP1 K28 SATA_PRX_DTX_N1_C @ RC99 1 2 20K_0402_5% SPI_MISO .1U_0402_16V7K
PCIE_RXP1 SATA_RXN1 SATA_PRX_DTX_N1_C <27> 2
F20 RC100 1 2 20K_0402_5% SPI_WP#
PCIE_RXN1 AH3 SATA_LED# RC101 1 2 20K_0402_5% SPI_HOLD#
PCIE_PTX_C_DRX_P2 C1 1 2 .1U_0402_16V7K PCIE_CTX_DRX_P2 B26 SATA_LEDN AH2
D <28> PCIE_PTX_C_DRX_P2 1 2 .1U_0402_16V7K C26 PCIE_TXP2 SATA_GP0 AG3
D
<WLAN> PCIE_PTX_C_DRX_N2 C2 PCIE_CTX_DRX_N2 SOC_TS_INT# SOC_TS_INT# <20>
<28> PCIE_PTX_C_DRX_N2 D22 PCIE_TXN2 PCIe SATA SATA_GP1 AG1
<28> PCIE_CRX_DTX_P2 PCIE_CRX_DTX_P2 SATA_DEVSLP
PCIE_RXP2 SATA_GP2 SATA_DEVSLP <27>
PCIE_CRX_DTX_N2 F22 AF3 EMMC_1_RST#
<28> PCIE_CRX_DTX_N2 PCIE_RXN2 SATA_GP3 EMMC_1_RST# <22>
A27 N30 SATA_OBS_P 1 2
PCIE_TXP3 SATA_OBSP
SPI ROM ( 8MByte/1.8V/Quad-IO )
C27 M30 SATA_OBS_N RC34
G24 PCIE_TXN3 SATA_OBSN 402_0402_1%
J24 PCIE_RXP3 W3 SOC_FST_SPI_CLK RC93 1 EMI@ 2 10_0402_5% SPI_CLK
Place close to SOC pins PCIE_RXN3 FST_SPI_CLK
AM10 V4 SOC_FST_SPI_CS#0 RC89 1 EMI@ 2 33_0402_5% SPI_CS#0 +1.8V_SPI
AM12 PCIE_CLKREQ0B FST_SPI_CS0_B V6 SOC_TS_EN UC2
+1.8VALW PCIE_CLKREQ1B FST_SPI_CS1_B @TP T104
<28> WLAN_CLKREQ# WLAN_CLKREQ# AK14 V7 SOC_FST_SPI_CS#2 RC97 1 @ 2 33_0402_5% SPI_CS#2 SPI_CS#0 1 8
AM14 PCIE_CLKREQ2B FST_SPI_CS2_B SPI_MISO 2 CS# VCC 7 SPI_HOLD#
RC231 1 2 10K_0402_5% WLAN_CLKREQ# PCIE_CLKREQ3B V2 SOC_FST_SPI_D0 RC94 1 EMI@ 2 10_0402_5% SPI_MOSI SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI_CLK
A21 FST_SPI_D0 V3 SOC_FST_SPI_D1 RC90 1 EMI@ 2 10_0402_5% SPI_MISO 4 WP#(IO2) CLK 5 SPI_MOSI
C21 CLK_DIFF_P_0 FAST SPI FST_SPI_D1 U1 SOC_FST_SPI_D2 RC91 1 EMI@ 2 10_0402_5% SPI_WP# GND DI(IO0)
C19 CLK_DIFF_N_0 FST_SPI_D2 U3 SOC_FST_SPI_D3 RC92 1 EMI@ 2 10_0402_5% SPI_HOLD# W25Q64DWSSIG_SO8
RC383 1 2 10K_0402_5% SOC_TS_EN B20 CLK_DIFF_P_1 FST_SPI_D3 SA00006ZV00
C18 CLK_DIFF_N_1 AF13
<28> CLK_PCIE_WLAN
CLK_PCIE_WLAN
CLK_DIFF_P_2 MF_HDA_RSTB
HDA_RST#_C Modification @ 2014/07/21
RC242 1 2 10K_0402_5% SATA_DEVSLP CLK_PCIE_WLAN# B18 AD6 HDA_SDIN1 @TP T102
<28> CLK_PCIE_WLAN# CLK_DIFF_N_2 MF_HDA_SDI1
C17 AD9 HDA_BIT_CLK_C
A17 CLK_DIFF_P_3 MF_HDA_CLK AD7 HDA_SDIN0
CLK_DIFF_N_3 MF_HDA_SDI0 HDA_SDIN0 <23>
RC189 1 @ 2 10K_0402_5% SATA_LED# 1 @ 2 CLK_PCIE_P4 C16 AF12 HDA_SYNC_C
RC326 1 @ 2 10K_0402_5% EMMC_1_RST# RC35 0_0402_5% CLK_PCIE_N4 B16 RSVD20 MF_HDA_SYNC AF14 HDA_SDOUT_C
RC174 1 @ 2 1K_0402_5% I2C_5_SCL_R RSVD19 MF_HDA_SDO AB9 HDA_DOCKEN#
MF_HDA_DOCKENB @TP T132 Reserve for EMI(Near SPI ROM)
RC175 1 @ 2 1K_0402_5% I2C_5_SDA_R 1 2 PCIE_OBS_P D26 AB7 HDA_DOCKRST# @TP T121
RC36 402_0402_1% PCIE_OBS_N F26 PCIE_OBSP MF_HDA_DOCKRSTB
PCIE_OBSN H4 SOC_SPKR SPI_CLK 1 2 2 1
AUDIO SPKR SOC_SPKR <23>
RC104 1 @ 2 1K_0402_5% SOC_SMB_ALERT#
T120@TP
SOC_SPI_CLK V14 NEMI@ R1002 NEMI@ C1014
SOC_SPI_CS#0 Y13 SPI1_CLK AK9 33_0402_5% 10P_0402_50V8J
T142@TP SPI1_CS0_B GP_SSP_2_CLK
Need to confirm leakage T122@TP SOC_SPI_CS#1 Y12 SPI AK10
+1.8VS SOC_SPI_SI V13 SPI1_CS1_B GP_SSP_2_FS AK12
T123@TP SPI1_MISO GP_SSP_2_TXD
SOC_SPI_SO V12 AK13
T124@TP SPI1_MOSI GP_SSP_2_RXD
RC26
10K_0402_5%
C 1 2 C
4 OF 13
Pull High 10k at LED Page BSW-MCP-EDS_FCBGA1170
For EMI
2
G

1 2
1 3 SATA_LED# HDA_BITCLK_AUDIO CC74 EMI@
<28,32> SOC_SATALED#
22P_0402_50V8J
D

QC3 HDA_BIT_CLK_C RA6 1 EMI@ 2 75_0402_5% HDA_BITCLK_AUDIO <23>


MESS138W-G_SOT323-3 HDA_SYNC_C RA5 1 EMI@ 2 75_0402_5% HDA_SYNC_AUDIO <23>
HDA_SDOUT_C RA7 1 EMI@ 2 75_0402_5% HDA_SDOUT_AUDIO <23>
HDA_RST#_C RA10 1 EMI@ 2 75_0402_5% HDA_RST_AUDIO# <23>
SOC_XTAL19_IN1 2 SOC_XTAL19_OUT
RC37 200K_0402_1%

GP_CAMSB11 RC382 1 2 0_0402_5% SOC_KBRST#


SHORT@ SOC_KBRST# <32>
YC1

1 3
1 3
CC7

CC8

2 2
@
UC1E CHV_MCP_EDS
12P_0402_50V8J

12P_0402_50V8J

1 2 4 1
GND GND SOC_XTAL19_IN RC38 1 2 0_0402_5% SOC_XTAL19_IN_R P24
SHORT@
SOC_XTAL19_OUT RC39 1 2 0_0402_5% SOC_XTAL19_OUT_R M22 OSCIN C11
SJ10000N700 SHORT@ OSCOUT RSVD3 B10
J26 RSVD2 F12
19.2MHZ_12PF_7V19200001 N26 RSVD13 RSVD9 F10
RC40 1 2 2.49K_0402_1% ICLKICOMP P20 RSVD17 RSVD8
RC41 1 2 49.9_0402_1% ICLKRCOMP N20 ICLKICOMP iCLK RESERVED D12
Change P/N to SJ10000N700 P26 ICLKRCOMP RSVD5 E8
19.2MHz_12pF K26 RSVD18 RSVD7 C7
M26 RSVD14 RSVD4 D6
+1.8VALW Place close to SOC pins AH45 RSVD16 RSVD6
B RSVD1 J12 B
RC56 1 2 4.7K_0402_5% DDI0_ENABLE A9 RSVD11 F7

PLTFM CLK's
RC58 1 2 4.7K_0402_5% DDI1_ENABLE C9 MF_PLT_CLK0 RSVD10 J14
B8 MF_PLT_CLK1 RSVD12 L13
B7 MF_PLT_CLK2 RSVD15
B5 MF_PLT_CLK3 AK6
B4 MF_PLT_CLK4 I2C0_SCL AH7
MF_PLT_CLK5 I2C0_SDA
AF6
XDP_GPIO_DFX0 AM40 I2C1_SCL AH6
<16> XDP_GPIO_DFX0 GPIO_DFX0 I2C1_SDA
XDP_GPIO_DFX1 AM41
<16> XDP_GPIO_DFX1

GPIO_DFX
XDP_GPIO_DFX2 AM44 GPIO_DFX1 AF9
<16> XDP_GPIO_DFX2 GPIO_DFX2 I2C2_SCL
XDP_GPIO_DFX3 AM45 AF7
<16> XDP_GPIO_DFX3 GPIO_DFX3 I2C I2C2_SDA
XDP_GPIO_DFX4 AM47
<16> XDP_GPIO_DFX4 GPIO_DFX4
XDP_GPIO_DFX5 AK48 AE4
<16> XDP_GPIO_DFX5 AM48 GPIO_DFX5 I2C3_SCL AD2
XDP_GPIO_DFX6
<16> XDP_GPIO_DFX6 GPIO_DFX6 I2C3_SDA
XDP_GPIO_DFX7 AK41
<16> XDP_GPIO_DFX7 GPIO_DFX7
XDP_GPIO_DFX8 AK42 AC1
<16> XDP_GPIO_DFX8 GPIO_DFX8 I2C4_SCL AD3
DDI0_ENABLE AD51 I2C4_SDA
WL_OFF# RC380 1 2 0_0402_5% GPIO_SUS3 DDI1_ENABLE AD52 GPIO_SUS0 AB2 I2C_5_SCL RC158 1 2 0_0402_5% I2C_5_SCL_R
<28,32> WL_OFF# SHORT@ SHORT@ I2C_5_SCL_R <29>
SOC_TP_INT# RC334 1 2 0_0402_5%SEC_GPIO_SUS10 GPIO_SUS2 AH50 GPIO_SUS1 I2C5_SCL AC3 I2C_5_SDA RC159 1 2 0_0402_5% I2C_5_SDA_R
<29> SOC_TP_INT# SHORT@
GPIO_SUS2 I2C5_SDA
SHORT@ I2C_5_SDA_R <29> <Touch PAD_LS>
GPIO_SUS

BT_ON# RC338 1 2 0_0402_5% SEC_GPIO_SUS9


SHORT@ GPIO_SUS3 AH48
<28> BT_ON# GPIO_SUS3
GPIO_SUS4 AH51 AA1
GPIO_SUS5 AH52 GPIO_SUS4 I2C6_SCL AB3
<12> GPIO_SUS5 GPIO_SUS5 I2C6_SDA
GPIO_SUS6 AG51
<16> GPIO_SUS6 GPIO_SUS6
<17> SOC_SCI# SOC_SCI# RC227 1 2 0_0402_5% GPIO_SUS6
SHORT@ GPIO_SUS7 AG53 AA3 I2C_NFC_SCL @TP T143
SOC_SMI# RC228 1 2 0_0402_5% GPIO_SUS7 SEC_GPIO_SUS9 AF52 GPIO_SUS7 RSVD21 Y2 I2C_NFC_SDA
<17> SOC_SMI# SHORT@ @TP T144
SEC_GPIO_SUS8 AF51 SEC_GPIO_SUS9 RSVD22

不不不不不
SEC_GPIO_SUS10 AE51 SEC_GPIO_SUS8 AM6 SOC_SMB_CLK
SEC_GPIO_SUS10 MF_SMB_CLK SOC_SMB_CLK <16,17>
SEC_GPIO_SUS11 AC51 SMBUS AM7 SOC_SMB_DATA <XDP/EC LS/Thermal Sensor LS>
GPIO_SUS6 H +1.8VALW Page 11 RC42 1 2 100_0402_1% GPIO0_RCOMP AH40 SEC_GPIO_SUS11 MF_SMB_DATA AM9 SOC_SMB_ALERT#
SOC_SMB_DATA <16,17>

不不不
GPIO0_RCOMP MF_SMB_ALERTB
SOC_SCI# PH +1.8VS Page 17 for 9022 +1.8VALW T133@TP
SOC_COLD_RESET# Y3
GPIO_ALERT
EC_SCI# PH +3.3VS Page 32 for 9012
5 OF 13
A
BIOS/EFI Top Swap A

GPIO_SUS7 H +1.8VALW Page 11 不不不


BSW-MCP-EDS_FCBGA1170

SOC_SMI# PH +1.8VALW Page 17 不不不


RC60 1 2 10K_0402_5% GPIO_SUS2 @ RC61 1 2 10K_0402_5%
@ RC62 1 2 10K_0402_5% GPIO_SUS3 @ RC63 1 2 10K_0402_5%

EC_SMI# PH +3VALW_EC Page 32 不不不


RC64 1 2 100K_0402_5% GPIO_SUS4 @ RC65 1 2 10K_0402_5%
RC66 1 2 10K_0402_5% GPIO_SUS5 @ RC67 1 2 4.7K_0402_5%
@ RC68 1 2 10K_0402_5% GPIO_SUS6
@ RC80 1 2 10K_0402_5% GPIO_SUS7
@ RC118 1 2 10K_0402_5% SEC_GPIO_SUS8 RC105 1 2 4.7K_0402_5%
@ RC74 1 2 10K_0402_5% SEC_GPIO_SUS9 @ RC75 1 2 10K_0402_5%
@ RC76 1 2 10K_0402_5% SEC_GPIO_SUS10 @ RC77 1 2 10K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
GP_CAMSB08 RC386 1 2 4.7K_0402_5% SEC_GPIO_SUS11 RC395 1 2 10K_0402_5% 2014/11/10 2015/11/25 Title
<10,16> GP_CAMSB08
LPC33@ LPC18@
Issued Date Deciphered Date
@ RC78 1 2 10K_0402_5% GP_CAMSB08 RC79 1 2 100K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P11-BSW(4/8) PCIE,SATA,I2C,CLK
<10> GP_CAMSB11 GP_CAMSB11 @ RC82 1 2 10K_0402_5% GP_CAMSB11 @ RC83 1 2 100K_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 11 of 44
5 4 3 2 1
5 4 3 2 1
@
UC1F CHV_MCP_EDS

Main Func = CPU RTC CKT BRTCX1


B48 USB_OTG_ID RC362 1 @ 2 0_0402_5% RC46 10M_0402_5%
PCH_USB3_TX0_P B32 USB_OTG_ID C42 USB20_P0 BRTCX2 1 2
<25> PCH_USB3_TX0_P USB3_TXP0 USB_DP0 USB20_P0 <25>
PCH_USB3_TX0_N C32 B42 USB20_N0 <USB3.0> TXC
<25> PCH_USB3_TX0_N USB3_TXN0 USB_DN0 USB20_N0 <25>
<25> PCH_USB3_RX0_P PCH_USB3_RX0_P F28 ESR < 50K Ohm YC2 SJ10000LV00
PCH_USB3_RX0_N D28 USB3_RXP0 C43 USB20_P1 1 2
<25> PCH_USB3_RX0_N USB3_RXN0 USB_DP1 USB20_P1 <25>
B44 USB20_N1 <USB2.0 / IO>
A33 USB_DN1 USB20_N1 <25>
C33 USB3_TXP1 C41 USB20_P2
USB3_TXN1 USB_DP2 USB20_P2 <20> 1 32.768KHZ_12.5PF_9H03200042
1
F30 A41 USB20_N2 <Camera>
D30 USB3_RXP1 USB_DN2 USB20_N2 <20>
CC10 CC11
USB3_RXN1 C45 USB20_CPU_P3 18P_0402_50V8J 15P_0402_50V8J
C34 USB_DP3 A45 USB20_CPU_P3 <26> 2 2
USB20_CPU_N3 <USB Hub)>
B34 USB3_TXP2 USB_DN3 USB20_CPU_N3 <26>
G32 USB3_TXN2 B40 USB20_SOC_P3 +RTCVCC
D
J32 USB3_RXP2 USB_DP4 C40 USB20_SOC_P3 <25> D
USB20_SOC_N3 To USB Conn

USB3.0

USB2.0
USB3_RXN2 USB_DN4 USB20_SOC_N3 <25>
RC144 1 2 20K_0402_5% SRTCRST# CC83 1 2 1U_0402_6.3V6K
C35 P16 USB_OC1# RC145 1 2 20K_0402_5% RTEST# CC84 1 2 1U_0402_6.3V6K
USB3_TXP3 USB_OC1_B USB_OC1# <25>
A35 P14 USB_OC0# V0.2 change
USB3_TXN3 USB_OC0_B USB_OC0# <25>
G34 2014/10/30 : RTEST# SRTCRST#
J34 USB3_RXP3 B46 RC381 1 @ 2 49.9_0402_1%
USB3_RXN3 RSVD3 Intel suggest reserve RC381,RC378

1
B47 USB_VBUSSNS RC378 1 @ 2 0_0402_5% V0.2 change
1 2 USB3_OBS_P D34 USB_VBUSSNS A48 USB20_RCOMP RC44 1 2 113_0402_1% CLRP1 CLRP2
USB3_OBSP USB_RCOMP Should be 112.5_0402_1%
RC43 USB3_OBS_N F34
Clear CMOS RTC Well Reset

2
+1.8VALW 402_0402_1% USB3_OBSN M36
C37 USB_HSIC_0_STROBE N36
1 2 10K_0402_5% USB_OC0# A37 RSVD4 USB_HSIC_0_DATA

HSIC
RC24 +RTCBATT
RSVD1 JP12
RC25 1 2 10K_0402_5% USB_OC1# F36 K38 JP@
RSVD7 USB_HSIC_1_STROBE

RESERVED
D36 M38 2 1
M34 RSVD6 USB_HSIC_1_DATA N38 HSIC_RCOMP RC45 1 2 45.3_0402_1% +CHGRTC 2 1 +3VLP
RSVD11 USB_HSIC_RCOMP

1
M32 JUMP_43X39
XDP_H_TCK 1 2 RSVD10 AD10 UART_1_CTXD_DRXD <USB3.0_1>

+
UART1_TXD @TP T106
CC102 NESD@ .1U_0402_16V7K C38 AD12 UART_1_CRXD_DTXD W=20mils
RSVD5 UART1_RXD @TP T105 +CHGRTC
XDP_H_TDO 1 2 B38 AD13 +RTCBATT
C1162 NESD@ 22P_0402_50V8J G36 RSVD2 UART1_CTS_B AD14 +RTCVCC RC84

UART
XDP_H_TRST# 1 2 J36 RSVD8 UART1_RTS_B 1K_0402_5%
C1163 NESD@ 22P_0402_50V8J RSVD9 Y6 1 2
XDP_H_TDI 1 2 N34 UART2_TXD Y7
C1164 NESD@ 22P_0402_50V8J P34 RSVD12 UART2_RXD V9 +RTCBATT_R
XDP_H_TMS 1 2 RSVD13 UART2_CTS_B V10
UART2_RTS_B 1 20mil

3
C1165 NESD@ 22P_0402_50V8J
+1.8V_XDP_AB CC75 20mil

P1

P2
6 OF 13 JRTC CONN@ .1U_0402_16V7K

-
RC107 1 XDP@ 2 51_0402_5% XDP_H_TDI BSW-MCP-EDS_FCBGA1170 LOTES_AAA-BAT-054-K01 2 +RTCVCC LBAV70WT1G_SC70-3

N1
2
RC109 1 XDP@ 2 51_0402_5% XDP_H_TDO @ DC3
1 2 CHV_MCP_EDS
RC110 XDP@ 51_0402_5% XDP_H_TMS UC1G SP07000H700

1
RC111 1 XDP@ 2 51_0402_5% XDP_H_PREQ_BUF#

XDP_H_TCK RC112 1 XDP@ 2 51_0402_5% XDP_H_TCK AF42 M18 BRTCX1


XDP_H_TRST# RC108 1 XDP@ 2 51_0402_5%
<16> XDP_H_TCK
XDP_H_TDI AD47 TCK BRTCX1_PAD K18 BRTCX2
0718: change to the other part to SC600001Q00
C <16> XDP_H_TDI TDI BRTCX2_PAD C
XDP_H_TDO AF40 F16 BVCCRTC_EXTPAD CC9 1 2 .1U_0402_16V7K

JTAG/ITP
<16> XDP_H_TDO TDO BVCCRTC_EXTPAD
<16> XDP_H_TMS XDP_H_TMS AD48
XDP_H_TRST# AB48 TMS D18 SRTCRST#

RTC
<16> XDP_H_TRST# TRST_B SRTCRST_B +1.8VALW
Place close to SOC pins G16 PCH_PWROK
COREPWROK PCH_PWROK <16,32>
F18 SOC_RSMRST# RC234 1 2 0_0402_5%
SHORT@ EC_RSMRST# EC_RSMRST# <16,32>
XDP_H_PRDY# AD45 RSMRST_B J16 RTEST# RC2741 2 10K_0402_5% PMU_SUSPWRDNACK
<16> XDP_H_PRDY# CX_PRDY_B RTEST_B
<16> XDP_H_PREQ_BUF# XDP_H_PREQ_BUF# AF41 G18 RC3931 2 10K_0402_5% RC1131 2 1K_0402_5% PMU_RSTBTN#
@ RC47 1 2 10K_0402_5% EDM_SOC M13 CX_PREQ_B RSVD_VSS @ RC1141 2 1K_0402_5% PMU_PLTRST#
RSVD5 AE3 PMU_SUSPWRDNACK RC2411 2 10K_0402_5% PMU_BATLOW#
SUSPWRDNACK PMU_SUSPWRDNACK
RC2391 2 0_0402_5% LPC_CLKOUT0 P2 D14 PMU_SUS_STAT# @TP T107 RC2751 2 2.2K_0402_5% PMU_AC_PRESENT
LPC_CLK_EC @ RC2401 2 0_0402_5% LPC_CLKOUT1 R3 MF_LPC_CLKOUT0 SUS_STAT_B C15 PMU_SUSCLK0 @ RC2761 2 10K_0402_5% PMU_SLP_S0IX#
<32> LPC_CLK_EC MF_LPC_CLKOUT1 PMU_SUSCLK PMU_SUSCLK0 <18>
LPC_CLKRUN# T3 C12 PMU_SLP_S4# RC2771 2 10K_0402_5% PMU_PWRBTN#
<32> LPC_CLKRUN# P3 LPC_CLKRUNB PMU_SLP_S4_B B14 PMU_SLP_S4# <17>
LPC_FRAME# PMU_SLP_S3# RC2291 2 10K_0402_5% PMU_WAKE#
<32> LPC_FRAME# LPC_FRAMEB PMU_SLP_S3_B PMU_SLP_S3# <17>
AF2 PMU_RSTBTN#
PMU_RESETBUTTON_B PMU_RSTBTN# <16>

PMU
M3 F14

LPC
LPC_AD0 PMU_PLTRST#
<32> LPC_AD0 MF_LPC_AD0 PMU_PLTRST_B PMU_PLTRST# <16,17,22>
LPC_AD1 M2 C14 PMU_BATLOW# PMU_BATLOW# <17> CC98 1 2 .1U_0402_16V7K
<32> LPC_AD1 MF_LPC_AD1 PMU_BATLOW_B
LPC_AD2 N3 C13 PMU_AC_PRESENT PMU_AC_PRESENT <17> ESD@
<32> LPC_AD2 MF_LPC_AD2 PMU_AC_PRESENT
LPC_AD3 N1 A13 PMU_SLP_S0IX# SOC_RSMRST# RC1151 2 100K_0402_5%
<32> LPC_AD3 MF_LPC_AD3 PMU_SLP_S0IX_B PMU_SLP_S0IX# <17>
B12 PCH_PWROK RC95 1 2 100K_0402_5%
RC48 1 2 100_0402_1% LPC_HVT_RCOMP T4 PMU_SLP_LAN_B N16 PMU_WAKE# CC96 1 2 .1U_0402_16V7K
LPC_SOC_SERIRQ T2 LPC_HVT_RCOMP PMU_WAKE_B M16 PMU_PWRBTN# ESD@
<17> LPC_SOC_SERIRQ ILB_SERIRQ PMU_PWRBTN_B PMU_PWRBTN# <16,18>
P18 PMU_WAKE_LAN# @TP T108
H5 PMU_WAKE_LAN_B
H7 RSVD23 AD42 VR_SVID_CLK PMU_PLTRST# 1 2
+1.8VALW RSVD24 SVID0_CLK

PWM
AD41

SVID
SVID_DATA CC97 ESD@ .1U_0402_16V7K
SVID0_DATA AD40 VR_SVID_ALRT#
RC147 1 2 20K_0402_5% H_PROCHOT#_R CC95 1 2 .1U_0402_16V7K SVID0_ALERT_B Route as Differential Lines
P28 PMU_RSTBTN# 1 2
P30 RSVD6 AG32 VCC_SENSEP_R RC49 1 2 2.2 +-1% 0402 VCCSENSE C1161 ESD@ 22P_0402_50V8J
ESD@

Voltage sense
RSVD7 CORE_VCC0_SENSE VCCSENSE <41>
AF50 AJ32 VCC_SENSEN_R RC50 1 2

Reserved
2.2 +-1% 0402 VSSSENSE
RSVD4 CORE_VSS0_SENSE VSSSENSE <41>
AF48 AD29 VCC1_SENSEP RC51 1 2 2.2 +-1% 0402
AF44 RSVD3 CORE_VCC1_SENSE AF27 VCC1_SENSEN RC52 1 2 2.2 +-1% 0402
AF45 RSVD1 CORE_VSS1_SENSE AD24 VGG_SENSEP
RSVD2 DDI_VGG_SENSE VGG_SENSEP <42>
H_PROCHOT# RC2361 2 0_0402_5%
SHORT@ H_PROCHOT#_R AD50 AD22 VGG_SENSEN
<32,34> H_PROCHOT# PROCHOT_B UNCORE_VSS_SENSE2 VGG_SENSEN <42>
<31> FAN_ALERT# FAN_ALERT# RC2371 2 0_0402_5% AC27 VNN_SENSEP
UNCORE_VSS_SENSE1 VNN_SENSEP <39>
B @ B

7 OF 13
BSW-MCP-EDS_FCBGA1170
0_0402_5%
Hardware Strap Security Flash Descriptor 1 2 GPIO_SUS5
@
+3VALW +1.35V GPIO_SUS5 RC394
Pin Name Purpose PU/PD Description Default State GPIO_SUS5 <11>
GPIO_SUS5

1
D
1: DDI0 detected 0: Override

1
GPIO_SUS0 DDI0 Detect PD High TXE_DBG 2
0: DDI0 not detected RC30 1: Normal Operation (internal PU) <32> TXE_DBG
G QC30
1: DDI1 detected 10K_0402_5% Note: S MESS138W-G_SOT323-3

3
5
GPIO_SUS1 DDI1 Detect PD High UC7
0: DDI1 not detected 3.3V 1 1.35V EC programing TXE_DBG

2
NC 4 SOC_VCCA_PWROK "H" for Flash BIOS
1: Normal operation Y SOC_VCCA_PWROK <9>
GPIO_SUS2 A16 swap overdrive PU High PCH_PWROK 2
0: Change Boot Loader address A
G NL17SZ07DFT2G_SC70-5
1: DSI detected
SVID Follow PWR Net Name --> Change to VR_SVID_CLK
3

GPIO_SUS3 DSI Display Detect PD Low SA00004BV00


0: DSI not detected
Note: VR_SVID_CLK Rs & Rpu @ power side
1: Boot from SPI
GPIO_SUS4 Boot BIOS Strap BBS PU 0: Boot from LPC High
VR_SVID_CLK
VR_SVID_CLK <41,42>
Flash Descriptor Security 1: Security enabled
GPIO_SUS5 Override PU 0: Security disabled High
+1.05VALW
Note: SVID_ALERT# Rs @ power side
DFX Boot Halt Strap, 1: Normal operation
GPIO_SUS6 VISA Early POSM Debug Enable PU 0: Halt boot enable High
RC366 1 2 200_0402_1%
1: Normal operation
GPIO_SUS7 DFX Sus Debug Strap PU High VR_SVID_ALRT#
0: Sus Debug enabled VR_SVID_ALRT# <41,42>

ICLK, USB2, DDI SFR 1: 1.35V supply


SEC_GPIO_SUS8 Supply Select PD 0: 1.25V supply Low Route SVID_ALERT# between SVID_CLK & SVID_DATA
A A
1: Bypass with 1.05V
SEC_GPIO_SUS9 ICLK, USB2, DDI SFR Bypass PU 0: No bypass Low Note: SVID_DATA Rpu & Rss @ power side
1: PMC Don't care,
SEC_GPIO_SUS10 POSM Select PD SVID_DATA RC364 1 2 0_0402_5%
SHORT@ VCC_SVID_DAT
0: Fuse controller if GPIO_SUS6 is pulled hgh RC365 1 2 0_0402_5%
SHORT@ VGG_SVID_DAT
VCC_SVID_DAT <41>
VGG_SVID_DAT <42>
1: Bypass
GP_CAMERASB08 ICLK Xtal OSC Bypass PD 0: No bypass Low
1: Bypass
Security Classification Compal Secret Data Compal Electronics, Inc.
GP_CAMERASB09 CCU SUS RO Bypass PD 0: No bypass Low Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

1: Bypass THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P12-BSW(5/8) USB,UART,RTC,PWM
GP_CAMERASB11 RTC OSC Bypass PD Low Size Document Number Rev
0: No bypass AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 12 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

@
UC1H CHV_MCP_EDS
+1.05V_VNN
+VCC_CORE 3500mA
6400mA AA18
AF36 UNCORE_VNN_S41 AA19
D CORE_VCC1_S0IX3 UNCORE_VNN_S42 D
AG33 AA21
AG35 CORE_VCC1_S0IX7 UNCORE_VNN_S43 AA22
AG36 CORE_VCC1_S0IX8 UNCORE_VNN_S44 AA24
AG38 CORE_VCC1_S0IX9 UNCORE_VNN_S45 AA25
AJ33 CORE_VCC1_S0IX10 UNCORE_VNN_S46 AC18
AJ36 CORE_VCC1_S0IX14 UNCORE_VNN_S47 AC19
AJ38 CORE_VCC1_S0IX15 UNCORE_VNN_S48 AC21
CORE_VCC1_S0IX16 UNCORE_VNN_S49 AC22
AF30 UNCORE_VNN_S410 AC24
AG27 CORE_VCC1_S0IX2 UNCORE_VNN_S411 AC25
AG29 CORE_VCC1_S0IX4 UNCORE_VNN_S412 AD25
AG30 CORE_VCC1_S0IX5 UNCORE_VNN_S413 AD27
AJ27 CORE_VCC1_S0IX6 UNCORE_VNN_S414 +1.05VALW
AJ29 CORE_VCC1_S0IX11 AA30
CORE_VCC1_S0IX12 RSVD1
4000mA
AJ30 V33 CC12 1 2 1U_0402_6.3V6K
AF29 CORE_VCC1_S0IX13 UNCORE_V1P15_S0IX6 AA32 CC13 1 2 1U_0402_6.3V6K
+VGG_CORE CORE_VCC1_S0IX1 UNCORE_V1P15_S0IX1 AA33 CC14 1 2 1U_0402_6.3V6K
UNCORE_V1P15_S0IX2 AA35
11A UNCORE_V1P15_S0IX3
Place @ Back Side
AD16 AA36
AD18 DDI_VGG_S0IX1 UNCORE_V1P15_S0IX4 AC32 CC15 1 2 1U_0402_6.3V6K
AD19 DDI_VGG_S0IX2 UNCORE_V1P15_S0IX5 Y30 CC16 1 2 1U_0402_6.3V6K Place @ Edge
AF16 DDI_VGG_S0IX3 UNCORE_V1P15_S0IX7 Y32
AF18 DDI_VGG_S0IX4 UNCORE_V1P15_S0IX8 Y33
AF19 DDI_VGG_S0IX5 UNCORE_V1P15_S0IX9 Y35
AF21 DDI_VGG_S0IX6 UNCORE_V1P15_S0IX10 CC17 1 2 1U_0402_6.3V6K Place @ Back Side
AF22 DDI_VGG_S0IX7 V19

iCLK
AJ19 DDI_VGG_S0IX8 ICLK_GND_OFF2 V18
AG16 DDI_VGG_S0IX15 ICLK_GND_OFF1 CC18 1 2 1U_0402_6.3V6K Place @ Back Side
AG18 DDI_VGG_S0IX9 AM21
AG19 DDI_VGG_S0IX10 DDR_V1P05A_G31 AM33
AG21 DDI_VGG_S0IX11 DDR_V1P05A_G34 AM22 CC19 1 2 22U_0603_6.3V6M

DDR
AG22 DDI_VGG_S0IX12 DDR_V1P05A_G32 AN22 CC20 1 2 22U_0603_6.3V6M Place @ Edge
AG24 DDI_VGG_S0IX13 DDR_V1P05A_G35 AN32
AJ21 DDI_VGG_S0IX14 DDR_V1P05A_G36 AM32
CC21 1 2 1U_0402_6.3V6K AJ22 DDI_VGG_S0IX16 DDR_V1P05A_G33 CC22 1 2 1U_0402_6.3V6K
C
CC23 1 2 1U_0402_6.3V6K AJ24 DDI_VGG_S0IX17 V22 C

PCIe
CC24 1 2 1U_0402_6.3V6K +1.15VALW AK24 DDI_VGG_S0IX18 PCIE_V1P05A_G31 V24 CC25 1 2 1U_0402_6.3V6K
Place @ Back Side 1 2 DDI_VGG_S0IX19 PCIE_V1P05A_G32
CC26 1U_0402_6.3V6K 700mA
AK30 CC27 1 2 1U_0402_6.3V6K Place @ Back Side
AK35 CORE_V1P15_S0IX1 U24

SATA
CC28 1 2 1U_0402_6.3V6K AK36 CORE_V1P15_S0IX2 SATA_V1P05A_G32 U22
Place @ Edge CC29 1 2 1U_0402_6.3V6K AM29 CORE_V1P15_S0IX3 SATA_V1P05A_G31 CC30 1 2 1U_0402_6.3V6K Place @ Back Side
CORE_V1P15_S0IX4
V27 CC31 1 2 1U_0402_6.3V6K Place @ Edge
USB3_V1P05A_G32

USB
AK33 U27
AJ35 FUSE_V1P15_S0IX2 USB3_V1P05A_G31 V29
FUSE_V1P15_S0IX1 USBSSIC_V1P05A_G3
Place @ Back Side CC32 1 2 1U_0402_6.3V6K AM19 N18 CC33 1 2 1U_0402_6.3V6K Place @ Edge
AK21 DDI_V1P15_S0IX2 FUSE3_V1P05A_G5 U19

FUSE
DDI_V1P15_S0IX1 FUSE_V1P05A_G3
CC34 1 2 1U_0402_6.3V6K
Place @ Edge CC35 1 2 1U_0402_6.3V6K 8 OF 13 CC36 1 2 1U_0402_6.3V6K
BSW-MCP-EDS_FCBGA1170 CC37 1 2 1U_0402_6.3V6K

Place @ Back Side

+1.05VALW +1.05V_VNN
JPC4
1 2

JUMP_43X79

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P13-BSW(6/8) PWR1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 13 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


+1.35V_DDR_VDDQ

Place @ Back Side CC38 1 2 1U_0402_6.3V6K


+1.24VALW
Place @ Edge CC39 1 2 22U_0603_6.3V6M @ CC42 1 2 1U_0402_6.3V6K Place @ Back Side
UC1I CHV_MCP_EDS
+1.24V_SOC
+1.35V_DDR_VDDQ +1.24VALW
AN27 V36 CC43 1 2 1U_0402_6.3V6K Place @ Back Side
Place @ Back Side CC40 1 2 1U_0402_6.3V6K AM25 DDRSFR_VDDQ_G_S4 DDI_VDDQ_G31 Y36
DDR_VDDQ_G_S42 DDI_VDDQ_G32

2
D
BE1 T40 CC44 1 2 1U_0402_6.3V6K Place @ Edge RC397 D
DDR_VDDQ_G_S416 MIPI_V1P2A_G32
Place @ Edge CC41 1 2 22U_0603_6.3V6M BE53
DDR_VDDQ_G_S419 MIPI_V1P2A_G31
P40 +1.24V_ICLK_VSFR 0_0603_5%
BJ2
BJ3 DDR_VDDQ_G_S426 Y27 1 2 1U_0402_6.3V6K Place @ Back Side
CC45 V0.2 change

1
BJ49 DDR_VDDQ_G_S427 ICLK_VSFR_G32 Y25
DDR_VDDQ_G_S428 ICLK_VSFR_G31 @
BJ5
DDR_VDDQ_G_S429 +1.24VALW +1.24V_SOC +1.24V_SOC
+1.35V_DDR_VDDQ BH50 P38
+1.35V +1.35V_DDR_VDDQ BH5 DDR_VDDQ_G_S425 CORE_VSFR_G35 V30 CC46 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S424 CORE_VSFR_G36

2
DDR
CC47 1 2 22U_0603_6.3V6M BH49 AC30 CC48 1 2 1U_0402_6.3V6K
CC49 1 2 22U_0603_6.3V6M BH4 DDR_VDDQ_G_S423 PCIE_V1P05A_G31 RC398
DDR_VDDQ_G_S422
CC50 1 2 22U_0603_6.3V6M BE3
DDR_VDDQ_G_S417 +1.24VALW 0_0603_5%
Place @ Edge CC51 1 2 22U_0603_6.3V6M BG51 AF35 Place @ Back Side
JPC6 BG3 DDR_VDDQ_G_S421 CORE_VSFR_G34 AD35 CC52 1 2 1U_0402_6.3V6K
DDR_VDDQ_G_S420 CORE_VSFR_G32

1
1 2 BJ51 AD38
1 2 BJ52 DDR_VDDQ_G_S430 CORE_VSFR_G33 AC36 SHORT@
E1,E2:SDIO Supply DDR_VDDQ_G_S431 CORE_VSFR_G31 +1.24V_SOC +1.24V_SOC
JUMP_43X118 AY10
(1.8V or 3.3V) +3V_+1.8V_SDIO AY44 DDR_VDDQ_G_S414 +1.24VALW
JPC3 AV44 DDR_VDDQ_G_S415 M41 CC53 1 2 1U_0402_6.3V6K Place @ Edge
DDR_VDDQ_G_S413 USBHSIC_V1P2A_G3
1
1 2
2 Place @ Back Side CC54 1 2 1U_0402_6.3V6K AV10
DDR_VDDQ_G_S410 USB_VDDQ_G32
U35 +1.24V_USB_VDDQ_2
BE51 V35 +1.8VALW

USB
JUMP_43X118 AV38 DDR_VDDQ_G_S418 USB_VDDQ_G33 H44
Place @ Edge CC55 1 2 1U_0402_6.3V6K AV16 DDR_VDDQ_G_S412 USB_VDDQ_G31 P41 CC56 1 2 1U_0402_6.3V6K Place @ Back Side
AU36 DDR_VDDQ_G_S411 USBSSIC_V1P2A_G3
AU18 DDR_VDDQ_G_S49 AA29 CC57 1 2 1U_0402_6.3V6K Place @ Edge
G1:LPC IO Supply +3V_+1.8V_LPC DDR_VDDQ_G_S48 USB_V1P8A_G3 +3V_SOC
AN36
(1.8V or 3.3V) AN35 DDR_VDDQ_G_S47 C23
Place @ Edge CC58 1 2 1U_0402_6.3V6K AN19 DDR_VDDQ_G_S46 USB_V3P3A_G32 B22 CC59 1 2 1U_0402_6.3V6K Place @ Edge
AN18 DDR_VDDQ_G_S45 USB_V3P3A_G31 +RTCVCC
AM36 DDR_VDDQ_G_S44 C5
AM18 DDR_VDDQ_G_S43 RTC_V3P3RTC_G52 B6 +3V_SOC
+1.8V_AUDIO DDR_VDDQ_G_S41 RTC_V3P3RTC_G51 D4
AH4,AF4:Audio IO Supply

RTC
E1 RTC_V3P3A_G51 E3 CC60 1 2 1U_0402_6.3V6K Place @ Edge
(1.8V or 1.5V) E2 SDIO_V3P3A_V1P8A_G31 RTC_V3P3A_G52 +1.8VALW
G1 SDIO_V3P3A_V1P8A_G32
Place @ Back Side CC61 1 2 1U_0402_6.3V6K AH4 SDIO_V3P3A_V1P8A_G33 U16 CC62 1 2 1U_0402_6.3V6K Place @ Back Side
AF4 UNCORE_V1P8A_G32 FUSE_V1P8A_G3 +1.05VALW
C +1.8VALW Y18 UNCORE_V1P8A_G31 H10 C

FUSE
AD33 GPIO_V1P8A_G35 FUSE1_V1P05A_G4 G10 CC63 1 2 1U_0402_6.3V6K Place @ Edge
AK18 GPIO_V1P8A_G31 FUSE0_V1P05A_G3 A3
Place @ Back Side CC64 1 2 1U_0402_6.3V6K AF33 GPIO_V1P8A_G33 RSVD_VSS K20
AK19 GPIO_V1P8A_G32 RSVD1 M20
GPIO_V1P8A_G34 RSVD2
Place @ Edge CC65 1 2 1U_0402_6.3V6K
CC66 1 2 1U_0402_6.3V6K +1.24VALW
9 OF 13
BSW-MCP-EDS_FCBGA1170 CC67 1 2 1U_0402_6.3V6K Place @ Back Side

+3V_+1.8V_SDIO CC68 1 2 1U_0402_6.3V6K +1.24VALW


Place @ Edge CC69 1 2 1U_0402_6.3V6K +1.24VALW
+1.8VALW
1 2
SHORT@
RC190 0_0603_5% CC70 1 2 1U_0402_6.3V6K
+1.24V_ICLK_VSFR CC71 1 2 1U_0402_6.3V6K Place @ Back Side
+3V_+1.8V_LPC SHORT@
1 2
+1.8VALW RC265 1 2 0_0402_1% RC258 0_0805_5%
LPC18@ +1.24V_USB_VDDQ_2

RC268 1 2 0_0402_5% CC72 1 2 1U_0402_6.3V6K Place @ Back Side


+3VALW
LPC33@

+1.8V_AUDIO
+1.24V_USB_VDDQ_2
SHORT@
SHORT@ 1 2 +RTCVCC
RC270 1 2 0_0402_1% RC269 0_0805_5%
+1.8VS
CC73 1 2 1U_0402_6.3V6K Place @ Edge
+1.5VS RC255 1 @ 2 0_0402_1%

Need to change to 0603 package 11/16


RC265, RC268, RC270, RC255
B B

NOTE:
+1.24V_MIPI, +1.24V_USBHSIC, +1.24V_USBSSIC are +1.24V Only.
[PDG Rev0p92 P.55]
When SSIC, HSIC & CSI interface is not used, the following pins can be connected to ground:
CSI (T40, P40), USB HSIC (M41), USB SSIC (P41).

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P14-BSW(7/8) PWR2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 14 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


@ @ @ @
CHV_MCP_EDS
UC1J CHV_MCP_EDS UC1K CHV_MCP_EDS UC1L CHV_MCP_EDS UC1M
Power-VSS Power-VSS Power-VSS Power-VSS
F1 W1
AN3 AF38 AN21 AY9 AN33 Y24 C1 VSS18 VSS57 V44
AN29 VSS98 VSS51 AF32 BG30 VSS5 VSS61 AY28 P32 VSS2 VSS102 G30 BH53 VSS17 VSS56 V42
AN25 VSS97 VSS50 AF25 BG27 VSS101 VSS52 AY26 P27 VSS99 VSS53 G28 BH52 VSS16 VSS55 V41
AN24 VSS96 VSS49 AF10 BG24 VSS100 VSS51 AY24 P22 VSS98 VSS52 G26 BH2 VSS15 VSS54 V38
AN16 VSS95 VSS48 AE9 BG20 VSS99 VSS50 AY22 P19 VSS97 VSS51 G22 BH1 VSS14 VSS53
AN14 VSS94 VSS47 AE8 BG19 VSS98 VSS49 AY20 AF24 VSS96 VSS50 G14 BG53 VSS13 V32
AN12 VSS93 VSS46 AE6 BG18 VSS97 VSS48 AW35 N53 VSS1 VSS49 G12 BG1 VSS12 VSS52 V21
D VSS92 VSS45 VSS96 VSS47 VSS95 VSS48 VSS10 VSS51 D
AN11 AE53 BG16 AW27 N51 F5 For layout issue B52 V16
AN1 VSS91 VSS44 AE50 BG14 VSS95 VSS46 AW19 N32 VSS94 VSS47 F35 B2 VSS5 VSS50 U9
AM50 VSS90 VSS43 AE48 BF42 VSS94 VSS45 AM13 N24 VSS93 VSS46 F32 VSS4 VSS49 U8
AM42 VSS89 VSS42 AE46 BF32 VSS93 VSS4 AK29 N22 VSS92 VSS45 F27 A6 VSS48 U6
AM4 VSS88 VSS41 AE45 BF28 VSS92 VSS3 AK22 M9 VSS91 VSS44 F24 A5 VSS2 VSS47 U53
AM38 VSS87 VSS40 AE43 BF27 VSS91 VSS2 AV40 VSS90 VSS43 F19 VSS1 VSS46 U5
AM35 VSS86 VSS39 AE42 BF26 VSS90 VSS44 AV35 K45 VSS42 E51 M24 VSS45 U49
AH44 VSS85 VSS38 AE40 BF22 VSS89 VSS43 AV30 M40 VSS77 VSS41 E35 A7 VSSA VSS44 U48
AM30 VSS60 VSS37 AE14 BF12 VSS88 VSS42 AV27 M35 VSS87 VSS39 E19 BF50 VSS3 VSS43 U46
AM27 VSS84 VSS36 AE12 BE35 VSS87 VSS41 AV24 M27 VSS86 VSS38 D42 BF4 VSS9 VSS42 U45
U25 VSS83 VSS35 AE11 BE19 VSS86 VSS40 AV19 AW13 VSS85 VSS37 D40 BB50 VSS8 VSS41 U43
P10 VSS100 VSS34 AE1 C20 VSS85 VSS39 AV14 M19 VSS3 VSS36 D38 VSS7 VSS40 U42
AM16 VSS99 VSS33 AD44 BD53 VSS103 VSS38 AJ18 M14 VSS84 VSS35 D32 BB4 VSS39 U40
AD4 VSS81 VSS32 AD36 BG7 VSS84 VSS1 AU53 L35 VSS83 VSS34 D27 VSS6 VSS38 U38
AK7 VSS31 VSS30 AC29 BD35 VSS102 VSS37 AU51 L27 VSS82 VSS33 D24 BG47 VSS37
AK50 VSS80 VSS23 AD32 BD27 VSS83 VSS36 AU3 L19 VSS81 VSS32 D16 Y9 VSS11 U33
AK47 VSS79 VSS29 AD30 BD19 VSS82 VSS35 AU1 L1 VSS80 VSS31 D10 Y50 VSS70 VSS35 U32
AK45 VSS78 VSS28 AD21 BD1 VSS81 VSS34 AT9 K50 VSS79 VSS30 J42 Y45 VSS69 VSS34 U30
AK44 VSS77 VSS27 AC38 BC44 VSS80 VSS33 AT51 T47 VSS78 VSS65 C47 Y40 VSS68 VSS33 U29
AK40 VSS76 VSS26 AC35 BC40 VSS79 VSS32 AT45 K4 VSS100 VSS29 C39 Y4 VSS67 VSS32
AK4 VSS75 VSS25 AC33 BC38 VSS78 VSS31 AT36 K36 VSS76 VSS28 C36 Y38 VSS66 U21
AK38 VSS74 VSS24 AC16 BC28 VSS77 VSS30 AT35 K34 VSS75 VSS27 C30 Y29 VSS65 VSS31 U18
AK32 VSS73 VSS22 AB6 BC26 VSS76 VSS29 AT3 K32 VSS74 VSS26 C3 Y22 VSS64 VSS30 U36
AK27 VSS72 VSS21 AB50 BC16 VSS75 VSS28 AT27 K30 VSS73 VSS25 C28 Y21 VSS63 VSS36 U14
AK25 VSS71 VSS20 AB47 BC14 VSS74 VSS27 AT19 K24 VSS72 VSS24 C22 Y19 VSS62 VSS29 U12
AM24 VSS70 VSS19 AB42 BC10 VSS73 VSS26 AT18 K22 VSS71 VSS23 AW41 Y16 VSS61 VSS28 U11
AK16 VSS82 VSS18 AB4 BB35 VSS72 VSS25 AP9 K16 VSS70 VSS4 BJ7 Y14 VSS60 VSS27 T9
AJ53 VSS69 VSS17 AB14 BB27 VSS71 VSS24 AP50 K14 VSS69 VSS22 BJ47 Y10 VSS59 VSS26 P42
AJ51 VSS68 VSS16 AB13 BB19 VSS70 VSS23 AP45 K12 VSS68 VSS21 BJ43 VSS58 VSS23 T14
AJ3 VSS67 VSS15 AB12 BA35 VSS69 VSS22 AP4 J53 VSS67 VSS20 BJ39 P4 VSS25 R1
AJ25 VSS66 VSS14 AB10 BA30 VSS68 VSS21 AN9 M45 VSS66 VSS19 BJ35 L41 VSS22 VSS24
AJ16 VSS65 VSS13 AA53 BA27 VSS67 VSS20 AN8 J38 VSS88 VSS18 BJ31 P36 VSS19 P35
AJ1 VSS64 VSS12 AA38 BA24 VSS66 VSS19 AN6 J35 VSS64 VSS17 BJ27 VSS21 13 OF 13 VSS20
AH9 VSS63 VSS11 AA27 BA19 VSS65 VSS18 AN53 J30 VSS63 VSS16 BJ23 BSW-MCP-EDS_FCBGA1170
AH47 VSS62 VSS10 AA16 B36 VSS64 VSS17 AN51 J27 VSS62 VSS15 BJ19
C AH42 VSS61 VSS9 A47 B28 VSS63 VSS16 AN5 J22 VSS61 VSS14 BJ15 C
AH41 VSS59 VSS8 A43 AY7 VSS62 VSS15 AN49 J19 VSS60 VSS13 BJ11
AH14 VSS58 VSS7 A39 AY51 VSS60 VSS14 AN48 J18 VSS59 VSS12 BG5
AH13 VSS57 VSS6 A31 AY47 VSS59 VSS13 AN46 H8 VSS58 VSS11 BG49
AH12 VSS56 VSS5 A23 AY34 VSS58 VSS12 AN45 E46 VSS57 VSS10 BG40
AH10 VSS55 VSS4 A19 AY32 VSS56 VSS11 AN43 H35 VSS40 VSS9 BG38
AG25 VSS54 VSS3 A15 AY30 VSS55 VSS10 AN42 H27 VSS56 VSS8 BG36
AF47 VSS53 VSS2 A11 AY3 VSS54 VSS9 AN40 H19 VSS55 VSS7 BG35
VSS52 VSS1 AN30 VSS53 VSS8 AN38 M50 VSS54 VSS6 BG34
10 OF 13 AY45 VSS6 VSS7 V25 VSS89 VSS5
BSW-MCP-EDS_FCBGA1170 VSS57 VSS101

11 OF 13 12 OF 13
BSW-MCP-EDS_FCBGA1170 BSW-MCP-EDS_FCBGA1170

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P15-BSW(8/8) GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 15 of 44
5 4 3 2 1
A B C D E

Main Func = XDP +1.8VS +1.8VS_XDP_CD

+1.8VALW +1.8V_XDP_AB RC192 1 NXDP@ 2 0_0402_5%


SHORT@
RC191 1 2 0_0603_5% +1.8VALW

RC235 1 XDP@ 2 0_0402_5%


+1.8V_XDP_AB +1.8VS_XDP_CD
XDP XDP@ NXDP@
+1.8VALW CC89 1 2 .1U_0402_16V7K CONN@ CC90 1 2 .1U_0402_16V7K
@ JXDP1
XDP@ UC4 1 2
2 1 5 1 XDP_H_PREQ#_R 3 1 2 4 XDP_GP_CAMSB08 1 2 SHORT@ GP_CAMSB08
1 VCC NC 1 2 5 3 4 6 GP_CAMSB08 <10,11> 1
CC91 .1U_0402_16V7K XDP_H_PRDY# <12> XDP_H_PRDY# XDP_H_PRDY# RC193 0_0402_5%
2 XDP_H_PREQ#_R CC77 NESD@ 7 5 6 8
XDP_H_PREQ_BUF# 4 A .1U_0402_16V7K XDP_GPIO_DFX0 9 7 8 10 XDP_GP_CAMSB00
<12> XDP_H_PREQ_BUF# Y <11> XDP_GPIO_DFX0 9 10
3 XDP_GPIO_DFX1 11 12 XDP_GP_CAMSB01
GND <11> XDP_GPIO_DFX1 11 12
13 14
74AUP1G34GW_TSSOP5 XDP_GPIO_DFX2 15 13 14 16 XDP_GP_CAMSB02
<11> XDP_GPIO_DFX2 17 15 16 18
XDP_GPIO_DFX3 XDP_GP_CAMSB03
<11> XDP_GPIO_DFX3 17 18
19 20
RC201 1 XDP@ 2 0_0402_5% XDP_GPIO_DFX8 21 19 20 22
<11> XDP_GPIO_DFX8 21 22
1 23 24
NXDP@ 25 23 24 26
CC92 XDP_GPIO_DFX4 27 25 26 28 XDP_GP_CAMSB04
<11> XDP_GPIO_DFX4 27 28
.1U_0402_16V7K XDP_GPIO_DFX5 29 30 XDP_GP_CAMSB05
2 <11> XDP_GPIO_DFX5 29 30
31 32
XDP_GPIO_DFX6 33 31 32 34 XDP_GP_CAMSB06
<11> XDP_GPIO_DFX6 33 34
XDP_GPIO_DFX7 35 36 XDP_GP_CAMSB07
+1.8VALW <11> XDP_GPIO_DFX7 35 36
37 38
@ EC_RSMRST# RC203 1 XDP@ 2 1K_0402_5% XDP_RSMRST# 39 37 38 40
<12,32> EC_RSMRST# 39 40
RC267 1 NXDP@ 2 1K_0402_5% XDP_HLT_BOOT CC101 1 2 .1U_0402_16V7K PMU_PWRBTN# RC204 1 SHORT@2 0_0402_5% XDP_PMU_PWRBTN# 41 42
<12,18> PMU_PWRBTN# 41 42
43 44
PCH_PWROK RC205 1 XDP@ 2 10K_0402_5% XDP_COREPWROK 45 43 44 46 XDP_PMU_PLTRST# RC206 1 XDP@ 2 1K_0402_5% PMU_PLTRST#
<12,32> PCH_PWROK 45 46 PMU_PLTRST# <12,17,22>
GPIO_SUS6 RC233 1 SHORT@2 0_0402_5% XDP_HLT_BOOT 47 48 XDP_PMU_RSTBTN# RC207 1 SHORT@2 0_0402_5% PMU_RSTBTN#
<11> GPIO_SUS6 47 48 PMU_RSTBTN# <12>
Place close to JXDP1.47 49 50
+1.8VS SOC_SMB_DATA RC208 1 SHORT@2 0_0402_5% SMB_XDP_SDA 51 49 50 52 XDP_H_TDO
<11,17> SOC_SMB_DATA 51 52 XDP_H_TDO <12>
@ <11,17> SOC_SMB_CLK SOC_SMB_CLK RC209 1 SHORT@2 0_0402_5% SMB_XDP_SCL 53 54 XDP_H_TRST#
53 54 XDP_H_TRST# <12>
RC210 1 NXDP@ 2 1K_0402_5% XDP_PMU_RSTBTN# CC93 1 2 .1U_0402_16V7K 55 56 XDP_H_TDI
55 56 XDP_H_TDI <12>
XDP_H_TCK 57 58 XDP_H_TMS
<12> XDP_H_TCK 57 58 XDP_H_TMS <12>
59 60 XDP_PRESENT#1 2
59 60
Place close to JXDP1.48 SAMTE_BSH-030-01-L-D-A-TR RC211 SHORT@ 0_0402_5%

@
XDP_PMU_PWRBTN# CC117 1 2 .1U_0402_16V7K

RC212 1 NXDP@ 2 30K_0402_5% XDP@


2 2
RP30
XDP_GP_CAMSB00 1 8 GP_CAMSB00
GP_CAMSB00 <10>
XDP_GP_CAMSB01 2 7 GP_CAMSB01
GP_CAMSB01 <10>
Place close to JXDP1.41 XDP_GP_CAMSB02 3 6 GP_CAMSB02
GP_CAMSB02 <10>
XDP_GP_CAMSB03 4 5 GP_CAMSB03
GP_CAMSB03 <10>
0_0804_8P4R_5%

XDP@
RP31
XDP_GP_CAMSB04 1 8 GP_CAMSB04
GP_CAMSB04 <10>
XDP_GP_CAMSB05 2 7 GP_CAMSB05
3 6 GP_CAMSB05 <10>
XDP_GP_CAMSB06 GP_CAMSB06
GP_CAMSB06 <10>
XDP_GP_CAMSB07 4 5 GP_CAMSB07
GP_CAMSB07 <10>
0_0804_8P4R_5%

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P16-Intel Debug
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 16 of 44
A B C D E
5 4 3 2 1

Main Func = Level Shift POWER ON SEQUENCE


POWER ON SEQUENCE +1.8VALW +3VALW_EC

1
@
RC280

2
G
10K_0402_5%

2
<12> PMU_SLP_S0IX# PMU_SLP_S0IX# 3 1 PCH_SLP_SX#
PCH_SLP_SX# <32>
QC4

D
MESS138W-G_SOT323-3
EC Remove SMI# Function
Vgs: 0.5V~1.5V @
D D
2 1
R7 4.7K_0402_5%
+1.8VALW QC4 follow EC Segguest to DEL
EC_SMI# 1 2
SHORT@ SOC_SMI#
<32> EC_SMI# SOC_SMI# <11>
R31 0_0402_5%
EC Side Pull High +3VALW_EC
2 1 +1.8VALW
R8 4.7K_0402_5%
EC_SCI# 1 2
SHORT@ SOC_SCI#
<32> EC_SCI# SOC_SCI# <11>
R29 0_0402_5%
EC Side Pull High +3VS

+3VALW_EC
+1.8VALW
1

RC286
10K_0402_5%
2
G

QC7 LPC33@
2

PMU_SLP_S3# 3 1 SIO_SLP_S3#
<12> PMU_SLP_S3# SIO_SLP_S3# <32>
PLT_RST# 1 2
S

MESS138W-G_SOT323-3 CC78 NESD@


C C
.1U_0402_16V7K
Vgs: 0.5V~0.9V LPC33@

PMU_SLP_S3# 1 2 SIO_SLP_S3#
R35 0_0402_5%
LPC18@
+1.8VALW
PMU_SLP_S4# 1 2
SHORT@ SIO_SLP_S4#
<12> PMU_SLP_S4# SIO_SLP_S4# <32>
R34 0_0402_5%
+3VS

1
RC27

5
UC5 4.7K_0402_5%
1.8V 1 3.3V

2
NC 4
Y PLT_RST# <28,32>
PMU_PLTRST# 2
<12,16,22> PMU_PLTRST# A

G
NL17SZ07DFT2G_SC70-5

3
SA00004BV00

PLT_RST Buffer
+1.8VALW +3VALW_EC

OK LPC33@
U64 SA00007CX00
1 6
2 VCCA VCCB 5 R5 1 2 4.7K_0402_5%
GND EO 4 +1.8VALW
B 3 SERIRQ B
<12> LPC_SOC_SERIRQ A4 B4 SERIRQ <32>
G2129TL1U_SC70-6
LPC33@
SMBUS
1 R23 2 EC/Thermal Sensor/Touch Pad
0_0402_5%
LPC18@

+1.8VALW
R6115 2.2K_0402_5%
+1.8VALW +3VALW_EC 1 2 SOC_SMB_CLK +3VALW
R6116 2.2K_0402_5%
1 2 SOC_SMB_DATA SOC_SMB_DATA_L R1184 1 2 1K_0402_5%
1

SOC_SMB_CLK_L R1183 1 2 1K_0402_5%


@
RC372
2
G

10K_0402_5%
+1.8VALW +3VS
2

PMU_BATLOW# 3 1 EC_BATLOW#
<12> PMU_BATLOW# EC_BATLOW# <32>
QC25
S

MESS138W-G_SOT323-3
Vgs: 0.5V~1.5V
@
RC354 1 @ 2 0_0402_5% Pull High at EC side
5

5
G
G

SOC_SMB_CLK 4 3 SOC_SMB_CLK_L 3 4
EC_SMB_CK2 <19,29,32>
D

S
S

Q2516A Q2517A
2

DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6
G
G

SOC_SMB_DATA 1 6 SOC_SMB_DATA_L 6 1
EC_SMB_DA2 <19,29,32>
D

S
S

Q2516B Q2517B DDR(18)


DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6
EC(32) @
0722: Refer from CRB2.2, change to 2.2K, TP(29) @
Thermal sensor @
A SOC_SMB_CLK A
SOC_SMB_CLK <11,16>
Q2516 change to SB000016K00 SOC_SMB_DATA
SOC_SMB_DATA <11,16>
+1.8VALW
Vgs = 0.8V~1.1V
2
G

RC369
0_0402_5%
<12> PMU_AC_PRESENT
PMU_AC_PRESENT 3 1 AC_PRESENT_LS 1 @ 2 ACIN
ACIN <32,34,40>
Security Classification Compal Secret Data Compal Electronics, Inc.
QC15 2014/11/10 2015/11/25
S

Issued Date Title


MESS138W-G_SOT323-3 Deciphered Date
Vgs: 0.5V~1.5V P17-Level Shift-1
@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 17 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = Level Shift


eDP Control
RP1
SOC_DDI1_ENBKL 8 1
SOC_DDI1_ENVDD 7 2
D SOC_DDI1_PWM 6 3 D
5 4

100K_0804_8P4R_5%

+1.8VALW
1 2
+3VS
4.7K_0402_5% R9

5
U69
1 WLAN

P
NC 4 INVT_PWM
2 Y INVT_PWM <20> +1.8VALW
SOC_DDI1_PWM
<10> SOC_DDI1_PWM A

G
NL17SZ07DFT2G_SC70-5 CC100 .1U_0402_16V7K

3
SA00004BV00 1 2

RC318 10K_0402_5%
+1.8VALW 1 2 UC12 RC319 10K_0402_5%
1 5 1 2
NC VCC +3VS_WLAN_NGFF
PMU_SUSCLK0 2
<12> PMU_SUSCLK0 IN A 4 PMC_SUSCLK
Y PMC_SUSCLK <28>
3
C GND C
SOC_DDI1_ENBKL 1 2
SHORT@ PANEL_BKLEN
<10> SOC_DDI1_ENBKL PANEL_BKLEN <32>
R28 0_0402_5% NL17SZ07DFT2G_SC70-5
SOC_DDI1_ENVDD 1 2
SHORT@ ENVDD
<10> SOC_DDI1_ENVDD ENVDD <20>
R30 0_0402_5%

PBTN_OUT# 1 2
SHORT@ PMU_PWRBTN#
<32> PBTN_OUT# PMU_PWRBTN# <12,16>
R27 0_0402_5%

EC_LID_OUT# 1 2
SHORT@ SOC_LID_OUT#
<32> EC_LID_OUT# SOC_LID_OUT# <10>
R26 0_0402_5%

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P18-Level Shift-2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 18 of 44
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

Main Func = DIMM

+1.35V

H=4mm @

1
+DIMM1_VREF_DQ
RD3
+1.35V +1.35V 470_0402_5%

1
JDIMM1
2
2-3A to 1 DIMMs/channel

2
3 VREF_DQ VSS 4 DDR_M0_D4
VSS DQ4

2.2U_0402_6.3V6M

0.1U_0402_10V7K
D DDR_M0_D0 5 6 DDR_M0_D5 DDR_M0_RST# 1 2
SHORT@ D
7 DQ0 DQ5 8 DDR_M0_DRAMRST# <8>
DDR_M0_D1 RD5 0_0402_1%
9 DQ1 VSS 10 DDR_M0_DQS#0 Footprint Check OK
Populate RD1, De-Populate RD7 for Intel DDR3 1 1 VSS DQS0#

CD1

CD2
DDR_M0_DM0 11 12 DDR_M0_DQS0
VREFDQ multiple methods M1 @ 13 DM0 DQS0 14
Populate RD7, De-Populate RD1 for Intel DDR3 DDR_M0_D2 15 VSS VSS 16 DDR_M0_D6
2 2 DDR_M0_D3 17 DQ2 DQ6 18 DDR_M0_D7
VREFDQ multiple methods M3 DQ3 DQ7
19 20
DDR_M0_D8 21 VSS VSS 22 DDR_M0_D12
DDR_M0_D9 23 DQ8 DQ12 24 DDR_M0_D13
25 DQ9 DQ13 26
<8> DDR_M0_DM[4..7] 27 VSS VSS 28
DDR_M0_DQS#1 DDR_M0_DM1
<8> DDR_M0_DM[0..3] 29 DQS1# DM1 30
DDR_M0_DQS1 DDR_M0_RST#
31 DQS1 RESET# 32 +1.35V +DIMM1_VREF_DQ
<8> DDR_M0_DQS[0..7] 33 VSS VSS 34
DDR_M0_D10 DDR_M0_D14 1 ESD@
<8> DDR_M0_DQS#[0..7] 35 DQ10 DQ14 36 1 2
DDR_M0_D11 DDR_M0_D15 CD3
37 DQ11 DQ15 38
<8> DDR_M0_D[0..31]
All VREF traces should VSS VSS
0.1U_0402_10V7K R1027
have 10 mil trace width DDR_M0_D16 39 40 DDR_M0_D20 4.7K_0402_1% 1
<8> DDR_M0_D[32..63] 41 DQ16 DQ20 42 2 1 2
DDR_M0_D17 DDR_M0_D21
43 DQ17 DQ21 44 R1028 C1076
<8> DDR_M0_MA[0..15] 45 VSS VSS 46
DDR_M0_DQS#2 DDR_M0_DM2 4.7K_0402_1% .1U_0402_16V7K
DDR_M0_DQS2 47 DQS2# DM2 48 2
49 DQS2 VSS 50 DDR_M0_D22
DDR_M0_D18 51 VSS DQ22 52 DDR_M0_D23
Layout Note: Note: DDR_M0_D19 53 DQ18 DQ23 54 CAD NOTE
DQ19 VSS
Place near JDIMM1 Check voltage tolerance of DDR_M0_D24
55
57 VSS DQ28
56
58
DDR_M0_D28
DDR_M0_D29
PLACE THE CAP NEAR TO +1.35V +DIMM1_VREF_CA
DDR_M0_D25 59 DQ24 DQ29 60 DIMM RESET PIN
VREF_DQ at the DIMM socket 61 DQ25
VSS
VSS
DQS3#
62 DDR_M0_DQS#3 1 2
DDR_M0_DM3 63 64 DDR_M0_DQS3 R1029
65 DM3 DQS3 66 4.7K_0402_1%
VSS VSS 1
DDR_M0_D26 67 68 DDR_M0_D30 1 2
+1.35V DDR_M0_D27 69 DQ26 DQ30 70 DDR_M0_D31 R1030 C1078
71 DQ27 DQ31 72 4.7K_0402_1%
VSS VSS .1U_0402_16V7K
2
0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
DDR_M0_CKE0 73 74 DDR_M0_CKE1
<8> DDR_M0_CKE0 75 CKE0 CKE1 76 DDR_M0_CKE1 <8>
C 1 1 1 1 1 1 1 1 VDD VDD C
77 78 DDR_M0_MA15
NC A15
CD4

CD5

CD6

CD7

CD8

CD9

CD10

CD11

DDR_M0_BS2 79 80 DDR_M0_MA14
<8> DDR_M0_BS2 81 BA2 A14 82
2 2 2 2 2 2 2 2 DDR_M0_MA12 83 VDD VDD 84 DDR_M0_MA11
DDR_M0_MA9 85 A12/BC# A11 86 DDR_M0_MA7
87 A9 A7 88 DDR_M0_ODT0
89 VDD VDD 90 DDR_M0_ODT0 <8>
DDR_M0_MA8 DDR_M0_MA6
DDR_M0_MA5 91 A8 A6 92 DDR_M0_MA4 DDR_M0_ODT1
93 A5 A4 94 DDR_M0_ODT1 <8>
DDR_M0_MA3 95 VDD VDD 96 DDR_M0_MA2
A3 A2 V0.2 change
DDR_M0_MA1 97 98 DDR_M0_MA0
99 A1 A0 100
+1.35V DDR_M0_CLK0 101 VDD VDD 102 DDR_M0_CLK1
<8> DDR_M0_CLK0 103 CK0 CK1 104 DDR_M0_CLK1 <8>
DDR_M0_CLK#0 DDR_M0_CLK#1
<8> DDR_M0_CLK#0 105 CK0# CK1# 106 DDR_M0_CLK#1 <8>
DDR_M0_MA10 107 VDD VDD 108 DDR_M0_BS1
A10/AP BA1 DDR_M0_BS1 <8>
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

330U_D2_2.5V_R6M

DDR_M0_BS0 109 110 DDR_M0_RAS#


<8> DDR_M0_BS0 111 BA0 RAS# 112 DDR_M0_RAS# <8>
DDR_M0_WE# 113 VDD VDD 114 DDR_M0_CS#0
1 <8> DDR_M0_WE# WE# S0# DDR_M0_CS#0 <8>
1 1@ 1 1 1@ 1 1 1 DDR_M0_CAS# 115 116 DDR_M0_ODT0
<8> DDR_M0_CAS# CAS# ODT0
CD16

CD17

CD12

CD18

CD19

CD20

CD13

CD14

CD15

+ 117 118
DDR_M0_MA13 119 VDD VDD 120 DDR_M0_ODT1
DDR_M0_CS#1 121 A13 ODT1 122 +DIMM1_VREF_CA
2 2 2 2 2 2 2 2 2 <8> DDR_M0_CS#1 123 S1# NC 124
125 VDD VDD 126 1 2
@ 127 TEST VREF_CA 128
VSS VSS

2.2U_0402_6.3V6M

0.1U_0402_10V7K
DDR_M0_D32 129 130 DDR_M0_D36 SHORT@
DDR_M0_D33 131 DQ32 DQ36 132 DDR_M0_D37 RD4
133 DQ33 DQ37 134 0_0402_1%
VSS VSS 1 1

CD21

CD22
DDR_M0_DQS#4 135 136 DDR_M0_DM4
DDR_M0_DQS4 137 DQS4# DM4 138
+1.35V 139 DQS4 VSS 140 DDR_M0_D38
DDR_M0_D34 141 VSS DQ38 142 DDR_M0_D39 2 2
DDR_M0_D35 143 DQ34 DQ39 144
DQ35 VSS
2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

10P_0402_25V8K

10P_0402_25V8K

10P_0402_25V8K

10P_0402_25V8K

10P_0402_25V8K

1 1 1 1 1 1 1 1 1 1 145 146 DDR_M0_D44


DDR_M0_D40 147 VSS DQ44 148 DDR_M0_D45
RF@ RF@ RF@ RF@ RF@ RF@ RF@ RF@ RF@ CD33
RF@ - CD42 DQ40 DQ45
CD33

CD34

CD35

CD36

CD37

CD38

CD39

CD40

CD41

CD42

B FOR RF DDR_M0_D41 149 150 B


151 DQ41 VSS 152 DDR_M0_DQS#5
2 2 2 2 2 2 2 2 2 2 DDR_M0_DM5 153 VSS DQS5# 154 DDR_M0_DQS5
155 DM5 DQS5 156
DDR_M0_D42 157 VSS VSS 158 DDR_M0_D46
DDR_M0_D43 159 DQ42 DQ46 160 DDR_M0_D47
161 DQ43 DQ47 162
DDR_M0_D48 163 VSS VSS 164 DDR_M0_D52
DDR_M0_D49 165 DQ48 DQ52 166 DDR_M0_D53
167 DQ49 DQ53 168
DDR_M0_DQS#6 169 VSS VSS 170 DDR_M0_DM6
Layout Note: DQS6# DM6
DDR_M0_DQS6 171 172
Place near JDIMM1.203,204 173 DQS6 VSS 174 DDR_M0_D54
DDR_M0_D50 175 VSS DQ54 176 DDR_M0_D55
DDR_M0_D51 177 DQ50 DQ55 178
179 DQ51 VSS 180 DDR_M0_D60
DDR_M0_D56 181 VSS DQ60 182 DDR_M0_D61
DDR_M0_D57 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_M0_DQS#7
DDR_M0_DM7 187 VSS DQS7# 188 DDR_M0_DQS7
+0.675VS 189 DM7 DQS7 190
DDR_M0_D58 191 VSS VSS 192 DDR_M0_D62
DDR_M0_D59 193 DQ58 DQ62 194 DDR_M0_D63
195 DQ59 DQ63 196
RD61 2 10K_0402_5% 197 VSS VSS 198
SA0 EVENT#
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

199 200
+3VS VDDSPD SDA EC_SMB_DA2 <17,29,32>
1 1 1 1 1 1 1 2 201 202
SA1 SCL EC_SMB_CK2 <17,29,32>
CD24

CD25

CD26

CD27

CD28

CD29

RD7 10K_0402_5% +0.675VS


203 204 +0.675VS
VTT VTT
2.2U_0402_6.3V6M

1 1 1
0.1U_0402_10V7K

0.1U_0402_10V7K

@ 205 206
2 2 2 2 2 2 GND1 GND2
CD30

CD31

CD47

207 208
BOSS1 BOSS2
2 2 2
AS0A621-J4RB-7H
CONN@
Channel A
A A
+0.675VS

+3VS +1.35V <Address: SA1:SA0=00 (A0H)>


2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

10P_0402_25V8K

10P_0402_25V8K

1 1 1 1 CD62
RF@ RF@ RF@ RF@CD43 - CD46 1 2
DIMM_1 STD H:4mm
CD43

CD45

CD44

CD46

FOR RF
22U_0603_6.3V6M
2 2 2 2 ESD@

ESD solution
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P19-DDRIII DIMMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 19 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = eDP LCD PWR CTRL

+LCDVDD +3VS
LCD Connector
CX7
UX4 @
1 5 1 2 1 2
+3VS OUT IN RX25 0_0402_5% 40
DX1 +5VS_TOUCH 40
2 39
RX10 GND 4.7U_0805_25V6-K 2 1 38 39
DISPOFF# TOUCH_RST#_R
1 2 3 4 <32> BKOFF# 37 38
ENVDD_R TS_INT#
OC EN 37

1
10K_0402_5% 2 36
RB751V-40_SOD323-2 USB20_Hub_P1 35 36
10K_0402_5% <26> USB20_Hub_P1 34 35
D SY6288C20AAC_SOT23-5 CX48 USB20_Hub_N1 D
RX9 <26> USB20_Hub_N1 33 34
SA000079400 1
0.1U_0402_10V7K
32 33
+3VS_CAM

2
ESD@ USB20_CAM_P2_R 31 32
USB20_CAM_N2_R 30 31
2 1
SHORT@ ENVDD_R 29 30
<18> ENVDD 28 29
RX7 0_0402_5% MIC_DATA
<23> MIC_DATA 27 28
MIC_CLK
<23> MIC_CLK 26 27
MIC_GND
25 26
EMI@ 24 25
LX6 23 24
1 2 USB20_CAM_P2_R 22 23
<12> USB20_P2 21 22
DISPOFF#
+LCDVDD +LCDVDD_CONN 20 21
4 3 <18> INVT_PWM 19 20
W=60mils USB20_CAM_N2_R
<12> USB20_N2 1 2 0.1U_0402_10V7K CPU_EDP_P1_C 18 19
EDP_CPU_LANE_P1 CX45
1 2 <10> EDP_CPU_LANE_P1 1 2 0.1U_0402_10V7K CPU_EDP_N1_C 17 18
+LCDVDD_CONN MCM1012B900F06BP_4P EDP_CPU_LANE_N1 CX47
<10> EDP_CPU_LANE_N1 16 17
FBMA-L11-201209-221LMA30T_0805
LX1 EDP_CPU_LANE_P0 CX42 1 2 0.1U_0402_10V7K CPU_EDP_P0_C 15 16
<10> EDP_CPU_LANE_P0 15

0.1U_0402_10V7K
CX11

10U_0805_10V6K
1 2 EDP_CPU_LANE_N0 CX46 1 2 0.1U_0402_10V7K CPU_EDP_N0_C 14
<10> EDP_CPU_LANE_N0 13 14
1 1 RX22 0_0402_5%
13

CX8
@ EDP_CPU_AUX# CX43 1 2 0.1U_0402_10V7K CPU_EDP_AUX#_C 12
1 2 <10> EDP_CPU_AUX# 1 2 0.1U_0402_10V7K CPU_EDP_AUX_C 11 12
EDP_CPU_AUX CX44
<10> EDP_CPU_AUX 10 11
RX21 0_0402_5% LCD_TEST
2 2 SS table @
<32> LCD_TEST
EDP_HPD 9 10
9
DBC_EN_R 8
7 8
6 7
Css Tss 6
5
4 5
0.1uF 100mS W=80mils +LCDVDD_CONN 4
3 42
2 3 G2 41
10nF 10mS +INV_PWR_SRC 2 G1
1
1
1nF 1mS W=60mils JEDP
Open or 1mS CONN@
C tied to DBC_EN 1 2
SHORT@ DBC_EN_R C
<32> DBC_EN
VIN RX19 0_0402_1%

INVT_PWM
@
RX23
0_0402_5%

LCD backlight PWR CTRL

1
RX26
D2401
RX20 0_0402_1% 100K_0402_5% @
1 2 2 R5205 1 TS_INT#
SHORT@ <29,32> LID_SW#
MIC_GND 1 2 GND 33_0402_5%

2
RB751V-40_SOD323-2

B+ +INV_PWR_SRC

60mil Note: Follow BDW design V0.2 change


FX2
60mil 2 1

1.5A_24V_MINISMDC150F/24~D
1 1
CX10 CX5
0.1U_0603_25V7K 0.1U_0603_25V7K
2 2 * Touch Screen Panel +5VS_TOUCH

1
+5VS +5VS_TOUCH 100K_0402_5%
RX28 RX24
1 2
SHORT@

2
B @ B
0_0603_5% 1 2 TOUCH_RST#_R
Webcam PWR CTRL +3VS
<32> TOUCH_RST#
RX1 0_0402_5%
@
1 @ 2
RX29 0_0603_5%
+3VS +3VS_CAM
+1.8VALW +5VS_TOUCH
RX27

1
1 2

1
RX42
0_0603_5% RX41 10K_0402_5%
10K_0402_5% @

2
G
SHORT@ @

2
2
3 1 TS_INT#
<11> SOC_TS_INT#
QE12

D
MESS138W-G_SOT323-3
+1.8VALW @

Closed to JEDP
1

@
+3VS
10K_0402_5%
R3406
1
2

@
RT17
<10> EDP_CPU_HPD
100K_0402_5%
2

CPU_EDP_AUX#_C
CPU_EDP_AUX_C
A A
1

D
Q9 2 EDP_HPD @
2N7002K_SOT23-3 G RT18
1

S 100K_0402_5%
R3405
3

100K_0402_5%
2

AUX termination Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

P20-LVDS/Webcam/Touch
WWW.AliSaler.Com 5 4 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2
Date:
Document Number

LA-C571P
Tuesday, June 16, 2015
1
Sheet 20 of 44
Rev
1.0
5 4 3 2 1

Main Func = HDMI

46@ ROYALTY HDMI W/LOGO


Part Number Description

RO0000002HM HDMI W/Logo:RO0000002HM

W=40mils
D Place close to JHDMI1 D

R2358 1 2 8.2_0402_1%
+VDISPLAY_VCC

LX2 @ TMDS_L_TXCN

2
TMDS_TXCN 1 2 +5VS
2 1
RC70
CX12 2 1 0.1U_0402_10V7K TMDS_TXCN R1071 1 2 470_0402_1% 150_0402_1% FX1
<10> HDMI_CLK-
CX13 2 1 0.1U_0402_10V7K TMDS_TXCP R1072 1 2 470_0402_1% TMDS_TXCP 4 3 1.5A_6V_1206L150PR~D

10U_0603_6.3V6M
0.1U_0402_16V7K
<10> HDMI_CLK+ 1 1

CX21
TMDS_L_TXCP

1
CX14 2 1 0.1U_0402_10V7K TMDS_TX0N R1073 1 2 470_0402_1% HCM1012GH900BP_4P +3VS CX22
<10> HDMI_TX0-
CX15 2 1 0.1U_0402_10V7K TMDS_TX0P R1074 1 2 470_0402_1% R2359 1 2 8.2_0402_1%
<10> HDMI_TX0+ 2 2

HDMI_GND
CX16 2 1 0.1U_0402_10V7K TMDS_TX1N R1075 1 2 470_0402_1%
<10> HDMI_TX1-
CX17 2 1 0.1U_0402_10V7K TMDS_TX1P R1076 1 2 470_0402_1% R2360 1 2 8.2_0402_1%
<10> HDMI_TX1+

1
CX18 2 1 0.1U_0402_10V7K TMDS_TX2N R1077 1 2 470_0402_1% @ RX12
<10> HDMI_TX2-
CX19 2 1 0.1U_0402_10V7K TMDS_TX2P R1078 1 2 470_0402_1% LX3 @ TMDS_L_TX0N 10K_0402_5%
<10> HDMI_TX2+

2
TMDS_TX0N 1 2
RC71

2
150_0402_1% JHDMI1

3
TMDS_TX0P 4 3 HDMI_HPLUG 19
5 G
D
Q14A TMDS_L_TX0P 18 HP_DET
+3VS

1
S DMN66D0LDW-7_SOT363-6 HCM1012GH900BP_4P 17 +5V
R2361 1 2 8.2_0402_1% CPU_DPB_CTRLDAT_R 16 DDC/CEC_GND

4
CPU_DPB_CTRLCLK_R 15 SDA
SCL

1
@ 14
+1.8VALW R122 R2362 1 2 8.2_0402_1% 13 Reserved
100K_0402_5% TMDS_L_TXCN 12 CEC
11 CK- 23
CK_shield GND3
1

@ LX4 @ TMDS_L_TX1N TMDS_L_TXCP 10 22

2
CK+ GND2

2
R376 TMDS_TX1N 1 2 TMDS_L_TX0N 9 21
RC72 8 D0- GND1 20
10K_0402_5% D0_shield GND0
150_0402_1% TMDS_L_TX0P 7
TMDS_TX1P 4 3 TMDS_L_TX1N 6 D0+
2

TMDS_L_TX1P 5 D1-
<10> SOC_DP0_HPD#

1
HCM1012GH900BP_4P TMDS_L_TX1P 4 D1_shield
C D1+ C
6

R2363 1 2 8.2_0402_1% TMDS_L_TX2N 3


Q14B
D
G 2 HDMI_HPLUG 2 D2-
DMN66D0LDW-7_SOT363-6 S TMDS_L_TX2P 1 D2_shield
D2+
1
1

R121 R2364 1 2 8.2_0402_1% C-K_96067-3K28-192-124


100K_0402_5% CONN@

HCM1012GH900BP_4P TMDS_L_TX2P
2

2
TMDS_TX2P 4 3
RC73
150_0402_1%
TMDS_TX2N 1 2
TMDS_L_TX2N

1
LX5 @
R2365 1 2 8.2_0402_1%

+1.8VALW
RP15
SOC_DP0_CTRL_DATA 5 4 +VDISPLAY_VCC
SOC_DP0_CTRL_CLK 6 3
CPU_DPB_CTRLDAT_R 7 2
CPU_DPB_CTRLCLK_R 8 1

2.2K_0804_8P4R_5%
B B

Level Shifter +5VALW

DP0_CTRL_CLK_L RC12 1 2 2.2K_0402_5%


DP0_CTRL_DATA_L RC13 1 2 2.2K_0402_5%

+1.8VALW +VDISPLAY_VCC

5
G
5
G

SOC_DP0_CTRL_CLK 4 3 DP0_CTRL_CLK_L 3 4 CPU_DPB_CTRLCLK_R


<10> SOC_DP0_CTRL_CLK
S

Q57A
D

PJT138KA_SOT363-6
DMN63D8LDW-7_SOT363-6
Q58B
Q57 change to SB000016K00 2
Vgs = 0.8V~1.1V
G
2
G

A A
SOC_DP0_CTRL_DATA 1 6 DP0_CTRL_DATA_L 6 1 CPU_DPB_CTRLDAT_R
<10> SOC_DP0_CTRL_DATA
S

Q57B
D

PJT138KA_SOT363-6
DMN63D8LDW-7_SOT363-6
Q58A

V0.2 change Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P21-HDMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 21 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = eMMC


EMMC

EMMC@
+3VALW R160 +3VS_EMMC
0_0603_5%
1 2

Imax=300mA
D D
EMMC@
+1.8VALW R161 +1.8VS_EMMC
0_0603_5%
1 2

+3VS_EMMC
+1.8VS_EMMC

1 C92 1 1 C94 R162 1 2 47K_0402_1% EMMC_1_CMD_R


4.7U_0402_6.3V6M @ 68P_0402_50V8J
V0.2 change C93 EMMC@
.1U_0402_16V7K
2 2 2
EMMC@ +1.8VS_EMMC
U28 EMMC@
C14 E6 EMMC@
D1 NC VCC F5
NC VCC 1 C95 1 1 C97
D2 J10 4.7U_0402_6.3V6M @ 68P_0402_50V8J
D3 NC VCC K9 C96
D4 NC VCC C6 .1U_0402_16V7K
D12 NC VCCQ M4 2 2 2 EMMC_1_CLK_R C98 1@ 2 18P_0402_50V8J
D13 NC VCCQ N4 EMMC_1_RST#_BUF C252 1@ 2 .1U_0402_16V7K
D14 NC VCCQ P3 +EMMC_VDDI EMMC@
E1 NC VCCQ P5 EMMC@
E2 NC VCCQ C2 C99 1 2 .1U_0402_16V7K
E3 NC VDDi
E12 NC M6 1
NC CLK
EMMC_1_CLK_R R171 EMMC@ 2 10_0402_5% EMMC_1_CLK
EMMC_1_CLK <10>
E13 M5 EMMC_1_CMD_R R172 1 2 10_0402_5% EMMC_1_CMD
E14 NC CMD A3 1 EMMC_1_CMD <10>
NC DAT0
EMMC_1_D0_R R173 EMMC@ 2 0_0402_5% EMMC_1_D0
EMMC_1_D0 <10>
F1 A4 EMMC_1_D1_R R174 1 EMMC@ 2 0_0402_5% EMMC_1_D1
NC DAT1 EMMC_1_D1 <10>
F2 A5 EMMC_1_D2_R R175 1 EMMC@ 2 0_0402_5% EMMC_1_D2
NC DAT2 EMMC_1_D2 <10>
F3 B2 EMMC_1_D3_R R176 1 EMMC@ 2 0_0402_5% EMMC_1_D3
NC DAT3 EMMC_1_D3 <10>
F12 B3 EMMC_1_D4_R R177 1 EMMC@ 2 0_0402_5% EMMC_1_D4
C
F13 NC DAT4 B4 EMMC_1_D4 <10> C
EMMC_1_D5_R R178 1 EMMC@ 2 0_0402_5% EMMC_1_D5
F14 NC DAT5 B5 1 EMMC_1_D5 <10>
NC DAT6
EMMC_1_D6_R R179 EMMC@ 2 0_0402_5% EMMC_1_D6
EMMC_1_D6 <10>
G1 B6 EMMC_1_D7_R R180 1 EMMC@ 2 0_0402_5% EMMC_1_D7
NC DAT7 EMMC_1_D7 <10>
G2 EMMC@
G12 NC A6
NC VSS EMMC@
G13 E7
G14 NC VSS G5
H1 NC VSS H10
H2 NC VSS J5
H3 NC VSS K8
H12 NC VSS C4
H13 NC VSSQ N2
H14 NC VSSQ N5
J1 NC VSSQ P4 +1.8VALW +1.8VALW
J2 NC VSSQ P6
J3 NC VSSQ
NC

1
J12 H5 EMMC_1_DS R181 1 @ 2 0_0402_5% EMMC_1_RCLK
NC DS EMMC_1_RCLK <10> +1.8VALW
J13 K5 EMMC_1_RST#_BUF
NC RST_n @ R2560 @ R2559
J14 E9 EMMC_VSF1 @TP T32 10K_0402_5% 10K_0402_5%
NC VSF

5
K1 E10 EMMC_VSF2 @TP T33 @ U49

2
K2 NC VSF F10 EMMC_VSF3 1

P
NC VSF @TP T34 NC
K3 4 EMMC_1_RST#_BUF
K12 NC G10 R326 1 @ 2 0_0402_5% 2 Y
NC RFU <11> EMMC_1_RST# A

G
K13 K10
K14 NC RFU E8 NL17SZ07DFT2G_SC70-5

3
L1 NC RFU E5 R328 1 2 0_0402_5% SA00004BV00
L2 NC
NC
RFU
RFU
G3 Reserved for TOSHIBA eMMC <12,16,17> PMU_PLTRST#
L3 A7 EMMC@
L12 NC RFU K7
L13 NC RFU K6
L14 NC RFU P7 R343 1 2 0_0402_5%
M1 NC RFU P10
M2 NC RFU
EMMC@
B M3 NC C5 B
M7 NC NC A1
M8 NC NC A2
M9 NC NC A8
M10 NC NC A9
M11 NC NC A10
M12 NC NC A11
M13 NC NC A12
M14 NC NC A13
N1 NC NC A14
N3 NC NC B1
N6 NC NC B7
N7 NC NC B8
N8 NC NC B9
N9 NC
NC
NC
NC
B10 U49 Change SA00004BV00(NL17SZ07DFT2G_SC70-5) to from (NL17SZ07DFT2G_SC70-5)
N10 B11
N11 NC NC B12
N12 NC NC B13
N13 NC NC B14
N14 NC NC C1
P1 NC NC C3
P2 NC NC C7
P8 NC NC C8
P9 NC NC C9
P11 NC NC C10
P12 NC NC C11
P13 NC NC C12
P14 NC NC C13
NC NC

THGBMBG8D4KBAIR_VFBGA153

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P22-eMMC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 22 of 44
5 4 3 2 1

WWW.AliSaler.Com
5 4 3 2 1

Main Func = Codec

+1.8VS +1.5VS +DVDD-IO +1.8VS +1.5VS +CODEC_AVDD2 JACK_PLUG Delay circutis


RA11 1 @ 2 0_0402_5% RA8 1 @ 2 0_0402_5%
+3VS +3VS

1 2
SHORT@ 1 2
SHORT@
RA12 0_0402_5% RA9 0_0402_5%

1
JACK_SENSE#
RA1 RA2
@ 100K_0402_5% @ 100K_0402_5%
+5V_PVDD +5VS +5V_AUDIO

2
SHORT@

3
+3VS

CA71
4.7U_0603_6.3V6K

CA51
0.1U_0402_16V7K
2 1 1
5
D
RV54 0_0805_5% 1
G QA5A
D +5V_AUDIO +5VS D
S DMN66D0LDW-7_SOT363-6
QA5B @

4
6
2 DMN66D0LDW-7_SOT363-6
2 1 1

0.1U_0402_16V7K
CA60

4.7U_0603_6.3V6K
CA59
RV59 2 1 0_0603_5% JACK_PLUG# 1 2 2
D
SHORT@ G

S @
+3VS RA3 @

1
2 2 10K_0402_5% 1 1
CA57,CA58 close 0.1U_0402_16V7K 1 1 Digital power for HDA link
CA58

4.7U_0603_6.3V6K
CA57
1 +CODEC_AVDD2 @ @
to UA1 pin1 (Bay Trail M -- Pin9 -->1.5VS) CA61
10U_0603_6.3V6M
CA1
10U_0603_6.3V6M 2
CA2
2 10U_0603_6.3V6M
2 2
UA1 2
1 26
DVDD AVDD1 +5V_PVDD
40 1 1
9 AVDD2 CA53 CA54
+DVDD-IO DVDD-IO 4.7U_0603_6.3V6K 0.1U_0402_16V7K CA71, CA51 place close to Pin 26
36
CPVDD 41 2 2 0721: pop all components for this portions
6 PVDD1 46
<11> HDA_BITCLK_AUDIO BCLK PVDD2 +5V_PVDD
1 2 1
+3VS

CA55
4.7U_0603_6.3V6K

CA56
0.1U_0402_16V7K
<11> HDA_SDOUT_AUDIO 5 RA155 EMI@ 100K_0402_5% 1
SDATA-OUT 13 1 2 JACK_SENSE#
10 HP/LINE1 JD(JD1) 14 RA34 200K_0402_1% JACK_PLUG# RA4 1 2 0_0402_5% JACK_SENSE#
<11> HDA_SYNC_AUDIO SYNC MIC2/LINE2 JD(JD2) 2
15
RA130 1 EMI@ 2 75_0402_5% 8 SPDIFO/FRONT JD(JD3)/GPIO3 2
RA34 place close to UA1
NEMI@
<11> HDA_SDIN0
11
SDATA-IN
RA155 Reserve for ESD Request Reserve for cancel Delay circutis
<11> HDA_RST_AUDIO# RESETB
R2355 32 HPOUT-L
0_0402_5% HPOUT-L(PORT-I-L) 33 HPOUT-R
2 1 HDA_BITCLK_AUDIO LINE1-R 21 HPOUT-R(PORT-I-R)
LINE1-L 22 LINE1-R(PORT-C-R)
1 LINE1-L(PORT-C-L)
NEMI@ Line1-VREFO-R 30
CA21 Line1-VREFO-L 31 LINE1-VREFO-R 42 INT-SPK-L+ Change to 0 ohm from short pad
22P_0402_50V8J 23 LINE1-VREFO-L SPK-OUT-L+ 43 INT-SPK-L-
2 24 LINE2-R(PORT-E-R) SPK-OUT-L- 45 INT-SPK-R+
LINE2-L(PORT-E-L) SPK-OUT-R+ 44 INT-SPK-R- RA29 1 2 0_0603_5%
SPK-OUT-R-
16 RA30 1 2 0_0603_5%
+MIC2-VREFO MONO-OUT
2 LA1 EMI@ RA31 1 2 0_0603_5%
GPIO0/DMIC-DATA MIC_DATA <20>
2 1 SLEEVE +MIC2-VREFO 29 3 MIC_CLK_C 1 2
+MIC2-VREFO MIC2-VREFO GPIO1/DMIC-CLK MIC_CLK <20>
RA53 2 1 2.2K_0402_5% RING2 RING2 17 48 1 BLM15BB221SN1D_2P RA32 1 2 0_0603_5%
RA1109 2.2K_0402_5% SLEEVE 18 MIC2-L(PORT-F-L)/RING SPDIF-OUT/GPIO2 NEMI@
2 1 MIC1-L 19 MIC2-R(PORT-F-R)/SLEEVE CA22
10U_0603_6.3V6M CA74 MIC_CAP 37 22P_0402_50V8J SM01000BV00
PCB trace width of SLEEVE & CBP 35 1U_0402_6.3V6K 2 1 CA24 2
need CIS symbol
CBN
RING2 are required at least 40 +3VALW R2356 2 1 0_0402_5% 20
NC GNDA GND
2 1 2 1
mil and its length should be +3VS 10K_0402_5% RA54 2.2U_0603_6.3V6K CA23
C EC_MUTE# 47 C
<32> EC_MUTE# PDB
as short as possible. 1 EMI@ 2
VREF
28
RA154 100K_0402_5% 12 CA65 1 2 RA79 1 2 PC_BEEP
CA62 1 2 10U_0603_6.3V6M 27 PCBEEP 34 0.1U_0402_16V7K 1K_0402_1% Place on the moat between GND & GNDA.
CA63 1 2 10U_0603_6.3V6M 39 LDO1-CAP CPVEE @
100K is used to speed up the discharge CA64 1 2 10U_0603_6.3V6M 7 LDO2-CAP CA25 2 1 CA69 1 2 100P_0402_50V8J
for LDO1. It could solve the pop sound LDO3-CAP 1U_0402_6.3V6K
during system boot up and reboot.
RA154 place close to Pin 26 R2357 2 1 0_0402_5% 4 25 RA81 2 1 10K_0402_5%
DVSS AVSS1 38 DA8
49 AVSS2 2
@
GND EC Beep <32> BEEP#
ALC3234-CG_MQFN48_6X6 1 PC_BEEP
RA154 Reserve for ESD Request
3
MCU Beep <11> SOC_SPKR

1
BAT54C-7-F_SOT23-3 @
0724: change the cymbal to correct IC part and schematics RA19
0718: change to the other part to SCS00003X00 10K_0402_5%

2
Line1-VREFO-L
PC Beep
Line1-VREFO-R
Close to UA1
1

RA166 RA165
Pin11,13,14,16
4.7K_0402_5%
4.7K_0402_5% close to Codec JSPK
INT-SPK-R+ LA3 SHORT@ 1 2 0_0603_5% SPK_R+_CONN 1
2

LINE1-L CA67 1 2 1 2 INT-SPK-R- LA4 SHORT@ 1 2 0_0603_5% SPK_R-_CONN 2 1


4.7U_0603_6.3V6K RA80 1K_0402_1% INT-SPK-L+ LA5 SHORT@ 1 2 0_0603_5% SPK_L+_CONN 3 2
LINE1-R CA68 1 2 1 2 INT-SPK-L- LA6 SHORT@ 1 2 0_0603_5% SPK_L-_CONN 4 3
4.7U_0603_6.3V6K RA82 1K_0402_1% universal type Combo Jack 5
6
4
G1
EMI@ G2
40mil 40mil Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K
SLEEVE LA7 2 1 BLM15PX330SN1D 0402 1 1 1 1 ACES_50224-0040N-001
SLEEVE_R <25>
EMI@

EMI@ CA29

EMI@ CA30

EMI@ CA31

EMI@ CA32
RING2 LA10 2 1 BLM15PX330SN1D 0402 40mil 40mil Speaker 4 ohm : 40mil CONN@
RING2_R <25>
HPOUT-L 1
RA55
2
10_0402_1%
Line-IN-L LA8 1 2 0_0603_5%
AUD_HP_OUT_L_CN <25> Speaker 8 ohm : 20mil 2 2 2 2

HPOUT-R 1 2 Line-IN-R LA9 1 2 0_0603_5%


AUD_HP_OUT_R_CN <25>
RA56 10_0402_1%
JACK_PLUG#
JACK_PLUG# <25>
1

@ @
RA84 RA83
B B
10K_0402_5% 10K_0402_5%

1 1 1 1
2

100P_0402_50V8J
CA39 NEMI@

100P_0402_50V8J
CA33 NEMI@

100P_0402_50V8J
CA76 NEMI@

100P_0402_50V8J
CA75 NEMI@

2 2 2 2

RA57, RA58 Reserve for ESD Request


V0.2 change Grounding Circuit dummy
EMI required +3VALW

1
+3VS +RTCVCC RA17

@ 100K_0402_5%~D SLEEVE

1
RA16
0718: change the net name to +3VS

2
2
@ 100K_0402_5%~D

3
RA18 QA1B D
@ 10K_0402_5%~D 5

2
G
DMN66D0LDW-7_SOT363-6~D

1
@ S

4
6
QA1A D
2
G GNDA
0804: change to the part name
1

RA20
@ S DMN66D0LDW-7_SOT363-6~D

1
@ 100K_0402_5%~D
2

GNDA

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 2015/11/25 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P23-Audio Codec ALC3234
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 23 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = Card Reader

+3VS +3VS_CARD

RR9 2 1 0_0603_5%
SHORT@

+3VS_CARD
D D

SD_CD#
1 1
CR1 CR2 1
CR9 NESD@
0.1U_0402_10V7K 4.7U_0603_6.3V6K
2 2 22P_0402_50V8J
+3VS_CARD +VCC_3IN1 2

Trace width:40mil For EMI request. Place close to UR1

5
UR1
1 2
SHORT@
0724: vendor review to remove for compatility

CARD_3V3
3V3_IN
RR4 0_0402_5% RR1 2 1 6.19K_0402_1% RREF 1 22
RREF SP14 21 SD_D2
MCM1012B900F06BP_4P SP13 20 MS_D1_SD_D3
<26> USB20_Hub_P4
USB20_Hub_P4 4 3 USB20_CR_P3_R USB20_CR_N3_R 2
DM
SP12
SP11
19 close to chip side
USB20_CR_P3_R 3 18 SD_CMD
DP SP10 16
USB20_Hub_N4 1 2 USB20_CR_N3_R SP9 15 MS_D2_SD_CLK_R 1 EMI@ 2 MS_D2_SD_CLK
<26> USB20_Hub_N4 SP8 RR2 22_0402_5%
LR2
NEMI@
RTS5179-GR_QFN24
1 2
SHORT@ 14
RR5 0_0402_5% 7 SP7 13 SD_CD#
23 XD_CD# SP6 12
17 XD_D7 SP5 11 SD_D0
GPIO0 SP4 10 SD_D1
0725: change to the other part to SM070004800

Thermal pad
6 SP3 9
V18 24 SDREG SP2 8 MS_CLK_SD_WP
C V18 SP1 C

CR6
1
2 2
RTS5170-GR_QFN24_4X4 EMI@

25
1U_0402_6.3V6K
CR3

1U_0402_6.3V6K
CR4

5P_0402_50V8C
2
1 1

0724: doesn't support MS function and remove

+VCC_3IN1

+VCC_3IN1 JREAD
MS_D1_SD_D3 1
CD/DAT3
SD_CMD 2
CMD
3
VSS1
1 1 4
CR8 CR7 VDD
MS_D2_SD_CLK 5
4.7U_0603_6.3V6K 0.1U_0402_10V7K CLK
2 2 6
VSS2
B B
SD_D0 7
DAT0
SD_D1 8 12
DAT1 G1
SD_D2 9 13
DAT2 G2
Close to JREAD SD_CD# 10
CD G3
14

MS_CLK_SD_WP 11 15
WP G4
S SOCKET TAI TWUN PSDAT4-11GLBS1NN4H2 SD
CONN@
SD_CMD

1
CR11 NESD@

22P_0402_50V8J
2

For EMI request.


Place close to JREAD

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

P24-Card Reader RTS5179


WWW.AliSaler.Com 5 4 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2
Date:
Document Number

LA-C571P
Tuesday, June 16, 2015
1
Sheet 24 of 44
Rev
1.0
5 4 3 2 1

Main Func = USB3.0

+5V_USB_PWR1
W=80mils JUSB1
1
USB 3.0 VBUS

100U_1206_6.3V M X5R

10U_0603_6.3V6M

0.1U_0402_16V7K
1 2
SHORT@ USB20_JUSB1_N0_R 2
R2366 0_0402_5% USB20_JUSB1_P0_R 3 D-
4 D+
1 1 1 PGND
LI1 NEMI@ USB3RN2_JUSB1_R 5
SSRX-

CI1

CI40

CI2
PCH_USB3_RX0_P 1 2 USB3RP2_JUSB1_R USB3RP2_JUSB1_R 6 10
<12> PCH_USB3_RX0_P +5VALW 3.0A +5V_USB_PWR1
2 2 2
7
8
SSRX+
GND
GND
GND
11
12
UI5 USB3TN2_JUSB1_R
D PCH_USB3_RX0_N 4 3 USB3RN2_JUSB1_R 1 80mil USB3TP2_JUSB1_R 9 SSTX- GND 13 D
<12> PCH_USB3_RX0_N 5 OUT SSTX+ GND
HCM1012GH900BP_4P IN 2 PUBAUN-09FLBS1NN4H0
GND

47U_0805_6.3V4Z

4.7U_0805_25V6-K

0.1U_0402_16V7K
1 2
SHORT@ 1 1 1 USB_EN# 4 CONN@
<32> USB_EN# EN

CI18

CI12

CI14
R2367 0_0402_5% 3 USB_OC0#
OCB USB_OC0# <12>
1
CI13 SY6288D20AAC_SOT23-5 1
1 2
SHORT@ 2 2 2 CI15

0.1U_0402_16V7K
R2368 0_0402_5% @
LI3 NEMI@ 2 0.1U_0402_16V7K
PCH_USB3_TX0_P 2 1 PCH_USB3_TX0_P_C1 2 USB3TP2_JUSB1_R 2
<12> PCH_USB3_TX0_P
CI4 0.1U_0402_10V7K

<12> PCH_USB3_TX0_N PCH_USB3_TX0_N 2 1 PCH_USB3_TX0_N_C4 3 USB3TN2_JUSB1_R


CI3 0.1U_0402_10V7K
HCM1012GH900BP_4P
1 2
SHORT@
R2369 0_0402_5%

ESD@ D27
DI1 USB20_JUSB1_P0_R2
1 @ 2 USB3RN2_JUSB1_R 1 10 USB3RN2_JUSB1_R 2 1
R2371 0_0402_5% USB20_JUSB1_N0_R3 1
USB3RP2_JUSB1_R 2 9 USB3RP2_JUSB1_R 3
MCM1012B900F06BP_4P AZC199-02SPR7G_SOT23-3
USB20_N0 4 3 USB20_JUSB1_N0_R USB3TN2_JUSB1_R 4 7 USB3TN2_JUSB1_R ESD@
<12> USB20_N0
USB3TP2_JUSB1_R 5 6 USB3TP2_JUSB1_R
USB20_P0 1 2 USB20_JUSB1_P0_R
<12> USB20_P0 3
LI2 EMI@
1 @ 2 8
R2370 0_0402_5%
IP4292CZ10-TBR_XSON10_2.5X1~D

C C

Kernel Debug (for WIN7) USB/B


Open-Chassis Platforms
JKDB1 @
6 1 2
5 GND RI3 0_0402_5%
GND
4 MCM1012B900F06BP_4P
+5VALW 4
UART_0_CTXD_DRXD_OP 3 USB20_P1 4 3 USB20_JUSB2_P1_R
<10> UART_0_CTXD_DRXD_OP 3 <12> USB20_P1
UART_0_CRXD_DTXD_OP 2
<10> UART_0_CRXD_DTXD_OP 1 2
1 USB20_N1 1 2 USB20_JUSB2_N1_R
<12> USB20_N1
CVILU_CI1804M1VRA-NH
CONN@ LI5 EMI@

@ 24 26
1 2 23 24 GND 25
RI4 0_0402_5% USB20_JUSB2_N1_R 22 23 GND
+5V_USB_PWR2 USB20_JUSB2_P1_R 21 22
20 21
USB20_JUSB3_P3_R 19 20
USB20_JUSB3_N3_R 18 19
17 18
1 17
CI19 16
@ + 15 16
1 2 150U_B15G_6.3VM_R70M 14 15
RI1 0_0402_5% 13 14
2 12 13
LI6 EMI@ 11 12
B 11 B
USB20_SOC_N3 1 2 USB20_JUSB3_N3_R 10
<12> USB20_SOC_N3 9 10
AUD_HP_OUT_L_CN 8 9
4 3 <23> AUD_HP_OUT_L_CN 7 8
USB20_SOC_P3 USB20_JUSB3_P3_R AUD_HP_OUT_R_CN
<12> USB20_SOC_P3 <23> AUD_HP_OUT_R_CN 6 7
SLEEVE_R
<23> SLEEVE_R 5 6
MCM1012B900F06BP_4P
@ RING2_R 4 5
1 2 <23> RING2_R 3 4
RI2 0_0402_5% JACK_PLUG# 2 3
<23> JACK_PLUG# 1 2
1
JIO1
CONN@

+5VALW
3.0A +5V_USB_PWR2

UI4
1 80mil
5 OUT
IN 2
GND
4.7U_0805_25V6-K

0.1U_0402_16V7K

1 1 USB_EN# 4
EN
CI6

CI7

3 USB_OC1#
OCB USB_OC1# <12>
0.1U_0402_16V7K

1
CI26

SY6288D20AAC_SOT23-5 1
2 2
0.1U_0402_16V7K

CI17
2
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P25-USB3.0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 25 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = HUB 2.0

D D

+3V_SOC +3V_HUB

SHORT@
RC396 1 2 0_0603_5%

C1119
Vonder suggest Voltage up 10V +3V_HUB +5V_HUB +3V_HUB
0725: vendor review=> OVCJ need pull high +5V
0725: vendor review=> tire to together

1
1 @ R1046 R1051
+3V_HUB 10K_0402_5% 10K_0402_5%
C1119
10U_0603_10V6M

2
2 HUB_OVCJ
+3V_HUB +5VALW @ +5V_HUB
1
R1047 1 2 100K_0402_5% HUB_XRSTJ
1 2 +5V_HUB C1121
R1045 1 1 0.01U_0402_16V7K
R6111 1 2 100K_0402_5% HUB_VBUSM 0_0603_5% 2
1
C1117 C1118
C1120 .1U_0402_16V7K .1U_0402_16V7K U58
2 2 20 10 USB20_Hub_N1
10U_0603_6.3V6M VDD5 DM1 USB20_Hub_N1 <20>
2 11 USB20_Hub_P1 To Touch
+5V_HUB 21 DP1 USB20_Hub_P1 <20>
+3V_HUB
0_0402_5% VDD33F 8 USB20_Hub_N2
USB20_CPU_N3 RA1110 1 2 USB20_CPU_N3_R 15 DM2 9 USB20_Hub_P2 USB20_Hub_N2 <28>
<12> USB20_CPU_N3 SHORT@
DMU DP2 USB20_Hub_P2 <28> To BT
Source <12> USB20_CPU_P3 USB20_CPU_P3 RA1111 1 2
SHORT@ USB20_CPU_P3_R 16
DPU
1

@ 0_0402_5% 6
R6112 R6113 25 DM3 7
C 26 PWRJ DP3 C
10K_0402_5% 10K_0402_5% OVCJ 4 USB20_Hub_N4
DM4 5 USB20_Hub_N4 <24>
USB20_Hub_P4 To CardReader
USB20_Hub_P4 <24>
2

HUB_XRSTJ 17 DP4
HUB_BUSJ HUB_VBUSM 18 XRSTJ 27
HUB_BUSJ 19 VBUSM TESTJ 23
22 BUSJ LED1 24
DRV LED2
2

@ R6114 12
HUB_XIN 3 NC1 13
100K_0402_5% XIN NC2 +3V_HUB
HUB_XOUT 2 28
XOUT NC3
1

1 14
VSS REXT

1
FE1.1S-BSOP28BJTR_SSOP28

2.7K_0402_1%
V0.2 change to SA00006XI20 R1048

2
1 2
SHORT@ HUB_XOUT
B R1049 0_0402_1% B
1

RC69
@ 1M_0402_5%

Y9
2

4 3 HUB_XIN
1 2

12MHZ_12PF_5YEA12000122IFA2Q3
1 1
@ C1132 @ C1133
12P_0402_50V8J~N 12P_0402_50V8J~N
2 2

0725: vendor review=> reserve for EMI

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2014/11/10 2015/11/25 Title
Issued Date Deciphered Date P26-USB2.0 hub
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev

WWW.AliSaler.Com DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 26 of 44
5 4 3 2 1
A B C D E F G H

Main Func = HDD


CONN@

+5V_HDD Source SATA HDD Connector ACES_51625-01201-001


14
13 GND
GND
12
US2 TI@ US2 @ US2 PARADE@ +5V_3V_HDD JP@ +5VS SATA_PTX_DRX_P0 11 12
JP13 SATA_PTX_DRX_N0 10 11
1 2 9 10
1 2 SATA_PRX_DTX_N0 8 9
+3VS JUMP_43X79 SATA_PRX_DTX_P0 7 8
6 7
JP@ +3VS @ DEVSLP0_R 5 6
1 SN75LVCP601RTJR PI3EQX6741STZDEX PS8527CTQFN20GTR2-A2 5 1
JP14 RS7 1 2 0_0402_5% JHDD_P10 4
+3VS 4
SA00003ZX00 SA00004H100 SA00007JU10 1 2 3
1 2 2 3
+5V_3V_HDD 2
JUMP_43X79 1
1

0.01U_0402_16V7K

0.1U_0402_25V6K

1000P_0402_50V7K

0.1U_0402_25V6K
JHDD

10U_0805_10V6K
1 1

2
1 1 1

4.7K_0402_5%

RS33

4.7K_0402_5%

RS34

1
CS42

CS27
CS5 CS6 CS7
2 2

0_0402_5%

RS25

0_0402_5%

RS26

4.7K_0402_5%

4.7K_0402_5%
+3VS @ @ 2 2 2

1
@ +3VS
US2 601@
601@

2
2

RS27

RS28
1 2 SHORT@ 7 6 DEW2
RS19 0_0402_5% EN VDD 16 DEW1 SHORT@ SHORT@
SATA_PTX_DRX_P0_C CS30 1601@ 2 0.01U_0402_16V7K SATA_PTX_DRX_P0_R 1 VDD RS38 1 @ 2 0_0402_5%
<11> SATA_PTX_DRX_P0_C A_INp PARADE@
PARADE@
<11> SATA_PTX_DRX_N0_C SATA_PTX_DRX_N0_C CS32 1601@ 2 0.01U_0402_16V7K SATA_PTX_DRX_N0_R 2 10
A_INn NC 20 HDD_REXT_SATA0 HDD_B0_EQ RS37 1 601@ 2 0_0402_5%
SATA_PRX_DTX_P0_C CS31 1601@ 2 0.01U_0402_16V7K SATA_PRX_DTX_P0_RC 5 REXT
<11> SATA_PRX_DTX_P0_C B_OUTp
SATA_PRX_DTX_N0_C CS34 1601@ 2 0.01U_0402_16V7K SATA_PRX_DTX_N0_RC 4 9 HDD_A0_PRE0 DEW2 RS35 1 TI@ 2 4.7K_0402_5%
<11> SATA_PRX_DTX_N0_C B_OUTn A_PRE0 8 HDD_B0_PRE0
RS29 1 @ 2 0_0402_5% HDD_B0_PRE1 17 B_PRE0 DEW1 RS36 1 TI@ 2 4.7K_0402_5%
+3VS B_PRE1
RS30 1 @ 2 0_0402_5% HDD_A0_PRE1 19 15 SATA_PTX_DRX_P0_RC CS35 1601@ 2 0.01U_0402_16V7K SATA_PTX_DRX_P0
A_PRE1 A_OUTp 14 SATA_PTX_DRX_N0_RC CS36 1601@ 2 0.01U_0402_16V7K SATA_PTX_DRX_N0 HDD_B0_PRE0 RS21 1 @ 2 0_0402_5%
RS20 1 @ 2 0_0402_5% 18 A_OUTn
3 TEST 11 SATA_PRX_DTX_P0_R CS37 1601@ 2 0.01U_0402_16V7K SATA_PRX_DTX_P0 HDD_B0_PRE1 RS18 1 @ 2 0_0402_5%
RS22 1 2 0_0402_5%HDD_B0_EQ 13 GND B_INp 12 SATA_PRX_DTX_N0_R CS38 1601@ 2 0.01U_0402_16V7K SATA_PRX_DTX_N0
21 GND B_INn HDD_A0_PRE1 RS23 1 @ 2 0_0402_5%
EPAD
601@
SA00007JU10 HDD_A0_PRE0 RS24 1 @ 2
PS8527CTQFN20GTR2_TQFN20_4X4 2K_0402_5%
HDD_REXT_SATA0 RS31 1 @ 2
5.1K_0402_1%
SATA_PTX_DRX_P0_C RS43 1 N601@ 2 0_0402_5% SATA_TX_P0 CS46 1N601@2 0.01U_0402_16V7K SATA_PTX_DRX_P0

SATA_PTX_DRX_N0_C RS41 1 N601@ 2 0_0402_5% SATA_TX_N0 CS39 1N601@2 0.01U_0402_16V7K SATA_PTX_DRX_N0


2 2

SATA_PRX_DTX_P0_C RS42 1 N601@ 2 0_0402_5% SATA_RX_P0 CS40 1N601@2 0.01U_0402_16V7K SATA_PRX_DTX_P0

SATA_PRX_DTX_N0_C RS44 1 N601@ 2 0_0402_5% SATA_RX_N0 CS41 1N601@2 0.01U_0402_16V7K SATA_PRX_DTX_N0

+1.8VS +3VS
DE EQ

1
R480
PARADE -6dB 2.4dB

2
G
10K_0402_5%

2
<11> SATA_DEVSLP SATA_DEVSLP 3 1 SATA_DEVSLP_LS 1 2
SHORT@ DEVSLP0_R
Q36 RS8 0_0402_5%

D
TI -4dB 0dB MESS138W-G_SOT323-3
Modification @ 2014/07/17

ODD Power Control SATA ODD Connector


JP@ JP7
1 2 +5VS_ODD
1 2

3 JUMP_43X79 3
+5VS
+5VS_ODD +5VS_ODD_R1

1000P_0402_50V7K

0.1U_0402_25V6K

10U_0805_10V6K
QS2 +5VS_ODD_R1
1 1 1
D

6 SHORT@
S

CS11
CS10

CS12
5 4 1 2
1U_0402_6.3V6K

@ 1 2 0_0805_5% RS12 ODD@ ODD@ ODD@


1 2 2 2
CS13 SI3456BDV-T1-E3 1N TSOP6
G
3

B+ 2 @
2

RS6
@ 100K_0402_5% DC021409120 CONN@
AECS_51519-02001-001
1

ODD_EN 20 22
19 20 GND2
18 19
ODD_DA# 17 18
T148@TP 17
1

D 1 16
ODD_EN# 2 QS3 RS9 @ CS16 15 16
T147@TP 15
G @ 470K_0402_5% 0.1U_0603_25V7K 14
13 14
2N7002KW_SOT323-3 S 2 12 13

Low Active
3

@ 11 12
10 11
9 10
ODD_DETECT# 1 @ 2 8 9
T149@TP 8
RS09 0_0402_5% 7
CS15 2 1 0.01U_0402_16V7K SATA_PRX_DTX_P1 6 7
<11> SATA_PRX_DTX_P1_C 2 1 0.01U_0402_16V7K 5 6
CS14 ODD@ SATA_PRX_DTX_N1
<11> SATA_PRX_DTX_N1_C 4 5
ODD@
CS9 2
ODD@ 1 0.01U_0402_16V7K SATA_PTX_DRX_N1 3 4
<11> SATA_PTX_DRX_N1_C 3
CS8 2
ODD@ 1 0.01U_0402_16V7K SATA_PTX_DRX_P1 2
<11> SATA_PTX_DRX_P1_C 2
4
1 4
1 21
GND1
JODD1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P27-HDD/ODD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 27 of 44
A B C D E F G H
5 4 3 2 1

Main Func = NGFF


closed to pin 2, 4 closed to pin 64, 66

+3VS_WLAN_NGFF +3VS_WLAN_NGFF
FOR RF FOR RF

@
22U_0603_6.3V6M~D

0.1U_0402_10V7K~D

2.2U_0402_6.3V6M

10P_0402_50V8J

22U_0603_6.3V6M~D

0.1U_0402_10V7K~D

2.2U_0402_6.3V6M

10P_0402_50V8J
1 1 1 1 1 1 1 1

CM4

CM6
+3VS_WLAN_NGFF

CM5

CM9

CM8

CM7

CM11

CM10
2 2 2 2 2 2 2 2
JNGFF
1 2
1 2
SHORT@ USB20_Hub_P2 3 GND 3.3VAUX 4
D +3VS +3VS_WLAN_NGFF <26> USB20_Hub_P2 USB_D+ 3.3VAUX D
RM7 0_1206_5% USB20_Hub_N2 5 6
<26> USB20_Hub_N2 7 USB_D- LED1# 8
9 GND PCM_CLK 10
11 SIDO_CLK PCM_SYNC 12
1 R490 2 WLAN_WAKE# 13 SDIO_CMD PCM_IN 14
+3VS_WLAN_NGFF SDO_DAT0 PCM_OUT
10K_0402_5% 15 16
17 SDO_DAT1 LED2# 18
19 SDO_DAT2 GND 20
21 SDO_DAT3 UART_WAKE# 22
23 SDIO_WAKE# UART_RX
SDIO_RESET#

FOR RF
24 0721: change power rail to +3VS_WLAN_NGFF
25 UART_TX 26
1 2
SHORT@ PCIE_PTX_C_DRX_P2 27 GND UART_CTS 28 RM11 2 1 100K_0402_5%
<11> PCIE_PTX_C_DRX_P2 PETP0 UART_RTS
RI5 0_0402_5% PCIE_PTX_C_DRX_N2 29 30 EC_TX
<11> PCIE_PTX_C_DRX_N2 PETN0 RESERVED EC_TX <32>
31 32 EC_RX
33 GND RESERVED 34 EC_RX <32> +3VS_WLAN_NGFF +3VS_WLAN_NGFF
DLW21HN900HQ2L PCIE_CRX_DTX_P2
4 3 <11> PCIE_CRX_DTX_P2 35 PERP0 RESERVED 36
<11> CLK_PCIE_WLAN CLK_PCIE_WLAN_R PCIE_CRX_DTX_N2
4 3 <11> PCIE_CRX_DTX_N2 37 PERN0 COEX3 38
GND COEX2

1
CLK_PCIE_WLAN_R 39 40 QM30
REFCLKP0 COEX1

2
<11> CLK_PCIE_WLAN#
1 2 CLK_PCIE_WLAN#_R CLK_PCIE_WLAN#_R 41 42 SUSCLK_R 1 RM8 @ 2 PMC_SUSCLK RM110
PMC_SUSCLK <18> 2N7002K_SOT23-3
1 2 43 REFCLKN0 SUSCLK 44 PLT_RST# 0_0402_5%

G
GND PERST0# PLT_RST# <17,32> 10K_0402_5%
LI4 WLAN_CLKREQ# 45 46 NGFF_BT_ON# 1 SHORT@2
<11> WLAN_CLKREQ# 47 CLKEQ0# W_DISABLE2# 48 BT_ON# <11> 1 3
@ WLAN_WAKE# WLAN_RADIO_DIS#_R RM9 0_0402_5% WL_OFF#
<32> WLAN_WAKE# WL_OFF# <11,32>

2
1 2
SHORT@ 49 PEWAKE0# W_DISABLE1# 50 E51_RX2

S
GND I2C_DATA T15
RI6 0_0402_5% 51 52
53 RSRVD/PETP1 I2C_CLK 54
55 RSRVD/PETN1 ALERT 56
57 GND RESERVED 58
59 RSRVD/PERP1 RESERVED 60
61 RSRVD/PERN1 RESERVED 62
63 GND RESERVED 64
65 RESERVED 3.3VAUX 66
67 RESERVED 3.3VAUX
GND
C C

69 68
MTG77 MTG76

LCN_DAN05-67406-0100
CONN@

TEMP CONN

+3VS
HDD LED R6110
1 2 SATA_LED#_R
@
+3VS
10KR2J-3-GP
2

2N7002KW_SOT323-3
G

Q6103
Q6104
LED@ LED2 <32> SATA_LED#_R
APU-->EC and LED @ R2
3
+5VS

3
3 1 SATA_LED#_B 2 R6108
<11,32> SOC_SATALED#
From EC
S

1 1 2 2 1
R1
SATA_LED SATA_LED_R

2
LED@ 2N7002KW_SOT323-3

G
LED@ LED-W-27-GP-U
DDTA144VCA-7-F-GP 330R2J-3-GP
B R6106 B
2nd = 83.00110.R70 @
1 2 3rd = 083.11204.0070 SOC_SATALED# 3 1 PWR_PWM_LED_R#

D
LED@
0R2J-2-GP
For EMI Reserved
Q6105
SATA HDD LED SATA_LED EC6104 1 2 SCD1U16V2KX-3GP
LOW actived from PCH GPIO @

Power / Battery LED

+5VALW (YELLOW_LED)
Low actived from KBC GPIO Q6101 Battery LED1 LTW-327ZDSKS-5A 3X1 YELLOW/WHITE
3
R2
BATT_LOW_LED# 1 2BATT_LOW_LED_R# 2
SHORT@ R6103 470_0402_1%
<32> BATT_LOW_LED#
1 2 1 1
R1
R6105 0_0402_1% BATT_LOW_LED BAT_AMBER
R6107 390_0402_1%
2 1 BAT_WHITE 3
DDTA144VCA-7-F-GP
2
+5VALW
Low actived from KBC GPIO Q6102 LED1
3
R2
2nd SC50000G000
PWR_PWM_LED# 1 2PWR_PWM_LED_R#
SHORT@ 2
A
<32> PWR_PWM_LED#
R6104 0_0402_1%
R1
1 PWR_PWM_LED
Battery LED2 A

DDTA144VCA-7-F-GP

(WHITE_LED)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

P28-Mini Card/LED
WWW.AliSaler.Com 5 4 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2
Date:
Document Number

LA-C571P
Tuesday, June 16, 2015
1
Sheet 28 of 44
Rev
1.0
5 4 3 2 1

Main Func = Touch Pad


LID Switch FAN Control circuit
+FAN_POWER

ON/OFF switch POWER/B CONN@


+3VALW_EC
40mil

TOP Side 6

2.2U_0603_6.3V6K
C4 5 GND

1000P_0402_50V7K
GND 1 1

1
ESD@
SW1 0.1U_0402_16V4Z 4 R1 CE24 CE23
SMT1-05-A_4P LID_SW# 3 4 @ +5VS
D 3 47K_0402_5% D
1 3 ON/OFFBTN# 2 2 2 CE25
1 2 2.2U_0603_6.3V6K
+3VALW_EC

2
2 4 1 1 2
JPWR
SP01000TB10 (CIS OK) LID_SW#
<20,32> LID_SW#
6
5

UE3
@ 1 8
2 VEN GND 7
Power ON Circuit 3 VIN
VO
GND
GND
6

2
<32> EN_DFAN1 EN_DFAN1 4 5
U70 VSET GND

VCC
VOUT
Bottom Side NCT3942S SOP 8P FAN DRIVER
+3VLP
@

GND
SW2 C3
SMT1-05-A_4P @

2
1 3 TCS20DLR_SOT23F-3 0.1U_0402_16V4Z +3VS

1
RE49
2 4 100K_0402_5%

1
+FAN_POWER
RE50
6
5

1
10K_0402_5%
@
ON/OFFBTN# <32>
40mil JFAN

2
1 1
2 1
<32> FAN_SPEED1 3 2
CE20
0.1U_0402_16V7K 3
2 4
Pop only before MP 1
5 GND CONN@
CE32 GND
0.01U_0402_16V7K
2 ACES 50224-0030N-001

SP02000PU10(CIS OK)

C C

Touch pad 1
RE26
2
0_0603_5% RX43 0_0402_5% @

+3VS_TPIN
@

UE4
+3VS_TP TP_POWER 1 2
+3VALW
INT_KBD Connector
RX44 0_0402_5%
+3VALW +3VS_TPIN 1 7 TP_POWER 1 2
VIN VOUT +1.8VALW
2 8
0_0603_5% 1 2 RE2
SHORT@ VIN VOUT 30 32
1 30 GND
3 6 KSI7 29 31

1U_0402_6.3V6K
<32> TP_EN ON CT 29 GND

CE59
KSI6 28

2200P_0402_25V7K
2 1 28

CE60
1 +1.8VALW KSI4 27
CE61 4 2 KSI2 26 27
VBIAS 5 @ CC118 KSI5 25 26
10U_0402_6.3V6M GND 25
1 9 2 KSI1 24
GND .1U_0402_16V7K 24
2 KSI3 23

TP_POWER
+3VS_TP KSI[0..7] KSI0 22 23
<32> KSI[0..7] 22

1
TPS22967DSGR_SON8_2X2 KSO5 21
For Test, RE34 KSO[0..16] KSO4 20 21
<32> KSO[0..16] 20

1
APE8937(SA000070L00) 10K_0402_5% KSO7 19
+3VS_TP AOZ1336(SA00006U600) RE20 KSO6 18 19
TPS22967(SA000070S00) KSO8 17 18
10K_0402_5%

2
17

5
PTP_DIS# 2 1 U2408 KSO3 16
10K_0402_5% RE28 1 KSO1 15 16

P
2
+3VS_TP NC 4 SOC_TP_INT# KSO2 14 15
1 2 Y SOC_TP_INT# <11> 14
@ TP_INT# 2 KSO0 13
<32> EC_TP_INT# A 13

G
JTP RE29 0_0402_5% KSO12 12
1 INT NL17SZ07DFT2G_SC70-5 KSO16 11 12

3
I2C5_SDA_TP_R 2 1 SA00004BV00 KSO15 10 11
I2C5_SCL_TP_R 3 2 KSO13 9 10
B
4 3
4
Touch Pad KSO14 8 9
8 B
TP_INT# 5 KSO9 7
PTP_DIS# 6 5 9 +5VS KSO11 6 7
<32> PTP_DIS# TP_DATA 7 6 G1 10 RE60 KSO10 5 6
<32> TP_DATA 8 7 G2 1 2 4 5
TP_CLK KB_CAPS_PWR
<32> TP_CLK 8 3 4
2 3
S H-CONN ACES 51524-0080N-001 8P P1.0 Remove QE9 (Add U2408 SA00004BV00 for v1.0) 240_0402_1%
2
3

CONN@ 1
<32> CAPS_LED 1
PESD5V0U2BT_SOT23-3~D
DE3

JKB

NESD@ CONN@
SP01001A900(CIS OK) S H-CONN ACES 51510-0304N-P01 30P P0.8

V0.3 change (for Touch Pad issue) SP01001H600(CIS OK)


1

+3VALW

For Touch Pad I2C_5_SDA_R_L R1182 1 2 10K_0402_5%


I2C_5_SCL_R_L R1181 1 2 10K_0402_5%

+3VS_TP

I2C5_SDA_TP_R RE17 1 2 10K_0402_5%


I2C5_SCL_TP_R RE19 1 2 10K_0402_5%

+1.8VALW +3VS_TP

Event PCH-TP_INT# PCH-TP_INT#


S0 Interrupt X
5

5
G
G

I2C_5_SCL_R4 3 I2C_5_SCL_R_L 3 4 I2C5_SCL_TP_R


A <11> I2C_5_SCL_R S3 X Wake A
D

S
S

Q2514A Q2515A
2

DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6
1. Clamshell closed or Lid closed
G
G

<11> I2C_5_SDA_R
I2C_5_SDA_R 1 6 I2C_5_SDA_R_L 6 1 I2C5_SDA_TP_R 2. Tablet mode for Convertile design X X
D

S
S

Q2514B Q2515B
DMN63D8LDW-7_SOT363-6 DMN63D8LDW-7_SOT363-6 3.Disable TP function by ht-key
Q2514 change to SB000016K00
Vgs = 0.8V~1.1V
<17,19,32> EC_SMB_DA2
1
RE32
@ 2
0_0402_5%
I2C5_SDA_TP_R Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title
1 @ 2 I2C5_SCL_TP_R
<17,19,32> EC_SMB_CK2
RE33 0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P29-FAN/TP/PWR SW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 29 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = DC Interface


+3VS_OUT
1
C184
0.1U_0402_16V4Z
2

VS Power Gate +3VALW TO +3VS +5VS_OUT U11,U59 change to SA00007PM00 - EM5209VF


<32,36,38> SUSP# SUSP#
No Symbol C190
1
VIH=1.2~5.5V +1.8VALW TO +1.8VS
3.3V@82k/0.1uF=3.042ms
+3VALW 0.1U_0402_16V4Z 3.3V@47k/0.1uF=1.893ms JP38
D 2 D
U38 JP@ U37 JUMP_43X39
C185 1 2 4.7U_0603_6.3V6K 1 14 +3VS_OUT JP36 +3VS +1.8VALW
1 14 +1.8VS_OUT 1 2 +1.8VS
2 VIN1 VOUT1 13 R241 2 VIN1 VOUT1 13 1 2 +1.8VS_OUT
VIN1 VOUT1 JUMP_43X118 Place close to U.?13 & 14 82K_0402_5% VIN1 VOUT1 C179 1
SUSP# 1 2 3VS_EN 3 12 C186 1 2 1000P_0402_50V7K SUSP# 2 1 1.8VS_ON 3 12 2 1 470P_0402_50V7K
R245 100K_0402_5% ON1 CT1 ON1 CT1 C177
C983 2 1 +5VALW 4 11 C1125 1 2 +5VALW 4 11 0.1U_0402_16V4Z
.1U_0402_16V7K VBIAS GND .1U_0402_16V7K VBIAS GND 2
1 2 5VS_EN 5 10 C187 1 2 1000P_0402_50V7K +1.8VALW_PWRGD 2 1 +3V_SOC_ON 5 10 2 1
ON2 CT2 <38> +1.8VALW_PWRGD ON2 CT2
R244 100K_0402_5% R1056 470P_0402_50V7K JP39
+5VALW
6 9 +5VS_OUT +5VS 47K_0402_1% +3VALW
6 9 C182 JUMP_43X39 +3V_SOC_OUT
1 2 7 VIN2 VOUT2 8 JP37 1 2 7 VIN2 VOUT2 8 +3V_SOC_OUT 1 2
VIN2 VOUT2 VIN2 VOUT2 1 2 +3V_SOC 1
C984 JUMP_43X118 1 C1128
.1U_0402_16V7K 1 15 JP@ .1U_0402_16V7K 15 C987
GPAD GPAD

1
C188 @ 0.1U_0402_16V4Z
2

1U_0603_10V6K
C191
C189 EM5209VF_DFN14_3X2 10U_0402_6.3V6M EM5209VF_DFN14_3X2
10U_0402_6.3V6M SA00007PM00 2 SPOK 2 @ 1 +3V_SOC_ON SA00007PM00
<32,35,39> SPOK

2
2 R1061 47K_0402_5%

VIH=1.2~5.5V Place close to U.?8 & 9 +3VALW TO +3V_SOC


3.3V@100k/0.1uF=3.538ms
3.3V@120k/0.1uF=4.272ms
+5VALW to +5VS

C VR_ON R464 1 2 0_0402_5% VR12.1_VR_ON C


<32> VR_ON SHORT@ VR12.1_VR_ON <37,42>

1
@
C245
.1U_0402_16V7K
2

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P30-DC Interface/Power Sequencing CKT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

WWW.AliSaler.Com
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 30 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = Thermal


+3VS
Fintek thermal sensor
placed near by TOP DDR3

1
+3VS +3VS

R2449 R2451

1
2.2K_0402_5% 2.2K_0402_5%
R2448

2
U2407 10K_0402_5%
D @ D

2
1 10
VCC SCL THERMAL_SMB_CK2 <32>
REMOTE1+ 2 9
DP1 SDA THERMAL_SMB_DA2 <32>
1
C2498 REMOTE1- 3 8 FAN_ALERT# FAN_ALERT# <12>
.1U_0402_16V7K DN1 ALERT#
REMOTE2+ 4 7 R2450 1 @ 2MAINPWON
2 DP2 THERM# T217
0_0402_5%
REMOTE2- 5 6
DN2 GND

Address 1001_101xb
2nd source
SA000029210-->EMC1403-2-AIZL-TR

REMOTE1,2 (+/-) :
REMOTE1+ BOTTOM DDR3 Trace width/space:10/10 mil
Close U2407
Trace length:<8"

1
REMOTE1+ C
1 @ C2500 2 Q2407
2200P_0402_25V7K B MMST3904-7-F_SOT323-3

2
C2502 E

3
2200P_0402_25V7K REMOTE1-
2 REMOTE1-

REMOTE2+

C
1
REMOTE2+ BOTTOM CPU C
C2504
1

1
2200P_0402_25V7K C
2 REMOTE2- @ C2505 2 Q2408
2200P_0402_25V7K B MMST3904-7-F_SOT323-3
2

3
REMOTE2-

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P31-Thermal sensor
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 31 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = EC +1.8VALW +3VALW_EC SD028000080 0_0402_5%


V0.2 change SD034120280 12K_0402_1%
SD034100300 27K_0402_1%

2
+3VALW_EC
RE25 RE24 Board ID1
0_0603_5% 0_0603_5%
SD034430280 43K_0402_1%

2
LPC18@ LPC33@ RE3 SD034560280 56K_0402_1%

1
SHORT@ EMI@ Ra 100K_0402_1%
+3VALW
1 2 LE1 +EC_VCCA SD034750280 75K_0402_1%
+VCC_LPC RE6 0_0805_5% FBMA-L11-160808-800LMT_0603
SD034100380 100K_0402_1%

1
AD_BID0
1 @ 2 +3VALW_EC 1 2 +EC_VCCA
+3VLP
RE4 0_0805_5% 1 1 2 2 1
SD034130380 130K_0402_1%

2
CE1 CE2 NESD@ NESD@
D 0.1U_0402_10V7K 0.1U_0402_10V7K CE5 CE6 +3VLP
1
CE7 RE5 CE8 SD034160380 160K_0402_1% D
For abnormal shutdown 1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_10V7K Rb 0.1U_0402_10V7K
2 2 1 1
20K_0402_5%
2 SD034200380 200K_0402_1%

+VCC_LPC
D28 2
SD000001B80 240K_0402_1%

1
RB751V-40_SOD323-2 ECAGND
SPOK 1 2 EC_RSMRST#
SD00000G280 270K_0402_1%
SD034330380 330K_0402_1%

111
125
SOC_KBRST# 1 2 KB_RST#
SHORT@

22
33
96

67
<11> SOC_KBRST# UE1

9
R2372 0_0402_5%
SD028430380 430K_0402_1%

VCC0
VCC_LPC
VCC
VCC
VCC

VCC

AVCC
V0.2 change SD034330280 33K_0402_1%
1 21 EC_BATLOW#
2 GATEA20/GPIO00 EC_VCCST_PG/GPIO0F 23 EC_BATLOW# <17>
KB_RST# BEEP#
3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# <23>
PLT_RST# SERIRQ
<17> SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 ACOFF
1 <12> LPC_FRAME# LPC_FRAME# PWM Output AC_OFF/GPIO13 ACOFF <40>
CE36 NESD@ LPC_AD3 5
<12> LPC_AD3 7 LPC_AD3 2 1 100P_0402_50V8J ECAGND
LPC_AD2 CE9
<12> LPC_AD2 8 LPC_AD2 63
0.047U_0402_16V4Z NEMI@ LPC_AD1 BATT_TEMP
2 <12> LPC_AD1 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 BATT_TEMP <34,40>
CE12 0.1U_0402_10V7K LPC_AD0 LPC & MISC VCIN1_BATT_DROP +3VS_TP
2 1 1 NEMI@ 2 <12> LPC_AD0 LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65 VCIN1_BATT_DROP <34>
ADP_I
12 ADP_I/AD2/GPIO3A 66 ADP_I <34,40>
Place CC30 R2354 0_0402_5% LPC_CLK_EC AD Input AD_BID0
<12> LPC_CLK_EC 13 CLK_PCI_EC AD_BID/AD3/GPIO3B 75 2 1
@ PLT_RST# TP_CLK
close to RC51.1 RE8 2 1 47K_0402_5% <17,28> PLT_RST#
EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 PANEL_BKLEN 4.7K_0402_5% RE9
+3VALW_EC EC_RST# AD5/GPIO43 PANEL_BKLEN <18>
EC_SCI# 20 TP_DATA 2 1
2 1 <17> EC_SCI# 38 EC_SCI#/GPIO0E
CE11 0.1U_0402_10V7K PTP_DIS# 4.7K_0402_5% RE10
<29> PTP_DIS# CLKRUN#/GPIO1D
ESD@ 68 PCH_SLP_SX#
1 2 PTP_DIS# DA0/GPIO3C 70 PCH_SLP_SX# <17>
LPC_CLKRUN# @ DA Output EN_DFAN1
+3VS <12> LPC_CLKRUN# 55 EN_DFAN1/DA1/GPIO3D 71 EN_DFAN1 <29>
RX4 0_0402_5% KSI0
KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72 LCD_TEST
KSI1/GPIO31 DA3/GPIO3F LCD_TEST <20>
R489 1 @ 2 10K_0402_5% EC_SCI# KSI2 57
KSI3 58 KSI2/GPIO32 83 EC_MUTE#
59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84 EC_MUTE# <23>
KSI4 USB_EN# VR_ON
+3VALW_EC 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 USB_EN# <25>
KSI5 1
KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 WLAN_WAKE# TP_EN <29> CE34 ESD@
C KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D WLAN_WAKE# <28> C
@ R488 1 2 10K_0402_5% EC_SMI# KSI7 62 87 TP_CLK TP_CLK <29>
@ R255 1 2 100K_0402_5% SPOK KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA 0.1U_0402_10V7K
KSI[0..7] KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <29> 2
R494 1 2 10K_0402_5% EC_LID_OUT# KSO1 40
<29> KSI[0..7] 41 KSO1/GPIO21
KSO2
KSO[0..16] KSO3 42 KSO2/GPIO22 97 VGATE @
<29> KSO[0..16] 43 KSO3/GPIO23 ENKBL/GPXIOA00 98 VGATE <41> 1 2
Place CE34
KSO4 WL_OFF#_EC
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 TXE_DBG RE14 0_0402_5%
WL_OFF# <11,28> between DE1 and RE12
+3VALW_EC KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
TXE_DBG <12>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <34>
+3VS RP36 KSO8 47 KSO7/GPIO27
KSO8/GPIO28 SPI Device Interface
5 4 EC_SMB_CK1 KSO9 48 119
6 3 EC_SMB_DA1 KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120
7 2 EC_SMB_CK2 KSO11 50 KSO10/GPIO2A MOSI/GPIO5C 126
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
8 1 EC_SMB_DA2 KSO12 51 128
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A
2.2K_0804_8P4R_5% KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73 ERP_LOT6
81 KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 74 ERP_LOT6 <34>
KSO16 EC_TP_INT#
2 1 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 EC_TP_INT# <29>
@ PCH_PWROK DBC_EN
T212 KSO17/GPIO49 GPIO50 90 DBC_EN <20>
RE18 100K_0402_1%
BATT_CHG_LED#/GPIO52 91 CAPS_LED
77 CAPS_LED#/GPIO53 92 CAPS_LED <29>
EC_SMB_CK1 GPIO PWR_PWM_LED#
<34,40> EC_SMB_CK1 78 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 93 PWR_PWM_LED# <28>
Charger EC_SMB_DA1 BATT_LOW_LED# BATT_LOW_LED# <28>
<34,40> EC_SMB_DA1 79 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 95
EC_SMB_CK2_EC SYSON
80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 1 2 SYSON <36>
EC_SMB_DA2_EC VR_ON_EC SHORT@ VR_ON
EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 VR_ON <30>
CPU->DDR->EC RE12 0_0402_1% 1
DPWROK_EC/GPIO59

2
SM Bus @
EC_SMB_CK2 1 @ 2 EC_SMB_CK2_EC RE1 CE26
<17,19,29> EC_SMB_CK2 1 2 6 100
EC_SMB_DA2 RE15 0_0402_5% EC_SMB_DA2_EC SIO_SLP_S3# EC_RSMRST# 10K_0402_5% 0.1U_0402_10V7K
<17,19,29> EC_SMB_DA2 <17> SIO_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# <12,16> 2
RE16 @ 0_0402_5% EC_LID_OUT#
1 2 15 GPIO07 GPXIOA04 102 EC_LID_OUT# <18>
SHORT@ EC_SMI# VCIN1_PROCHOT
<31> THERMAL_SMB_CK2 <17> EC_SMI# VCIN1_PROCHOT <34>

1
RE22 1 2 0_0402_5% PS_ID 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PH
<31> THERMAL_SMB_DA2 SHORT@ <34> PS_ID VCOUT1_PH <34>
RE23 0_0402_5% 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104 VCOUT0_PH
18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 VCOUT0_PH <35>
<30,35,39> SPOK SPOK BKOFF#
19 GPIO0C BKOFF#/GPXIOA08 106 BKOFF# <20>
TS_EN GPIO GPO +1.05V_PGOOD
T213 25 AC_PRESENT/GPIO0D GPXIOA09 107 T210
<37> 1.15VALWP_EC 1.15VALWP_EC
28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 T218
B FAN_SPEED1 ACIN_65W B
<29> FAN_SPEED1 29 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 T221
TOUCH_RST#
<20> TOUCH_RST# 30 FANFB1/GPIO15
<28> EC_TX EC_TX NESD@
EC_RX 31 EC_TX/GPIO16 110 ACIN PCH_PWROK 1 2
<28> EC_RX 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 ACIN <17,34,40>
PCH_PWROK EC_ON CE31 0.1U_0402_10V7K
<12,16> PCH_PWROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON <35>
V0.3 change AD_I_HW2 ON/OFFBTN#
<34> AD_I_HW2 36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 115 ON/OFFBTN# <29> 2 @ 1 SATA_LED#_R
AD_I_HW1 GPI LID_SW#
<34> AD_I_HW1 NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 LID_SW# <20,29> SATA_LED#_R <28>
SUSP# RD15 0_0402_5%
SUSP#/GPXIOD05 117 SUSP# <30,36,38> 1 2
RX5 SOC_SATALED# <11,28> Place CE31 close to UE1
GPXIOD06 118 0_0402_5%
PBTN_OUT# 122 PECI/GPXIOD07 +1.8VALW
<18> PBTN_OUT#
SIO_SLP_S4# 123 PBTN_OUT#/GPIO5D 124 +V18R 1 2
SHORT@ V0.2 change
<17> SIO_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2
1 RE21 0_0603_5%
AGND

CE16
GND
GND
GND
GND
GND

@ 4.7U_0805_10V4Z
2
11
24
35
94
113

69

LE2
ECAGND 2 1 ACIN 2 1
FBMA-L11-160808-800LMT_0603 CE18 100P_0402_50V8J

20mil
+3VALW_EC
Reserve for ESD

2 1 SIO_SLP_S3#

2
CE27 NESD@ VR_HOT# @ @
<41,42> VR_HOT#
0.1U_0402_10V7K R696 R697
10K_0402_5% 10K_0402_5%
1

2 1 SIO_SLP_S4#

1
VCIN0_PH
CE28 NESD@ SHORT@
RE44 VCIN1_PROCHOT
0.1U_0402_10V7K 0_0402_5%
A Please close to EC A
2

<12,34> H_PROCHOT# H_PROCHOT# 2 1 VCOUT1_PH


SHORT@
0_0402_5% RE13
FAN_SPEED1

1
CE29

220P_0402_50V7K
2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

P32-EC ENE-KB9012
WWW.AliSaler.Com
Please close to EC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 32 of 44
5 4 3 2 1
5 4 3 2 1

Main Func = Screw Hole

D D

CLIP1
1 @
1
EMIST-SQ-26G_1P

Screw Hole
H1 H2 H3 H4
H_3P2 H_4P0N H_3P0 H_3P0 CLIP3
@ @ @ @ 1 @
1
1

1
EMIST_SQ-55G_1P
C C
H9 H10 H7
H_3P0 H_3P0 H_3P0x3P8N
@ @ @
1

H5 H6 H11 H12
H_3P3 H_3P3 H_3P3 H_3P3
@ @ @ @ CPU StandOff
1

B B
FD1 FD2 FD3 FD4
@ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL
1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/11/10 Deciphered Date 2015/11/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P33-Screw Hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 33 of 44
5 4 3 2 1
A B C D

EMI@
PL1
VIN PSID@ PR1
PSID@

FBMJ4516HS720NT_2P 33_0402_5%
@ PJPDC1 ADPIN 1 2 1 3 PSID-3 1 2 PS_ID <32>

S
PQ1
8 EMI@ FDV301N_G 1N SOT23-3
GND 7 EMI@ EMI@

1000P_0402_50V7K

1000P_0402_50V7K

G
2
GND

1
100K_0402_1%
EMI@ PSID@

100P_0402_50V8J

100P_0402_50V8J
PR3

2
6 PSID@ PR4
6

PC1

PC2

PC3

PC4

PR2
5 PSID-2 2 1 2.2K_0402_5%
5 +5VALW
4 @EMI@ PL2

2
4 3 FBMJ4516HS720NT_2P 10K_0402_1%

2
3 2 1 2 PSID@ +3VALW

1
2

1
1 1 C 1
1 @ PJP1 2
PSID-1 PQ2
1 2 B

15K_0402_1%
PSID@ MMST3904-7-F_SOT323~D

2
ACES_50458-00601-001 E

3
PR5
PSID@
PAD-OPEN 1x3m
PL3
BLM15AG102SN1D_2P

1
PSID 2 1
EMI@

@ PJP4
1 2
BATT+ 1 2 BATT++
JUMP_43X79

@EMI@
BATT+

PL4
FBMJ4516HS720NT_2P
1 2 BATT++
1

1000P_0402_50V7K
0.01U_0402_25V7K
1

PC6
PC5

1
2

1
PD2 EMI@
PD1 EMI@ TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3

3
2

3
SMART 2015/01/15
BATT_TEMP <32,40>
Battery: @ PBATT1
01.GND 1
1
02.GND 2 PR6 PR7
2 3 SYS_PRES 200_0402_1% 10K_0402_1%
2
03.SYS_PRES 3 4 BATT_PRS 1 2 1 2
2

04.BATT_PRS 4 5 DAT_SMB +3VALW


5
05.DAT_SMB 6
6 CLK_SMB
06.CLK_SMB 7
7 8
07.BATT1+ 8 9 PR8
08.BATT2+ GND 10 100_0402_5%
GND 1 2 EC_SMB_CK1 <32,40>
SUYIN_200277GR008M270ZR

1 2 EC_SMB_DA1 <32,40>
PR9
100_0402_5%
CPU thermal protection at 91 +/- 3 degree C ( shutdown )
Other component (37.1)

ADP_I <32,40>
+EC_VCCA
Erp lot6 Circuit VIN

1
1
Delay adaptor OC H_PROCHOT# PR10
PR11
30.1K_0402_1%
3.3K_1206_5%~D

2ms while hybrid power 16.9K_0402_1%


1

ERP_LOT6 <32>
transition @

2
PR12

H_PROCHOT# H_PROCHOT# <12,32> PR13

2
2 1 @
<32> VCIN0_PH
PR14 PR15
0_0402_5%
2

ACIN <17,32,40> 1 2
VCIN1_PROCHOT <32>
3 2

1M_0402_1%
0_0402_5%
@
6

PR17
DMN66D0LDW-7 2N SOT363-6

1
PQ3B

160K_0402_1%
1
1

DMN66D0LDW-7 2N SOT363-6

5 PR22 PR23
PQ4A

@ PR16 VCOUT1_PH 1 2 2 60.4K_0402_1% 115K_0402_1%


6

1 2 VCOUT1_PH <32>
DMN66D0LDW-7 2N SOT363-6

0.01U_0402_25V7K
4

200K_0402_1% @ PR18

2
1
PQ3A

10K_0402_1%
1

PR19
PC9

DMN66D0LDW-7 2N SOT363-6
2

3 3
2

0.01U_0402_25V7K
DMN66D0LDW-7 2N SOT363-6
1

1
10K_0402_1%

1M_0402_1%
1

1
1

PR21 1

PQ10B
2

PC12
@ PC8 @
1

PQ10A
@ PC7 PR20
0.1U_0402_25V6 PH1 1000P_0402_50V7K 5 787K_0402_1%

2
@
2

100K 1% 0402 B25/50 4250K 2

2
4
2

1
B+
Adapter protection:
if battery removed, adaptor only, <32> AD_I_HW2
<32> AD_I_HW1
then trigger the H_PROCHOT#,
2

keep @ in BOM since battery can not @ PR34


be removed by end user 80.6K_0402_1% ADP_I(with selector) to support "PWC" function.
1

@ PR36
0_0402_5% H_PROCHOT# AD_I_HW1 AD_I_HW2
H_PROCHOT# 1 2 VCIN1_BATT_DROP <32>

35W 0 0
1
3

PC11 @ PR35 45W 1 0


.1U_0402_16V7K @ PC10 10K_0402_1%
DMN66D0LDW-7 2N SOT363-6
PQ4B

1
BATT_TEMP 2 5 0.1U_0402_25V6 55W 0 1
2
100K_0402_1%

4
1

65W 1 1
PR26

4 4
2

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

P34-PWR_DCIN/BATT CONN/OTP
WWW.AliSaler.Com A B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Date:
Document Number

LA-B911P
Tuesday, June 16, 2015
D
Sheet 34 of 44
Rev
1.0
A B C D E

5VALWP
3VALWP TDC 5.3A
TDC 5.25A Peak Current 6.62A
Peak Current 6.56A OCP current 8.61A
OCP current 8.53A
+3VLP
PC105
1U_0603_10V6K
1 2
1 1

@ PC106 @ PC107
100P_0402_50V8J 100P_0402_50V8J
1 2 1 2

PR100 PR101
6.49K_0402_1% 15K_0402_1%
1 2 1 2
VFB=2V VFB=2V

PR102 PR103
10K_0402_1% 10K_0402_1%
1 2 1 2

@PJP102
JUMP_43X118
1 2
1 2 B+_3/5V
PR104 PR105
147K_0402_1% 180K_0402_1%
PL102 @EMI@ 1 2 1 2
FBMJ4516HS720NT_2P
B+ 1 2 B+_3/5V

10U 25V K X5R 0805


1

PC108
FB_3V

FB_5V
2200P_0402_50V7K

CS2

CS1
0.1U_0402_25V6

10U 25V K X5R 0805

PU100

2
1

1
@ PC109

PC110

PC111

TPS51225CRUKR QFN 20P PWM

5
5

1
2 PR106 2
2

10K_0402_5%

CS2

VFB2

VREG3

VFB1

CS1
+3VALWP 1 2
PAD
21
EN_3V 6
EN2 20 EN_5V
PQ101 PQ102
4 EN1 @ PR117 4
MDV1528URH_PDFN33-8-5 7 0_0402_5% MDV1528URH_PDFN33-8-5
<30,32,39> SPOK PGOOD 19 1 2
VCLK
LX_3V 8

3
2
1
1
2
3

PL100 PC112 @ SW2 18 LX_5V


4.7UH_5.5A_20%_7X7X3_M 0.1U_0603_25V7K PR107 SW1 @ PC113 PL101
1 2 1 2 1 2 BST_3V 9 PR108 0.1U_0603_25V7K 4.7UH_5.5A_20%_7X7X3_M
+3VALWP VBST2 17 BST_5V 1 2 1 2 1 2
VBST1 +5VALWP
0_0603_5%
1
4.7_1206_5%

4.7_1206_5%
UG_3V 10 0_0603_5%
DRVH2

1
@ PR109

@ PR110
16 UG_5V

VREG5
DRVL2

DRVL1
DRVH1

VO1
5

5
VIN

ESR=15m ohm
150U_D2_6.3VY_R15M

150U_D2_6.3VY_R15M
PQ103 PQ104
1 SNB_3V 2
ESR=15m ohm

1 1

11

12

13

14

15

1 SNB_5V 2
MDV1527URH_POWERDFN33-8-5 MDV1527URH_POWERDFN33-8-5

680P_0603_50V8J
PC102

PC103
+ +
4 4
680P_0603_50V8J

LG_3V LG_5V

2 2
@ PC114

@ PC115
PR111
2.2_1206_1% +5VALWP
1
2
3

3
2
1
2

2
B+_3/5V 1 2
VL

1U_0603_25V6K

1U_0603_10V6K
1

1
@ PC116

PC117
3 3

2
@
PR112
EN_5V 1 2
0_0402_5%

EN @
Rising=1.6~0.3V EN_3V 1
PR113
2
@ PR114
0_0402_5% 0_0402_5%

1 2
<32> VCOUT0_PH
PR115
2.2K_0402_1%
1 2 EN_5V3V
<32> EC_ON
@PJP100
JUMP_43X118
+5VALWP 1 2 +5VALW
1 2
4.7U_0805_25V6-K
402K_0402_1%
1

1
@ PR116

PC118

@ PJP101
JUMP_43X118
4 +3VALWP 1 2 +3VALW 4
2

1 2
2

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P35-PWR-3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B911P 1.0

Date: Tuesday, June 16, 2015 Sheet 35 of 44


A B C D E
A

1.35VP
TDC 3.6A
Peak Current 4.5A
OCP current 6A

@EMI@PL201
SUPPRE_ 5A Z120 25M 0805
1 2

@ PJP200
JUMP_43X118
1 2 B+_1.35VP
B+ 1 2 0.675Volt +/- 5%
TDC 0.7A

2200P_0402_50V7K
0.1U_0402_25V6

10U 25V K X5R 0805

10U 25V K X5R 0805


Peak Current 1A
1

1
@ PC203

PC204

PC205

PC206
@
PR200
BST_1.35VP 1 2 BOOT_1.35VP
+1.35VP
2

2
0_0603_5%

DH_1.35VP +0.675VSP

10U_0805_10V6K

10U_0805_10V6K
SW_1.35VP

1
PC207

PC208

PC209
PQ201

D1

D1

D1

G1
AON7934_DFN3X3A8-10 0.1U_0603_25V7K

16

17

18

19

20
2
PU200

2
10 9

PHASE

VTT
UGATE

BOOT

VLDOIN
D1 D2/S1 21
PAD
DL_1.35VP 15 1

G2
S2

S2

S2
LGATE VTTGND

8
14 2
PR201 PGND VTTSNS
5.62K_0402_1%
1 2 CS_1.35VP 13 3
PC210 CS RT8207PGQW_WQFN20_3X3 GND
1U_0603_10V6K
1 2 12 4 VTTREF_1.35VP
PR203 VDDP VTTREF
5.1_0603_5%
PL200 1 2 VDD_1.35VP 11 5
+5VALW VDD VDDQ +1.35VP

1
1UH_11A_20%_7X7X3_M PC212

PGOOD
2
1 2

TON
+1.35VP

1
1 1
PC213 PR209 0.033U_0402_16V7K

FB
S5

S3

2
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

2.2_0603_1% @ PC216
1

1U_0603_10V6K 220P_0402_25V8J

10

6
1 2

1
@ PR202

FB_1.35VP
TON_1.35VP
1

1
PC220

PC221

PC222

PC223

PC224

PC225

4.7_1206_5%

EN_1.35VP

EN_0.675VSP
+5VALW PR204
1 2

<8> DDR_PWROK 54.9K_0402_1%


+1.35VP
2

PR205 1 2
@ PC211 1 2 453K_0402_1%
680P_0402_50V7K +1.35VP B+_1.35VP 1 2
2

PR210

1
10K_0402_5%

PR207 PR206
680K_0402_1% 68.1K_0402_1%
1 2

2
<32> SYSON

1
@ PC214
0.1U_0402_10V7K

2
PR208
Mode Level +0.75VSP VTTREF_1.5V 200K_0402_1% @ PJP201
1 2 JUMP_43X118
S5 L off off <30,32,38> SUSP# 1 2
S3 L off on +1.35VP 1 2 +1.35V

1
S0 H on on
PC215
0.1U_0402_10V7K
Note: S3 - sleep ; S5 - power off

2
@ PJP202
JUMP_43X39
1 2
+0.675VSP 1 2 +0.675VS

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P36-PWR-1.35VP/0.675VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.0

WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B911P
Date: Sheet 36 of 44
A
5 4 3 2 1

+3VALW PC300 @ PJP301


22U_0603_6.3V6M
1 2
1 2 +1.15VALWP 1 2 +1.15VALW

100K_0402_1%
@ PJP300 PU300 PL300
JUMP_43X39

2
1UH +-20% 2.3A 2.5X2X1.2 FERRITE
+3VALW

PR310
1 2 4 3 LX_1.15VALWP 1 2
1 2 IN LX +1.15VALWP
5 2

68P_0402_50V8J
JUMP_43X39 PG GND

1
PC301
6 1

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
+1.15VALW_PWRGD
@ PR301

PC302

PC303
SY8032ABC_SOT23-6

2
D
2015/5/4 @ PR300 4.7_0603_5% PR302 +1.15VALWP D

2
0_0402_5% 20K_0402_1%
1 2 +1.15VALWP_ON TDC 0.64A
<37,39> 1.05VALW_PWRGD

2
Rup Peak Current 0.8A
OCP current 3.5A

1
1 2
<32> 1.15VALWP_EC

1
RE63 @ 0_0402_5% PR303 PC304 FB_1.15VALWP
1M_0402_1% .1U_0402_16V7K
<30,42> VR12.1_VR_ON

1
@

1
@ PC305 PR304
680P_0402_50V7K 21.5K_0402_1%
VFB=0.6V
Rdown

2
Vout=0.6V* (1+Rup/Rdown)

2
C C

+3VALW
PC307
22U_0603_6.3V6M
100K_0402_1%
2

1 2
PR311

@ PJP302 PU301 PL301


1UH +-20% 2.3A 2.5X2X1.2 FERRIT
+3VALW 1 2 4 3 LX_1.24VALWP 1 2
1 2 IN LX +1.24VALWP
1

5 2

68P_0402_50V8J
JUMP_43X39 PG GND

1
6 1

PC310

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
<38> +1.24VALW_PWRGD
@ PR306

PC311

PC308
SY8032ABC_SOT23-6

2
2015/5/4 PR308 @ 4.7_0603_5% PR307

2
0_0402_5% 21.5K_0402_1%
+1.15VALW_PWRGD 1 2 +1.24VALWP_ON

2
Rup
1

1 2
<37,39> 1.05VALW_PWRGD
1

RE62 0_0402_5% PR305 PC309 FB_1.24VALWP


HW@ 1M_0402_1% .1U_0402_16V7K
@ PJP303
2

1
B 1 2 B
2

+1.24VALWP
1

1 2 +1.24VALW
@ PC306 PR309
680P_0402_50V7K 20K_0402_1%
VFB=0.6V JUMP_43X79
Rdown
2

Vout=0.6V* (1+Rup/Rdown)

2
+1.24VALWP
TDC 0.72A
Peak Current 0.9A
OCP current 3.5A

A A

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title
P37-PWR-1.15VSP/1.24VALWP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
LA-B911P 1.0

Date: Sheet 37 of 44
5 4 3 2 1
A B C D

+3VALW
PC400
22U_0603_6.3V6M

100K_0402_1%
2
1 2 @ PJP401

PR430
PU400 PL400
1UH +-20% 2.3A 2.5X2X1.2 FERRITE 1 2
+3VALW 1 2 4 3 LX_+1.8VALW P 1 2 +1.8VALWP 1 2 +1.8VALW
1 2 IN LX +1.8VALWP

1
5 2 JUMP_43X39

68P_0402_50V8J
@ PJP400 JUMP_43X39 PG GND

1
1 1
6 1

PC401

22U_0603_6.3V6M

22U_0603_6.3V6M
FB EN

1
<30> +1.8VALW_PWRGD
@ PR401

PC402

PC403
SY8032ABC_SOT23-6

2
@ 4.7_0603_5% PR402

2
PR400 40.2K_0402_1%
1 2 +1.8VALW P_ON
<37> +1.24VALW _PW RGD +1.8VALWP

2
0_0402_5% Rup TDC 1.34A

1
Peak Current 1.68A

1
PR403 PC404 FB_+1.8VALW P
1M_0402_1% .1U_0402_16V7K OCP current 3.5A

1
@

1
@ PC405 PR404
680P_0402_50V7K 20K_0402_1%
VFB=0.6V
Rdown

2
Vout=0.6V* (1+Rup/Rdown)

2
Vout=1.806V

2 2

+1.8VALW +5VALW
1

PC411
1

1U_0402_6.3V6K
JUMP_43X39
2
2

@ PJP404
2

PC412 PU402
1

G971ADJF11U SO 8P
4.7U_0603_6.3V6K 6
5 VCNTL 3
@ @ PJP405
2

PR409 9 VIN VOUT 4


42.2K_0402_1% VIN VOUT
+1.5VSP +1.5VSP 1
1 2
2 +1.5VS

1
1 2 8

17.8K_0402_1%
<30,32,36> SUSP# EN

1
7 2
GND

POK FB JUMP_43X39

PR410
@ PC413
1

0.01U_0402_25V7K
Rup
.1U_0402_16V7K

1
3 3
PC415

PC414
1

2
PR411 @ 22U_0603_6.3V6M
2

20K_0402_1% @

2
2

@
1
@
+1.5VSP
@ @ TDC 0.62A
PR412
20K_0402_1% Peak Current 0.77A
Rdown OCP current 3A
2

@
Vout=0.8V* (1+Rup/Rdown)
Vout=1.512V

4 4

DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title
P38-PWR-1.8VALW/1.5VSP

WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

LA-B911P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, June 16, 2015 Sheet 38 of 44
A B C D
5 4 3 2 1

D D

@
1
PR500
2
+1.05VALW
SPOK <30,32,35>
C
0_0402_5%
TDC 4.56A C

Peak Current 5.7A

1
PR501 @ PC500 OCP current 9A
1M_0402_1% 0.22U_0402_10V6K

2
2
@ PJP501
1 2
1 2 B+_1.05V
JUMP_43X79 @EMI@ PR502 @EMI@ PC501
4.7_1206_5% 680P_0603_50V7K @ PJP500
@EMI@ PL501 1 2SNUB_1.05V 1 2 JUMP_43X118
SUPPRE_ 5A Z120 25M 0805 PU500 1 2
+1.05VALWP 1 2 +1.05VALW
B+ 1 2 8
IN EN
1 EN_1.05V @
PR503
PC504
0.1U_0603_25V7K
0.1U_0402_25V6

10U_0805_25V6K

10U_0805_25V6K

6 BST_1.05V 1 2BST_1.05V_R 1 2 PL103


2200P_0402_50V7K

BS
1

1UH_6.6A_20%_5X5X3_M
EMI@ PC502

@EMI@ PC503

PC505

PC506

LDO_3V 9
GND LX
10 LX_1.05V 0_0603_5% 1 2
+1.05VALWP

330P_0402_50V7K
2

10_0402_1%

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1

1
PC507

1
@ PR504 4 FB_1.05V

PR510

PC508

PC509

PC510

PC511
FB
Rup

2
0_0402_5% ILMT_1.05V 3 7
+3VALW

2
ILMT BYP PR505
2

2
4.7U_0603_6.3V6K
ILMT_1.05V 2 5 LDO_3V 100K_0402_1%
<37> 1.05VALW_PWRGD
4.7U_0603_6.3V6K
PG LDO
1
1 2

PC513
1

SYX196DQNC_QFN10_3X3
PC512

PR506 @ PR507 FB = 0.6V


2

1
100K_0402_1%
2

0_0402_5% 1 2 PR508
+3VALW
Rdown @
2

133K_0402_1% PR509
1 2 VNN_SENSEP <12>

2
0_0402_5%
Pin 7 BYP is for CS.
B
The current limit is set to 6A, 9A or 12A when this pin B
is pull low, floating or pull high
VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Vout=1.05V

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/06/15 Deciphered Date 2012/07/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VCCP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, June 16, 2015 Sheet 39 of 44
5 4 3 2 1
A B C D

VIN
PQ705 Iada=0~3.34A(65W)
PQ704 SI4483ADY_SO8 P3
AO4407AL_SO8 P2
8 1 1 8 ADP_I = Iadapter*Rsense*Current sense amplifier vlotage gain
7 2 2 7
6 3 3 6
5 5
PR700 B+ PQ706
0.01_1206_1% AO4407AL_SO8

4
1 8
1 4 2 7

1
3 6

0.1U_0603_25V7K
3

1
PQ707 2 3 CSIN @PJP700 5

200K_0402_1%
PC700

PR701
LMUN5113T1G PNP SOT323-3 JUMP_43X118

5600P_0402_25V7K
1

1 1
CSIP 1 2

4
1 2

2
2

PC701
200K_0402_1%

2
CHG_B+
PR702

PL701
1UH_2.8A_30%_4X4X2_F

1
1 2
2

@EMI@
1

2200P_0402_25V7K

0.1U_0603_25V7K
1
PQ708

10U_0805_25V6K

10U_0805_25V6K
LMUN5236T1G NPN SOT323-3

PC702

PC703
10_0402_5%

10_0402_5%
@

1
V1 2 VIN
1

1
PR704

PR705

PC704

PC705
PR703

0.1U_0603_25V7K

2
150K_0402_1%

DMN66D0LDW-7 2N SOT363-6
PR706

0.1U_0603_25V7K
3

3
200K_0402_1%
2

2
1 2
VIN

2
PQ710B
PR707
DMN66D0LDW-7 2N SOT363-6

2
5

PC706

PC707
BATT_TEMP 10_1206_1%
6

2
1 2 PC709

0.1U_0402_10V7K

1
1

2
ISL88731_ICREF
PC708
PQ709A

PQ709B 0.047U_0603_25V7M PC710

1
1
5 DMN66D0LDW -7 2N SOT363-6 1 2 1U_0603_10V6K PR708

1
2 PC711 47K_0402_1%

2
1 VDDP_LDO

@ 1U_0603_25V6K PR709
4

2
4.7_0603_5%
1

1 1
VIN 2 1

232K_0402_1%
PC712 @ PC713

LMUN5236T1G NPN SOT323-3


2
0.01U_0402_50V7K PR713 0.1U_0603_25V7K
100K_0402_1%

28

27
PR714

1
PU700

PQ711
1 2

PR711
2 1 BST_CHGA 1 2
PR710

2 1 2 V1

ICREF

CSSP

CSSN
2 DCIN 22 26 0_0603_5% 2

DCIN ICOUT
PR715

1
1 2 ACSETIN 2 100K_0402_1%
ACIN
2

MDV1525URH 1N PDFN33-8
5
PR712 25 BST 1 2
BOOT

3
200K_0402_1% ACIN 49.9K_0402_1% 13
<17,32,34> ACIN ACOK
ACIN 1 2 +5VALW PC714
1

11 1U_0603_10V6K
158K_0402_1%

VDDSMB

PQ701
PR716

0.1U_0402_10V7K

@
LMUN5236T1G NPN SOT323-3

10 4
PR717 SCL
1

<32,34> EC_SMB_CK1
1

PC715

1 2
9 21 VDDP_LDO
SDA VDDP
2

0_0402_5% PR720
2

ACOFF <32> 14
PR718 @ PR719 PL700
NC

3
2
1
<32,34> EC_SMB_DA1 24 DH_CHG
PQ712

1 2 2 1 2 0.01_1206_1%
UGATE
0_0402_5%
8
VICM 23 LX_CHG
10UH_3.5A_20%_7X7X3_M BATT+
1 2 CHG
1 4
10K_0402_5% 6 PHASE

4.7_1206_5%
FBO
2 3
DMN66D0LDW-7 2N SOT363-6

1
5
EAI

MDV1525URH 1N PDFN33-8
6

PR721
4 20 DL_CHG
PQ710A

2ISL88731_VREF
4.7K_0402_5%

EAO LGATE

10U 25V K X5R 0805

10U 25V K X5R 0805

10U 25V K X5R 0805

10U 25V K X5R 0805


2

10_0402_5%
@

1 2

1
PQ703
PR723

PC717

PC718

PC719

PC720
PR722 SNB_CHG
100_0402_1% ISL88731_VREF 3 19 4

680P_0402_50V7K
34> BATT_TEMP VREF PGND
1

18

PC716

PR724
CSOP

2
@
221K_0402_1%
1

2
7 17
CE CSON

2
PR725

@
@

3
2
1
15 VFB 1 PR726 2
63.4K_0402_1% 287K_0402_1%

VFB BATT+
2

12
2200P_0402_25V7K

<32,34> ADP_I GND 16


PR727

100_0402_5%
0.1U_0402_10V7K

NC
1

3 3
29
PC721

PC722
TP
1 2
1
PC723
2

ISL88731_ICREF ISL88731CHRTZ-T TQFN 28P PW M 0.22U_0603_25V7K


@ PC726
2
2

@ 1 2
28.7K_0402_1%
2

PR729
0.01U_0402_25V7K

PR728

PC725 0.1U_0603_25V7K
1
PC727

0.1U_0402_16V7K
1

@
2

For DT Mode
VIN
3.3K_1206_5%~D

1
PR730

V1
DMN66D0LDW-7 2N SOT363-6
3 2

4 4
DMN66D0LDW-7 2N SOT363-6
6

PQ713B
PQ713A

ACOFF 5
BATT_TEMP 2 DELL CONFIDENTIAL/PROPRIETARY
4

Security Classification Compal Secret Data Compal Electronics, Inc.


1

Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title


P40-PWR-Charger
WWW.AliSaler.Com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev

LA-B911P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, June 16, 2015 Sheet 40 of 44
A B C D
5 4 3 2 1

VCC_CORE_B+ @EMI@ PL601


SUPPRE_ 5A Z120 25M 0805
1 2
RT8171B Operating Frequency Fsw about 600KHz B+
@ PJP601

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

2200P_0402_50V7K
0.01U_0402_50V7K
1 2

33U_D2_25VM_R40M
1 2

PC601

PC602

PC603

EMI@ PC604

EMI@ PC605
1

1
JUMP_43X79
+

PC619
@
VCC_CORE

UG_CPU

2
Peak Current 7.7A 2

OCP current 9.66A

1
D DCR : MAX 0.98+/- 5% mohm D
PL600

D1

D1

D1

G1
0.22UH_24A_20%_7X7X4_MOLDING
10 9 LX_CPU 1 4
D1 D2/S1 +VCC_CORE
2 3

1
PQ600

G2
S2

S2

S2
Close to IC AON7934_DFN3X3A-8-10 @EMI@ PR600

1
5

8
4.7_1206_5% PR601
2.55K_0402_1%

2 SNUB_CPU1
2
PC606

LG_CPU

2
PC607
0.1U_0402_25V6 0.1U_0603_25V7K

1
VSUM-_CPU1 1 2

1
LX_CPU @EMI@ PC608
PR604
10K_0402_1% PR602 PC609 680P_0603_50V7K @ PR603

2
2 1 @ 2.2_0603_1% 0.22U_0603_25V7K 0_0402_5%
+5VALW PR605 BST_CPU 2 1 2 1 VSUM+_CPU 1 2
1 2 VGG_PWRGD <42>

1
+VREF_CPU PR608 PR606 PR607 0_0402_5%
20.5K_0402_1%

1
2 1 10K_0402_1% 680_0402_1% PC610

VR_VBOOOTSEL_CPU
2

2
100K_0402_1%_B25/50 4250K SETGND_CPU 0.1U_0402_25V6 VSUM-_CPU1

VR_ENABLE_CPU

2
PR609 PR610
PH600
8.06K_0402_1% 22.6K_0402_1% @

VSUM+_CPU

VSUM-_CPU
2 1 2 1 2 1 VR_IMON_CPU

UG_CPU
Close to Choke

33

32

31

30

29

28

27

26

25
C PR612 PR613 +VREF_CPU C
2

10K_0402_1% 68K_0402_1%

GND

NC

IMON

VBOOTSEL
SETGND

ISENN

EN
ISENP

UGATE
PR611 2 1 2 1
PC611
+VCC_CORE 100_0402_5% 0.47U_0603_16V7K
@ PC612 PC613 2 1 1 24 DRV_EN1_CPU
1

270P_0402_50V7K 47P_0402_50V8J VREF DRV_EN


PR614
2 1 2 1 2 1 2 23 LX_CPU
<12> VCCSENSE COMP PHASE
1

0_0402_5% @ 3 PU600 22 BST_CPU PR616


PC614 FB RT8171CGQW_WQFN32_4X4 BOOT 2.2_0402_5%
PR615
0.1U_0402_25V6@ VR_SEN2_CPU 2 1 VR_VSEN1_CPU 4 21 PVCC_CPU 2 1
+5VALW
2

VSEN PVCC
PR617
PR618 0_0402_5%

1
2 1 5 20 LG_CPU PC615
<12> VSSSENSE RGND LGATE
2.2_0402_5%
0_0402_5% 1 2 VCC_CPU 6 19 2.2U_0402_25V6M
+5VALW

2
VCC PGND
1

@
PR619 VR_SET1_CPU 7 18 DRV_EN1_CPU
SET1 DRV_EN
1

100_0402_5% PC616 VR_SET2_CPU 8 17 VGATE <32>


SET2 VR_READY
2

TONSET
VR_HOT
2.2U_0402_25V6M PR621

ALERT
VCC_CPU
2

TSEN

VCLK
IBIAS
10K_0402_1%
SET3

VDIO
1 2
+3VALW
9

10

VR_TSEN_CPU 11

12

13

14

15

16
VR_IBIAS_CPU
VR_SET3_CPU

TONSET_CPU

1
VR_HOT#

PR627
124K_0402_1%
PR623 PR624

1
PR625 910K_0402_5% 1_0402_1%

2
100K_0402_1% 1 2 1 2 PR628
100K_0402_1%_B25/50 4250K 1 2 VCC_CORE_B+ 29.4K_0402_1%

1
PR626
PH601
5.36K_0402_1% PR629

2
1

1
B B
2 1 1 2 PC617
+5VALW PR631 49.9K_0402_1% 2015/01/15
PR630 0.1U_0402_25V6 4.3K_0402_1%

2
100K_0402_1%
1 2 PR632

2
6.98K_0402_1%
SETGND_CPU 1 2 VR_SET3_CPU

+1.8VALW VR_SET2_CPU
49.9_0402_1%
2

VR_SET1_CPU
@ PR633
PR642

75_0402_5%

1
1

<32,42> VR_HOT# PR634 PR635 PR636


22.1K_0402_1% 1.15K_0402_1% 2015/01/15
20_0402_1%
2

PC618 17.4K_0402_1%
0.1U_0402_25V6
PR641

2
1 2
1

PR638
200_0402_1%
2

300_0402_1%
1 2
PR643

SETGND_CPU
@ PR639
150_0402_1%
1

1 2
+1.05VALW
PR640
200_0402_1%
1 2

<12> VCC_SVID_DAT
A A

<12,42> VR_SVID_ALRT#

<12,42> VR_SVID_CLK

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_COREP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P
Date: Tuesday, June 16, 2015 Sheet 41 of 44
5 4 3 2 1
5 4 3 2 1

VGG_CORE_B+ @EMI@ PL801


SUPPRE_ 5A Z120 25M 0805
1 2
RT8171B Operating Frequency Fsw about 600KHz B+
@ PJP801

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

2200P_0402_50V7K
0.01U_0402_50V7K
1 2
1 2

PC801

PC802

PC803

EMI@ PC804

EMI@ PC805
1 1

1
JUMP_43X79
+ +

33U_D2_25VM_R40M

33U_D2_25VM_R40M
PC800

PC819
2

2
VGG_CORE 2 2

1UG_VGG
@
Peak Current 11A
@
OCP current 15.18A PQ800

2
D DCR MAX : 0.98 +/- 5% m ohm D
PL800

D1

G1
AON6970_DFN5X6D-8-7
0.22UH_24A_20%_7X7X4_MOLDING
7 LX_VGG 1 4
D2/S1 +VGG_CORE
2 3

1
G2
S2

S2

S2
Close to IC @EMI@ PR801

1
4.7_1206_5%
PR800

2
2.2K_0402_1%

SNUB_CPU2
LG_VGG
2
PC806
LX_VGG PC807

2
0.1U_0402_25V6 0.1U_0603_25V7K

1
VSUM-_VGG1 PR802 PC808 1 2

1
2.2_0603_1% 0.22U_0603_25V7K @EMI@ PC809
PR803 BST_VGG 2 1 2 1
10K_0402_1% 680P_0603_50V7K @ PR805

2
2 1 @ 0_0402_5%
+5VALW PR804 VSUM+_VGG 1 2
1 2 VR12.1_VR_ON <30,37>

1
+VREF_VGG PR808 PR806 PR807 0_0402_5%
16.5K_0402_1%

1
2 1 10K_0402_1% 680_0402_1% PC810

VR_VBOOOTSEL_VGG
2

2
100K_0402_1%_B25/50 4250K SETGND_VGG 0.1U_0402_25V6 VSUM-_VGG1

VR_ENABLE_VGG

2
PR809 PR810
PH800
12.1K_0402_1% 11K_0402_1% @

VSUM+_VGG

VSUM-_VGG
2 1 2 1 2 1 VR_IMON_VGG

UG_VGG
Close to Choke

33

32

31

30

29

28

27

26

25
C PR812 PR813 +VREF_VGG C
2

10K_0402_1% 68K_0402_1%

GND

NC

IMON

VBOOTSEL
SETGND

ISENN

EN
ISENP

UGATE
PR811 2 1 2 1
PC812
+VGG_CORE 100_0402_5% 0.47U_0603_16V7K
@ PR814 PC813 PC811 2 1 1 24 DRV_EN1_VGG
1

0_0402_5% 220P_0402_50V7K 68P_0402_50V8J VREF DRV_EN


2 1 2 1 2 1 2 23 LX_VGG
<12> VGG_SENSEP COMP PHASE
1

PC814 @ 3 22 BST_VGG PR816


0.1U_0402_25V6 2015/3/24 FB BOOT 2.2_0402_5%
PR815
@ @ VR_SEN2_VGG 2 1 VR_VSEN1_VGG 4 PU800 21 PVCC_VGG 2 1
+5VALW
2

VSEN PVCC
PR817

1
<12> VGG_SENSEN 2 1 PR818 0_0402_5% 5 20 LG_VGG PC815
2.2_0402_5% RGND RT8171CGQW_WQFN32_4X4 LGATE
0_0402_5% 1 2 VCC_VGG 6 19 2.2U_0402_25V6M
+5VALW

2
VCC PGND
1

PR819 7
VR_SET1_VGG 18 DRV_EN1_VGG
SET1 DRV_EN
1

100_0402_5% PC816 8
VR_SET2_VGG 17 VGG_PWRGD <41>
SET2 VR_READY VCC_VGG
2

TONSET
VR_HOT
2.2U_0402_25V6M PR821

ALERT
2

TSEN

VCLK
IBIAS
10K_0402_1%
SET3

VDIO
1 2
+3VALW
9

VR_IBIAS_VGG 10

VR_TSEN_VGG 11

12

13

14

15

16

1
PR827
VR_SET3_VGG

124K_0402_1% PR828 PR829

TONSET_VGG
12.4K_0402_1%
VR_HOT#

9.31K_0402_1% 2015/01/15

2
PR823 PR824
PR825 1M_0402_1% 1_0402_1%
100K_0402_1% 1 2 1 2
100K_0402_1%_B25/50 4250K 1 2 VGG_CORE_B+
PR826
PH801
5.23K_0402_1%

1
B B
2 1 1 2 PC817 PR831
+5VALW 4.3K_0402_1%
PR830 0.1U_0402_25V6

2
100K_0402_1%
1 2 PR832

2
6.49K_0402_1%
SETGND_VGG 1 2 VR_SET3_VGG
20_0402_1%

+1.8VALW
2

VR_SET2_VGG
PR841
2

VR_SET1_VGG
@ PR833
1

75_0402_5%

1
49.9_0402_1%
1

<32,41> VR_HOT# PR834 PR835 PR836


22.1K_0402_1% 1.15K_0402_1% 2015/01/15
PR842

PC818 4.02K_0402_1%
0.1U_0402_25V6

2
1 2
1

PR837
200_0402_1%
2

300_0402_1%
1 2
PR843

SETGND_VGG
@ PR839
150_0402_1%
1

1 2
+1.05VALW
PR840
200_0402_1%
1 2

<12> VGG_SVID_DAT
A A

<12,41> VR_SVID_ALRT#

<12,41> VR_SVID_CLK

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_COREP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C571P

WWW.AliSaler.Com
Date: Tuesday, June 16, 2015 Sheet 42 of 44
5 4 3 2 1
4
3
2
1
+VCC_CORE

@
PC861

+VCC_CORE

A
A

220U_D2_2VY_R15M
2
1
+

22U_0603_6.3V6M PC851
2 1
2
1

PC871 22U_0603_6.3V6M PC852


22U_0603_6.3V6M
2
1

2 1
22U_0603_6.3V6M PC853
PC872
2
1

22U_0603_6.3V6M
2 1 22U_0603_6.3V6M PC854
2
1

PC873
22U_0603_6.3V6M 22U_0603_6.3V6M PC855
2 1
2
1

PC874 22U_0603_6.3V6M PC856


22U_0603_6.3V6M
2
1

22U_0603_6.3V6M PC857
22U_0603 * 14 + reserved+220uF 15m ohm

2
1

22U_0603_6.3V6M PC858
2
1

22U_0603_6.3V6M PC859
2
1

22U_0603_6.3V6M PC860
2
1

B
B

Place on CPU Back Side.


+VGG_CORE

+VGG_CORE

@
22U_0603_6.3V6M PC961 22U_0603_6.3V6M PC951
2 1
2
1
2
1

PC981 PC971 22U_0603_6.3V6M PC962 22U_0603_6.3V6M PC952

@
10U_0402_6.3V6M
2
1
2
1

2 1 220U_D2_2VY_R15M
22U_0603_6.3V6M PC963 22U_0603_6.3V6M PC953
2
1
+

PC982
2
1
2
1

@
10U_0402_6.3V6M
@

2 1 22U_0603_6.3V6M PC964 22U_0603_6.3V6M PC954


2
1
2
1

PC983

@
10U_0402_6.3V6M 22U_0603_6.3V6M PC965 22U_0603_6.3V6M PC955
2 1

Issued Date
2
1
2
1

C
C

PC984 22U_0603_6.3V6M PC966 22U_0603_6.3V6M PC956

Security Classification
10U_0402_6.3V6M
2
1
2
1

2 1
@

22U_0603_6.3V6M PC967 22U_0603_6.3V6M PC957


PC985
2
1
2
1

10U_0402_6.3V6M
22U_0603 * 16 +4 reserved+220uF 15m ohm

22U_0603_6.3V6M PC968 22U_0603_6.3V6M PC958


2
1
2
1

22U_0603_6.3V6M PC969 22U_0603_6.3V6M PC959


2
1
2
1

22U_0603_6.3V6M PC970 22U_0603_6.3V6M PC960

2011/07/08
2
1
2
1

+1.05V_VNN

Compal Secret Data


Deciphered Date
1 2

PC991

D
D

1U_0402_6.3V6K
+1.05V_VNN

1 2
22U_0603 * 3

PC992
1U_0402_6.3V6K
1 2
2015/07/08

PC993
1U_0402_6.3V6K
1 2 22U_0603_6.3V6M PC996
2
1

PC994
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1U_0402_6.3V6K 22U_0603_6.3V6M PC997


1 2
2
1

PC995 22U_0603_6.3V6M PC998


1U_0402_6.3V6K
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Title

Date:
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
LA-A721P
Size Document Number

Tuesday, June 16, 2015


E
E

Sheet
43
Compal Electronics, Inc.

of
PWR-PROCESSOR DECOUPLING

44
Rev
0.1
4
3
2
1
5 4 3 2 1

Version change list (P.I.R. List) Page 1of 2 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
PR829 change 976 from to 9.31Kohm , 15/01/15 EVT
1 For PS2/PS3 ripple PR836 change 412 from to 4.02K ohm

D D
PR629 change 39.2k from to 49.9Kohm ,
For PS2/PS3 ripple PR636 change 14k from to 17.4K ohm 15/01/15 EVT
2 PC612 change form 470pF to 270pF

Compal ESD team request PR6 change 100ohm from to 200 ohm 15/01/15 EVT
3
For HW power sequency PR300 change to reserve 4/05/15 DVT2
4
For HW power sequency PR308 change to reserve 4/05/15 DVT2
5

C C

B B

A A
7

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/02/26 Deciphered Date 2015/02/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

WWW.AliSaler.Com5 4 3 2
Date: Sheet
1
44 of 44

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