ao KM62256C ELECTRONICS CMOS SRAM 32Kx8 bit Low Power CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION + Process Technology : 0.7 um CMOS ‘The KM62256C family is fabricated by SAMSUNG's + Organization : 32K x 8 advanced CMOS process technology. The family + Power Supply Voltage : Single SV +/- 10% ean support various operating temperature ranges * Low Data Retention Voltage - 2V(Min) and has various package types for user flexibility of + Three state output and TTL Compatibie system design. The family also support low data + Package Type : JEDEC Standard retention voltage for battery back-up operations with 28-DIP, 28-SOP, 28-TSOP()-Forward/Reverse low data retention current PRODUCT FAMILY fi Power Dissipation’ Product Operating Speed PKG Type wer Dissipatic Family [Temperature Standby(Isb1, Max)|Operating(Icc2) 62286. | Commercial | 26:IP,28-S0P | __T00uR kM62256CL-L. | @~70 °c) _| 4575/75 | 26 ts0RW) RIF 20ua KMB2256CLE _ | Extended 28-SOP 100uA mie KMB2256CLE-L -p|_70/100ns Sous | 25-35 9 28-TSOP RE KM62256CLI | Industrial , 28-SOP 10008 Ke2256cLH | 40-85 °c) | 7/1"S | os TsOPW) RIE Sua "peed wh pF at ad PIN DESCRIPTION FUNCTIONAL BLOCK DIAGRAM 0-2, 40-11 moh whe cere es >Y-Decoder co oh Bee HS 2g spe SE LBS ! =e = Be et zepintsop 3 BS * 9 a SBS. SE: type t- Forward © Bet 9LI cenaray |_| 8 5G 28-Pin DIP » Ber “SE iB g 3 he 2H 2epn sop) Bs SE Gee & I 8 | cs.me ale Bh

t [uw ‘Operating power supply curren) Ico = | 7s | ma ‘Average operating current [lect |Gycle time=uS 100% duty ~ | - [a [ma Ies<02y, Viso.2v Vin Vee-0.2V, o=omA Toca [Min eycle, 100% duty ~ | - | 7 | ma /CS=Vil io=OmA (Output iow volage Vor__[lo!=2.1ma eae Roman ‘Output high voltage Von [lon=-1.0ma. za[-[-|v ‘Standby Current(TTL) 1sb__[/GS=Vin Easlrs mA ‘Standoy | Kwez2secL | Isbt |/CS=Voo-02v[LowPowery | - | 2 | 100 | ua Current |_kne22s6cLt Vin <0.2v or [Li 'Low Power [4] 20] ua. cemos) | Kwez2s6cLe Vin>Vec-0.2vfcow Powen | - | - | 100 | ua kiwe2256CLE-L Lui Low Power] | 50 | ua KIM622566L Low Powen [oe | ....190.. [ua KM62256CLIL Lu Low Power |S P50 | ua *7) Camera Product Ta-Ote 70°C Ve 2) Extended Product» Ta" 25 88 °C | Veo=S 3) Incustial Product: Ta=9 0 85°C | Ve fends “Oma for Extended ard Indus Products ‘ee2ma fer Etandee and Invstal Products 10%, uniees aherioe epecfes 10%, unless cherie spectied 10%, ures olen spootiod A.C CHARACTERISTICS TEST CONDITIONS(1. Test Load and Test Input/Output Reference)” item Value Remark input pulse level O8t024V : Input rise falltime Input and output reference voltage ‘Output load(See right) * See tet conan of DC and AC Operating eharacteatice Test oa for Ss Comma! Products * Inclusing scope and ig eapactance CD-ROMCFditon 3.0) This Data Sheet i subject to change without notice Page :4 ( KM62256C ) (©) 1996 Samsung Electonics Printed in Korea,ao KM62256C ELECTRONICS CMOS SRAM TEST CONDITIONS(2. Temperature and Vcc Conditions) Product Family Temperature | PowerSupply(Vcc) | Speed Bin Comments RME2256CUL-L O-70-C V+ 10% | _48758/70ns | Commercial KM62256CLE/LEL 25-85 °C SV 10% Tort0ons | Extended KM62256CLULI-L ~40~85 °C, SV +h 10% 7o/100ns [Industrial poraretes are mensud wih 3OPF tat ad PARAMETER LIST FOR EACH SPEED BIN ‘Speed Bins Parameter List Symboll 4sns_| s5ns_| 7ons | 100s | Units Min |Max| Min |Max| Min | Max} Min |Max| Read [Read cycle time wwe [45 | - [5] - [70] - |100] - | os ‘Address access time wal 16 36 | - [70] - |100| ns Chip select to output tco_|- [45 55 | - [70] - |100| ns Output enableto valid output | toe |- 125] - [25] -]25|- [50] ns Chip select to low-Z output uz [0] - || - [ao] - [1] - | os Output enabletotow-z output |roz 1s }-15{-15]1-151-| 0s Chip disable to high-Z output | wz [0 [20] 0 [20] 0] 20/0135] ns Output disable to high-Z outpat | wonz | 0 [20] 0 [20] 0] 30[ 0135] ns ‘Output hold from address chanad ton | 5 | - | 5 | - | 5] - | 10] - ra Write [Write cycletime wwe |45 | - [55] - | 70] - [100] - | ns Chip select to end of write tow [45 | - | 45] - | 60] - | 80] - ns ‘Address set-up time ws [o|-[ol-[ol-[o[-T ns ‘Address valid to endofwrte | ww [45 |- [45] -|60|-|80|-]| ns Write pulse width we [40 | - [40] - 50] -[60]-| ns Wiite recoverytime wr }ol-[ol-|o|-[o|-]| ns Wite to output high-Z wuz [0 [20,0 ][2[ 0] 2%] 01%] ns Data to write time overiap wow 12] - [25] - 190] - 150] - | ns Data hotd from write time Aral KOH | ml On| =m) RON) =m KOM | Rem |BRFrs End write to output low-Z wow lS L-bsl-Let- ll os CD-ROM tion 30). This Data Sheets sujet change witout not (6) 1996 Samsung Etronics Printed in Korea, Page: 5 ( KM62256C )ao KM62256C ELECTRONICS CMOS SRAM DATA RETENTION CHARACTERISTICS tem Symbol TestCondition’ [Min [Typ] Max [Unit jVecfordata retention | Var 1CS=Voo-0.2V 20 | - [55 | V Data retention current | idr | KM62256CL | Voo=3.0V Lver}- [1 | 50 kmez2s6cLt | /cs=vec02v| Liver] - | 05 | 10 KM62256CLE. Lver[- | - | 50 KM62256CLE-L Liver] - | - | 25 | ua KM62256CLI Lver|- | - [50 KM62256CLI-L Liver! - | - | 25 Data retention set-up time] tS0R See data retention o | - | - |ms Recoverytime (ROR waveform (saa eee +4) Commercial Procuct = Ta=0 to 70 °C, unless otherwise spected 2) Extended Product» Ta=-25 to 85 °C, unless etherrse speciieg 3) Industrial Product | Ta>-d0 to 85 °C, unless otherwise spectied een DATA RETENTION TIMING DIAGRAM tsDR Data retention mode 'RDR Vee, 45V, 2.2, Var ies. GND FUNCTIONAL DESCRIPTION ies | WE 10E Mode VO Pin Current Mode Hq x x Power Down, HighZ Tsb, Isb1 u H H Output Disable High-Z lee. t H C Read Dout Tee. L L x Wiite Din loc. “X means dont care CD-ROMCFditon 3.0) This Data Sheet i subject to change without notice (©) 1996 Samsung Electonics Printed in Korea, Page: 6 ( KM62256C )ao KM62256C ELECTRONICS cmos SRAM TIMING DIAGRAMS. TIMING WAVEFORM OF READ CYCLE (1) (Address Controlled) ((CS=/0E=Vil, (WE=Vin) tre: Address Data Out Previous Data Valic Data Valid TIMING WAVEFORM OF READ CYCLE (we= vn) tre. Address 1 ton 1s. TOE Data out onavard aa Notes (READ CYCLE) 4. tz and tone are defined as the time at vbich the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 2. At any given temperature and voltage condition, tyz (max is less than tz (min )both fora given device and from device to device. CD-ROMCFditon 3.0) This Data Sheet i subject to change without notice (©) 1996 Samsung Electonics Printed in Korea, Page: 7 ( KM62256C )KM62256C TIMING WAVEFORM OF WRITE CYCLE (we controllea) Adarass cs me tow —afe—ton Datain ¥ Data vata K T |}+-—twie- jo—tow. bata out Data Undefined TIMING WAVEFORM OF WRITE CYCLE (ics controlled) Asaress ies Data in Data out. —————High-z Notes (WRITE CYCLE) 1. Avwite occurs during the overtap(tWP) ofa low ICS and low MVE. Avwite begins a the latest transition among TICS going low and [WE going low A wite end atthe earliest transition among /CS going high and IWE going high, tWP is measured from the beginning of write tothe end of write. 2. {CW is measuted from the later of CS going low to end of write 3.1AS is measured from the address valid to the beginning of write. 4. {WR is measured from the end of write tothe address change. {WR applied in case awrite ends as /CS, or WE going high CD-ROMCFditon 3.0) This Data Sheet i subject to change without notice (©) 1996 Samsung Electonics Printed in Korea, Page: 8 ( KM62256C )a. PACKAGE DIMENSION KM62256C CMOS SRAM 28 PIN THIN SMALL OUTLINE PACKAGE (08134F ) Unit : Inches (Millimeters) aw ————, 28 PIN THIN SMALL OUTLINE PACKAGE, +} —_ 3+] 4 (0813.4) [rte ie HegseuuueoooD =| Sh ae CD-ROMCFditon 3.0) This Data Sheet i subject to change without notice Lt (©) 1996 Samsung Electonics Printed in Korea, Page :9 ( KM62256C )a. KM62256C CMOS SRAM PACKAGE DIMENSION 28 PIN PLASTIC SMALL OUT LINE PACKAGI (LARA AAA oxbiaas E (450 mil) Unit: Inches (Milimeters) 9.032 (0.813) 0.048 (1.219), one oagees) to i 0.455 (11.50 0475(1209) THREE AEE EREE , 071s 118.18 0725(18-42) 0.118(3.0) 9.006 (0.15) af hee 30081023} TT tee tgou 0014036) eos min booms Wp 28 PIN PLASTIC DUAL IN LINE PACKAGE(600 mil) 1.281362 0, 1445(36.70) F sso) 9.600 (1624 ossosa) hp UuuuueeeeeuuL! | ’ yf 008182) .008,003)7 o20nsce —OFSTO 33) ef moe 0119 2.92) 01 (2.54) 41] min. Be ih Bezaroany Lots 038) CD-ROMCFditon 3.0) This Data Sheet i subject to change without notice (©) 1996 Samsung Electonics Printed in Korea, Page : 10. ( KM62256C )ao KM62256C ELECTRONICS CMOS SRAM TECHNICAL INFORMATION 1) Iec2 characteristics by temperature variation All the values in this graph are depicted by the relative value with the maximum value measured at 5.0V Voc and -40°C temperature. The basic relative value of lcc2 at that condition is set into 1 Ice2 v.s Temperature @ Vec=5V 1.00 oto 0.90 3 3s g 0.80 & 3 0.70 e 3 060 0.50 -40 -10 ° 25 40 70 85 Temperature 2) Isb1(CMOS Level Standby Current) characteristics by temperature variation All the values in this graph are depicted by the relative value with the maximum value measured at 5.0V Vcc and 85°C temperature. The basic relative value of Isb1 at that condition is set into 1 Isb1 v.s Temperature @ Vee=5.0V 1.00 0.80 0.60 0.40 0.20 Isb1 (Relative Value) 0.00 -40 10 ° 25 40 70 85 Temperature(€ ) CD-ROMCFditon 3.0) This Data Sheet i subject to change without notice (©) 1996 Samsung Electonics Printed in Korea, Page : 11 ( KM62256C )ao KM62256C ELECTRONICS CMOS § 3) ldr(Data Retention Current) characteristics by temperature variation All the values in this graph is depicted by the relative value with the maximum value measured at Vdr=3.0V and 85°C temperature. The basic relative value of ldr at that condition is set into 1 ldr v.s Temperature @ Vcc: 1.00 0.80 0.60 0.40 Idr(Relative Value) 0.20 0.00 -40 10 0 25 40 70 85 Temperature( ) CD-ROMCEditon 3.0) This Data Sheets subject to change without notice (©) 1996 Samsung Electonics Printed in Korea, Page: 12 ( KM62256C )