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Droitwich Timebase: K.F. Ruwisch
Droitwich Timebase: K.F. Ruwisch
K.F. Ruwisch
Just retuning?
Although the difference of 2 kHz is hardly are no langer exact multiples of 10 Hz. Droitwich carrtcr is still just as good as be-
noticed on the turung seale of the vintage The problern is obvious: we GII1 110 Ionger fore the change from 200 kHz to 198 kHz. So,
radio in the introductory photograph, the use our receiver plus timebase because the the solution to the problern is also obvious:
output frequencies supplied by an unmodi- Droitwich transmitter is at 198 kHz instead to enable us to use our timebase circuits, we
fied Droitwich tlmebase are useless for most, of 200 kHz. All is not lost, however. The must convert the 198-kHz output signal of
if not all, digital circuits. 111is is because they good news is that the stability of the our Droitwich teeeiver to 200 kHz.
.. •
2kHz rier received from Droitwich.
+ 4046
I-r-C) It could be argued that the PLL is not re-
0----- +99
PLL
200k Hz
quired because the 2~kHz signal from the
4040~based divider may be fed, at a suitable
98kHz
point, into an existing divider cascade to give
the previously mentioned decade timebase
frequencies. We feel that the up-converston
2kHz ..... to 200-kHz is required, however, to make
4518 sure that the formerly available frequencies
'- BCD+100 I-- of 100 kHz and 10 kHz are retamed without
counter <lny change to the existing divider cascade,
900110-1 In other words, all the functions of the
Droitwieh fimebase you were just about to
throw away are restered simply by installing
Fig. 1. Block diagram 01 the frequency converter. The circuit comprises a divider and a the proposed up-converter.
phase-Iocked loop.
Circuil descriplion
of 200 kHz. This dritt. howeversmall, causes
Up by 2 kHz a frequency difference between the 2-kHz The circuit diagrarn of the upgrade is shown
The block diagram of the circuit we have in reference signal (derived frorn Droitwich) in Fig. 2. The diodes at theQO, Ql, Q5 and Q6
mind is shown in Fig. 1. Assuming that the and the 2-kHz signal supphed by the 4518.
unit is provided with the 198-kHz digital
output pulses from a Droitwich teeeiver. it The
comparator diffcrence
frequencyin the supply thl~~e~p~I~,o~s~e~;::;;;iiii;;;~:~:::~~~~
4046 to causes ~lll error
Construclion
Construction of the upgrade circuit is
straightfotward on the small PCB shown in
Fig. 4. The input of the board is counected to
c outpur A of the Droitwich receiver (see
900110·12 Ref. 1). The output of the board is connected
to the existing 200-kHz output socket of your
frequency standerd. end to the input of any
Fig. 2. Circuit dia gram of the timebase upgrade. divider cascade you may have built into the
8
r-' -
su pplies d igita I pulses to the upgrade board.
lf the pulse train is steady. the LOCKLED on
., the upgrade board lights, and the outpur
should supply a stable 200-kHz signal. •
er ,---(
LOW
~-"-~+<'}--------i"'S5 Reference:
FlLTt"
'ss
.,
-"""'V-<
vss +"v\''''-@e+~ "r'ss
1. "Precision timebase for frequency
counter". Eh'klor Eiectronics [une 1977.
900110 -13
Fig. 3. Block diagram of the 4046 phase-Iocked loop used in the upgrade (illustration
courtesy RCA/Harris Semiconductor).
Capacitors:
1 100pF Cl
1 100nF C2
semrconductors-
4 1N4148 01 - 04
1 LEO 05
1 BC547B Tl
1 74HC4040 IC1
1 4046 IC2
1 4518 IC3
Fig. 5. Completed prototype of the Droitwich receiver described in the June 1977 issue 01 Elektor Electronics.
•
vss 900110-13
Fig. 3. Block diagram of the 4046 phase-Iocked loop used in the upgrade (illustration
courtesy RCA/Harris Semiconductor).
COMPONENTS LIST
Resistors:
1 Sko.6 R1
1 2kn.2 R2
1 iokn R3
1 330kn. R4
1 3300. RS
1 1Skn. R6
Capacitors:
1 100pF C1
1 100nF C2
Semiconductors:'
4 1N4148 01-04
1 LEO OS
1 BCS47B T1
1 74HC4040 IC1
1 4046 IC2
1 4S18 IC3
Fig. 5. Completed prototype of the Droitwich receiver described in the June 1977 issue of Elektor Electronics.