Sat le montupe sutyeuek ; Boer etc dasten a prwic ) pia G lesls bru chten my Lofere, L) St Bote Caprrye) + diprotemest wee patede b6Oms, (nal (COBTSSSO 5 ode ies ae P ea 18S tah Omg poretereme — (net done ave Uprogtanne ) sont ENTO > 2) pies Soihettone nesifior le programme a bree la LEDS clignotont avec ume poy ode proms emme freak descendant et ler Lens clignestent de LBs - GH Lpas' f ate pore. trite LTO dedlonchee om Bored, qrormalemeut 3 fois avec anytime pn Barice de phegranme 3) utilises TENERO pecoae ere de A) Trasee Tonto & PV y Aanplétey of toned, ahagee BEF void Tome {) 2 yi =. = tempateodon oe - | Qraros 5 Teehob= .-- i If - - = While( _ =: Js W-- -- — Hi - 2 ah 7 bleter fu vaeuts de csho6 , UESROC, UBRRoL UB RROH a wohing de Couns? Dor RITEGR 329 z . a Frepweae nay? pow coo gue USKRT on mole Hansmnisseo Taille Jewmeémsire propornne ? & seveption dove utose anc & bit de Aouneo , A ki de stop » purtté pre be C~ Taille de meimatredsnnia RA ¢ ak vitese de 4600 Lauds d~ Neubre de repistes accumu tices 2Everate ~ > ae H# define E BLY 000 von Uh FE undlude 20 sKY Ht Prelude. < Ate tcuph > yelbile chac cepts FSR (TIER A cone A. veck) o> 4 epteri AP (ente=tu) { RTE a = (AeLRTBY cpt =o; } vatd mein () { TecReh 2 0x02; ff -- - - OcRok& =2y9;7 ff - = . qaueas slevdiy f= --— — TINEK = OKO, fP- - -— mea l= (4h); Ports Qev (AK4): sal): while (4) 2, 4) Ren flor les Zones de cornmest RNs - H Calater ty fequoe de dignstement Je ta LED PBY- a appat agclique cone ie pal de Fe aah ¢ FEE Gy Gosnell gene IT am unk tisent BTL ae T (e™ joverter) rhe cork i 7 ln ox weed e opu > STING: ee ow oc poh : i de TERE dt TECROB a) Bidesee le valoots | |— ENSIAS, Université Mohammed V de Rabat Annexe Vecteurs d’interruption ‘ATmega328P Interrupt Vector Table Vector [Program | Source Interrupt Defaion ‘rtaina]Or RY Macro No | Address Vector Name 0,0000_| RESET Reset 0.0002 | NTO External lnteropt Request (pn 02) (io vel) (0008 fINTS sera inerupt Request (pin 03) (HT veet 10,0006 | PEWTO in Change interrupt Request O (pins 08 O13) | (PCINTO vec) ‘0008 | PORTE Pin Change Inert Request (pins AD to AS) | (CINTS vet) ‘o,000a | pein? in Change Interupt Request? (pins Oto 07) | (PCINT2 wees) | ‘oc00c | wor Watchdog Time-out nerupt (wor yea) (TIMER2_COMPA vect) {(MMER2_COMPA_vect) (TIMER2_OVF_vect) (TIMERI_CAPT_vect) (TIMER COMPA vect) (TIMERI_COMP®_vect) (TIMER OVE. vect) (TIMERO_COMPA_vect) -(TiMERO_COMPB._vect) TIMER COMPA | Timer/Counter2 Compare Match A ‘0r0010_| TIMER2 COMPB | Timer/Counter? Compare Match B (0x0012 | TIMER2 OVF | Timer/Counter2 Overfiow ‘0x0014 | TIMERS CAPT___| Timer/Counter4 Capture Event (0x0016 | TIMERI COMPA | Timer/Counteri Compare Match A 33 | 090028 | TIMERI COMPE | Timer/Countert Compare Match B 44} voor [TIMeRt OvF | Timer/Countert Overflow 35 | 02001C | TIMERO COMPA | Timer/Counter0 Compare Match A ts] 0] 00] s]on]en] =| unl || A e 36 | Os003E | TIVERO COMPO — | Timer/CounterO Compare Match 47 | 010020" TMERO OVE | Tmer/CounterO Overfow_ (TNERO_OVE_vect) 18 | os0022 [sm st SP Serlal Transfer Compete (sP1 STC, vec) 33] 0.0028 | USART, Rx USART Fx Complete (usin 8X vee 30 | 0026 | USART, UORE | USART, Data Register Empty (UsART_UDRE_ vec) 24 | osonra”[usAat. TK LUSART, Tx Complete (USART_TX veet) Z| 02a [Adc ‘ADC Conversion Complete (a0¢ veet) 23] orc | ee READY EEPROM Read (Ge READY ved) 24] 01002 | ANALOG COMP | Analog Comparator [anaLo COMP vec) 25 | 00030 [11 vie Serial ieterfoee (RC) (Tyee) 36 [010082 | SPM READY | Store Program Memory Ready (SPI READY vee B- TIMERO © ICO Control Register A: TCCROA Name: TCCROA Offset: Oxt4 Reset: 0x00 Property: When addressing as UO Register: address offset is x24 m7 é 5 4 3 2 1 ° (Ceenani—] conan] cowost | conoeo ai TLowenor [weno] deass RA RAW RW Rw RW Ri Ret 0 0 ° ° ° ° ‘Compare Output Mode, non-PWM Os 0 | 0 [Newel port operation, COA dsconocod "1 eabie OCOA Compare Male =e @- [ber OcOA on Compare atch ‘ 1 | Set OCOA on Compare Match:Saas aan nner Ener ———————— ENSIAS, Université Mohammed V de Rabat Compare Output Mode, Fast PW!" Sea [Next prt ser 0co/ | 4 [wea = 0: Noma Pot Operbn, | wow =1 Ay eg OCONen CO si i so ald doar 0G0A at BOTTOM (rv even mod) ya disconnected. —— ‘OCIA Disconnected | Note: 1. MAX= OXF 2, BOTTOM= © TCO Control Register B : TCCROB at ‘ 5 ‘ 3 2 1 ° (Croce roose I [wen Ea) ] recs fa aw aw aw Rea 0 a 0 ° ° ° Omi i eccuacul [2 [Nodoa out esi sone [lier 6 preseaing) [0 |ky/@ (From prescalr) |akio/i024 (From proscalon) (0 | Extemal clock source on TO pin. Clock on fling edge Sa 5 = 1. | Extemal lock soure on 10 pn: Clock on rising edge. « TCO Interrupt Mask Register TIMSKO a7 6 5 4 3 2 1 0 aS] cesT eaex Troe) Raw Raw RaW Access eset ° ° ° 216© TCO Intern pt Flag Register TIFRO 8 4 3 2 4 Access, I ora [ocrR TT J Raw er mw Reset “ 4 % C-USART Equation for Calculating UBRR Equation for Calculating value Baud Rate"? Operating Mode ‘Asynchronous Normal Mode te ‘osc (Uae) BAUD ~ FEUBRR=1) ‘Asynchronous Double Speed Mode Sosc ey BAUD © aoBRR Synchronous Master Mode nau ~ 286 : 2(UBRR~1) Registre UCSROA USART Control and Status Register 0.A Name: UCSROA 0x0 0x20 Property: ~ 7 6 5 ‘ 3 2 1 © (Re 7KCo__] _UDRES Fe cord [URED [vero wren R RW R R R R RW RW ° ° 1 a ° o ° ° Bit7—RXCO: USART Receive Complete Bit 6 - TXCO: USART Transmit Complete ‘sit $-UDREO: USART Data Register Empty ¢ Registre UCSROB 3/6UNGAK Uriertité Mohamed V de Rabat \ USART Control and Status Register 0B Name: UCSROB Offset: OC Reset: 0x00 Property: - 7 6 5 4 3 2 1 o (sxc [ree] vores | reno | xen | veem | ao L100 Bit7—RXCIEO: RX Complete Interrupt Enable 0 ‘Writng this it to one enables interrupt on the RXCO Flag. A USART Receive Complete interrupt vill be oere pea only ifthe RXGIEO bits written to one, the Global Interupt Flag in SREG is watten to one and the RXCO bitin UCSROA is set Bit 6 TXCIEO: TX Complete Interrupt Enable 0 \Whting this bit to one enables interupton the TXCO Flag. A USART Transmit Complete interrupt will be Serereted only i the TXCIEO bitis writen to one, the Global intemupt Flag in SREG is writen to ona and the TXCO bit in UCSROA is set. Bit — UDRIEO: USART Data Register Empty Interrupt Enable 0 ‘ting this bit to one enables interupt on the UDREO Flag, A Data Register Empty interrupt will be Seas cnly ifthe UDRIEO bitis writen to one, the Giobal Interrupt Fag in SEG. is written to one and the UDREO bit in UCSROA is set Bit 3—TXENO: Transmitter Enable 0 Wiiting this bit to Bit2~UcSz02: Character Size 0 $e UCSZ02 bits combined with the UCSZ0(:0) bitin UCSROC Sets the number of data bits (Character Size) in a frame the Receiver and Transmitter use Bit 1-RXBB0: Receive Data Bitso Bit O-TXBO0: Transmit Data Bite 0 4/6¢ Registre UCSROC USART Control and Status Register 0.¢ Name: UCSROC. Offset: Oxc2 Reset: 0x06 Property: - a 8 5 4 3 2 1 ° | UMSELOT | ‘UMSELOD | UPMOT ‘UPMOO wses0 | ucszo17 | ucszooy | UcPoLo | [ cooror | scr RW RW RaW RW RW RW RAW RA ° ° ° ° Q 1 ‘ 0 Bits 7:6 -UMSELOn: USART Mode Select 0 n [n= 1:0) ‘These bits select the mode of operation of the USARTO Table 24.8. USART Mode Solection Pst) ces 00 | Asynchronous USART - mn _-| oO Synchronous USART Sees Ws Sy ee = ne Bits 5:4 UPMOn: USART Parity Mode 0 n [n= Te) Pond 00 | Disabled f a ‘pasiied | Enabled, Even Pariy "Efiabled Odd Pariy ts) ‘Stop Bit(s) { +-bit 5/6ENSIAS, Université Mohammed V de Rabat Blt 2-UCSZ01/ UDORDO: USART Character Size / Data Order UCSZO[1:0]; USART Modes: The UCSZ0/1:0] bits combined with the UCSZ02 bit in UCSROB sets the ‘number of data bits (Character Sizo) in a frame the Recelver and Transmitter use. Table 24-41, Character Size Sottings Pes) Creed Sil Bit 1-UCSZ00 / UCPHAO: USART Character Size / Clock Phase [UCSZ00: USART Modes: Refer to UCSZ01 Bit 0-UCPOLO: Clock Polarity 0 USARTO Mod. UCPHAO: Master SPI Mode: is bit is used for synchronous mode only. ¢ Registre UBRROL et UBRROH USART Baud Rate 0 Register Low UBRROL r 6 5 USART Baud Rate 0 Register High Name: UBRROH Offset: OxC5 Reset: 0x00 Property: - a 6 6 I Access Reset 4 3 {UBRROT.G) Bits 3:0 - UBRRO[3:0]: USART Baud Rate 0 n [n= 11:8} VeRROAT } a ° ° ° 616