Using External Clocks in PSoC 3 / PSoC 5

EP56060
Associated Part Families CY8C3xxx/CY8C5xxx Software: PSoC Creator Related Hardware: CY8CKIT-001 Author: Anup Mohan

Project Objective
This project explains how to use an external clock to generate system clock for the device and also shows how to use external clock for peripheral components.

Overview
The project uses an external clock source to generate the system clock. In addition, a 24-bit counter is clocked from the external clock and generates an interrupt every second. On every interrupt, the time from an RTC that is running continuously is displayed on the LCD. The RTC uses the external 32 kHz crystal.

Component List
Instance Name Counter Component Name Counter Component Category Digital Functions System Ports and Pins Port direction configured as the Input and Pin Drive mode is configured as High Impedance Digital. Pin is mapped to P15[4]. Comments Configured as 24-bit counter with UDB implementation

ISR_CounterInterrupt Interrupt Pin_ExternalClock Digital Input Pin

RTC

RTC

System

LCD

Character LCD Logic Low

Display Digital Logic

ZeroTerminal_1

Used to provide a logic low for the Counter reset lines

January 27, 2011

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Top Design
The following figure illustrates the components and their routing:
Figure 1. Components

The following figure shows pin placement (as in .cydwr file).

Figure 2. Pin Placement

The External_clock is mapped to P15[4], so you can mount external crystal oscillator in U8 Socket in DVK to clock the device.

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Component Configuration
Counter
Figure 3. Counter Configuration

The counter period is 4,000,000. This generates a one second period when a 4 MHz clock is used. In the advanced tab the counter is configured to give an interrupt on terminal count. The Clock Mode parameter is set to "Down Counter. The down counter has two digital inputs namely, count and clock. The counter decrements on the rising edge of count input. Clock input synchronizes the count input and its frequency must be at least twice the frequency of count input. In this example project, count input is connected to the external pin to count on the external signal rising edge and the clock input connected to the internal 24 MHz clock that is derived from bus clock. Note The external clock frequency to any component must be less than half of the system clock frequency. In this example project, design wide resource (DWR) is configured to generate a 24 MHz system clock from the 4 MHz external clock input. RTC
Figure 4. RTC Configuration

January 27, 2011

Document No. 001-56060 Rev. *B

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External_Clock
Figure 5. cy_pins Configuration

Clear the Input Synchronization as the external clock is used to clock the device.

January 27, 2011

Document No. 001-56060 Rev. *B

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Design Wide Resources

Clocks
Figure 6. System Clocks Configuration

The IMO source is selected as Digital Clock Source as in the IMO configuration. The XTAL 32 kHz is also selected for the RTC to work. The configuration for Digital Clock Source is as follows. The signal name Clock can be selected as the digital clock source by the following steps. Click on the button near the Freq The Select Input Signal window pops up, displaying the terminal name Clock Select Clock and set the Signal Frequency to 4 MHz (or the frequency of the oscillator used).
Figure 7. Select Input Signal

January 27, 2011

Document No. 001-56060 Rev. *B

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Operation
This project uses an ISR configured for the Counter. The interrupt occurs during the Terminal count event of the Counter. Inside the Interrupt, OneSecondFlag is set to 1 to indicate occurrence of the Interrupt. The input frequency to the Counter is 4 MHz and to generate a terminal count interrupt at one second, the 24-bit period value is chosen as 4,000,000. If the frequency is changed then the Counter period value should also be changed accordingly. When the interrupt occurs, the time from RTC is read and the time; hour, minute and second is displayed on the LCD.

Hardware Connections
This project can be tested on the CY8CKIT-001 development board. Following are the connections to be made on the board to make the project work. Apply the external clock using signal generator or from the external crystal oscillator o If you want to use external crystal oscillator, insert a 4 MHz oscillator module to the socket U8 in the Development kit. o If you want to use signal generator, provide 4 MHz clock from signal generator to Pin 5 of U8 socket. o If you want to use some other clock frequency, make suitable changes in design wide resource to generate 24 MHz system clock (CYDWR file) The character LCD should be connected to the Development kit Switch on power for the character LCD by setting the jumper J12 to ON position For rest of the basic settings of the DVK, refer CY8CKIT-001 PSoC Development Kit Guide.

Output
Use device selector (Project Device Selector) window in PSoC Creator to select the appropriate device and Device Revision. If you are using PSoC 3 device (example CY8C3866AXI-040) with production revision, then use the following selection.

Similarly, select appropriate device number to work with PSoC 5 Device family (for example: CY8C5588AXI-060). Note For engineering samples, device revision is marked on the package as part of the device number. Production silicon will not have ES marking. Build the project and program the chip Observe that LCD displays time in hour, minute and second format and the time is updated every one second.

January 27, 2011

Document No. 001-56060 Rev. *B

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Document History
Document Title: Using External Clocks in PSoC 3 / PSoC 5 Document Number: 001-56060
Revision ECN Orig. of Change Submission Date Description of Change

** *A

2764654 2944341

ANUP ANUP

09/22/2009 06/06/2010

*B

3152260

ANUP

01/24/2011

New Spec. Updated for PSoC Creator 4.1 Updated the project and document to work with PSoC 3/PSoC 5 Updated the documents to meet the spec 001-55157 and 001-58307 The project is modified completely to work with the latest Counter UDB component. The text is added and modified to explain the changes in the counter component with respect to project. All the screen shots are updated as per the latest components changes. The version numbers of the component is removed from the Component list. Added Document History page

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January 27, 2011

Document No. 001-56060 Rev. *B

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