Low Power Electronics Lecture 5N280: Ir. M.A.M. Hendrix Dr. J.L. Duarte September 1, 2014, Rev. 1.10

Low Power Electronics Lecture 5N280
ir. M.A.M. Hendrix dr. J.L. Duarte
September 1st , 2014, rev. 1.10

ii
Preface
“Relatively speaking,a power electronics is a newly emerging sub area in electri-

cal engineering. The unprecedented technological evolution in power electronics
is due to several factors, but recent advances in power semiconductor devices is
the paramount one. This coupled with the increasing demand for smaller size and
lighter weight power supplies, and the expanding market demand for power elec-
tronic systems have made power electronics the fastest growing area in electrical
engineering. Moreover, with the fast expansion of power electronics applications
into commercial, industrial and residential, the pressing need in developing power
systems with low harmonic distortion has further intensified the interest in this
field. The need for power electronics engineers equipped with new emerging tech-
nologies, who understand the impact of these technologies on the environment and
who recognize the pressing need for energy conservation has never been greater.”
a
I.Batarseh, Course and Laboratory Instructions in Power Electronics, Proc. PESC’94 p.1359.
Course objectives
This course provides basic knowledge of power electronics principles. An arbitrary limit of 5
kW is applied to prevent having to discuss special problems related to really high powers and
voltages.
Although size, weight and cost determine the market possibilities of a converter design, these
characteristics depend so much on specific circumstances that we cannot treat them quantitatively
in this course. Also, worldwide standards define special external circumstances that have as big
an influence as purely technical requirements. Mains current distortion and electromagnetic
compatibility are important topics in this category, especially for low power application areas.
Some examples in these course notes come from the lighting electronics area. This reflects
the fact that originally the mini power electronics chair was founded because of a cooperation
between the University and Philips Lighting BV.
Additional instruction materials are supplied on a CD-ROM. You will find a version of the
course notes as PDF documents with executable links, about a hundred MATLAB M-scripts, and
several PSPICE circuit simulator files.
iii
Chapter0 Preface
Because of the restricted time available for the course, eight four-hour lectures, we have
to assume basic knowledge of (power)semiconductors. For the same reason we cannot offer
introductions to control theory and practice. Experience with MATLAB and SPICE is needed to
effectively use the supplemental material on CD-ROM.
Table 0.0.1: Icons Explained
Icon Description
descr. Link to PSpice simulation
descr. Link to matlab script
descr. M file containing more info
PATON
link naar website
iv
Contents
Preface iii
1 DC-DC Switch-Mode Converters 1

1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.1 First Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.2 Second Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Combination of the two previous circuits . . . . . . . . . . . . . . . . . . . . . . 3
1.3 The canonical switching cell . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Analysis of the two basic configurations . . . . . . . . . . . . . . . . . . . . . . 4
1.4.1 General remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4.2 Boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4.3 Buck converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.4.4 Ćuk-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.4.5 SEPIC- and ZETA converters . . . . . . . . . . . . . . . . . . . . . . . 17
1.5 Isolated converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1.5.1 Flyback converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
1.5.2 Forward converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
1.5.3 Push-pull converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
1.6 Determination of the output ripple voltage of converters . . . . . . . . . . . . . . 39
1.6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
1.6.2 Idealized current waveform I . . . . . . . . . . . . . . . . . . . . . . . . 39
1.6.3 Idealized current waveform II . . . . . . . . . . . . . . . . . . . . . . . 41
1.6.4 Second source of voltage ripple . . . . . . . . . . . . . . . . . . . . . . 42
1.7 Up-converter as preconditioner . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
1.7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
1.7.2 Determination of the control characteristic . . . . . . . . . . . . . . . . . 45
1.7.3 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2 Resonance in Converters 57
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
2.1.1 Switching losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
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CONTENTS
2.2 Quasi Resonant Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

2.2.1 General Remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
2.2.2 Zero Current Switching (ZCS) . . . . . . . . . . . . . . . . . . . . . . . 59
2.2.3 Zero Voltage Switching (ZVS) . . . . . . . . . . . . . . . . . . . . . . . 61
2.2.4 Other Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
2.2.5 Simplified analysis of the ZCS flyback converter . . . . . . . . . . . . . 69
2.3 Resonant Converters I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
2.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
2.3.2 Full-bridge circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
2.3.3 Half-bridge circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
2.3.4 Rectifying load circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
2.3.5 Resonant circuit with load in series SRC . . . . . . . . . . . . . . . . . . 81
2.3.6 Resonant circuit with the load parallel PRC . . . . . . . . . . . . . . . . 83
2.3.7 PRC with additional series capacitor LCC-PRC . . . . . . . . . . . . . . 83
2.3.8 Other configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
2.4 Resonant Converters II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
2.4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
2.4.2 Current Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
2.4.3 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
2.4.4 Self Oscillating Properties . . . . . . . . . . . . . . . . . . . . . . . . . 90
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
3 State Plane Analysis 95

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
3.2 Tank circuit without load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
3.2.1 Control frequency below resonance frequency . . . . . . . . . . . . . . . 96
3.2.2 Control frequency above resonance frequency . . . . . . . . . . . . . . . 99
3.3 Load in series with LC circuit (SRC) . . . . . . . . . . . . . . . . . . . . . . . . 99
3.3.1 Operating point in the second quadrant . . . . . . . . . . . . . . . . . . 99
3.3.2 Operating point in the first quadrant . . . . . . . . . . . . . . . . . . . . 102
3.4 Load parallel to the capacitance of the series LC circuit (PRC) . . . . . . . . . . 106
3.5 PRC at low frequency, ω < 0.5ωo . . . . . . . . . . . . . . . . . . . . . . . . . 110
3.6 Clamped PRC without current sink as load . . . . . . . . . . . . . . . . . . . . . 116
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
3.7 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
4 Half Bridge Electronic Ballast (CIRCUIT FOR LOW PRESSURE LAMPS) 121
4.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
4.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
4.2.1 The full square wave generator . . . . . . . . . . . . . . . . . . . . . . . 122
4.2.2 Power control methods . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
4.2.3 Methods of analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
4.3 Circuit equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
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CONTENTS
4.4 LC-combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

4.5 Cathode heating and ignition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
4.5.1 Cathode heating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
4.5.2 Ignition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
4.6 Lamp properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
4.7 Power control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
4.7.1 Power control with FM . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
4.7.2 Control with PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
4.7.3 Power control with SVM . . . . . . . . . . . . . . . . . . . . . . . . . 138
4.7.4 Remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
4.8 Influence of the circuit on the generator . . . . . . . . . . . . . . . . . . . . . . 142
4.9 APPENDIX: APPLICATION OF LAPLACE-TRANSFORMATIONS . . . . . . 146
4.9.1 The circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
4.9.2 The supply voltage us (t) . . . . . . . . . . . . . . . . . . . . . . . . . . 147
4.9.3 Capacitor voltage and inductor current . . . . . . . . . . . . . . . . . . . 150
4.9.4 Evaluation of the conductance (=capacitor) voltage . . . . . . . . . . . . 150
4.9.5 Equations for square wave operation . . . . . . . . . . . . . . . . . . . . 154
4.10 LITERATURE on FLUORESCENT HALF BRIDGE LAMP CIRCUITS since
1992 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
5 AC-DC 157
5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
5.2 Definitions regarding alternating waveforms with one angular frequency ω . . . . 157
5.3 Definitions regarding distorted waveforms . . . . . . . . . . . . . . . . . . . . . 159
5.4 Regulations and requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
5.4.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
5.4.2 Example of THD and DF . . . . . . . . . . . . . . . . . . . . . . . . . . 161
5.5 Application to magnetic ballast circuits for gas discharge lamps . . . . . . . . . . 161
5.5.1 Description of a ballast circuit . . . . . . . . . . . . . . . . . . . . . . . 161
5.6 Application to the electronic power supply . . . . . . . . . . . . . . . . . . . . . 167
5.6.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
5.6.2 Model of a rectifier circuit . . . . . . . . . . . . . . . . . . . . . . . . . 168
5.6.3 Formulation of the current pulse . . . . . . . . . . . . . . . . . . . . . . 169
5.6.4 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
5.6.5 The displacement power factor DPF . . . . . . . . . . . . . . . . . . . . 170
5.6.6 Large installations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
6 Magnetic Components 177

6.1 Winding characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
6.1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
6.1.2 Number of turns in a given area . . . . . . . . . . . . . . . . . . . . . . 178
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6.1.3 DC resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178

6.2 Eddy current losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
6.3 Skin effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
6.3.1 Penetration depth ∆ . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
6.3.2 Skin effect factor F and resistance factor Fs . . . . . . . . . . . . . . . . 181
6.4 Proximity effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
6.4.1 Foil windings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
6.4.2 Round wire windings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
6.4.3 Magnetic flux density B in a single winding . . . . . . . . . . . . . . . . 188
6.4.4 Losses caused by proximity effect . . . . . . . . . . . . . . . . . . . . . 190
6.4.5 Resistance factor Fr . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
6.4.6 Design curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
6.5 Designing inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
6.5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
6.5.2 Current waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
6.5.3 Choosing a core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
6.5.4 Air gap and number of turns . . . . . . . . . . . . . . . . . . . . . . . . 198
6.5.5 The windings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
6.5.6 Core losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
7 Interference 203
7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
7.2 Conducted interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
7.2.1 The utility grid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
7.2.2 Interference sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
7.2.3 Interference through mains conductors . . . . . . . . . . . . . . . . . . . 207
7.2.4 Interference current through the safety ground connection . . . . . . . . 207
7.2.5 Double LC filter example . . . . . . . . . . . . . . . . . . . . . . . . . . 210
7.3 EM fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
7.3.1 Frequency ranges and limit requirements . . . . . . . . . . . . . . . . . 215
7.4 Measuring Radio Interference . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
7.4.1 Requirements and measurement methods . . . . . . . . . . . . . . . . . 216
7.4.2 Example requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
7.4.3 Magnetic field measurements . . . . . . . . . . . . . . . . . . . . . . . 216
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
8 Power Factor Correction 221

8.1 Examples in Electronic Ballasts . . . . . . . . . . . . . . . . . . . . . . . . . . 221
8.1.1 One HB switch as up-converter switch . . . . . . . . . . . . . . . . . . . 221
8.1.2 One HB switch and diode as up-converter components . . . . . . . . . . 222
8.1.3 A one transistor EB based on the flyback principle . . . . . . . . . . . . 222
8.1.4 Cuk-converter as the principle . . . . . . . . . . . . . . . . . . . . . . . 223
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8.1.5 Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
9 Sampled Data Modelling 229

9.1 Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
9.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
9.3 Power Electronic Circuits as Cyclically Switched Systems . . . . . . . . . . . . 232
9.3.1 Continuous-time description of circuit operation . . . . . . . . . . . . . 232
9.3.2 Large-signal sampled-data description . . . . . . . . . . . . . . . . . . . 234
9.4 Perturbations Around a Nominal Cyclic Steady State . . . . . . . . . . . . . . . 235
9.4.1 Periodic operating point . . . . . . . . . . . . . . . . . . . . . . . . . . 235
9.4.2 Dynamics of perturbations from steady state . . . . . . . . . . . . . . . . 235
9.5 Looking for the Cyclic Steady State . . . . . . . . . . . . . . . . . . . . . . . . 238
9.5.1 Sensitivity matrices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
9.5.2 Analytical evaluation of Jacobian matrices . . . . . . . . . . . . . . . . 241
9.6 Numerical Evaluation of Derivatives . . . . . . . . . . . . . . . . . . . . . . . . 243
9.7 Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
9.7.1 Up/down converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
9.7.2 Duty-ratio control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
9.7.3 Feed-forward control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
9.7.4 Current-mode control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252
.1 Vector gradient functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
.2 Newton algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
.3 Recurrence equation between states . . . . . . . . . . . . . . . . . . . . . . . . 263
.4 M-file large-signal model DRC . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
.5 M-file small-signal model DRC . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
.6 M-file large-signal model CMC . . . . . . . . . . . . . . . . . . . . . . . . . . . 268
.7 M-file small-signal model CMC . . . . . . . . . . . . . . . . . . . . . . . . . . 270
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
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1
DC-DC Switch-Mode Converters
extra info about DCDC
1.1. Introduction
DC-DC converters are used in switch-mode power supplies (SMPS) for electronic circuits and
DC-motor drives. Their purpose is to convert an unregulated DC input into a controlled DC
output at any desired voltage level. Although the input may be a battery, in many applications
energy from the public grid is used. In these cases the AC mains voltage must be rectified, and, as
electrical isolation is often necessary, a transformer may be used. Because this transformer can
operate at the switching frequency, it is much smaller than the system’s 50 or 60 Hz transformer.
For lighting applications and DC-motor drives non-isolated converters are used. In this chap-
ter common isolated and non-isolated converter types will be explained.
1.1.1 First Principle

Input and output are considered to be voltage sources. Because we want to obtain the highest
possible efficiency, the only circuit elements allowed are ideal ON/OFF switches, inductors, and
capacitors. Of course ideal, i.e. lossless, components do not exist in practice. Especially the
non-ideal behavior of physical switches causes trouble and has led to other circuit topologies
that will be explained in the next chapter.
With one switch, one inductor, and two voltage-sources, we can create the circuit of figure
1.1.1. Switching S on, a current starts to flow. Because the voltage across the inductor UL =
U1 −U2 , the current increases with time, and, because U1 −U2 > 0, the current flows from the left
to the right. Therefore U1 can be considered the source and U2 its load, and energy is transferred
from this source to the load. When after δT seconds sufficient energy has been transferred, S is
switched off.
The intention is to switch S on again as soon as the load needs more energy.
1
Chapter1 DC-DC Switch-Mode Converters
I1
S1 L1
U1 Cp U2
Figure 1.1.1: Principle circuit with one switch and one inductor.
A difficulty arises directly after switching S off. Switching off a current carrying inductor
causes a considerable voltage spike that will certainly damage our switch. Why is this?
Note that the source current not only transfers energy to the load but also stores magnetic
energy in the inductor. The amount of stored energy is described by EL = 12 LI 2 where I is the
current at the moment of switching off. As it is not possible to destroy this energy by opening
the switch and forcing the current to zero, it is necessary to incorporate an alternate circulation
path for this inductor current. Such a path is realized in figure 1.1.2 by the addition of a second
switch S2 that is switched synchronously with S1 . The result is that, by means of a decreasing
current in the same direction as the first current, eventually all magnetic energy transfers to the
load, until the inductor is “empty”. No energy is lost. When the inductor current becomes zero,
switch S1 must be switched on again. The time between the first and second switching on of S1
is called the switching period Ts and the corresponding switching frequency fs = T1s .
S1 L1
U1 S1 U2
Figure 1.1.2: Principle circuit with one inductor and two switches.
The circuit that implements this mode of operation is called a down- or buck-converter,
because U2 < U1 .
1.1.2 Second Principle

With topologically the same circuit as before a second operating mode can be obtained. For this
mode switch S2 is the first to switch on, thereby connecting the inductor L to U2 , which now
is the energy source. An increasing current will “charge” the inductor with magnetic energy.
Immediately after opening S2 we close S1 and the decreasing current is transporting the magnetic
energy to U1 , which now is the load. In this case U1 − U2 > 0 and because the load voltage
exceeds the source voltage this principle circuit is called up- or boost-converter. The next
period starts at t = Ts , not necessarily immediately after the discharging current has become
zero.
2 / 274 
1.2 Combination of the two previous circuits
1.2. Combination of the two previous circuits
In the circuit of figure 1.2.1 S2 and L have changed positions, L is “charged” by the source and
discharges into the load. The load voltage can either be higher or lower than the source voltage.
This is the principle of the buck-boost-converter.
I1 S2 I2
S1
U1 L1 U2
Figure 1.2.1: Buck-boost-converter principle circuit
This diagram is actually a series connection of the two previous circuits. A series connection
of the boost converter and the down converter (note the reversed order) is also possible. It was
first described by Slobodan Ćuk and is therefore called the Ćuk-converter. The boost- and buck-
converter are the most basic ones and will be analyzed some more in the following sections.
1.3. The canonical switching cell
It can be shown that all elementary DC-DC converters derive from one basic building block: The
canonical switching cell. This canonical switching cell is drawn in figure 1.3.1.
C1
1 3
S1 S2
L1
Figure 1.3.1: The canonical switching cell
We see that the canonical switching cell has three terminals, whereas a DC-DC converter is a
two-port and thus has four terminals. This means that we must choose one of the terminals of the
canonical switching cell common to both ports. Due to the symmetry of the canonical switching
cell this leads to the following two possible configurations:
 3 / 274
C1
1 3 1 3
S1 L1 S1 S2
C1 S2 L1
2 2 2 2
Figure 1.3.2: Direct converter Figure 1.3.3: Indirect converter
The first converter has its second terminal common to both ports. It is called a “direct con-
verter” because a DC current path between terminals 1 and 3 exists. We still have the freedom
to choose the input port and the output port. Choosing port 1-2 as input and port 3-2 as output
results in the buck converter. Choosing port 3-2 as input and port 1-2 as output results in the
boost converter.
The second converter has terminal 3 common to both ports. It is called an “indirect converter”
(or “up-down converter”) because a DC current path between input and output doesn’t exist.
Note that the indirect converter is symmetrical and therefore input port and output port can’t be
chosen. The indirect converter is elementary. Derived topologies from the indirect converter are
the buck-boost converter, Ćuk converter, Zeta converter and SEPIC converter.
1.4. Analysis of the two basic configurations
1.4.1 General remarks

In most cases source and load have large capacitors in parallel to keep the ripple voltage low
with respect to the mean voltage. Therefore they can be regarded as voltage sources with zero
internal resistance. The load must be described as a large capacitor in parallel with a resistor Ro
accounting for the power that is transferred by the converter, see figure 1.4.1. If the mean output
2
voltage is Uo the output power is given by Po = URoo .
U1 C1 R1
Load
Figure 1.4.1: The load circuit
The source is in some cases the rectified grid voltage. It normally lacks a smoothing capacitor
and the source voltage therefore resembles a full-wave rectified sine, being different in value for
4 / 274 
1.4 Analysis of the two basic configurations
every switching period. The description is in general much more complicated than the one given
in the next paragraph.
The switches may be all kinds of semiconductor components: gate- or base-controllable like
transistors, thyristors, MOSFETs, IGBTs, or indirect voltage-controlled like diodes. An ideal
switch is the simplest way to describe their operation, however, adding parasitic impedances is
often necessary to model reality with more precision.
1.4.2 Boost converter

The circuit is defined by the state of its switches. With two switches there are four modes. Not
all the modes are applicable. Modes I and II are the most important and nearly always present,
mode III less frequent but mode IV must be prevented, certainly in the basic circuits that will be
explained here.
Table 1.4.1: Possible switch state modes
Mode S1 S2 Duration
I On Off δ1 T
II Off On δ2 T
III Off Off δ3 T
IV On On n.a.
The division in modes translates to an corresponding division on the time axis. The boost
converter diagram is redrawn in figure 1.4.2, defining all elements used in the explanation. We
consider one period of the steady state operation where all periods are equal. By definition of the
steady state, the conditions at the start are equal to the conditions after time T, the length of the
period. This also applies to the boundaries between the modes: the condition of the circuit at the
end of mode I is exactly the same as that at the start of mode II. We define the condition of the
circuit by definition of the energy-related state of the elements, i.e. the current in the inductor
and the voltage on the capacitor. (This is the basic state space description approach that we will
have more to say on in later chapters). In our ideal boost converter the input and output voltages
(capacitor voltages) are assumed not to change, only the inductor current changes.
The three modes give three different circuit diagrams (see figure 1.4.3) and three intervals on
the time axis (see figure 1.4.4 and 1.4.5), together forming a single period. Put in formula form
it means δ1 + δ2 + δ3 = 1.
boost
Calculation:
 5 / 274
ULs
LS S2 IS2
US S1 UC
IS1
Figure 1.4.2: Up-converter basic circuit definition
Mode I Mode II
ULs = Us ULs = Us − Uc
diS1 diS
Us = Ls Us − Uc = Ls 2
dt dt
Us t (Us − Uc )t (1.4.1)
iS1 (t) = IS1 + iS2 (t) = IS2 +
Ls Ls
t = δ1 Ts t = δ2 Ts
Us δ1 Ts (Us − Uc )δ2 Ts
IS2 = IS1 + IS1 = IS2 +
Ls Ls
From which it follows:
δ1 + δ2
Uc = Us (1.4.2)
δ2
Two current values have been introduced, IS1 being the current when S1 is turned on and IS2
when the diode starts conduction. In the case the inductor current is continuous and IS1 ≥ 0 at
the beginning and the end of the period, then δ3 = 0 and δ1 +δ2 = 1. Here we often write: δ1 = δ
and δ2 = 1 − δ. In the case the inductor current is discontinuous δ1 + δ2 ≤ 1 and δ3 ≥ 0. The
boundary between the two cases is determined by IS1 = 0 and δ1 + δ2 = 1 (This case is shown
in figure 1.4.7).
L1 S2 L1 S2 L1 S2
US S1 UC US S1 UC US S1 UC
Mode I (δ1T) Mode II (δ2 T) Mode III (δ3 T)
Figure 1.4.3: Up-converter in three modes
simple boost simboost
6 / 274 
Continuous Discontinuous
δ1T δ 2T δ1T δ1T δ 2T δ 3T δ1T
Figure 1.4.4: Up-converter waveforms of the three modes in DCM
Figure 1.4.5: Up-converter waveforms of modes I and II in CCM
The energy delivered by the voltage source Us during T is transferred during δ2 T to the load
Uc .
Rδ T Rδ T
Pc = T1 0 2 Uc is2 (t)dt = T1 0 2 Uc Is2 + UsL−U
s
c
t T
dt = Uc Is2 δ2 + Uc (Us − Uc )δ22 2L s
First we eliminate Us and find the general expression

δ1 δ22 Uc2 T Uc2 δ1 δ22 T
Pc = Uc Is2 δ2 − = Uc Is1 δ2 + (1.4.3)
δ1 + δ2 2Ls (δ1 + δ2 ) 2Ls
Then we eliminate Uc which gives
Us2 T
Ps = Us Is1 (δ1 + δ2 ) + (δ1 + δ2 )δ1 (1.4.4)
2Ls
The input power is given in input quantities and the output power in output quantities. They
have the same value because no power is lost in this idealized circuit.
boost
The output characteristic

The output characteristic Uc = f (Ic ) is given in a normalized form. Uc and Ic are mean values.
By definition the normalized output voltage is Un = UUsc and the normalized output current In =
2 ULIs Tc . Because the continuous and the discontinuous parts of the characteristic are different they
will be derived separately.
 7 / 274
Simulation of up-converter with constant output voltage

4
It [A]
2
0
40 5 10 15 20 25 30 35 40 45 50
Id [A]
0
20 0 5 10 15 20 25 30 35 40 45 50
Ut [V]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
ULs [V]
-20
4 0 Is2 5 10 15 20 25 30 35 40 45 50
ILs [A]
3
Is1
2
0 5 10 15 20 25 30 35 40 45 50
time [μs]
Figure 1.4.6: Simulation of up-converter with constant output voltage in continuous current mode
(Is1 =3A, Us =12 V)
Table 1.4.2: Up converter power characteristics
Input power Output power

Us2 δT Uc2 δ(1−δ)2 T
Continuous Current Ps = Us Is1 + 2Ls
Pc = Uc Is2 (1 − δ) − 2Ls
2 Uc2 δ1 δ22 T
Discontinuous Current Ps = (δ1 + δ2 ) U2L
s δ1 T
s
Pc = (δ1 +δ2 )2Ls
8 / 274 
Boost converter - normalized output characteristic

6
5.5
5 δ = 0.8
4.5
4
Un (Uc /Us )
3.5
δ = 0.7
3
2.5 δ = 0.6
2 δ = 0.5
δ = 0.4
1.5 δ = 0.3
δ = 0.2
δ = 0.1
1
0.5
0 0.05 0.1 0.15 0.2 0.25 0.3
In (Ic * 2L / Us T)
Figure 1.4.7: The output characteristic of the up-converter with δ1 as parameter
 9 / 274
The output characteristic with continuous current

The normalized output voltage is:
Uc 1
Un = = (1.4.5)
Us (1 − δ)
The mean value of the output current is:
1 δUs T
Ic = (1 − δ) (IS1 + IS2 ) = (1 − δ)( + IS1 ) (1.4.6)
2 2Ls
and the normalized current is:
2Ls IS1
In = (1 − δ)(δ + ) (1.4.7)
Us T
The output voltage does not change with the output current but only depends on δ whereas the
output current itself changes linearly with IS1 . The boundary with the discontinuous region is
1
determined by IS1 = 0 where Inb = (1 − δ)δ. Together with Unb = 1−δ this is the parameter
representation of the boundary curve, which after elimination of parameter δ looks like Inb =
Unb −1
U2
.
nb
The output characteristic with discontinuous current

The normalized output voltage is:
Uc δ1 + δ2
Un = = (1.4.8)
Us δ2
The mean value of the output current is:
δ2 IS2 δ1 δ2 Us T
Ic = = (1.4.9)
2 2Ls
and the normalized current is:
In = δ1 δ2 (1.4.10)
δ2 δ2
After elimination of δ2 we find the relationship In = (Un1−1) or Un = 1 + In1 . The output voltage
changes with the reciprocal of the output current, resulting in hyperbolic curves.
1.4.3 Buck converter

The circuit is defined by the state of the switches. With two switches there are four modes. Not
all the modes are applicable. Modes I and II are the most important and nearly always present,
mode III is less frequent but mode IV must be prevented, certainly in the basic circuits that will
be explained here.
10 / 274 
I2 I1
S1
L1
UC S2 UO
Figure 1.4.8: Down-converter basic circuit definition
S1 L1 S1 L1 S1 L1
IO1 IO2
UC S2 UO UC S2 UO UC S2 UO
Mode I (δ1T) Mode II (δ2 T) Mode III (δ3 T)
Figure 1.4.9: Down converter in three modes
Simulation of down-converter with constant output voltage

20
It [A]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
Id [A]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
Ut [V]
10
0
10 0 5 10 15 20 25 30 35 40 45 50
ULo [V]
-10
11.5 0 Io2 5 10 15 20 25 30 35 40 45 50
ILo [A]
11 Io1
10.5
0 5 10 15 20 25 30 35 40 45 50
time [μs]
Figure 1.4.10: Down converter waveforms of the three modes Uc = 12V
 11 / 274
Mode S1 S2 Duration
I On Off δ1 T
II Off On δ2 T
III Off Off δ3 T
IV On On n.a.
buck
simplebuck simbuck sim2dir
This division in modes means at the same time a division on the time axis. The down-
converter diagram has been redrawn in figure 1.4.8, defining the elements, voltages and currents
used in the explanation. We shall consider one period of the steady state operation, where all pe-
riods are equal. This means in the analysis that the condition at the start is equal to the condition
after time T, the length of the period. This also applies to the boundaries between the modes,
the condition of the circuit at the end of mode I is exactly the same as at the start of mode II.
We define the condition of the circuit by definition of the state of the elements, i.e. the current
in an inductor and the voltage on a capacitance. Both define the energy in the element. These
states together are called a state space. In our ideal down-converter the input and output voltages
(capacitor voltages) have been assumed not to change, only the inductor current changes.
The three modes give three different circuit diagrams and three intervals on the time scale, to-
gether one period. This means δ1 + δ2 + δ3 = 1
Calculation:
Mode I Mode II
−UL0 = −Uc + U0 UL0 = −U0
dio1 di02
−Uc + U0 = −L0 −U0 = L0
dt dt
(Uc − U0 )t U0 t (1.4.11)
i01 (t) = I01 + i02 (t) = I02 −
L0 L0
t = δ1 T t = δ2 T
(Uc − Uo )δ1 T U0 δ2 T
I02 = I01 + I01 = I02 −
L0 L0
From which it follows:

δ1
U0 = Uc (1.4.12)
δ1 + δ2
12 / 274 
In the case the inductor current is continuous and has the value Io1 ≥ 0 at the beginning and
the end of the period, then δ3 = 0 and δ1 + δ2 = 1. Here we often write δ1 = δ and δ2 = 1 − δ.
In the case the inductor current is discontinuous δ1 + δ2 ≤ 1 and δ3 ≥ 0.
The boundary between the two cases is determined by Io1 = 0 and δ1 + δ2 = 1. The power
delivered by the voltage source Uc duringδ1 T is transferred
during T to the load Uo .
R δ1 T R δ1 T Uc −Uo
Pc = T 0 Uc i01 (t)dt = T 0 Uc I01 + L0 t dt = Uc I01 δ1 + Uc (Uc − U0 )δ12 2LT 0
1 1
First we eliminate Uc and find the general expression of the output power
Uo2 T
Po = Uo Io1 (δ1 + δ2 ) + (δ1 + δ2 )δ2 (1.4.13)
2Lo
Then we eliminate Uo which gives the input power
δ12 δ2 Uc2 T
Pc = Uc I01 δ1 + (1.4.14)
δ1 + δ2 2L0
Table 1.4.4: Down converter power characteristics

Uc2 T U 2T
Continuous Current Pc = Uc I01 δ + δ 2 (1 − δ) 2L0
P0 = U0 I02 − (1 − δ) 2L0 0
Uc2 δ12 δ2 T U 2T
Discontinuous Current Pc = (δ1 +δ2 )2L0
P0 = (δ1 + δ2 )δ2 2L0 0
The input power has been given in input quantities and the output power in output quantities
but in the same case they have the same value, because no power is lost in this idealized circuit.

The output characteristic Uo = f (Io ) shall be given in a normalized form. Uo and Io are mean
values. By definition the normalized output voltage is Un = UUoc and the normalized output
current In = 2LI
Uc
o
T . Because the continuous and the discontinuous parts of the characteristic are
different they will be derived separately.

Uo
The normalized output voltage is Un = Uc
= δ.
The mean value of the output current
1 δ(1 − δ)Uc T
Io = (Io1 + Io2 ) = + Io1 (1.4.15)
2 2Lo
 13 / 274
and the normalized current

In = (1 − δ)δ + 2LUocIo1 T .
The output voltage does not change with the output current but only depends on δ whereas
the output current itself changes linearly with Io1 .
The boundary with the discontinuous region is determined by Io1 = 0 where Inb = (1 − δ)δ.
Together with Unb = δ this is the parameter representation of the boundary curve, which after
elimination of parameter δ looks like Inb = (1 − Unb )Unb . It has the shape of a parabola through
the points Inb = 0 and Unb = 0 and +1.

Uo δ1
The normalized output voltage is Un = Uc
= δ1 +δ2
.
The mean value of the output current
1 δ1 δ2 Uc T
Io = (δ1 + δ2 )Io2 = (1.4.16)
2 2Lo
and the normalized current In = δ1 δ2 .

δ12
After elimination of δ2 we find the relationship In = δ12 Un1−1 or Un = In +δ 2
1
The output voltage changes with the reciprocal of the output current which results in hyperbolic
curves.
Buck converter - normalized output characteristic

1
0.9 δ = 0.9
0.8 δ = 0.8
0.7 δ = 0.7
0.6 δ = 0.6
Un (Uc /Us )
0.5 δ = 0.5
0.4 δ = 0.4
0.3 δ = 0.3
0.2 δ = 0.2
0.1 δ = 0.1
0
0 0.05 0.1 0.15 0.2 0.25 0.3
In (Ic * 2L / Us T)
Figure 1.4.11: The output characteristic of the down-converter with δ1 as parameter
buck
14 / 274 
1.4.4 Ćuk-converter
This converter, invented by S. Ćuk, can be derived from a series connection of the up- and down-
converter. The up-converter determines the output voltage Uc the load, the capacitance C and
the resistance R, is replaced by a down-converter. In figure 1.4.12 it has been shown how the
combination of the two converters takes place.
L1 L2
IC C1 IO
UC S1 S2 UO
IS1 IS2
Figure 1.4.12: Series connection of up- and down-converter
Ćuk
(For definition of i01, i02, is1, is2: see figure 1.4.3 and figure 1.4.9)Us = 12V
simcuk simplecuk
In the second row the left part of the down converter has been rearranged by changing the
place of the input voltage source, a capacitance, and the switch, the transistor. In the third row
the same has been done with the right part of the up-converter and the voltages and currents of
the down-converter have been reversed. Now the right part of the up-converter and the left part of
the down-converter have the same configuration. When the capacitor voltages are equal and the
transistors are operating with the same period and duty cycle the two circuits can be combined
to the one in the last row. This is the Ćuk-converter.
The relation between input voltage Us and output voltage Uo is calculated from (1.4.2) and
(1.4.12) by eliminating Uc .
Uo = δ1 /δ2 Us (1.4.17)
 15 / 274
LS LO
IS C1 IO
US S1 S2 UO
IS + IO Mode I (δ1T)
LS LO
IS C1 IO
US S1 S2 UO
Mode II (δ2 T) IS + IO
LS C1 LO
IS IO
US S1 S2 UO
Mode III (δ3 T)
Figure 1.4.13: Ćuk-converter in three modes
Simulation of Cuk-converter with constant output voltage

4
ILs [A]
Is2
3
Is1
2
80 5 10 15 20 25 30 35 40 45 50
Io2
ILo [A]
time [us]
Io1
7.5
20 0 5 10 15 20 25 30 35 40 45 50
time [us]
It [A]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
time [us]
Id [A]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
Ut [V]
time [us]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
ULs [V]
time [us]
0
-20
0 5 10 15 20 25 30 35 40 45 50
time [μs]
Figure 1.4.14: Ćuk-converter waveforms of the three modes
16 / 274 

values. By definition the normalized output voltage is Un = UUos and the normalized output
current In = 2L UIos T . Because the continuous and the discontinuous parts of the characteristic
are different they will be derived separately.

The normalized output voltage is Un = UUos = 1−δ δ
. The mean value of the output current Io =
1
(I +Io2 ) = δUs T /2Lo +Io1 and the normalized current In = δ +2Lo IUo1s T . The output voltage
2 o1
does not change with the output current but only depends on δ whereas the output current itself
changes linearly with Io1 .
The boundary with the discontinuous region is determined by Io1 + Is1 = 0 where the diode
stops conducting. This is quite different from what we have done in the up- and down-converter
analysis. It may happen that in the discontinuous mode Io1 6= 0 and Is1 6= 0 but Io1 + Is1 = 0.
In this case the mean output current equals: Io = (Io1 + Io2 )(δ1 + δ2 )/2 + δ3 Io1 = Io1 + (δ1 +
δ2 )δ1 Us T /(2Lo ). From this expression it can be found that Io1 = Io − (δ1 + δ2 )δ1 Us T /(2Lo ).
Io2 = Io + (2 − (δ1 + δ2 ))δ1 Us T /(2Lo ) (1.4.18)
From the equality of input- and output power Ps = Us Is = Uo Io = Po it follows Is = Io δ1 /δ2

and Is1 = Io δ1 /δ2 − (δ1 + δ2 )δ1 Us T /(2Ls ).
Is2 = Io δ1 /δ2 + (2 − (δ1 + δ2 ))δ1 Us T /(2Ls ) (1.4.19)
From Io1 + Is1 = 0 and assuming Ls = Lo = L results
Io = 2δ1 δ2 Us T /(2L) (1.4.20)
Together with Unb = δ1 /δ2 and δ1 + δ2 = 1 this is the parameter representation of the boundary
curve, which after elimination of parameter δ1 looks like Inb = 2Unb /(1 + Unb )2 .

The normalized output voltage is Un = Uo /Us = δ1 /δ2 . The mean value of the output current
Io = 2δ1 δ2 Us T /(2L) and the normalized current In = 2δ1 δ2 . After elimination of δ2 we find the
relationship Un = 2δ12 /In . The output voltage changes with the reciprocal of the output current
which results in hyperbolic curves. See figure 1.4.15.
cuk
1.4.5 SEPIC- and ZETA converters

The SEPIC (Single Ended Primary Inductanced Converter) was at first developed for high voltage
output purposes. The non-isolated SEPIC is presented in figure 1.4.16.
 17 / 274
Cuk converter - normalized output characteristic @ Ls = Lo

5
4.5
4 δ = 0.8
3.5
3
Un (Uo/Us )
2.5 δ = 0.7
2
1.5 δ = 0.6
1 δ = 0.5
δ = 0.4
0.5 δ = 0.3
δ = 0.2
δ = 0.1
0
0 0.1 0.2 0.3 0.4 0.5 0.6
In (Io * 2L / Us T)
Figure 1.4.15: Output characteristic of Ćuk-converter
Uc
+ -
+
+
Us U0
- -
Figure 1.4.16: The non-isolated SEPIC converter
18 / 274 
simsepic sepic
The Zeta converter is the dual configuration of the SEPIC. It can also be obtained by chang-
ing input and output of the SEPIC. Both SEPIC and Zeta are closely related to the Ćuk converter.
The Zeta converter is drawn in figure 1.4.17. Because of the strong resemblance between SEPIC
and Zeta we will only be concerned with the Zeta converter in this section. On account of the
simplicity we will study the non-isolated Zeta converter.
Is
U L0
+ Ur - - Uc + + -
L0 I0
+ C
+ + +
C0
Us Ls U Ls UD U0
D -
- R0 -
-
Figure 1.4.17: The non-isolated Zeta converter
zeta
The different modes and waveforms of the non-isolated Zeta converter are drawn on figure
1.4.18 and figure 1.4.19. We start by assuming that the capacitors C and Co are so large that
their voltages are constant. Next we calculate the capacitor voltage of C. We use the fact that
the average inductor voltage is 0 in steady state (otherwise the inductor current would grow to
unlimited values). From this it follows that Uc = Uo .
simplezeta simzeta
In the first mode the transistor conducts and the voltage across both Ls and Lo equals Us . The
inductor currents increase linearly. When the transistor is turned off the diode starts conducting
and the second mode starts. The voltage across both Ls and Lo now equals −Uo . The inductor
currents decrease linearly. The third mode starts when ILo = −ILS and diode D turns off. Both
inductor currents now remain constant.
The relationship between input voltage Us and output voltage Uo can be calculated by, again,
using the fact that the average inductor voltage is 0. For inductor Ls (and Lo for that matter) this
leads to the following equation:
δ1 US − δ2 Uo = 0 (1.4.21)
 19 / 274
Uc Uc Uc
- + - + - +
L0 L0 L0
+ + +
Ls + Ls + Ls +
Us Us Us
- U0 - U0 - U0
- - -
m ode I m o d e II m o d e III
d u ra tio n δ1 T d u ra tio n δ2 T d u ra tio n δ3 T
Figure 1.4.18: Zeta-converter in three modes
Simulation of Zeta-converter with constant output voltage

6
ILs [A]
4
2
10 0 5 10 15 20 25 30 35 40 45 50
ILo [A]
time [us]
8
6
20 0 5 10 15 20 25 30 35 40 45 50
time [us]
It [A]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
time [us]
Id [A]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
Ut [V]
time [us]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
ULs [V]
time [us]
0
-20
0 5 10 15 20 25 30 35 40 45 50
time [μs]
Figure 1.4.19: Zeta-converter waveforms of the three modes Uc = 12V
20 / 274 
Yielding:
δ1
Uo = Us (1.4.22)
δ2
values. By definition the normalized output voltage is Un = Uo /Us and the normalized output
current In = 2LI0 /Us T . Because the continuous and discontinuous parts of the characteristics
are different they will be derived separately.

The normalized output voltage is
Un = Uo /Us = δ/(1 − δ) (1.4.23)
The mean value of the output current is
Io = δUs T /2Lo + I01 (1.4.24)
and the normalized current (L = Ls = Lo )
In = δ + 2LI01 /Us T (1.4.25)
The output voltage does not change with the output current but only depends on δ whereas the
output current itself changes linearly with I01 .

The normalized output voltage is
Un = Uo /Us = δ1 /δ2 (1.4.26)
The mean values of the output current Io and the input current Is can be written as:
Io = I01 + (δ1 + δ2 )δ1 U nT /(2Lo ) (1.4.27)
Is = Is1 + (δ1 + δ2 )δ1 U nT /(2Ls ) (1.4.28)
From the equality of input- and output power Ps = Us Is = Uo Io = Po it follows
Is = Io δ1 /δ2 (1.4.29)
Using I01 = −Is1 and (1.4.27) through (1.4.29) yields for Io :
Io = 2δ1 δ2 Us T /(2L) (1.4.30)
 21 / 274
and for the normalized output current:
In = 2δ1 δ2 (1.4.31)
After elimination of δ2 we find the relationship
Un = 2δ12 /In (1.4.32)
curves. The boundary with the discontinuous region is determined by δ1 = δ and δ2 = 1 − δ:
Inb = 2δ(1 − δ) (1.4.33)
Unb = δ/(1 − δ) (1.4.34)
Eliminating δ yields: Inb = 2Unb /(1 + Unb )2 .

The output characteristic is drawn in figure 1.4.20. Note that it is the same as for the closely
related Ćuk converter.
zeta
1.5. Isolated converters
1.5.1 Flyback converter

In many applications isolation from the system is necessary for safety reasons. The flyback
converter does not need additional inductive elements because the inductor can be provided with
an additional winding. In comparison with the push-pull converter and the forward converter,
the flyback converter is the least expensive and the simplest system. It is the sole circuit needing
only one inductive element, which will be referred to as the inductor according to its function.
The circuit is defined by the state of the switches. With two switches there are four modes. Not
all the modes are applicable.
Modes I and II are the most important and always present, mode III less frequent but mode IV
must be prevented.
flyback
This division in modes means at the same time a division on the time axis. The flyback-
converter diagram has been redrawn in figure 1.5.1, defining the elements, voltages and currents
used in the explanation. We shall consider one period of the steady state operation, where all pe-
riods are equal. This means in the analysis that the condition at the start is equal to the condition
after time T, the length of the period. This also applies to the boundaries between the modes, the
condition of the circuit at the end of mode I is exactly the same as at the start of mode II. We
define the condition of the circuit by definition of the state of the elements, i.e. the current in
22 / 274 
1.5 Isolated converters
Zeta converter - normalized output characteristic @ Ls = Lo

5
4.5
4 δ = 0.8
3.5
3
Un (Uo/Us )
2.5 δ = 0.7
2
1.5 δ = 0.6
1 δ = 0.5
δ = 0.4
0.5 δ = 0.3
δ = 0.2
δ = 0.1
0
0 0.1 0.2 0.3 0.4 0.5 0.6
In (Io * 2L / Us T)
Figure 1.4.20: Output characteristic of non-isolated Zeta converter
iD1 D1
n:1
+ +
Ls L0 U0
C0
Us iT -
T1
-
Figure 1.5.1: Isolated flyback-converter basic circuit definition
 23 / 274
Mode S1 S2 Duration
I On Off δ1 T
II Off On δ2 T
III Off Off δ3 T
IV On On n.a.
an inductor and the voltage of a capacitance, both define the energy in the element. These states
together are called a state space. In our ideal flyback-converter the input and output voltages
(capacitor voltages) have been assumed not to change, only the inductor current changes.
The three modes give three different circuit diagrams and three parts on the time scale, together
one period. This means
δ1 + δ2 + δ3 = 1
Ls Uo L0 Uo Uo
+ + + + + +
iT iD
- - - - - -
Us Us Us
Figure 1.5.2: Circuit in three modes
simpleflyback simflyback
Calculation:
with n · Is1 = Io1 , n · Is2 = Io2 and n2 · Lo = Ls
24 / 274 
Simulation of flyback-converter with constant output voltage

40
It [A]
20
0
40 0 5 10 15 20 25 30 35 40 45 50
Id [A]
20
0
20 0 5 10 15 20 25 30 35 40 45 50
Ut [V]
10
0
20 0 5 10 15 20 25 30 35 40 45 50
ULs [V]
-20
30 0 5 10 15 20 25 30 35 40 45 50
IT + ID [A]
20
10
0 5 10 15 20 25 30 35 40 45 50
time [μs]
Figure 1.5.3: Waveforms of the three modes Us = 12 V, n=1
 25 / 274
Mode I Mode II
ULs = Us ULo = −Uo
diT diD
Us = Ls −Uo = Lo
dt dt
Us t Uo (1.5.1)
iT (t) = Is1 + iD (t) = Io2 − t
Ls Lo
t = δ1 T t = δ2 T
nUs δ1 T Uo δ2 T
nIs2 = nIs1 + Io1 = Io2 −
Ls Lo
Us δ1 T
Io2 = Io1
n Lo
and
Uo δ1
= (1.5.2)
Us nδ2
is the solution of the last two equations. Two new current values have been introduced, Io1 being
the current when T 1 turns on and Io2 when the diode starts conduction, both referred to the
secondary. For the case of continuous current, (1.5.2) is simplified to:
Uo δ
= (1.5.3)
Us n(1 − δ)
The power is delivered by the voltage source Us during the first part of the period δ1 T and
delivered to the load Uo during δ2 T
Z Z
1 δ1 t 1 δ1 t Us t U2
Ps = Us is (t)dt = Us Is1 + dt = Us Is1 δ1 + s δ12 T (1.5.4)
T 0 T 0 Ls 2Ls
Z δ2 t Z δ2 t
1 1 Uo t U2
Po = Uo iD (t)dt = Uo Io2 − dt = Uo Io2 δ2 − o δ22 T (1.5.5)
T 0 T 0 Lo 2Lo
With (1.5.1) through (1.5.5) it can be checked that Ps = Po . The input- and output power
can be expressed in input- and output quantities and are given in table 1.5.2 for continuous and
discontinuous currents.
The input power has been given in input quantities and the output power in output quantities
but in the same case they have the same value, because no power is lost in this idealized circuit.

values. By definition the normalized output voltage is Un = nUo /Us and the normalized output
current In = 2nLo Io /Us T . Because the continuous and the discontinuous parts of the character-
istic are different they will be derived separately.
26 / 274 
Table 1.5.2: Flyback converter power characteristics

Us2 δ 2 T Uo2 (1−δ)2 T
Continuous Current Ps = Us Is1 δ + 2Ls
Po = Uo Io2 (1 − δ) − 2Lo
Us2 δ12 T Uo2 δ22 T
Discontinuous Current Ps = 2Ls
Po = 2Lo
The normalized output voltage is Un = nUo /Us = δ/(1 − δ). The mean value of the output
current:
Io = (Io1 + Io2 )(1 − δ)/2 = (δUs T /2nLo + IL1 )(1 − δ) (1.5.6)
and the normalized current: In = (1 − δ)δ + 2nLo Io1 (1 − δ)/Us T .

The output voltage does not change with the output current but only depends on δ whereas
the output current itself changes linearly with Io1 . The boundary with the discontinuous region
is determined by Io1 = 0 where Inb = (1 − δ)δ. Together with Unb = δ/(1 − δ) this is the
parameter representation of the boundary curve, which after elimination of parameter δ looks
Unb
like Inb = (1+U nb )
2 . Its shape has been given as the dashed curve in figure 1.5.4 and is identical
to that of the Ćuk converter.
The normalized output voltage is Un = nUo /Us = δ1 /δ2 . The mean value of the output current:
Io = δ2 Io2 /2 = δ1 δ2 Us T /2nLo (1.5.7)
and the normalized current In = δ1 δ2 . After elimination of δ2 we find the relationship:
In = δ12 /Un or Un = δ12 /In (1.5.8)
curves. Operation with continuous output current minimizes the effect of load current variation,
for output currents above the boundary value. At lower output currents the output voltage will
rise and follow the hyperbolic curve. The output power Pn = Un In will be constant as follows
from (1.5.8). If no load situations can be expected a control circuit will be necessary to clamp
the output voltage to the maximum allowable value.
flyback
 27 / 274
Flyback converter - normalized output characteristic

10
9 δ = 0.9
7
Un (n * Uo/Us )
4 δ = 0.8
3
δ = 0.7
2
δ = 0.6
1 δ = 0.5
δ = 0.4
δ = 0.2 δ = 0.3
0
δ = 0.1
0 0.05 0.1 0.15 0.2 0.25 0.3
In (n * Io * 2Lo / Us T)
Figure 1.5.4: The normalized output characteristic of the flyback-converter with δ1 as parameter
28 / 274 
Transistor
The transistor voltage and current ratings must be chosen according to the available input voltage
Us and the required output power Po . From (1.5.2) and figure 1.5.1 we find IT m = Io2 /n and
UT m = Us + nUo = Us (δ1 + δ2 )/δ2 , which simplifies to UT m = Us + nUo = Us /(1 − δ) for
continuous current. With a duty cycle of δm = 0.5, the maximum transistor voltage UT m is
twice the supply voltage Us . When the transistor is turned off, its inductive load causes an abrupt
rise of the transistor voltage so that the latter would attain its peak value before the transistor
current becomes zero. A protective network, usually called a snubber network, is necessary. To
ensure safe operation the transistor current must fall to zero before the transistor voltage reaches
the boundary value defined by the Safe Operating Area (SOAR). The snubber circuit of figure
1.5.5 ensures that this condition is satisfied. When the transistor is turned off, charging of C1
via D2 greatly delays the rise of the transistor voltage. During transistor turn-on R1 limits the
capacitor discharge current to a safe level. On the other hand R1 must discharge C1 even during
the shortest conduction time of the transistor.
D1
+ +
L0 U0
C0
Us -
C1
T1
D2
R1
-
Figure 1.5.5: Flyback converter with snubber network
flybacksnubber
The output ripple voltage is found from paragraph 7.
Other topologies of the flyback converter are given in the next figures. Very simple is of
course the non-isolated flyback converter, figure 1.5.6.
The circuit in figure 1.5.7 uses two transistors switched simultaneously. Clamping diodes D3
and D2 restrict the primary voltage and also the transistor voltage to Us . Because the reversed
inductor voltage (occurring while the transistors are off) is clamped to Us , the duty cycle shall
not exceed 0.5, otherwise the net amount of volt-seconds will not become zero and the core will
saturate.
 29 / 274
+ -
D1
Us L0 U0
C0
- +
Figure 1.5.6: Non-isolated flyback circuit
The multiple output circuit shown in figure 1.5.8 illustrates the simplicity of the flyback
converter. Each output has only one diode and one capacitor, the multiple-winding inductor
being common to the outputs. + +
+ U01
D3 -
T1
D1
n:1 +
+
U02
Us C0
U0 -
Us
- +
D2
T2 U03
-
-
Figure 1.5.7: Two-transistor flyback converter
-
1.5.2 Forward converter

In the circuit of figure 1.5.9 the function of the down converter can easily be found. The switch,
transistor T1 , diode D2 and inductor Lo have the same function as S1 , S2 and Lo of the down
converter. The transformer, necessary for isolation, transforms the primary current pulses to the
secondary. The diode D1 allows the forward current but prevents the reverse transformer voltage
to reach the output circuit. It will be clear that the transformer reverse voltage is not clamped
by the output voltage as with the flyback circuit. To prevent “infinite” reverse voltages the trans-
former has a third winding, closely coupled with the primary and with the same number of turns,
and diode D3 to limit the reverse voltage to the level of the supply voltage. They provide for
demagnetization of the transformer core after T1 has been switched off. Ideally the demagnetiza-
tion needs the same time as the magnetization, because the windings are equal and connected to
30 / 274 
+ +
U01
D3 -
T1
D1
n:1 +
+
U02
C0
U0 -
Us
- +
D2
T2 U03
-
-
Figure 1.5.8: Multiple output flyback converter
the same value, but in opposite direction, of the input voltage. If switch T1 is conducting longer
than T /2 there is not sufficient time to demagnetize the core and saturation will occur. The duty
cycle is thus restricted to values below δ1 = 0.5.
forward
The transformer will not be considered as ideal, in contrast to the other components. Its
inductance, when measured over the primary, is not infinitely large and will be denoted by L1 ,
the “magnetizing inductance”. When the transistor is conducting L1 is always connected to the
supply voltage Us , which means that a magnetizing current will flow with a maximum value
of Immax = δ1 T Us /L1 at t = δ1 T . It has been given as an additional line in the graph of the
transistor current in figure 1.5.11 because it adds up to the current caused by the down converter
action. After the transistor has been switched off, the energy in L1 is removed by an additional
winding, tightly coupled with the primary, and diode D3 and fed back to the voltage source
Us . As long as this “demagnetizing current” flows the primary voltage will be equal to Us but
opposite in direction, and the transistor voltage thus will be 2Us . Ideally, this “demagnetizing”
lasts just as long as the “magnetizing” when the number of turns of the demagnetizing winding is
equal to that of the primary and because the applied voltages are equal but opposite in direction.
After demagnetization the transistor voltage will be Us . The transistor current graph of figure
1.5.11 shows that the transformer will not be completely demagnetized at the end of the period
if δ1 > 0.5 so the duty cycle of this forward converter shall not exceed 0.5.
There are other means to de-energize the transformer. The snubber circuit that has been applied
to the flyback converter in figure 1.5.5 can also be used to absorb the magnetization energy of
 31 / 274
D3 i D3
i D1 L0
n:n:1
+ +
D1 i L0
UL1 L1 L2 D2 C0 U0
i D2
Us iT -
UT
T1
-
Figure 1.5.9: Isolated forward converter
iD 1
L0 iD 3 L0
+ + + iD 2 + + +
L 1 /n 2 U0 L1 U0 L1 U0
U s /n Us Us
- - - - - -
Figure 1.5.10: Forward converter in three modes
32 / 274 
n.iT (t)
n.iD3 (t)
iD 2 (t)
uT (t)
0
uL 1 (t)
0
us
n uo
nti
co
o us
iL 0 (t) n t inu
d is c o
0
δ1T
δ2T δ3T
Figure 1.5.11: Forward converter waveforms of the three modes
 33 / 274
the transformer, figure 1.5.12. This amount of energy is much larger than in the flyback, it is
converted into heat and the energy is lost. It is used only for low power converters where an
additional winding on the transformer would be too expensive. Care must be taken that the
demagnetization is complete at the end of every period.
D1 L0
D2 C0 U0
Us D3
T
C1 R1
Figure 1.5.12: Forward converter with energy absorbing network. C1 , D3 and R1 replace the
demagnetizing winding and diode
Not only for the absorption of the demagnetizing energy, but also to reduce the transistor
turn-off losses this snubber network is necessary and will be applied therefore also in forward
converters with a demagnetizing winding.
The output characteristic is equal to that of the down converter, figure 1.4.11, with the re-
striction that δ1 < 0.5.
By using two transistors, as in figure 1.5.13, the transistor voltage can be limited to Us by the
diodes D3 and D2 . These diodes will also carry the demagnetizing current to the supply and no
additional winding is necessary.
1.5.3 Push-pull converter
pushpull
With two forward converters operating in anti-phase the simplest configuration of the push-
pull converter is obtained. The d.c. voltage of the source is chopped by the transistors T1 and T2
and a square wave voltage appears at the secondary of the transformer. When T1 is conducting
the current is fed to the output by D2 . This situation has been given in figure 1.5.15, where the
voltages and currents of T2 and D1 have been omitted because they have the same shape but are
shifted over a half period. The forward current through D2 flows through Lo and the load. When
34 / 274 
+
D3
T1
D1 L0
n:1
+
Us D4 C0 U0
-
D2
T2
-
Figure 1.5.13: Two transistor forward converter
U Tr U L0
i Tr i D1 D1 iL
T1 n:1
i m1
+
L0
U L1 L2 U0
L1 C0
- Us +
-
L1 L2
T2
i D2 D2
Figure 1.5.14: Conventional push-pull converter
 35 / 274
T1 is turned off a decreasing current flows through Lo , determined by the output voltage −Uo
over the inductor. The current path is completed by the diodes, one half of the current for every
diode. At the primary side the magnetizing current has been added to the forward current in the
waveform of uT 1 . After T1 has been switched off there is no primary transformer voltage and im
continues to flow at the secondary through the conducting diodes D1 and D2 . So the load current
and magnetizing current add in one diode and subtract in the other diode. At low load current one
diode prematurely ceases to conduct and the diode still conducting will divert the magnetizing
current to the load. Eventually both diodes stop conducting before the end of the half period and
another path has to be found for the magnetizing current. This is done at the primary side, by
connecting anti-parallel diodes over the transistors, thus diverting the magnetizing energy to the
voltage source Us . The transistor voltage uT 1 equals the input voltage Us . As soon as the second
transistor T2 is switched on Us appears over the lower L1 inducing the same voltage over the
upper L1 which causes uT 1 to rise to 2Us .
n i T + n i m iL 0 im
L0 U L0 U
+ + 0 + + 0
L 1 /n 2 L1 iL 0
U s /n - - U s- -
m ode I m o d e II
d u ra tio n δ 1 T d u ra tio n δ 2 T
Figure 1.5.15: Push-pull converter in two modes
Instead of two equal secondary windings L2 and two diodes a diode bridge can be used,
connected to only one secondary L2 .
Other configurations are the bridge circuit and the single-ended push-pull or half bridge cir-
cuit. The first has four transistors operating two by two, i.e. T1 and T4 are conducting or T2 and
T3 . The transistor voltage is limited to Us . The number of transistors and their associated drive
circuitry is a drawback.
The same advantages are found in the half bridge circuit, where only Us /2 is applied to the pri-
mary. The transformer ratio can be changed to obtain the same output voltage, but the transistor
currents increase a factor 2 if we require the same output power as with the bridge circuit.
36 / 274 
1.6 Determination of the output ripple voltage of converters
n.i T1(t)
n.im (t)
iD2(t)
0
UT1(t)
0
UL0(t) 0
s
ti n uou
co n
iL0(t)
0
δ1 T δ2 T δ1 T δ2 T
Figure 1.5.16: Push-pull converter waveforms of the two modes
 37 / 274
+
T1 T3
L0
n:1 D1
+
C0 U0
Us -
D2
T2 T4
-
Figure 1.5.17: Bridge converter
+
+ C1
T1
L0
n:1 D1
+
M C0 U0
Us -
i D2 D2
+ C2
T2
-
Figure 1.5.18: Half bridge or single-ended push-pull circuit
38 / 274 
i(t) I0
+
voltage current
converter U sink load
source
C
-
Figure 1.6.1: Output of a converter
1.6. Determination of the output ripple voltage of converters
1.6.1 Introduction
The average output current Io delivers energy to the load. Its relation to the instantaneous output
current i(t) is given by
Z T
1
Io = i(t) dt (1.6.1)
T 0
T one operating period of the converter, T = 1/f

i(t) instantaneous output current
Graphs of the current as a function of time will be used to determine the charge ∆Q with
which the capacitor voltage is modulated. From ∆Q = CUr the ripple peak voltage Ur is
calculated. With i = dq/dt, simplified to ∆Q = i∆t, we use the equation
Ur = ∆Q/C = i∆t/C
Converters are mainly used to obtain a stable voltage supply for electronic circuits. The
specification shows the required output voltage Uo , its allowable voltage ripple, its long term
stability under specified variations of input voltage and output power or current. A control loop
will be present, measuring the output voltage and regulating the transistor on-time δ1 T . In this
way the average power of every period can be adjusted. However, what happens inside one period
cannot be compensated for. One of the properties that remain uncompensated is the current ripple
that causes a voltage ripple over the output buffer capacitor.
1.6.2 Idealized current waveform I

This waveform, given in figure 1.6.2, is applicable to all converters with the inductor at the
output, like the down-converter, Ćuk-converter, forward-converter, ZETA-converter.
The current is determined by a minimum value I1 and a maximum value I2 , a transistor
conduction time δ1 T and a diode conduction time δ2 T . The average current
Io = (δ1 + δ2 )(I1 + I2 )/2 (1.6.2)
 39 / 274
I I2 I
Ih
I0 I2
Ih
Δt
I1 I0
Δt
0 0
0 t1 t2 T t 0 t1 t2 T t
δ1T δ2T δ1T δ2T δ3T
Figure 1.6.2: Current waveform I
The hatched area above the Io level has a surface equal to the ∆Q with which the capacitor
is charged above the average voltage level. The capacitor is then discharged during the time of
the hatched area below the average current level. The surface of both areas is equal in the steady
state where the average level is constant. The surface is determined as
Ih ∆t/2 = ∆Q (1.6.3)
We determine t1
I2 − I1
i1 (t) = I1 + t (1.6.4)
δ1 T
(Io − I1 )(δ1 + δ2 ) δ1 T
t1 = (1.6.5)
Io − (δ1 + δ2 )I1 2
and t2 from
I2 − I1
i2 (t) = I2 − t (1.6.6)
δ2 T
(2 − δ1 − δ2 )Io − I1 (δ1 + δ2 ) δ2 T
t2 = (1.6.7)
Io − (δ1 + δ2 )I1 2
The time ∆t will be
T (δ1 + δ2 )((2 − δ1 − δ2 )Io − (δ1 + δ2 )I1 )

∆t = δ1 T − t1 + t2 = (1.6.8)
2 Io − I1 (δ1 + δ2 )
40 / 274 
These equations have been found from i1 (t1 ) = Io and i2 (t2 ) = Io and eliminating I2 with
(1.6.2). During ∆t the capacitor voltage increases from the minimum value to the maximum
value. Ih of the triangle can also be expressed in Io and I1 (1.6.2).
2Io (2 − δ1 − δ2 )Io − (δ1 + δ2 )I1

Ih = I2 − Io = − I1 − Io = (1.6.9)
δ1 + δ2 δ1 + δ2

 T Io
 in the light mode : ∆Q = (2 − δ1 − δ2 )2
∆Q will be : 4
 in the heavy mode : ∆Q = T (Io − I1 )

4
1.6.3 Idealized current waveform II

Other converters, like the up-converter, flyback-converter, SEPIC-converter, show an output cur-
rent that flows only when one switch, normally the diode, is conducting. Examples of different
waveforms are given in figure 1.6.3
I I2
I
I2
ΔQ = 100 I1
I0
ΔQ = 66
I0 I1
t t
0 T 0 T
δ1T δ2T δ1T δ2T
(a) (b)
I I
I2
I2
ΔQ = 32
I0
I0
t t
0 t2 T 0 t2 T
δ1T δ2T δ1T δ2T δ3T
(c) (d)
Figure 1.6.3: Current waveforms II
 41 / 274
The current pulse is determined by its maximum I2 , its minimum I1 and its duration δ2 T ,
while the average output current
Io = (I1 + I2 )δ2 /2 (1.6.10)
1. We see I1 > Io and ∆Q can be easily found from the hatched surface below the average
current level Io .
Uo δ1 T
∆Q = Io δ1 T , Ur = (1.6.11)
RC
2. There is only a small difference with (1.6.11); I1 = Io and the ripple voltage is given by
the same equation.
3. This converter is operating on the borderline of the heavy and the light modes; I1 = 0 and
δ1 + δ2 = 1. In this case the area of the hatched triangle
∆Q = (I2 − Io )t2 /2 (1.6.12)
The baseline of the hatched triangle
t2 = δ2 T (1 − δ2 /2) (1.6.13)
4. The converter is operating in the light mode, δ1 + δ2 < 1. Here again (1.6.12) is valid and
we find for both c. and d.
Io T
∆Q = (1.6.14)
4(2 − δ2 )2
1.6.4 Second source of voltage ripple

In practice capacitors have parasitics, of which the equivalent series resistance (ESR) is of con-
siderable importance with regard to the ripple voltage. The voltage io (t) × ESR must be added
to the ripple we have calculated but be aware of the phase difference of both voltages.
APPLICATION
1.7. Up-converter as preconditioner
1.7.1 Introduction
The ever increasing number of electronic appliances like PC, TV, domestic and laboratory equip-
ment forms an ever increasing load for the energy supplier. Nearly all of them need a AC-DC-
converter that may cause severe pollution of the power distribution system. The harmonics of the
system frequency cause instabilities and damage. Therefore limits have been defined expressed
42 / 274 
1.7 Up-converter as preconditioner
in individual limits for every harmonic amplitude (IEC) or in one figure for Total Harmonic Dis-
tortion THD (in the USA). More about this subject can be found in chapter AC-DC and in [7].
One of the possible measures that can attenuate the harmonics is a low pass filter. The simplest
configuration consists of one choke in series at the system side through which the load current
flows and one capacitor at the appliance side parallel to the supply leads to short-circuit the higher
frequencies, figure 1.7.1. However, it is large and heavy in relation to the electronic circuit.
+
Ls
diode
Us Cs bridge Uc
C
0
Figure 1.7.1: Harmonic filter to attenuate harmonics of the system frequency
A more appropriate principle that is often used is a switch mode circuit. The alternating
voltage of the system is rectified by a diode bridge but not buffered by a large capacitance. The
input voltage of the SMPS then is not a constant direct voltage as used in the previous circuits
in this chapter but a full-wave rectified sine wave. If we can make the input current of the
converter proportional to the input voltage then the waveform of the current will be sinusoidal
and ideally all distortion disappears. There will be no phase difference either. However, current
at the operating frequency and its harmonics will flow into the distribution system. It has to be
attenuated to the desired level by filtering. The filter is much smaller and lighter because of the
much higher frequency than the original low frequency filter.
This type of circuit is called boost rectifier or preconditioner.
+ +
Ls
diode
Us SMPS Uc
bridge
C
0 0
Figure 1.7.2: Electronic power factor improvement
 43 / 274
Of the four basic switch mode power circuits only the down-converter can not be used as
preconditioner because the input voltage has to be above the output voltage. We will consider
an up-converter with discontinuous current. The switching frequency of the converter will be
chosen much higher than the supply frequency. It is then possible to consider the supply voltage
to be constant during every high frequency period and the envelope of all voltage steps during
the low frequency period approximates a half sine wave, as given by figure 1.7.3. We shall only
consider one half period, 0 ≤ ωs t ≤ π , in which the voltage us = ûs sinωs t.
<
us sin ωst
0 π/ 2 π
ωs t
Figure 1.7.3: A half sine wave with 20 discrete voltage steps, fp = 2000Hz
Every step gives a current pulse of which the amplitude is determined by the requirement that
the low frequency component of the pulses has the shape of a half sine wave. figure 1.7.4 shows
an example.
i ( ωst )
0 π/ 2 π
ωs t
Figure 1.7.4: Current pulses within a half sine wave of the supply
44 / 274 
1.7.2 Determination of the control characteristic

Notation: The low frequency is given as fs , the time t = 0 at the start of a half period of duration
ωs t = π. The high frequency period is called T , the time in one h.f. period is given by τ .The
supply (or systems) frequency is ωs . The average input current is
δ1 + δ2 δ1 + δ2 δ1 Us T
Is = I2 = (1.7.1)
2 2 L
IS US
L
δ1T δ 2T δ 3T δ1T
Figure 1.7.5: Definition of input current
After elimination of δ2 with (1.4.2):
δ12 T Uo Us
Is = (1.7.2)
2L Uo − Us
Now Is is no longer an average value but depends on ωs t
δ12 T Uo ûs sin ωs t

is (ωs t) = (1.7.3)
2L Uo − ûs sin ωs t
If the denominator is constant, the source current has a sinusoidal shape. With δ1 and T as
controllable variables this may be written as
δ12 T
k= ≡ constant (1.7.4)
1 − Uûso sin ωs t
δ1 constant
It means that the period T has to be a function of time during one low-frequency half period (10
ms if fs = 50 Hz).
k ûs ûs
(ωs t) = 2
(1 − sin ωs t) = k1 (1 − sin ωs t) (1.7.5)
δ1 Uo Uo
 45 / 274
In the numerical examples we will use Uo = 400V and us = 325 sin ωs t, from Us = 230V.
In the top of the l.f. half sine wave sin ωs t = 1 and the h.f. period T = (1 − 0.8125)k/δ12 =
0.1875k/δ12 while at the start of the l.f. period T = k/δ12 , a ratio of 1 : 5.3. The sweep of the
switching frequency will also be 5.3 : 1.
Graph of T with δ1 constant

1
0.9
0.8
0.7
0.6
T(ωs t)/k1
0.5
0.4
us/Uo =
0.3
0.8125
0.2
0.1
0
0 pi/2 pi
ωs t [rad/sec]
Figure 1.7.6: The graph of T during a half l.f. period for ûs /Uo = 0.8125
preconditioner
δ1 T constant
The purpose is that the conduction time of the transistor is constant in every h.f. period. This is
a very practical requirement, however, it requires that the off-time of the transistor has to follow
the function δ1 T is constant. Both δ1 and T will therefore change during the l.f. period. The rate
of change of δ1 will again be 1 : 5.3 and that of T will be 5.3 : 1.
k ûs δ1 T ûs
δ1 (ωs t) = (1 − sin ωs t) = (1 − sin ωs t)
δ1 T Uo k2 Uo
δ12 T 2 k2
T (ωs t) = ûs
= ûs
(1.7.6)
k(1 − Uo sin ωs t) (1 − Uo sin ωs t)
46 / 274 
δ12 T 2
k2 =
k
The constant value k2 has the dimension time. The graph B of figure 1.7.6 gives T (ωs t)/k2 .
Graph A shows k2 δ1 with 100% for its maximum value.
Graph of δ1 with δ1T constant

100
A
δ1(ωs t) [%]
50
us/Uo =
0.8125
0
0 pi/2 pi
Graph of T with δ1T constant
6
B
4
T(ωs t)/k2
us/Uo =
2
0.8125
0
0 pi/2 pi
ωs t [rad/sec]
Figure 1.7.7: Graphs showing the change during one l.f. period of δ1 (A) and T (B) for ûs /Uo =
0.8125 and δ1 T constant
preconditioner
δ1 T constant, operation at the boundary

The transistor voltage during discontinuous conduction is illustrated by figure 1.7.8. At the
end of the diode current pulse an oscillation of the transistor voltage starts, because there is no
longer damping of the parasitic capacitance and inductance. To save energy, the transistor can
best be switched on at the moment when the transistor voltage has its minimum value, that is
immediately in the first (negative) peak of the oscillation. At that very moment the current is
zero, also a condition for low switching loss.
The end of every h.f. period is not determined by a control curve as in §1.7.2 but by the end of
the current pulse.
 47 / 274
iL
0
δ1 T δ2 T
T
iD
iTr
0
U0
Us
u Tr
0
Figure 1.7.8: Transistor voltage under discontinuous operation
48 / 274 
During one h.f. period the input current is, because δ1 + δ2 = 1.
δ1 T ûs sin ωs t
is (ωs t) = (1.7.7)
2L
The input power, calculated over one l.f. period is
Z π Z π
1 1 δ1 T 2 2 δ1 T 2
Ps = is (ωs t) ûs sin ωs tdωs t = ûs sin ωs tdωs t = U (1.7.8)
π 0 π 0 2L 2L s
with Us being the RMS-value of the source alternating voltage.
The input as well as the output power can be controlled by varying δ1 T , keeping it constant over
a half l.f. period, because otherwise the input current will not have a sine waveform, but a slow
variation is allowed. We still have to determine the h.f. period T . It ends very soon after the
diode has ended conduction. The diode current can be written as
ûs sin ωs t Uo − ûs sin ωs t

iD (τ ) = δ1 T − (τ − δ1 T ) (1.7.9)
L L
where τ is the time within one h.f. period. The diode is conducting from τ = δ1 T to τ = T
and iD (T ) = 0 from which it appears that

ûs
δ1 = 1− sin ωs t (1.7.10)
Uo
These equations have already been derived as (1.7.6) and with k = δ1 T give the results
(1.7.10).
The smooth waveform between the peaks in figure 1.7.10 can be considered as the source
current after filtering of the high frequencies. A low pass filter will be necessary to fulfil the
interference requirements.
T constant
It follows from (8.2.4) that

k ûs
δ12 = 1− sin ωs t
T Uo
and with a new constant k32 = k/T
r
δ1 ûs
= 1− sin ωs t (1.7.11)
k3 Uo
preconditioner
 49 / 274
200 1.0
160 .8
f( kH z ) f δ1 δ
120 .6
80 .4
40 .2
0 0
0 π/ 2 π
ωs t
Figure 1.7.9: Graph of δ1 and f during one half l.f. period
i s ( ωst )
0 π/ 2 π
ωs t
Figure 1.7.10: Input current during one half l.f. period
50 / 274 
Graph of δ1 with T constant

1
0.9
0.8 0.6
0.7 us/Uo
0.6 0.8
δ1(ωs t)/k3
0.5
0.4
0.3
0.2
0.1
0
0 pi/2 pi
ωst [rad/sec]
Figure 1.7.11: Graph of δ1 /k3 during one half l.f. period
1.7.3 Circuit description

Input low-pass filter
As has been illustrated in figure 1.7.10 a low-pass filter in the connection with the system is
necessary to prevent electromagnetic interference with other users of the system. It contains an
inductor and a capacitor, see figure 1.7.12.
The load Rb determines the damping of the filter. Its resonance frequency is found from
1 1 1 L
ω02 = − Z=
LC 4Rb2 C 2 Rb C
is the real input impedance. We choose normally
r
L
≥ 0.1Rb
C
With a load Rb = 1600Ω this means
r
L
≈ 160Ω
C
in order to prevent oscillations.
 51 / 274
Rmains C
Rb
Figure 1.7.12: Input filter
6.8 mH
B 250
C 1500
U1 3.5 mH U2 U3
BYV 26C
0.22μ
400V
IRF
720
V P109 3.3 M
100 ~10 0 μ
A
10 n S
U4 2 x22μ
400V +12V
BYV 27
200 450V
0.1μ 1μ
2N 6659 1Ω
G 1Ω
I
BYV 27-200
Figure 1.7.13: Power circuit of the preconditioner
52 / 274 
Power supply of the control circuit

The control circuit will not be treated in detail but as it is always present the power supply for
a low voltage low energy circuit will be present in nearly any power electronics appliance. To
find a circuit with low losses and cheap components is not easy. A possible energy source can be
found in an additional winding on the inductor of the converter, or a capacitive voltage divider
directly behind the rectifying bridge diodes. This method does only function if there is no buffer
capacitor, i.e. in the case of a preconditioner. There is no voltage if the converter does not
operate and the converter cannot start if there is no supply for the base drive and control circuit.
This makes a start-up circuit necessary that is able to supply the energy to the drive and controls
to start the power converter. In our example a 22kΩ resistor connects the 220µF to the supply
voltage by switching on a transistor as soon as its voltage exceeds 130V. A 12V zener diode
clamps the low capacitor voltage and a zener diode in the base voltage divider ensures switching
off of this temporary current path as soon as the capacitor voltage has reached 12V, the emitter
voltage of the transistor. When the converter is operational double rectified sine waves appear
behind the diodes and this causes a current through C1 = 0.1µF, diode D1 into C2 = 220µF. The
capacitor of 0.1µF is discharged through diode D2 because the input voltage decreases below
12V. Only half of the current reaches the auxiliary supply through diode D1 which results in
2IC
C1 ≈
Us ωs
3.3M 10k 0.1 μ

C1 400V
Z Y130 12k
HSCH
2N 1001 +12V
3439 D1
1N4448
BZX79C D2
12V 220μF
10n HSCH BZX
1001 79 C
12V
Figure 1.7.14: Auxiliary 12 V supply
Inductor
With the required Ps and given Us a choice can be made for L and δ1 T . Be aware of losses due
to copper resistance and the proximity effect but also core losses.
 53 / 274
Converter diode
The diode must be fast not because of switching losses, see figure 1.7.8, but because its recovery
change distorts the mains current.
Output capacitor
This capacitor has to integrate the current peaks of the h.f. converter as well as the l.f. ripple of
the mains frequency. Also, the load current may consist of h.f. current pulses. All these currents
produce losses in the equivalent series resistance, ESR, and often capacitors are connected in
parallel to lower the total ESR, or a foil capacitor with inherently much smaller ESR is connected
in parallel. Bear in mind that the temperature increase due to these losses may decrease the
lifetime of the capacitor considerably.
Two switching transistors in cascade
The series connection of a low voltage and a high voltage power transistor has the advantage
that the low voltage transistor has an input capacitance of about 1/10 that of the high voltage
transistor and can be directly driven by a CMOS-circuit. This is also valid for the drain-gate
capacitance and results in a much lower gate current for the low voltage transistor. This Miller-
effect has much less influence if the gate is connected to a low impedance voltage source, as
has been done with the high voltage transistor in this example. Switching is faster and losses
lower. The charging current of the capacitance of the upper transistor is fed to the low voltage
supply through diode BYV 27. If MOSFET transistors are completely switched on their forward
characteristic is linear: Rdson . The transistor voltage is a measure for the current and can be used
as such in the control circuit, output U4 . A drawback of two transistors in series is the increase
in total forward resistance. Only if the switching losses decrease more than the forward losses
increase, which occurs above 100kHz, this connection is favorable.
Connections to the control circuit
Zero-crossing of the inductor current is measured at I, whereafter U1 and U2 give the necessary
information about the lowest transistor voltage and the transistors are switched on. The tran-
sistors are switched off at point S after the required time δ1 T . The voltage at U4 detects not
allowable high currents which will cause immediately switch off at point S.
Results
The system current fulfils the requirements of IEC 1000-3-2, as the tables show.
The EMC level is in accordance with VDE 0871. The losses are between 2 and 4% for loads
between 20W and 40W at input voltages between 200V and 240V.
54 / 274 
Table 1.7.1: IEC 1000-3-2 Table 1.7.2: Harmonic currents [A] with dif-
requirements ferent output capacitors
Harmonics Current limit Harmonics 2×22µF 10µF 4µF

[A] (electrolytic) (foil) (foil)
III 27 III 5.7 6.1 5.8
V 7 V 6.7 6.8 7.0
VII 4 VII 2.1 1.9 1.8
IX 3 IX 1.7 1.6 1.8
Appendix
Table 1.7.3: One-transistor converters for power factor correction
Converter Type Isolation Control Short-Circuit proof Control of Inrush current

Up (boost) No Up No No
Ćuk Yes Up & Down Yes No
SEPIC Yes Up & Down Yes No
Down (buck) No Down Yes Yes
Flyback Yes Up & Down Yes Yes
ZETA Yes Up & Down Yes Yes
 55 / 274
Bibliography
[1] A comparative evaluation of single-phase smr converters with active power factor correc-
tion. EPE Journal, 6(1):31–36, may 1996.
[2] L. Hsiu, W. Kerwin, and A.F. Witulski. Small signal models of a zvs sepic dual converter
with a coupled inductor. PESC Record, pages 814–820, 1994.
[3] J.G. Kassakian, M. Schlecht, and G.C. Verghese. Principles of power electronics. Addison
Wesley, 1991.
[4] I.A. Khan. Synthesis of switched mode converters suitable for magnetic integration. IEEE
Trans. AES, 31(3):998–1008, july 1995.
[5] P. Mantovanelli and I. Barbi. A new current fed, isolated pwm dc-dc converter. IEEE Trans.
PE, 11(3):431–438, may 1996.
[6] N. Mohan, T.M. Undeland, and W.P. Robbins. Power electronics. Wiley, 2nd edition.
[7] A. Peres, D.C. Martins, and I. Barbi. Zeta converter applied in power factor correction.
PESC Record, pages 1152–1157, 1994.
[8] R. Petkov and L. Hobson. Analysis and optimisation of a flyback converter with a nondis-
sipative snubber. IEE Proc.-Electric Power Appl., 142(1):35–42, january 1995.
[9] R. Redl, P. Tenti, and J.D. van Wyk. Power electronics’ polluting effects. IEEE Spectrum,
pages 32–39, may 1997.
[10] J. Sebastian, J. Uceda, J.A. Cobos, and J. Arau. Using sepic topology for improving power
factor in distributed power supply systems. EPE Journal, 3(2), 1993.
[11] H.W. Whittington, B.W. Flynn, and D.E. MacPherson. Switched Mode Power Supplies.
Research Studies Press Ltd, 2nd edition, 1997.
[12] C. Zhou, R.B. Ridley, and F.C. Lee. Design and analysis of a hysteretic boost converter
power correction circuit. IEEE PESC, pages 800–807, 1990.
56 / 274 
2
Resonance in Converters
extra info about Resonance
2.1. Introduction
Conventional switching converters, as described in chapter DC - DC, are used in many applica-
tions. Further development is restricted by parasitics of the components to frequencies between
50 and 200 kHz. Higher frequencies are required when we want to decrease the volume of in-
ductors and capacitors that are used for power conversion and interference suppression. The
volume of the whole appliance is not only determined by the size of the components but also by
the power developed in the appliance: the losses. With equal losses and a smaller volume the
temperature rises and the expected life of the components decreases. It is thus necessary also
to decrease the losses. A smaller volume will also decrease the cost price of electronic power
supplies and so increase the number of applications.
2.1.1 Switching losses

A short description of the switching losses in transistors and diodes illustrates the need for mea-
sures to decrease the switching power loss at high operating frequencies.
The charge of the depletion layer inside the transistor has to be removed before the transistor
is able to block the voltage. This causes the decreasing current in figure 2.1.1. At the same
time the voltage rises and the simultaneous presence of current and voltage means that power
is dissipated. The same phenomenon appears when switching the transistor on. This occurs in
every switching period and the total loss is thus proportional to the operating frequency. The
duration of the switching process itself also limits the useful width of the switching period.
The loss can be decreased by lowering the dUtr /dt of the voltage rise by connecting a capac-
itor over the transistor, however, the duration of the switching process will increase. Examples
have been given in chapter DC-DC figure 1.5.5 and figure 1.5.12. The capacitor has to be dis-
57
Chapter2 Resonance in Converters
i u
i tr
utr
Ptr
Figure 2.1.1: Transistor current, voltage and power at switching off.
charged before the next period starts, for which purpose a resistor has been added to the snubber
circuit. The switching loss has been moved from the transistor to the resistor, however, not re-
moved. The diode shows the same behaviour at switching off. This is illustrated in figure 2.1.2.
+ diD
iD dt
t rr
10% t
Q
-
100%
Figure 2.1.2: Diode current after switching off, reverse recovery.
2.2. Quasi Resonant Switches
2.2.1 General Remarks

Moving the switch losses does not lead to loss reduction of the switching process and therefore
not to the possible use of much higher frequencies. The primary goal will be the development
of ”lossless snubbers”, by using only capacitors and inductors. The secondary goal will be
reduction of the duration of the switching process. The primary goal can be achieved when the
switch current and/or voltage is zero at the moment of switching on and/or off.
With one capacitor and one inductor added to the active switch, the transistor, zero current
switching (ZCS) or zero voltage switching (ZVS) can be achieved. Note that transistor and diode
peak currents and voltages increase in comparison to the values in the conventional circuits.
58 / 274 
2.2 Quasi Resonant Switches
2.2.2 Zero Current Switching (ZCS)

We will connect an inductor in series with the switch and in parallel to this series circuit a
capacitor, as given in figure 2.2.1.
S1 Lr
Cr
Figure 2.2.1: ZCS switch.
By doing this the loss at switching off is eliminated, the loss at switching on remains (caused
by the device’s own parasitic capacitance), but the operating frequency can be increased to about
2 MHz. This is a factor 10 more than we could reach without resonance. The parasitic capac-
itance of the switch S1 is still a nuisance but has been considered to be small in the following
analysis.
To illustrate the operation a down converter will be given as an example [1]. The switch has
two possible configurations:
1. the transistor is conducting in one direction which is controllable and is blocking in the
other direction, which is normally the case with bipolar transistors
2. the transistor is conducting in one controllable direction and is also conducting in the other
direction, like a MOSFET with parasitic anti-parallel diode. The same can be achieved
with a bipolar transistor with separate anti-parallel diode.
The additional resonant components Lr and Cr are of a size much smaller than L and Co
of the original down converter. In order to simplify the analysis we will assume that the output
current Io determined by L is constant during one period. Discontinuous operation will not be
considered. In this case the conventional down converter has two modes of operation. The
resonant switch down converter has four modes.
Table 2.2.1: Possible switch state modes.
Possible Modes S1 S2 duration ∆t =

mode I on on 0 to t1
mode II on off t1 to t2
mode III off off t2 to t3
mode IV off on t3 to T
 59 / 274
i Lr i0 L
+ u Tr -
+ u Lr - iD
+ + i Cr -
Us u Cr uD R0
- + C0
-
Figure 2.2.2: Down converter with ZCS switch.
The waveforms of current and voltage of Lr , Cr and the switches have been given in figure
2.2.7 without anti-parallel diode and in figure 2.2.8 with anti-parallel diode. The description of
the modes starts with a circuit without anti-parallel diode.
Mode I (transistor S1 and diode S2 are both conducting) (figure 2.2.3) The transistor is
switched on at t = 0, a current starts to flow through Lr (from zero !) linearly until it has
reached the value Io at t = t1 . The diode current decreases linearly to zero and the diode is able
to block voltage without switching losses. (no/low Prev.recov. )
Lr
+
Us I0
-
Figure 2.2.3
Mode II (transistor S1 is conducting and diode S2 is blocking) (figure 2.2.4) The capacitor Cr
is charged by the current iLr − Io until its voltage uCr = 2 · Us . The inductor current decreases
and at the moment it has reachedpthe zero level, at t = t2 , the transistor must be switched off:
ZCS! The peak current IˆLr = Us Cr /Lr + Io .
Lr
+
Us I0
- Cr
Figure 2.2.4
Mode III (Transistor S1 and diode S2 are both blocking) (figure 2.2.5) The capacitor voltage
exceeds the output voltage and is discharged linearly by the current Io until uCr = 0 and t = t3 .
The anti-parallel diode of switch S1 is conducting the inductor current also when it is negative
60 / 274 
and the Lr Cr circuit continues oscillating until its current crosses the zero level. At that moment,
between t2 and t3 , the switch S1 is blocking and the remaining capacitor charge is fed to the
output by Io until uCr = 0 and t = t3 .
+
Us I0
- Cr
Figure 2.2.5
Mode IV (Transistor S1 is blocking and diode S2 is conducting) (figure 2.2.6) The current Io
remains, magnetic energy from inductor Lo continues to flow in the output until S1 is switched
on to start the next period.
+
Us I0
-
Figure 2.2.6
2.2.3 Zero Voltage Switching (ZVS)

We will connect an inductor in series with the parallel circuit of the switch and a capacitor, as
given in figure 2.2.9.
By doing this the parasitic capacitance of switch S1 has been incorporated in the resonant
circuit. If we are able to make the switch voltage zero at switching on and off, the improvement in
comparison with conventional switch mode circuits will be a factor 100 in the possible frequency
range.
To illustrate the operation a boost converter will be given as an example [2]. The switch has
two possible configurations:
1. the transistor is conducting in one direction which is controllable and is blocking in the
other direction, which is normally the case with bipolar transistors
2. the transistor is conducting in one controllable direction and is also conducting in the other
direction, like a MOSFET with parasitic anti-parallel diode1 . The same can be achieved
with a bipolar transistor with separate anti-parallel diode.
1
often not given in a schematic circuit diagram
 61 / 274
uGS
0 t1 t2 t3 T t
iLr
I0
0 t
i tr
I0
0 t
i Cr
0 t
-I 0
uCr
Us
0 t
Us
utr
0 t
Us
uLr
0 t
iD
I0
0 t
0 t
-uD
Figure 2.2.7: Current and voltage waveforms of the resonant components and the switches,
switch S1 without anti-parallel diode.
62 / 274 
uGS
0 t1 t3 t
t2 T
iLr
I0
0 t
i tr I0
0 t
i Cr
0 t
-I 0
uCr
0 t
utr
0 t
uLr
0 t
iD I
0
0 t
0 t
-uD
switch S1 with anti-parallel diode.
 63 / 274
Cr
Lr
S1
Figure 2.2.9: ZVS switch.
The additional resonant components Lr and Cr are of a size much smaller than L and Co of
the original upconverter. In order to simplify the analysis we will assume that the input current
Is determined by L is constant during one period and the output capacitor Co is large, making
Uo constant. Discontinuous operation will not be considered. In this case the conventional up
converter has two modes of operation. The resonant switch upconverter will have four modes.
Table 2.2.2: Possible switch state modes.
Possible Modes S1 S2 duration ∆t =

mode I on on 0 to t1
mode II on off t1 to t2
mode III off off t2 to t3
mode IV off on t3 to T
L is
+
+ u0
U Lr
+ - C0
Us i tr R0
- i Cr
+
UCr = Utr
- Cr
-
Figure 2.2.10: Up converter with ZVS switch.
The waveforms of current and voltage of Lr , Cr and the switches have been given in figure
2.2.15 without anti-parallel diode and in figure 2.2.16 with anti-parallel diode. The description
of the modes starts with a circuit without anti-parallel diode.
With anti-parallel diode the capacitor voltage cannot become negative, uLr is clamped to Uo
and iLr rises linearly from a negative value before the end of the period has been reached.
64 / 274 
Lr
+
is u0
Cr -
Figure 2.2.11
Lr
+
is u0
-
Figure 2.2.12
Mode I (transistor S1 and diode S2 are both conducting) By closing the switch S1 the induc-
tance Lr is connected to the output voltage Uo and its current will increase linearly until iLr = Is ,
the diode is blocking and t = t1 . With anti-parallel diode the current ILr starts at a negative value.
Lr
+
is u0
-
Figure 2.2.13
Mode II (transistor S1 is conducting and diode S2 is blocking) The current Is is flowing in Lr

and the transistor until the latter is switched off at t = t2 . The transistor voltage utr = 0 at that
moment.
Mode III (Transistor S1 and diode S2 are both blocking) The capacitor Cr is charged by Is
and when its voltage exceeds the output voltage Uo then t = t3 and the diode is forward biased.
Mode IV (Transistor S1 is blocking and diode S2 is conducting) The voltage of the series
resonant circuit Lr , Cr has the value Uo . The current iLr = iCr decreases and crosses zero, at
which moment the capacitor voltage, equal to the transistor voltage, has reached its maximum
value. When uCr = 0 and iLr > 0 the end of the period has been reached.
 65 / 274
Lr
+
is u0
Cr -
Figure 2.2.14
2.2.4 Other Applications
The use of resonant switches is not restricted to the up- and down converter. Other topologies
can be found in [3].
In the forward converter the leakage inductance of the transformer may be part of Lr , as
figure 2.2.17 shows. In the flyback converter the coil capacitance of the inductor may be part of
Cr , figure 2.2.18.
+ + + +
Us Us Lr Lr Us Us Lr Lr
- - - - Cr Cr
Cr Cr
Tr Tr Tr Tr
Figure 2.2.17: Primary side of forward con- Figure 2.2.18: Primary side of flyback con-
verter, ZVS. verter, ZCS.
After rearranging the diagram of figure 2.2.18 the equivalent circuit diagram appears in figure
2.2.19.
The flyback converter with ZCS has again four modes of operation, which can be described
in the same manner as has been given in the previous examples and will be repeated here as a
simplified analysis of the ZCS flyback converter.
66 / 274 
VGS
0 t
t1 t2 t3 T
Is
iLr
0 t
i tr Is
0 t
i Cr I s
0 t
uCr
utr u 0
0 t
uLr u 0
0 t
iD
Is
0 t
0 t
uD
-u 0
switch S1 without anti-parallel diode.
 67 / 274
VGS
0 t
t1 t2 t3 T
iLr
Is
0 t
i tr Is
0 t
i Cr I s
0 t
uCr
utr u
0
0 t
uLr u 0
0 t
iD Is
0 t
uD
0 t
-u 0
switch S1 with anti-parallel diode.
68 / 274 
S 2 i (t)
Tr 0
Lr + -
i s(t) Cr
S1
+
C0
Us Uc L U0
- R0
i c(t) i L(t)
- +
Figure 2.2.19: Diagram of the flyback converter with ZCS, without isolating transformer.
2.2.5 Simplified analysis of the ZCS flyback converter

Only the continuous conduction state of the inductor will be considered. The normal flyback
δ
converter shows the following amplification factor: UUos = 1−δ and thus δ = UoU+U
o
s
The value of the diode conduction time, (1 − δ)T , is approximately comparable with that of
the ZCS flyback converter:
1 − δ = Us /(Uo + Us ) (2.2.1)
The modes each start with t = 0 to simplify the notation. Thus t1 , t2 , t3 , t4 give the duration of
each mode and eventually
T = t1 + t2 + t3 + t4 (2.2.2)
The current of the main inductance has been assumed to be large enough that it does not
change during one period. The main inductance L therefore has been represented as a current
source ILO . The same has been assumed with respect to the output voltage Uo . In the steady state
U0 is constant.
Mode I
The diode, switch 2, is conducting and ILO flows in the direction of the load. The capacitor
voltage UCr = −Uo . At t = 0 the transistor, switch 1, is turned on, the inductance voltage
ULr = Us + Uo . The source current:
is (t) = (Us + Uo )t/Lr (2.2.3)
This mode ends when the diode is switched off at t = t1 because is (t1 ) = ILO .
ILO Lr
t1 = (2.2.4)
Us + Uo
 69 / 274
i s(t)
I L0
0
t
t1 t2
Figure 2.2.20: Half sine-wave of resonance.
is
Lr
+ -
+
Us C U0
- r
- +
I L0
Figure 2.2.21: Circuit of mode I.
70 / 274 
Mode II
(switch on, diode off)
We start again with t = 0. The state of the circuit is determined with UCr = −Uo and
is (0) = ILO . The Lr Cr -circuit is free to oscillate and
Us + Uo
is (t) = sin ω1 t + ILO (2.2.5)
ω1 Lr
with ω12 Lr Cr = 1.
is
Lr
+
Cr +
Us
-
-
I L0
Figure 2.2.22: Circuit of mode II.
The second mode ends when the transistor is switched off as soon as is (t) = 0, t = t2 :
ZCS operation.
Us + Uo
is (t2 ) = sin ω1 t2 + ILO = 0 (2.2.6)
ω1 Lr
with (2.2.4) this can be written as
ω1 Lr ILO
sin ω1 t2 = − = −ω1 t1 (2.2.7)
Us + Uo
The crest value of the source current occurs when sin ω1 t = 1,

Us + Uo 1 + ω1 t1
Is max = + ILO = ILO (2.2.8)
ω1 Lr ω1 t1
The capacitor voltage uCr (t) = −Uo + (Us + Uo )(1 − cos ω1 (t)) and at the end of this mode
uCr (t2 ) = −Uo + (Us + Uo )(1 − cosω1 t2 ) (2.2.9)
The crest value occurs when
cos ω1 t = −1andUCrmax = −Uo + (Us + Uo ).2 = 2Us + Uo (2.2.10)
The energy flow Es from the source during one period ends at t = t2 . An expression can be
derived, with additional approximation (see figure 2.2.23 through figure 2.2.25)
Z π
1 Us + Uo 2
Es = Us sin ω1 tdω1 t + ILO t2 = Us ILO + t2 (2.2.11)
0 ω1 ω1 Lr ω12 t1
with t2 determined from (2.2.13).
 71 / 274
i s(t)
I L0
0 t2 t
t1 t2
Figure 2.2.23: The average input current is determined by the hatched surfaces.
Mode III
Cr +
-
I L0
Figure 2.2.24: Circuit of mode III.
At the start t = 0,uCr (0) = −Uo + (Us + Uo )(1 − cos ω1 t2 from (2.2.9) and ILO ,the only
current, discharges Cr until at t = t3 uCr (t3 ) = −Uo again. That is the end of mode III. The
capacitor voltage uCr (t) = uCr (0) − ILO t/Cr and uCr (t3 ) = −Uo + (Us + Uo )(1 − cos ω1 t2 ) −
ILO t3 /Cr = −Uo from which it follows:
(Us + Uo )(1 − cos ω1 t2 )Cr 1 − cos ω1 t2
t3 = = (2.2.12)
ILO ω12 t1
No energy is transferred from the source nor into the load.
Mode IV
The diode is conducting during t4 and an energy Eo is transferred to the load: Eo = Uo ILO t4 . In
the steady state the input and output energies are equal: Es = Eo and (2.2.11)

Es Us 2
t4 = = + t2 (2.2.13)
Uo ILO Uo ω12 t1
72 / 274 
2.3 Resonant Converters I
-
U0
+
I L0
Figure 2.2.25: Circuit of mode IV.
Examples
Specification: Us = 300V, Uo = 100V, Ps = Po = 50W , continuous operation
1. Original flyback Uo /Us = δ/(1 − δ), δ = Uo /(Uo + Us ), 1 − δ = Us /(Uo + Us ), δ =
0.25, 1 − δ = 0.75 For continuous operation L > Us2 , δ 2 T /(2Ps ) = 56T
2. ZCS flyback Assumptions have to be made to get started. We will assume t1 = 1µs and
perform calculations for t2 = 5, 7, 9µs.
Table 2.2.3: ZCS flyback example.
t1 1 1 1 µs
t2 5 7 9 µs
ω1 with(6) 821 · 103 528 · 103 394 · 103 rad/s a
t3 with(11) 2.3 6.6 12.4 µs
t4 with(12) 23.9 42.5 65.5 µs
T t1 + t2 + t3 + t4 32.2 57.1 88 µs
f 1/T 31 17.5 11.4 kHz
ILO with(10) 674 672 671 mA
Lr with(6) 600 600 600 µH
Cr with(5) 2.5 6.0 10.8 nF
Ismax with(7) 1.49 1.95 2.37 A
t4 /T ≈1−δ 0.74 0.74 0.75
a
This is a non-trivial, iterative, numeric procedure.
flyback
2.3. Resonant Converters I

(with a series resonant circuit)
 73 / 274
Simplified ZCS flyback, Us=300.0V, Uo=100.0V, P o=50.0W, Lr=596.7H, Cr=10.8F

4
]
[A2
iS
0
1000 0 5 10 15 20 25
]
V[ 0
Uc
-1000
20 5 10 15 20 25
]
A[ 0
ic
-2
20 5 10 15 20 25
]
A[ 0
iL
-2
10 5 10 15 20 25
]
A[ 0.5
iD
0
0 5 10 15 20 25
t [ μ s]
Figure 2.2.26: Waveforms for resonant switch flyback converter.
74 / 274 
2.3.1 Introduction
The resonant converter has at least one inductance and one capacitance between which energy
is exchanged continuously. This may be a parallel connection of L and C supplied by a current
source or a series connection supplied by a voltage source. In this chapter the series resonant
circuit will be treated. It is supplied by an alternating voltage source, a simple circuit, in most
cases a bridge circuit with four or two switches. The latter is called half bridge circuit. The output
can be connected in series with the LC circuit, this is called a series loaded resonant converter
or SRC. The other possible connection of the load is parallel to L or C, called a parallel loaded
resonant converter or PRC. Many other abbreviations are found in literature for mixtures of SRC
and PRC. Be aware that all these converters use a series resonant circuit and that S or P applies
to where the load is connected.
2.3.2 Full-bridge circuit

There are four switches of which S1 and S3 are conducting during a time T1 ≤ T /2 in the first
half of period T and S2 and S4 are conducting during a time T2 ≤ T /2 in the second half of
period T . The conducting times T1 and T2 are equal under steady-state conditions to prevent DC
current in the resonant circuit, that will be connected between C and D. The square-wave voltage
between C and D will have the amplitude uCD = Us . For the case T1 = T2 = T /2 the output
voltage is switching from +Us to −Us as shown in figure 2.3.2.
When the conducting times of the switches are smaller than T /2 less energy is delivered to
the load. This pulse width modulation scheme (PWM) can be used to control the output energy.
1 4
+
Us C D
-
2 3
B
Figure 2.3.1: Voltage source Us and full-bridge circuit.
 75 / 274
+ Us
0
0 T T 3 2T t
T
2 2
- Us
Figure 2.3.2: Output voltage of the full-bridge with duty cycle 1/2.
1 4
+
Us C D
2 3
B
Figure 2.3.3: Voltage source Us and half-bridge circuit.
76 / 274 
2.3.3 Half-bridge circuit

There are two switches of which S1 is conducting during a time T1 leT /2 in the first half of
period T and S2 is conducting during a time T2 ≤ T /2 in the second half of period T . The
conducting times T1 and T2 are equal under steady-state conditions to prevent voltage unbalance
over capacitors C3 and C4 . Under this condition the capacitors have been charged to half the
supply voltage, UC3 = UC4 = Us /2. The square-wave voltage between C and D will have the
amplitude uCD = Us /2. For the case T1 = T2 = T /2 the output voltage is switching from
+Us /2 to −Us /2 as shown in figure 2.3.4.
Us
+
2
0
0 T T 3 2T
Us 2T t
2
2
Figure 2.3.4: Output voltage of the half-bridge with duty cycle 1/2.
When the conducting times of the switches are smaller than T /2 less energy is delivered to
the load. This pulse width modulation scheme (PWM) can be used to control the output energy.
An example of the half-bridge circuit operating far above the resonant frequency, determined
by L and Co , is given in figure 2.3.5 with voltage and current waveform in figure 2.3.6. In the
inductive circuit the current lags the voltage which means that diode D1 is conducting (II) before
transistor Tr1 (I) and moreover the waveform has an exponential shape. (A sinusoidal shape
occurs when the operating frequency is near to the resonant frequency.)
+ -
A Cs
Tr 1
+
C4
D1 -
C0
R L
C D
R0
D2 +
C3
-
Tr 2
B
Figure 2.3.5: Half-bridge with transistors and diodes as switches and a resonant load circuit.
 77 / 274
current
voltage
I II time
0 T/ 2
T
Figure 2.3.6: Voltage and current of the load circuit.
2.3.4 Rectifying load circuits

Current driven rectifier
When the output of the converter acts as a current source a simple bridge rectifier can be used.
The load consists of a large capacitor Co with, ideally, a constant voltage Uk in parallel to a
resistor Ro as the real load.
I0
ik
ik R0
C0
Uk
Figure 2.3.7: Current controlled rectifier.
The source current has a sinusoidal shape and the input voltage is rectangular, the sign de-
pending on which diodes are conducting. When the current is positive a positive voltage appears,
and the negative current causes a negative voltage. The switching time of the diodes has been
neglected. √
With Ik being the r.m.s. value of the source current√Io = π2 · îk = 2 π 2 · Ik and with Uk being
the r.m.s. value of the source voltage Uk = √12 · ûk = 2 π 2 · Uo , if we use only the fundamental of
the input voltage that is in phase with the input current, we find the resistance value that can be
used as substitute for the power consumption of the load is called Rs and
√ √
Uk 2 2 · Uo 2 2 8
Rs = = = 2 Ro ≈ 0, 81Ro (2.3.1)
Ik π π · Io π
78 / 274 
Voltage driven rectifier

When, however, the output of the converter has a voltage source character, i.e. a very low output
impedance, an inductance Lo is necessary to convert the output voltage sink into a current sink.
A sinusoidal input voltage uk causes a square wave input current ik .
L0 I0
ik
+
uk R0
C0
-
uk
Figure 2.3.8: Voltage controlled rectifier.
The source voltage has a sinusoidal shape and the input current is rectangular, the sign de-
pending on which diodes are conducting. When the voltage is positive a positive current appears,
and the negative voltage causes a negative current. The switching time of the diodes has been
neglected. √
With Uk being the r.m.s. value of the source voltage√Uo = π2 · ûk = 2 π 2 · Uk and with Ik being
the r.m.s. value of the source current Ik = √12 · îk = 2 π 2 · Io if we use only the fundamental of
the input voltage, that is in phase with the input current. The resistance value that can be used as
substitute for the power consumption of the load is called Rs and
Uk π · Uo π π2
Rs = = √ √ = Ro ≈ 1, 23Ro (2.3.2)
Ik 2 2 2 2 · Io 8
Remarks
In mains applications the circuit of figure 2.3.9 is sometimes used, however, the rectangular cur-
rent waveform gives problems with higher harmonics. When the output voltage of the converter
has to be matched to the load by means of a transformer, the rectifying circuit can be changed to
that of figure 2.3.9.
QRC-ZCS: When the bridge circuit is used with a rectifier or other load directly between
C and D, it acts as a voltage source. It may be useful to apply zero-current switching in which
case the bridge diagonal looks like that of figure 2.3.10. The capacitor Cr can also be placed
at the secondary side of the transformer, figure 2.3.9, in which case an additional diode will
be necessary as a path for the continuous current through L0 . The leakage inductance of the
transformer may be incorporated in Lr .
 79 / 274
L0
Cr
Rs
Figure 2.3.9: Transformer output with two rectifying diodes.
Cr
Lr
Rs
Figure 2.3.10: Bridgediagonal CD with Lr and Cr for ZCS.
80 / 274 
This circuit has been described in [5] for a 100 W converter. The efficiency obtained was
78% with Us = 300V and Uo = 5V. The output current could be controlled from 2 to 20A by
changing the operating frequency from 0,3 to 1,5MHz.
QRC-ZVS In this kind of application zero-voltage switching also may be applied. The leak-
age inductance of the transformer of figure 2.3.9 may be incorporated in Lr . The capacitor Cr
can be replaced by two capacitors, each over one transistor.
Cr
Lr
Rs
Figure 2.3.11: bridgediagonal CD with Lr and Cr for ZVS.
This circuit has been described in [6] for a 75W converter The efficiency obtained was 83%
with Us = 300 ± 50V and Uo = 5V . The output power could be decreased to 40% by changing
the operating frequency from 1 to 4,2MHz.
2.3.5 Resonant circuit with load in series SRC

In the following resonant circuits we will assume a sinusoidal current waveform. This is allowed
for operating frequencies between 0.5ω0 and 2ω0 with ω0 = √L1r Cr . The square wave supply
voltage UDC will be simplified
√ to the first harmonic. It means that its peak value ûb = 4/πUCD
and the r.m.s. value Ub = 2 2/πUCD .
C C r
L r
R
s D
Figure 2.3.12: Resonant circuit with Lr , Cr and Rs in series.
With these restrictions the description and calculation [7] will be a simple application of
alternating current theory. The sinusoidal
√
voltage Uk over resistance Rs will be
Ub R s 2 2·UCD
Uk = Rs +jωLr + 1 = π 1+j ωL − 1 1 and Uo = 2√ π
· Uk = 1+j ωLUCD
jωCr [ ( r ωCr ) Rs ] 2 ( r − ωC1 r ) R1s
Uo 1
The gain will be UCD = 1+j(ωLr − 1 ) 1 and with 2UCD = Us we may write for half-bridge
ωCr Rs
converters:
Uo 1 1
= (2.3.3)
Us 2 1 + j 82 Q · v
π
 81 / 274
with the substitution of (2.3.1) and ωo = √L1r Cr , Q = ωR0 Lo r , v = ωω0 − ωω0 The gain is represented
by resonant curves. Far from the resonant frequency the simplifications are no longer valid.
The series capacitor is in series with the half bridge capacitive voltage divider and Cr may be
replaced by Cr /2 in the capacitive branches of the bridge. The resonance curves have been given
as figure 2.3.13. The control of the gain occurs by frequency variation. The main drawback is
the difficulty of control at low output power. The load resistance Ro increases and Q decreases.
At Q = 1 the influence of frequency variation on the gain Uo /US is small.
A second drawback is the large output current ripple. We need a large capacitance with low
series impedance, moreover the control of the output voltage will be slow.
An advantage is DC blocking by the series capacitor. If the converter operates near resonance
at full power a short circuit at the output will cause very high current. A safety function has to
be incorporated in the control that increases the operating frequency.
Gain of LC S RC for vary ing Q
0.5
0.45
0.4
0.35
s 0.3 Q
U
/
o
U0.25
1
0.2
0.15
0.1
3
4
0.05 5
0.5 1 1.5 2
f/ f
o
Figure 2.3.13: Resonant curves of the gain of the SRC.
lc src
82 / 274 
Cr Lr
C D
Rs
Figure 2.3.14: Resonant circuit with load parallel to Cr .
2.3.6 Resonant circuit with the load parallel PRC
prc design prc We now need a voltage driven rectifier (§2.3.4). The circuit current
Ub
will be Ik = jωL + Rs The voltage of Rs will be Uk = Rs +jωLUr (1+jωC
b Rs
r Rs )
Again Ub =
r 1+jωCr Rs
√
2 π Uo 4 1
π
Us but now Uk = √ U,
2 2 o
so the gain can be written as Us
= π 2 1−ω 2 Lr Cr +jω Lr
and with the
Rs
√ 1 R0 ω ω0
substitutions (2.3.2) and ωo = Lr Cr
,Q = ω0 Lr
,v = ω0
− ω
:
Uo 4 1 4 ωo Q
= 2 = 2 (2.3.4)
Us π 1− ω2
ωo2
ω 1 8
+ j ωo Q π 2 π ω vQ + j π82
The operating frequency will again be used to control the gain and we observe that in this
case Uo can be controlled if the load decreases, i.e. Ro increases, then Q increases too and the
slope of the control curve increases, see figure 2.3.15. The circuit current does not decrease
proportional to a decreasing load and the efficiency decreases. The resonant voltage, however,
increases if the operating frequency approaches the resonant frequency and the control has to
change the operating frequency to a higher value to prevent problems. If an output transformer
is used the capacitor Cr can be connected to the secondary. The leakage inductance is then part
of Lr . This principle better suits low output voltages than the SRC. Short-circuiting the output
means that Lr restricts the current to a safe value.
plot lc prc
2.3.7 PRC with additional series capacitor LCC-PRC

The advantages of the SRC and PRC can be combined in an LCC-type commutation network as
given in figure 2.3.16. A series capacitor Cs has been added to the PRC and the gain, with (2.3.2)
and ωo = √L1r Cs , Q = ωR0 Lo r , v = ωω0 − ωω0 can be written as:
Uo 4 1
= 2 Cr
(2.3.5)
Us π 1+ Cs
− ω 2 Lr Cr + jvQ π82
 83 / 274
Gain of LC P RC for vary ing Q
5
2.5
4
2
s 3
U
/ 1.5
o
U
2
1
1
0.5
0
0.5 1 1.5 2
f/ f
o
Figure 2.3.15: Resonant curves of the gain of the PRC.
Cr Lr Cs
C D
Rs
Figure 2.3.16: Resonant circuit of Cr , Cs , Lr with the load across Cr .
84 / 274 
The ratio of Cr to Cs determines the series or parallel character of the converter. With Cr =
Cs :
Uo 4 1
= 2 ω2
(2.3.6)
Us π 2− ωo2
+ jvQ π82
and for Cs = 2 Cr :
Uo 4 1
= 2 3 ω2
(2.3.7)
Us π 2
− 2ω02
+ jvQ π82
Gain of LCC P RC for vary ing Q, C / C = 1.0

r s
0.8
1
0.7
0.6
0.5
2
s
U
/ 0.4
o
U
3
0.3
5
0.2
Q
0.1
0
0. 5 1 1.5 2
f / f
o
Figure 2.3.17: Resonant gain curves of LCC-PRC with Cr = Cs .
plot lcc prc1

plot lcc prc5
The right choice of Cr /Cs depends on the requirements. The graphs on the previous page
illustrate two possibilities. The input current decreases with decreasing load, but less if Cr is
smaller. A quality factor Q of about 4 is a good compromise. The efficiency will only decrease
at low output power. One application [8] gives this circuit as improvement of the mains current
waveform as off-line converter. Another paper deals with the influence of a load transformer
[11].
 85 / 274
Gain of LCC P RC for vary ing Q, C / C = 0.5

r s
0.55
0.5 1
0.45
0.4 2
0.35
s
U 3 Q
/ 0.3
o
U
0.25 4
5
0.2
0.15
0.1
0.05
0. 5 1 1.5 2
f / f
o
Figure 2.3.18: Resonant gain curves of LCC-PRC with Cs = 2 Cr .
2.3.8 Other configurations

The LLC-SRC circuit in figure 2.3.19 has been described in [9]. The LLCC-type commutation
network in figure 2.3.20 has been analysed in [10,17].
Lp Lr Rs
C D
Cr
Figure 2.3.19: Resonant circuit with Lp , Lr , Rs in series and Cr ||Lp .
2.4. Resonant Converters II

(with a parallel resonant circuit)
2.4.1 Introduction
This resonant converter has at least one inductance and one capacitance connected in parallel.
The supply current may be a direct current as with the class E converter or an alternating current.
A special case of the former will be treated in this chapter.
86 / 274 
2.4 Resonant Converters II
Cr Lr Cs
C D
Lp
Rs
Figure 2.3.20: Resonant circuit with Cr , Cs , Lr in series and Lp ||Cr , Rs ||Cr .
It will be used to convert a battery direct voltage into a higher alternating output voltage. With
a rectifier a high direct output voltage can be obtained. Here also it is apparent that the DC-load
can not be connected directly parallel to the resonant circuit. As in §2.3.4 a series inductor has
to separate the sine wave of the converter from the direct voltage of the rectifying circuit or the
attenuation of a resistive load.
2.4.2 Current Source
A switched inductance connected to the supply (battery) voltage Us is used as a current source.
The transistors of the resonant part are used as switch. An open circuit must be prevented, the
current has to flow continuously. As in many other applications this current will be approximated
by a constant direct current Is .
2.4.3 Analysis
The circuit is given in figure 2.4.1. The current source is connected to the center tap of the
resonating inductance Lr The switches S, and S2 are alternately on during one half cycle. We
will assume a constant current in the inductance Ls and a sinusoidal voltage on the resonant
circuit. During one half period 0 < ωt < π the circuit has the configuration as given in figure
2.4.2. Considering the upper mesh the switch voltage can be determined by taking in mind the
fact that the inductance Ls and Lr voltage have no DC-component, so the only direct voltage is
Us . This leads to:
Z 2π
1
Us = us1 (ωt)dωt (2.4.1)
2π

0
87 / 274
++ ++
S
S11 S
S11
uuS1
S1 uuS1
S1
-- C
Crr R
Rrr ++ -- C
Crr R
Rrr ++
LLrr uurr uurr
-- -- uuLS
LS ++ -- ++ LLrr
S
S22 -- U
USS --
uuS2
S2
++
-- uuLS
LS ++ -- ++
U
USS
Figure 2.4.1: Basic circuit Figure. Figure 2.4.2: Circuit during first half pe-
riod.
The switch voltage equals zero during the second half period and ûr = πUs , from
Z π
1 ûr
Us = ûr sin ωtdωt = (2.4.2)
2π 0 π
The application of this circuit is restricted by the high maximum transistor voltage: if Us > 300V
then UCemax or UDsmax > 1000V which means expensive and relatively slow transistors.
From the lower mesh in figure 2.4.2 it follows Us + ULs − 1/2ûr sin ωt = 0 and
uLs = Us (1/2π sin ωt − 1) (2.4.3)
See the waveforms of figure 2.4.3 and figure 2.4.4.

For more information about the value of Ls the series expansion of the full wave rectified
sine wave

2 2 2 2
u(ωt) = û 1 + cos 2ωt − cos 4ωt + cos 6ωt − . . . . . . (2.4.4)
π 1·3 3·5 5·7
will be used. The frequencies above 2ω will be omitted and with this approximation:
2Us
uLs = cos 2ωt (2.4.5)
3
2 Us 1
iLs = sin 2ωt (2.4.6)
3 2ωLs
88 / 274 
iS 1
IS 1
πU s
uS1
πU s
ur
u LS
0 πU s
-U S 2
ic
0 2π 4π ωt
Figure 2.4.3: Currents and voltages of the push-pull converter.
 89 / 274
We made the agreement to consider the supply current Is as having a constant value. To save
the life of our supply battery the ripple of the current may not exceed 10% of the DC value. The
ripple current definition is the peak-to-peak value of the AC component, in our case
2Us 1
Ir = 2 · (2.4.7)
3 2ωLs
which results in a minimum value for Ls
2Us
Ls = (2.4.8)
0.3ωIs
u LS
-U S
iLS
0
Figure 2.4.4: Voltage and approximated voltage and current of the inductor Ls .
2.4.4 Self Oscillating Properties

When bipolar transistors are used a current source will be necessary to provide base current. A
circuit like that of figure 2.4.5 (upper left corner) may be applied. The direct voltage Uh can be
derived from the tank circuit or the inductor Ls as soon as oscillation has started. Of both methods
an example has been given in figure 2.4.6. A bias current of about 1/10 the collector current will
be applied to keep the switch voltages low during conduction. To provide starting, a resistor Rh
has been connected to the voltage source Us . The switches have to conduct alternately for half
a period. A few turns on the inductor of the tank circuit are sufficient to obtain an alternating
90 / 274 
voltage that switches the transistor at the right moment to obtain self-oscillation. Example of
bias circuit losses: (data: Us = 24V, Is = 1.5A)
We make the base current 150mA and the base supply voltage Uh = 4V. The losses will be
0.6W. The losses in the direct connection to the battery by means of the resistor Rh are assumed
to be much lower. If the current in Rh should be sufficient to deliver the base current of 150mA,
the loss would be 3.6W, about 9% of the total power.
D Re
Uh T3
T1 Lr
Rb I
b Cr Rr
U ks
T2
Ls UA
Rh - +
Figure 2.4.5: Current source, control winding and starting resistor.
Lr
Ls Us
Uh
Uh
Figure 2.4.6: Voltage supplies of the current source.
The waveforms of figure 2.4.7 show clearly that at the moment the conduction of the transis-
tor is turned off, and the other switch is turned on, the slope of the base voltage is not very steep.
This results in a rather slow switching process and leads to a peak in the collector current of both
switches simultaneously when the depletion layer of one switch is emptied and that of the other
 91 / 274
iT 1
πU s
uT1
ib
0
ub1
0 ûks
U be1
Figure 2.4.7: Voltage and currents of collector and base of one of the switching transistors.
is supplied, see figure 2.4.8. Fortunately the collector voltages are low at this moment, a kind of
ZVS, and the losses are not very high.
cb diode T1
peak- control-
current winding ks
cb diode T2
Figure 2.4.8: Short circuit of the tank circuit during the switching process.
92 / 274 
BIBLIOGRAPHY
Bibliography
[1] I. Batarseh and C.Q. Lee. Steady-state analysis of the prc converter with llcc-type commu-
tation network. IEEE Trans., 6(3):525–538, july 1991.
[2] A.K.S. Bhat. Analysis and design of series-parallel resonant power supply. IEEE Trans.
AES, 29(1):249–258, january 1992.
[3] A.K.S. Bhat, A. Biswas, and B.S.R. Iyengar. Analysis and design of (lc)(lc)-type series
parallel resonant converter. IEEE Trans. AES, 31(3):1186–1192, july 1995.
[4] R.W. Erickson, A.F. Hernandez, A.F. Witulski, and R. Xu. A nonlinear resonant switch.
IEEE Trans. PE, 4(2), april 1989.
[5] J.S. Glaser, A.F. Witulski, and R.G. Myers. Steady state analysis of the constant frequency
clamped series resonant converter. IEEE Trans. AES, 30(1), january 1994.
[6] D.C. Hopkins, M. Hayes, M.M. Jovanovic, F.C. Lee, and F.W. Stephenson. Power hybrid
design of a high frequency zcs-qrc. High Frequency Power Conversion Conf., pages 304–
317, 1989.
[7] M.M. Jovanovic, W.A. Tabisz, and F.C. Lee. Zero voltage switching technique in high
frequency off-line converter. IEEE Applied Power Electronics Conf. (APEC), pages 23–32,
1988.
[8] M.K. Kazimierczuk. Design-oriented analysis of boost zero-voltage-switching resonant

dc-dc converter. IEEE trans. PE, 3(2):126–136, april 1988.
[9] M.K. Kazimierczuk and X.T. Bui. Class-e dc/dc converters with a capacitive impedance
inverter. IEEE Trans. IE, 36(3), august 1989.
[10] M.K. Kazimierczuk and X.T. Bui. Class-e amplifier with an inductive impedance inverter.
IEEE Trans. IE, 37(2), april 1990.
[11] M.K. Kazimierczuk and J. Jozwik. Generalized topologies of zvs and zcs dc-dc converters.
National Aerospace and Electronics Conference (NAECON), 2:472–478, 1987.
[12] M.K. Kazimierczuk and K. Puczko. Exact analysis of class e tuned power amplifier at any
q and switch duty cycle. IEEE Trans. CAS, 34(2), february 1987.
[13] F.C. Lee, W.A. Tabisz, and M.M. Jovanovic. High frequency quasi-resonant and multi-
resonant converter technologies. Archiv für Elektrotechnik, 74:107–116, 1990.
[14] R. Liu and C.Q. Lee. Series resonant converter with third order commutation network.
IEEE Trans. PE, 7(3):462–468, july 1992.
 93 / 274
[15] M.J. Schutten, R.L. Steigerwald, and M.H. Kheraluwala. Characteristics of load resonant
converters operated in a high power factor mode. IEEE Trans. PE, 7(2):304–314, april
1992.
[16] R.L. Steigerwald. A comparison of half-bridge resonant converter topologies. IEEE Trans.
PE, 3(2):174–182, april 1988.
[17] W.A. Tabisz and F.C. Lee. A novel zero-voltage-switched multi-resonant forward converter.
High frequency power conversion, pages 309–318, may 1988.
94 / 274 
3
State Plane Analysis
extra info about State Plane Analysis
3.1. Introduction
We have seen that the modes are determined by the number of switches in the circuit. Going
from one mode to the next, the supply and load voltage or current may change but the energy
in the reactive elements does not. For the analysis of the operation we need to know the state
of the reactive elements, i.e. the current in inductances and the voltage of capacitances. It is
therefore very useful to look at these states and how they change during one cycle of the steady
state operation of a converter.
The states can be given as a function of time and also as a function of one another as a state
plane. Not the voltage of every capacitance and the current of every inductance is necessary to
describe the state of the circuit. One current and one voltage are sufficient and a proper choice
has to be made, an example of which can be found in [4].
3.2. Tank circuit without load
[5] In the bridge diagonal L and C have been connected in series. The control frequency, applied
to the transistors, will be denoted as f (f = 1/T ) and the switches are alternately conducting.
The resonant frequency is f0 = 2π√1LC and the characteristic impedance
r
L
Zo = (3.2.1)
C
95
Chapter3 State Plane Analysis
+
Tr 1 D1 L iL UB
C
_
+
C +u _ D
Us c
-
+
Tr 2 D2 UB
_
UB = U s / 2
Figure 3.2.1: Half-bridge circuit with L and C in series connection.
3.2.1 Control frequency below resonance frequency

When the control frequency is lower than the resonant frequency, f < fo , the current and voltage
will be as given in figure 3.2.2 where f = 0.6 · fo . This is the steady state situation. As usual Tr1
is switched on at t = 0. The energy in the circuit is situated in the inductance. Half a resonant
period later, at t = t1 , the current crosses zero and the energy is displaced to the capacitance.
One period of the control frequency will be described, using the state variables uC and Zo iL .
The energy in the L and C is given by
1 C C
E(t) = (Cu2c (t) + Li2L (t)) = (u2c (t) + Zo2 i2L (t)) = re2 (t) (3.2.2)
2 2 2
In a diagram with uC and Zo iL along the axes re is a vector from the origin to the point (uC
,Zo iL ). This is illustrated in the diagram of figure 3.2.3. One closed curve is determined by all
the points (uC , Zo iL ) of one period T .
spa sr20
Just as with quasi-resonance circuits the operation of this circuit can be divided into four
parts, each being valid during a given time:
During modes A and B the inductance voltage is given by
LdiL /dt = +Ub − uC → diL = 1/L(Ub − uC )dt (3.2.3)
and the current by
CduC /dt = iL → duC = 1/CiL dt (3.2.4)
whereas during modes C and D the same equations are valid if we replace Ub by −Ub . In the state
plane the coordinates are uC and Zo iL and t is a parameter that can be eliminated from (3.2.3)
96 / 274 
3.2 Tank circuit without load
Current and voltage of SRC, f / fo = 0.6

200
Ub [V]
-200
0 0.5 1 1.5
200
Zo * iLr [V]
-200
0 0.5 1 1.5
500
vCr [V]
-500
0 0.5 1 1.5
time [t / T]
Figure 3.2.2: Normalized inductance current Zo iL and capacitance voltage uC with the supply
voltage ub as a function of time.
Mode Sign uc Sign Zo iL Conducting switch Time interval

A + + Tr1 0 < t < t1
B + - D1 t1 < t < T /2
C - - Tr2 T /2 < t < T /2 + t1
D - + D2 T /2 + t1 < t < T
 97 / 274
and (3.2.4).
diL
duc
= CL Ubi−u
L
c
|0 < t < T2
L
i di = (Ub − uc )duc
C L L (3.2.5)
2 2
Zo iL = −(Ub − uc )2 + constant
Zo2 i2L + (Ub − uc )2 = r2
This is a circle in the state plane with center (Ub , 0) and radius r = −Ub /cosβ directly from the
figure below. From figure 3.2.2 and figure 3.2.3 we see that ω0 t1 = β, the conduction angle of the
transistor, and ω0 (T /2−t1 ) = α, the conduction angle
√ of the diode, and thus γ = α+β = ω0 T /2.
The period T is controlled externally and ωo = 1/ LC. We may write
T /To = ωo /ω = γ/π (3.2.6)
Z 0 iL
300
2 0 0 t= 0
T = 3 5 µs
T = 4 0 µs
re A
D 100
t= 0
α
ϕ t = t1 t = t1
-4 0 0 -3 0 0 -2 0 0 -u b -1 0 0 100 u 200 300 400 uc
b
β
-1 0 0 t= T/2
C B
T o = 2 5 µs
-2 0 0 t= T/2
-3 0 0
Figure 3.2.3: State plane: all the points (uc ,Zo iL ) of one period result in a closed curve.
From the state plane in figure 3.2.3, that has been constructed with To = 25µs, it can be seen
what happens if the operating frequency increases (and its period T decreases): r will increase
to infinity when β → π/2 and cos β → 0. In resonance the amplitudes of current and voltage
increase unlimited, because no damping by resistive elements has been assumed in this ideal
circuit.
98 / 274 
3.3 Load in series with LC circuit (SRC)
3.2.2 Control frequency above resonance frequency

We now take ω > ωo and T < To . From figure 3.2.4 it follows that uC is negative when ub is
positive and (Zo iL )max > uCmax . If in this case also T → To then β → π/2 and cos β → 0 thus
r → ∞.
Current and voltage of SRC, f / fo = 1.3

200
Ub [V]
-200
0 5 10 15 20 25 30
500
Zo * iLr [V]
-500
0 5 10 15 20 25 30
500
vCr [V]
-500
0 5 10 15 20 25 30
time [μs]
Figure 3.2.4: Normalized choke current Zo Il and capacitor voltage uc and the supply voltage ub .
spa sr50
3.3. Load in series with LC circuit (SRC)
3.3.1 Operating point in the second quadrant

[1],[2]
To obtain a DC voltage at the output the load will be a rectifier with buffer capacitor Co and
load resistor Ro . The operation of the circuit is such that the load voltage has a constant value Uo .
From the resonant circuit this appears as +Uo at positive resonant current and −Uo at negative
current. In addition to the supply voltages +Ub and −Ub there is a second voltage in the circuit:
+Uo and −Uo . The voltage across the resonant components L and C will thus have four different
values as shown in table 3.3.1.
Because of the symmetry the half periods are similar but opposite and a description of only
the first half period will be given.
 99 / 274
300
Z o iL
200
t = T/2
T = 15 µs
100 T=
t = T/2 10 µs
re
β t = t1 j
-4 0 0 -3 0 0 -2 0 0 -U b α 100 U
b
200 300 400
Uc
t= 0
-1 0 0 T o = 25 µs
t= 0
-2 0 0
Figure 3.2.5: State plane diagram with curves for T < To .
+
Tr1 D1 C L U
_ B
_ iL
+
+
C Uc D
Us
- Co iL
+
Tr2 D2 U
_ B
- + Uo
Ro
UB = Us/2
Figure 3.3.1: Resonant converter with series load (SRC).
100 / 274 
Center of circle Sign Ub Sign Uo Conducting switch Time interval

uA = Ub − Uo + - Tr1 0 < t < t1
uB = Ub + Uo + + D1 t1 < t < T /2
uC = −Ub + Uo - + Tr2 T /2 < t < T /2 + t1
uD = −Ub − Uo - - D2 T /2 + t1 < t < T
The solution of uC = f (Zo iL ) for 0 < t < t1 will be part of a circle given by
Zo2 i2L + (Ub − Uo − uC )2 = r12 (3.3.1)
and for t1 < t < T /2
Zo2 i2L + (Ub + Uo − uC )2 = r22 (3.3.2)
Z o iL
t= 0
r1
E
D C β B t= t 1
-U -U
b o
-U + U
b o
U b -U o U b+ U o U
cm uc
A α r
2
t= T/2
Figure 3.3.2: State plane diagram for SRC.
spa slr
The maximum capacitor voltage uCm is part of both circles, see figure 3.3.2, from which it
follows that
Ub − Uo + r1 = Ub + Uo + r2 and r1 − r2 = 2Uo (3.3.3)
 101 / 274
We may use uCm as parameter and replace r1 and r2
r1 = uCm − Ub + Uo r2 = uCm − Ub − Uo (3.3.4)
From the symmetry caused by uC (0) = −uC (T /2) and Zo iL (0) = −Zo iL (T /2) it follows that
uC (0) = −M uCm (3.3.5)
with the gain

q
M = Uo /Ub Zo iL (0) = (1 − M 2 )(u2Cm − 2Ub uCm ) (3.3.6)
The average load current Io will be
Io = 2uCm /γZo (3.3.7)
The average output power will be Po = Uo Io = 2uγZ Cm Uo

o
.
Because there are no losses the input power has the same value. From the formula above, but
also from the diagram, it can be derived that the source current
2uCm
Ib = M (3.3.8)
γZo
With Q = Z0 /R
o andrfrom figure3.3.2,
γ
1−M 2 sin2
uCm = Ub 1 + cos2 γ2
2
(triangle ADE)
( s )
γ
2 1 − M 2 sin2 2
M= 1+ (3.3.9)
γQ cos2 γ2
From the quadratic equation, (3.3.9), in M, M can be calculated as a function of ω/ω0 or f /fo
because
ω/ω0 = π/γ and γ = πω0 /ω.
spa slr
3.3.2 Operating point in the first quadrant

[7] In [7] the average output current is given as equation (3.3.7). The author writes that the
validity can be demonstrated. This demonstration will be given in detail below. The notation
used in the paper, in per unit quantities, will be followed and denoted by N added to the suffix,
e.g. UON = Uo /Ub , IsN = Is Zo /Ub , PoN = Po Zo /Ub2 . The positive current into the load iON (t)
during the half period when UON is positive is found in the positive part of the state plane diagram
of figure 3.3.5. It has two parts, the first during conduction of the switches Q1−4 . It starts at t = 0
at an angle π and moves with an angular velocity ωo to the point H, where the switches are turned
102 / 274 
Ub 200
100
0
0 t1 T/ 2 T t
-100
-200
100
Uo
0
t
-100
200
Ub - U0
100
0
t
-100
-200
Z o iL 300
200
100
0
t
-100
-200
-300
Uc 400
300
200
100
0
t
-100
-200
-300
Figure 3.3.3: SRC currents and voltages as a function of time.
 103 / 274
1.0
M
Q=1
0.8
Q=2
Q=4
0.6 Q=3
Q=5
Q=6
0.4
Q=7
Q=8
0.2 Q=9
Q = 10
0
0.5 0.6 0.7 0.8 0.9 1.0
f / f0
Figure 3.3.4: Control characteristic with Q as parameter.
off. This occurs at time t1 when the angle is π − α and ωo t1 = α. This trajectory can be written
as
uαN (t) = 1−UON +(1−UON +UCN max )e−j(ω0 t−π) = 1−UON −(1−UON +UCN max )e−jω0 t
(3.3.10)
The real part of this equation gives the voltage, the imaginary part the current, as follows:
iαN (t) = Im (uαN (t)) = (1 − UON + UCN max ) sin ω0 t (3.3.11)
Rt
I0αN = ω02T (1 − UON + UCN max ) 0 1 sin ω0 tdω0 t
= ω02T (1 − UON + UCN max ) (1 − cos α) (3.3.12)
= ω02T (1 − UON + UCN max − 1 + UON + UON UCN max )
The second part occurs during conduction of the switches D2−3 . It starts at t = t1 at an angle β
and moves with an angular velocity ωo to the point UCN max on the UCN axis, where the switches
Q2−3 are turned on. This occurs at time T /2 when the angle is 0 and ωo T /2 = α + β = γ =
πω/ωo . See page 7 of this chapter. This trajectory can be written as
uβN (t) = −1 − UON + (1 + UON + UCN max ) e−jω0 (t−T /2) (3.3.13)
104 / 274 
The real part of this equation gives the voltage, the imaginary part the current, as follows:
iβN (t) = Im (uβN (t)) = − (1 + UON + UCN max ) sin ω0 (t − T /2) (3.3.14)
R T /2
IoβN = ω02T (1 + UON + UCN max ) t1 sin ω0 (t − T /2) dω0 t
= ω02T (1 + UON + UCN max ) (1 − cos β) (3.3.15)
= ω02T (1 + UON + UCN max − 1 − UON − UON UCN max )
Finally, the average current into the load during positive output voltage is the sum of the two:
2UCN max
IoN = I0αN + I0βN = (3.3.16)
γ
On the other hand, the current from the source during positive source voltage is the difference of
the two:
2UoN UCN max
IsN = I0αN − I0βN = (3.3.17)
γ
Remark. When solving the integrals given above, cos α and cos β have been used expressed in
the quantities UON and UCN max . This is done by applying the cosine-rule in triangle ABH that
results in:
1 − UON − UON UCN max
cos α = (see(26))
1 − UON + UCN max
1 + UON + UON UCN max
cos β =
1 + UON + UCN max
2 2
1 − UON − (UCN max + 2UCN max )
cos γ = 2 2
1 − UON + (UCN max + 2UCN max )
s
2
1 − UON sin2 γ/2
UCN max = −1 + (3.3.18)
cos2 γ/2
The last equation shows that when γ changes because the operating frequency changes (ω =
γωo /ω) and UON is constant also UCN max will change. This relation can also be written as
(3.3.9).
In this application ω > ωo and thus γ < π but also UCN max < 1 and
3
tan2 γ/2 < 2
(3.3.19)
1 − UON
The trajectory of point H where t = to when the operating frequency is changed can also be
determined. The coordinates of the switching point H are derived from (3.3.10) with ωo t1 = α.
uαN (t1 ) = 1 − UON − (1 − UON + UCN max ) e−jω0 t1
 105 / 274
The real part gives the voltage:
UHN = 1 − UON − (1 − UON + UCN max ) cos α = UON UCN max (3.3.20)
The imaginary part gives the current:

q
2 2
IHN = + (1 − UON + UCN max ) sin α = (1 − UON ) (UCN max + 2UCN max ) (3.3.21)
A constant output voltage UON while changing output power and current must be obtained
by changing the point of t = t1 . The point H than moves from the origin at zero current and
voltage along the line given in figure 3.3.5 that has been determined by changing UCN max in the
(3.3.20) and (3.3.21).
spa sru
3.4. Load parallel to the capacitance of the series LC circuit (PRC)

[6]
The DC output voltage is obtained by rectifying the capacitor voltage with a bridge rectifier.
In order not to disturb the sinusoidal capacitor voltage waveform an inductance Lo has been
inserted in the DC-current path. The load can be represented by a current sink with current
Io . At the capacitor side of the bridge the current will be +Io for uC positive and −Io for uC
negative.
Center of circle Sign Ub Sign Zo Io Conducting switch Time interval

(−Zo Io ,Ub ) + - Tr1 0 < t < t1
(+Zo Io ,Ub ) + + Tr2 t1 < t < t 2
(+Zo Io ,Ub ) + + D1 t2 < t < T /2
Because of the symmetry, the half periods are similar but opposite and a description of only
the first half period will be given. Because in the second and third row the current conduction
changes from transistor to diode we have three modes in the first half period and thus six modes
in a whole period. The solution of the circuit differential equation has the form
(Zo iL ± Zo Io )2 + (uC ± Ub )2 = r2 (3.4.1)
The state plane diagram is built up from parts of the circles given in figure 3.4.2. The circles with
their center in (+Zo Io ,±Ub ) are only given in the positive half plane because uC > 0 coincides
with Io > 0. Because of this t1 and T /2 + t1 are on the uC = 0 axis and t2 and T /2 + t2 on
the Zo iL = 0 axis. The waveforms of the resonance circuit are parts of the sine waves at the
106 / 274 
3.4 Load parallel to the capacitance of the series LC circuit (PRC)
ILN
IH N H
t = t1
r 2 = 1 + U O N + U C N m ax r 1 = 1 - U O N + U C N m ax
D2
t
TR 1
U CN max
B β α A
- 1 - UON -1 - 1 + UON UHN 1 - UON 1 1 + UON
UCN
D1
TR 2
Figure 3.3.5: State plane diagram.
 107 / 274
Uc
+ _ LL
C
Tr1 D1
L
+
Us C D
- Io Lo
Co
Tr2 D2
Ro
Figure 3.4.1: Resonant converter with parallel load (PRC).
Z 0 iL Z 0 iL
t1 t1
+ B
+ + + t2
uc uc
+ + + +
A
Z 0 iL Z0 iL
C+ + + +
uc uc
+ + + +
D
Figure 3.4.2: Circles representing six modes of one period.
108 / 274 
3.4 Load parallel to the capacitance of the series LC circuit (PRC)
resonating frequency fo . The current waveform is shifted by +Io from t1 to T /2 + t1 and by −Io
from T /2 + t1 to T + t1 . The small parts from to to t1 and from T /2 to T /2 + t1 , which can
hardly be seen, do not fit into the sine waveform of the rest of the half period. It can, however,
be explained from the state plane diagram in figure 3.4.4, where the arc HE (angle α) has a
radius different from the arc EF (angle β): r1 > r2 . This difference is also present in the voltage
waveform.
100
u0
0
t0 t1 t2 T/2 T t
-100
+Z 0 I0 50
0
-Z 0 I0 -50 t
200
100
Z 0 IL
0
t
-100
-200
200
100
uc
0
t
-100
-200
Figure 3.4.3: Supply and resonant components waveforms, f /f0 .
If the vector re moves along the path HEF it has passed the circle-parts with an angular
velocity of ωo over an angle α + β = γ in a time T /2. Therefore ωo T /2 = γ = πωo /ω.
A longer control period T (lower control frequency) means that α + β = γ increases which
occurs when the radius of the circles increase. We usually assume that the period starts, t = 0, at
point H with the coordinates (Z0 I1 ,U1 ). These values obey the relation
(Io + I1 )2 Zo2 = −U12 (Ub2 /(Io Zo )2 − 1) + Io2 Zo2 (3.4.2)
 109 / 274
For the same circuit at a different control frequency the point H moves along the dot and dash
line. Equation (3.4.2) has been derived from triangles AGH and DGH that give expressions for
r12 and r22 and from triangles AEE’ and BEE’ that give additional expressions for r12 and r22 to
eliminate the radii with the use of BE 0 = U1 Ub /Zo Io − Zo Io . When a choice for U1 or I1 has
been made the angles can be found from:
π π Ub Ub + U1
α= − η − ζ = − sin−1 − cos−1
2 2 r1 r1
Ub − U1 Ub
β = π + ε + δ = π + sin−1 + sin−1
r2 r2
A calculated example has been given in figure 3.4.5, with the components L = 3, 5mH
and C = 4, 7nF, the supply Ub = 135V and the load Io = 100mA that determine the values
Zo = 863Ω, fo = 39.24kHz and Zo Io = 86V.
For two chosen values of U1 the calculated values and accompanying diagrams are given in
table 3.4.2 and figure 3.4.5.
Table 3.4.2: Calculated values.
U1 (V) Zo I1 (V) r1 r2 α(◦ ) β(◦ ) f (kHz)

80 37 250 138 27 282 23
140 90 337 181 34 227 27
Of special interest in the control characteristic of figure 3.4.6 is the line below f /fo = 0, 5
where the voltage ratio Uo /Ub is independent of the load, determined by Io , and smaller than one.
Such a low frequency and discontinuous current are observed in a state plane diagram in figure
3.5.2.
3.5. PRC at low frequency, ω < 0.5ωo
disco prc
The circuit of figure 3.4.1 is still valid. The on-time of the upper switching transistor is shorter
than a complete resonant cycle. The output current Io flows continuously in the choke Lo and if
there is no energy supply from the resonance network Io flows through the bridge diodes only in
the output circuit. This implies that the bridge voltage is very low, only two forward conducting
diodes in series. Seen from the resonance circuit it means a short-circuit of the capacitor.
When Tr1 is switched on at t = to there is no energy in the resonance circuit and Zo iL = 0
and uC ≈ 0. The supply voltage Ub is connected to the inductor L and a current starts to rise
linearly. In the bridge diodes it opposes the current Io but only when iL = Io the diodes turn
off at t = t1 = LIo /Ub = Io Zo /(ωo Ub ) and now the capacitor voltage rises. The load current
110 / 274 
3.5 PRC at low frequency, ω < 0.5ωo
Z 0 iL
E'
E
H r2
t= 0 δ
+Z 0 I0
C B β
r1 r1 ε
-U b U1 Ub uc
r3
α
η
r2 ξ
D + A
G - Z 0 I0
t = T/2 F F'
Figure 3.4.4: State plane diagram of the parallel resonant converter (PRC).
 111 / 274
300
Z0i L
t = t1
200
t=0 100
+ +
-300 200 t = t2
-200 -100 100 300 uc
+ -100 +
t = T/2
-200
-300
Figure 3.4.5: State plane diagram of a calculated example of the PRC.
112 / 274 
4
Z 0I0/Ub 0 0
.5 .5
.8 .8
3
.9 .9
U0 /Ub
1.01
2
1.05
1.1
1
1.2
1.4
1.6
0
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
f /f0
Figure 3.4.6: Control characteristic of the PRC.
is now delivered by the supply and determines together with the supply voltage the operation of
the circuit, that can be described by the circle in figure 3.5.2.
From t1 the waveforms are part of a sine wave until t = t3 , t3 − t1 = ω/ωo . In the mean time
we passed t = t2 when iL crosses zero. The transistor Tr1 may now be turned off because diode
D1 is conducting. This occurs without losses (ZCS).
At t = t3 the current passes zero again and because Tr1 must be off by now; there is no path
for the current to continue and it stops. The remaining charge of the capacitor flows into the
output by means of the constant current Io . The capacitor voltage decreases linearly from t = t3
to t = t4 , t4 − t3 = U1 C/Io .The half period T /2 will be t4 = (Io Zo /Ub + β + U1 /Io Zo )/ωo
From the state diagram α = sin−1 Io Zo /Ub and thus β = 2π − sin−1 Io Zo /Ub . Further U1
can be determined from
q
U1 = Ub − Ub2 − Zo2 Io2
 s 
 2 
2 Zo Io Ub Ub −1 Zo Io
T = 2π + + − − 1 − sin
ω0  Ub Zo Io Zo Io Ub 
When we are back in the origin again an amount of energy has been delivered to the load,
given by the level and duration of Io , see figure 3.5.1. We may wait until more energy is needed.
There are now two possibilities:
 113 / 274
ub
100
0
t0 t1 t2 t3 t4 t
100
Z0I0
0
t
200
Z 0 iL
100
0
t
300
uc
200
100
0
t
Figure 3.5.1: Waveforms of discontinuous PRC.
114 / 274 
• the next half period is started by turning Tr2 on, and we obtain an alternating current,
rectified by the diode bridge to a DC output current, or
• the next half period is started by turning Tr1 on again, there is only a DC voltage on the
capacitor and a complete diode bridge is not necessary. The circuit can be simplified to
that of figure 3.5.3.
Z 0 iL
t1 β
Z 0 I0
α
r1 = U b
t0 t2
t4 t3 Ub uc
U1
Figure 3.5.2: State plane diagram of discontinuous PRC.
D1
iL I0
U0
L L0
+ Tr1 C0
C + R0
Ub u D0
- c
-
Figure 3.5.3: Circuit diagram of unilateral PRC.
From the figure 3.5.3 it is obvious that we are back to the quasi-resonant down converter with
continuous output current. The state plane diagram illustrates the mode during which energy is
supplied by the voltage source Ub , what was called δ1 T in the original down converter. During
δ2 T the state plane diagram gives no further information because current Io flows through Do and
 115 / 274
the resonant part of the circuit is in rest. The maximum frequency occurs when Tr1 is switched
on as soon as uC = 0, then maximum power is converted. Because δ1 T is given by L, C, Ub and
Io the output power can only be controlled by variation of the control frequency f = 1/T .
The converted power is equal to the input power
Rt Rt Rt −t
P = T2n 0 4 Io uc (t)dt = 2ITo t13 (Ub + Ub sin ω0 t) dt + 2ITo t34 Uo1 tt44−t3
dt
(3.5.1)
= 2ITo Ub (t3 − t1 ) − Uω0b (cos ω0 t3 − cos ω0 t1 ) + U21 (t4 − t3 )
With the data from page 12 but

Io = 100mA we calculate:
t1 = 2.6µs
t3 − t1 = 22.7µs t3 = 25.3µs
t4 − t3 = 1.4µs t4 = 26.3µs
the latter with U1 = 32.6V, resulting in a power of 11.1W.
3.6. Clamped PRC without current sink as load

[3]
clamped prc
The circuit diagram of figure 3.4.1 will be used, however, without Lo , and therefore also
without Io . The second difference with the previous examples is clamping of the current iL
in such a way that when iL = Ictrl the conducting transistor is switched off. The state plane
diagrams will be used to explain the operation. As usual we start with turning Tr1 on at t = 0 =
to in the diagrams. At this moment the rectifier bridge stops conducting and the capacitor voltage
uC (to ) = −Uo . The LC circuit is running free and starts a sine wave determined by the supply
voltage Ub . The current iL increases to t1 :
1. until the value Ictrl is reached, diagram A, or
2. until the capacitor voltage uC = Uo , diagram B.
In the second situation the bridge rectifier turns on and the capacitor voltage is clamped to
the output voltage Uo .
The inductance voltage uL is clamped to Ub − Uo and the current continues to rise until
iL = Ictrl at t = t2 . The transistor Tr1 is now turned off and the inductive energy is delivered to
the load by a decreasing current from t2 to t3 . Let us return to diagram A. The increasing current
in the inductance reaches Ictrl at t = t1 before uC = +Uo .
The transistor Tr1 is turned off when uC (t1 ) = U1 . The current iL (t) continues to flow
through diode D2 and the LC circuit voltage has changed to −Ub . This means that the path
of (iL ,uC ) follows a part of the circle with centre at −Ub . As soon as the capacitor voltage
uC = +Uo , at t = t2 , uC is clamped to the output voltage +Uo and load current will flow until
iL = 0 at t = t3 . From the diagram the following identities can be found:
116 / 274 
3.6 Clamped PRC without current sink as load
Z 0 iL
t1 2U b U 0
Ictrl Z 0
t2
t0 t 3 ,t 4
-U b -U 0 U1 U0 Ub Uc
D1
A Tr
2
1
D
Z 0 iL
Ictrl Z 0 t2
Tr1
2U b U 0 D2
t1
Tr
1
t0 t 3 ,t 4
-U b -U 0 U0 Ub Uc
Figure 3.6.1: State plane diagram of clamped current PRC.
 117 / 274
on the UC axis:
r1 = Ub + Uo (3.6.1)
from triangle −Ub , t2 , +Uo :
r22 = r12 + Zo2 i2L (t2 ) (3.6.2)
from triangle −Ub , t1 , U1 :
r22 = (Ub + U1 )2 + Zo2 Ictrl

2
(3.6.3)
from triangle +Ub , t1 , U1 :
r12 = (Ub − U1 )2 + Zo2 Ictrl

2
(3.6.4)
from (3.6.1), (3.6.4)

q
U1 = Ub − (Ub + Uo )2 − Zo2 Ictrl
2
(3.6.5)
from (3.6.2), (3.6.3), (3.6.4) Zo2 i2L (t2 ) = 4U1 Ub

As long as D2 is conducting the inductance voltage uL = −(Ub + Uo ). From t = t2 to t = t3
the inductance current flows into the load and can be written as iL (t) = iL (t2 ) − (t − t2 )(Ub +
Uo )/L and when t = t3 , 0 = iL (t3 ) = iL (t2 ) − (t3 − t2 )(Ub + Uo )/L. The average current into
the load is determined by
Z
2 t3 4U1 Ub
Zo Io = {Zo iL (t2 ) − ω0 (Ub + Uo ) (t − t2 )} dt = (3.6.6)
T t2 ω0 T (Ub + Uo )
The average output current can be written as Io = T4U 1 Ub C

and the output power Po = 4U 1 Ub CUo
√ (Ub +Uo ) T (Ub +Uo )

with the restriction that U1 exists and Z0 Ictrl < 2 Ub U0 .
The second half period starts at t = t4 and the shortest period is obtained if t4 = t3 . For
lower power a pause t4 − t3 can be inserted to increase the period t and decrease the frequency.
With the data from the example on page 12 and Ictrl = 220mA, Uo = 68V we obtain t1 =
4, 8µs, t2 = 4, 9µs, t3 = 8, 5µs, T = 17µs (f = 58kHz), r1 = 203V, r2 = 274V, U1 = 63V. We
see that U1 is very close to Uo and consequently t2 − t1 is very short. At the output Io = 46mA
and Po = 3, 1W.
Bibliography
[1] C.Q. Lee and K. Siri. Analysis and design of series resonant converter by state plane diagram.
IEEE Trans. AES, 22(6):757–763, november 1986.
[2] C.Q. Lee, K. Siri, and S.J. Fang. State plane approach to frequency response of resonant
converters. IEE Proc. G, 138(5):557–563, october 1991.
118 / 274 
3.7 Appendix
[3] C.Q. Lee and S. Sooksatra. Current programmed control nonresonant coupled parallel reso-
nant converter. IEE Proc. G, 138(3), june 1991.
[4] R. Liu and C.Q. Lee. Series resonant converter with third-order commutation network. IEEE
Trans. PE, 7(3):462–468, july 1992.
[5] R. Oruganti and F.C. Lee. Resonant power processors i. state plane analysis. IEEE Trans.
IA, 21(6):1453–1460, nov/dec 1985.
[6] R. Oruganti and F.C. Lee. State plane analysis of parallel resonant converter. Proc. PESC,
pages 56–73, 1985.
[7] L. Rossetto. A simple control technique for series resonant converters. IEEE Trans. PE,
11(4):554–560, july 1996.
3.7. Appendix
The figures used to obtain the diagram of figure 3.3.5
Specification: Us = 300V Uo = 125V Po = 50W
Determine limit of γ from (??): tan2 γ/2 < 3.63; γ < 2.18; fo /f = ωo /ω < 2.18/π
Make a choice for the operating frequency fo = 100kHz, To = 10µs → operating frequency
f > 144kHz
f = 151.5kHz, T = 6.6µs
This determines γ = 2.073 and with (??) UCN max = 0.833 → UCmax = 250V.
From Po = 2UCmax Uo /(γZo ) = 50W we find Zo = 603Ω.
The resonating components L = Zo /ωo = 960µH and C = 1/(ωo Zo ) = 2.6nF.
The triangle is determined by: the base AB=2UoN and with (??)
cos α = 0.1664α = 1.404 (80.4 ˚ )
cos β = 0.7842β = 0.6695 (38.4 ˚ )
cos γ = −0.4814γ = 2.073 (118.8 ˚ )
top angle π − γ = 1.069 (61.2 ˚ )
Coordinates of H: UHN = 0.347IHN = 1.4t1 = 2.2µs
 119 / 274
120 / 274 
4
Half Bridge Electronic Ballast
(CIRCUIT FOR LOW PRESSURE
LAMPS)
extra info about Half Bridge Electronic Ballast
4.1. General
Around 1950 the development of electronic ballast circuits resulted in the manufacturing of tran-
sistor ballasts for low pressure lamps. They were meant for battery supply and application in
trains and buses. The only switches available at that time were thyristors and germanium audio
transistors, which restricted the frequency to 7kHz. The increase of the lamp efficacy with 10
% for fluorescent lamps was only an additional feature. At the time of the energy crisis bipolar
silicon transistors with collector voltages above 500V were available and mains operation be-
came feasible. The energy savings obtained by improved lamp efficacy and lower ballast losses
were and still are the features. The original resonating push-pull circuit was soon to be replaced
by a half-bridge circuit and that is widely used today, with the remark that bipolar transistors
are replaced by MOSFETs. From the early types onwards it was clear that the electronic ballast
should also perform ignition and preheating of fluorescent lamp electrodes.
Recently, the power electronic specialists of the academic world have discovered this appli-
cation and have published several papers. They use different names, like class D inverter [Kaz-
imierczuk] or parallel loaded resonant inverter [PLR, Nelms]. Both use the fundamental sine
wave and an AC analysis to describe the ballast properties. In all cases the lamp is an equivalent
resistance (or conductance).
The control of lamp power, to provide light regulation for energy saving or dimming, can be
performed by variation of the supply voltage (SVM), frequency modulation (FM) or pulse width
modulation (PWM).
121
Chapter4 Half Bridge Electronic Ballast (CIRCUIT FOR LOW PRESSURE LAMPS)
4.2. Introduction
4.2.1 The full square wave generator

The square wave voltage is generated by the circuit of figure 4.2.1. The switch moves continu-
ously from + to - and backwards and remains at + and - during one half period of the generated
frequency that is supplied by a switch control circuit. A slight difference in duration of the half
periods will cause the voltage of the connecting point of the capacitors Cb to shift proportional
to the period difference. In this way a direct current in the LRCG-circuit will not be possible,
the capacitors Cb acting as one DC-blocking capacitor. This is a necessary requirement for the
majority of low pressure lamps such as fluorescent lamps or low pressure sodium lamps. The
nominal operating point of the lamp is determined by the lamp power and RMS voltage, or lamp
equivalent resistance (or conductance), or lamp RMS current.
2 Us
+
Cb
Cs +
0
LCRG-circuit
- Cb
Figure 4.2.1: Square wave voltage generator.
The frequency of the switch control circuit has to be chosen by taking into account
• the EMC properties of the complete installation including connecting wires that carry
”high” frequency currents and voltages, which extend outside the proper electronic bal-
last housing
• elimination of other interference situations, such as infrared controls
• the size of the components, especially of the power components like transistors, inductors
and capacitors
The supply voltage level is given by the battery or the mains voltage. A 230V mains will
result in about 280V DC when a low frequency harmonic filter has been used, or in 380V DC
or higher when an up-converter circuit has been applied, these ”preconditioners” improve the
mains current wave-form. The requirements regarding the mains current harmonics are given in
publication IEC 1000-3-2. In the examples a voltage of 410V is used as the DC source and a
nominal frequency of 45kHz will be applied.
122 / 274 
4.2 Introduction
4.2.2 Power control methods

It became clear soon that with the electronic circuits light dimming is easy. The most promising
power control methods [Tadesse] are:
• SVM, supply voltage modulation. The preconditioner principles in use at present, however,
are not the best choice to deliver a controllable DC output voltage. The up-converter circuit
delivers a voltage above the peak voltage of the mains. When this level should provide the
voltage for the minimum power, then at normal power the voltage would be much higher
and that means more losses in the preconditioner. Because of this the method is of less
importance.
• FM, frequency modulation. The basic principle is that the impedance of the inductor in-
creases when the frequency is raised, causing the current and the lamp power to decrease.
• PWM, pulse width modulation. The basic principle is that decreasing the equivalent RMS
voltage aross the LCRG will decrease the power into the load.
4.2.3 Methods of analysis

The design of the electronic ballast circuits is much more complicated than the design of the
magnetic ballast. Many choices have to be made and different methods are in use to prevent time
consuming measurements of many possible prototypes. The most important methods are:
• Iterative method1 . The differential equations of the LRCG-circuit are used with a first
guess of the state variables, the inductor current is (0) and the capacitor voltage uC (0) at
the start of a period. Then the state values at the end of one half period are calculated and
the initial guess changed until is (0) = is (T /2) and uC (0) = uC (T /2) and the steady state
waveform of one half period has been found. When, however, the square wave supply
voltage is asymmetric a whole period has to be calculated. The power into the lamp now
is known. If it is not the required power the process is repeated with other L and C values.
• Simulation method. Simulate the circuit, with Pspice [Sun] or other appropriate pro-
grams, and calculate so many periods that the circuit state at the start of one period equals
that at the start of the next period.
• AC analysis. Assume the circuit voltages and currents to be sinusoidal and apply an AC
analysis. It will give a good approximation because the series connection of L and C results
in good filtering of the harmonics of the square wave supply voltage.
• Exact analytical method. Find equations for the circuit currents and voltages in the steady
state. Iteration to find the right values of L and C for the desired lamp power is still
necessary.
It must be understood that all methods make use of a PC and suitable computer programs and
only the last two can be used with a calculator, with ”manual” iteration.
1
This is the sampled data method discussed in the last chapter of these course notes
 123 / 274
4.3. Circuit equations

The principle of the circuit of the magnetic ballast, an inductor in series with the lamp connected
to the AC mains voltage, is also the origin of the half bridge circuit in electronic ballasts. The half
bridge circuit generates a high frequency AC voltage and an inductor stabilizes the gas discharge
lamp that is connected in series with the inductor to the square wave half bridge voltage. The
additional requirements of ignition and preheating make the application of a capacitor in parallel
to the lamp very useful [Bhat].
To begin, the circuit is divided in two parts: a parallel circuit with C and G with time constant
1/(2β), and a series connection of L and R with time constant 1/(2α). The notation is used for
Laplace-transforms and gives the equations in the s-domain. The circuit is completely described
with expressions for the inductor current and the capacitor voltage, because they determine the
energy in the circuit. The Laplace transformations are described in the appendix.
circuit losses
+ is L R +
+ C
us(t) G u la uc(t)
-
is(t) lamp
-
-
Figure 4.3.1: ”Resonant” circuit with lamp load conductance G and power loss resistance R.
By defining
R G
γ =α+β = +
2L 2C
and
1 + RG
ω12 = γ 2 −
LC
it follows from figure 4.3.1 that
u s(s) 1
uC (s) = iL (s) · Zo (s) = (4.3.1)
LC (s + γ)2 − ω12
Note that all formulas in this chapter still work when ω1 2 happens to be negative. p
In that case
ω1 becomes complex, sinh(jω10 ) = j sin(ω10 ) and cosh(jω10 ) = cos(ω10 ), where ω10 = −ω12 .
For our purpose, where the electric lamp properties are given in watts, RMS voltages and
124 / 274 
4.3 Circuit equations
RMS currents, the equation for the lamp power is the most important one.
Z
2 T /2 2
Pla = uc (t)Gdt
T 0
( γT /2 ) (4.3.2)
Us2 G (γ 2 + 3ω12 ) sinh ω1 T /2
ω1 T /2
− (3γ 2 + ω12 ) sinh
γT /2
= 1+
(1 + RG)2 (γ 2 − ω12 ) (cosh ω1 T /2 + cosh γT /2)
√ q
Pla
It follows Ila = Pla G and Ula = G
. Capitals, used for voltage and current, denote RMS
values.
Capacitor voltage of LRGC tank (PWM, δ = 0.50)

250
200
150
100
A E F
50
Uc [Volt]
-50
-100
-150
-200
-250
0 5 10 15 20 25
time [μs]
fig3.4
Figure 4.3.2: Square wave supply voltage of 205 V and lamp voltage at 50 W lamp load for three
different LC-combinations.
Different lamp voltages as a function of time during one period are illustrated in figure 4.3.2.
Observe the increased attenuation of the higher harmonics when the capacitance increases, going
from A to F. (See section 4 on LC-combinations) In figure 4.3.2 and following waveforms the
fluorescent lamp type PL-L55 has been used at a nominal power of 50W, 428mA and 117V,
corresponding with an equivalent conductance of G = 3.67mS (or Rla = 272Ω). The supply
voltage is Us = 205V and the nominal operating frequency is 45kHz.
The supply currents in figure 4.3.3 also clearly show the influence of the capacitance in
the circuit: the current peak value increases and more reactive power is circulating through the
square wave generator, its transistors and diodes that act as switches and the ESR (equivalent
series resistance) of the capacitor Cs .
When the EMC behaviour of the application is considered, it can be very helpful to know
the amplitudes of the frequencies that are generated inside the electronic ballast housing by the
 125 / 274
Inductor current of LRGC tank (PWM, δ = 0.50)

1500
1000 F
E
500 A
Il [mA]
-500
-1000
-1500
0 5 10 15 20 25
time [μs]
fig3.4
Figure 4.3.3: Square wave supply voltage of 205V and supply current for 50W lamp load and
three different LC-combinations.
circuit and outside the housing but inside the luminaire by lamp and wiring. A Fourier-series
expansion of lamp voltage may be necessary and the general expression for the k th term is found
to be, for k = 1, 3, 5, 7, ... (using (4.3.1) and (4.3.4))
4Us
ûlak = q sin (ωkt − ϕk ) (4.3.3)
2 2 2 2 2 2 2 2
πkLC 4γ ω k + (γ − ω1 − ω k )
The general expression for the harmonics of the supply square voltage for k = 1, 3, 5, 7, ... is
given by
4Us
ûk = sin (ωkt − ψk ) (4.3.4)
πk
For EMC analysis the phase angles ϕk and ψk do not apply, only the amplitudes.
4.4. LC-combinations
The origin of the LRCG-circuit is not a parallel loaded series resonant circuit at all but the
old-fashioned magnetic ballast circuit in its simplest shape, with one copper-iron inductor to sta-
bilize the lamp current. Resonance is only used before the lamp is ignited to supply electrode
heating current and lamp ignition voltage. However, the capacitance that is necessary to obtain
resonance changes the current in the inductor and the lamp. It is therefore necessary to match
126 / 274 
4.4 LC-combinations
the inductance to the new situation. Under nominal operating conditions the resonance is com-
pletely attenuated. This is shown by the supply current waveforms of figure 4.3.3. The result is
that the LC-combinations graph in figure 4.4.2 shows only a small variation in the value of the
inductance, but a large variation in capacitance.
Table 4.4.1: LC-combinations when Us = 205V, f = 45kHz, Glamp = 3.67mS, Plamp = 50W.
(constructed by solving (4.3.2) when C is given)
C(nF) L(mH) ω1 (rad/s) f1 (kHz) fr (kHz)

0 1.19 n.a. n.a. n.a.
A 0.82 1.247 2·106 319 157
1.00 1.26 1.6·106 255 142
B 1.10 1.27 1.4·106 229 135
1.5 1.29 990·103 157 114
C 2.2 1.34 590s103 95 93
3.3 1.40 300·103 48 74
D 4.7 1.46 70·103 11 61
ω0 (rad/s) f0 (kHz)
6.8 1.51 160·103 26 50
E 8.2 1.52 176·103 28 45
10 1.50 183·103 29.1 41
12 1.46 185·103 29.4 38
F 15 1.38 184·103 29.3 35
22 1.15 181·103 29.1 33
√
f1 = ω1 /2π, f0 = ω0 /2π, fr = resonant frequency = 1/2π LC
The LC-combinations can be presented as L = f (C) in figure 4.4.2. The inductance values
start with L = 1.2mH when there is no capacitor at all and has a maximum at L = 1.5mH. The
resonance frequency fr at the maximum inductance equals the supply frequency of 45kHz. It
has also been given as fr = f (C) in figure 4.4.2.
The difference in properties of the LC-combinations can be illustrated by means of the out-
put characteristics Pla = f (Ula ) in figure 4.4.3. The curves are obtained by varying the load
conductance of the ballast from ∞ to 0. They have two points in common, one for G = ∞ and
the other at the nominal operating point of the lamp, 50W and 117V.
The points where G = 0 are lying on the voltage-axis, where Pla = 0. This is the open
voltage with which ignition can be obtained. Note that the graph of figure 4.4.3 is only valid for
45kHz and the frequency may be changed for ignition purposes if the open voltage at 45kHz is
not sufficient. Curve E in figure 4.4.3 is approximately a straight line and extends far beyond the
scales of this graph. We will call the open voltage the ballast ignition voltage because ”ignition
voltage” is already used as a lamp property.
 127 / 274
L C selection chart
1.6
1.5
E
1.4 D
L [mH]
F
1.3 C
B
1.2 A
1.1
0 5 10 15
C [nF]
300
200 A
fr [kHz]
B
C
100
D
E F
0
0 5 10 15
C [nF]
fig5
Figure 4.4.1: L = f (C) for Us = 205V, f = 45kHz, G = 3.67mS, Pla = 50W.
Figure 4.4.2: fr = f (C), fres of LC-combination E equals the supply frequency.
Output characteristic of LRGC tank - exact; δ = 0.50, Fsw = 45.0 kHz

120
E
100
D
80
LAMP(25)
Plamp [Watt]
F
60
C
40
B
B fr(kHz) 135
20 A
0
0 50 100 150 200 250 300 350 400 450
Vlamp [Volt]
fig6
Figure 4.4.3: Output characteristics in Pla −Ula plane intersecting the lamp characteristic at 50W
and 117V.
128 / 274 
4.5 Cathode heating and ignition
Curve B shows the existence of third harmonics in the supply voltage, its resonant frequency
is exactly three times the supply frequency and a high ballast ignition voltage is generated. This
is also visible in curve A but much smaller. The other curves show ballast ignition voltages
within the limits of the graph.
4.5. Cathode heating and ignition
4.5.1 Cathode heating

The cathode heating before applying the ballast ignition voltage improves the lamp life consider-
ably. With no parallel load, G = 0, the circuit is series loaded, as figure 4.5.1 shows. Equations
describing this situation are given in the appendix. Our power equation (4.3.2) does not work,
because P = 0 when G = 0. The graph of figure 4.5.4 shows that a frequency shift above the
resonant frequency of the LC-combination provides a low capacitor voltage and a high capaci-
tor current, well suited for preheating. Care must be taken that the capacitor voltage does not
exceed the maximum allowable no-ignition voltage of the lamp, in our example 230V(RMS).
After sufficient preheating the voltage has to rise above the minimum voltage for ignition, 360 to
450V(RMS) depending on the ambient temperature, see figure 4.5.3.
L R
C
G
L R
PTC C
G
Figure 4.5.1: Series resonant circuit for sufficient electrode current and low capacitor voltage.
Figure 4.5.2: Damped resonant circuit with PTC-resistor.
If the ballast, however, has no frequency generator, as is the case with self-oscillating cir-
cuits [Wu,Yu], a frequency shift can not be applied and other measures have to be taken, as e.g.
 129 / 274
a resistor with positive temperature coefficient (PTC). The low cold resistance determines the
electrode heating current and has to be determined from lamp data. Also the heating time of the
PTC has to correspond with the heating time of the electrodes. When the resistance value of the
PTC increases the attenuation of the resonance decreases and the voltage will rise until the lamp
ignites.
Ignition voltage versus temperature
450
area for safe ignition
400
PLL 55
350
ignition voltage [Vrms ]
300
250
200
150 safe area for no ignition
100
50
0
-10 0 10 20 30 40 50 60
ambient temperature [°C]
fig8
Figure 4.5.3: Ignition voltage versus temperature, from Philips Lighting Technical information
PL-L lamps.
It is not only necessary to preheat the electrodes to improve ignition but also during normal
operation the electrodes must keep their emission temperature. Under normal operating con-
ditions the lamp current, flowing through a part of the electrode, is sufficient. When the lamp
current is decreased to obtain ”dimming”, additional current is needed to guarantee emission. In
the past, with magnetic ballasts, a special transformer was used with isolated secondary windings
for each electrode. This principle may also be applied to electronic ballasts. With our LC-circuit
the capacitor current flows through the electrodes and can be used but take care that the current,
also under normal operation, is within the limits given by the lamp specification. The lamp of
our example asks for at least 400mA (inclusive discharge current) up to 480mA. From the facts
that the capacitor voltage equals the lamp voltage and the frequency range is known it is easy to
calculate the capacitor current through the electrodes.
4.5.2 Ignition
Just as preheating of the electrodes, ignition has influence on the average life of the lamp. This
is the more applicable to lamps with cold electrodes [Donahue], some fluorescent lamps and all
low pressure sodium lamps. In those lamps a relatively small spot has to be heated to emission
130 / 274 
4.6 Lamp properties
ignition voltage
^
U
U^ c ^
UL
^
UL ^
U c
f0 fr f (kHz)
Figure 4.5.4: Ignition voltage near resonance of the series LCRG circuit.
before a discharge is obtained. It is therefore necessary that the ballast is able to deliver sufficient
power at all voltages between ignition voltage and normal operating voltage in order to obtain a
fast transition through the glow discharge to improve the life of the electrodes.
For low pressure sodium lamps it is therefore recommended to use a LC-combination with a
resonant frequency close to the operating frequency and an open voltage that exceeds the ignition
voltage of the lamp.
4.6. Lamp properties

In addition to the lamp data for light control purposes, like the specification of cathode heating,
more knowledge about the lamp characteristic is necessary to design a dimming ballast. The
nonlinearity of the lamp characteristic in the P-U-plane is shown in figure 4.6.1. It has been ob-
tained by measuring several lamps at an ambient temperature of 25◦ C after the lamp has reached
stable operation at power values from 50W to 0,5W [Achten]. This range is meant to be valid for
light control from 100% to 1%. For the analysis of the circuit a mathematical description of this
nonlinear conductance is very helpful and from the available empirical expressions the following
has been used:
Pla
Gla = 2 + Glim (4.6.1)
P
− Pla
ULmin + (UO − UL )min e k
with constants Glim the conductance at very low values of Pla , Pk is a power level and U0 and
UL are voltage levels all derived from measurements. Pla is the lamp power that the circuit is
delivering to a conductance with value Gla .
The characteristic values as defined above are all measured in constant ambient temperature.
At other temperatures other values are measured. This temperature dependence has not been
incorporated in (4.6.1). The influence on the nominal operating point is shown in figure 4.6.2.
 131 / 274
Characteristic of TLD50WHF (red), PLL55W (blue), G = 3.67 mS (magenta)

70
60
50
Plamp [Watt]
40
30
20
10
0
0 50 100 150 200 250
Vlamp [Volt]
fig10
Figure 4.6.1: Lamp characteristics at 25◦ C of PLL 55W and TLD 50W.
At lower and at higher temperatures the lamp consumes less power than the lamp would do at
the same ballast at 25◦ C. The emitted light flux decreases proportional to the power.
4.7. Power control
Table 4.7.1: Nominal conditions used for the examples.
Supply Lamp, nominal Lamp Characteristic at 25◦ C ambient

Us = 205V Pla = 50W Glim = 10µS
f = 45kHz Ula = 117V UL = 68V
Ila = 428mA UO = 232V
Gla = 3.67mS Pk = 41.3W
132 / 274 
4.7 Power control
Output characteristic of LRGC tank - exact; δ = 0.50, Fsw = 45.0 kHz

70
0 LAMP(25)
5
60 15
25
45
50
Plamp [Watt]
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Vlamp [Volt]
fig11
Figure 4.6.2: Temperature influence on the normal operating point.
4.7.1 Power control with FM

In section 4 output characteristics of different LC-combinations at the operating frequency of
45kHz have been given. This was necessary to determine the operating point (50W, 117V). Now
we will consider the output characteristics of every LC-combination as a function of frequency,
restricted to three examples, A, E, F, figure 4.7.1, figure 4.7.2 and figure 4.7.3, respectively.
Starting at 45kHz, we see that the frequency of 52kHz, whose third harmonic equals the
resonant frequency fr of the LC-combination A, causes a high ignition voltage (intersection
with the Pla = 0 axis.) The same occurs when the operating frequency is 157kHz (equal to
fr ). The lamp characteristic, however, shows that the lamp voltage Ula never exceeds 205V. This
means that the high voltage part of the characteristics may be interesting for other purposes but
is not used for power control. The intersection of the lamp characteristic with the output curves
are the ”stable” points of operation. A close look at those points, however, reveals that there
may be two or even three intersections of one output curve with the lamp curve. This means that
there are also unstable points. This phenomenon can be found in all three examples, figure 4.7.1
through figure 4.7.3.
Here in figure 4.7.3, with F, the curve of 50kHz is intersecting the lamp characteristic in three
points and does not reach the 205V level. The frequency control range will be very small, as
figure 4.7.4 and figure 4.7.5 are showing. What did we have in mind when we thought that an
increasing frequency should cause a decreasing power into the load? It may be illustrated by
figure 4.7.4, where power has been given as a function of frequency. A constant load impedance
 133 / 274
Output characteristic of LRGC tank "a" - exact; δ = 0.50, mode FM

60
150
50 165
40
Plamp [Watt]
30
50
20
55
220
10
215
60
45
0
0 50 100 150 200 250 300 350 400
Vlamp [Volt]
fig121314
Figure 4.7.1: mode FM LC-combination A.
Output characteristic of LRGC tank "e" - exact; δ = 0.50, mode FM

60
45 50 55
50
40
Plamp [Watt]
30 60
63
20 65
10
0
0 50 100 150 200 250 300 350 400
Vlamp [Volt]
fig121314
Figure 4.7.2: mode FM LC-combination E.
134 / 274 
4.7 Power control
Output characteristic of LRGC tank "f" - exact; δ = 0.50, mode FM

60
50
40
Plamp [Watt]
45
30 50
20
10
0
0 50 100 150 200 250 300 350 400
Vlamp [Volt]
fig121314
Figure 4.7.3: mode FM LC-combination F.
is used, that takes 50W from the circuit at 45kHz and in our example is G = 3.67mS. It shows
that the power is indeed decreasing at higher frequencies. The frequency range for the same
power range is different for the LC-combinations, for A with a high resonant frequency it is
much larger than for F with a low resonant frequency.
With a lamp load, which is by no means a constant impedance, but given by the curve in
figure 4.6.1, the power control by increasing the frequency shows the difficulties we will meet in
figure 4.7.5. Curve A gives no problems, there is a continuous decrease in power as a function
of frequency, even at the steep fall below 10W. The other curves show impossible parts, where
there are three intersections of the curve with one frequency. A theoretical explanation has been
described by [Smidt], making use of the lamp curve, (4.6.1). This occurs for C below 15W and
the others below 20W. To lower the power the frequency then has to be decreased also until
about 2W, where the slope is positive again. Thus dimming the light output is restricted to a level
corresponding with about 20W electrical power with a simple frequency control.
4.7.2 Control with PWM

The duty cycle of the square wave will be regulated to control the power. The switch in figure
4.2.1 will be connected to (+) at the start of a period T . In normal operation, the power to the
load will be delivered when the switch changes to (-) at the time T /2. The duty cycle control
begins when the switch will change to (0) before the end of the half period, say at t = δT , with
 135 / 274
Power versus frequency, constant G = 3.67 mS - circuit "f"; δ = 0.50

60
50
40
Plamp [Watt]
30
20
10
E A
F C
0
0 50 100 150 200 250
Frequency [kHz]
fig15
Figure 4.7.4: mode FM Power versus frequency with a constant load of 3.67mS.
Power versus frequency, lamp "PLL55W" - δ = 0.50

50
45
40
35
30
Plamp [Watt]
25
20
15
10
f e c a
5
0
40 60 80 100 120 140 160 180 200 220 240
Frequency [kHz]
fig16
Figure 4.7.5: mode FM Power versus frequency with (variable) lamp conductance.
136 / 274 
4.7 Power control
Us
T/2 + δT
0
0 δT T/2 T t im e
-U s
D U TY -C Y C LE C O N TR O LLE D W A V E
Output characteristic of LRGC tank "a" - exact; mode PWM

60
0.5
50
40
0.35
Plamp [Watt]
30
0.25
20
10
0.1
0
0 50 100 150 200 250 300 350 400
Vlamp [Volt]
fig171819
Figure 4.7.6: mode PWM LC-combination A.
 137 / 274
0 < δ < 1/2. When the second half of the period starts, at t = T /2, the switch changes to (-)
and stays there until T /2 + δT , whereafter it changes to (0) till the end of the period.
Output characteristic of LRGC tank "c" - exact; mode PWM

60
0.5
50
40
Plamp [Watt]
0.3
30
20
0.25
10
0
0 50 100 150 200 250 300 350 400
Vlamp [Volt]
fig171819
Figure 4.7.7: mode PWM LC-combination C.
The output characteristics of LC-combinations A,C and E have been calculated for different
values of δ and given in figure 4.7.6 through figure 4.7.8, respectively.
The curves of LC-combinations A and C from figure 4.7.6 and figure 4.7.7 are comparable
in shape to the curves for A and F obtained with frequency modulation, figure 4.7.1 and figure
4.7.3 while for E, where the supply frequency equals the LC-resonant frequency, the FM-curve,
figure 4.7.2, and the PWM-curve of figure 4.7.8, differ considerably. In the FM-curve there exist
curves with three intersections with the lamp curve but in the PWM-curve only one intersection
with the lamp curve for every value of δ.
The expectation of power control with a constant load by means of duty-cycle variation is
good, as figure 4.7.9 shows. There is practically no difference between the curves for combina-
tions A,C,E.
The lamp characteristic, however, changes the smooth control curve into a multi-valued
curve, figure 4.7.10. There is, however, one exception, where the supply frequency equals the
LC frequency and values very near to it. Curve E has been calculated with C = 8.2nF and
L = 1.52mH; the curve nearest to it has been calculated with C = 6.8nF and L = 1.51mH.
4.7.3 Power control with SVM

For the sake of completeness, a SVM characteristic is given in figure 4.7.11. Notice that the non-
linear lamp characteristic has the same influence on the power versus supply voltage picture as
138 / 274 
4.7 Power control
Output characteristic of LRGC tank "e" - exact; mode PWM

60
0.5
0.25
50
0.1
40
Plamp [Watt]
30
0.05
20
10
0
0 50 100 150 200 250 300 350 400
Vlamp [Volt]
fig171819
Figure 4.7.8: mode PWM LC-combination E.
Power versus dutycycle, constant G = 3.67 mS - circuit "e"; f = 45.0 kHz

60
50
40
Plamp [Watt]
30
20
10
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
dutycyle
fig20
Figure 4.7.9: mode PWM Power versus duty cycle with a constant load of 3.67mS.
 139 / 274
Power versus dutycyle, lamp "PLL55W" - frequency = 45.0 kHz

50
45
40
35
30
Plamp [Watt]
25
20
15
10
e g f c a
5
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
dutycycle
fig21
Figure 4.7.10: mode PWM Power versus duty cycle with (variable) lamp conductance.
the previous two control methods have given in the graphs of figure 4.7.5 and figure 4.7.10. Here
too there is only one continuously descending line from the nominal voltage of 205V downwards,
when the LC-frequency is close to the operating frequency, just as with PWM.
4.7.4 Remarks
Linearization of the lamp characteristic
Although a curved line in the power-voltage characteristic does not necessarily mean that a
nonlinear load is present, we know that a constant conductive load in all cases shows a continu-
ously descending line, see figure 4.7.4 and figure 4.7.9. It might happen that a constant conduc-
tance in parallel to the lamp could improve the power control curves. For the LC-combination
C this has been calculated, the result being given in figure 4.7.12. A conductance of 270µS has
been mounted parallel to the lamp conductance and the resulting dashed line shows the improve-
ment, still very steep at 130kHz, but not folding back anymore. It costs, however, a lot of energy,
given by the lowest line: 4W at the nominal operating point, 8%, and 10W at 10W lamp power.
Static and dynamic Until now only static situations have been described. The circuit is in the
steady state and the lamp in equilibrium position. What happens when the duty-cycle is changed
downwards (PWM) or the frequency (FM) upwards to the desired value for a lower light level?
We know from experience that the recombination of charge carriers in the discharge is a slow
process. Considering the reignition peak at 50Hz supply that vanishes at higher frequencies we
140 / 274 
4.7 Power control
Power versus supply voltage, lamp "PLL55W" - frequency = 45.0 kHz, δ = 0.50
50
45
40
35
30
Plamp [Watt]
25
20
15
10
e b f a
5
0
0 20 40 60 80 100 120 140 160 180 200
supply voltage [Volt]
fig22
Figure 4.7.11: mode SMV power versus supply voltage with (variable) lamp conductance.
50
(W)
40
Pla
30
C
20
10
0
50 100 150
f (kHz)
Figure 4.7.12: mode FM added conductance to linearize the lamp characteristic.
 141 / 274
50
(W)
40
Pla C
30
20
10
0
0 50 100 150 200
f (kHz)
Figure 4.7.13: mode FM dynamic approach when lamp is switched to low power.
assume that the recombination is slower than the switching behaviour of the circuit. The oper-
ating point will move first along the dashed line in figure 4.7.13, which is the characteristic line
for a constant conductance equal to that at the intersection of full and dashed line, comparable to
the curves of figure 4.7.4.
Example: The lamp and ballast are stabilized in the position 40W, the lamp has a conductance
of 2.4mS. A light level corresponding with 30W is desired and the frequency is changed to
105kHz, because the control ”knows” 105kHz means 30W. The power then might decrease to
18W, which point is correct for 2.4mS and 105kHz. The conductance then will decrease to
1.4mS, the point where 30W and 105kHz determine the steady state. On the other hand, it has
been observed that the lamp reacts much faster when decreasing the frequency to increase the
light level. This was a small detour to show that knowledge of the static characteristics alone is
not sufficient to design a proper dimming circuit. It is in the design of control circuits that these
problems will have to be solved.
4.8. Influence of the circuit on the generator

The generator is the circuit outside the LRCG load circuit that generates the square wave voltage
us (t). The switches of the generator are each one transistor (MOSFET) and one antiparallel
diode. The current that has been given in figure 4.3.3 flows first through the diode at the (+)
side from the load circuit into the generator DC source because there is energy available in L
and C. After zero crossing the transistor is conducting. This taking over the current from the
diode by the transistor means that the switching, ”off” from the diode and ”on” of the transistor,
occurs at a low current level and causes practically no switching losses. When on the contrary
the transistor is switched off at the end of one half period the current is high and a considerable
space charge has to be removed and this means switching loss. It can be alleviated by applying
142 / 274 
4.8 Influence of the circuit on the generator
a capacitor parallel to the transistor that delays the rise of the transistor blocking voltage that
eventually reaches the value 2Us . The diode too is dissipating power, at turn-on. Capacitors
parallel to the switches will cause a trapezoidal supply voltage instead of a square waveform.
Output voltage of LRGC tank (PWM, δ = 0.50)

300
Us =205V
200
50W
100
Uc [Volt]
20
0
10
1
-100
-200
-300
0 1 2 3 4 5 6 7
ωt [rad]
fig2526
Figure 4.8.1: mode FM lamp voltage waveform at different power levels, LC-combination C.
The lamp voltage is seen to become more and more sinusoidal as the power decreases, figure
4.8.1. The supply current, figure 4.8.2, does not change very much, which means that, while the
power in the load decreases, the reactive power, that travels to and from the DC-source from and
to the inductance and capacitance of the LRCG-circuit, increases. As long as this current does
not change, however, the circuit losses in R will not change either. This reactivity can also be
seen in the zero crossings of the current that move towards ωt = π/2. At 1W lamp power the
supply current in the first quarter of the period is nearly the same as in the second quarter, only
the sign is reversed. Even at a very low load the supply current has an exponential shape. This
phenomenon is caused by the fact that the lamp voltage, even though it is not constant, remains
restricted to a maximum value, in our example 205V.
The voltage uG (t) under PWM control looks little different from that under FM control.
During positive supply voltage also the lamp voltage stays positive. The 1W curve shows the
influence of the third harmonic, while at 20-35W the first harmonic is dominant and at 50W the
waveform is exponential.
Capacitive or inductive operation.
The waveforms in figure 4.3.3 show that the current starts in the first half period as negative
flowing through the diode of the + switch and after zero crossing through the transistor. This is
typical for an inductive load. This was our starting point, an AC voltage source and an inductor to
stabilize the lamp current. The capacitor serves as an aid in generating a ignition voltage. Under
normal operation the resonant combination of L and C is very much damped, see the exponential
waveforms in figure 4.3.3 and figure 4.8.2. Only at very low loads, at ignition or dimming at low
 143 / 274
Inductor current of LRGC tank (PWM, δ = 0.50)

800
600
Us =205V
50W
400
20
200 10
1
Il [mA]
-200
-400
-600
-800
0 1 2 3 4 5 6 7
ωt [rad]
fig2526
Figure 4.8.2: mode FM supply current waveforms at different power levels, LC-combination C.
300
us = 205 V
(V)
200
ula(t)
100
50 W
0 0 T/2 T t
35
20
-100
10
1
-200
-300 fig27
Figure 4.8.3: mode PWM LC-combination C, lamp voltage waveform at 50,35,20,10 and 1w.
144 / 274 
4.8 Influence of the circuit on the generator
Inductive - Capacitive mode boundary (PWM, δ = 0.50)

500
450
400
350
300
G [μS]
250
200
150
100
50 PLL55W
0
0 50 100 150 200 250
frequency [kHz]
fig28
Figure 4.8.4: mode FM LC-combination A sign Is (0); Boundary between inductive and capaci-
tive operation.
 145 / 274
light levels, there is the danger of capacitive operation. Then the current starts positive and flows
through the transistor first and then through the diode. If we do not want excessive power loss, or
to build snubbers into the circuit, this situation must be avoided. In figure 4.8.4 the region where
capacitive operation occurs is given by the green color and the lamp curve does not intersect
those regions. This part of the lamp curve has been taken from figure 4.7.5 and the conductance
has been derived from the power of figure 4.7.5 by means of (4.3.2). At a conductance above
425µS there is no change in sign at all and the lamp characteristic shows no intersection with the
green regions.
4.9. APPENDIX: APPLICATION OF LAPLACE-TRANSFORMATIONS
4.9.1 The circuit
+ Is
L R +
+
C
us(t) G Ula(t) uc(t)
-
lamp -
- is(t)
Figure 4.9.1: The LRCG circuit.
Yo (s) = G + sC
1 1 1
Zo (s) = =
G + sC C s + G/C
1 1 1 1
Zt (s) = R + sL + = L(s + R/L) +
C s + G/C C s + G/C
with R/L = 2α and G/C = 2β and α + β = γ
1
1 1 (s + γ)2 − (α − β)2 + LC
Zt (s) = L(s + 2α) + =L
C s + 2β s + 2β
1 + RG 1 + RG
with ω12 = γ 2 − or ω02 = − γ2
LC LC
whichever is positive
(s + γ)2 − ω12
Zt (s) = L (4.9.1)
s + 2β
146 / 274 
4.9 APPENDIX: APPLICATION OF LAPLACE-TRANSFORMATIONS
The circuit shows a parallel connection of C and G with impedance Z0 (s). With L and R in
series with Z0 (s) the total impedance is Zt (s). Introduction of α, β and γ.
4.9.2 The supply voltage us (t)

The supply voltage generator changes the energy from the DC-source, figure 4.2.1, to a alter-
nating voltage. The control circuitry of the ballast acts on the generator, of which the following
properties can be changed during operation:
• output voltage level
• frequency
• duty-cycle
Other properties, built into the generator on purpose or present as parasite, shall be incorporated
in the description of the supply voltage waveform e.g. asymmetry caused by unbalance, finite
rise time of an originally square waveform due to snubber capacitors parallel to the switches.
Furthermore a DC-blocking capacitor with an impedance very small compared to the impedance
of the inductor L, capacitor C and load in the frequency range of interest is connected in series
with the LRCG circuit. The presence of asymmetry in the generator or in the load G is then
translated in a DC voltage on the capacitor. The main reason is that DC currents through dis-
charge lamps are not allowed.
The full square wave
The waveform consists of three steps, which are given in the next equation:

1 2e−sT /2 e−sT Us 2
us (s) = Us − + = 1 − e−sT /2
s s s s
repeated with period T
2
Us 1 − e−sT /2 Us 1 − e−sT /2
us (s) = = (4.9.2)
s 1 − e−sT s 1 + e−sT /2
The trapezoidal waveform.

Here there are six steps, starting with one step of Us , followed by one with a slope −1/σT at
time t = T /2 − 2σT , which slope is ended by addition of a positive slope 1/σT at t = T /2.
The next half period is constructed in the same way. The result is the following equation:

1 e−s(T /2−2σT ) e−sT /2 e−s(T −2σT ) e−sT e−sT
us (s) = Us − + + − −
s s2 σT s2 σT s2 σT s2 σT s
Us
= 2 1 − e−sT /2 sσT 1 + e−sT /2 + e−sT /2 1 − e−2sσT
s σT
 147 / 274
Us
0
0 T/2 T t im e
-U s
SQUARE W AVE
Us
T/2 T - 2 σT
0 T /2 - 2 σT
0 T t im e
-U s
TR A P E ZIU M W A V E
(1-d)U s
(1 + d ) T /2
0
0 T/2 T t im e
(1+d )U s
A S Y M M E TR IC W A V E
Us
T /2 + δT
0
0 δT T/2 T t im e
-U s
D U TY -C Y C LE C O N TR O LLE D W A V E
Figure 4.9.2: Examples of waveforms Us (t).
148 / 274 
Us 1 − e−sT /2 −sT /2
−sT /2 −2σT

sσT 1 + e + e 1 − e (4.9.3)
s2 σT 1 − e−sT
Asymmetric waveform.

1 − d 2 −s(1+d)T /2 1 + d −sT
us (s) = Us − e + e
s s s
Us
= 2 1 − e−s(1+d)T /2 − (1 + d) 1 − e−sT
s

Us 2 1 − e−s(1+d)T /2 − (1 + d) 1 − e−sT
us (s) = (4.9.4)
s 1 − e−sT
Because of the large series capacitor we know already that no DC current can flow. The
asymmetry will cause the series capacitor to be charged to d · Us , of which the result has been
given in the third waveform of figure 4.9.2.
The duty-cycle controlled square wave.
Us Us
us (s) = 1 − e−sδT − e−sT /2 + e−s(T /2+δT ) = 1 − e−sδT 1 − e−sT /2
s s
Us 1 − e−sδT
us (s) = (4.9.5)
s 1 + e−sT /2
The theorem of Heaviside will be used to transform us (s) into us (t). We write
Us

s
1 − e−sδT ϕ(sk , T )
us (s) = −sT /2
=
1+e Z(sk )
Us 1 − e−sδT Us δT
lim =
s→0 s 1 + e−sT /2 2
where the zero’s of the denominator Z(sk ) are the poles of us (s). It can be proven that s = 0 is
no pole by calculating
The poles are given by: Z(s) = 1 + e−sT /2 = 0 if e−sk T /2 = −1 = ej(π+2nπ)

and − sk T /2 = j (π + 2nπ)
thus sk = −jωk for k = 1, 3, 5, 7...
the derivative is Z 0 (s) = −T /2e−sT /2 and Z 0 (s)k = T /2
 149 / 274

X∞ ϕ(sk , T ) X∞ Us 1 − e−jωkδT e−jωkt
us (t) = esk t = 2Re
−∞ Z 0 (sk ) 0 −jωk T /2
2Us X ∞ (1 − cos 2πδk − j sin 2πδk) (cos kωt − j sin kωt)
= Re
π 0 −jk (4.9.6)
2Us X ∞ 1
= {sin 2πδk cos kωt + (1 − cos 2πδk) sin kωt}
π 0 k
The general term will be

q
2Us
usk (t) = sin2 2πδk + (1 − cos 2πδk)2 sin (kωt − ϕk ) (4.9.7)
πk
From this equation we find the harmonics of the square wave for
4Us
δ = 0, 5usk (t) = sin (kωt − ϕk ) (4.9.8)
πk
If we are going to calculate the circuit
√ with only the first harmonic (sine) wave its amplitude
has to be 4Us /π or its RMS value 2 2Us /π. To determine if higher harmonics may be deleted
we will have to compare the square of the amplitudes: that of the third harmonic is only 11% of
the level of the first harmonic. At lower values of δ, however, the first harmonic level decreases
and below δ = 0, 1 is nearly equal to that of the third harmonic, as figure 4.9.3 shows.
4.9.3 Capacitor voltage and inductor current

The capacitor voltage and inductor current are the state variables that determine the state of the
circuit. With the impedance Zt (s) from (4.9.1) and us (s) from (4.9.5) we find
us (s) (s + 2β)
is (s) = = (G + sC) uG (s) = us (s) (4.9.9)
Zt (s) L (s + γ)2 − ω12
us (s) Us 1 − e−sδT
uG (s) = = (4.9.10)
LC (s + γ)2 − ω12 sLC (1 + e−sT /2 ) (s + γ)2 − ω12
4.9.4 Evaluation of the conductance (=capacitor) voltage

To transform the voltage to the time domain
−sT /2
we have
2 the poles of uG (s), i.e. the zero’s
to find
2
of the denominator, Z(s) = 1 + e (s + γ) − ω1 . The poles are: sk = −jωk, with
k = 1, 3, 5, 7...: s1 = −γ − ω1 and s2 = −γ + ω1 .
The derivative of the denominator is:

Z 0 (s) = −T /2e−sT /2 (s + γ)2 − ω12 + 1 + e−sT /2 2 (s + γ)
150 / 274 
Odd harmonics of PWM square wave Even harmonics of PWM square wave
100 100
90 90
80 80
70 70
60 60
amplitude [%]
amplitude [%]
50 50
40 40
30 30
20 20
10 10
0 0
0 10 20 30 40 50 0 10 20 30 40 50
dutycycle [%] dutycycle [%]
figA3
Figure 4.9.3: Harmonics of a pulse width modulated square wave as a function of the duty cycle
δ.
 151 / 274
and with the values of the poles inserted:

Z 0 (sk ) = T /2 (−jωk + γ)2 − ω12

Z 0 (s1 ) = 1 + e(γ+ω1 )T /2 (−2ω1 )

Z 0 (s1 ) = 1 + e(γ+ω1 )T /2 2ω1
With three poles there are three terms:

Us X∞ 1 1 − ejωkδT e−jωkt
uG (t) = 2 Re
LC 0 −jωk T /2 (−jωk + γ)2 − ω 2
1

Us 1 − e(γ+ω1 )δT e−(γ+ω1 )t
+ (4.9.11)
LC (γ + ω1 ) 2ω1 (1 + e(γ+ω1 )T /2 )

Us 1 − e(γ−ω1 )δT e−(γ−ω1 )t
+
LC − (γ − ω1 ) 2ω1 (1 + e(γ−ω1 )T /2 )
The first term represents the steady state voltage and is used to determine the harmonics of
the lamp voltage. The expression for the k th term in the series expansion will be
s
2Us 2 − 2 cos 2πδk
ûlak = sin(ωkt − ϕk )
πkLC 4γ ω k + (γ 2 − ω12 − ω 2 k 2 )2
2 2 2
The second and third term will vanish for t → ∞ and represent turn-on.
We want, however, a closed form of the steady state lamp voltage. It can be obtained by
subtracting the switching terms of (4.9.11) from the total waveform. Because in the steady state
only one period and often even one half period is sufficient to calculate the waveform, it will
suffice in this case, where here is no asymmetry, to transform the first half period.
Terms with t ≥ T /2 may be omitted because they describe events that happen after t = T /2.
Equation (4.9.10) changes into
Us 1 − e−sδT
uG (s) =
sLC (s + γ)2 − ω12
(4.9.12)
Us 1 − e−sδT 1 γ + ω1 1 γ − ω1 1
= − +
LC γ 2 − ω12 s 2ω1 s + γ − ω1 2ω1 s + γ + ω1
By fractional expansion it is easily transformed in the time domain but remember this is only
valid for t ≤ T /2. It is now necessary to divide this transformation in two parts:
• first for 0 < t < δT because then the term e−sδT is not used,
• second for δT < t < T /2 but then be aware that the transformation of (1 − e−sδT )/s yields
zero in the time domain.
152 / 274 
The voltage uG when 0 < t < δT

The total voltage in the time domain will be derived from (4.9.12) omitting e−sδT :

Us γ + ω1 −(γ−ω1 )t γ − ω1 −(γ+ω1 )t
uG (t) = 1− e + e (4.9.13)
LC (γ 2 − ω12 ) 2ω1 2ω1
After subtraction of the switching terms of (4.9.11) we find the closed expression
uG1 (t) =

Us γ − ω1 e(γ+ω1 )(T /2−t) + e(γ+ω1 )(δT −t) γ + ω1 e(γ−ω1 )(T /2−t) + e(γ−ω1 )(δT −t)
1+ −
1 + RG 2ω1 1 + e(γ+ω1 )T /2 2ω1 1 + e(γ−ω1 )T /2
(4.9.14)
The voltage uG2 when δT < t < T /2

The total voltage in the time domain will be derived from (4.9.12) while (1−exp(−sδT ))/s → 0

Us γ + ω1 (γ−ω1 )δT
−(γ−ω1 )t γ − ω1 (γ+ω1 )δT
−(γ+ω1 )t
uG (t) = − 1−e e + 1−e e
1 + RG 2ω1 2ω1
(4.9.15)
After subtraction of the switching terms of (4.9.11) we find:
uG2 (t) =
( )
(γ+ω1 )(T /2−t) (γ+ω1 )δT (γ−ω1 )(T /2−t) (γ−ω1 )δT
Us γ − ω1 e 1 − e γ + ω1 e 1 − e
(γ+ω )T /2
−
1 + RG 2ω1 1+e 1 2ω1 1 + e(γ−ω1 )T /2
(4.9.16)
By substitution we verify that uG1 (δT ) = uG2 (δT ) and uG1 (0) = −uG2 (T /2) and the lamp
voltage is continuous.
Power in the load

The power is obtained by integration of u2 G and results in
Z Z Z
2 T /2 2 2 δT 2 2 T /2 2
PG (δ) = uG (t)Gdt = uG (t)Gdt + uG (t)Gdt =
T 0 T 0 T δT
Us2 G2δ Us2 GLC
+ ·
(1 + RG)2 (1 + RG)3 (cosh ω1 T /2 + cosh γT /2)

1
γ 2 + 3ω12 (− sinh ω1 T (1/2 − δ) · cosh γδT + sinh ω1 δT · cosh γT (1/2 − δ) + sinh ω1 T /2}
ω1 T

1 2 2

+ 3γ + ω1 {sinh γ (T /2 − δ) · cosh ω1 δT − sinh γδT · cosh ω1 T (1/2 − δ) − sinh γT /2}
γT
(4.9.17)
 153 / 274
4.9.5 Equations for square wave operation

It is now simple to derive the square wave equations by putting δ = 0, 5.
Us
uG (t) = ·
1 + RG
 
γ γ
eγT /2 cosh ω1 t + ω1
sinh ω1 t + cosh ω1 (t − T /2) + ω1
sinh ω1 (t − T /2)
1 − e ×−γt 
cosh γT /2 + cosh ω1 T /2
(4.9.18)
Z ( )
2 T /2
Us2 G (γ 2 + 3ω12 ) sinh ω1 T /2
ω1 T /2
− (3γ 2 + ω12 ) sinh γT /2
γT /2
PG = u2c (t)Gdt = 1+
T 0 (1 + RG)2 (γ 2 − ω12 ) (cosh ω1 T /2 + cosh γT /2)
(4.9.19)
For the square wave the supply current is has been calculated. We discover the current of the
inductance as being the first part of equation (4.9.20) by comparing with (4.9.18) and conclude
that the second part must be the capacitance current.
γT /2 1
Us −γt e ω1
sinh ω1 t + ω11 sinh ω1 (t − T /2) Us G
is (t) = e + ·
L cosh γT /2 + cosh ω1 T /2 1 + RG
 
eγT /2 cosh ω1 t + ωγ1 sinh ω1 t + cosh ω1 (t − T /2) + γ
ω1
sinh ω1 (t − T /2)
1 − e−γt × 
cosh γT /2 + cosh ω1 T /2
(4.9.20)
By integrating i2s R the power that is lost in R will be

Z T /2
2 Us2 R
PR = i2s (t)Rdt = ×
T 0 (1 + RG)2
 n o n o 
2 2 L2 G2 sinh ω1 T /2 2 2 L2 G2 sinh γT /2
−1 − RG + (γ + 3ω ) + 1 + RG − (3γ + ω )
G2 + C ×
1 1+RG ω1 T /2 1 1+RG γT /2

L (cosh γT /2 + cosh ω1 T /2)
(4.9.21)
4.10. LITERATURE on FLUORESCENT HALF BRIDGE LAMP

CIRCUITS since 1992
Abbreviations:
154 / 274 
BIBLIOGRAPHY
EB electronic ballast
HF high frequency
FL fluorescent lamp
APEC Applied Power Electronics Conference (IEEE)
EPE European Power Electronics Conference
IA Industrial Applications (IEEE Transactions)
IE Industrial Electronics (IEEE Transactions)
IEE Institute of Electrical Engineers (UK)
IES Illuminating Engineering Society
PE Power Electroics (IEEE Transactions)
PESC Power Electronics Specialists Conference (IEEE)
Bibliography
[1] J.H.M. Achten. Low pressure mercury lamps and half bridge inverters. Master’s thesis,
Eindhoven University of Technology, 1992.
[2] A.K.S. Bhat and C. Wei-qun. Analysis, selection and design of resonant inverters for eb.
IEEE PESC, pages 796–804, 1994.
[3] M.C. Cosby and R.M. Nelms. A resonant inverter for eb applications. IEEE Trans. PE,
8(4):386–395, august 1994.
[4] J. Donahue and M. Jovanovic. The lcc inverter as a cold cathode fl driver. IEEE APEC,
pages 427–433, 1994.
[5] M.K. Kazimierczuk and W. Szaraniec. Eb for fluorescent lamps. IEEE Trans. PE, 8(4):386–
395, october 1993.
[6] P.J.M. Smidt, J.L. Duarte, and J. Rozenboom. About the modulation phenomenon in
dimmable fl ballasts. Master’s thesis, Eindhoven University of Technology, 1995.
[7] Yiyoung Sun. Pspice modeling of electronically ballasted compact fl systems. IEEE IAS,
pages 2311–2316, 1993.
[8] D. Tadesse, F.P. Dawson, and S.B. Dewan. A comparison of power circuit topologies and
control techniques for a hf ballast. IEEE IAS, pages 2341–2347, 1993.
[9] T.F. Wu, T.H. Yu, and H.M. Huang. Complete analysis and performance characteristic
compromise for self excited half bridge parallel resonant eb. IEEE PESC, pages 124–129,
1994.
[10] T.F. Yu, H.M. Huang, and T.F. Wu. Self excited half bridge series resonant parallel loaded
fl eb. IEEE APEC, pages 657–664, 1995.
[11] T.H. Yu, L.M. Wu, and T.F. Wu. Comparisons among self-excited parallel resonant, series
resonant and current-fed push pull eb. IEEE APEC, pages 421–426, 1994.
 155 / 274
156 / 274 
5
AC-DC
extra info about ACDC

Power factor, cos ϕ and Distortion
5.1. Introduction
The theoretical definition of terms like RMS value, power, phase-shift, power factor and distor-
tion is readily available. In many cases, however, these terms are used carelessly as illustrated
by the following examples:
• alternating current voltage, AC voltage when alternating voltage is meant
• power, active power, apparent power, reactive power, distortion power; where power means
average power
• a power company delivers energy
• true RMS meter, this is a true ”RMS meter” and not a ”true RMS” meter
It is therefore useful to repeat the definitions (from [1,2,3]) assuming the case of a variable supply
current without any direct current component but with a periodic sinusoidal or a periodic non-
sinusoidal waveform, both with the system frequency as the fundamental frequency. In all cases
it will be assumed that the system voltage be a sine wave of the fundamental frequency. It will
be used as reference for the time scale.
5.2. Definitions regarding alternating waveforms with one angular

frequency ω
Voltage:
√
u(t) = U 2 sin ωt (5.2.1)
157
Chapter5 AC-DC
Current:
√
i(t) = I 2 sin(ωt + ϕ) (5.2.2)
where u(t) and i(t) are instantaneous values, U and I are RMS values, ω is the angular frequency
of the supply and ϕ is the phase shift between voltage and current determined by the load. The
angular frequency ω is related to the normal frequency f and the period T of the waveform by
ω = 2 · π · f = 2π/T . The RMS value is by definition:
s
Z
1 T
RMS value = (instantaneous value)2 dt (5.2.3)
T 0
if the instantaneous value changes with time in such a manner that after time T the same wave-
form is repeated. An alternating voltage crosses zero at least twice during one period. When
this does not happen we call it a direct waveform, with various degrees of ripple. The power in
a resistive load caused by a given direct voltage or current is equal to the power caused by an
alternating voltage or current, with the same RMS value. The instantaneous power is given by
p(t) = u(t) · i(t) (5.2.4)
and varies with time. During every small time interval dt an amount of energy dE = p(t)dt is
consumed. What we usually call power is the energy integrated over one period T and divided
by T , the average power:
Z Z
1 T 1 T
P = p(t)dt = u · idt (5.2.5)
T 0 T 0
With (5.2.1) and (5.2.2) we find after integration
P = U · I · cos ϕ (5.2.6)
By analogy other power quantities have been defined arithmetically: The reactive power:
Q = U · I · sin ϕ
the apparent power:
S =U ·I
and
S 2 = P 2 + Q2
They have no physical meaning. When used in conjunction with these quantities the average
power is sometimes called the active power. The power that is necessary for generation, trans-
portation and conversion of energy is often called loss. There are resistive as well as magnetic
and dielectric losses.
158 / 274 
5.3 Definitions regarding distorted waveforms
5.3. Definitions regarding distorted waveforms

Distortion in power circuits is present where the waveforms of current and/or voltage differ from
the sinusoidal waveform. In this chapter only periodic waveforms with the system frequency as
fundamental will be considered. The supply system has the properties of a voltage source. The
voltage waveform will change but only a little. It happens e.g. when a distorted current flows
through the systems impedance. The current waveform on the other hand can be very distorted
by nonlinear loads, e.g. gas discharge lamps or rectifiers. The Fourier series expansion shows:
∞
X √
u(t) = Un 2 sin (nωt − ψn ) (5.3.1)
n=0
∞
X √
i(t) = In 2 sin (nωt − ϕn ) (5.3.2)
n=0
For periodic non-sinusoidal voltage and current the active power is

X∞
P = P 0 + P1 + Pn (5.3.3)
2
Because the distortion of the voltage is much less than of the current the voltage waveform will
be approximated by a sine wave of the fundamental frequency. Direct current and voltage will
be neglected, hence Po = 0. Definitions, often expressed with RMS values, are:
the total current:
Is2 = I12 + I22 + I32 + . . . + In2 (5.3.4)
the distortion component or harmonic content:

2
Idis = I22 + I32 + . . . + In2 (5.3.5)
the distortion factor1 , (total) harmonic factor2 :
Idis
DF = k = (5.3.6)
Is
the total harmonic distortion3

Idis
T HD = (5.3.7)
I1
1
IEEE Standard Dictionary
2
IEC 50 (161-02-23)
3
The Elect. Eng. Handbook, Richard C. Dorf, IEEE / CRC PRESS Obs. Sometimes an other definition for THD
is used: T HD = Idis /Is ,Canadian Standard CSA C22.2
 159 / 274
Chapter5 AC-DC
the displacement power factor:
DP F = cos ϕ1 = λ1 (5.3.8)
the circuit power factor4 (assuming Us is undistorted):

active input power U1 I1 cos ϕ1
PF = λ = = (5.3.9)
Us Is Us Is
the crest factor
îs
cf = (5.3.10)
Is
the form factor:
RMS value
= (5.3.11)
average value
5.4. Regulations and requirements
5.4.1 General
An extensive survey of terms, measurements and requirements can be found in the IEC publi-
cation 1000. Applicable to low power equipment (< 16A) is the IEC 1000-3-2, from which the
next table has been composed.
Table 5.4.1: Harmonic current limit classes.
Class Description
A Balanced three phase equipment and all other equipment,
except that stated in one of the following classes
B Portable tools
C Lighting equipment, including dimming devices
D Equipment having a special waveshape and an active input
power P < 600W; max. value see class A (table 5.4.2)
For applications: use the original publication

λ = circuit power factor, eq. (5.3.9)
4
IEC 1000-3-2 (3.12) There are two ways to express the amount of distortion in a waveform:
1. By specification of the amplitudes (in RMS values) of every harmonic, example: the IEC 1000 standard
2. By means of THD or k, calculated from the RMS values Is , I1 and Idis .
160 / 274 
5.5 Application to magnetic ballast circuits for gas discharge lamps
Table 5.4.2: Harmonic current limits.
Harmonic Class A (A) Class B (A) Class C (%) Class D (mA/W)

order (n) absolute limit
see Class A
2 1,08 1,62 2
3 2,30 3,45 30×λ 3,4
5 1,14 1,71 10 1,9
7 0,77 1,16 7 1,0
9 0,40 0,60 5 0,5
11 0,33 0,50 3 0,35
13 0,21 0,32 3 0,30
15≤n≤39 0,15×15/n 0,23×15/n 3 3,85/n
5.4.2 Example of THD and DF

The requirements given above are easily transformed into THD and DF figures. If we choose
class C limits and operate at λ = 1, with maximum allowable values of the odd harmonics:
%T HD = 32, 8%%DF = 34, 8% It is, of course, impossible to return to individual harmonic
values from THD and DF.
5.5. Application to magnetic ballast circuits for gas discharge

lamps
5.5.1 Description of a ballast circuit

The lamp current has to be stabilized because of the negative slope of the VI characteristic i.e.
if the lamp current decreases the lamp voltage will increase and vice versa. With the system
voltage as a voltage source we need a series impedance to stabilize the lamp current. To prevent
excessive power loss an inductor will be used as lamp ballast. At the system frequency this is a
heavy (copper-iron) magnetic ballast. The circuit, however, is very simple, see figure 5.5.1.
Examples of the waveforms obtained with these circuits are given in figure 5.5.3 and figure
5.5.4.
It appears that the lamp voltage waveform is much distorted and when measuring the lamp
voltage (RMS), lamp current (RMS) and lamp power we find
Pla
= αla 6= 1 (5.5.1)
Ula Ila
In this manner the distortion of the lamp voltage can be described by a lamp power factor called
αla measured at the normal operating point. The lamp circuit now can be designed by calculating
 161 / 274
Chapter5 AC-DC
Is L Is L Ila
C
Us Ula Us Ula
Figure 5.5.1: Simple ballast circuit.
Figure 5.5.2: Ballast with power factor correction.
only with sine waves. This ”calculation model” has been used conventionally, supported by the
available RMS measurements of that time and by voltage and current phasor diagrams.
A second ”model” makes use of a sinusoidal supply and a square lamp voltage. It explains
the generation of harmonics much better than the first model. However, the circuit design uses
more arithmetic and less visualization than the phasor diagrams are giving.
A short survey of both models will follow.
Sine wave model

The first model regards the lamp voltage and current to be in phase and behave as sine waves of
the system frequency. The inductor is determined by
p
Us2 − Ula2
ωL = (5.5.2)
Ila
cos ϕ correction
One application of the phasor diagram is to determine the value of a capacitance used to com-
pensate the phase lag of the current. It is connected directly to the system terminals. When a
current Ila sin ϕ flows, the system current will decrease to Ila cos ϕ and will be in phase with the
system voltage. The capacitance is calculated from
ωCUs = Ila sin ϕ (5.5.3)
The power factor, however, will never reach λ = 1 because the compensation only affects the
fundamental frequency component of the current and not the higher harmonics, generated by the
non-linear lamp voltage.
Example: The lamp data Ula = 100V, Pla = 40W, αla = 0.9; the system voltage Us = 230V,
f = 50Hz. The lamp current is determined by (5.5.1) Is = 444mA. The inductance, from (5.5.2),
will be L = 1.48H. The phase lag of the current cos ϕ = 0.39 and ϕ = 67◦ . With compensation
the system current equals Is = Ila cos ϕ = 174mA. The compensating capacitance, from (5.5.3),
C = 5.654µF.
162 / 274 
500V
Us
Il
a
Ul
a
-500V
2 ms/div.
500V
Us
Il
a
Ul
a
-500V
2 ms/div.
Figure 5.5.3: Waveforms: supply voltage and lamp voltage (100V/div) and lamp current (0.5A/-
div) 70 W HPS lamp, upper after 100 hrs, lower after 18.000 hrs.
 163 / 274
Chapter5 AC-DC
500V 0,5A/div.
Us
Il
Ul a
a
-500V
2 ms/div.
500V 0,5A/div.
Us
Il
a
Ul
a
-500V
2 ms/div.
Figure 5.5.4: Waveforms: supply voltage and lamp voltage (100 V/div) and lamp current (0.5A/-
div) fluorescent lamps, upper TL 40 thick lamp, lower TLD 36 thin lamp.
164 / 274 
Us UL
ϕ Is IC
ϕ
U La I la
Figure 5.5.5: Voltage diagram.
Figure 5.5.6: Current diagram.
Square wave lamp voltage model

The square wave lamp voltage together with the sine wave of the system voltage are given in
figure 5.5.7. The lamp voltage waveform is approximated by a square wave voltage source.
The loss resistance of the inductance will be neglected. The current from the mains through
inductance and lamp can be determined by using the superposition principle. Because of the
symmetry only one half period with length T /2 is sufficient to describe the waveforms.
With the lamp voltage equal to zero, a current i1 = ωL ûs
sin(ωt − π2 ) flows and i2 = ULla t
flows when the supply voltage is equal to zero. The latter is part of a triangular waveform with
crest values ±î2 = ULla T4 = π2 UωL
la
. The inductor voltage uL = us − ula and the circuit current
is = i1 − i2 .
ûs Ula
is = (cos ωt1 − cos ωt) − (t − t1 ) (5.5.4)
ωL L
At t = 0 the sine wave of the supply voltage crosses zero in the positive direction, at t = t1 the
square wave of the lamp voltage does the same. The circuit current and the lamp voltage have
the same sign, this is assumed as being a lamp property. The half period under consideration
thus starts at t = t1 and ends at t = t1 + T /2 = t1 + π/ω. It results in the boundary conditions
is (t1 ) = 0 and is (t1 + π/ω) = 0 and t1 is given by
π Ula
cos ωt1 = (5.5.5)
2 ûs
 165 / 274
Chapter5 AC-DC
I1 (blue) = mains component, I2 (magenta) = lamp component, I3 (red) = difference Supply and lamp voltage
0.8 400
0.6 300
Us
0.4 200
Ula
0.2 100
current [A]
voltage [V]
0 0
-0.2 -100
-0.4 -200
-0.6 -300
-0.8 -400
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
time [ms] time [ms]
fig3.4
Figure 5.5.7: Supply voltage and lamp voltage, The current i1 − i2 equals the total current is .
The combination of (5.5.4) and (5.5.5) gives

ûs Ula π
is = − cos ωt − ωt − ωt1 − (5.5.6)
ωL ωL 2
The RMS value of the circuit current is found by integration over one half period
R t + T ûs 2
Is2 = T2 t11 2 ωL cos ωt + ULla t − t1 − T4 dt
q (5.5.7)
1 2
Is = ωL Us2 − Ula2 2 − π12
During the half period the lamp voltage equals +Ula and the power can be calculated by integra-
tion
T r
2 t1 + 2 Ula 8 2
Pla = ∫ Ula is dt = 2
Us − Ula2 (5.5.8)
T t1 ωL π
Example of a circuit with phase shift and distortion.
For the same lamp data Ula = 100V, Pla = 40W and a system voltage of Us = 230V and
frequency of 50Hz (ω = 2π50), we find with (5.5.8) ωL = 453Ω and L = 1.44H. The total
system current, inclusive distortion, comes from (5.5.7) and results in Is = 448mA, which gives
a power factor of λ = 0.39, however, cos ωt1 = 0.48 and t1 = 3.4ms.
cos ϕ correction and distortion of the system current

The system current and its distortion is only found when we expand the triangular current, intro-
duced as i2 . The Fourier series
( )
8 h π i sin 3 ω (t − t1 ) − π2 sin 5 ω (t − t1 ) − π2
· î2 · sin ω (t − t1 ) − − + + ... (5.5.9)
π2 2 9 25
166 / 274 
5.6 Application to the electronic power supply
with î2 = πUla /(2ωL). The fundamental current, isI = i1 − i2I , the latter being the first term of
(5.5.9).
ûs π 8î2 h πi
lisI = i1 − i2I = sin ωt − + 2 sin ω (t − t1 ) −
ωL 2 π 2 (5.5.10)
ûs 4 Ula
=− cos ωt + cos ω (t − t1 )
ωL π ωL
With data of the example this results in IsI = 447mA and cos ϕI = 0.39. In a compensated
circuit the capacitance can be determined as C = 5.7µF which accounts for a lower system
current of 174mA. It is clear that the difference between the two models is too small to reject the
first. Because the first method is much easier in use the second is never used to design a proper
circuit. However, the second method gives us, using the data of the example, an approximation
of the harmonics as listed in table 5.5.15 .
Table 5.5.1: Harmonic current limit classes.
harmonic current (mA) of the tri- percentage in relation percentage in relation

numbers angular wave to the system current to the compensated sys-
with only an inductor tem current
I 199 447 mA ≡ 100 174 mA ≡ 100
III 22.1 5.0 <11.7 12.6 <30
V 8.0 1.8 <10 4.6 <10
VII 4.0 0.9 < 7 2.3 < 7
IX 2.5 0.5 < 5 1.4 < 5
Idis = 24 mA THD ≈ DF = 5.4% THD = 13.8%
DF = 13.6%
5.6. Application to the electronic power supply
5.6.1 General
Most electronic appliances have to be connected to the alternating voltage distribution system
for the energy they need. Common values are voltages between 100V and 400V and frequencies
of 50Hz or 60Hz. For nearly every application the alternating voltage has to be converted into
a direct voltage because of the unilateral devices used as switches like thyristors, transistors
and diodes. Transformation and regulation does not only handle voltage and current but also
frequency. The output power is not only electrical but also heat, light, mechanical. For this
purpose all electronic appliances have a AC-DC converter at the input.
5
The figures in table 5.5.1 after < are requirements from IEC 1000-3-2.
 167 / 274
Chapter5 AC-DC
The most economic and simple circuits use diodes for rectification and a buffer capacitor to
smooth the half sine waves that result from rectifying a sinusoidal alternating voltage. Examples
are given in figure 5.6.1. The first and most simple is the circuit with only one diode. It causes a
direct current in the distribution system and for that reason will not be allowed. The last circuit
is used when the input voltage is low, < 150V, and the required output direct voltage has to be at
least 200V.
The four diodes bridge circuit is the most commonly applied rectifier. Until about twenty
years ago electronic engineers did only consider the quality of the direct output voltage, mainly
the ripple and voltage fluctuations. With the number of electronic appliances steadily increasing
it became necessary also to take into account the quality of the current waveform. The voltage
waveform of the distribution system was becoming seriously distorted by the current pulses of
rectifier circuits. The electricity suppliers observed an increase in the system power loss and,
most inconvenient, instabilities due to higher harmonics in the system.
D D 1 ...D 4
+ + Un + +
Ub Ub D1 C1 Ub
Un + Un +
C C
Rb Rb - Rb
C2
- -
D2
- - -
I circuit diagram
Un Un Un
0 0 0
0 π 2π 3π ωt 0 π 2π 3π ωt 0 π 2π 3π ωt
II system voltage
Ub Ub
In In U c1
0 0
0 π 2π 3π ωt 0 π 2π 3π ωt 0 wt 1 wt 2 π 2π 3π ωt
III output voltage w ithout capacitor U c2
Ub Ub
U b=
U c1 -
0 0 U c2
0 wt 1 wt 2 π 2π 3π ωt 0 wt 1 wt 2 π 2π 3π ωt
IV output voltage w ith capacitor 0
ωt
In In In
0 0 0
0 wt 1 wt 2 π 2π 3π ωt 0 wt 1 wt 2 π 2π 3π ωt 0 wt 1 wt 2 π 2π 3π ωt
V output and system current
Figure 5.6.1: Examples of rectifier topologies.
5.6.2 Model of a rectifier circuit

A model of the four diode bridge rectifying circuit is obtained by dividing it into two parts a
and b as given in figure 5.6.2. During part a energy is delivered by the system to the load Rl
and the capacitor Cl . During part b the capacitor delivers some of its energy to the load Rl . In
168 / 274 
Rs
u^ sin t Cl Rl Cl Rl
Figure 5.6.2: (a) Circuit from ωt1 to ωt2 , (b) Circuit from ωt2 to π + ωt1 .
addition the waveforms define the time t1 and t2 . We will use the duration of the current pulse
t2 − t1 = ∆t.
ω∆t
ωt 1 ωt 2 π + ωt1
a b
Figure 5.6.3: Waveforms. The diodes conduct during ∆t, block during T /2 − ∆t.
The amplitude of the voltage ripple will change as a function of the capacitance and the load.
Low ripple will result in a short and big current pulse i.e. the harmonics will increase.
5.6.3 Formulation of the current pulse

With r = (Rs + Rl )/Rs and τ = Rl Cl
is (t) = Rs (r2û+ω
s
2τ 2) ×
" n −r(t−t1 )
o #
{(r + ω 2 τ 2 ) sin ωt1 + ωτ (r − 1) cos ωt1 } × cos ω (t − t1 ) − e τ + (5.6.1)
2 2
{ωτ (r − 1) sin ωt1 + (r + ω τ ) cos ωt1 } × sin ω (t − t1 )
This expression is valid for t1 ≤ t ≤ t1 + ∆t, first observation gives i(t1 ) = 0. There are two
unknown quantities, t1 and ∆t, for the determination of which two expressions have to be found.
The first is obviously given by the fact that i(t1 + ∆t) = 0. This condition looks as follows
n −r∆t
o
{(r + ω 2 τ 2 ) sin ωt1 + ωτ (r − 1) cos ωt1 } · cos ω∆t − e τ +
(5.6.2)
{ωτ (r − 1) sin ωt1 + (r + ω 2 τ 2 ) cos ωt1 } · sin ω∆t = 0
The second condition follows from the capacitor voltage, at t = T /2 + t1 it has the same level
as at t = t1 . This gives
∆t−T /2
sin ωt1 = e τ sin ω (t1 + ∆t) (5.6.3)
 169 / 274
Chapter5 AC-DC
After some iterative calculations these two equations result in the desired values of t1 and ∆t.
5.6.4 Examples
To illustrate what can be shown with the equations above, two examples have been calculated,
for 20W and 100W e.g. a compact lamp (CFL) and a television set (TV). The impedances have
been chosen in accordance with existing circuits. The results have been given in the next table:
Table 5.6.1: 20W and 100W load impedances.
Graph Power Series re- Capacitor Load pulse pulse

sistance resistance starts at t1 width ∆t
A1 20W 5Ω 5µF 3990Ω 2.46ms 3.07ms
A2 20W 5Ω 10µF 4520Ω 3.16ms 2.12ms
A3 20W 5Ω 20µF 4860Ω 3.67ms 1.53ms
B1 100W 2,5Ω 220µF 998Ω 4.00ms 1.49ms
B2 100W 5Ω 220µF 976Ω 3.87ms 1.85ms
B3 100W 10Ω 220µF 940Ω 3.68ms 2.32ms
The current pulses are given in the figure 5.6.4 and figure 5.6.5. The harmonic amplitudes
are given in the figure 5.6.6 and figure 5.6.7 in relation to the first or fundamental harmonic. The
relative amplitudes do not change if more of the same appliances are connected to the system.
With different kinds of appliances combined it will, however, be different, because the phase of
each harmonic has to be taken into account when adding their values. This has been given in
figure 5.6.8 and figure 5.6.9 and shows a relatively lower value for the third, fifth, seventh and
ninth harmonic.
The calculations have been compared with measurements. The waveform shown in figure
5.6.10 is comparable with A2 from figure 5.6.4
5.6.5 The displacement power factor DPF

There is one more question: what value has cos ϕ? The proper notation is cos ϕ1 , because only
waveforms of the same frequency can be compared in phase. The current pulses in the figure
5.6.4 and figure 5.6.5 do not show clearly whether the fundamental component of the current is
in phase with the supply voltage. Calculation will show that the 50Hz component of the current
leads the voltage, see table 5.6.3.
5.6.6 Large installations

Large numbers of the same kind of appliance may occur in lighting installations but also in
laboratories (measuring instruments) and offices (personal computers). Two examples will be
170 / 274 
Current pulse with 23.7 Watt circuit

0.8
0.7
0.6
0.5
Icharge [A]
0.4
0.3
0.2
0.1
-0.1
2 2.5 3 3.5 4 4.5 5 5.5 6 6.5
time [ms]
fig3.4
Figure 5.6.4: Current pulses for 20W circuits.
Current pulse with 112.6 Watt circuit

3.5
2.5
2
Icharge [A]
1.5
0.5
-0.5
2 2.5 3 3.5 4 4.5 5 5.5 6 6.5
time [ms]
fig3.4
Figure 5.6.5: Current pulses for 100W circuits.
 171 / 274
Chapter5 AC-DC
Harmonics
100
90
80
70
60
%→
A3
50
A2
40
A1
30
20
10
0 2 4 6 8 10 12 14 16 18 20
n→
fig3.4
Figure 5.6.6: Harmonics of the 20W circuits.
Harmonics
100
90
80
70
60
%→
50
40 B3 B2 B1
30
20
10
0
0 2 4 6 8 10 12 14 16 18 20
n→
fig3.4
Figure 5.6.7: Harmonics of the 100W circuits.
172 / 274 
Harmonics
100
90
80
70
A2
60
%→
50 5*A2+B2
40 B2
30
20
10
0
0 2 4 6 8 10 12 14 16 18 20
n→
fig3.4
Figure 5.6.8: Harmonics of the combination of five 20W and one 100W circuit, compared with
the separate values.
Harmonics
100
90
80
70
60
%→
50
40
30
A2
20
B3
10 5*A2+B3
0
0 2 4 6 8 10 12 14 16 18 20
n→
fig3.4
Figure 5.6.9: Harmonics of the combination of five 20W and one 100W circuit, compared with
the separate values.
 173 / 274
Chapter5 AC-DC
Current pulse and mains voltage

1
0.8
0.6
0.4
0.2
Un, In [a.u]
-0.2
-0.4
-0.6
-0.8
-1
0 2 4 6 8 10 12 14 16 18 20
time [ms]
fig3.4
Figure 5.6.10: Current pulses from the system in a 20W electronic fluorescent lamp with a series
resistor of 4.7Ω and a buffer capacitor of 11µF. vert: 100V/div; 0.2A/div, hor: 2ms/div.
Table 5.6.2
harmonic lamp-circuit required

numbers for
P > 25W
I 100%
III 92% < 17
V 77% < 10
VII 59% <7
IX 41% <5
λ = 0.57
174 / 274 
BIBLIOGRAPHY
Table 5.6.3
pulse time shift phase shift cos ϕI II Is ϕ (rad) THD

A1 -1.5ms -.46rad -27◦ 0.89 96mA 141mA 0.61 108%
A2 -1.1ms -.35rad -20◦ 0.94 93mA 161mA 0.54 141%
A3 -.75ms -.24rad -14◦ 0.97 90mA 181mA 0.48 174%
B1 -.32ms -.10rad - 6◦ 0.995 439mA 895mA 0.49 178%
B2 -.25ms -.08rad - 4◦ 0.997 446mA 810mA 0.55 152%
B3 -.19ms -.06rad - 3◦ 0.998 451mA 735mA 0.61 128%
given:
The first case is a lighting installation with 200 compact lamps of the type A2 from the
previous example. The rectifying circuit now has Rs = 5/200 = 0.025Ω and a capacitance
of Cl = 200 · 10µF and a load resistance of Rl = 4520/200 = 22.6Ω.The system internal
impedance will not change and remains 0.46Ω. It has to be added to the series resistance and
has great influence. The current pulse waveform is given in figure 5.6.11. The second case is a
mixed load of 100 20W circuits type A2 and 20 100W circuits type B2. This current waveform
has also been given in figure 5.6.11. The system voltage will now be seriously distorted as figure
5.6.12 shows.
Bibliography
[1] Iec 1000-3-2.
[2] Iec 50 (131 and 161).
[3] The authoritative dictionary of IEEE standard terms. IEEE Press, 7th edition, 2000.
 175 / 274
Chapter5 AC-DC
4 kW installations
80 0.8
60 0.6
current [A]
40 0.4
20 0.2
0 0
0 1 2 3 4 5 6 7 8 9 10
time [ms]
fig3.4
Figure 5.6.11: One lamp (A2) current pulse (green), 200 lamps (A2) current pulse (blue, solid)
and mixed load (100 A2, 20 B2) current pulse (blue, dotted).
System voltage distortion

350
300
250
200
V [Volt]
150
100
50
-50
0 1 2 3 4 5 6 7 8 9 10
time [ms]
fig3.4
Figure 5.6.12: System voltage distortion by current pulse load as given above (magenta lamp
load, red mixed load).
176 / 274 
6
Magnetic Components
6.1. Winding characteristics
6.1.1 Introduction
Contrary to components like resistors and capacitors, almost no standard pre-fabricated power
inductors and transformers exist. It is the responsibility of the designer to completely specify all
characteristics of these magnetic components.
Magnetic materials in the form of cores are available in many standard sizes and several
quality grades. For almost every core one or more suitable coil formers can be found in a manu-
facturer’s catalog [7].
Obviously, ferrite manufacturers design their materials so that they can be usefully applied
in many applications. In order to attract customers they provide thorough and in-depth product
information. Major manufacturers have a staff of application engineers to help designers make
correct choices and further optimize their designs.
Apart from the core material, a magnetic component consists of an accompanying coil former
filled with wire, forming “winding(s)”. Windings again consist of turns, packed in layers. The
wire can be solid round wire or so-called litze-wire, a bunch of thin inter-woven copper strands.
There is a performance difference between simply twisting a bunch of thin wires (“stranded-
wire”) and really interweaving them (“litze wire”).
As we shall see in this chapter, the winding configuration of a transformer has quite an in-
fluence on the losses, especially at high switching frequencies. The winding configuration is the
geometrical placing of the individual layers, e.g. secondary on top of primary, side–by–side, or
interleaved. For transformers with safety requirements the necessary spacing between layers and
windings can be quite large. Sometimes grounded screens are used between layers to influence
the EMC/EMI performance. For an inductor, evidently only one configuration is possible.
The winding configuration influences the thermal characteristics, parasitic capacitances and
leakage inductances of a magnetic component. The calculation of these effects is not discussed
here [14].
177
Chapter6 Magnetic Components
core
h w ha
coil former
bw
winding
ba
Figure 6.1.1: Dimensions needed for winding calculations.
Apart from the winding configuration, the choice of the wire’s size and type has a large
influence on the losses of a magnetic component. For low frequencies, large diameter wire has
the lowest loss but at high frequencies this becomes less and less clear. Standard tables list the
possible solid and litze wire sizes.
The design of magnetic components is inherently an optimization problem. This means that
in general, with only an electrical specification being given, there will be no unique solution. For
a given inductor (inductance L at current level I and sinusoidal excitation frequency Fs ) many
satisfactory combinations of material grade, core size, number of turns, wire diameter and wire
type exist. Only with additional requirements like ambient temperature range and component
size, or price, the number of possibilities will reduce sufficiently to make a reasoned choice.
6.1.2 Number of turns in a given area

Fig. 6.1.1 shows the maximum surface defined by the core: Awmax = ba ha . In this area the
coil former must fit, reducing the available winding area to Aw = bw hw . Depending on the
used winding technique a certain amount of copper can be fitted in the available space. The
ratio of copper area to Aw is called the filling factor, Fk = Acopper /Aw . We will see in the next
sections that at higher switching frequencies a restricted filling factor is unimportant. In practice
it never happens that the needed amount of copper does not fit in the available space. At lower
frequencies, e.g. 50 or 60 Hz distribution transformers, too low Fk becomes a problem and
special winding techniques are used to increase it.
6.1.3 DC resistance
The DC resistance of a wire with length lw and surface area Ad is given by
ρ lw
Rdc = . (6.1.1)
Ad
Here ρ is the specific resistance of the material, e.g. for copper ρ = 1.709 · 10−8 Ωm. In a
so-called “wire table” the resistance rdc of one meter wire at 20◦ C is found. The temperature
178 / 274 
6.2 Eddy current losses
=
>
Figure 6.2.1: Four turns from the same layer. Between two neighboring turns the magnetic field
cancels.
dependence of this resistance is shown in the following table:
Table 6.1.1
copper temperature (◦ C) 20 40 60 80 100

multiplication factor 1 1.08 1.12 1.24 1.31
For a given coil former the mean length of turn lwe is specified, so that we can conclude that
in case of a fully utilized winding area, lw = n lwe meters of wire are needed. In practice the full
Aw is not used at higher frequencies because of excessive proximity losses (see section 6.4), and
lwe is lower than quoted in the coil former data sheet. Distrust popular rules-of-thumb that state
that for a two winding transformer each winding should occupy 50% of the available winding
space–this rule is based on the assumption of using the full Aw .
6.2. Eddy current losses

An alternating magnetic field induces an alternating electric field into any conductor immersed
in it. This electric field in turn generates circulating alternating currents, which result in eddy
current losses because of the finite electrical resistance of the conductor. The above mentioned
alternating magnetic field is caused by currents circulating inside the conductor itself, and also
by currents circulating in nearby conductors. In the windings of a physical inductor both effects
are present. These loss mechanisms are modeled by an increase of the inductor’s DC resistance
with frequency.
Section 6.3 discusses the first mechanism, called the skin effect. This effect is caused by
currents circulating in the conductor itself. The conductor is assumed to be positioned in free
space, far away from other conductors. In an inductor or transformer winding, the conductors
are positioned close together and influence each other’s magnetic field. Fig. 6.2.1 shows how the
magnetic field of turns in a layer cancels out between the turns, leaving only a parallel component
 179 / 274
Flux
0 density
r
x
Figure 6.2.2: Magnetic field in a round conductor with diameter r, carrying a current I. Distance
from the conductor’s center is x. The magnetic field density as a function of x is expressed as
B = µ2πr
0 Ix
2.
between the layers. This is the second of the above mentioned mechanisms, the proximity effect,
and we discuss it in section 6.4.
6.3. Skin effect
6.3.1 Penetration depth ∆

There is a concentric magnetic field in and around a straight conductor carrying a homogeneous
alternating current, Fig. 6.2.2. This magnetic field induces counteracting eddy currents, shown in
Fig. 6.2.3, which push the magnetic field out of the conductor. These currents decrease the main
current in the center of the conductor but increase it at the surface. The higher the frequency,
the higher the induced voltage and therefore the counteracting eddy current is. The phenomenon
is described by Lenz’s law: the voltage v(t) induced by a changing flux Φ(t) is of the polarity
that tends to drive a current through the loop to counteract the flux change. At sufficiently
high frequency f only a thin sheet of current flows at the conductor’s surface. This so-called
penetration depth ∆ is defined as the distance into the material, measured from the surface,
where the incident electromagnetic field has decreased to 1/e its value at the surface:
r
ρg
∆= (6.3.1)
π µo µg f
In this equation the specific resistance ρg and magnetic permeability µg are material properties.
It is common practice to measure the conductor diameter d in terms of penetration depths. The
value d/∆ will prove to be an important quality measure in the following.
180 / 274 
6.3 Skin effect
eddy
currents
magnetic
flux
Figure 6.2.3: Eddy currents in a round conductor.
6.3.2 Skin effect factor F and resistance factor Fs

The skin effect was first extensively described by Butterworth [3]. The AC losses are modeled
by an equivalent resistance Rse , defined through the so-called skin effect factor F
Rse = F · Rdc , (6.3.2)
shown in Fig. 6.3.1 as a function of d/∆. For low frequencies F is small and only the DC
resistance is significant. Therefore the total resistance can be described as
Rac = Rdc + Rse = Rdc · (1 + F ) = Fs · Rdc , (6.3.3)
where Fs is the resistance factor for the skin effect, Fig. 6.3.1.
Example A gastight connection through glass, needed to connect to the electrodes

of gas-discharge lamps, is sometimes constructed from NiCrFe material. Compared
to copper, both the specific resistance ρg = 10−6 Ωm and magnetic permeability
µg = 1600 are much higher. For a length of 100 mm wire with a diameter of 0.6 mm
we find the figures found in table 6.3.1.
√
The penetration depth ∆ can be simply written as ∆ = k/ f where k is a temperature
dependent material constant; table 6.3.2 gives k for some well-known conductors.
For use in calculations with copper wire Fig. 6.3.2 shows penetration depth ∆ as a function
of frequency. The boundary value of the diameter, dg , above which we should consider the skin
effect starts at Fs = 1.2. At 25 kHz dg = 1.8 mm, at 125 kHz we have dg = 0.8 mm. The given
figures are correct for a single straight conductor. Inside a practical winding layer canceling of
the circular neighboring fields causes a considerably diminished skin effect. In Fig. 6.3.1 we see
 181 / 274
Table 6.3.1
Rdc (Ω) ∆(µm) d/∆ Fs Rac (Ω)

Cu 2.2 · 10−3 186 3.2 1.1 2.4 · 10−3
NiCrFe 350 · 10−3 36 17 4.5 1.6
Table 6.3.2
√
Material Temperature (◦ C) k (m · Hz)
20 0.0658
Copper 70 0.072
100 0.075
20 0.084
Aluminum 70 0.092
100 0.095
20 0.064
Silver 70 0.070
100 0.073
182 / 274 
6.3 Skin effect
10
( + 1(
1 d
Fs
4 ,
F
Fs
1
proximity effect
Gr
10 -1
Skin effect
10 -2
10 -3
10 -4
1 10 10 2
d
,
Figure 6.3.1: Skin effect factor F , resistance factor Fs and proximity effect factor Gr as a func-
tion of d/∆, from [3].
 183 / 274
mm mm
Penetration depth and boundary diameter

1 10
20°C
Boundary diameter
100°C
10-1 1
,
10-2 10-1
10 3 10 4 10 5 10 6 Hz
10 5 10 6 10 7 10 8 Hz
Frequency
Figure 6.3.2: Skin effect in round copper conductors. Penetration depth ∆ and boundary diame-
ter dg as a function of frequency.
that the effect is insignificant for d/∆ < 2. For d/∆ > 5 we can approximate Fs ≈ 41 (d/∆ + 1).
For still higher d/∆ we see Fs ≈ 41 d/∆. Using Rdc = (4 · ρg l)/(πd2 ) and equation 6.3.3 we find
r
l µ0 µg ρg f
Rac = . (6.3.4)
d π
This equation shows that an increase in wire diameter decreases the AC resistance caused by
the skin effect, although the quotient of AC resistance and DC resistance increases, Rdc ∞ d12
and Rac ∞ d1 . When we write (6.3.4) as
d 4ρg l d ρg l
Rac = Rdc · = 2
· = , (6.3.5)
4∆ πd 4∆ πd∆
then we see in Fig. 6.3.2 that all the current is flowing in a surface cylinder with depth ∆, because
π d∆ is exactly equal to the area of a ring with diameter d and thickness ∆.
It is possible to completely eliminate the skin effect by “weaving” thin insulated wires with
diameter 2∆. This “weaving” is to be understood as making sure that each individual wire moves
from the inside of the bundle to the outside and back again, as frequently as possible. This type
of, costly, wire is called litze wire. Litze is not used very often because in practice the so-called
proximity effect, caused by currents circulating in close-by turns, is far more important than the
skin effect. To prevent the proximity effect it proves sufficient to use a bundle of “twisted” wires
of a sufficiently small diameter.
184 / 274 
6.4 Proximity effect
d / , = 4 5 10 20
,
5
4
d/, Fs
20 5.5
3
10 2.8
7 2.0 2
5 1.5
4 1.3
3 1.1
1
Figure 6.3.3: Current density profile in a round copper conductor at several frequencies.
external
field
field due to
eddy currents
eddy
currents
Figure 6.4.1: Eddy currents in a conductor with an AC magnetic field perpendicular to its length.
6.4. Proximity effect
6.4.1 Foil windings

When an alternating magnetic field is present outside of the conductor under consideration, we
are confronted with the proximity effect. Note that proximity losses can occur in windings even
when no current is flowing in them (e.g. the secondary of a flyback transformer when the switch
is on). The outside magnetic field is mainly caused by other windings, but in some cases fields
generated by sharp discontinuities of the core material (e.g. the air gap) are important too. To get
a feeling for this effect, Fig. 6.4.1 shows a square conductor in an homogeneous external field.
With the skin effect we saw that the current was crowding at the outside of the conductor.
With the proximity effect the current crowds in two surface areas parallel to the direction of the
external field. It is seen that the two eddy currents add up in the center of the conductor, resulting
in extra losses.
We will show how the losses can be computed when it is allowed to consider a winding
 185 / 274
dx
^
x B sin Mt
h
2
l
b
Figure 6.4.2: Computation of eddy currents in a thin conductive sheet.
layer as a conductive sheet. The dimensions of this sheet of width b 1 and height h are given in
Fig. 6.4.2. √
The homogeneous AC magnetic field given by B = B̂/ 2 sin ωt is tangential to the sheet
surface. We introduce two very thin layers with thickness dx, forming a closed conductive loop
in which a voltage is being induced:
U = ωB 2x lw . (6.4.1)
The length of the sub-layers is lw . An eddy current flows into the sub-layer on top and back
through the bottom sub-layer (neglecting end effects.) The resistance of the so formed loop is
R = 2 ρg lw /(b dx). The corresponding losses are
U2 2 ω 2 B 2 lw b x2
dPe = = dx,
R ρg
or
Z h/2
2 ω 2 B 2 lw b ω 2 B 2 lw b h3
Pe = x2 dx = . (6.4.2)
ρg 0 12 ρg
The losses are greater when the field is not tangential to the layer. Because of additional
current crowding caused by the skin effect, the layer does not conduct over the full area but only
at the surface. This is accounted for by introducing an effective height
φ = h/∆. (6.4.3)
Fig. 6.4.3 shows three different inductors, each with five layers. The effective heights φ are 0.6,
2 and 8 respectively. The figure shows current density, losses and leakage field.
6.4.2 Round wire windings

The proximity effect does not only depend on wire diameter but also on the copper fill factor Fl
of each independent layer, as will be shown. Because it results in easier to handle mathematics,
186 / 274 
loss
veld
1
Fr
3000
2000
1000
137
50
25
-1
-2
-3
0
0
5
4
3
2
1
0
331
l yer
5a
rd
202
l yer
4a
rd
j= 8
105
l yer
3a
rd
j = 8
40
l yer
2a
nd
8
l yer
1a
st
100Fr
27.9
300
200
20
10
-1
-2
-3
0
0
5
4
3
2
1
0
66.
l yer
9
5a
rd
40.9
l yer
4a
rd
j= 2
21.
l yer
4
3a
rd
j = 2
8.4
l yer
2a
nd
1.9
l yer
1a
st
1.33
Fr
-1
-2
-3
2
0
5
4
3
2
1
0
1.82
l yer
5a
rd
1.49
l yer
4a
rd
= 0.6
1.25
l yer
3a
rd
D
h
j=
j = 0.59
1.09
l yer
2a
nd
1.01
l yer
1a
st
(a)
(b)
(c)
Figure 6.4.3: The proximity effect in three different windings, each with five layers. (a) C UR -
RENT DENSITY The full line gives |J|, the dashed and dotted lines its real and imaginary part
respectively. (b) L OSSES The full line shows the losses normalized to the square of the current
density. The dashed and dotted lines give the average over a layer and the average over five lay-
ers, respectively. Because of the normalization the amplitude is relative to the DC resistance, so
the lines can be interpreted as Fr . (c) L EAKAGE FIELD This is the integral of the current density.
The dashed and dotted lines show its real and imaginary parts, respectively.
 187 / 274
@ @ J
D J
Figure 6.4.4: Replacing a round conductor with a square one.
the standard literature applies the transformation shown in Fig. 6.4.4. The important parameters
in a layer are wire diameter d0 and pitch t. p
The indicated transformation results2 in a layer height h = d π/4 = 0.886 d We can now
view a layer as a sheet with thickness h and copper fill factor Fl , carrying a current nl times
higher than that of the single wire. The factor nl is the number of turns per layer. The leakage
field is the same as for the round wire layer, while the current density is Fl times higher. The
effective height of the new, square, conductor, is
r
hp d 4 dp
φ= Fl = Fl = 1.128379 Fl . (6.4.4)
∆ ∆ π ∆
√
Comparing ∆h of a sheet winding to ∆h √Fl of this round wire, it is obvious that the penetration
√
depth of the round wire has grown by 1/ Fl . Because ∆ is proportional with ρg (6.3.1), and
because an increase of ρ has the same effect as an increase of the current density, both have the
same effect on the voltage drop caused by series resistance.
Corresponding to paragraph 6.4.1, equation 6.4.2, after considerable mathematical manipula-
tion we can express proximity loss for round solid wires as follows: [16]
π ω 2 B 2 lw d4
Ppe = . (6.4.5)
64 ρg
For d/∆ ≥ 2 we have to multiply this equation by Gr , see Fig. 6.3.1. However, it will be shown
that the optimal wire diameter occurs for d/∆ ≤ 2, thus Gr = 1.
6.4.3 Magnetic flux density B in a single winding

The leakage field differs from layer to layer. Thus the proximity effect is largest in the layers
close to the boundary between a transformer’s primary and secondary windings, see Fig. 6.4.5.
1
The “b” comes from “breadth”, or maybe even the original Dutch “breedte” [8]
2
This can be found by assuming the second layer is slightly shifted with respect to the first one. Thus turns in
the second layer will “fall between the cracks” of the first layer.
188 / 274 
primary/2
secondary
primary/2
B
(a) (b)
secondary
primary H1
x
B
(a) (b)
Figure 6.4.5: Two different transformer windings (a) and their internal magnetic fields (b).
B2
Winding h B
h2
B1 = J B2
x
h1
Figure 6.4.6: The leakage field B linearly increases with the height of the winding.
A schematic view of the cross-section of an n-turn winding carrying an effective current

I is shown in Fig. 6.4.6. A linear distribution of the magnetic induction across the inductor
is assumed. The induction starts at B1 = ϑB2 and increases to B2 over an height h, with
h = h2 − h1 , so h1 = ϑh2 . Because of this linear distribution B = hx2 B2 . The mean value of B 2
between h1 and h2 is
Z h2
1 B 2 1 − ϑ3
2
B = B 2 dx = 2 . (6.4.6)
h2 − h1 h1 3 1−ϑ
Given H = n I/l, with B = µ0 H and l = bw the induction in a winding with n I amps/turn

is B = µ0 nI/bw . Note that B and I are effective values and that the indices “2” and “1” serve to
indicate the space dependency of the magnetic induction. It follows
µ0 n I
B2 = B1 + µ0 n I/bw = ϑB2 + µ0 n I/bw =
(1 − ϑ) bw
 189 / 274
and with equation 6.4.6

2
2
1 µ0 n I 1 − ϑ3
B = . (6.4.7)
3 bw (1 − ϑ)3
6.4.4 Losses caused by proximity effect

For foil and solid windings the losses are given in equations 6.4.2 and 6.4.5. After substituting
B 2 in these formulas we find for solid wire with a total length lw = nlwe
2
π ω 2 n lwe d4 1 µ0 n I 1 − ϑ3
Ppe = . (6.4.8)
64 ρg 3 bw (1 − ϑ)3
Now consider an inductor with a single layer, so that ϑ = 0. Ppe is frequency dependent and
vanishes for ω → 0. The DC losses remain
I 2 n lwe ρg
Pdc = . (6.4.9)
π d2 /4
The total losses are Ptot = Pdc + Ppe :

2 4ρg πω 2 µ20 n2 d4
Ptot = I nlwe + . (6.4.10)
πd2 192 ρg b2w
We see that the DC losses decrease and the AC losses increase for increasing wire diameter.
This means there is an optimal diameter dopt
8ρg πω 2 µ20 n2 d3opt

= (6.4.11)
πd3opt 48 ρg b2w
384 ρ2g b2w ρ 2 b2

6 g w
d 6opt = 2 2 2 2 = 92.44 2 2 (6.4.12)
π ω µ0 n f n
Using ρg = 2.25 · 10−8 Ωm for copper at 100 ◦ C, and substituting bw in mm and f in kHz,
13
bw
dopt = 2.6 . (6.4.13)
f ·n
We can rewrite equation 6.4.11 as
4ρg πω 2 µ20 n2 d4opt

=2 , (6.4.14)
πd2opt 192 ρg b2w
so that it follows voor the optimal (“o”) separate losses
Pdco = 2Ppeo . (6.4.15)
190 / 274 
In the general, not optimal, case we can write

Ppe πω 2 µ20 n2 d4 πd2 π 2 ω 2 µ20 n2 d6
= = . (6.4.16)
Pdc 192 ρg b2w 4ρg 384 ρ2g b2w 2
According to 6.4.12 the first factor is equal to d−6

opt and
6
Ppe 1 d
= . (6.4.17)
Pdc 2 dopt
6.4.5 Resistance factor Fr

Comparable to the resistance factor Fs caused by the skin effect, we introduce Fr
Ppe + Pdc Ppe
Fr = =1+ . (6.4.18)
Pdc Pdc
6
1 d
Fr = 1 + . (6.4.19)
2 dopt
Because of what we have assumed at this point the above formula is only correct for d/dopt <
1.25. When using the optimum wire diameter the resistance factor Fr = 1.5 and the losses are
Popt = 1.5 · Pdc = 1.33 · ρ1/3

g f n lwe b−1/3
2/3 5/3
w . (6.4.20)
A well-known paper by Dowell, [5], gives the value of Fr as a function of the equivalent conduc-
tor height φ, see Fig. 6.4.7. Here the number of layers p is a parameter. It can be seen that there
is an area where Fr is proportional to φ. With sufficiently high p this happens for φ larger than 3,
for a single layer when φ = 1. These are the conditions where surface conduction is important
and no current flows through the conductor core. When only the skin effect is important, Fr is
proportional to d when d/∆ 1. The curve for a single layer, p = 1, is the same as for the first
layer of a multi-layer winding. Starting with the second layer the eddy current losses increase
proportional to φ4 up to φ = 2. From φ = 3 onwards they increase with φ. The eddy current
losses in the higher layers are clearly more important than in the first layer, except for φ much
smaller than one. The φ4 -like curvature for small φ is caused by the DC resistance that can not
be neglected in that case. Without DC resistance we would get the Fr − 1 curves of Fig. 6.4.8.
6.4.6 Design curves

A useful quantity to compare different winding designs is rac . Remember, the losses in a winding
are proportional to Rac = n lw rac . For a specific design only the number of turns and the
dimensions of the coil former will be known. The length of the wire n lwe is not considerably
influenced by the number of strands or wire diameter. So to reach our goal of minimum-loss
design it suffices to aim for minimum rac .
 191 / 274
1000
FR p=
10
500
6
200
4
100
3
50
2.5
2
20
1.5
10
1
5 0.5
0.1 0.2 0.5 1 2 5 j 10
Figure 6.4.7: Fr plotted against equivalent conductor height φ [5]
FR - 1
1
p=1 p = 0.5
0.1
0.01
0.5 1 2 3 4 5 j 10
Figure 6.4.8: Fr − 1 as a function of φ for windings consisting of full and half layers.
192 / 274 
6.5 Designing inductors
The AC resistance per meter can be derived from curves showing Fr /φ2 as a function of φ,
Fig. 6.4.10. For a square wire having width b, height h and pitch t we get
r
h b
φ= . (6.4.21)
∆ t
Fr rac ∆2 t ∆2 t
= = rac . (6.4.22)
φ2 rdc h2 b ρg h
For a round wire with diameter d,

r r 3/2
h h t d π
φ= = . (6.4.23)
∆ t ∆ t 4
r
Fr ∆2 t 4
= rac . (6.4.24)
φ2 ρg d π
Because the DC resistance rdc is proportional to φ−2 the graph for Fr = 1 shows a slope of
-2. Fig. 6.4.10 does not offer a solution for wire windings because the number of layers is not
known in advance. Using our known bw as the available winding width we can now define T :
bw
T = . (6.4.25)
n
This T can be thought of as the pitch of a single layer which would have all n turns in it.
Because t = p · T , equations 6.4.21 to 6.4.24 can be simply adjusted.
q Observe that T√is known
at the start of the design because n is always given. From ∆ = πµρ0 gµg f or ∆ = k/ f our ∆
T T
follows and so does ∆ . Given ∆ , Fig. 6.4.9 allows us to choose a minimal rac ∆2 /ρg under due
consideration of manufacturing and other cost-related constraints.
6.5. Designing inductors
6.5.1 Introduction
There are many magnetic materials available for inductors and transformers. In this section char-
acteristics are given for the “classic” ferrites 3C8, 3C85 and 3F3. The main difference between
these materials is in their high-frequency losses, see Fig. 6.5.5 for the general characteristic.
The winding losses are indirectly related to the chosen core material. Given a lossless ferrite,
any inductance value can be realized with just a single turn. As the previous sections have
shown, the losses in the windings would then also become (nearly) zero. However, a design
with just a single turn leads to very high values of the magnetic inductance Bp in the core. It
is found that the losses in the ferrite are very strongly related to this Bp . In practice, the design
 193 / 274
5 4 3 2
rac,2 8
7 6
p=
5
0.5
Hg 2
0.5
0.2
simply, split or sandwiched
0.1
sandwiched only
0.05
0.1 0.2 0.5 1 2 5 10 20
T/,
Figure 6.4.9: rac ∆2 /ρg plotted versus T /∆
100
FR / j2
50
20
p=
10
10
5
6
2
4
1 3
2.5
0.5
2
1.5
0.2
FR = 1 0.5
0.1
0.1 0.2 0.5 1 2 5 10
j
Figure 6.4.10: Fr /φ2 plotted against φ
194 / 274 
engineer balances winding losses, increasing with the number of turns, against the material losses
in the core, decreasing with the number of turns. In general, for a given core the sum of both
loss mechanisms shows a minimum. When this minimum, the dissipated power, is low enough
the fabricated inductor or transformer has an acceptable maximum hot spot temperature. In
commercial products the hot spot is, of course, made as high as possible, e.g. 130◦ C, because it
is easy to see that a high Tmax leads to a smaller and thus cheaper component.
Designing an inductor for a given specification is a complex optimization problem that needs
specialized (computerized) tools. However, in the absence of cost or size related constraints
it is a relatively straight-forward task to design the component so that it fulfils the electrical
specification (e.g. a given minimum inductance at a given maximum peak current and frequency).
This section discusses core dimensions, air gap length, number of turns and winding geometry
in context of such a non-critical inductor design.
6.5.2 Current waveforms

Fig. 6.5.1 shows the BH-curve of the classical 3F3 ferrite. Once every switching cycle a full
BH-loop is traversed. The material losses are proportional to the loop area which should evi-
dently be as small as possible. We see that at 100◦ C the losses are lower than at 25◦ C. This is
carefully engineered by the manufacturer, because it will result in the smallest possible magnetic
component (6.5.1).
The H-field is directly related to the current carried by the component. Three typical classes
of current waveforms and thus BH loops are shown in the lower-right part of Fig. 6.5.1.
1. The current shows a large DC component and small AC ripple. Using the notation from
Fig. 6.5.2: Iac /I0 < 0.3. The BH-curve, point P, shows the small B variation that results
from a 3% H variation. The loop is small and the losses will thus be very low.
2. The current varies from 0 to a maximum each switching period: Iac /I0 ≈ 1. As shown in
point Q, the losses are not so small anymore.
3. The AC component is dominant: Iac /I0 > 2, point R. This is the typical case for resonant
switched-mode power supplies. In practice it is found that Bp must be kept far below the
Bsat value in order to keep the losses low enough. There is an optimum combination of Bp
and switching frequency at which the component is still smaller than would be the case for
the other waveforms.
6.5.3 Choosing a core

For many often-used cores the manufacturer offers data sheets. In Fig. 6.5.3 design curves show
2
Im L as a function of core type and air-gap length.
2
The choice of an appropriate core is done as follows. First compute Im Lmin , a measure for the
maximum energy that needs to be stored per cycle. For Class 1 and 2 designs we can immediately
2
draw a horizontal line in the figure. For Class 3 we must take the value f · Im Lmin /10 instead,
 195 / 274
mT 3F3
500
25° C
400
100° C
B 300
P
200
100
-0.4 -0.3 -0.2

0
0.1 0.2 0.3 0.4
H kA / m
-100
-200 Q
-300
B 2Bac
2Bac
2Bac
-400 H H H
R Q P
Figure 6.5.1: BH curve of 3F3 ferrite.
196 / 274 
1
1ac
1ac
1
10 M
t
1/ f
Figure 6.5.2: Defining current waveforms.
1M 2 L 1
(J) 5
2
UU93/152/30
*
EE65/66/27
10 -1
EE55/55/25 UU193/104/30
5
EE55/55/21
EE42/66/20
UU93/128/30
*
*EE42/54/20
EE42/42/20 UU64/79/20
2 EE42/42/15 UU30/50/16
10-2 UU25/40/13
* EE30/30/7
5 UU20/32/7 EC70/34/17
EC52/24/14
2 EE20/20/5 UU15/22/12 EC41/19/12
10-3 EC35/17/10
10-4
0.1 0.2 0.5 1 2 5 0.2 0.5 1 2 5 10 0.2
centre-leg gap width (mm) wound-leg gap width (mm)
Choke core selection chart for EE cores. Choke core selection chart for UU/UI cores. Ch
Ch
Figure 6.5.3: Design curves for gapped EE, UU/UI, EC and ETD cores.
 197 / 274
EC41/19/12
10-1 10-6
1M 2 L
(J) AL
(H)
5 5
1 11 111
2 2
(1M 2 L) max
10-2 10-7
AL
5 5
111
2 2
11
1
10-3 10-8
0.1 0.2 0.5 1 2 5 10
centre-leg gap width (mm)
Figure 6.5.4: Design curves for inductors on a EC41/19/12 core.
where f is in kHz. This performs a dimensionless scaling to account for extra losses and thus
introduces a temperature related safety margin.
6.5.4 Air gap and number of turns

2
Here we can use Fig. 6.5.4. Again we use the computed Im Lmin . The single line of Fig. 6.5.3
is now split into three lines for the three current waveform classes. The other three lines are
related to Al , the inductance factor L/n2 . Once we have the (core related) Al we can compute
2 2
the number of turns n. Again, for a Class 3 design we should use f · Im Lmin /10, not Im Lmin .
6.5.5 The windings

In the previous sections the optimum diameter for solid wire was found, assuming sinusoidal
currents. For Class 3 designs we can use equation 6.4.12 directly. For Class 1 and 2 designs it is
customary to first introduce an “effective frequency”
1.3f
fe = p . (6.5.1)
1 + 3(I0 /Iac )2
For Class 1 designs, above 20 kHz, an fe of a few kHz results. The eddy currents can be neglected
and we optimize the DC resistance of the wire using the expression for the effective current
Ie2 = I02 + Iac
2
/3.
198 / 274 
For Class 2 designs

f
fe = p (6.5.2)
1 + 2(I0 /Iac )2
and the effective current Ie2 = I02 + Iac

2
/2.
Now we can use equation 6.4.12 with all known numbers substituted:
1/3
bw
did = 2.6 · . (6.5.3)
nfe
A wire table then gives a suitable d and do , so we can compute the ideal number of layers
n
pid = . (6.5.4)
bw /do − 1
For pid > 1.5 it is possible that the current density in the wire is too high (rule-of-thumb: less
than 4 A/mm2 ). In that case a bigger core must be selected. When pid < 1.5 it is possible to use
foil windings.
This procedure should result in an Fr around 1.5:
1/6
1 d
Fr = 1 + , (6.5.5)
2 dopt
and Ptot = Ie2 · Fr · Rdc . √

bw
If pid < 1, select the thickest wire where do < n+1 . The resistance factor is now Fr = d3 · nn+1fe
and again Ptot = Ie2 · Fr · Rdc .
When litze wire is acceptable the procedure is simple: the eddy current losses can be ne-
glected and the winding is optimized for lowest DC loss.
6.5.6 Core losses

The manufacturers quote core losses per volume-unit, customarily in kW/m3 , as a function of the
magnetic induction B, see Fig. 6.5.5. The losses are also dependent on the number of times per
second the BH-loop is traversed, f , and of course the temperature Tk plays a role. Using curve
fitting techniques it can easily be found that for 3F3 material
P = 15.8 · 10−3 · f 1.26 · B 2.63 . (6.5.6)
It is important to note that P is given in kW/m3 , f in kHz, and B in Tesla.
 199 / 274
3F3
f in kHz 400 100 25
10
25°C
100°C
10 10 2 mT
^
Peak flux density, B
Figure 6.5.5: Core losses as a function of Bp and frequency, for two different temperatures.
200 / 274 
BIBLIOGRAPHY
Bibliography
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3:112–117, 1993.
[2] S. Butterworth. Eddy current losses in cylindrical conductors with special applications to
the alternating current resistance of short coils. Phil. Trans. R. Soc. A., 1(57):222, 1922.
[3] S. Butterworth. Effective resistance of inductance coils at radio frequency. Expl. Wireless,
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[4] H.B.G. Casimir and J. Ubbink. Het skineffect. Philips Technisch Tijdschrift, 1(28):173–
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[5] P.L. Dowell. Effects of eddy currents in transformer windings. Proc. Instn. Elect. Engi-
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on Mag., 28(1), January 1992.
[7] 3C85 Handbook, 1987.
[8] J. Jongsma and L.P.M. Bracke. High frequency power transformer and choke design, part
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COMA, 1982.
[9] J. Jongsma and L.P.M. Bracke. High frequency power transformer and choke design, part 4,
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[10] J. Koch. Berechnung der Kapazität von Spulen, insbesondere in Schalenkernen. Valvo
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[11] Steef A. Mulder. On the design of low profile high frequency transformers. Power Conver-
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Power Conversion Conference PCI, pages 345–359, June 1993.
[13] Steef A. Mulder. Fit formulae for specific power loss of the material grades 3C80, 3C81,
3F3, 3F4, 4F1 (preliminary). Manufacturer product information KBR 25-92-11, April
1993.
[14] E.C. Snelling. Soft Ferrites. Butterworth & Co, second edition, 1988.
[15] E.C. Snelling and A.D. Giles. Ferrites for Inductors and Transformers. Research Studies
Press, 1983.
 201 / 274
[16] Charles R. Sullivan. Computationally efficient winding loss calculation with multiple wind-
ings, arbitrary waveforms, and two-dimensional or three-dimensional field geometry. IEEE
Trans. Power Elec., 16(1), 2001.
[17] J.P. Vandelac and P.D. Ziogas. A novel approach for minimising high-frequency trans-
former copper losses. IEEE Transactions on Power Electronics, 3, July 1988.
202 / 274 
7
Interference
7.1. Introduction
The processing of electrical power through the use of switching techniques inherently produces
various kinds of noise. Examples are:
• Mechanical switches. Here the wanted frequency is very low, the unwanted frequencies
are high,
• Brush contacts in motors, e.g. electric drills or vacuum cleaners. Here the wanted fre-
quency is low, the unwanted frequencies are high,
• Power electronic circuits, electronic lamp ballasts. Here the wanted frequency is high, the
unwanted frequencies are very high.
The unwanted noise is a by-product of the desire to minimize losses. In order to reduce
switching losses a device should be either ON or OFF and not anywhere in between. The un-
avoidable transient area between the two states 1 should be as short as possible. However, the
resulting steep voltage and current wave shapes correspond to infinite harmonic series containing
frequency components that do not contribute anything to the desired output power. Luckily the
amplitude of these noise components rapidly decreases with frequency.
Given a certain frequency, the amplitude of a signal describes to what degree it is causing in-
terference. In real circuits, generated noise excites the various parasitic LC combinations formed
by e.g. device capacitances and PCB track inductances. The interference level can therefore
be many times higher than would be expected from a Fourier transform of the switch signals.
The designer is warned that the switch-off behavior of diodes can not be neglected in this anal-
ysis. Especially in television and monitor applications diodes are sometimes chosen for their
characteristic interference pattern or signature, not for their superior efficiency characteristics.
1
So-called “hard-switching” is assumed here.
203
Chapter7 Interference
Conducted interference
symmetric h.f. current lamps
electronic
mains
ballast
asymmetric h.f. current
ground
Radiated interference
lamp
electronic H
A
ballast h.f. current
measuring
.. receiver
H . . h.f. current x A
Figure 7.1.1: Electromagnetic compatibility.
Interference is a difficult problem because it needs a receiving end before it can become a
problem. For instance, the impulse noise of various brush contacts in electric motors only became
a problem with the advent of wireless communication. And even in this case, the introduction of
new modulation techniques (FM instead of AM) can make previously bothersome interference
sources completely unimportant. Or, unfortunately, the reverse may happen.
Interference on radio reception, Radio Frequency Interference or RFI, is controlled by lo-
cal authorities, e.g. the Dutch ”Radio Controle Dienst” (RCD). The international RFI authority
in this field is the Comité International pour la Suppression des Perturbations Radio-électriques
(CISPR). This committee advises on RFI measurement methods and acceptable limits. However,
it is left to the individual countries to enforce these limits or not. Under influence of this interna-
tional coordination effort there is a gradual convergence to uniform directives. The measurement
methods and limits are slowly, but continually, adapted to changing circumstances.
With respect to radio and television reception, radiated emission is the most likely cause of
interference. However, in many cases interference caused by direct transfer of noise through
the mains wiring (conducted emission) is also a source of trouble. We’ll talk about conducted
emission in section 7.2 and about radiated emission in section 7.3.
7.2. Conducted interference
7.2.1 The utility grid

In order to be able to measure conducted interference above 9 KHz, the mains impedance is
normalized as 0.4Ω + j · 0.8 mH.
The interference is measured across a 50Ω resistor between mains lead and ground, as shown
204 / 274 
7.2 Conducted interference
R,S,T device
L 11 50 mH
220nF
C 12
FILTER meter
R 11 5W fase
attenuates 50 W
interference R 12
from 8 mF
net grid meter
8 mF
50 W
R 12
5W meter
R 11
zero
220nF
C 12
L 11 50 mH
N
device
or fase
Figure 7.2.1: Standard Mains Impedance Network, SMIN
in Fig. 7.2.1. It is possible to measure between mains phase and ground as well as between
mains null and ground. The highest value shall be recorded. In case of a two or three phase
utility all phases are measured in this way. Of course, for this measurement a “clean” ground
must be used, not the standard safety ground connection. To this clean ground the SMIN, the
measurement apparatus, and the safety ground (when available) of the Device Under Test (DUT)
are connected. The filter shown in Fig. 7.2.1 suppresses any noise coming from the mains. Above
9 kHz it is required to have an output impedance higher than Z1 , the impedance of the SMIN. In
Fig. 7.2.2 a few of the relevant characteristics are shown.
The symbols in Fig. 7.2.2 are defined using Fig. 7.2.1:
1 1 1
Z1 = R1 + jX1 = , Y1 = 1 + (7.2.1)
Y1 R12 + jωC12 R11 + jωL11
The 8 µF capacitor does not figure in these equations because its sole function is to prevent
DC from flowing through R11 . Note also that in the following text U1 , the voltage across Z1 , is
considered to be a measured value. This means that Fig. 7.2.2 must be used to interpret frequency
response (measured across R12 ) below 25 kHz.
7.2.2 Interference sources

The interference source encompasses all the kinds of noise that can flow out of the device through
its mains connection. In almost all cases this noise can be represented as a current source.
The slightly better representation that we will use here is a voltage source Ub in series with an
 205 / 274
LISN characteristics
0
|Z1|/50 → [dB]
−5
−10
−15
−20
4 5 6 7
10 10 10 10
60
impedance → [Ω]
40 |Z1|
R
1
20
X
1
0
4 5 6 7
10 10 10 10
0
/U | → [dB]
−2
o
−4
R12
|U
−6
4 5 6 7
10 10 10 10
log frequency → [Hz]
Figure 7.2.2: Characteristics of the SMIN. (a) |Z1 |/50 in Ω, (b) |Z1 | (solid), R1 (dotted) and X1
(dashed), and (c) the transfer characteristic U0 /UR12 . U0 is the voltage across the DUT and U12
is the voltage across the measurement resistance R12 .
206 / 274 
metal
shield
0.6
2.4
min
5.9
isolation
max
15.8
Figure 7.2.3: Isolating drain from source with a metal screen
admittance Yb . The voltage over the SMIN resulting from this noise is:
Ub Z1 Yb
U10 = (7.2.2)
1 + Z 1 Yb
In general Yb is capacitive. Below 30 MHz and for Cb ≤ 20 pF we can assume 1 + Z1 Yb = 1.

In general it is most efficient to attack the noise as close as possible to its origin inside the
DUT. Even small circuit changes can have dramatic effect when applied at the right spot. An
example of this kill-at-the-source strategy is given in Fig. 7.2.3. The drain of the lower MOS
transistor in a bridge circuit is periodically switched between +Us and ground. In order to
improve heat transfer, this transistor is mounted to the (grounded) chassis. A thin mica sheet
provides electrical isolation. It is easy to see that large HF currents will capacitively couple from
the drain to the mains and flow back to the MOS source through the phase and null conductors.
A grounded metal screen and a second mica sheet effectively short-circuit the noise current
directly to the MOS source connection.
7.2.3 Interference through mains conductors

This current is called the symmetric component of conducted emission. Fig. 7.2.4 shows how
the symmetric component can be measured with a current probe. In Fig. 7.2.5 a filter is added
to damp the symmetric current with over 50 dB. The filter characteristic is shown in Fig. 7.2.6.
Note three special points caused by the self-resonances of the used L (with parallel capacitance
Cpar ) and C (with series inductance Lseries ): point I where L = 50 mH and Cpar = 15 pF, point
II where C = 4.7 nF and Lseries = 100 nH. Finally L and C resonate with each other, at point III.
This latter point should be far below the lowest frequency generated by the noise source.
7.2.4 Interference current through the safety ground connection

The asymmetric interference currents are much more bothersome because they flow separately
through phase and null conductor. Only in the ground return path they have the same direction,
see Fig. reffig:VIII.7.
 207 / 274
2 x 1s 1s
R,S,T Y b Ub +
Z1
interference
grid FILTER
source
Z1
-
zero meter 1s
Figure 7.2.4: Measuring the symmetric interference current component
12
R,S,T Y b Ub +
11
Z1
C interference
grid FILTER
source
Z1
L -
zero meter 12 1s
Figure 7.2.5: Filtering the symmetric interference current component
208 / 274 
Frequency characteristic of Fig. 1.6

50
0
damping → dB
−50
−100
0 1 2 3 4
10 10 10 10 10
log frequency → [kHz]
Figure 7.2.6: Stylized frequency characteristic of the filter in Fig. 7.2.5
1 a1 + 1 a2 1 a1
Z1
interference
grid FILTER
source
Z1
12 1 a2
meter
1 a1 + 1 a2
Figure 7.2.7: Measuring the sum of the asymmetric interference current components.
 209 / 274
Z2
Z1 Z3
Cb
interference
grid FILTER
source
Z1 Z3
Z2
meter
Figure 7.2.8: Damping the asymmetric current. Z2a and Z2b can be magnetically coupled on the
same core.
Because Ia1 and Ia2 are not necessarily equal, in principle their difference must be measured
also. Unfortunately this component is intertwined with the differential current and can not be
separated from it.
Because it would be far too bulky and expensive, it is not possible to have a filter in the ground
return. Safety reasons require that to prevent burn out of the ground lead the diameter of the wire
used for the filter inductor has to have the same size as the phase and null conductors. So, as
Fig. reffig:VIII.8 shows, instead of this common filter we use two separate filters in phase and null
line each to remove asymmetric interference. Anyway, because of the parasitic capacitance of the
noise source directly to the surroundings, not all of the asymmetric return current is concentrated
in the ground lead.
Because the 50 Hz mains current is symmetric and causes opposite and therefore canceling
fields in the magnetic circuit, it is possible to wind the two inductors Z2 on a common core. This
actually leads to a smaller size inductor than for the symmetric filter, where the symmetric 50 Hz
component of course can not cancel. It is crucial that the filter inductors never saturate because
in that case their inductance essentially vanishes and the full interference current is injected into
the mains.
7.2.5 Double LC filter example
Let us for the moment neglect the parasitic series inductances of capacitors. These do not impair
the correct filter operation, as do the parasitic capacitances of the inductors. We can write with
210 / 274 
Z2 Z4 Zb
Ub
Z1 Z3 Z5
Figure 7.2.9: Double LC filter
reference to Fig. 7.2.9:
1 1 1
Measurement impedance Z1 = Y1
Y1 = 1
R12 + jωC
+ R11 +jωL11
12
ωL2
Series inductor Z2 = jX2 X2 = 1−ω2 L2 C2
Parallel capacitor Y3 = jB3 B3 = ωC3 (7.2.3)
Series inductor Z4 = jX4 X4 = 1−ωωL 4
2L C
4 4
Parallel capacitor Y5 = jB5 B5 = ωC5
noise source Yb = jBb Bb ≈ ω · 50 pF
The capacitors C3 and C5 are positioned between the mains and neutral. Safety regulations
require these to be so-called ”Y” capacitors (non-flammable, self-healing) with a total capaci-
tance below 5 nF, to limit the 50 Hz leakage current.
The filtered voltage across Z1 will be
U10 1
= · {(Z1 + Z2 )[Y3 + Y5 + Yb + Y3 Z4 (Y5 + Yb )] + 1 + Z4 (Y5 + Yb )} (7.2.4)
Uo 1 + Z1 Yb
The requirements for this filter are a damping of 30 dB @ 25 kHz and 70 dB @ 1 MHz.
First we will try to do this with a single LC section, so Z4 and Y5 are 0. Using L2 = 300 mH,
C3 = 5 nF and C2 = 0, we find 31.2 dB @ 25 kHz and 135 dB @ 1 MHz. However, the parasitic
capacitance C2 of the (very large) L2 will in practice be at least 30 pF, so at 25 kHz the damping
is 31.2 dB but at 1 MHz only 44.5 dB. Note that the 44.5 dB damping (roughly 100 times) is
simply the capacitive voltage divider formed by Y5 (50 pF) and C3 (5000 pF). It is not possible
to decrease C2 to say 1 pF because this even further increases the size of the already bulky L2 .
Our second try is to split the inductor in two 150 mH sections. Each inductor has a parasitic
capacitance of 20 pF. We now find 31.2 dB damping @ 25 kHz and 54 dB @ 1 MHz. This
provides not enough damping at 1 MHz.
Our final try is the circuit in Fig. 7.2.10. Here we split the inductor in two sections of 111
mH again, but now also use the internal node. The total capacitance of 5 nF is distributed over
the two nodes to ground. This gives 30 dB damping @ 25 kHz and 85 dB @ 1 MHz.
 211 / 274
C2 20pF C4 20pF
Cb
L 2 111mH L 4 111mH
Ub
C3 3nF C5 2nF
Z1
Figure 7.2.10: LC filter with the required amount of damping at 25 kHz and 1 MHz.
Fig. 7.2.11 shows the detailed frequency characteristic. The two inductors were chosen the
same value because this minimizes the risk of them being interchanged during manufacturing. A
slightly more imaginative design with L2 = 75 mH, C2 = 15 pF and L4 = 290 mH, C4 = 140 pF
shows how to use the resonance frequency of the first section to increase the damping at 25 kHz
to an extremely high value, Fig. 7.2.12. Again we see that the damping above the self-resonance
of the LC sections is completely determined by the capacitive voltage dividers:
U10 C3 + C5 C5 C3 C5
f > f2, f4 =1+ + + (7.2.5)
Uo C2 C4 C 2 C4
7.3. EM fields
The source for an electromagnetic field is supposed to be an oscillating charge, see Fig.7.3.1.
The charge oscillates in the z-direction with a frequency ω and an effective current I, across a
distance l.
From electromagnetic wave theory:
I l cosϑ ω ω
Er = 3
(1 + j r)e−j c r (7.3.1)
jω0 2πr c
I l sinϑ ω ω 2 2 −j ω r
Eϑ = (1 + j r − r )e c (7.3.2)
jω0 4πr3 c c2
I l sinϑ ω ω
Hα = 2
(1 + j r)e−j c r (7.3.3)
4πr c
212 / 274 
7.3 EM fields
Frequency characteristic of Fig. 1.11A

50
0
damping → dB
−50
−100
0 1 2 3 4
10 10 10 10 10
Figure 7.2.11: LC filter with equal inductors
Frequency characteristic of Fig. 1.11B

50
0
damping → dB
−50
−100
0 1 2 3 4
10 10 10 10 10
Figure 7.2.12: LC filter with optimally split inductors
 213 / 274
Ha
Er
a
p
z En
r
n
l 0
Figure 7.3.1: Field of a oscillating charge
In Fig. 7.3.1 the magnetic component Hα at P comes straight out of the page. The wavelength
λ = 2πc/ω = c/f , so that ωr/c = 2πr/λ. When the wavelength is large with respect to the
distance r to the transmitter: λ r, than ωr/c 1 and after simplification we get:
I l cosϑ
Er = (7.3.4)
jω0 2πr3
I l sinϑ
Eϑ = (7.3.5)
jω0 4πr3
I l sinϑ
Hα = (7.3.6)
4πr2
A numerical example is instructive. At a distance of 3 meters from the source it is clearly
valid to use the above formulas for λ 3 m, or f 100 MHz (using f = c/λ and c =
299.792 · 106 m/s). At this short (3 m) distance from the source we commonly speak of the “near
field.” The “far field” is thus defined by λ r, so f 100 MHz at a distance of 3 m. Because
according to equation 7.3.1 in this case Er becomes very small, we can write
I l sinϑ ω
Eϑ = jωµ0 e−j c r (7.3.7)
4πr
r
I l sinϑ 0 −j ω r
Hα = jωµ0 e c , (7.3.8)
4πr µ0
214 / 274 
7.4 Measuring Radio Interference
where we use the substitution c2 = 01µ0 . The components Eϑ and Hα are orthogonal to each
other and to r. The quotient of the electric and magnetic field strengths is constant and the
components are in phase:
r
E µ0
= = 377Ω. (7.3.9)
H 0
This frequency-independent constant is sometime called wave-resistance of free space, [2].

In order to get an ample signal-to-noise ratio, in a practical situation we will be doing our mea-
surements in the near field. Using the electrostatic field theory we can compute the capacitances
between noise source and (measurement) antenna. An equivalent reasoning holds for the mag-
netic field and the “loop-antennas” used there. Most analytically solvable configurations can be
found in the EM literature.
7.3.1 Frequency ranges and limit requirements

With conducted emissions we limited the frequency range of interest to below 30 MHz. We
will do likewise for radiated emission. Currently, there are no requirements for the electric field
below 30 MHz, but this can be expected to change, see section 7.1.
Because good measurements shall be reproducible, any noise coming from the neighborhood
of the measuring setup must be eliminated or at least made to be well-defined. Because of the
extremely small signals under discussion here, impressive precautions are needed. A common
method is to use a specially prepared open-air site in a carefully chosen location free of elec-
tromagnetic “smog.” Any cabling from the instruments is worked down in the ground below
an earthed mesh. As can well be imagined, such a field is quite expensive to keep in shape.
Also atmospheric conditions have a profound influence on measurement results, health of the
technicians and the state of the equipment. The influence of external atmospheric radiated noise
is non-negligible. To lessen the latter problem the distance between noise source and (loop-
)antenna has been decreased from 30 to 3 meters. The output voltage of the loop-antenna is a
measure for the H-field. The E-field can be found with equation 7.3.9: E = 377 · H. (Both E
and H expressed in µV/m). Working with dB, using 20 log 377 = 51.5: (measure for magnetic
field) (dBµV/m) = 51.5 dB + 20 log H (dBµA/m). With “dBµV/m” we mean the quotient of the
measured field E with respect to 1 µV, expressed in dB. A generally accepted limit would be 34
dBµV/m. A rule of thumb states that for good AM reception a field strength of 66 dBµV/m is
necessary. This quantitatively illustrates the qualitative statements in the above with respect to
the problems local radio stations pose in correctly and reproducibly measuring RFI.
7.4. Measuring Radio Interference

The measuring unit is 1 µV. RFI is expressed in dB (µV) = 20 log Uo with Uo in µV. The electric
field strength is expressed in µV/m and the level in dB (µV/m) = 20 log (field strength in µV/m).
The magnetic field strength is likewise expressed in dB (µV/m), see section 7.3.
 215 / 274
7.4.1 Requirements and measurement methods

Quasi-peak measurement
The “quasi-peak” attribute points to the final detector circuit, which is specified in table 7.4.1.
Table 7.4.1
frequency range 10-15 kHz 0.15-30 MHz 30-1000 MHz

bandwidth 200 Hz 9 kHz 120 kHz
attack time 45 ms 1 ms 1 ms
decay time 500 ms 160 ms 550 ms
headroom 24 dB 30 dB 43.5 dB
Special equipment is available that sweeps the measurement filter through its frequency range
in a number of steps. Unfortunately, the long attack and decay times and the low filter bandwidth
make such a full-band quasi-peak measurement very slow. A practiced engineer will therefore
use a spectrum analyzer (which by design only measures true peak values) for development
work. Because it can be shown that a peak measurement always reads higher than a quasi-
peak measurement, only the areas where the spectrum analyzer sees too high values need to be
examined in more detail with the slower method.
7.4.2 Example requirement

An example CISPR recommendation for conducted emission in the range 9 kHz to 30 MHz is
shown in Fig. 7.4.1.
7.4.3 Magnetic field measurements

A relatively new CISPR approved method uses three orthogonal circular antennas of 2 m diame-
ter. This configuration is called a “large-loop antenna”. The DUT is placed in the common centre
of the three antennas, [1], see Fig. 7.4.2.
The coupled signal is so large that otherwise extremely disturbing out-side fields, like local
radio stations, are not important anymore. The measurement signal for the X, Y or Z directed
field is simply the current through the corresponding loop, in µA. An example requirement for
this noise component is shown in Fig. 7.4.3. The strange “chimney” at 3 MHz shows the CISPR
influence of a certain big company with a troublesome product at 2.7 MHz . . .
216 / 274 
7.4 Measuring Radio Interference
CISPR recommendation for mains−conducted emissions

120
Terminal voltage acc. CISPR

100 on V network 50 Ω // (50 μH + 5 Ω)
80
emission → [dBμV]
Quasi peak
60
Average
40
20
4 5 6 7
10 10 10 10
Figure 7.4.1: CISPR recommendation for mains-conducted emission in the range of 9 kHz to 30
MHz, as approved by Cenelec.
Figure 7.4.2: Large-loop antenna measuring an HF-TL armature.
 217 / 274
120
100
80
emission → [dBμA]
60
40
20
4 5 6 7
10 10 10 10
Figure 7.4.3: Preliminary CISPR requirements for a 2 m “loop”.
218 / 274 
BIBLIOGRAPHY
Bibliography
[1] J.J. Goedbloed. Elektromagnetische compatibiliteit. Kluwer, first edition, 1989.
[2] A. von Weiss. Die elektromagnetischen Felder. Vieweg, 1983.
 219 / 274
220 / 274 
8
Power Factor Correction
1 Preconditioner, see DCDC chapter 8, p36

2 Examples of PFC applications in electronics ballasts
1. Literature
8.1. Examples in Electronic Ballasts
8.1.1 One HB switch as up-converter switch

[2]
Lf Lup Da
+
C1
Cs
Db Lr Cr
Cf
Us
Cb C2
Figure 1 With two diodes more and one transistor less the Hb-circuit has been coupled to the
up-converter
221
Chapter8 Power Factor Correction
8.1.2 One HB switch and diode as up-converter components

The circuit is the same as above with diodes Da and Db shorted. The duty cycle is modulated to
obtain a sinusoidal input current.
8.1.3 A one transistor EB based on the flyback principle
D1
C +
L1 L2 Uc L4 L3
-
Us
D2
S Rla
D3
Figure 2 Simple EB with one transistor, two ferrite cores with two windings each.
C +
L1 Uc L4 L3
-
Rla
Mode 1, the switch is conducting. At the supply side the inductor L1 is charged by a linearly
increasing current. At the load side the output voltage UC is connected to inductance L3 through
diode D3 and the switch, which voltage appears on L4 as well and because L3 and L4 in series
determine the lamp voltage this is Ula = −2UC .
Mode 2, the switch is open, there is no connection with the supply. The diode D3 is reverse
biased. The flyback inductor delivers energy to the capacitor C through diode D1 . The magne-
tizing current in L3 is decreasing because the capacitor voltage is applied in reverse and flows
through D2 . That means that the L4 voltage equals the capacitor voltage and 2UC is applied to
the lamp. The result is a square wave lamp voltage.
222 / 274 
8.1 Examples in Electronic Ballasts
C +
L2 Uc L4 L3
-
Rla
D1 L1 C L2
+ -
Us S1 S2 Rla
Cp
C5
8.1.4 Cuk-converter as the principle

Figure 3 Cuk-converter with additional diode and switch gives a square wave output voltage with
which a series loaded resonant circuit is energized.
8.1.5 Charge pump
Dx Um Dy
is uc
Cin
CB
Cd Lr
Us
ua
Cr
Rla
Figure 4 Explanation of the charge pump.

Figure 4a Determination of the modes of the Charge Pump
Figure 5 Circuit with two clamp diodes to assure the sinusoidal input current waveform. (See
fig.4a)
 223 / 274
^
u a
ua
0
UB
um
us
0
is
is
ucmax
uc
ucmin
0
t0 t1 t2 t3 t4
+ uc -
Cin
Dx Dy Dr1
+
Lr1 ua Lr2 Cd
Us
Dr2
+ Cp Cr2
Rla
UB CB
-
-
224 / 274 
BIBLIOGRAPHY
Circuit description by means of four modes.
Mode 1
t0 < t < t1
At t = t0 ua has reached its peak value ûa . After t0 , ua decreases and thus diode Dy is reverse
biased. The voltage um decreases until um > us , the supply voltage during this period. Because
no current flows in or out of Cin uc is constant, until at t = t1 when um = us and diode Dx is
forward biased.
Mode 2
t1 < t < t2
During this mode Cin is charged until uc = ûa + us . Equations: uc = us − ûa cos ωs (t − t0 )
and ic = Cin ûa ωs sin ωs (t − t0 ) and ucmax = ûa + us .
Mode 3
t2 < t < t3
Dx is turned off, Dy was already off and Cin remains charged. um increases just as ua until
at t = t3 um = UB and Dy starts to conduct.
Mode 4
t3 < t < t4
Cin is discharged into CB through Dy . At t4 ua has reached its peak value and Dy is reverse
biased. The equations are:
uc = UB − ûa cos ωs (t − t0 ) ic = Cin ûa ωs sin ωs (t − t0 ) and ucmin = UB − ûa . End of one
period.
During one period a charge ∆Q flows from the supply into Cin and from Cin into CB . ∆Q =
Cin (ucmax − ucmin ) = Cin (us + 2ûa − UB ) The average current during one hf period ωs =
Cin fs (us + 2ûa − UB ) and we see that if 2ûa − UB = 0 then ωs is proportional to us . It can be
obtained by clamping ua between zero and UB because then 2ûa = UB exactly.
Bibliography
[1] W.R. Alling. Important design parameters for solid state ballasts. IEEE Trans. IA,
25(2):203–207, 1989.
[2] J. Andrade Alves, A.J. Perin, and I. Barbi. An eb with high pf for cfl. IEEE IAS, pages
2129–2135, 1996.
[3] C. Blanco, M. Alonso, E. Lopez, A. Calleja, and M. Rico. A single state fl ballast with high
pf. IEEE APEC, pages 616–621, 1996.
 225 / 274
[4] G. Chae, Y.S. Youn, and G.H. Cho. High power factor correction circuit for low-cost ebs.
Electronics Letters, 33(11):921–922, may 1997.
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228 / 274 
9
Sampled Data Modelling
9.1. Abstract
A general procedure for the description of power electronic circuit dynamics is proposed with the
intention of control system design and discrete-time system simulation. The approach is specially
suited to be used along with computer-aided analysis and synthesis software packages such as
M ATLAB. The various modelling steps are illustrated by an application to a dc/dc converter
under different control strategies.
9.2. Introduction
Models for the dynamics of power electronic systems are of crucial importance in many ap-
plications, both for assessing stability and for designing compensators to enhance stability and
performance.
Power electronic converters present almost invariably important non-linear properties. In
particular, the cyclically operation of semiconductor switches – which are typical components
intended to vary circuit interconnections – introduces many difficulties that are significant for
control design, especially when the converter under consideration has several changes of modes
of operation. Therefore, the derivation of simplified approximate models for power electronic
systems, preferably linear time-invariant descriptions, has challenged engineers for many years
and still requires further investigations.
Two ways to obtain models are widely accepted – continuous or discrete approach. Continu-
ous models can be easily derived when it is reasonable to replace the varying quantities by their
average values over a switching period, which is generally true for converters wherein current
and voltage ripples are small. Averaging techniques lead to different types of models (equivalent
averaged circuit, state-space averaging, etc.), see (Kassakian et al. 1991). However, the averaged
circuits are only reliable for frequencies well below half the switching frequency, and sometimes
they can not explain certain oscillations in instable systems, see (Perrault & Verghese 1997).
229
Chapter9 Sampled Data Modelling
Discrete-time – or sampled-data – modelling provides a general, systematic, approach for the

mathematical description of cyclically switched converters. According to this method, when the
converter has various modes of operation, each mode must be described by its state equations,
completed by the side constraints for the beginning and the end of the modes. This large-signal
description leads to non-linear recurrence equations linking the state of the system at a chosen
sampling period (normally the period of a switching cycle). The linearization about an operation
point provides then a discrete model of first order in a way that allows standard control design
methods to be applied.
Sampled-data modelling does not require any particular assumption and, in principle, the
approach is able to describe the system behaviour over a wide range of frequencies up to half the
sampling frequency. Of course, the accuracy of the resulting linear discrete models depends on
how the first-order derivatives of the non-linear large-signal functions are evaluated. For instance,
in the case where the derivatives can be evaluated analytically, therefore exactly, the small-signal
model will be an exact linearization, therefore an approximation of first order, of the non-linear
large-signal system description. It should be kept in mind that the the non-linear equations are,
in turn, also an approximation of the real converter.
For that reason, a main issue in sample-data modelling consists on the inclusion in the non-
linear equations of all the effects that are likely to be significant (also parasitics, dynamics of
perturbations, etc.), without making the description too complex to work with at the moment of
linearization. If, however, the behaviour of the converter is not sufficiently addressed through the
large-signal description, this will result inevitably in accuracy limitations for the linear models
when characterising the system over the whole frequency range up to half the sampling fre-
quency. Nevertheless, this lack of accuracy is not a fundamental inadequacy of the discrete-time
approach, rather an expected consequence of over-simplifications in the first modelling phase.
The non-recognition of this simple fact can lead to misinterpretations, as in (Tymerski 1996) for
instance.
A detailed procedure for the general sampled-data representation of power electronic circuit
dynamics is given in this paper. It leads, via compact and powerful notation, to disciplined mod-
elling for large-signal numerical simulations and to the derivation of small-signal linear models
that describe perturbations about a nominal cyclic steady state.
Thus, starting from fundamental state-space techniques, the following approach has been
chosen:
Section 2 and Section 3 introduce a general formulation aiming at a straightfor-

ward discrete-time system description of cyclically switched converters.
Next, Section 4 places emphasis on an analytical method, through which the
derivation of the system matrices can be carried out systematically, being especially
suited to be used within the context of computer-aided analysis and design software
tools such as M ATLAB.
Numerical techniques which complement the proposals in Section 4 are briefly
sketched in Section 5.
Section 6 refers to application examples. By taking the properties of a simple
dc/dc converter under different control strategies explicitly into account, the details
230 / 274 
9.2 Introduction
related to the sampled-data modelling methodology are made clear.

Supplementary techniques are summarized in appendices. M ATLAB m-files are
also provided to be considered along with the application examples.
Nomenclature:
Notational distinction is made between scalars, for instance x, and vectors, for instance − x . Matri-
ces are represented by upper-case names, such as A −
, or given between brackets [ ]. Appendix A
introduces functions like f− (x), f (x ), f (x ) and their derivatives. If a lower-case name represents
− − −
a variable that may be time dependent, such as (continuous-time) x(t) or (discrete-time) x(tk ),
then the corresponding upper-case name, X in this case, is normally used to denote the nominal
periodic steady-state value related to this variable.
 231 / 274
Modelling 3
2 Power Electronic Circuits as Cyclically Switched

Systems
A general sampled-data representation of power electronic circuit dynamics is presented in
this section, being based on the notation and the ideas in (Verghese et al. 1986). State-
9.3.
space PowerareElectronic
techniques employed toCircuits as Cyclically
derive an equivalent Switched
nonlinear Systems
discrete-time model that
describes the circuit exactly.
A general sampled-data representation of power electronic circuit dynamics is presented in this
section, being based on the notation and the ideas in (Verghese et al. 1986). State-space tech-
niques are employed to derive an equivalent nonlinear discrete-time model that describes the
2.1 Continuous-time description of circuit operation
circuit exactly.
We consider a power electronic system model that is characterized as follows. The system
9.3.1 Continuous-time
operates cyclically. In the k-th description of circuit
cycle, extending from operation
time t = tk to time t = tk+1 , the
n-dimensional state vector x (t) of the system is governed by a succession of N linear
− system model that is characterized as follows. The system oper-
We consider a power electronic
time-invariant state-space
ates cyclically. In equations
the k-th cycle, of the
extending form
from time t = t to time t = t , the n-dimensional
k k+1
state vector − x (t) of the system is governed by a succession of N linear time-invariant state-space
equations
dx of the form
(t)
−
=A x (t) + B
−i −
u (t); tk + Ti−1,k < t ≤ tk + Ti,k ,
−i −
(1)
dt
dx−
(t)
=A x (t) + B
−i −
u (t); tk + Ti−1,k < t ≤ tk + Ti,k ,
−i −
(9.3.1)
dt
one for each of the N switch configurations in the k-th cycle. The state x −
(t) is continuous
across
one foreach
each change
of the Ninswitch
switch configuration,
configurations i.e.,k-th
in the thecycle.
final The
statestate
in one
x (t)configuration is the
is continuous across
−
initial state in the next.
each change in switch configuration, i.e., the final state in one configuration is the initial state in
the The
next.index i in Eq.(1) runs from one to N , with
The index i in (9.3.1) runs from one to N , with
TT0,k
0,k
=
= 00
ttk+1
k+1
=
= ttkk +
+ TTN,k
N,k
as illustrated in figure 9.3.1. It goes without saying that TN,k is the duration of the k-th cycle.
as illustrated in Fig. 1. It goes without saying that TN,k is the duration of the k-th cycle.
tk tk+1
1st conf. 2nd conf. i-th conf. N-th conf.
-
t
T1,k
-
T2,k
-
TN −1,k
-
TN,k
-
Figure 1: Transition
Figure 9.3.1: Transitiontimes
timesatatwhich
which the switch configuration
the switch configurationchanges,
changes,related
related to the
to the begin-
beginning
ning of the k-th
of the k-th cycle. cycle.
232 / 274 
9.3 Power Electronic Circuits as Cyclically Switched Systems
The variables Ti,k in Fig. 1 may be termed (relative) transition times, and they will be col-
lected into the N -vector T−k , with
 
T1,k
 
T−k =  ...  .
TN,k
The m-dimensional vector − u (t) is a vector of time functions that typically represents sources
acting on the circuit, and A −i
and B−i
in (9.3.1) are n × n and n × m matrices, respectively.
For a given − x (tk ) the evolution of the system in (9.3.1) in the k-th cycle is completely de-
termined by the source waveforms and the transition times at which the switch configurations
change. In the cases of interest to us these source waveforms and transition times are in turn
governed, directly or indirectly, by a set of independent determining variables. Some of the de-
termining variables serve to impose directly all the source waveforms in the vector − u (t) for the
k-th cycle. Aiming at notational simplicity, it is advantageous to assemble all the independent
determining variables into a vector labeled − p k.
The transition times Ti,k depend on external control action and on the system state. There-
fore, they are essentially of two types. One type of transition may be directly controlled by
external control action; this is usually the situation when, for example, thyristors are turned on
or transistors are turned on or off (the exceptions correspond to those thyristors or transistors for
which these particular operations have been made functions of the system state and are thus no
longer direct functions of external control action). The corresponding transition times are then
directly and explicitly determined by some of the determining variables.
The other type of transition only occurs when the system state reaches particular boundary’s
or threshold conditions; this is the case with, for example, thyristors turning off (threshold con-
dition: zero thyristor current) or diodes turning on (threshold condition: zero diode voltage) or
off (threshold condition: zero diode current). This type of transition is thus only indirectly or
implicitly controlled by the determining parameters via the effect of external control action on
the state trajectories of the system.
The expressions that give the − u (t) in the the k-th cycle in terms of the entries of − p k are
typically simple and explicit. Those that give the Ti,k in terms of the entries of − p k can range from
simple and explicit to complicated and implicit; simple explicit expressions are to be expected
for the directly controlled transitions, while complicated implicit expressions are the norm for
the indirectly controlled transitions.
Despite the distinction between the two types of transition times, the equations relating the
N -vector T−k of transition times to the vector − p k of the determining variables, for both the directly
and indirectly controlled cases and for any given − x (tk ), can be seen to be summarized in a set of
N equations that has the form
c (x (t ), p , T )
− − k −k −k
=−
0. (9.3.2)
From now on we shall refer to this set as the constraint equation for the system.
 233 / 274
c (·, ·, ·) is actually
Note that the compact notation −
 
c1 (·, ·, ·)
 .. 
c (·, ·, ·) = 
− . ,
cN (·, ·, ·)
where each of the ci (·, ·, ·) is a scalar function of three vector arguments, which determines the
transition time Tk,i .
9.3.2 Large-signal sampled-data description

On integrating the governing description given by (9.3.1) over the interval from tk to tk+1 and
u (t) in the k-th cycle is directly determined by −
noting that − p k , a sampled-data description of the
form
x (t )
− k+1
= f− (x (t ), p , T )
− k −k −k
(9.3.3)
is obtained. Again note that the symbol f− (·, ·, ·) is being used to denote an n-vector, each of
whose entries is a scalar function of three vector arguments.
For given − x (tk ) and specified determining variables − p k the constraint (9.3.2) may be used to
determine T−k , typically by an iterative numerical computation (since some of the component
functions of (9.3.2) will typically be implicit non-linear equations). Substitution of the resulting
T−k in (9.3.3) then yields the the state − x (tk+1 ) at the beginning of the next cycle. The process
is then continued forward. We thus have in (9.3.2-9.3.3) an exact large-signal sampled-data
description of the dynamics of any power electronic circuit that can be modelled via (9.3.1).
It is often the case that one also wants to model the evolution of certain variables other than
the state variables. For example, one may wish how the average value of some variable, taken
over a cycle, varies as one goes from cycle to cycle, or one may be interested in the dynamic
evolution of the peak value in each cycle of some variable. Any auxiliary variable in which the
value for the k-th cycle is determined entirely by system behavior in the k-th cycle is completely
determined by − x (tk ), −
p k and T−k . Collecting all such auxiliary variables of interest into a vector
y , one can obtain an equation of the form
−k
−k
y =−
h (x (t ), p , T )
− k −k −k
(9.3.4)
to be considered along with (9.3.2) and (9.3.3). Again, the constraints in (9.3.2) can be used to
h (·, ·, ·) represents a vector
eliminate T−k from (9.3.4) as needed. Note as before that the notation −
function of three vector arguments.
234 / 274 
9.4 Perturbations Around a Nominal Cyclic Steady State
9.4. Perturbations Around a Nominal Cyclic Steady State

Finding the operating point is usually the first step in the analysis of power electronic circuits.
After this has been accomplished, it is possible to linearize the system about its equilibrium state
to obtain a linear discrete-time model for small-signal performance evaluations, such as stability
and transient response.
9.4.1 Periodic operating point

If a power electronic system model of the form given by (9.3.1) has a nominal cyclic operating
point, then
x = f− (x
−
, p , T ),
− − −
(9.4.1)
and
c (x , p , T ) = −
− − − −
0 (9.4.2)
for the functions f− (·, ·, ·) and −

c (·, ·, ·) defined in (9.3.2-9.3.3), where the vectors −
p and T− denote
the periodic steady-state values of the determining variables and transition times:
p
−k−1
= − p k+1 = · · · = −
pk = − p, (9.4.3)
T−k−1 = T−k = T−k+1 = · · · = T− , (9.4.4)
(with corresponding constant cycle duration TN,k = TN ) and
x (t )
− k−1
=− x (kTN ) = · · · = −
x (tk ) = − x. (9.4.5)
The conditions in (9.4.1-9.4.2) follow from the fact that a cyclic steady state is characterized by
values of the determining variables and initial state such that the system, after excursions and
changes of switch configuration, returns at the end of the cycle to the same state.
9.4.2 Dynamics of perturbations from steady state

For the purpose of analyzing the dynamics of variations about a particular nominal cyclic steady
state, we shall use the following notation to represent perturbations of the various system vari-
ables from their steady-state values in (9.4.3-9.4.5):
x
−k
x (tk ) − −
= − x
q
−k
pk − −
= − p (9.4.6)
r
−k
= T−k − T− .
Note that the perturbation in the duration of the kth cycle, Tk,N − TN , is actually the last compo-
r k.
nent of −
 235 / 274
From (9.3.2-9.3.3) we then get
x
−k+1
= f− (x + x ,p + q ,T + r ) −−
− −k − −k − −k
x (9.4.7)
with
c (x + −
− −
x k, −
p +−
q k , T− + −
r k) = −
0. (9.4.8)
Carrying out (multivariable) Taylor series expansions in (9.4.7-9.4.8), retaining only linear terms,
and using (9.4.6) yields what is essentially the small-signal model (though still in implicit form):
h i h i h i
x
− k+1 = ∂f /∂x x k + ∂f /∂p q k + ∂f /∂T r k
− − − − − − − − −
(9.4.9)
and
h i h i h i
∂c /∂x
− − −
x k + ∂c /∂p q k + ∂c /∂T r k = 0 .
− − − − − − −
(9.4.10)
The compact notation makes things look simple,hbut power i over the symbols requires under-
standing them completely. The (Jacobian) symbol ∂f− /∂x −
is been used to denote the partial
derivative of the vector f− (·, ·, ·) with respect to its first vector argument (see App. A and App. B)
evaluated at the cyclic steady state specified by − x,− p , and T− . Similar definitions hold for the other
h i
matrices of derivatives in (9.4.9) and (9.4.10). Note that ∂c /∂T
− −
is a N × N square matrix.
The results in (9.4.9) and (9.4.10) can be combined by solving for − r k from (9.4.10) and
substituting the resulting expression in (9.4.9) to get
x
−k+1
= F−0−
xk + G q ,
−0−k
(9.4.11)
where
h i h ih i−1 h i
F−0 = ∂f− /∂x
−
− ∂f /∂T
− −
∂c /∂T
− −
∂c /∂x
− −
(9.4.12)
and
h i h ih i−1 h i
G 0 = ∂f /∂p − ∂f /∂T ∂c /∂T ∂c /∂p . (9.4.13)
− − − − − − − − −
This constitutes the final form of the linear time-invariant sampled-data model for perturbations
of the system away from a cyclic steady state. In particular, the periodic steady state is locally
asymptotically stable (without further control action) iff all eigenvalues of F−0 have magnitude
less than one.
y =−
Perturbations of the auxiliary variables in (9.3.4) around their steady-state values − h (x , p, T )
− − −
can also be readily modeled. By defining in analogy to (9.4.6)
−k
yk − −
v =− y, −
y =−
h (x , p , T ),
− − −
(9.4.14)
236 / 274 
9.4 Perturbations Around a Nominal Cyclic Steady State
it follows that (by the same procedure of Taylor expansion in (9.3.4), truncation at linear terms,
and by using (9.4.10))
−k
v = H−0−
x k + K−0−
qk (9.4.15)
where
h i h ih i−1 h i
H−0 = ∂h /∂x − ∂h
− −
/∂T ∂c
− −
/∂T
− −
∂c /∂x ,
− −
(9.4.16)
and
h i h ih i−1 h i
K−0 = ∂h /∂p
− −
− ∂h /∂T
− −
∂c /∂T
− −
∂c /∂p
− −
. (9.4.17)
 237 / 274
9.5. Looking for the Cyclic Steady State

A cyclic steady state of the power electronic circuit model is characterized by the conditions
p (the determining variables) are supposed to
established at (9.4.1-9.4.2). Since the elements of −
be well known, the problem of finding a periodic operating point can be stated as one of finding
x and T− , for which both equations
stationary solutions −
f− (x , p, T ) − −
− − −
x =−
0 (9.5.1)
c (x , p , T ) = −
− − − −
0 (9.5.2)
are fulfilled simultaneously.

The solution of (9.5.1) and (9.5.2) can be obtained by iterative computation using the Newton
formula (see App. B). Hence, starting with initial values − x 0 and T− 0 , the m + 1 iteration step is
given by
" # " #
x m+1
x m h i−1
− = − − J− (x m m
, p, T ) ·R (x m , p , T m ), (9.5.3)
T− m+1 T− m − − − − − − −
where J− is the Jacobian and R

−
the residue of the set of (9.5.1-9.5.2) :
" #
∂f− /∂x − I ∂f− /∂T−
− −
J− = (9.5.4)
∂c /∂x
− −
∂c /∂T
− −
and
" #
f− − −
x
R = . (9.5.5)
− c
−
The solution of (9.5.1) and (9.5.2) is found when
||R
−
|| < , a small number.
Notice that the submatrices of the Jacobian also provides the basis for the description of
perturbations about the steady state, (9.4.11-9.4.17). Therefore, solving the steady state problem
by the Newton method implies that the small-signal model will be partially constructed.
Numeric algorithms for determining the cyclic steady state (and the partial derivatives in
(9.5.4)) are well established (Lee et al. 1979). However, a better insight of cyclic power elec-
tronic converters will be acquainted if the expressions of the Jacobian matrix are determined
through an analytical formulation (Lutz & Grotzbach 1985). For this reason, an analytical ap-
proach aiming at determining the derivatives in (9.5.4) will be discussed in the following.
238 / 274 
9.5 Looking for the Cyclic Steady State
9.5.1 Sensitivity matrices

As it will be clear in the next section, for the purpose of evaluating analytically the Jacobian
matrix in (9.5.4), we have to deal with the dependency of the state vector at the transient time Ti
from variations in the state vector at the transition time Tj , and from variations in the transition
time Tj self. Otherwise stated, it is necessary to look for expressions for the derivatives
∂x (T )
− i
∂x (T )
− i
and .
∂x (T )
− j
∂Tj
(Note: since we focus on the steady-state environment, from now on the absolute time tk will
be chosen equal to zero, and the inessential subscripts k will be dropped, without further loss of
generality).
In order to compute such derivatives, it is advantageous to introduce a sensitivity matrix
Φ
−i
(t), which is obtained by differentiating the state vector within a switch configuration with
respect to the initial state value:
∂x
−
(t)
Φ
−i
(t) = ; Ti−1 < t ≤ Ti . (9.5.6)
∂x (T )
− i−1
By rewriting (9.3.1) in its integral form,

Z t
x (t) =
−
g (x , u , τ )dτ + −
−i − −
x (Ti−1 ) , Ti−1 < t ≤ Ti , 1 ≤ i ≤ N ; (9.5.7)
Ti−1
where
g (x , u , t) = A
−i − −
x (t) + B
−i −
u (t),
−i −
(9.5.8)
it follows that1
Z
∂x (t) t ∂g
i (x , u , τ ) ∂x (τ )
− − − − −
= · · dτ +−I . (9.5.9)
∂x (T ) ∂x ∂x (T )
− i−1 Ti−1 − x (T ) − i−1
− i−1
Comparing (9.5.6) to (9.5.9) leads to

dΦ i (t) ∂g
i (x , u , t)
−
= − − − ·Φ
−i
(t); Φ (T ) = −I .
−i i−1
(9.5.10)
dt ∂x
− x (T )
− i−1
1
Hint: Leibniz’s theorem for differentiation of an integral:
Z b(c) Z b(c)
d ∂f (x, c) db da
f (x, c)dx = dx + f (b, c) − f (a, c) .
dc a(c) a(c) ∂c dc dc
 239 / 274
In view of (9.5.8)

∂g
i (x , u , t)
− − −
=A
−i
, (9.5.11)
∂x
− x (T )
− i−1
and the solution of (9.5.10) is found to become (see App. C) :
Φ
−i
(t) = exp{A
−i
· (t − Ti−1 )}; Ti−1 < t ≤ Ti , 1 ≤ i ≤ N. (9.5.12)
Consider now the expression for the derivative
∂x (T )
− i
, with i > j.
∂x (T )
− j
Since the final state in one switch configuration is the initial state in the next, by using the chain
rule of differentiation, and in view of (9.5.6), the above derivative can be expanded to
∂x (T )
− i
∂x (T )
− i
∂x (Ti−1 ) ∂x (Tj+1 )
= · − · ··· · − ;
∂x (T )
− j
∂x
−
(Ti−1 ) ∂x (Ti−2 )
−
∂x
−
(Tj)
= Φ (T ) · Φ
−i i
(T ) · · · · · Φ
−i−1 i−1
(T );
−j+1 j+1
0 ≤ j < N, j < i ≤ N. (9.5.13)
Another relation of importance to us is the one which describes the dependency of the state
vector from variations in the transition times, that is,
∂x (T )
− i
.
∂Tj
Now the distinction between i = j and i > j is conceptually relevant. If i = j, then Ti has to
be seen as an upper limit time, and the system is supposed to present no perturbations until (and
including) the transition time previous to Ti . Hence, with regard to (9.5.7),
∂x (T ) Z Ti
− i ∂
= g (x , u , τ )dτ + −
−i − −
x (Ti−1 )
∂Ti ∂Ti Ti−1
which implies2
∂x (T )
− i
=−
g i (x , u , T ), 1 ≤ i ≤ N.
− − i
(9.5.14)
∂Ti
2
See footnote 1.
240 / 274 
9.5 Looking for the Cyclic Steady State
If i > j, then Tj has to be considered as a transition time inside the history of the system, and
the effects of variations in Tj propagate until the upper limit time Ti . Once again the chain rule
of derivation can be used :
∂x (T )
− i
∂x (T )
− i
∂x (Ti−1 ) ∂x (Tj+1 ) ∂x (Tj )
= · − · ··· · − · − . (9.5.15)
∂Tj ∂x (T ) ∂x
− i−1
(T )
− i−2
∂x (T )
− j
∂Tj
In view of (9.5.7), and from the fact that a variation in Tj has influence in two circuit topologies,
the latest derivative in (9.5.15) is found to become3 :
"Z Z Tj #
∂x
−
(Tj) ∂ t
= lim g (x , u , τ )dτ +
−j+1 − −
g (x , u , τ )dτ + −
−j − −
x (Tj−1 ) ,
∂Tj t→Tj ∂Tj Tj Tj−1
= −g (x , u , T ) + −
−j+1 − − j
g j (x , u , T ), 1 ≤ j < N.
− − j
(9.5.16)
Finally, the results from (9.5.14-9.5.16) yield

 h i

 Φ i (Ti ) · Φ (T ) · · · · · Φ (T ) · −g g j (x
(x , u , T ) + − , u, T ) ,

 − −i−1 i−1 −j+1 j+1 −j+1 − − j − − j
∂x (Ti)
−
= 1 ≤ j < N, j < i ≤ N ;
∂Tj 


 g (x , u , T ), 1 ≤ j ≤ N, i = j.
−j − − j
(9.5.17)
Obviously, for j > i, both (9.5.13) and (9.5.17) are identical −

0.
9.5.2 Analytical evaluation of Jacobian matrices

Aiming notational clarity, we shall rewrite (9.5.4) as follows:
" #
∂x (TN )/∂x (0) − I ∂x (TN )/∂T
J− = − − − − − , (9.5.18)
∂c /∂x
− −
(0) ∂c /∂T
− −
because
x (0) ≡ −
−
x (TN ) ≡ f− (x
x and − , p, T )
− − −
emphasizes more sharply that we are focusing on the state vector at the beginning and at the end
of the cyclic steady-state period.
In view of (9.5.13)
∂x (T )
− N
=Φ (T ) · Φ
−N N
(T
−N −1 N −1
) · ··· · Φ (T ),
−1 1
(9.5.19)
∂x
−
(0)
3
See footnote 1.
 241 / 274
and with this, the computation of the upper left submatrix in (9.5.18) is determined.
The right upper submatrix in (9.5.18) can also be evaluated by using (9.5.17). Its i-th column
is found to become


 Φ (T ) · Φ (T ) · ··· · Φ (T )·

 −Nh N −N −1 N −1 −i+1i i+1
∂x (T ) 
− N · −g (x , u , T ) + −
−i+1 − − i
g i (x , u, T ) , 1 ≤ j < N
− − i
= (9.5.20)
∂Ti 



 g i (x , u , Ti ), i = N.
− − −
h i
For the submatrix ∂c /∂x (0) the chain rule also applies. The i-th row of this submatrix can
− −
be expressed as being:
∂ci ∂ci
= · Φ i (Ti ) · Φ (T ) · · · · · Φ
−i−1 i−1
(T ); 1 ≤ i ≤ N.
−1 1
(9.5.21)
∂x
−
(0) ∂x (T ) −
− i
The derivation of the remaining submatrix, which also depends on the function − c , is a little
more subtle. With regard to the results in (9.5.17), this last submatrix is a lower-triangular one,
whose ij-elements are of the form:


 ∂ci /∂T |T =Ti +



 + [∂ci /∂x (T )] · −
g i (x , u , T ); 1 ≤ i ≤ N, j = i

 − i − − i




h i  ∂ci /∂T |T =Tj +
∂c /∂T
− − ij
= + [∂ci /∂x (T )] · Φ (T ) · Φ (T ) · · · · · Φ (T )· (9.5.22)

 h − i −i i −i−1 i−1
i −j+1 j+1


 · −g j+1 (x , u , Tj ) + g j (x , u , Tj ) ; 2 ≤ i ≤ N, 1 ≤ j < i


 − − − − − −




 0 ; 1 ≤ i < N, j > i.
It is worthwhile to notice that in all submatrices only the sensitivity matrix Φ

−i
, the functions
g and the derivatives of the function −
−i
c appears. Therefore the Jacobian can be evaluated very
easily, and moreover by steps.
242 / 274 
9.6 Numerical Evaluation of Derivatives
9.6. Numerical Evaluation of Derivatives

Once the cyclic steady-state operation point has been found, the sensitivity of the solution to
changes in the determining variables (circuit element values, for instance) should be determined
for the purpose of constructing the small-signal model ((9.4.11-9.4.17)).
By differentiating (9.5.1-9.5.2) with respect to one determining variable pj at a time, it fol-
lows that
" # " #
∂f− ∂f− ∂x ∂f ∂T
= − −−I · − − −
· −, (9.6.1)
∂pj ∂x
−
∂pj ∂T− ∂pj
" # " #
∂c
−
∂c ∂x ∂c ∂T
= − − · − − − · −, (9.6.2)
∂pj ∂x
−
∂pj ∂T− ∂pj
where the matrices between [ ] are supposed to be evaluated at the operating point. In fact, in
view of the results of the previous sections, these matrices are already available. Therefore, the
problem reduces on finding
∂x
−
∂x (0) ∂T
≡ − and − , (9.6.3)
∂pj ∂pj ∂pj
i.e, the dependency of the state vector and transition times at the steady state from variations in
the parameter pj .
An analytical solution for (9.6.3) is not always straightforward in account of the switching
sequence. For this reason we will propose a numerical resolution.
A classical approach for computing derivatives consists on perturbating the parameter pj by
∆pj and finding the resultant variations in −x or T− (you are right, dear reader: for each determin-
ing variable at a time, a new periodic steady state has to be computed after each perturbation ∆pj ,
according to the procedure in Section 4, indeed!). Obviously, it is a brute-force evaluation of the
derivatives, where it is important to select the appropriate increments ∆pj . Some experimenta-
tion with the increment size is advisable, since the accuracy of the partial derivatives depends on
it. If the function varies rapidly, a very small increment is clearly required. On the other hand, if
the increment is chosen needless small, then the accuracy decreases because of numerical com-
putation errors; i.e., a difference quotient assumes numerically the value close to 0/0. Study
on the increment size and its effect on the results also has physically significant implications.
If the linearized system shows high sensitivity to incremental size, then this points out that the
non-linear system changes its behavior rather rapidly as it moves alway from its equilibrium, and
the result obtained for the linearized system is only valid for very small perturbations about the
equilibrium.
Of course, a similar numerical approach could be followed, aiming at the determination of
the cyclic steady state (and the partial derivatives related to it) (Lee et al. 1979). However
such a formulation results in high computational costs if compared to the analytical method of
Section 4.
 243 / 274
6 Application Examples
In this section the methodology presented in the preceding sections for modelling cyclically
switched systems will be highlighted through step-by-step examples concerning a simple
dc/dc converter. First, the method will be applied to the particular case of open-loop duty-
ratio control of an up/down converter. Next, the sampled-data modelling approach will
be demonstrated by operating the same converter under feed-forward control and current-
mode control. In all cases,9.7. Application
general equations forExamples
steady-state and dynamic performance
are obtained. The resulting equations yield discrete recurrence relationships which can be
In this section
readily used forthecircuit
methodology presented
simulation with thein the preceding
Matlab sections
software for modelling
program. Numerical cyclically
results
switched systems will be highlighted through step-by-step examples
from simulations are provided, together with the corresponding m-files. concerning a simple dc/dc
converter. First, the method will be applied to the particular case of open-loop duty-ratio control
of anParameter values forNext,
up/down converter. the the
converter under modelling
sampled-data consideration have will
approach beenbetaken from (Kas-
demonstrated by
sakian et al. 1991), which is a good reference book on modelling techniques
operating the same converter under feed-forward control and current-mode control. In all cases, in Power
Electronics.
general Thefor
equations reader is encouraged
steady-state to compare
and dynamic the results
performance presentedThe
are obtained. here to the equa-
resulting exam-
ples yield
tions in (Kassakian et al. 1991),
discrete recurrence where thewhich
relationships samecanconverter
be readilyis used several
used for times
circuit to illustrate
simulation with
various aspects of dynamic modelling and control design. Other, more
the M ATLAB software program. Numerical results from simulations are provided, together evolved, application
with
examples can be found
the corresponding m-files. in (Duarte & Willaert 1994) and (Duarte et al. 1997).
Parameter values for the converter under consideration have been taken from (Kassakian et
al. 1991), which is a good reference book on modelling techniques in Power Electronics. The
6.1 Up/down converter
reader is encouraged to compare the results presented here to the examples in (Kassakian et al.
1991),
For thewhere the of
purpose same converterthe
illustrating is proposed
used several times toprocedure,
modelling illustrate various aspects(or
an up/down ofbuck/boost)
dynamic
modelling
converterandwillcontrol design. Other,
be considered. The more
powerevolved,
circuit application examplestocan
is build according thebecircuit
found in (Duarte
schematic
&inWillaert
Fig. 2, 1994) andfollowing
with the (Duarte etcomponent
al. 1997). values
9.7.1 L Up/down
= 250µH, converter
C = 220µF, and R = 2Ω, (47)
For the operated
being purpose ofatillustrating the proposed
a fixed switching modelling
frequency procedure,
of 50kHz, whichan implies
up/downa (or buck/boost)
period of Ts =
converter will be considered. The power circuit
20µs. The nominal input voltage and output power areis build according to the circuit schematic in
figure 9.7.1, with the following component values
Us = 12V and Po = 40W. (48)
L= 250µH, C = 220µF, and R = 2Ω, (9.7.1)
beingAsoperated
a first approximation, it is assumed
at a fixed switching frequencythat the transistor
of 50kHz, and theadiode
which implies periodfunction
of Ts =as20µs.
ideal
switches,
The nominaland thatvoltage
input there is
andnooutput
parasitics
powerorare
other non-linearities in the lumped components.
We will only take into consideration the so-called continuous-conduction mode in which
Us = 12V and Po = 40W. (9.7.2)
the instantaneous inductor current does not fall to zero at any instant. Therefore, on the
s sq s s s
p psp
#

L

us uC uo
"!
C R
s s s s
iL
Figure 9.7.1: Up/down converter.

Figure 2: Up/down converter.
As a first approximation, it is assumed that the transistor and the diode function as ideal
switches, and that there is no parasitics or other non-linearities in the lumped components.
244 / 274 
9.7 Application Examples
We will only take into consideration the so-called continuous-conduction mode in which the
instantaneous inductor current does not fall to zero at any instant. Therefore, on the assumption
of ideal switches, there will be only two different circuit topologies, as shown in figure 9.7.2,
which also implies two transition times within the switching period. figure 9.7.3 shows typical
time wave-forms over a generic period. The definition of the duty ratio per cycle is shown, as
16 MiniPE
well.
r r r r c r r r

L L

us uC C R uo us uC C R uo
r r r r c r r r
iL iL
(a) (b)
Figure9.7.2:
Figure 3: Operating
Operatingmodes
modesof the circuit
of the in Fig.
circuit 2, under
in figure 9.7.1,theunder
assumption of ideal switches;
the assumption of ideal
(a) transistor
switches; on, (b)on,
(a) transistor transistor off. off.
(b) transistor
assumption of ideal switches, there will be only two different circuit topologies, as shown
in Fig. 3, which also implies two transition times within the switching period. Fig. 4 shows
typical time wave-forms over a generic period. The definition of the duty ratio per cycle is
9.7.2
shown, Duty-ratio
as well. control
If the transistor in figure 9.7.1 is turned on periodically and operated with constant duty-ratio D,
then it follows from the Vs-balance for the inductor L that, in the case of constant input voltage
u6.2 Duty-ratio control
s (t) ≡ Us , the average output voltage Uo is given by
If the transistor in Fig.D2 is turned on periodically and operated with constant duty-ratio
Uo =ithufollows
D, then − 0 the
C (t)i =from Us , Vs-balance for the inductor L that, in the case of constant
(9.7.3)
D
input voltage us (t) ≡ Us , the average output voltage Uo is given by
where D0 = 1 − D (note the polarity reversal in Eq.(9.7.3)). Therefore, the duty ratio must be
set at a nominal value of D
Uo = huC (t)i = − ′ Us , (49)
D
D = −Ur /(−Ur + Us ) (9.7.4)
where D′ = 1 − D (note the polarity reversal in Eq.(49)). Therefore, the duty ratio must
in order to obtain a desired average output voltage Uo = Ur < 0. For instance, in order to
be set at a nominal value of
establish the nominal operation conditions in (9.7.2), which implies Ur = −9V , the duty ratio
for the transistor in figure 9.7.1 should be set to D = 0.43.
D = −U
Certainly, r /(−U
if the dutyr + Us )is changed, or perturbations occur at the input voltage, the voltage
ratio (50)
at the output will reach another average value after a transient.
in order to obtain a desired average output voltage Uo = Ur < 0. For instance, in order to
establish
Basic the nominal
modelling operation conditions in Eq.(48), which implies Ur = −9V , the duty
equations
ratio for the transistor in Fig. 2 should be set to D = 0.43.
It is customary and convenient in electrical networks to adopt inductor currents and capacitor
Certainly, if the duty ratio is changed, or perturbations occur at the input voltage, the
voltages as state variables. In the case of the circuit in figure 9.7.1, the natural choice for the
voltage at the output will reach another average value after a transient.
 245 / 274
6.2.1 Basic modelling equations
It is customary and convenient in electrical networks to adopt inductor currents and ca-
pacitor voltages as state variables. In the case of the circuit in Fig. 2, the natural choice
for the state-space vector is then
Modelling 17
capacitor voltage (V) inductor current (A)
6 uC 6
−9.2 10.0
−9.0 9.0
−8.8 iL 8.0
−8.6 7.0
−8.4 6.0
0 dk Ts 0.5Ts Ts
T1,k - time
- T2,k
-
tk tk+1
Figure 9.7.3:
Figure 4: Typical
Typicalwave-forms
wave-formsover
overa aswitching
switchingperiod
periodforfor an
an up/down
up/down converter in
converter in
continuous-conduction mode. Notice that the capacitor voltage is negative.
continuous-conduction mode. Notice that the capacitor voltage is negative.
The matrices related to the set of state-space differential equations for the two possible
circuit configurations
state-space vector is thenin Fig. 3 are found to be, in view of Eq.(1),
    
iL0(t) 0 1/L
xA(t) =  .    (9.7.5)
−− 1 =   , B 1 u (t) = 
− −
 us (t) = b 1 us (t);
−
(52)
uC0(t)−1/RC 0

The matrices related 
to the set of state-space 
differentialequations for the two possible circuit
0 1/L 0
configurations in figure 9.7.2 are found
 to be, in view of (9.3.1),
A
−2
=   , B u (t) =   
−2 − 
 us (t) = 0 .
−
(53)
0−1/C 0 −1/RC 1/L 0
A−1
=   , B 1 u (t) = 
− −
 us (t) = b 1 us (t);
−
(9.7.6)
−1/RC is supposed to be held
The switching0 frequency 0 constant, but the duty ratio d is normally
   
a directly controlled 0 parameter.
1/L Also the input voltage 0 us (t) in Fig. 2 can be seen as an
independent
A 
= parameter.  , toB keep
Therefore, = notation
u (t) the  us (t)proposed
=− 0. in Sec. 2.1, the(9.7.7)
set of
−2 −2 −
transition times −1/C
and determining
−1/RC variables under consideration
0 will be

The switching    held constant, but the duty ratio d is normally
T1,kfrequency is supposedus (tto
k)
be
 voltage us (t) in figure 9.7.1 can be seen as an
a directly =
T−k controlled

parameter. Also
 , and p k = 
−
 the input
, (54)
independent parameter.
T2,k Therefore, to keep
dk the notation proposed in Sec. 2.1, the set of transition
times and determining variables under consideration will be
   
where dk denotesT1,k the duty ratio of the
us (ttransistor
k)
at each switching period and us (tk ) is the
value Tofk the
=  input voltage
, and −at the
pk = beginning
  of
, a switching cycle. (9.7.8)
−
According Tto 2,kEq.(2) and with regarddk to Fig. 4, the constraint equation for the system
can be expressed as being
246 / 274 
T1,k − dk Ts


c =
−k


 = 0.
−
(55)
T2,k − Ts
where dk denotes the duty ratio of the transistor at each switching period and us (tk ) is the value
of the input voltage at the beginning of a switching cycle.
According to (9.3.2) and with regard to figure 9.7.3, the constraint equation for the system
can be expressed as being
 
T1,k − dk Ts
c =
−k
 = 0.
−
(9.7.9)
T2,k − Ts
Notice that both transition times are directly controlled by external control action.
Large-signal model
Under the supposition that eventual perturbations in the input voltage can be modelled by step
changes that take place only at the beginning of a switching period, the exact discrete-time so-
lution for the set of differential equations given by (9.7.5-9.7.9) is found to be (cf. App. C)
:
x (T1,k ) = Φ
−
(T )x (t ) + −b 1 us (tk ) dk Ts ,
−1 1,k − k
(9.7.10)
x (T ) = Φ
− 2,k
(T )x (T ), −
−2 2,k − 1,k
x (tk+1 ) = − x (T2,k ), (9.7.11)
with
n o
Φ
− 1 (T1,k ) = exp A 1 T1,k , T1,k = dk Ts ,
−
(9.7.12)
n o
Φ (T
−2 2,k
) = exp A−2
· (T2,k − T1,k ) , T2,k = Ts . (9.7.13)
Eqs.(9.7.10-9.7.13) provide then a complete and exact large-signal recurrence description for
the up/down converter under open-loop duty-ratio control. A M ATLAB file is given in App. D,
based on the discrete equations above, for the purpose of simulating the dynamics of the system
subject to step variations in the input voltage us (tk ) or in the duty ratio dk .
Nominal operating condition

x (tk+1 ) =
Let us now concentrate on the steady-state solution for Eqs.(9.7.10-9.7.13), that is, −
x (t ) = −
− k
x (0), which is found to be (with all inessential subscripts k dropped):
 
iL (0) h i−1 h i
x (0) = 
−
 = I − Φ 2 (T2 )Φ 1 (T1 )
− − −
Φ (T )b Us DTs .
−2 2 −1
(9.7.14)
uC (0)
Although an exact analytical description for Eq.(9.7.14) is possible (cf. App. C), we will keep
things simple if we notice that the output time constant of an up/down converter is normally large
enough (product RC = 440µs >> 20µs in figure 9.7.1) that the steady-state output voltage at
 247 / 274
the beginning of a switching period uC (0) can be approximate by its average value within the
switching period. Hence, in view of Eq.(9.7.3),
D
uC (0) ≈ − Us . (9.7.15)
D0
Under steady-state operation and taking also the approximation in Eq.(9.7.15) into account, the
voltage across the inductor L is then a square wave symmetrical about zero. Therefore, the
steady-state value of the inductor current at the beginning of the switching period is found to be,
after some calculations,

Ts /2 02 D 1
iL (0) ≈ 1 − D Us . (9.7.16)
L/R D02 R
Small-signal model
The small-signal model describing perturbations around a nominal cyclic steady state follows
from (9.4.11-9.4.17). After evaluating ancillary matrices defined by Eqs.(9.5.8) and (9.5.12)
(again without inessential subscripts)
n o n o
Φ (T
−1 1
) = exp A T
−1 1
= exp A−1
DT s , (9.7.17)
n o n o
Φ (T ) = exp A
−2 2
(T − T1 ) = exp A
−2 2 −2
D0 Ts , (9.7.18)
x (T1 ) = Φ
−1
x (0) + −b 1 Us DTs ,
−1 −
(9.7.19)
g (T ) = A
−1 1
x (T ) + −b 1 Us ,
−1 − 1
(9.7.20)
g (T1 ) = A
−2
x (T ),
−2 − 1
g (T2 ) = A
−2
x (0),
−2 −
(9.7.21)
0
with the nominal operation point x −
(0) = [iL (0) uC (0)] calculated from (9.7.15-9.7.16), the
Jacobians related to the small-signal model follow:
a) from (9.5.19):
h i ∂x (T2 )
∂f− /∂x
−
= − =Φ (T )Φ (T );
−2 2 −1 1
(9.7.22)
∂x
−
(0)
b) from (9.5.20):
h i h i
∂f− /∂T− = ∂f− /∂T1 ∂f− /∂T2 , (9.7.23)
h i
∂f− /∂T1 = Φ (T
−2 2
) −g (T
−2 1
) + g (T
−1 1
) , (9.7.24)
∂f− /∂T2 = −
g 2 (T2 ); (9.7.25)
c) from (9.5.21):
" #
h i ∂c1 /∂x 0 0
∂c /∂x = − = ; (9.7.26)
− − ∂c2 /∂x
−
0 0
248 / 274 
d) from (9.5.22):
h i ∂c /∂T 0

1 0

1 1
∂c /∂T = = ; (9.7.27)
− − ∂c2 /∂T1 ∂c2 /∂T2 0 1
e) from (9.6.1-9.6.2):
h i ∂T /∂U ∂T /∂D 0 T
1 s 1 s
∂T− /∂p = = , (9.7.28)
− ∂T2 /∂Us ∂T2 /∂D 0 0
which can be derived from the steady-state version of (9.7.9), and

h i ∂i (0)/∂U ∂i (0)/∂D
L s L
∂x /∂p = , (9.7.29)
− − ∂uC (0)/∂Us ∂uC (0)/∂D
with, after differentiation of Eqs.(9.7.15-9.7.16),

Ts /2 02 D 1
∂iL (0)/∂Us = 1− D , (9.7.30)
L/R D02 R
D
∂uC (0)/∂Us = − 0 , (9.7.31)
D
Ts /2 1+D 1
∂iL (0)/∂D = − + Us , (9.7.32)
L/R D03 R
1
∂uC (0)/∂D = − 02 Us . (9.7.33)
D
All the other Jacobians in (9.6.1-9.6.2) have already been evaluated.
For the purpose of observing only the output voltage, we write then
h i
H−0 = ∂h /∂x = 0 1 , (9.7.34)
− −
K−0 = −
0. (9.7.35)
It is worthwhile to emphasize that only the computation of the matrices exponential in Eqs.(9.7.17-
9.7.18) asks some amount of labour. However, M ATLAB has sound algorithms for the purpose
of solving these matrices numerically.
Simulation results
By inputing the nominal determining variables given by (9.7.1-9.7.2), which are Us = 12V and
D = 0.43, into (9.7.17-9.7.33), and after substitution of the resulting matrices in Eqs.(9.4.12-
9.4.13) and (9.4.16-9.4.17), yields

0.9988 0.0442 0.0339 1.6792
F−0 = G
−0
=
−0.0513 0.9544 −0.0014 0.6550
(9.7.36)

H0 = 0 1
−
K0 = 0 0
−
 249 / 274
In App. E a m-file is given based on the recurrence equations (9.4.11-9.4.17) with the numer-
ical values from (9.7.36). figure 9.7.4 shows simulation results from a step change in the input
voltage from 12V to 8V, while figure 9.7.5 presents results concerning a step change in the duty
ratio from 0.43 to 0.5. In both cases, data from the exact large-signal model are also given for
the purpose of comparison.
On the basis of M ATLAB tools, it is then straightforward to get the input-to-output transfer
functions in the z-domain. By assuming uo (t) ≈ uC (tk ), it follows from (9.7.36) that
uo (z) (z + 0.2208)
= −0.0014 , (9.7.37)
us (z) (z − 0.9766 − j0.0421)(z − 0.9766 + j0.0421)
uo (z) (z − 1.1302)
= +0.6550 . (9.7.38)
d(z) (z − 0.9766 − j0.0421)(z − 0.9766 + j0.0421)
As expected, the system poles in (9.7.37-9.7.38) are complex and stable. Notice also a system
zero outside the unit circle in (9.7.38), which explains the non-minimal phase behavior in figure
9.7.5.
−5
−5.5
−6
−6.5
output voltage (V)
−7
−7.5
−8
−8.5
−9
−9.5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
time (s) −3
x 10
Figure 9.7.4: Up/down converter under duty-ratio control: output voltage transient as a conse-
quence of a step change in the input voltage (from 12V to 8V); large-signal (- -) and small-signal
(–) models. Only the boundaries of the switching ripple is plotted for the large-signal data.
250 / 274 
−8.5
−9
−9.5
−10
output voltage (V)
−10.5
−11
−11.5
−12
−12.5
−13
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
time (s) −3
x 10
Figure 9.7.5: Up/down converter under duty-ratio control: output voltage transient as a conse-
quence of a step change in the duty ratio (from 0.43 to 0.5); large-signal (- -) and small-signal (–)
models. Only the boundaries of the switching ripple is plotted for the large-signal data.
 251 / 274
9.7.3 Feed-forward control

A feed-forward approach to achieve immunity with respect to perturbations at the input consists
of forcing the duty ratio to change dynamically according to (9.7.4), that is,
dk = −Ur /(−Ur + us (tk )). (9.7.39)
By doing so, the steady-state average voltage at the output will be independent of the voltage
value at the input.
The large-signal behavior of the system under feed-forward control can be easily simulated
in M ATLAB by using (9.7.39) in combination with (9.7.10-9.7.13). figure 9.7.6 shows numerical
results when a step change occurs at the input voltage.
Although the steady-state value of the output voltage remains constant in figure 9.7.6, the
system transient is not better than under open-loop control, which is to be expected since the
feed-forward action has no influence upon the system poles. This can be concluded from the
small-signal model, (9.4.11-9.4.17), as follows.
By defining νk = us (tk ) − Us , a linear approximation for small variations in the duty ratio is
found from Eq.(9.7.39) to be
Ur
dk − D ≈ νk . (9.7.40)
(−Ur + Us )2
Substitution of Eq.(9.7.40) into (9.4.11) yields

1
x
−k+1
= F−0−
xk + G m ν , with m
−0 −0 k −0
= , (9.7.41)
Ur /(−Ur + Us )2
which implies a linear system with the same poles as in (9.7.37).

figure 9.7.6 also shows numerical results from (9.7.41), that are in good agreement with the
large-signal data.
9.7.4 Current-mode control

In Sec. 6.2.3 we obtained an approximate sampled-data model for an up/down converter, with
the duty ratio as the control variable. In current-mode control, however, the controller specifies
a peak switching current ip (t) in each cycle rather than the duty ratio. The switch may be turned
on regularly as earlier, but it is turned off when the inductor current reaches a threshold value, as
illustrated in figure 9.7.7. The duty ratio becomes now an indirectly determined auxiliar variable,
the peak inductor current ip (t) being the primary control variable.
As suggested in figure 9.7.7, the threshold current signal is build up as the sum of two signals:
a slowly varying signal ip (t) determined by the controller on the basis of the discrepancy between
the actual and nominal average output voltages; and a regular sawtooth ramp of slope −S at the
switching frequency, termed a stabilizing ramp for reasons that will be clear when analyzing the
stability aspects of this control approach.
252 / 274 
−7.8
−8
−8.2
−8.4
output voltage (V)
−8.6
−8.8
−9
−9.2
−9.4
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
time (s) −3
x 10
Figure 9.7.6: Up/down converter under feed-forward control: output voltage transient as a conse-
 253 / 274
24 Chapter9 Sampled Data Modelling MiniPE
6
s
ip (tk−1 )
ip (t) i (t )
s
p k
s
−S ip (tk+1 )
iL (t)
Ts dk Ts
- -
-
tk−1 tk tk+1 tk+2
Figure 9.7.7:
Figure Wave-formsover
8: Wave-forms overaa switching
switching period
period for
forananup/down converter
up/down under
converter current-mode
under current-
control; with stabilizing ramp.
mode control; with stabilizing ramp.
may be turned on regularly as earlier, but it is turned off when the inductor current reaches
aBasic modelling
threshold equations
value, as illustrated in Fig. 8. The duty ratio becomes now an indirectly
determined auxiliar
The state-space vectorvariable, thesystem
x (t) and the peak inductor current
matrices A ip (t)
, A and being the
b remain primary
the same, control
being given
variable. − −1 −2 −1
by (9.7.6-9.7.7).
As suggested
Under in Fig.control,
current-mode 8, the threshold currentvariables
the determining signal isvector
build becomes
up as the sum of two signals:
a slowly varying
 signal
 ip (t) determined by the controller on the basis of the discrepancy
us (tk )and nominal average output voltages; and a regular sawtooth ramp of
between the actual
p−S
slope −  ,
k =at the switching frequency, termed a stabilizing ramp for reasons that (9.7.42)
will be
i (t
clear when analyzing
p k ) the stability aspects of this control approach.
where ip (tk ) is the value of ip (t) in beginning of the k-th cycle; along with the constraint equa-
6.4.1 Basic modelling equations
tions vector
 0 
The state-space ` x (T1,k ) −
vector x ip (tand
(t) k ) +the
ST system
1,k matrices A , A and −
b 1remain the same, being
−− − −1 0 −2
c
given −by = 
k Eqs.(52-53).
 = 0 , with ` = 1 0 . (9.7.43)
− −
Under current-mode − Ts the determining variables vector becomes
T2,kcontrol,
 
Large-signal model
us (tk )
 
p =  , (88)
−k to simulate the large-signal behaviour of the system, it is convenient to rewrite the first
In order
i (t )
row in (9.7.43) pas k
where ip (tk ) is dthe
k Ts value of ip (t) in beginning of the k-th cycle; along with the constraint
equations vectorL us (tk ) = ip (tk ) − Sdk Ts ,
iL (tk ) + (9.7.44)
254 / 274
c =

 −−
′

ℓ x (T1,k ) − ip (tk ) + ST1,k

 = 0,

with −
′
ℓ =
h i
1 0 . (89)
−k −
T2,k − Ts
resulting then the duty ratio at each k-th cycle

L ip (tk ) − iL (tk )
dk = . (9.7.45)
Ts us (tk ) + LS
(9.7.45) in combination with (9.7.10-9.7.13) provide a complete and exact large-signal recur-
rence description for simulating the up/down converter under current-mode control. A M ATLAB
m-file is given in App. F for the purpose of simulating the dynamics of the system subject to step
variations in the input voltage us (tk ) or in the peak inductor current reference ip (tk ).
Nominal operating condition

If the steady-state solution for the duty ratio is found on the basis of (9.7.45), the cyclic steady-
state values for the state variables can be readily obtained from (9.7.15-9.7.16).
In order to find an analytical expression for the duty ratio under steady-state operation, one
should consider again the Vs-balance for the inductor L, which implies the following relation-
ships between averaged state variables
D huC (t)i
huC (t)i = − Us , D0 hiL (t)i = − , (9.7.46)
D0 R
and, from (9.7.44),
1 Us
hiL (t)i + DTs = Ip − SDTs . (9.7.47)
2 L
The combination of (9.7.46-9.7.47) yields
D
+ γD = Γ, (9.7.48)
D02
where

LS T /2 RIp
γ= 1+2 and Γ = . (9.7.49)
Us L/R Us
An (approximate) explicit solution for D as described by (9.7.48) is found to be, after some
calculations,

1
D ≈ (3/4) 1 − , (9.7.50)
1 + Γ − (3/4)γ
which provides the the duty ratio as function of the circuit parameters and the steady-state deter-
mining variables Us and Ip .
For building the small-signal model in the next section, it is necessary to compute the partial
derivatives of the nominal cyclic operation point with respect to the steady-state determining
 255 / 274
variables. By using D as an auxiliar variable, it follows

∂iL (0) ∂iL (0) ∂D ∂iL (0)
= + |U =Us , (9.7.51)
∂Us ∂D ∂Us ∂U
∂uC (0) ∂uC (0) ∂D ∂uC (0)
= + |U =Us , (9.7.52)
∂Us ∂D ∂Us ∂U
∂iL (0) ∂iL (0) ∂D
= , (9.7.53)
∂Ip ∂D ∂Ip
∂uC (0) ∂uC (0) ∂D
= . (9.7.54)
∂Ip ∂D ∂Ip
Analytical expressions for ∂iL (0)/∂D and ∂uC (0)/∂D have been already calculated in (9.7.32-
9.7.33); while, with regard to (9.7.30-9.7.31),

∂iL (0) Ts /2 02 D 1
|U =Us = 1− D , (9.7.55)
∂U L/R D02 R
∂uC (0) D
|U =Us = − 0 . (9.7.56)
∂U D
Further, taking also Γ and γ as intermediate variables, it is possible to write
∂D ∂D ∂Γ ∂D ∂γ
= + , (9.7.57)
∂Us ∂Γ ∂Us ∂γ ∂Us
∂D ∂D ∂Γ
= , (9.7.58)
∂Ip ∂Γ ∂Ip
with, as a consequence of (9.7.49-9.7.50),
∂D 1
= (3/4) , (9.7.59)
∂Γ (1 + Γ − (3/4)γ)2
∂D 1
= −(3/4)2 , (9.7.60)
∂γ (1 + Γ − (3/4)γ)2
∂Γ ∂Γ
= −RIp /Us2 , = R/Us , (9.7.61)
∂Us ∂Ip
∂γ LS Ts /2
= −2 2 . (9.7.62)
∂Us Us L/R
(9.7.63)
Small-signal model
For the sake of clarity, the small-signal model describing perturbations about a nominal cyclic
steady state will be rewritten as in Sec. 6.2.4. The ancillary matrices have now to be evaluated
by using the value of D as given by (9.7.50), together with the cyclic operation point value −
x (0)
given by (9.7.15-9.7.16). The resulting expressions remain with the same form as in Eqs.(9.7.17-
9.7.21).
256 / 274 
The Jacobians related to the small-signal model follow again as in Sec. 6.2.4:
a) and b): same equations as Eqs.(9.7.22-9.7.25);
c) from (9.5.21):
" #
h i ∂c1 /∂x (0) 1 0
∂c /∂x = − = , (9.7.64)
− − ∂c2 /∂x
−
(0) 0 0
because now, on the basis of (9.7.43),

∂c1 ∂c1 0
= Φ 1 (T1 ) = ` Φ 1 (T1 ) = 1 0 , (9.7.65)
∂x
−
(0) ∂x (T ) −
− 1
−−
∂c2
= 0 0 , (9.7.66)
∂x
−
(0)
d) from (9.5.22):
h i ∂c /∂T 0

S + Us /L 0

1 1
∂c /∂T = = , (9.7.67)
− − ∂c2 /∂T1 ∂c2 /∂T2 0 1
since, by taking again (9.7.43) into consideration,

∂c1 ∂c1 ∂c1 0
= |T =T1 + g 1 (T1 ) = S + −
−
`− g 1 (T1 ) = S + Us /L, (9.7.68)
∂T1 ∂T ∂x
−
(T1)
∂c2 ∂c2
= 0, = 1; (9.7.69)
∂T1 ∂T2
e) from (9.6.1-9.6.2) it follows now:
h i ∂T /∂U ∂T /∂I
1 s 1 p
∂T− /∂p = , (9.7.70)
− ∂T2 /∂Us ∂T2 /∂Ip
with, from the fact that T1 = DTs and T2 = Ts ,

∂T1 ∂T1 ∂D ∂D ∂T2
= = Ts , = 0, (9.7.71)
∂Us ∂D ∂Us ∂Us ∂Us
∂T1 ∂T1 ∂D ∂D ∂T2
= = Ts , = 0, (9.7.72)
∂Ip ∂D ∂Ip ∂Ip ∂Ip
the partial derivatives ∂D/∂Us and ∂D/∂Ip being given by (9.7.57-9.7.58); and finally
h i ∂i (0)/∂U ∂i (0)/∂I
L s L p
∂x /∂p = , (9.7.73)
− − ∂uC (0)/∂Us ∂uC (0)/∂Ip
the entries above being already calculated in (9.7.51-9.7.54).

At last, H−0 and K−0 remain the same as Eqs.(9.7.34-9.7.35).
 257 / 274
Simulation results
By choosing the nominal determining variables as Us = 12V and Ip = 9A with S = 0.3 Us /L,
it leads approximately to the same output power as given by (9.7.2).
After inputing the nominal values into Eqs.(9.4.12-9.4.13) and (9.4.16-9.4.17), the resulting
matrices are found to be

−0.3841 0.0435 −0.1115 1.4767
F−0 = G
−0
=
−0.5871 0.9545 −0.0587 0.5738
(9.7.74)

H0 = 0 1
−
K0 = 0 0
−
In App. G a m-file is given based on the recurrence equations (9.4.11-9.4.17) with the nu-
merical values from Eq.(9.7.74). figure 9.7.8 shows simulation results from a step change in the
input voltage from 12V to 8V , while figure 9.7.9 presents results concerning a step change in the
peak current from 9A to 10.5A. As earlier, data from the exact large-signal model are also given
for the purpose of comparison.
On the basis of M ATLAB tools, it follows from Eq.(9.7.74) that
uo (z) (z + 0.7315)
= −0.0587 , (9.7.75)
us (z) (z + 0.3638)(z − 0.9351)
uo (z) (z − 1.1269)
= +0.5738 , (9.7.76)
ip (z) (z + 0.3638)(z − 0.9351)
Both poles in Eqs.(9.7.75-9.7.76) are real, which explains the over-damped transient in figure
9.7.8 and figure 9.7.9. This transient is, however, much faster than the situation in figure 9.7.4
through figure 9.7.6. In fact, one pole is dominant, making the circuit now to behaviour much
like a first-order system. Notice also that the system became much less sensitive to perturbations
in the input voltage.
If the stabilizing ramp is not active (S = 0), it is well known that the current-mode con-
trol scheme possesses a potential instability, which occurs when the duty ratio of the controlled
switch exceeds one-half, see (Kassakian et al. 1991). This well-defined instability, consisting
of a limit cycle at half the switching frequency, makes current-mode control a natural choice
for evaluating the modelling capabilities of the proposed sampled-data approach concerning the
high-frequency region. Indeed, from the m-files given in appendix, it is easy to evaluate that for
S = 0, a closed-loop pole will assume the value −1 for load conditions where the duty ratio
approaches 0.5. Therefore, this confirms that the modelling description records accurately the
expected subharmonic instability. In fact, the impact of the stabilizing ramp can be readily anal-
ysed from the m-files, by assigning different values to S in order to reach a desired closed-loop
pole placement.
258 / 274 
−8.2
−8.4
−8.6
output voltage (V)
−8.8
−9
−9.2
−9.4
−9.6
0 0.2 0.4 0.6 0.8 1 1.2
time (s) −3
x 10
Figure 9.7.8: Up/down converter under current-mode control: output voltage transient as a conse-
 259 / 274
−8
−8.5
−9
output voltage (V)
−9.5
−10
−10.5
−11
0 0.2 0.4 0.6 0.8 1 1.2
time (s) x 10
−3
Figure 9.7.9: Up/down converter under current-mode control: output voltage transient as a con-
sequence of a step change in the controlling peak current (from 9A to 10.5A); large-signal (- -)
and small-signal (–) models. Only the boundaries of the switching ripple is plotted for the large-
signal data.
260 / 274 
.1 Vector gradient functions
APPENDICES
Ancyllary techniques are summarized in the following sections, together with M ATLAB m-files
concerning the application examples.
.1. Vector gradient functions

If f− (x) is a p-vector which is a function of the scalar x, then
 
df1 (x)/dx
 .. 
df− (x)/dx =  . 
dfp (x)/dx
If f (x
−
) is a scalar function of the q-dimensional vector −
x , then the gradient vector is
h i
∂f (x
−
)/∂x
−
= ∂f (x
−
)/∂x 1 · · · ∂f (x
−
)/∂x q
where the gradient is a row vector by definition.

If f− (x
−
) is a p-vector function of a q-vector −
x , then the Jacobian matrix is the p by q matrix
 
∂f1 (x
−
)/∂x1 · · · ∂f1 (x
−
)/∂x q
 .. .. 
∂f− (x
−
)/∂x
−
= . . .
∂fp (x
−
)/∂x1 · · · ∂fp (x
−
)/∂xq
The matrix identity (whose elements in the main diagonal are equal to one, all other elements
equal to zero) is represented by −I . A vector (or a matrix) which has all elements equal to zero
shall be denoted by −0.
.2. Newton algorithm

Consider the system of n non-linear equations fi in n variables xi :
f1 (x1 , x2 , · · · , xn ) = 0
f2 (x1 , x2 , · · · , xn ) = 0
..
. (.2.1)
fn (x1 , x2 , · · · , xn ) = 0.
x and the vector of functions by f− . Then (.2.1) has a compact

Denote the vector of variables by −
form
f− (x
−
) =−
0 (.2.2)
 261 / 274
x ∗ and expand each function in a Taylor

Assume that the system has a solution; denote it by −
x:
series about −
∗ ∂f1 ∗ ∂f1 ∗ ∂f1

f1 (x
−
) = f 1 (x ) +
−
· (x 1 − x 1) + · (x 2 − x 2) + · · · + · (x∗n − xn ) + · · ·
∂x1 ∂x2 ∂xn
∗ ∂f2 ∂f2 ∂f2
f2 (x
−
) = f2 (x −
)+ · (x∗1 − x1 ) + · (x∗2 − x2 ) + · · · + · (x∗n − xn ) + · · ·
∂x1 ∂x2 ∂xn
..
.
∗ ∂fn ∗ ∂fn ∗ ∂fn
fn (x
−
) = f n (x ) +
−
· (x 1 − x 1) + · (x 2 − x 2) + · · · + · (x∗n − xn ) + · · ·
∂x1 ∂x2 ∂xn
Assuming that − x ∗ , higher order terms may be negleted and the system may be writen
x is close to −
in the linearized form:
∗ ∗
f− (x
−
) ≈ f− (x
−
) + J− · (x
−
−−
x) (.2.3)
where
 
∂f1 /∂x1 ∂f1 /∂x2 · · · ∂f1 /∂xn
 ∂f2 /∂x1 ∂f2 /∂x2 · · · ∂f2 /∂xn 
 
J− =  .. ..  (.2.4)
 . . 
∂fn /∂x1 ∂fn /∂x2 · · · ∂fn /∂xn |x
−
is the Jacobian matrix of the function f− , evaluated at −x . If we set (.2.3) equal to zero and solve,
∗
x (because the high-order terms have been negleted) but some
the result will not be the vector −
new value for − x . Using superscripts to indicate iteration sequence we have
m m+1
f− (x
−
) + J− · (x
−
x m) = −
−− 0. (.2.5)
Formally, the solution of (.2.5) is obtained by writing
−
x m − J− −1 f− (x
x m+1 = − −
m
). (.2.6)
In practice, the Jacobian matrix is not inverted. Instead, define

m
∆x
−
x m+1 − −
=− x m.
Then
m m
J− ∆x
−
= −f− (x
−
)
x m+1 is obtained from

is solved by LU factorization (Fowley & Horton 1995) and the new −
−
x m+1 = −
x m + ∆x
−
m
.
The algorithm has fast convergence (quadratic close to the solution). The reader is referred to
any good mathematical book for more detail information, since this is a well-known procedure.
262 / 274 
.3 Recurrence equation between states
.3. Recurrence equation between states

Generally, a power electronic converter has several modes of operation. The state-space descrip-
tion in (9.3.1) has been derived for each mode (usually a physical structure consisting of two
energy storage elements) in the classical form
dx
−
=A
−−
x +B
−−
u. (.3.1)
dt
The solution of (.3.1) gives the recurrence equation between states at different times, which is
found to be (DeRusso et al., 1965)
Z t1
x (t ) = exp{A
− 1 −
· (t1 − t0 )}x (t ) +
− 0
exp{A
−
· (t1 − τ )}B
−−
u dτ (.3.2)
t0
with
1 2 1 3
exp{A
−
· (t1 − t0 )} = −I + A
−
· (t1 − t0 ) + A
−
· (t1 − t0 )2 + A −
· (t1 − t0 )3 + · · ·
2! 3!
u remains invariant during the time interval [t0 , t1 ], then (.3.2) becomes
If −
h i
−1
x (t )
− 1
= exp{A
−
· (t1 − t0 )}x (t ) + A
− 0 −
exp{A
−
· (t1 − t0 )} −−I B u
−−
(.3.3)
−1
under the condition that A
−
exists.
When A −
is a second-order matrix, a very simple procedure for evaluating exp{A (t − t0 )}
− 1
is obtained by making use of the Caley-Hamilton theorem. In this case, consider

a11 a12
A = ,
− a21 a22
whose characteristic equation
λ2 − λ(a11 + a22 ) + (a11 a22 − a12 a21 ) = 0
has the roots
λ1 = α + β and λ2 = α − β.
After some manipulations, the solution of

Ω11 Ω12
exp{A (t − t0 )} =
− 1 Ω21 Ω22
 263 / 274
is found to be

a11 − α
Ω11 = sinh[β(t1 − t0 )] + cosh[β(t1 − t0 )] eα(t1 − t0 ) ,
β

a12
Ω12 = sinh[β(t1 − t0 )] eα(t1 − t0 ) ,
β

a22 − α
Ω22 = sinh[β(t1 − t0 )] + cosh[β(t1 − t0 )] eα(t1 − t0 ) ,
β

a21
Ω21 = sinh[β(t1 − t0 )] eα(t1 − t0 ) .
β
A considerable amount of labour is involved when dealing with matrices of order higher than
two. In such cases, sound algorithms exist for the purpose of numerically computing matrices
exponential (Fowley & Horton, 1995).
.4. M-file large-signal model DRC
1 %*******************************************
2 % Large-signal discrete model of a up/down converter
3 % under duty-ratio control
4 %
5 %******************************************
6 %
7 % Ts
8 % .---/---.---<---.---. +
9 % . . . .
10 % Us L C R Uo
11 % . . . .
12 % .-------.-------.---. -
13 %
14 %*******************************************
15
16 %*******************************************
17 % Basic parameters
18 %----------------------------------
19 % Passive components
20 L=250e-6; C=220e-6; R=2.0;
21 %
22 % Nominal determining variables
23 Us=12; Uo=-9; Ts=20e-6;
24 D=-Uo/(-Uo+Us);
25 %
26 Dp=1.0-D; qsi=(Ts/2)/(L/R);
27 %*****************************************
264 / 274 
.4 M-file large-signal model DRC
28
29 %*******************************************
30 % System matrices
31 %--------------------------------
32 A1 = [ 0 0 ; 0 -1/(R*C)]; B1 = [ 1/L; 0];
33 A2 = [ 0 1/L; -1/C -1/(R*C)];
34 %*******************************************
35
36 %*******************************************
37 % Periodic operating point
38 %--------------------------------
39 T1 = D*Ts; T2 = Ts;
40 Psi1 = expm(A1*T1);
41 Psi2 = expm(A2*(T2-T1));
42 %
43 x0 = inv(eye(2)-Psi2*Psi1)*Psi2*B1*Us*D*Ts;
44 %********************************************
45
46 %********************************************
47 % Simulating the converter
48 %--------------------------------
49 % simulation range: (1, 2, ..., SmRng)*Ts
50 SmRng = 250; % simulating 250*20us=5ms
51 %
52 % step change from operating point
53 Usk=8; Dk=D;
54 %
55 % new system matrices
56 T1k = Dk*Ts; T2k = Ts;
57 Psi1k = expm(A1*T1k);
58 Psi2k = expm(A2*(T2k-T1k));
59 %
60 %--------------------------------
61 % Simulation loop
62 %
63 clear td yd1 yd2;
64 I=0; xk=x0; % initial conditions
65 %
66 for I=1:SmRng % simulation loop
67 %
68 xk1 = Psi1k*xk + B1*T1k*Usk; % recurrence eqs.
69 xk2 = Psi2k*xk1; %
70 %
71 yd1(I)=xk1(1); td(I)=I*Ts; % store results
72 yd2(I)=xk2(1); %
73 xk=xk2; % next state
74 end
75 %******************************************
76
77 %******************************************
78 % Presentation
 265 / 274
79 %-------------------------------
80 plot(td,yd1,'y--')
81 hold on
83 hold off
85 %******************************************
.5. M-file small-signal model DRC
1 %******************************************
2 % Small-signal discrete model of an up/down converter
3 % under duty-ratio control
4 %
5 %******************************************
6 %
7 % Ts
8 % .---/---.---<---.---. +
9 % . . . .
10 % Us L C R Uo
11 % . . . .
12 % .-------.-------.---. -
13 %
14 %*******************************************
15
16 %*******************************************
17 % Basic parameters
18 %----------------------------------
20 L=250e-6; C=220e-6; R=2.0;
21 %
23 Us=12; Uo=-9; Ts=20e-6;
24 D=-Uo/(-Uo+Us);
25 Dp=1.0-D; qsi=(Ts/2)/(L/R);
26 %
27 % Simulation range: (1, 2, ..., SmRng)*Ts
28 SmRng = 250; % simulating 250*20us=5ms
29 %
30 % Step change from determining variables
31 Usk=Us; usk=Usk-Us;
32 Dk=0.5; dk=Dk-D;
33 %*****************************************
34
35 %*****************************************
36 % Periodic operating point & derivatives
266 / 274 
.5 M-file small-signal model DRC
37 %--------------------------------
38 iL0 = (1-qsi*Dpˆ2)*(D/Dpˆ2)*(Us/R);
39 vC0 = -(D/Dp)*Us;
40 %
41 diL0_dUs = (1-qsi*Dpˆ2)*(D/Dpˆ2)/R;
42 dvC0_dUs = -D/Dp;
43 %
44 diL0_dD = (-qsi+(1+D)/Dpˆ3)*Us/R;
45 dvC0_dD = -(1/(Dpˆ2))*Us;
46 %*******************************************
47
48 %*******************************************
49 % System matrices & co
50 %--------------------------------
51 A1 = [ 0 0 ; 0 -1/(R*C)]; B1 = [ 1/L; 0];
52 A2 = [ 0 1/L; -1/C -1/(R*C)];
53 %
54 T1 = D*Ts; T2 = Ts;
56 Psi2 = expm(A2*(T2-T1));
57 %
58 x0 = [ iL0 ; vC0 ];
59 x1 = Psi1*x0 + B1*T1*Us;
60 %
61 g1_T1 = A1*x1 + B1*Us;
62 g2_T2 = A2*x0; g2_T1 = A2*x1;
63 %********************************************
64
65 %********************************************
66 % Jacobians
67 %--------------------------------
68 df_dx = Psi2*Psi1;
69 %
70 df_dT1 = Psi2*(-g2_T1 + g1_T1);
71 df_dT2 = g2_T2;
72 df_dT = [ df_dT1 df_dT2 ];
73 %
74 dc_dT = [1 0; 0 1];
75 %
76 dT_dp = [0 Ts; 0 0];
77 %
78 dx_dp = [ diL0_dUs diL0_dD
79 dvC0_dUs dvC0_dD ];
80 %
81 df_dp = -(df_dx -eye(2))*dx_dp -df_dT*dT_dp;
82 %
83 dc_dp = - dc_dT*dT_dp;
84 %********************************************
85
86 %********************************************
87 % Small-signal model
 267 / 274
88 %--------------------------------
89 F0 = df_dx; % dc_dx = 0
90 G0 = df_dp - df_dT*dc_dp; % dc_dT = 1
91 H0 = [0 1];
92 K0 = [0 0];
93 %********************************************
94
95 %********************************************
96 % Simulating the converter
97 %--------------------------------
99 I=0; xk1=[0;0]; xk=[0;0]; % from steady state
100 %
102 %
103 qk= [usk; dk]; % input to the system
104 xk1= F0*xk + G0*qk; % discrete recurrence
105 %
106 yd1(I)=xk(1)+iL0; td(I)=I*Ts; % store results
107 yd2(I)=xk(2)+vC0; %
109 end
110 %********************************************
111
112 %********************************************
113 % Presentation
114 %--------------------------------
115 plot(td,yd2,'b')
116 %********************************************
.6. M-file large-signal model CMC
1 %****************************************
2 % Large-signal discrete model of an up/down converter
3 % under current-mode control
4 %
5 %****************************************
6 %
7 % Ts
8 % .---/---.---<---.---. +
9 % . . . .
10 % Us L C R Uo
11 % . . . .
12 % .-------.-------.---. -
13 %
14 %
268 / 274 
.6 M-file large-signal model CMC
15 % - IP - -
16 % : - : - : - S :
17 % : * : * : - :
18 % : * * - * * - * -
19 % : * :
* * :
* * :
20 % * * * :
21 %
22 %*******************************************
23
24 %*******************************************
26 L=250e-6; C=220e-6; R=2.0;
27 %----------------------------------
29 Us=12; Ip=9; Ts=20e-6;
30 S=0.3*Us/L;
31 % --------
32 % in order to show instability,
33 % just make: S=0.0; R=4;
34 %-----------------------------------
35 % Step change from operating point
37 Ipk=10.5; ipk=Ipk-Ip;
38 %
39 SmRng=60; % Simulation range: 60*20us=1.2ms
40 %****************************************
41
42 %****************************************
43 % System matrices
44 %
45 A1 = [ 0 0 ; 0 -1/(R*C)]; B1 = [ 1/L; 0];
46 A2 = [ 0 1/L; -1/C -1/(R*C)];
47 %
48 %--------------------------------
49 % Auxiliary variables
50 %
51 qsi=(Ts/2)/(L/R);
52 Gamma=R*Ip/Us;
53 gam=(1 +2*L*S/Us)*qsi;
54 Ogam=1/(1+Gamma-gam*3/4);
55 %*****************************************
56
57 %*******************************************
58 % Periodic operating point
59 %
60 D=(3/4)*(1-Ogam); Dp=1.0-D;
61 %
62 T1 = D*Ts; T2 = Ts;
64 Psi2 = expm(A2*(T2-T1));
65 %
 269 / 274
66 x0 = inv(eye(2)-Psi2*Psi1)*Psi2*B1*Us*D*Ts;
67 %********************************************
68
69 %********************************************
70 % Simulation loop
71 %
72 clear td yd1 yd2; % reset vectors
73 I=0; xk=x0; % initial cond.
74 %
76 %
77 %-- approx duty ratio %
78 T1k = (Ipk -xk(1))/(S +Usk/L); %
79 if T1k<0 T1k=0; end % boundaries
80 if T1k>Ts T1k=Ts; end %
81 T2k = Ts; %
82 %
83 Psi1k = expm(A1*T1k); % sensitivy matrices
84 Psi2k = expm(A2*(T2k-T1k)); %
85 %
86 xk1 = Psi1k*xk + B1*T1k*Usk; % recurrence eqs.
87 xk2 = Psi2k*xk1; %
88 %
89 yd1(I)=[0 1]*xk; td(I)=I*Ts; % store results
90 yd2(I)=[0 1]*xk1; %
92 end
93 %***************************************
94
95 %***************************************
96 % Presentation
97 %
99 hold on
101 hold off
102 %****************************************
.7. M-file small-signal model CMC
1 %****************************************
2 % Small-signal discrete model of an up/down converter
3 % under current-mode control
4 %
5 %****************************************
6 %
270 / 274 
.7 M-file small-signal model CMC
7 % Ts
8 % .---/---.---<---.---. +
9 % . . . .
10 % Us L C R Uo
11 % . . . .
12 % .-------.-------.---. -
13 %
14 %
15 % - Ip - -
16 % : - : - : - S :
17 % : * : * : - :
18 % : * * - * * - * -
19 % : * :
* * :
* * :
20 % * * * :
21 %
22 %*******************************************
23
24 %*******************************************
26 L=250e-6; C=220e-6; R=2.0;
27 %----------------------------------
29 Us=12; Ip=9; Ts=20e-6;
30 S=0.3*Us/L;
31 % --------
32 % in order to show instability,
33 % just make: S=0.0; R=4;
34 %-----------------------------------
35 % Step change from operating point
37 Ipk=10.5; ipk=Ipk-Ip;
38 %
39 SmRng=60; % Simulation range= 60*20us=1.2ms
40 %****************************************
41
42 %***************************************
43 % Auxiliary variables
44 %
45 qsi=(Ts/2)/(L/R);
46 Gamma=R*Ip/Us;
47 gam=(1 +2*L*S/Us)*qsi;
48 Ogam=1/(1+Gamma-gam*3/4);
49 %*****************************************
50
51 %*****************************************
52 % Cyclic operation point & derivatives
53 %
54 D=(3/4)*(1-Ogam); Dp=1.0-D;
55 %
56 iL0 = (1-qsi*Dpˆ2)*(D/Dpˆ2)*Us/R;
57 vC0 = -(D/Dp)*Us;
 271 / 274
58 %
59 % ------
60 dGamma_dUs = -R*Ip/Usˆ2; dGamma_dIp = R/Us;
61 dgam_dUs = -2*qsi*L*S/Usˆ2; dgam_dIp = 0;
62 %
63 dD_dGamma = (3/4)*Ogamˆ2;
64 dD_dgam = -(3/4)ˆ2*Ogamˆ2;
65 %
66 dD_dUs = dD_dGamma*dGamma_dUs +dD_dgam*dgam_dUs;
67 dD_dIp = dD_dGamma*dGamma_dIp;
68 %
69 % ------
70 diL0_dD = (-qsi +(1+D)/Dpˆ3)*Us/R;
71 dvC0_dD = -(1/Dpˆ2)*Us;
72 %
73 % ------
74 diL0_dUs = (1-qsi*Dpˆ2)*(D/Dpˆ2)/R +diL0_dD*dD_dUs;
75 dvC0_dUs = -D/Dp +dvC0_dD*dD_dUs;
76 %
77 diL0_dIp = diL0_dD*dD_dIp;
78 dvC0_dIp = dvC0_dD*dD_dIp;
79 %*******************************************
80
81 %*******************************************
82 % System matrices & co
83 %
84 A1 = [ 0 0 ; 0 -1/(R*C)]; B1 = [ 1/L; 0];
85 A2 = [ 0 1/L; -1/C -1/(R*C)];
86 %
87 T1 = D*Ts; T2 = Ts;
89 Psi2 = expm(A2*(T2-T1));
90 %
91 x0 = [ iL0 ; vC0 ];
92 x1 = Psi1*x0 + B1*T1*Us;
93 %
94 g1_T1 = A1*x1 + B1*Us;
95 g2_T2 = A2*x0; g2_T1 = A2*x1;
96 %********************************************
97
98 %********************************************
99 % Jacobians
100 %-------------
101 df_dx = Psi2*Psi1;
102 %
103 df_dT1 = Psi2*(-g2_T1 + g1_T1);
104 df_dT2 = g2_T2;
105 df_dT = [ df_dT1 df_dT2 ];
106 %
107 %-------------
108 dc_dx = [ 1 0 ; 0 0 ];
272 / 274 
.7 M-file small-signal model CMC
109 dc_dT = [(S+Us/L) 0 ; 0 1];

110 %
111 %------------
112 dT_dp = [ Ts*dD_dUs Ts*dD_dIp ; 0 0 ];
113 %
114 dx_dp = [ diL0_dUs diL0_dIp
115 dvC0_dUs dvC0_dIp ];
116 %
117 %-------------
118 df_dp = -(df_dx -eye(2))*dx_dp - df_dT*dT_dp;
119 %
120 dc_dp = -dc_dx*dx_dp -dc_dT*dT_dp;
121 %
122 %********************************************
123
124 %********************************************
125 % Small-signal model
126 %
127 F0 = df_dx - df_dT*inv(dc_dT)*dc_dx;
128 G0 = df_dp - df_dT*inv(dc_dT)*dc_dp;
129 H0 = [0 1];
130 K0 = [0 0];
131 %********************************************
132
133 %********************************************
134 % simulating the convertor
135 %
136 clear td yd1 yd2; % reset vectors
137 I=0; xk1=[0;0]; xk=[0;0]; % initial cond.
138 %
139 for I=1:SmRng % begin loop
140 qk= [usk; ipk]; % input to the system
141 xk1= F0*xk + G0*qk;
142 %
143 yd1(I)=xk(1)+iL0; td(I)=I*Ts; % store results
144 yd2(I)=xk(2)+vC0; %
145 %
147 end
148 %---------------
149 plot(td,yd2,'b')
150 %
151 %********************************************
 273 / 274
Bibliography
[1] P.M. DeRusso, R.J. Roy, and C.M. Close. State variables for engineers. Wiley, 1965.
[2] J.L. Duarte, P.J.M. Jullicher, L.J.J. Offringa, and W.D.H. van Groningen. Stability analysis
of multilevel converters with imbricated cells. European Conf. on Power Elec. and Drives
- EPE, pages 4.168–4.174, 1997.
[3] J.L. Duarte and J.M. Willaert. Fully digitized phase-shift modulated lcc resonant converter.
IEEE Power Elec. Specialists Conf.- PESC, pages 1303–1308, 1994.
[4] Lee F.C.Y., R.P. Iwens, Y. Yu, and J.E. Triner. Generalized computer-aided discrete time-
domain modeling and analysis of dc-dc converters. IEEE Trans. on Industrial Electronics,
26(2):58–69, 1979.
[5] D. Fowley and M. Horton, editors. The student edition of MATLAB - User’s guide. Prentice
Hall, 1995.
[6] Verghese G.C., M.E. Elbuluk, and J.G. Kassakian. A general approach to sampled-data
modeling for power electronic circuits. IEEE Trans. on Power Electronics, 1(2):76–87,
1986.
[7] J.G. Kassakian, M. Schlecht, and G.C. Verghese. Principles of power electronics. Addison
Wesley, 1991.
[8] R. Lutz and M. Grotzbach. Unified modelling of rectifier-controlled dc-power supplies.

[9] R. Lutz and M. Grotzbach. Straightforward discrete modeling for power converter systems.
[10] D.J. Perrault and G.C. Verghese. Time-varying effects and averaging issues in models for
current-mode control. IEEE Trans. on Power Electronics, 12(3):453–461, 1997.
[11] R. Tymerski. On the efficacy of sampled-data modelling of switched networks. IEEE Int.
Conf. on Electronics, Circuits, and Systems, pages 493–496, 1996.
274 / 274 

Low Power Electronics Lecture 5N280: Ir. M.A.M. Hendrix Dr. J.L. Duarte September 1, 2014, Rev. 1.10

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Low Power Electronics Lecture 5N280: Ir. M.A.M. Hendrix Dr. J.L. Duarte September 1, 2014, Rev. 1.10

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Low Power Electronics Lecture 5N280

ir. M.A.M. Hendrix dr. J.L. Duarte

September 1st , 2014, rev. 1.10

“Relatively speaking,a power electronics is a newly emerging sub area in electri-

Table 0.0.1: Icons Explained

descr. Link to PSpice simulation

descr. Link to matlab script

descr. M file containing more info

link naar website

1 DC-DC Switch-Mode Converters 1

2.2 Quasi Resonant Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

3 State Plane Analysis 95

4.4 LC-combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

6 Magnetic Components 177

6.1.3 DC resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178

8 Power Factor Correction 221

8.1.5 Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223

9 Sampled Data Modelling 229

extra info about DCDC

1.1.1 First Principle

1.1.2 Second Principle

1.2. Combination of the two previous circuits

Figure 1.2.1: Buck-boost-converter principle circuit

1.3. The canonical switching cell

Figure 1.3.1: The canonical switching cell

Figure 1.3.2: Direct converter Figure 1.3.3: Indirect converter

1.4. Analysis of the two basic configurations

1.4.1 General remarks

Figure 1.4.1: The load circuit

1.4.2 Boost converter

Table 1.4.1: Possible switch state modes

Figure 1.4.2: Up-converter basic circuit definition

Mode I (δ1T) Mode II (δ2 T) Mode III (δ3 T)

Figure 1.4.3: Up-converter in three modes

simple boost simboost

δ1T δ 2T δ1T δ1T δ 2T δ 3T δ1T

Figure 1.4.4: Up-converter waveforms of the three modes in DCM

Figure 1.4.5: Up-converter waveforms of modes I and II in CCM

First we eliminate Us and find the general expression

The output characteristic

Simulation of up-converter with constant output voltage

Table 1.4.2: Up converter power characteristics

Input power Output power

Boost converter - normalized output characteristic

Figure 1.4.7: The output characteristic of the up-converter with δ1 as parameter

The output characteristic with continuous current

The output characteristic with discontinuous current

1.4.3 Buck converter

Figure 1.4.8: Down-converter basic circuit definition

Mode I (δ1T) Mode II (δ2 T) Mode III (δ3 T)

Figure 1.4.9: Down converter in three modes

Simulation of down-converter with constant output voltage

Figure 1.4.10: Down converter waveforms of the three modes Uc = 12V

Table 1.4.3: Possible switch state modes

From which it follows:

Table 1.4.4: Down converter power characteristics

Input power Output power

The output characteristic

The output characteristic with continuous current

and the normalized current

The output characteristic with discontinuous current

The mean value of the output current

and the normalized current In = δ1 δ2 .