Professional Documents
Culture Documents
Operational Amplifier
Data Sheet ADA4700-1
FEATURES PIN CONFIGURATION
Low input offset voltage: 0.2 mV typical NC 1 8 NC
ADA4700-1
High output current drive: 30 mA
–IN 2 7 V+
Wide range of operating voltage: ±5 V to ±50 V
High slew rate: 20 V/µs typical +IN 3 6 OUT
High gain bandwidth product: 3.5 MHz typical 4
TOP VIEW
5
V– (Not to Scale) NC
Thermal regulation at junction temperature >145°C
Ambient temperature range: −40°C to +85°C NOTES
1. NC = NO CONNECT. DO NOT
Low input bias current ≤ 15 nA typical
11551-001
CONNECT TO THIS PIN.
2. CONNECT EXPOSED PAD TO V–
OR LEAVE FLOATING.
APPLICATIONS Figure 1.
Automated and bench top test equipment
High voltage regulators and power amplifiers
Data acquisition and signal conditioning
Piezo drivers and predrivers
General-purpose current sensing
GENERAL DESCRIPTION
The ADA4700-1 is a high voltage, precision, single-channel 50 5
OUTPUT
operational amplifier with a wide operating voltage range (±5 V 40 4
10 1
and phase inversion free performance. The ability to swing near
INPUT (V)
rail to rail at the output enables designers to maximize signal- 0 0
11551-200
power supply control and protection, and as an amplifier or buffer 0 5 10 15 20 25 30 35 40
for transducers with wide output ranges. It is particularly well TIME (µs)
suited for high intensity LED testing applications where it provides Figure 2. Slew Rate
highly accurate voltage and current feedback as well as a predriver
to provide accurate voltage and/or current sourcing stimulus to
the LED string under test.
The ADA4700-1 is specified over the industrial temperature range
of −40°C to +85°C and includes thermal regulation at a junction
temperature greater than 145°C and an integrated current limit.
The ADA4700-1 is available in a thermally enhanced, 8-lead SOIC
package with an exposed pad.
TABLE OF CONTENTS
Features .............................................................................................. 1 Typical Performance Characteristics ........................................... 10
Applications ....................................................................................... 1 Test Circuits..................................................................................... 20
Pin Configuration ............................................................................. 1 Theory of Operation ...................................................................... 21
General Description ......................................................................... 1 Thermal Regulation ................................................................... 21
Revision History ............................................................................... 2 Applications Information .............................................................. 22
Specifications..................................................................................... 3 Thermal Management ............................................................... 22
VSY = ±50 V Electrical Characteristics ....................................... 3 Safe Operating Area ................................................................... 22
VSY = ±24 V Electrical Characteristics ....................................... 5 Driving Capacitive Loads .......................................................... 23
VSY = ±5 V Electrical Charateristics ........................................... 7 Increasing Current Drive .......................................................... 24
Absolute Maximum Ratings ............................................................ 8 Constant Current Applications ................................................ 24
Thermal Resistance ...................................................................... 8 Outline Dimensions ....................................................................... 25
ESD Caution .................................................................................. 8 Ordering Guide .......................................................................... 25
Pin Configuration and Function Descriptions ............................. 9
REVISION HISTORY
8/13—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
Data Sheet ADA4700-1
SPECIFICATIONS
VSY = ±50 V ELECTRICAL CHARACTERISTICS
VSY = ±50 V, VCM = 0 V, TA = 25°C, unless otherwise specified.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 0.2 2 mV
−40°C ≤ TA ≤ +85°C 2.5 mV
Offset Voltage Drift 1 ΔVOS/ΔT −40°C ≤ TA ≤ +85°C 2 13 µV/°C
Input Bias Current IB 15 30 nA
−40°C ≤ TA ≤ +85°C 50 nA
Input Offset Current IOS 2 25 nA
−40°C ≤ TA ≤ +85°C 30 nA
Input Voltage Range IVR −40°C ≤ TA ≤ +85°C (V−) + 3 (V+) − 3 V
Common-Mode Rejection Ratio CMRR (V−) + 3 V ≤ VCM ≤ (V+) – 3 V 103 108 dB
−40°C ≤ TA ≤ +85°C 103 dB
Large Signal Voltage Gain AVO −47 V ≤ VOUT ≤ +47 V, RL = 2 kΩ 103 106 dB
−40°C ≤ TA ≤ +85°C 100 dB
Input Impedance
Common-Mode RIN||CINCM 2.3||5.3 MΩ||pF
Differential RIN||CINDM 2.3||0.5 MΩ||pF
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 10 kΩ to GND 48.0 48.5 V
−40°C ≤ TA ≤ +85°C 47.8 V
RL = 2 kΩ to GND 47.5 48.0 V
−40°C ≤ TA ≤ +85°C 47.3 V
Output Voltage Low VOL RL = 10 kΩ to GND −48.5 −48.0 V
−40°C ≤ TA ≤ +85°C −47.8 V
RL = 2 kΩ to GND −48.0 −47.5 V
−40°C ≤ TA ≤ +85°C −47.3 V
Capacitive Load Drive 2 CL AV = +1 1 nF
Output Current Drive 3 IOUT 30 mA
Short-Circuit Limit ISC Sourcing/Sinking +72/−65 mA
Closed-Loop Impedance ZOUT f = 100 Hz, AV = +1 0.001 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = ±4.5 V to ±55 V 110 130 dB
−40°C ≤ TA ≤ +85°C 110 dB
Supply Current per Amplifier ISY 1.7 2.2 mA
−40°C ≤ TA ≤ +85°C 2.4 mA
DYNAMIC PERFORMANCE
Slew Rate SR VIN = ±45 V p-p, AV = +1, RL = 2 kΩ, CL = 300 pF 20 V/µs
Gain Bandwidth Product GBP VIN = 5 mV p-p, AV = +100 3.5 MHz
Unity-Gain Crossover UGC VIN = 5 mV p-p, AV = +1 2.6 MHz
−3 dB Bandwidth −3 dB VIN = 5 mV p-p, AV = −1 4.8 MHz
Phase Margin ΦM VIN = 5 mV p-p, RL = 1 MΩ, CL = 35 pF, AV = −1 70 Degrees
Settling Time to 0.1% tS VIN = 30 V p-p, RL = 10 kΩ, CL = 5 pF, AV = −1 4 µs
Settling Time to 0.01% tS VIN = 30 V p-p, RL = 10 kΩ, CL = 5 pF, AV = −1 8 µs
Rev. 0 | Page 3 of 28
ADA4700-1 Data Sheet
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
NOISE PERFORMANCE
Total Harmonic Distortion + Noise THD + N AV = +1, VIN = 10 V p-p at 1 kHz, RL = 10 kΩ, 0.0002 %
bandwidth = 80 kHz
Peak-to-Peak Noise en p-p f = 0.1 Hz to 10 Hz 800 nV p-p
Voltage Noise Density en f = 1 kHz 14.7 nV/√Hz
f = 10 Hz 27 nV/√Hz
Current Noise Density in f = 1 kHz 400 fA/√Hz
1
See Figure 7 through Figure 9.
2
Overshoot vs. temperature and capacitive load performance is shown in Figure 27 through Figure 30. Refer to the Driving Capacitive Loads section for
recommendations on driving capacitive loads greater than 1 nF.
3
Refer to the Safe Operating Area section.
Rev. 0 | Page 4 of 28
Data Sheet ADA4700-1
VSY = ±24 V ELECTRICAL CHARACTERISTICS
VSY = ±24 V, VCM = 0 V, TA = 25°C, unless otherwise specified.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 0.2 2 mV
−40°C ≤ TA ≤ +85°C 2.5 mV
Offset Voltage Drift 1 ΔVOS/ΔT −40°C ≤ TA ≤ +85°C 2.5 15 µV/°C
Input Bias Current IB 5 30 nA
−40°C ≤ TA ≤ +85°C 50 nA
Input Offset Current IOS 2 25 nA
−40°C ≤ TA ≤ +85°C 30 nA
Input Voltage Range IVR −40°C ≤ TA ≤ +85°C (V−) + 3 (V+) − 3 V
Common-Mode Rejection Ratio CMRR (V−) + 3 V ≤ VCM ≤ (V+) – 3 V 100 103 dB
−40°C ≤ TA ≤ +85°C 100 dB
Large Signal Voltage Gain AVO −21 V ≤ VOUT ≤ +21 V, RL = 2 kΩ 103 105 dB
−40°C ≤ TA ≤ +85°C 100 dB
Input Impedance
Common-Mode RIN||CINCM 2.3||5.3 MΩ||pF
Differential RIN||CINDM 2.3||0.5 MΩ||pF
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 10 kΩ to GND 22.2 22.5 V
−40°C ≤ TA ≤ +85°C 22.0 V
RL = 2 kΩ to GND 22.0 22.4 V
−40°C ≤ TA ≤ +85°C 21.8 V
Output Voltage Low VOL RL = 10 kΩ to GND −22.5 −22.2 V
−40°C ≤ TA ≤ +85°C −22.0 V
RL = 2 kΩ to GND −22.4 −22.0 V
−40°C ≤ TA ≤ +85°C −21.8 V
Capacitive Load Drive 2 CL AV = +1 1 nF
Output Current Drive IOUT 30 mA
Short-Circuit Limit 3 ISC Sourcing/Sinking +72/−65 mA
Closed-Loop Impedance ZOUT f = 100 Hz, AV = +1 0.001 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = ±4.5 V to ±55 V 110 130 dB
−40°C ≤ TA ≤ +85°C 110 dB
Supply Current per Amplifier ISY 1.65 2.1 mA
−40°C ≤ TA ≤ +85°C 2.3 mA
DYNAMIC PERFORMANCE
Slew Rate SR VIN = ±20 V p-p, AV = +1, RL = 2 kΩ, CL = 300 pF 20 V/µs
Gain Bandwidth Product GBP VIN = 5 mV p-p, AV = +100 3.5 MHz
Unity-Gain Crossover UGC VIN = 5 mV p-p, AV = +1 2.6 MHz
−3 dB Bandwidth −3 dB VIN = 5 mV p-p, AV = −1 4.8 MHz
Phase Margin ΦM VIN = 5 mV p-p, RL = 1 MΩ, CL = 35 pF, AV = −1 70 Degrees
Settling Time to 0.1% tS VIN = 20 V p-p, RL = 10 kΩ, CL = 5 pF, AV = −1 4 µs
Settling Time to 0.01% tS VIN = 20 V p-p, RL = 10 kΩ, CL = 5 pF, AV = −1 9 µs
Rev. 0 | Page 5 of 28
ADA4700-1 Data Sheet
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
NOISE PERFORMANCE
Total Harmonic Distortion + Noise THD + N AV = +1, VIN = 10 V p-p at 1 kHz, RL = 10 kΩ, 0.0002 %
bandwidth = 80 kHz
Peak-to-Peak Noise en p-p f = 0.1 Hz to 10 Hz 800 nV p-p
Voltage Noise Density en f = 1 kHz 14.7 nV/√Hz
f = 10 Hz 27 nV/√Hz
Current Noise Density in f = 1 kHz 400 fA/√Hz
1
See Figure 7 through Figure 9.
2
Overshoot vs. temperature and capacitive load performance is shown in Figure 27 through Figure 30. Refer to the Driving Capacitive Loads section for
recommendations on driving capacitive loads greater than 1 nF.
3
Refer to the Safe Operating Area section.
Rev. 0 | Page 6 of 28
Data Sheet ADA4700-1
VSY = ±5 V ELECTRICAL CHARATERISTICS
VSY = ±5 V, VCM = 0 V, TA = 25°C, unless otherwise specified.
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 0.2 2 mV
−40°C ≤ TA ≤ +85°C 2.5 mV
Offset Voltage Drift1 ΔVOS/ΔT −40°C ≤ TA ≤ +85°C 3 μV/°C
Input Bias Current IB 5 30 nA
−40°C ≤ TA ≤ +85°C 50 nA
Input Offset Current IOS 2 25 nA
−40°C ≤ TA ≤ +85°C 30 nA
Input Voltage Range IVR −40°C ≤ TA ≤ +85°C −2 +2 V
Common-Mode Rejection Ratio CMRR −2 V ≤ VCM ≤ +2 V 86 89 dB
−40°C ≤ TA ≤ +85°C 86 dB
Large Signal Voltage Gain AVO −2 V ≤ VOUT ≤ +2 V, RL = 2 kΩ 97 99 dB
−40°C ≤ TA ≤ +85°C 95 dB
Input Impedance
Common-Mode RIN||CINCM 2.3||5.3 MΩ||pF
Differential RIN||CINDM 2.3||0.5 MΩ||pF
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 2 kΩ to GND 3.4 3.6 V
−40°C ≤ TA ≤ +85°C 3.2 V
Output Voltage Low VOL RL = 2 kΩ to GND −3.6 −3.4 V
−40°C ≤ TA ≤ +85°C −3.2 V
Capacitive Load Drive2 CL AV = +1 1 nF
Output Current Drive IOUT 30 mA
Short Circuit Limit3 ISC Sourcing/Sinking +72/−65 mA
Closed-Loop Impedance ZOUT f = 100 Hz, AV = +1 0.003 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = ±4.5 V to ±55 V 110 130 dB
−40°C ≤ TA ≤ +85°C 110 dB
Supply Current per Amplifier ISY 1.5 2 mA
−40°C ≤ TA ≤ +85°C 2.2 mA
DYNAMIC PERFORMANCE
Slew Rate SR VIN = ±2 V p-p, AV = +1, RL = 2 kΩ, CL = 300 pF 18 V/μs
Gain Bandwidth Product GBP VIN = 5 mV p-p, AV = +100 3.5 MHz
Unity-Gain Crossover UGC VIN = 5 mV p-p, AV = +1 2.6 MHz
−3 dB Bandwidth −3 dB VIN = 5 mV p-p, AV = −1 4.8 MHz
Phase Margin ΦM VIN = 5 mV p-p, RL = 1 MΩ, CL = 35 pF, AV = −1 70 Degrees
Settling Time to 0.1% tS VIN = 6 V p-p, RL = 10 kΩ, CL = 5 pF, AV = −1 1.5 μs
NOISE PERFORMANCE
Total Harmonic Distortion + Noise THD + N AV = +1, VIN = 2 V p-p at 1 kHz, RL = 10 kΩ, 0.0005 %
bandwidth = 80 kHz
Peak-to-Peak Noise en p-p f = 0.1 Hz to 10 Hz 800 nV p-p
Voltage Noise Density en f = 1 kHz 14.7 nV/√Hz
Current Noise Density in f = 1 kHz 400 fA/√Hz
1
See Figure 7 through Figure 9.
2
Overshoot vs. temperature and capacitive load performance is shown in Figure 27 through Figure 30. Refer to the Driving Capacitive Loads section for
recommendations on driving capacitive loads greater than 1 nF.
3
Refer to the Safe Operating Area section.
Rev. 0 | Page 7 of 28
ADA4700-1 Data Sheet
Rev. 0 | Page 8 of 28
Data Sheet ADA4700-1
NC 1 ADA4700-1 8 NC
–IN 2 7 V+
+IN 3 6 OUT
TOP VIEW
V– 4 (Not to Scale) 5 NC
NOTES
1. NC = NO CONNECT. DO NOT
11551-003
CONNECT TO THIS PIN.
2. CONNECT EXPOSED PAD TO V–
OR LEAVE FLOATING.
Rev. 0 | Page 9 of 28
ADA4700-1 Data Sheet
NUMBER OF AMPLIFIERS
60 20
50
15
40
30 10
20
5
10
0 0
11551-008
11551-004
Figure 4. Input Offset Voltage Distribution, VSY = ±5 V Figure 7. Input Offset Voltage Drift Distribution, VSY = ±5 V
100 35
ADA4700-1 ADA4700-1
V = ±24V VSY = ±24V
90 VSY = 0V
CM VCM = 0V
30
MEAN = 150µV MEAN: 2.4µV/°C
80
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
70 25
60
20
50
15
40
30 10
20
5
10
0 0
11551-097
11551-006
–1500 –1000 –500 0 500 1000 1500 0 1 2 3 4 5 6 7 8 9 10 11 12
VOS (µV) TCVOS (μV/°C)
Figure 5. Input Offset Voltage Distribution, VSY = ±24 V Figure 8. Input Offset Voltage Drift Distribution, VSY = ±24 V
100 40
ADA4700-1 ADA4700-1
90 VSY = ±50V VSY = ±50V
VCM = 0V 35 VCM = 0V
MEAN = 80µV MEAN: 2.0µV/°C
80
30
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
70
25
60
50 20
40
15
30
10
20
5
10
0 0
11551-005
11551-009
Figure 6. Input Offset Voltage Distribution, VSY = ±50 V Figure 9. Input Offset Voltage Drift Distribution, VSY = ±50 V
Rev. 0 | Page 10 of 28
Data Sheet ADA4700-1
TA = 25°C, unless otherwise noted.
500 30
ADA4700-1 ADA4700-1
VSY = ±5V VSY = ±5V
20
400
–40°C
+25°C
10 +25°C
300 +85°C
VOS (µV)
IB (nA)
0
+125°C
+85°C +125°C
200
–10
–40°C
100
–20
0 –30
11551-010
11551-014
–2 –1 0 1 2 –2 –1 0 1 2
VCM (V) VCM (V)
Figure 10. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ±5 V Figure 13. Input Bias Current (IB) vs. Common-Mode Voltage (VCM) and
Temperature, VSY = ±5 V
500 30
ADA4700-1 ADA4700-1
VSY = ±15V VSY = ±15V
20
400
+25°C
–40°C
+85°C 10
300
+25°C
VOS (µV)
IB (nA)
0
–40°C
200
+125°C +85°C
–10
+125°C
100
–20
0 –30
11551-013
11551-012
–12 –9 –6 –3 0 3 6 9 12 –12 –9 –6 –3 0 3 6 9 12
VCM (V) VCM (V)
Figure 11. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ±15 V Figure 14. Input Bias Current (IB) vs. Common-Mode Voltage (VCM) and
Temperature, VSY = ±15 V
500 40
ADA4700-1 ADA4700-1
VSY = ±50V VSY = ±50V
20
400
0
+85°C +85°C
300 –20
+125°C
–40
–40°C
VOS (µV)
200
IB (nA)
+125°C +25°C
–60
+25°C
100 –40°C
–80
0 –100
–120
–100
–140
–200 –160
11551-015
11551-011
–47 –40 –30 –20 –10 0 10 20 30 40 47 –47 –40 –30 –20 –10 0 10 20 30 40 47
VCM (V) VCM (V)
Figure 12. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ±50 V Figure 15. Input Bias Current (IB) vs. Common-Mode Voltage (VCM) and
Temperature, VSY = ±50 V
Rev. 0 | Page 11 of 28
ADA4700-1 Data Sheet
TA = 25°C, unless otherwise noted.
10 10
ADA4700-1 ADA4700-1
VSY = ±5V TO ±50V VSY = ±5V TO ±50V
SOURCING CURRENT SINKING CURRENT
OUTPUT (VOH) TO SUPPLY RAIL (V)
1 +85°C 1
+85°C
+125°C +125°C
0.1 0.1
11551-016
11551-020
0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100
LOAD CURRENT (mA) LOAD CURRENT (mA)
Figure 16. Output Voltage (VOH) to Supply Rail vs. Load Current, Figure 19. Output Voltage (VOL) to Supply Rail vs. Load Current,
VSY = ±5 V to ±50 V VSY = ±5 V to ±50 V
4 4
VCONTROL
ADA4700-1
ON VSY = ±50V
3 AV = +1 3
LOAD = 20mA
OFF
2 SINKING 2
OUTPUT
1 1
0 0
OUTPUT
–1 –1
–2 –2
–3 ON –3
VCONTROL
ADA4700-1
VSY = ±50V
AV = +1 OFF –4
–4
LOAD = 20mA
11551-087
SOURCING
11551-079
–5 –5
TIME (1µs/DIV) TIME (1µs/DIV)
Figure 17. Output Current Transient Settling Time (Sourcing), VSY = ±50 V, Figure 20. Output Current Transient Settling Time (Sinking), VSY = ±50 V,
Refer to Figure 56 for the Test Circuit Refer to Figure 57 for the Test Circuit
2.0
ADA4700-1 +85°C +125°C
+25°C
–40°C
1.5
SUPPLY CURRENT (mA)
1.0
0.5
0
11551-022
0 5 10 15 20 25 30 35 40 45 50
SUPPLY VOLTAGE (±V)
Rev. 0 | Page 12 of 28
Data Sheet ADA4700-1
TA = 25°C, unless otherwise noted.
3.1 3.3
ADA4700-1 ADA4700-1
VSY = ±50V VSY = ±50V
RL = 1MΩ RL = 2kΩ
CL = 200pF 3.1
UNITY-GAIN BANDWIDTH (MHz)
2.9
2.7 VCM = 0V
+25°C
VCM = –47V 2.7
2.5 +85°C
2.3
2.3
2.1 2.1
11551-025
11551-096
–40 –25 –10 5 20 35 50 65 80 95 110 125 0 20 40 60 80 100 120 140 160 180 200
TEMPERATURE (°C) LOAD CAPACITIVE (pF)
Figure 21. Unity-Gain Bandwidth vs. Temperature, VSY = ±50 V Figure 24. Unity-Gain Bandwidth vs. Load Capacitance and Temperature,
VSY = ±50 V
105
100 PHASE 90 VSY = ±15V
PHASE (Degrees)
GAIN (dB)
GAIN (dB)
50 45
100
GAIN
0 0
VSY = ±5V
–50 –45
95
ADA4700-1
VSY = ±5V TO ±50V
–100 VCM = 0V –90
RL = 1MΩ
CL = 35pF ADA4700-1
–150 –135 90
11551-030
11551-029
100 1k 10k 100k 1M 10M 0 5 10 15 20 25
FREQUENCY (Hz) LOAD CURRENT (mA)
Figure 22. Open-Loop Gain and Phase vs. Frequency, Figure 25. Open-Loop Gain vs. Load Current for Various Supply Voltages
VSY = ±5 V to ±50 V
50 115
ADA4700-1 ADA4700-1
AV = +100 VSY = ±5V TO ±50V VSY = ±50V
40
30
RL = 10kΩ
AV = +10 110
20
GAIN (dB)
GAIN (dB)
RL = 2kΩ
10
AV = +1
0
105
–10
–20
–30 100
11551-031
11551-023
Figure 23. Closed-Loop Gain vs. Frequency, VSY = ±5 V to ±50 V Figure 26. Open-Loop Gain vs. Temperature for Various Load Resistances,
VSY = ±50 V
Rev. 0 | Page 13 of 28
ADA4700-1 Data Sheet
TA = 25°C, unless otherwise noted.
40 40
ADA4700-1 ADA4700-1
VSY = ±5V VSY = ±15V
VIN = ±50mV VIN = ±50mV
AV = +1 CL = 1000pF AV = +1
30 RL = 10kΩ 30 RL = 10kΩ
CL = 1000pF
OVERSHOOT (%)
OVERSHOOT (%)
CL = 500pF
20 20
CL = 500pF
CL = 300pF
CL = 300pF
10 10
CL = 100pF
CL = 100pF
0 0
11551-046
11551-044
–40 –25 –10 5 20 35 50 65 80 95 110 125 –40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C) TEMPERATURE (°C)
Figure 27. Small Signal Overshoot vs. Temperature for Figure 29. Small Signal Overshoot vs. Temperature for
Various Capacitance Loads, VSY = ±5 V Various Capacitance Loads, VSY = ±15 V
40 60
ADA4700-1 ADA4700-1
VSY = ±50V VSY = ±5V TO ±50V
VIN = ±50mV VIN = ±50mV –OS
AV = +1 50 AV = +1 +OS
30 RL = 10kΩ CL = 1000pF
RL = 10kΩ
40
OVERSHOOT (%)
OVERSHOOT (%)
20 CL = 500pF 30
CL = 300pF
20
10
CL = 100pF 10
0 0
11551-045
11551-047
Figure 28. Small Signal Overshoot vs. Temperature for Figure 30. Small Signal Overshoot vs. Load Capacitance, VSY =±5 V to ±50 V
Various Capacitance Loads, VSY = ±50 V
Rev. 0 | Page 14 of 28
Data Sheet ADA4700-1
TA = 25°C, unless otherwise noted.
10 0.1
ADA4700-1
VSY = ±5V
VCM = 0V
80kHz LOW-PASS FILTER
1
0.01
THD + NOISE (%)
0.01
0.001 VIN = 2V p-p
RL = 2kΩ RL = 2kΩ
11551-074
11551-071
0.001 0.01 0.1 1 10 10 100 1k 10k 100k
AMPLITUDE (V p-p) FREQUENCY (Hz)
Figure 31. Total Harmonic Distortion + Noise (THD + Noise) vs. Figure 34. Total Harmonic Distortion + Noise (THD + Noise) vs.
Amplitude, VSY = ±5 V Frequency, VSY = ±5 V
10 0.1
ADA4700-1
VSY = ±15V
VCM = 0V
80kHz LOW-PASS FILTER
1
0.01
THD + NOISE (%)
0.1
0.01
VIN = 2V p-p
0.001 RL = 2kΩ
RL = 2kΩ
0.001
ADA4700-1
VSY = ±15V VIN = 10V p-p
VCM = 0V RL = 10kΩ
fIN = 1kHz RL = 10kΩ
0.0001 0.0001
11551-075
11551-072
Figure 32. Total Harmonic Distortion + Noise (THD + Noise) vs. Figure 35. Total Harmonic Distortion + Noise (THD + Noise) vs.
Amplitude, VSY = ±15 V Frequency, VSY = ±15 V
10 0.1
ADA4700-1
VSY = ±50V
VCM = 0V
80kHz LOW-PASS FILTER
1
0.01
THD + NOISE (%)
THD + NOISE (%)
0.1
0.01
VIN = 2V p-p
0.001 RL = 2kΩ
RL = 2kΩ
0.001
ADA4700-1
VSY = ±50V VIN = 10V p-p
VCM = 0V RL = 10kΩ
fIN = 1kHz RL = 10kΩ
0.0001 0.0001
11551-076
11551-073
Figure 33. Total Harmonic Distortion + Noise (THD + Noise) vs. Figure 36. Total Harmonic Distortion + Noise (THD + Noise) vs. Frequency,
Amplitude, VSY = ±50 V VSY = ±50 V
Rev. 0 | Page 15 of 28
ADA4700-1 Data Sheet
TA = 25°C, unless otherwise noted.
140 120
ADA4700-1
VCM = 0V
120
VCM = (V+) – 3V
110 VSY = ±50V
100
CMRR (dB)
CMRR (dB)
80 VCM = (V–) + 3V
40 VSY = ±5V
90
20
ADA4700-1
VSY = ±5V TO ±50V
0 80
11551-041
11551-038
10 100 1k 10k 100k 1M –40 –25 –10 5 20 35 50 65 80 95 110 125
FREQUENCY (Hz) TEMPERATURE (°C)
Figure 37. Common-Mode Rejection Ratio (CMRR) vs. Frequency, Figure 39. Common-Mode Rejection Ratio (CMRR) vs. Temperature for
VSY = ±5 V to ±50 V Various Supply Voltages
140 140
ADA4700-1
VSY = ±4.5V TO ±55V
120
100 135
80
PSRR (dB)
PSRR (dB)
60 130
+PSRR
40
–PSRR
20 125
0
ADA4700-1
VSY = ±5V TO ±50V
–20 120
11551-033
11551-037
10 100 1k 10k 100k 1M 10M –40 –25 –10 5 20 35 50 65 80 95 110 125
FREQUENCY (Hz) TEMPERATURE (°C)
Figure 38. Power Supply Rejection Ratio (PSRR) vs. Frequency, Figure 40. Power Supply Rejection Ratio (PSRR) vs. Temperature
VSY = ±5 V to ±50 V
Rev. 0 | Page 16 of 28
Data Sheet ADA4700-1
TA = 25°C, unless otherwise noted.
1000 1000
ADA4700-1 ADA4700-1
VSY = ±5V VSY = ±50V AV = +100
100
AV = +100 100
10
10 AV = +10
ZOUT (Ω)
ZOUT (Ω)
1
AV = +10
1 AV = +1
0.1
AV = +1 0.1
0.01
0.01
0.001
0.0001 0.001
11551-035
11551-032
10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 41. Closed-Loop Output Impedance (ZOUT) vs. Frequency, Figure 44. Closed-Loop Output Impedance (ZOUT) vs. Frequency,
VSY = ±5 V VSY = ±50 V
5 10
INPUT VOLTAGE (V)
INPUT
–5 0
–10 60 –5 20
OUTPUT VOLTAGE (V)
20 –20
11551-064
0 2 4 6 8 10 12 14 16 0 2 4 6 8 10 12 14 16
TIME (µs) TIME (µs)
Figure 42. Positive Output Overload Recovery, VSY = ±50 V Figure 45. Negative Output Overload Recovery, VSY = ±50 V
60
ADA4700-1
VSY = ±50V
AV = +1
40
20
OUTPUT (V)
–20
–40 OUTPUT
INPUT
–60
11551-069
Rev. 0 | Page 17 of 28
ADA4700-1 Data Sheet
TA = 25°C, unless otherwise noted.
1k 10
ADA4700-1 ADA4700-1
VSY = ±5V TO ±50V VSY = ±5V TO ±50V
VCM = 0V VCM = 0V
100
10
1 0.1
11551-057
11551-058
1 10 100 1k 10k 100k 1 10 100 1k 10k
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 46. Input Voltage Noise Density vs. Frequency Figure 48. Input Current Noise Density vs. Frequency
ADA4700-1 ADA4700-1
VSY = ±5V VSY = ±50V
INPUT REFERRED VOLTAGE (200nV/DIV)
11551-059
11551-056
Figure 47. 0.1 Hz to 10 Hz Noise, VSY = ±5 V Figure 49. 0.1 Hz to 10 Hz Noise, VSY = ±50 V
Rev. 0 | Page 18 of 28
Data Sheet ADA4700-1
TA = 25°C, unless otherwise noted.
0.08 60
ADA4700-1
VSY = ±50V –40°C
0.06 AV = +1
40 V +25°C
OUT = ±45V
RL = 2kΩ +85°C
0.04
CL = 300pF +125°C
–40°C ≤ TA ≤ +125°C 20
0.02
VOLTAGE (V)
VOLTAGE (V)
0 0
–0.02
–20
–0.04 ADA4700-1
VSY = ±50V
–40
–0.06 AV = +1
RL = 2kΩ
CL = 300pF
–0.08 –60
11551-060
11551-063
0 2 4 6 8 10 12 14 16 18 20 0 4 8 12 16 20 24 28 32 36 40
TIME (µs) TIME (µs)
Figure 50. Small Signal Transient Response, VSY = ±50 V Figure 53. Large Signal Transient Response, VSY = ±50 V
35 8
ADA4700-1 ADA4700-1
VSY = ±50V VSY = ±5V
AV = +1 AV = –1
30 VOUT = ±45V
+SR RL = 2kΩ RL = 10kΩ
0.01%
CL = 300pF 6 CL = 20pF
25 –SR
SETTLING TIME (µs)
SLEW RATE (V/µs)
20
4
15
10
2
0.1%
5
0 0
11551-065
11551-062
Figure 51. Slew Rate (SR) vs. Temperature, VSY = ±50 V Figure 54. 0.01% and 0.1% Settling Time vs. Step Size, VSY = ±5 V
10 10
ADA4700-1 ADA4700-1
0.01% 0.01%
VSY = ±15V VSY = ±50V
AV = –1 AV = –1
8 RL = 10kΩ 8 RL = 10kΩ
CL = 20pF CL = 20pF
SETTLING TIME (µs)
6 6
0.1%
0.1%
4 4
2 2
0 0
11551-068
11551-066
0 5 10 15 20 25 0 5 10 15 20 25 30 35
STEP SIZE (V) STEP SIZE (V)
Figure 52. 0.01% and 0.1% Settling Time vs. Step Size, VSY = ±15 V Figure 55. 0.01% and 0.1% Settling Time vs. Step Size, VSY = ±50 V
Rev. 0 | Page 19 of 28
ADA4700-1 Data Sheet
TEST CIRCUITS
+50V
VOUT
750Ω
–50V
VCONTROL
11551-082
–15V
Figure 56. Test Circuit for Output Current Transient Settling Time (Sourcing) Shown in Figure 17
+15V
VCONTROL
+50V
750Ω
VOUT
11551-098
–50V
Figure 57. Test Circuit for Output Current Transient Settling Time (Sinking) Shown in Figure 20
Rev. 0 | Page 20 of 28
Data Sheet ADA4700-1
THEORY OF OPERATION
V+
Q9 Q10
I1 I3 I2
Q11
Q15
C3
Q17
D5 R1
Q19
D6 D9 R3 C1
I4 10Ω
D7 D10 R4
D1 D3 D4 D2 10Ω C2
D5
Q20
D8
Q3 Q5 D6 Q6 Q4 R2
Q18
Q16
C4
Q14
I5 I6
Q12 Q13
11551-088
V–
The ADA4700-1 is a high voltage operational amplifier featuring The Q19 and Q20 transistors in conjunction with the R3 and R4
a slew enhanced bipolar input stage that provides all of the voltage resistors provide output short-circuit protection. Additionally, a
gain. Single stage amplifiers are noted for their excellent stability thermal regulating circuit (not shown in Figure 58) limits the
but poor open-loop gain; however, the advanced ADA4700-1 die temperature to 145°C or greater to protect against excessive
design provides gain comparable to multistage amplifiers and, power dissipation.
therefore, combines the advantages of both. With approximately equal split supplies up to ±50 V, the output can
Referring to Figure 58, the input stage is formed by Q5 to Q8 be shorted to ground unconditionally; however, operating this
loaded by the current mirrors, Q9 to Q14. The output stage is way is not recommended.
of the complementary Darlington type formed by Q15 to Q18. If the voltage between the output and either supply is more than
Like other bipolar amplifiers, the input stage is internally clamped 60 V, avoid a short circuit to the supply. Transient dissipation in
to prevent degradation with large differential inputs; however, the output transistors can exceed their safe operating area and
the addition of Q1 and Q2 in conjunction with the high voltage cause subsequent destruction.
diodes, D1 and D2, maintain high differential input impedance
THERMAL REGULATION
even when the voltage between the inputs is equal to the supply
voltage. This configuration makes the ADA4700-1 suitable for The circuitry for thermal regulation of the ADA4700-1 is
applications with unavoidable large differential voltages, such as dependent on the ambient temperature and time duration of
rectifiers, peak detectors, and comparators. the current drive. When thermal regulation of the ADA4700-1
is active, the supply current, ISY, reduces from 1.7 mA to 300 µA.
The ADA4700-1 uses a single-pole compensation set by C3 and The output stage remains biased during thermal regulation due
C4. The internal snubber networks, R1/C1 and R2/C2, further to the parasitics of the output devices in conjunction with the
enhance the stability. This design enables large capacitive loads elevated die temperature. For example, with a current drive, IOUT,
to be driven without the risk of oscillation. of 30 mA for 180 seconds and with an ambient temperature of
85°C, the thermal regulation is triggered at a junction temperature
of 145°C with an output current level of 22 mA. For additional
information, refer to the Thermal Management section and the
Safe Operating Area section.
Rev. 0 | Page 21 of 28
ADA4700-1 Data Sheet
APPLICATIONS INFORMATION
THERMAL MANAGEMENT SAFE OPERATING AREA
Thermal management of high power amplifiers such as the The safe operating area (SOA) of Figure 59 is the range of voltages,
ADA4700-1 is an essential consideration in system design. Two currents, and temperatures under which an amplifier can safely
conditions affect junction temperature (TJ): power dissipation operate without failure. It is directly dependent on the ambient
(PD) of the device and ambient temperature (TA) surrounding the temperature and the thermal resistance. Figure 59 shows the
package. This relationship is shown in Equation 1. SOA for the ADA4700-1 at steady state using the PCB shown in
TJ = PD × θJA + TA (1) Figure 60. The duration of the 30 mA load driven is 180 seconds.
Different time intervals produce alternate sets of curves. The
where θJA is the thermal resistance between the die and the ambient guaranteed ambient temperature range of the ADA4700-1 is −40°C
environment. Power dissipation is the sum of quiescent power of to +85°C. The 125°C shown in Figure 59 is for reference only.
the device and the power required to drive a load. Power To maintain normal operation, the ADA4700-1 must remain in
dissipation for the sourcing current is shown in Equation 2. the SOA (area under each curve) up to an ambient temperature
PD = ((V+) − (V−)) × ISY + ((V+) − VOUT) × IOUT (2) of 85°C.
Replace ((V+) − VOUT) in Equation 2 with ((V−) − VOUT) when 35
θJA = 26°C/W –40°C
sinking current. +25°C
30
The specified thermal resistance of the ADA4700-1 is 45°C/W. +85°C
The ADA4700-1 guards the die from exceeding the absolute V– = –3V
0
maximum temperature. When the die reaches a junction
11551-102
1 10 100
temperature greater than 145°C, thermal regulation is triggered, VCC – VOUT (V)
the supply current is reduced, and the output load current is Figure 59. Safe Operating Area with θJA = 26°C/W
limited.
4-LAYER FR4 PCB
WITH INTERNAL
GROUND AND 12.7mm
POWER PLANE. (500mil)
a LANDING VIAS:
COPPER EPOXY FILLED
TOP/BOTTOM: 1.5oz ARRAY: 3 × 4
INTERNAL LAYERS: 1oz b DIAMETER: a = 0.3048mm (12mil)
9.65mm
(380mil) PITCH: b = 0.762mm (30mil)
1 8
6.1mm 2 7 25.4mm
(240mil) PAD
3 6 (1000mil)
4 5
9.65mm
(380mil) PADDLE VIAS:
c EPOXY FILLED
11551-103
ARRAY: 10 × 8
DIAMETER: a = 0.3048mm (12mil)
PITCH: c = 1.27mm (50mil)
Figure 60. Thermal Landing and PCB Material Used to Obtain a θJA of 26°C/W
Rev. 0 | Page 22 of 28
Data Sheet ADA4700-1
DRIVING CAPACITIVE LOADS 10
OUTPUT
8
Although the ADA4700-1 behaves well when driving capacitive
loads, CL, as seen in Figure 27 to Figure 30, extra compensation 6
VOLTAGE (V)
2
a snubber network, as shown in Figure 61. 0
VIN
–2
VOUT
RSNUB –4
CL
11551-084
CSNUB –6
INPUT VSY = ±50V
–8 AV = +1
Figure 61. Snubber Network CL = 10pF TO 1nF
–10
11551-093
For unity-gain applications and capacitive loads up to 1 nF, 0 2 4 6 8 10 12 14
TIME (µs)
RSNUB = 150 Ω and CSNUB = 10 nF works well. Results for this
Figure 64. Results from Snubber Network with AV = +1 and CL = 10 pF to 1 nF
circuit are shown in Figure 64. With higher closed-loop gains,
lighter snubbing can be used. For capacitive loads up to 10 nF, the 15
VSY = ±50V
snubber must be larger. Figure 65 shows the results of using an AV = +10
CL = 10nF
RSNUB = 22 Ω, CSNUB = 100 nF, and CL = 10 nF with the ADA4700-1 10
OUTPUT (V)
loads are used, or when large transients are present. A better
0
approach is to use a bypass network in the feedback path, as
shown in Figure 62.
–5
VIN 22Ω
VOUT
–10
CFB CL
11551-089
10nF
11551-099
–15
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
3.3kΩ TIME (ms)
Figure 62. Unity-Gain Configuration with Bypass Network Figure 65. Results from Snubber Network with Higher Gains, CL = 10 nF
The bypass network in Figure 62 performs well with loads up to 10
VSY = ±50V
100 nF. The resulting waveforms are shown in Figure 66 for various 8 AV = +1
CL = 100nF
output amplitudes. For heavier loads, capacitive feedback, CFB, must 6
be increased. The configuration in Figure 62 can be modified to
4
work with gains greater than 1. Figure 63 shows a bypass network
OUTPUT (V)
–2
VIN 22Ω
VOUT
–4
CFB CL –6
43kΩ 3.3kΩ
–8
5.1kΩ
11551-090
–10
11551-100
Rev. 0 | Page 23 of 28
ADA4700-1 Data Sheet
50
VSY = ±50V CONSTANT CURRENT APPLICATIONS
40 AV = +10
CL = 100nF When a constant current with high compliance is needed, the
30
ADA4700-1 can be used as a modified Howland current pump.
20 The values shown in Figure 70 yield a transfer function of 1 mA/V.
Applying this analysis to the modified Howland current pump
OUTPUT (V)
10
0
in Figure 71 results in an output capability of 1 A/V.
R2
–10 50kΩ IF R2 = R4 + RSET
AND R1 = R3
R1
–20 100kΩ –VIN R2
+VIN IOUT =
RSET R1
–30
RSET
–40 500Ω
IOUT
11551-101
–50 R4
0 0.5 1.0 1.5 2.0 R3 49.5kΩ
100kΩ
11551-086
TIME (ms)
11551-092
2N5401 20kΩ
+V
VIN
270Ω
IOUT
BDW94C
11551-091
–V
Rev. 0 | Page 24 of 28
Data Sheet ADA4700-1
OUTLINE DIMENSIONS
5.00
3.098
4.90
4.80 0.356
8 5 6.20
4.00 6.00
3.90 5.80 2.41
3.80 0.457
1 4
06-03-2011-B
COMPLIANT TO JEDEC STANDARDS MS-012-A A
Figure 72. 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP]
Narrow Body
(RD-8-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1 Temperature Range Package Description Package Option
ADA4700-1ARDZ −40°C to +85°C 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP] RD-8-2
ADA4700-1ARDZ-R7 −40°C to +85°C 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP] RD-8-2
ADA4700-1ARDZ-RL −40°C to +85°C 8-Lead Standard Small Outline Package with Exposed Pad [SOIC_N_EP] RD-8-2
1
Z = RoHS Compliant Part.
Rev. 0 | Page 25 of 28
ADA4700-1 Data Sheet
NOTES
Rev. 0 | Page 26 of 28
Data Sheet ADA4700-1
NOTES
Rev. 0 | Page 27 of 28
ADA4700-1 Data Sheet
NOTES
Rev. 0 | Page 28 of 28