PADRE CONCEIGAO COLLEGE OF ENGINEERING Certificate Rote. _) University SeatNo. (ee This isto certify that Mr,/Ms._GiAKGr]_ ALIAS vEDA GikISH SARDESSAL of the Semester of four year degree Course in Engineering has completed the term work in the subject within the Classroom / Laboratory / Drawing Hall / Workshop of PADRE CONCEICAO COLLEGE OF ENGINEERING, Verna Goa during the year. ‘Staff in -charge Head of the Dept. Principal CONTENTS Sr. No| ‘Name of the Experiment Date | PageNo.] Senate’ a |ISiRcHorrs LAWS 2 | SoPERPOSITION THEOFEM 3 AHEVENINE THEOEEM q | SERIES £-4 CeculTt 5 |seeies R-C CIRCUIT 6 + © 4 P-N_DUNCTION PIOCE CHARACTE- ZENER ‘DIODE CHARACTERISTICS BIT CHARACTEFISTICE HALE WAVE RECTIFIERS TO | Fort WAVE RECTIFIER CENTRE TAP 1 [eure WAVE BFIDGE KECTIFIER 12 |ZENER OIODE AS VOLTAGE REGULATORoAfiolo2 Expo. PADRE CONCEICAO COLLEGE OF ENGINEERING ol VERNA 3 To verity Kistchol\'s Guurent taw and + tt Kirchoyy's Voltaae 5600, 1000-0, 2400.9) , Voltmeter (o-10y) Armmeter (0-5mA), Bread board, wonecting voires Theosiy 3 {) State Kircho\\'s Current Lavo — Ib states +hat cunment slowing into Canode or @ junchion) must be equal to current Jlowing out ol ik i) state Kirchoiy's Vo\wage Law — it statee that the sum of alt voltag around any closed Loop tm a circuit must be zero. Puocedures () Eircholi’s Current Law Cc L) Wdyanect the cirusit ar per the ecaatils diagrarn ond mesuure the branch currents - 2 Rewrd the veadings in the obcervatis table. Verity Kicchoy current law. dy Kirchoyys voltage lous Cleve) 1 Connect the circuit cu ber the circuit dtagra id measure the voltages CLCTOSS xvesistor 2> Pewrd the»AMOED nbsp aide tMala Rrit0.0. t qt ig: ?btlaa Penna Par si0n pe Fig, wh hanes far oon Rr VwoD py Sho aedrd.tds Vit Vit Vet VeDate 04 llol22 Expt we PADRE CONCEICAO COLLEGE OF ENGINEERING 0) VERNA table verily Kiccho} |'s voltage Law [Colcutations & S eee Beg = C1801 50111009) + 2400 = 2419 £0. Find the current io vatious braoch T= V_ = 3546 «10% pA Req voltage c.cross 2700.2 = Vy =1X 2700 = 4-5t48V Thus Vag = 10-9: 544 = 0-424 V By Ohm's tow Si = Vae = 9:00235 = 2:55mA 180 Sos Vae = 0: +54 mA 560 tse Vae = 0'°424 oA | (ooo | getittet Ts = S55) mA | [oy ve [ ee = Bit Pet Rae lSD+SCVHTOOS | = 1440 total current Cts = Ve = Sis kKIOS A Ce 45 mADate Dat oalio|22 Zaza — PADRE CONCEICAO COLLEGE OF ENGINEERING ol VERNA olage oss Ri, Ro Ra Wiz Teh = 035 Moz Teh = 8:92 Var Je Rs = 5°95V Va = Vit Vet V3 = 10-005 Observations 1 KCL |_eranch current [a | u [ty | Tneoretical 235 | 084 | ovtay| $531 Procticat | 2-24 | OE | O48 | Sat Tit dat Ts = Ta Ly eve | [eranch voltage | [wv [iv |v | Tancoretical| 1-085 | 5:22 [sar] 10.005 | Teccstical | w'0s2 | $22 | Sar] 10 0% | | | I | wenty A | fla test (noclusions hei oh Kiccholy's c&rrent law and Kircholts wp/1ow are yerijied theoriticall Tone practically, PZDato Dato tal olz2. Expt. No. PADRE CONCEICAO COLLEGE OF ENGINEERING durfro}r2], | VERNA SUPER POSITION THEOREM Apparatus § oc Power Supply CiVand j2v)__gesistore (390-0 560 , 62026 FOR, 1500) , Voltmeter (0-10V) | Ammeter (o-lomA) , 64 eadboard connecting wires: 2 In a linear bilaterat DC netwosk wotainin more ¢han one enciy sounce the resultant | potential dierence across Curent through ement is equat che the algebrate sum oy potential dillerences or cumrents for that element produced by each sesistor ading alone with alt other independaot ideal voltaqe source: replaced by shost “_cinuuits and ali other independant ideal wurent gources replaced by oben circuits. sf) cc he efit x € diagram given ia fig @t faneés ele: ai per voltage source resis ecord theDiagram = Hy. hh NPSing VL “imesh a, | : #3494, ~ 6003, =1500(T-1,) = 0 vA 9 PQ8hed, ' vf yy Beason ~ Is007, =a, : oODato Date tu)tol22 Zqune— PADRE CONCEICAO COLLEGE OF ENGINEERING 7 oz VERNA D taleulate the Algebraic Cum oh, L and Ts and vorily superposition theorem. load tubnent Le ) Pes = £20 +660 = 1500.0 Bers F500 Req = 450+ 450 = lef00.0. W Cituit cunnent toys Ej Ath MA Req, 100 ti) Using cunnent divider ate tu = Totatx Ig00 = site XL (50041500 = 2:05¢€mA exunneni” iY) And “equivate s fae 390+ 560 =150R Rp, = 150 Ilisdo = 584 632 650 + 620 +561. 63 - 20¢h 63-0doe in Ve wed Sut ef up n.t.e ji! ae , : wy . i) maby hE, ign Applying Fv fo mesh. , | 15m (1-2) — £205) 6401.12 =0 . 12 —@ 1500, 4.30007, @-0 “ago, — boot, 509 J) ft: BOD; Wt OSE KIGS A tee 3 FOG iS A > cusent ounumed “in virong ebirec® hance negative: “ oaticlock wie eawectEEE Date ate Dato Ii} po }22 Page No. o® VERNA faeta — PADRE CONCEICAO COLLEGE OF ENGINEERING Ce] Gis Find total innent by 12v Dyotat = 546 mA fil) Find toasl SES wing q Sr x 450» 15041500 = 546 x lo xa50 = 2-233MmA Tun mA Theoriial 2 05%s Practica! 2-06 Kena’ cum. 2} load. by each source uotlin the otherDate 26] 10]22 Etna PADRE CONCEICAO COLLEGE OF ENGINEERING 2 VERNA P=N JUNCIION DIODE CHARACTERISTICS Aim § To sstiudy the v=t ch ahactenictien of pO junction diode and olofisasne the Atatte and dynanaue sesistane OF olZacl Apporatiu § OC volige sounce (o-10V) pinde Stesicton (70002), voHmeter (0-10 V), ammeter (0-/00mMA) , bucad boanol | | theonys i) forward Biased cdharcotenishis : } aes diode % cena ae reas d eoTaode anol cat fa d ts eqative slectiooe asd biased. Th depletion eae OAD 55 thas j, him SS pucyen be mevenrenl af charge casi diodes As clinde voltrge tncveoses custent wo mA trtreove: due Bs mina i Chasot aries: When olipele voltae a3 unudpued beyond a textein value _cuunrent Increases dowly srouply Thi voltae beyond us» known os knee /cutin voltage. 1) Reverse Bioucd characteustu ! Anode | debe 5 tmnnected ta nLacttrive edeslsle and cathed ennected ts1000.0 Jo00-2Date Eqtne PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA -uiacle but allows dhe movement datnanity charge carrieys. As *toverye vost b"tnheancd Curent die ta rina surly basoe ASAI CAA tnireanes And 2 fn pe cline tp tt. Tt ud called srovene satiurcite deakage aiment b When codes voltage wis tnreared beyond a estoin valsre ih CALACDE neoocs sha. Vass aotoge 43 called breakdawo/wbeut et the Renae {vo ltrige source “at ov Siwsistance etc. As poy Pad Ccust cl cyscimn peocess ) Cont ou. step 2 and 3 Del the cloocle clcuty intremne -the weltage — inte woh the doo aban 5 Pees age 8) Reverse Charactenctio & 2Build cthe eh ae 2s pwr dkagiam set the 4Dato Expo PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA io the eareey aire ‘table. 2) S10 the ~woltage. And inchem Diode volicge CV) volts | Diocle Curent Clo) Cor) ° ol 2 0-2 ot 0-3 O-2 ou our 0-5 et o-6 Qs 0: 623 8:8 0-634 06-64% 0-656 \ 2 3 4 5 6 + 8 4 =|sDate ‘Expt. No. _ PADRE CONCEICAO COLLEGE OF ENGINEERING ‘VERNA Blheveuse Bred —— Sno} Diode voliage Cs) volls| Diode aunent Co) bA) ui 0 | ° Zea \ | ° 3 l 2 ot 4 | 3 orl 5 | G oo 6 | 5 03 + | ¢ O38 | # ow 4 I & ow | 4 ow no] lo or ate Serie wre fosino hanocten d] the ola ce Cho) R=y = 0-6 = 0332 i Ve 2) Puna Hosistance Rad = AV=Ve-Vi= 0-025 V DI=D.-T = Q8- 1-8 = 1A ac = BV = 0023 = 0-023-0/ ar / 4 Y cstia a4 peurrien ta aural Soi fusm yap oe ogtint2e DateDate infoo PADRE CONCEICAO COLLEGE OF ENGINEERING —"="~ VERNA HALE- WAVE RECTIFIER. Aim 2 To study ahe_ oberation of hall wave rectitier and cateulate the sipple jactor Abboratuss Bread board, diode, Herictor , Hansjorme Multimeter DSO Procedure § 1) Connect the cikcuit ar shown ‘in the duewit dvagram 2) connect’ the I’scole side of the Aranslormer to AC mains. Take-lhe po ‘Probe _at the input points o\ the 2° winding o\ the StL Note the ih é | ovkage ‘Wad oa Saad vail the thearti 8) Now cooneck the Deo—pusbe AuiOss P, pso +o 4 god And stablel 4) Wwe multimeter +o meauine the Oc ae Ac an ae eT 5) Multiply dhe ems value ol woliage, 0 the @” texminal of -ransjormer by a +n get the peak wat “The to: zontal 4 aluc“o} Dc voltage ng yormuta_isi i ¢ L t : a mm ’ { LI Diode, Ded : fb ania Sapply: : ar Zricmne Lege i pe oes Jf cart raf i primarny il Sevondany 4 f 2c f P i ' ; 1 « onk Spore. 4 jious AID ef \ ' Law.te Laos oo tactich i hist ae pyasf. eddee a Los am otto t vy : fee a ibe LyExpt. PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA (Qlailntions Z] Theasii tical D Input yorlage Marrimum value Of inbiut voltage. CMe) = HV 12) outbut volt £Ms output voltage Cems) = Vm <4V Oc orctbut voltage (Voc) = Ven = 4 4 5V 1 Output wibple voltage (Mes). = J Wemd*= Cvoey =_5-34V Lipble factor CY) = ne = 121 [DT] Practical LD Peqk Output voltage (Vm)= AV = Lah pe ett pul wottace (Ves) © Vou Buy EMS Gukpul voltage (Vems)= Why = 54 Vv ? z pp tor = Veeco = 414 Lipple 4a.coe eee altExpt.No, PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA Input voltage wavelore _CVi vk“ Fie), Guxaph Ourtbuk voltage wavefowr CVe vie fine) foncliuian 2 The Hall wane mectijier deeutt wets built and the ripple sactor o| +he Cheuk wor determined theositically And practicatty - St wou jound +o be (ot. gh = 7Date |i for Expt. Us PADRE CONCEICAO COLLEGE OF ENGINEERING 5 VERNA FULL- WAVE CENTKE TAP RECTIFIER Aim § “I d eben ation 31 W)OULre Leth tap nec and find the uibb le gactin.. AbbOx alia 8 Diocles [Clo uool- 2numbow)] sreatcton (1k D 230/12V,50Hz centre tap transJonmen bueadboosd . digital ctenage esd lies op nauLiinnctoy, eonneding ihe. et inte aad negative Prorecliumes ) Comnect the Urcuit ai shoum in thd c and susitch on the power sup ay 2) Uiing tre voltmeter CAC volt) aia the woltage auoss the Transtor mon. erondarg halt. Dcaladate” the Sdpp le factor . D Using the voltrelen alee se, the auth Sipble voltage wad «a ‘oC valinge. See the 4 ThE e 4, ‘4 colTransform Pxtimasiy, Full -Wowe Centre Tap Fechifen riDate Expo PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA S tonneck the ps0 -auoss [kp Clea) anol measune thre ttf em = (224XxVS = 14-35v 2D Output: voliage AMS output “volierge CVpau) pg = 12-26 pc eulbul voltag (Vos) = 2m = hOuv ji Ouput Fipple voltage (Veena) = V Veag’— Vor , a = Vigo 1-ou* = 5:331V Fipple Facto U0 = Veen = pbuas = 4-94V 143) = FAP —FIT = 3-46V|Date Ext no.— PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA ura ph s th pute ee soem (vi Vit cine) Loum (vo vis [Zencliusion 8 ae Full Wawe eadDate Isfn jee ago No. Betve— PAD fe RE CONCEICAO COLLEGE OF ENGINEERING BEIGE RECTINE A 3 ‘To . observe the wavejourn o} Bdge Fectiier “4 “ Qad snd the siipple_yactor Abbau: 8 oluss Bread boord tranjoxmner outtimeler DSO clicigsacn 2 (ennect + “i i : neck He pstimany sicle of if frapleumer to AC main Take D0 probe at _tnput spornts of the i clap ete across the scronclany win ding | the fraunsforms Note the wavejore Oo} + dignal merasine the peat plicge (Ym) sitial voltag And compare with th 9 Connect the pso_psuobe Acljrubtlee Ds ctr gel geod ancl sable saueloun was ouiliionoTis te mae asst 0c and A voliaae at input Lr oho Voc and Verme 5 Find ripple {actor pitage ol 4hsppy ©) | os woe 44i xDate Expt. No. PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA 2) pe vi meee 5 VEX 12-25 = 174-32V s ottaje OF loo (Ved) = 2Vm = 2x1732 = 11-02 7 TT 4) PME voltage at load CVumi) = Vm = 1732 = 12:25V v2 v2 D @il Fipple voltaye (Vem) = J Vews~ Vee = J l@.as?— 11-02 = pay ) Ripple 4cuctor Cs) ~ Veen = 5:32 = 0482 Voe Oz Hi] fuaclical + ag 1 ut Pu nol CVec) = volFage at lead CVsm) = 4 3) Lippte voltage CVems) = VJ Viow ™ = aveVv F OM) = Varene = 2 4) Ripple _pactow OO = _Vacre =Date a ]22) im PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA ZENER DIODE CHARACTERISTICS Aino $ 7 Alpe. a the Chavactemctice ef Zeneu Keguinements + 1000.0 mevistax zene d’o de (55v)| Breadboowwd ,- Muttimetis Theosuy 2 The Zener cléode 43 wed tn ib seeverse breakdewn mode-The Zener oliode has a Sepien wn itr sveue bra chowact- -ou'sti_ep olmoct o constan £9 “voltage segarclles of the valu coats ent eee thscoush the cd, rocket ADA AA O| itself es ed fp | gi ue “oiject fa volt ge J 01s e suequbate 6% stabilise a ocaost sitpply loud variations he jormanrd fic tbo ef the values Of vosu elu Compencnita au given sn the Paeuit dung.am pn and a ache on 3 ctncase te disde4 and walteg tha ip teh at 0-1 and swerord oP ending dtode ushrent ne _clrock fs conducting . A) +e, phe (Ord tates & the didel e eh of OO1V ond xcrord a : Peni ga ent SamDate Expt. No. PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA 2 E the revense brased cieuct and “un the simulation 9 Intreqse the dooce weyerse voltage tr the step Ol IV cand nermsd the Corresponding diode -cunsent tell the te con x D) Alten the suerte car $1O0 thoncase the dinde cisseot tn Ssegulas tepe and seroud the consepencling cle voltage lObsexvatianss [A] Foxwond 5 5 Se Prode voltage Ws] Oiocde Current Ge > 0 —_— dlolalale| cli}of- O15 8Sue. —_ PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA 8) Fevense Chomectenistia + J——£r_no Diode voltage (va Diede auent I : ° 3 2 ; = 7 a ° = 3 ° e 4 ° & 5 o:0F mA a 526 ola mA 2 5-32 6: 21 MmA a 5:34 o 37 mA 10 5:u3 Gt mA 2 The. sv-I ch wocttu_of the tence diode 1 plotied and th ia ones of dio te 0s studied at Wee? YY wvDato Expt. No. PADRE RE CONCEICAO COLLEGE OF ENGINEERING Cd ws VERNA [Brocedume 5 Pout AS Line Logutation (load - B jie And input volkoge 4 vase 12) Dfennect the cfscrutt ave jowo 1 +H eit olutr ga arn. D Vauy the input voltage oupply om tp 20v ond note clown the Comes = —pending Voad volta a Ve 2 Plot oraph of Vs and ven x 500-0: ee eae oe ve (ev) we GoVERNA ‘aie PADR ; CONCEICAO COLLEGE OF ENGINEERING CI = Neoyss$ A Zens Diode tp thus Hebe ge Ui ap 30g es a _wonstoni voliiae Ve (zensk voliag® at Ine outbut “ebsesenied a1 Vo Using a Zener Pinde “we paintafne cervtant as Lang as the np ola ‘docs not fall below Ve. When the OTe. 1 - divelo b toss —lh LOO. Vio _oucttic. than Ve the drode mover wd ns breakdown 9(Dale Expt. No. PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA Line Voltage Vs Cv) ve CU) I ° ° 2. 1 ° 3 2 1.24 ; 4 3 2:16 5 4 2:48 6 5 2! 7 C 4-02 6 a 4°54 a e 53 lo 4 Ex lu + Past B% Load Legula ton Load xeristor Load curren £. C2) Y_(v) Jz (AD re 2 £200 5:54 0°64 L 3 10 000 5S o-s6 ky 15000 5°54 ou a 5 R000 559 0:25 FE c 33000 S59 O-4%. 4 4A000Date Expt. No. PADRE CONCEICAO COLLEGE OF ENGINEERING Page No. VERNA t sf fine ea citation a AVe_¥ 100 AV; © 556 x 190 10 = 55°64 f Load fequla fon = Uwe VFL xi00 | | Vine = = 854 —5’57 x10 - 654 2 = -0'902/. = i Gesulbs “= Zener déode O4 a voliage seg ulato = hou been stedred. = sf re WoHAana ADate.Page No. C4 tne 6stem bi, (2v and 10v), 1260, Is00, (008), ov), ammetir (o-ImA), ai -& and & Gan be Perera by be scurce &f EMF (Vth) th oen'er wha sueststance (Et) . 4 C¥eD) & the voHase ebtarned across wna when the Load susistes 3 - at eben urcuited bke AGB- iE) The sesictanee Ch) & the suristance reeGeutéd bIwB the terminals A and 6 when the toad Aesisfor wa nemoved and au stunts: are shoxt circut ted. fun the circuct and secotd the value of, toad cursent Cle) emove the Load sesistox CRD and connect dhe voltmeter at the load terminals Fevosd value Thevénin&§ vonage CED. SE Value of voltage sources cu pes eacuit duasam-aaa PADRE CONCEICAO COLLEGE OF ENGINEERING cod VERNA"apt No. PADRE ¢ Zp No. ONCEIcAg COLLEGE OF ENGINE Pare ne VERNA ERING Loud rent Practcat = to's SK I0%, 7 -3 Theveniny Voltage Cvte oss x10” | 6 6% 107A levenin Reg 4A 2:3V SIEEAD Ce (F7) Th a (Rr) 1 800m, (Foon O'FSx 107A LFS x 10%A | Qlise Of Te = O-4xe1024 This Theventn’s Theosiem cs = [Heat [eeattinDate Expt No. PADRE CONCEICAO COLLEGE OF ENGINEERING Pagetio. VERNA SERIES R-L CIRCUIT Ain’ “To sTiuly the 4 substance stool “ HAcrt and tind phase angle 40% “ the Atlpeacot values of RK and £ and plo phoor dvagsam. Abbanatty © Losistance (860% ,1k2) , Inductance Bort CI), voltmauter (0-10, Ammeter (Co-1lomk) stqnal_gqenuotor - bread Baowd , wires £ potdh 2 J inn] Theory : yor ac nce ty figure in tne opposit fotund tp ths crusenb. Auch that ZaVEt Xe. The expession of cuncol is given by L=Imsin Cott O)=ImZO cohere © the phase angle between Coe voltage and uvreot. the magralicls of E “uuuenot ond phase A. be_pound ol. Viz. amL0 = (vm/O)/IZl < ¢ whene @- dan! (x/e); Jm=Vm/z and 8=0-8=0. the -ve sigo d 1A hase gle _indicata esent (ergs behind volage . i nuries BL Ceci dia gsm of ats cumbcnk T= ImsinCot-6) Al ct the aignal qinuales te Ac output Pexminal ef signa tf > i On? To the 1| Date Saute. — PADRE CONCEICAO COLLEGE OF ENGINEERING | VeRWA 8) feeb ofl QD] LC] ke omy [eden d ¢-we' (HD sco [4h | ers | sare 463 | voce |i | 288 [usa | 328 | Puactical | 02) | LcH) | Ve Lv |b =tant(“f | s60 fan [et a3 33°56 yooo | 4H | 3°03 a. by 4-98 | £ Nee Qfth = 628-82 |Z=(RG XE Chose ongte o°¢01"(M2)| * 841-6 Joe 5600 = APs for 560R = 1180-9 Jor 1000 32-3 Jor /00u? sou edacuit was fides! aod Be DUOC ONC os JON and phisor diayiam ae equal. rei ge ee eee aeVee 8-08V FrL Phasor Diagram for 10002 j snbroetseatiiacDate VERNA eal PADRE CONCEICAO COLLEGE OF ENGINEERING Foss Ne. SERIES @-C wecuiT 3_To Atay the seme, sesistonce capa citane! cin cuit and nd phase Cole fon hele Valier Of & and C and plot Hh Pho diigaam — bbanalty Cerictanre (560.2, 0002) Capacitance CSP) | voHmete CO-10Y | Amatis (0-197 signal qenenctOr., bread board voixes. Theouy § goith selenence fn the rincet olicrecom Z 45 4th Opporitiyn Speed to sth. casent path euch that z=J/F4X2 The exbresion foo cuine nt i oive by 7 =ImsinCeot+ =ImZ0 vohiee er a the phase ancl betiveen cfruuit voltage aad current Fre nner dtd 4 tment nd pha. anate to be, torncd as jotouss T= V/z In Jo (W/ts) ZO Im Voz and @= 0+6-©. The +ve_'stqn_ awortatrd ith -the bhavse arate tadicati, thot cunsrent tcacds vor La Puocedime 21) Connects signal generator te ac man. 2) Wnnrct tHe output teuminalr of of@nal oxnesalan (50:2 tp vottmetir. Seep +h: vettmn elonLt REsto10008 pe cre WS eee Ve VV )Date Page No. Expt. No, PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA CCHP)| Xe= Yor Dz -Ve tke -cort 2) | 560 Sue} sist 6 4y-22 24-62 vooo | Spe | 3le-ug LOU Us 6e T) Practical < 2c) Jecwp | ve Ve $=tan' Wh 560 Spe 4-06 23, 60-46 rece | Spe] are ores rear lotions § Xe" Yoc= 816-4e 22 J/REXE = 644-22 > por Sean Z=\OuG-UF for 1000-2 + Phoye cnate: b* cos!(Ye>= 24:62 yor 5602 H=1F-66 Jor 10902 Cc~ 86 _ phasor he agra; 497 560.2.Date PADRE CONCEICAO COLLEGE OF ENGINEERING pers) Expt No. VERNA BIT CHARACTERISTICS. Aim To venit., the eselpuk characteristics of PN be commen ba pafig tana an _of BIT ampbonents 3 Variable DC power bbl, Co-3ev C2ne) NEN Tucnts [i resictoy C0009) 222) aHmeter (2nos) bsicod boas Chet as ger the crstcuit Puocectuue +) Buile the cs Cir + dsSet e valites Of yanioti CemnfSrecis—2 jiven& haut ola orn. 5) Sek th batten waliag Nec Ond Vee ba Ov 4 i La b (Le=Imi) 3 Ireneme Bx voltage Cus) by yoru ine t+ vee tn the. car Ww and soroxd th foxsespending Collertix Cited 6) Tabe 10 sueadsngs at- (e=)mA) 2 Tnowase the emitior current” te 2mA by ech uest a, Vee) value ie: (Te~2mA) | SQUY Co epCio)_vis G Wea).Vee | fo a (0-309)Date Expt. No. PADRE CONCEICAO COLLEGE OF ENGINEERING VERNA Obsesvation Tables SH Je =0-5mAl IenI mA | te 2mMA 00" Je (ma) ala Sle r]HPapofe]epr|~ eK ib Deaans [ir st ond fap Je v/s Ves plotted ls tor