Function Block

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You are here: Core Reference > Coding > Logic > F_TRIG
F_TRIG
Function F_TRIG
Block Name
Description F_TRIG is an edge detection function block.

It detects a change in the state of a Boolean
input. The output from an F_TRIG function
block produces a pulse when True.
Arguments CLK {BOOL}
When the CLK input changes from True to

False, the Q output changes to True for one
execution of the function block. The Q
output then returns to being False until the
CLK input changes from True to False
again.
Returns Q {BOOL}
The Q output changes state according to the

CLK input. When the CLK input changes
from True to False, the Q output becomes
True. It remains True for one execution of
the F_TRIG function block and then returns
to being False.
Example - F_TRIG Function Block Diagram:
In this example, the CLK input comes from a digital point named 'PressureAlert'. The
CLK input changes from True to False causing the Q output to change from False to
True. The Q output remains True for one execution of the function block and then
returns to being False.
Example - F_TRIG ST Program:
The syntax for entering an F_TRIG function block in an ST program is:
VAR
CLK_IN AT %M(.Digital Point1): BOOL;
END_VAR
VAR
Q_OUT: BOOL;
FB : F_TRIG;
END_VAR
FB( CLK := CLK_IN, Q => Q_OUT);
The direct variable is declared in a separate VAR block to the indirect variables. The
input and output variables for the F_TRIG function block are also allocated names that
are different to the names of the inputs and outputs in the function block as this makes
it easier to understand the ST program (for example, the CLK input variable is named
CLK_IN). In this example, the direct variable for the CLK input (CLK_IN) references a
digital point (the Boolean value for the input is taken from a digital point in the
database).
In the second VAR block, the internal variables are declared, including an FB variable
that defines the type of function block.
The ST Program can then reference the variables as inputs and outputs for the function
block:
So, the ST Program uses the CLK_IN input as the CLK input for the FB function block
(which has already been declared as an F_TRIG type). For the Q output, it uses the
Q_OUT variable.
 State Change Detectors

o F_TRIG
o R_TRIG
Disclaimer
ClearSCADA 2017 R2
© 2018 AVEVA Group Plc. All Rights Reserved.
The Schneider Electric industrial software business and AVEVA have merged to trade as AVEVA Group plc, a
UK listed company. The Schneider Electric and Life is On trademarks are owned by Schneider Electric and are
being licensed to AVEVA by Schneider Electric.
You are here: Core Reference > Coding > Logic > R_TRIG
R_TRIG
Function R_TRIG
Block Name
Description R_TRIG is an edge detection function

block. It detects a change in the state of a
Boolean input. The output from an R_TRIG
function block produces a pulse when True.
Arguments CLK {BOOL}
When the CLK input changes from False to

True, the Q output changes to True for one
execution of the function block. The Q
output then returns to being False until the
CLK input changes from False to True
again.
Returns Q {BOOL}
The Q output changes state according to the

CLK input. When the CLK input changes
from False to True, the Q output becomes
True. It remains True for one execution of
the R_TRIG function block and then returns
to being False.
Example - R_TRIG Function Block Diagram:

In this example, the CLK input comes from a digital point named 'PressureAlert'. The CLK input changes
from False to True causing the Q output to change from False to True. The Q output remains True for one
execution of the function block and then returns to being False.
Example - R_TRIG ST Program:

The syntax for entering an R_TRIG function block in an ST program is:
VAR
CLK_IN AT %M(.Digital Point1): BOOL;
END_VAR
VAR
Q_OUT: BOOL;
FB : R_TRIG;
END_VAR
The direct variable is declared in a separate VAR block to the indirect variables. The input and output
variables for the R_TRIG function block are also allocated names that are different to the names of the
inputs and outputs in the function block as this makes it easier to understand the ST program (for
example, the CLK input variable is named CLK_IN). In this example, the direct variable for the CLK input
(CLK_IN) references a digital point (the Boolean value for the input is taken from a digital point in the
database).
In the second VAR block, the internal variables are declared, including an FB variable that defines the type
of function block.
The ST Program can then reference the variables as inputs and outputs for the function block:
So, the ST Program uses the CLK_IN input as the CLK input for the FB function block (which has already
been declared as an R_TRIG type). For the Q output, it uses the Q_OUT variable.
 State Change Detectors

o F_TRIG
o R_TRIG
 Diagnostic Messages and Notification Display
 Database Structure
 Use the Database Schema
 Expressions
 Logic
 QueryPad
 Scripting
 Server Automation
 SQL
Disclaimer
Geo SCADA Expert 2020
The Schneider Electric industrial software business and AVEVA have merged to trade as AVEVA Group plc, a UK listed
company. Schneider Electric, Life is On Schneider Electric and EcoStruxure are trademarks and the property of Schneider
Electric SE and are being licensed to AVEVA by Schneider Electric.
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SR Flip Flop
The SR flip flop is a 1-bit memory bistable
device having two inputs, i.e., SET and
RESET. The SET input 'S' set the device or
produce the output 1, and the RESET input
'R' reset the device or produce the output 0.
The SET and RESET inputs are labeled
as S and R, respectively.
The SR flip flop stands for "Set-Reset" flip

flop. The reset input is used to get back the
flip flop to its original state from the current
state with an output 'Q'. This output depends
on the set and reset conditions, which is
either at the logic level "0" or "1".
The NAND gate SR flip flop is a basic flip flop

which provides feedback from both of its
outputs back to its opposing input. This
circuit is used to store the single data bit in
the memory circuit. So, the SR flip flop has a
total of three inputs, i.e., 'S' and 'R', and
current output 'Q'. This output 'Q' is related
to the current history or state. The term
"flip-flop" relates to the actual operation of
the device, as it can be "flipped" to a logic
set state or "flopped" back to the opposing
logic reset state.
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The NAND Gate SR Flip-Flop

We can implement the set-reset flip flop by
connecting two cross-coupled 2-input NAND
gates together. In the SR flip flop circuit,
from each output to one of the other NAND
gate inputs, feedback is connected. So, the
device has two inputs, i.e., Set 'S' and Reset
'R' with two outputs Q and Q' respectively.
Below are the block diagram and circuit
diagram of the S-R flip flop.
Block Diagram:
Circuit Diagram:
The Set State
In the above diagram, when the input R is
set to false or 0 and the input S is set to true
or 1, the NAND gate Y has an input 0, which
will produce the output Q' 1. The value of Q'
is faded to the NAND gate 'X' as input 'A',
and now both the inputs of the NAND gate
'X' are 1(S=A=1), which will produce the
output 'Q' 0.
Now, if the input R is changed to 1 with 'S'

remaining 1, the inputs of NAND gate 'Y' is
R=1 and B=0. Here, one of the inputs is also
0, so the output of Q' is 1. So, the flip flop
circuit is set or latched with Q=0 and Q'=1.
Reset State
The output Q' is 0, and output Q is 1 in the
second stable state. It is given by R =1 and
S = 0. One of the inputs of NAND gate 'X' is
0, and its output Q is 1. Output Q is faded to
NAND gate Y as input B. So, both the inputs
to NAND gate Y are set to 1, therefore, Q' =
0.
Now, if the input S is changed to 0 with 'R'

remaining 1, the output Q' will be 0 and
there is no change in state. So, the reset
state of the flip flop circuit has been latched,
and the set/reset actions are defined in the
following truth table:
From the above truth table, we can see that

when set 'S' and reset 'R' inputs are set to 1,
the outputs Q and Q' will be either 1 or 0.
These outputs depend on the input state S or
R before the input condition exist. So, when
the inputs are 1, the states of the outputs
remain unchanged.
The condition in which both the inputs states
are set to 0 is treated as invalid and must be
avoided.
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You are here: Core Reference > Coding > Logic > RS
RS
Function RS
Block Name
Description RS is a reset latch where the Reset is

dominant over the Set. It can be used to
determine the state of a Boolean output
based on the states of 2 Boolean inputs.
Arguments S {BOOL}
The Set input S only affects the Q1 output

when the R1 input is False. If the S input
changes from False to True and the R1 input
is False, the change to the S input will cause
Function RS
Block Name
the Q1 output to become True. The Q1

output will then stay True until the R1 state
changes; Q1 will not respond to the S input
changing state again until R1 has become
True and then changed to False again.
R1 {BOOL}
The Reset input R1 is dominant in the RS

function block. When its input is True, the
Q1 output is False; when the R1 input is
False, the value of the Q1 output is
dependent on the S input.
Returns Q1 {BOOL}
The Q1 output is True when the R1 input is

True. When the R1 input is False, the Q1
input can respond to the S input:
 If the S input changes from False to

True and the R1 input is False, the Q1
output becomes True.
 If the S input changes from True to
False while the R1 input is False, the Q1
output remains True.
 If the R1 input is True, the Q1 output is
False irrespective of the state of S.
Example - RS Function Block Diagram:
It is easier to understand the functionality of the RS function block if you imagine the S and R1 inputs as
corresponding to power buttons, and the Q1 output as the result of those buttons being pressed.
The S input receives its value from a point that represents a 'power on' button on plant; the R1 input
receives its value form a point representing the 'power off' button.The True state corresponds to the
buttons being pressed (active) and the False state corresponds to the buttons not being pressed
(inactive).
The power on button is pressed (S is True) and the power off button is not pressed (R1 is False), so the
power is on (Q1 is True). As the power on button cannot turn the power off, further changes to the S input
will not affect the output (as long as R1 remains False). The power remains on until the off button is
pressed (Q1 remains True until R1 becomes True).
When the power off button is pressed (R1 becomes True), the output becomes False (the power is off).
The output will remain False until the R1 input changes to False (the power off button is not pressed) and
the S input is True (the power on button is pressed).
If both buttons are pressed at the same time (S and R1 are both True), the R1 input is dominant and so
the power is off (Q1 is False).
Example - RS ST Program:
The syntax for entering an RS function block in an ST program is:
VAR
S_IN AT %M(.Digital Point1): BOOL;

R1_IN AT %M(.Digital Point2): BOOL;
END_VAR
VAR
Q1_OUT: BOOL;
FB : RS;
END_VAR
FB( S := S_IN, R1 := R1_IN, Q1:= Q1_OUT );
The direct variables are declared in a separate VAR block to the indirect variables. The input and output
variables for the RS function block are also allocated names that are different to the names of the inputs
and outputs in the function block as this makes it easier to understand the ST program (for example, the
R1 input variable is named R1_IN). In this example, the direct variables for the S input (S_IN) and R1 input
(R1_IN) reference digital points (the Boolean values for the inputs are taken from digital points in the
database).
In the second VAR block, the internal variables are declared, including an FB variable that defines the type
of function block.
The ST Program can then reference the variables as inputs and outputs for the function block:
FB( S := S_IN, R1 := R1_IN, Q1 := Q1_OUT );
So, the ST Program uses the S_IN input as the S input for the FB function block (which has already been
declared as an RS type). It uses the R1_IN variable as the value for the R1 input and for the Q1 output it
uses the Q1_OUT variable.
 Set and Reset Bistables

o RS
o SR
 Diagnostic Messages and Notification Display
 Database Structure
 Use the Database Schema
 Expressions
 Logic
 QueryPad
 Scripting
 Server Automation
 SQL
Disclaimer
Geo SCADA Expert 2020
The Schneider Electric industrial software business and AVEVA have merged to trade as AVEVA Group plc, a UK listed
company. Schneider Electric, Life is On Schneider Electric and EcoStruxure are trademarks and the property of Schneider
Electric SE and are being licensed to AVEVA by Schneider Electric.

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Open topic with navigation

You are here: Core Reference > Coding > Logic > F_TRIG

Description F_TRIG is an edge detection function block.

When the CLK input changes from True to

The Q output changes state according to the

Example - F_TRIG Function Block Diagram:

CLK_IN AT %M(.Digital Point1): BOOL;

FB( CLK := CLK_IN, Q => Q_OUT);

FB( CLK := CLK_IN, Q => Q_OUT);

 State Change Detectors

You are here: Core Reference > Coding > Logic > R_TRIG

Description R_TRIG is an edge detection function

When the CLK input changes from False to

The Q output changes state according to the

Example - R_TRIG Function Block Diagram:

Example - R_TRIG ST Program:

CLK_IN AT %M(.Digital Point1): BOOL;

FB( CLK := CLK_IN, Q => Q_OUT);

FB( CLK := CLK_IN, Q => Q_OUT);

 State Change Detectors

The SR flip flop stands for "Set-Reset" flip

The NAND gate SR flip flop is a basic flip flop

The NAND Gate SR Flip-Flop

Now, if the input R is changed to 1 with 'S'

Now, if the input S is changed to 0 with 'R'

From the above truth table, we can see that

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