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Oregano_Sync1588 Driver

Example with OP5600

Drivers Team
Oregano_Sync1588 Driver: Example with OP5600

Oregano_Sync1588 / RT-LAB
• Release versions:
– RT-LAB: 11.1.0

• License keys:
| Name | Version | Count |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| “SYNCHRONIZATION” | 11.1 | Enable/Disable |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------
• Example projects without FPGA:
– RT-LAB Installation Folder\Examples\IO\Oregano\Oregano_syn1588

• Example projects with FPGA:


– RT-LAB Installation Folder\Examples\IO\Oregano\Oregano_syn1588_with_FPGA

• Test plan:
– https://sharepoint.opal-
rt.com/sites/general/rd/oscommfirmware/Test%20Plans/Oregano/Oregano_syn1588_NIC_Test_Plan_v1.1.pdf

• Documentation:
– Help -> Help Contents -> RT-LAB I/O Block Library Reference Guide -> Oregano -> Oregano_sync1588_NIC.html

• Carnet des drivers:


– https://sharepoint.opal-
rt.com/sites/general/products/Lists/Drivers/DispForm.aspx?ID=30&Source=https%3A%2F%2Fsharepoint%2Eopal-
rt%2Ecom%2Fsites%2Fgeneral%2Fproducts%2FLists%2FDrivers%2FAllItems%2Easpx&ContentTypeId=0x0100D28BA4E2BC581
64AADC4F480B41BDB850060178185D3CDBD4AA47FB3182D41D139
Oregano_Sync1588 Driver: Example with OP5600

Firmware / Network configuration

• Firmware upgrade and network configuration procedure:


– \\mainnas\Userdata\F_Production\Test\Oregano_syn1588_NIC\Oregano_syn1588_PCIe_NIC_Firmware_Up
grade_and_Network_configuration_procedure_V1.0.pdf

• Firmware updater:
– \\mainnas\Logiciels\Oregano\syn1588_nic_updater\syn1588_NIC_Updater.exe

• Firmware:
– \\mainnas\Logiciels\Oregano\syn1588_nic_Firmware\user_encrypt_auto_build782.rpd

• Oregano card Windows driver:


– \\mainnas\Logiciels\Oregano\syn1588_nic_Windows_driver

Note: Firmware version (Build number) should be 782 or higher


Oregano_Sync1588 Driver: Example with OP5600

Hardware overview

FPGA Sync output

IRIG-B or 1PPS output

SFP Connector

RJ45
Connector
Oregano_Sync1588 Driver: Example with OP5600

1PPS signal
• Frequency = 1Hz
Oregano_Sync1588 Driver: Example with OP5600

IRIG-B signal
• Bit time = 10 ms
• Bit rate = 100Hz

• Frame time = 1000 ms


• Frame rate = 1 Hz
Oregano_Sync1588 Driver: Example with OP5600

FPGA Sync signal (Oregano output)


• Frequency = Time step of the model
• Pulse width = Time step /2
Oregano_Sync1588 Driver: Example with OP5600

Clock adapter output signal


• Frequency = Time step of the model
• Pulse width = 100 ns
Oregano_Sync1588 Driver: Example with OP5600

Oregano_Sync1588 Driver setup without FPGA


Oregano_Sync1588 Driver: Example with OP5600

Oregano_Sync1588 Driver setup with FPGA


Oregano_Sync1588 Driver: Example with OP5600

Supported features
• Operate as an IEEE1588 master or an IEEE1588 slave node
• Supports IEEE-1588-2002 (PTP V1) and IEEE-1588-2008 (PTP V2)
• Supports all standard profiles:
– Default (IEEE1588-2008 Annex J.3)
– Default P2P (IEEE1588-2008 Annex J.4)
– Power (C37.238 2011)
– Power S (C37.238 2011 slave only)
– Smtpe (ST 2059-2)
– Smtpe S (ST 2059-2 slave only)
– Telecom (G.8265.1 master only)
– Telecom2 (G.8265.1)
– Telecom2 S (G.8265.1 slave only)
• Generate demodulated IRIG-B or 1PPS signal to synchronize external devices
• Can be synchronized by an external IRIG-B or 1PPS signal
• Implements best-master-algorithm defined in the IEEE1588 standard based on the configurable priority
• Supports virtual LANs (VLAN)
• Supports peer-to-peer and end-to-end delay mechanisms
• Starts the simulation aligned to the 1PPS reference (next second change)
Oregano_Sync1588 Driver: Example with OP5600

Operation modes possible


• Operate as an IEEE-1588 slave mode synchronized through the network by an external IEEE1588 master
and one of the following options:
– Do not generate any external signal
– Generate an IRIG-B signal
– Generate a 1PPS signal
• Operate as an IEEE-1588 master node to synchronize external IEEE1588 slave nodes on the network and
one of the following options:
– Do not generate any external signal
– Generate an IRIG-B signal
– Generate a 1PPS signal
• Operate as an IRIG-B slave node synchronized through an external IRIG-B signal and one of the following
options:
– Do not perform any IEEE1588 operation
– Operate as an IEEE-1588 master node to synchronize external IEEE1588 slave nodes on the network
• Operate as an 1PPS slave node synchronized through an external IRIG-B signal and one of the following
options:
– Do not perform any IEEE1588 operation
– Operate as an IEEE-1588 master node to synchronize external IEEE1588 slave nodes on the network
Oregano_Sync1588 Driver: Example with OP5600

RT-LAB context
• Import one of the 2 example projects:
– In the Project Explorer, double click on “Create a new project…”, give the project a name, click on
“Next>”, open the folder “IO/Oregano” and choose the “Oregano_syn1588” or
“Oregano_syn1588_with_FPGA”. You should see the following:

– You can also add another Oregano driver by right clicking on the “I/Os” folder, and select “New” ->
“New I/O”, select the Synchronization I/O, give it a unique name and click on “Finish”:
Oregano_Sync1588 Driver: Example with OP5600

Driver configuration
• The example projects come with an already configured Oregano_syn1588 driver. This configuration
matches the example model and connections between the model and the driver are already made.

Below is the default configuration of the Oregano_Syn1588 driver:


Oregano_Sync1588 Driver: Example with OP5600

Driver configuration
• Hardware: The only supported hardware for the moment is Oregano Syn1588 PCIe card.

• Enable verbose mode: If set to "true", additional information will be displayed into RT-LAB screen during
the load of the model

• Synchronization mode: Select if the card will be synchronized


from PTP, IRIG-B or 1PPS. When configured in PTP mode, the
driver can operate as a PTP master or a PTP, slave. The
operation mode depends on the selected PTP profile and
priority. When configured in IRIG-B or 1 PPS mode, the driver will expect to receive a valid signal on the
external SMA connector. In this mode, the driver can also operate as a PTP master to synchronize other
PTP slaves on the network.

• Generate sync signal: This opion is only available when the


external synchronization mode is PTP. When operating in PTP
mode, the external SMA connector can be used to generate a,
1 PPS or an IRIG-B signal.
Oregano_Sync1588 Driver: Example with OP5600

Driver configuration

• Wait for next second: If this parameter is enabled, the beginning of the simulation will be delayed until
the next second change. The rising edge of the synchronization signal will be aligned with the rising edge
of the 1 PPS signal in either PTP, IRIG-B or 1 PPS mode. If this parameter is disabled, the simulation can
begin in the middle of a second.

• Wait for synchronization timeout (seconds): The synchronization process will begin once the model is
loaded but the simulation will not begin until the timeout configured by this parameter has expired. This
parameter should be tuned to make sure the simulation is started with a good synchronization with the
external source. To begin the simulation immediately after the model is loaded, set this parameter to
zero.

• Network interface: This parameter must match with the network


interface name of the IEEE1588 compatible hardware. An error will
be displayed at load time in case that the network interface is not
supporting PTP.
Oregano_Sync1588 Driver: Example with OP5600

Driver configuration

• PTP profile: Select the PTP profile that matches with your
architecture. A PTP profile specifies a preset of IEEE1588
configurations and operation mode. For more information,
please consult the IEEE 1588-2008 standard. Possible
options are default, default_p, power, power_s, smtpe,
smtp_s, telecom, telecom2, telecom2_s

• Delay mechanism: The mechanism used to calculate the


delays incurred during the propagation of the packets
across the network. Possible options are peer-to-peer and
end-to-end.
Oregano_Sync1588 Driver: Example with OP5600

Driver configuration

• Use VLAN: Select this option if the synchronization hardware is connected to a VLAN. In this case, the
VLAN identifer needs to be specified.

• Priority: The value chosen for the priority will be taken into account by the Best Master Clock Algorithm
(BMCA). A lower value means a higher priority. If the IEEE1588 card is operating in master mode and
another device with a higher priority appears, on the network, the simulator will become a slave.

• Advanced options: The Oregano Syn1588 PCIe card has the possility to handle very specialised
configurations. This field is there to open custom configurations in case it is required for some customers.
This field should only be used by advanced users or with the help of Opal-RT's support team.
Oregano_Sync1588 Driver: Example with OP5600

Oregano_Sync1588 / Example model without FPGA

Console subsystem Master subsystem


Oregano_Sync1588 Driver: Example with OP5600

Oregano_Sync1588 / Example model with FPGA

Console subsystem Master subsystem


Oregano_Sync1588 Driver: Example with OP5600

Oregano_Sync1588 / HYPERSIM

• Release versions:
– HYPERSIM: 6.0

• License keys:
| Name | Version | Count |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------
| “SYNCHRONIZATION” | 6.0 | Enable/Disable |
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------

• Example project, configuration files and documentation:


– https://sharepoint.opal-rt.com/sites/general/products/Documents/Oregano_Syn1588%206.0.7.zip

• Sensor numbering range: [9100 9111]


– https://sharepoint.opal-rt.com/sites/general/products/Documents/Sensor_numbering_standard.pdf

• Carnet des drivers:


– https://sharepoint.opal-
rt.com/sites/general/products/Lists/Drivers/DispForm.aspx?ID=30&Source=https%3A%2F%2Fsharepoint%2Eopal-
rt%2Ecom%2Fsites%2Fgeneral%2Fproducts%2FLists%2FDrivers%2FAllItems%2Easpx&ContentTypeId=0x0100D28BA4E2BC581
64AADC4F480B41BDB850060178185D3CDBD4AA47FB3182D41D139
Oregano_Sync1588 Driver: Example with OP5600

HYPERSIM / Example model without FPGA


Oregano_Sync1588 Driver: Example with OP5600

HYPERSIM / Example model with FPGA


Oregano_Sync1588 Driver: Example with OP5600

HYPERSIM / OREGANO_SYNC_CFG.opal

OPAL-1.0 Object Parameter name Possible values


Synchronization::Configuration { Hardware _Oregano_Syn1588_PCIe
m00_useCoreZero=false
OutSync Disabled
m01_hardware=_Oregano_Syn1588_PCIe IRIG_B
m02_verbose=true _1_PPS
m03_boardId=0
SyncMode PTP
m04_syncMode=PTP IRIG_B
m05_outSync=Disabled _1_PPS
m06_waitForNextSecond=true DlyMechanism _Peer_to_peer
m07_waitForSyncTimeoutSec=10 _End_to_end
m08_networkInterface=eth2
PtpProfile _Default
m09_ptpProfile=Power Default_P
m10_delayMechanism=_Peer_to_peer Power
m11_useVLAN=false Power_S
Smtpe
m12_vlanID=0 Smtpe_S
m13_priority1=1 Telecom
} Telecom2
Telecom2_S
Oregano_Sync1588 Driver: Example with OP5600

HYPERSIM / OREGANO_SYNC.io

[HARDWARE_DIL]
!Tag vendor identification IOMode configFile
!--- ------ -------------- ------ ----------
opal1 Synchronization none 1 /export/local/ssr/hyconfig/OREGANO_SYNC_CFG.opal
!
!
[MAPPING]
!Tag Node(Core)
opal1 1
!
!
[SENSORS_DIL]
!Type Sensors Tag ConnectionPoint Modifier
!---- ---- ----- -------- ------------------------------------------------ ---------
AD 9101 9101 opal1 "Time/Seconds" none
AD 9102 9102 opal1 "Time/Nanoseconds" none
AD 9103 9103 opal1 "Info/PTP Sync State" none
AD 9104 9104 opal1 "Info/PTP Slave Offset" none
AD 9105 9105 opal1 "Info/Sync Accuracy" none
Oregano_Sync1588 Driver: Example with OP5600

HYPERSIM / Siemens Ruggedcom RSG2488 configuration and usage


In our tests, we used the Siemens Ruggedcom RSG2488 to act as a PTP Master/Slave and to generate 1PPS
and IRIG-B signals.
• Access information:
– IP address: 192.168.3.197
– Username = admin
– Password = admin

• To generate IRIG-B signal, set the “TTL Output” to “PWM”


Administration -> System Time Manager -> Configure IRIGB -> TTL Output = PWM

• To generate 1PPS signal, set the “TTL Output” to “PPS”


Administration -> System Time Manager -> Configure IRIGB -> TTL Output = PPS

– Note: “Primary time source” must be configured to “Local Clock”:


Administration -> System Time Manager - > Configure Time Source -> Primary Time Source = LOCAL CLK
Oregano_Sync1588 Driver: Example with OP5600

Questions?

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