PULSE WIDTH MODULATION

 6 single edge controlled PWM outputs

 or 3 double edge controlled PWM outputs
 or a mix of both types
 The match registers also allow:
 Continuous operation with optional interrupt
generation on match.
 Stop timer on match with optional interrupt
generation.
 Reset timer on match with optional interrupt
generation
 Single edge controlled PWM outputs all go high
at the beginning of each cycle.
 Double edge controlled PWM outputs can have
either edge occur at any position within a cycle.
 This allows for both positive going and negative
going pulses.
 Pulse period and width can be any number of
timer counts. This allows complete flexibility in
the trade-off between resolution and repetition
rate
 Two match registers can be used to provide a
single edge controlled PWM output.
 One match register (PWMMR0) controls the PWM
cycle rate, by resetting the count upon match.
 The other match register controls the PWM edge
position
 Additional single edge controlled PWM outputs
require only one match register each
 PWM1 - Output from PWM channel 1.
 PWM2 - Output from PWM channel 2.
 PWM3 - Output from PWM channel 3.
 PWM4 - Output from PWM channel 4.
 PWM5 - Output from PWM channel 5.
 PWM6 - Output from PWM channel 6.
 PWMTCR PWM Timer Control Register-
 It is used to control the Timer Counter functions. The Timer
Counter can be disabled or reset through the PWMTCR.
 PWMTC PWM Timer Counter-
 The 32-bit TC is incremented every PWMPR+1 cycles of
PCLK. The PWMTC is controlled through the PWMTCR.
 PWMPR PWM Prescale Register-
 The PWMTC is incremented every PWMPR+1 cycles of
PCLK
 PWMMCR PWM Match Control Register-
 The PWMMCR is used to control if an interrupt is
generated and if the PWMTC is reset when a Match occurs
 PWMMR0 PWM Match Register 0.
 PWMMR0 can be enabled through PWMMCR to
reset the PWMTC, stop both the PWMTC and
PWMPC, and/or generate an interrupt when it
matches the PWMTC.
 In addition, a match between PWMMR0 and the
PWMTC sets all PWM outputs that are in single-
edge mode, and sets PWM1 if it is in double-edge
mode.
7:4 3 2 1 0
PWM Enable - Counter Reset Counter Enable
1=PWM mode is 1=PWM Timer Counter 1= PWM Timer
enabled. and the PWM Prescale Counter and PWM
PWM mode causes Counter are synchronously Prescale
shadow registers to reset on the next positive Counter are enabled
operate in connection edge of PCLK. The for counting.
with the Match counters remain reset until 0=counters are
registers TCR is returned to zero. disabled.
20- 17- 14- 11- 8-7-6 5-4-3 2 1 0
19- 16- 13-12 10-9
18 15
PWMMR0S PWMMR0R PWMMR0I
PW PW PWM PWM PWM PWM 1: Stop on 1: Reset on 1: Interrupt on
MM MM MR4 MR3 MR2 MR1 PWMMR0: the PWMMR0: PWMMR0: an
R6BI R5 BITS BITS BITS BITS PWMTC and the interrupt is
TS BITS PWMPC will be PWMTC generated
stopped and will be when
PWMTCR[0] reset if PWMMR0
will be set to 0 PWMMR0 matches the
if PWMMR0 matches it. value in the
matches the PWMTC
PWMTC
  Enables PWM outputs and selects PWM
channel types as either single edge or double
edge controlled.
15 14 13 12 11 10 9 8:7 6 5 4 3 2 1:0
PWM PWM PWM PWM PWM PWM PWM PWM PWM PWM PWM
ENA6 ENA5 ENA4 ENA3 ENA2 ENA1 SEL6 SEL5 SEL4 SEL3 SEL2

1 = Enable 1=Selects double edge

0 = disable controlled mode for the PWM
output
0=Selects single edge
controlled mode for PWM
  The PWM Latch Enable Register is used to
control the update of the PWM Match
registers when they are used for PWM
generation
7 6 5 4 3 2 1 0
- Enable Enable Enable Enable Enable Enable Enable
PWM PWM PWM PWM PWM PWM PWM
Match 6 Match 5 Match 4 Match 3 Match 2 Match 1 Match 0
Latch Latch Latch Latch Latch Latch Latch
Writing a one to this bit allows the last value written to the PWM Match register
to be become effective when the timer is next reset by a PWM Match event
#include <LPC214X.H>
#define PWMPRESCALE 60
void initPWM(void)
{
PINSEL0 = (1<<1); // Select PWM1 output for Pin0.0
PWMPCR = 0x0;
PWMPR = PWMPRESCALE-1; // 1 micro-second resolution
PWMMR0 = 20000; // 20ms = 20k us - period duration
PWMMR1 = 1000; // 1ms - pulse duration i.e width
PWMMCR = (1<<1); // Reset PWMTC on PWMMR0 match
PWMLER = (1<<1) | (1<<0); // update MR0 and MR1
PWMPCR = (1<<9); // enable PWM output
PWMTCR = (1<<1) ; //Reset PWM TC & PR
PWMTCR = (1<<0) | (1<<3); // enable counters and PWM Mode
}
]int main(void)
{
initPWM(); //Initialize PWM
while(1)
{
if( !((IOPIN0) & (1<<1)) ) // Check P0.1
{
PWMMR1 = 4000;
PWMLER = (1<<1); //Update Latch
Enable bit for PWMMR1
}
else if( !((IOPIN0) & (1<<2)) ) // Check P0.2
 {
PWMMR1 = 7000;
PWMLER = (1<<1);
}
else if( !((IOPIN0) & (1<<3)) ) // Check P0.3
{
PWMMR1 = 10000;
PWMLER = (1<<1);
}
else if( !((IOPIN0) & (1<<4)) ) // Check P0.4
{
PWMMR1 = 15000;
PWMLER = (1<<1);
}
}
}