A Novel Current-Tripler DCDC Converter *
Jinghai Zhou,Ming Xu and Fred C . Lee
Center for Power Electronics Systems
The Bradley Department of Electrical and Computer Engineering
Virginia Polytechnic Institute and State University
Blacksburg, VA 24061 USA
Abstract- This paper proposes a novel zero-voltage-
switching (ZVS) current-tripler DCIDC converter. Compared to
the conventional phase-shifted ZVS full-bridge DC/DC
converter with current-doubler rectifier, the proposed current-
tripler DClDC converter reduces the synchronous rectifier (SR)
conduction loss as well as the transformer winding loss.
Furthermore, the proposed transformer structure is very
compact, and thus the power density of the converter could he
greatly increased. Analysis and experimental results show that
the proposed topology offers great advantages when the
converter output current goes higher and the voltage goes lower,
as demanded by future microprocessors and
telecommunications systems. A 48V/l.OV, 100A, 30OkHz
prototype is implemented, and the experimental results show
that it can achieve 87% efficiency at full load.
1. INTRODUCTION
It is well known that the power supply for microprocessors
and telecommunications equipment demands higher current
and lower output voltage. As the current goes up to 130A and
even higher in the future, the total conduction loss of the
converter is significantly increased, which causes severe
thermal issues. High efficiency and high power density are
the general requirements for 4XV-input DCiDC converters.
For low-voltage and high-current applications, the
secondary-side power losses have a major impact on
efficiency. Firstly, synchronous rectification, with
specifically designed low-voltage MOSFETs, is widely used
to dramatically improve the efficiency of low-voltage DCiDC
converters [I -31. Secondly, proper secondary-side topologies
should be selected to reduce the RMS current through the
synchronous rectifiers (SRs). There are three major
secondary-side topologies: forward rectifier, center-tapped
rectifier and current-doubler rectifier. Among these three
topologies, the current-doubler rectifier is the most suitable
for high-current, low-voltage applications. Because of its
simpler transformer structure and two-times-lower inductor
Currents and transformer secondary currents, the current-
doubler topology can offer lower conduction losses than the
conventional center-tapped topology 141.
* This work was supported by htel, Texas InstNmenlS, National
Semicanducton, Intenil, TDK, Hitachi, Hipro, Power-One, Artesyn,
mineon, and Deita Electronics. AM. this work made of ERC shared
facilities supported by the National Science Foundation under Award
Number EEC-9731677.
0-7803-7754-0/03/$17.00 02003 IEEE
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The reason for the lower RMS current of the current-
doubler rectifier is that during the freewheeling period (when
there is no input-output energy transfer), the two SR switches
share the load current. As a result, the total rectifier
conduction loss during the freewheeling period is reduced.
However, as the current continuously goes up, the SR
conduction losses also increase by a power of two.
Conventionally, the current-doubler with more semiconductor
devices in parallel is used to lower the on-resistance of the
SR, and a distributed magnetic is also used to reduce the
transformer winding losses. However, those solutions have
their limitations:
a) increased cost,
h) larger footprint and lower power density, and
c) more devices mean greater driver loss.
These issues pose significant challenges for future high-
current, low-voltage DCiDC converters for microprocessors
as well as telecommunications applications.
The forward rectifier can be considered as a single-phase
secondary topology, and the current-doubler can be treated as
a two-phase interleaving topology. Can the current-doubler
be extended to three phases so that there are three MOSFETs
sharing the load current during the freewheeling period?
Theoretically, it will have lower RMS current through each
device, and lower secondary conduction loss is expected.
Based on this concept, the current-tripler secondary topology
is proposed, as shown in Figure 1. The proposed topology can
easily achieve zero-voltage-switching (ZVS) for all the
MOSFETs, therefore, switching loss is significantly reduced.
In this paper, the operating principle of the proposed current-
tripler D O C converter is analyzed in detail. The benefits of
this topology for high-current, low-voltage applications are
discussed as well. Experimental results are given to verify
those advantages.
11. OPERATING PRINCIPLE OF THE PROPOSED TOPOLOGY
The proposed current.tripler DC/DC is shown in
Figure There are thee switch legs at the primary side, In
each switch leg, the top and bottom switches are operating
complementarily. The required isolation of the primary side
and the secondary side is achieved by a high-frequency three-
phase transformer, which has delta connections at both sides.
At the secondary side, a structure including three SRs, which
is called the current-tripler, is proposed to reduce the
conduction loss of the secondary side.
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 111. COMPACT MAGNETIC
STRUCTURE FOR THE PROPOSED
CURRENT-TRIPLER
TOPOLOGY
A major benefit of the ,current-tripler concept is the
magnetic structure of the transformer. It is basically an
integrated magnetic core with distributed windings. In Figure
1, the three-phase transformer has three sets of primary-
secondary windings. Both the primary and secondary
Figure 1. Pmposed ZVS current-triplerDCIDC converter.
windings are delta-connected. A simple way to implement
In order for the proposed topology to achieve ZVS, a this transformer structure is to use three separated cores, as
complementary control is adopted [5]. The switch-timing shown in Figure 3. In Figure :I, aa', hh' and cc' represent the
diagrams for the primary switches Q1-Q6 and secondaly three primary windings. AA', BB' and CC' are the secondary
synchronous rectifier switches SI-& are shown in Figure 2. windings. Oa,(Pb and QC represent the AC flux through the
Based on the switch-timing diagram, there are 12 operating magnetic cores.
modes during one switching cycle.
Model [t,-tl]: The leakage inductor of the transformer
resonates with the output capacitors of Q3 and Q4. The output
capacitor of Q3 is discharged and that of Q4 is charged. At
certain load conditions, the energy stored in the leakage
inductor is sufficient to achieve ZVS for Qa.
Mode2 [tl-t2]: During this time interval, the energy is
transferred from the primary side to the secondary side. The
current flows through Q3,winding bc and ba, then Q2and Q6.
Mode3 [tz-t3]: At t2, Q3 is tumed off, and the load current
is used to charge the output capacitor of QI and to discharge
the output capacitor of Qoto achieve ZVS for Qa.
.
Figure 3. Implementation by three discrete cores.

vMB
Mode4 [t3 -to]: During this interval, the energy stored in
the leakage inductor of the transformer is freewheeling
through the path of 4 4 , winding bc and ha, and Q2 and Q6.
From t, to to, leg b completes its two switching transitions
that are both ZVS.
VW 3--=73
From ta to tg, another switch leg, leg c, executes its two
ZVS transitions with the same operation principle as leg b. V., b--=
From tgto t12,leg a executes the same function. Figure 4. Voltage waveforms ofthree primary windings.
Figure 4 shows the voltage waveforms across the three
primary windings at steady state. It is easily observed that:
v,. + Vbb.+ v,,. = 0. (1)
According to Faraday's law, the induced voltage (v) of an
N-tums winding from a time-changing magnetic field (@) is:
V = N * (dWdt). (2)
Therefore, for each primary winding, the winding voltage
is:
V.,. = N * (d@./dt), (3)
Vbb.= N * (dWdt), and (4)
V,,. =N * (d@,/dt). (5)
Adding (3), (4) and (S), ;and substituting the right side of
the equation with (1) yields:
d@,/dt + d@ddt + d@Jdt := 0, (6)
which means that the AC flux of the three magnetic cores is
cancelled out. The magnetic structure can he simplified as
Figure 2. Control strategy of proposed current-triplerDCiDC converter. one core with three legs, as r,hown in Figure 5. This structure

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is very similar to a three-phase 60Hz transformer with three
magnetic legs [6]. The removal of the fourth leg is possible
due to the automatic AC flux balance between the three legs,
as derived above.
Figure 5. Implementation by a three-leg core.
Figure 6. Magnetic core SlNChlre.
This compact transformer structure reduces the core loss
because the total volume of the core is reduced. Figure 6
shows an example of this core structure. The cross-sections of
the three legs are identical, so the flux density of each leg is
the same.
During the load transient, the duty cycle changes
accordingly. The proposed transformer structure retains the
AC flux balance, because V,. + Vbb.+ V,,. =O is always
valid. For example, in Figure 7, during the period Tb, QI, Q4
and Q6 are conducting. Terminal c of winding cc’ and
terminal a’ of winding aa’ are shorted through Q4 and Q6.
Suppose a load transient happens during Tb. so the duty cycle
of the control MOSFET Q , changes accordingly. Since both
terminals of windings aa’ and cc’ are connected, no matter
how the duty cycle varies; the variation of the winding
voltages of the two windings remains the same. Therefore,
the proposed magnetic structure is still functional during the
load transient.
I ‘8
Figure 7. Winding voltages during the load transient.
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Another concern in the delta-delta connection is the loop
current around the windings. According to the voltage
waveforms in Figure 4, Fourier analysis can determine
whether or not there are any 3n harmonics that will cause
loop current along the windings. For one winding voltage,
V,,., the Fourier expression is:
where COis the DC component, and C, is the magnitude of
the kthharmonic. Substituting k 3 n into (8) yields:
c,. =o . (9)
There is no loop current along the windings as long as the
winding voltages are equal as shown in Figure 4.
IV. SECONDARY-SIDE Loss ANALYSIS
CONDUCTION
The secondary-side conduction loss of two topologies is
compared: one topology is the phase-shift full-bridge
converter with a current-doubler rectifier, and the other one is
the proposed three-phase converter with a current-tripler
rectifier. Both can achieve ZVS under certain load conditions.
It is assumed that the output current is the same, and the
number of rectifier devices is also the same, as illustrated in
Figure 8. For the current-doubler topology (Figure Sa), each
switch leg has three MOSFETs in parallel. For the current-
tripler topology (Figure 8b), two MOSFETs in parallel form
one switch leg. The average current through each MOSFET is
4
6
for both the current-doubler and the current-tripler.
However, the RMS current is different. In order to simplify
the calculation of RMS current through one MOSFET, the
current ripple of the inductor current is ignored. Therefore,
for both topologies the current waveforms through one
MOSFET can be derived, as shown in Figure 9. The RMS
current through one device can be calculated as follows. For
the current-doubler, the RMS current through one MOSFET
I
is L
6
f i , For the current-tripler, the RMS current is
 Equation (12) shows that the DC resistance of a round
winding is inversely proportional to ln(r2/rl). If for example
the current doubles, m order to keep the same conduction
loss, the DC resistance needs to be reduced to one quarter.
The outer radius r2' must increase so that:
4
r'-'2
2 --j-. (13)
I'
@)
Suppose r2=2rl, then r2' will be 16rl. The outer radius of
Figure 8. Currentdoubler (a) and current-tnpler @) for SR conduction loss the winding increases significantly in order to maintain the

.,okb4.
comparison.
same conduction loss. This xs also true for other winding
shapes. One solution for this issue is the distributed windings.
I.i'T
13 ~T For the current-doubler, three secondary windings are in
1 3 ............ parallel. For the current-tripler, three secondw windings are
delta-connected (Figure 11). The secondary-side winding
T12 T13 2TI3 T current waveforms for both topologies are shown in Figure
(a) @) 12. The RMS current through one current-doubler
1
Figure 9. Current waveforms through one MOSFET: (a) currentdoubler and transformer secondary-side winding is - I , , and that for the
@) current-tripler 6
The total SR conduction loss savings of the current-tripler is 45
current-triplet is -I, . The total winding conduction loss
20%. 9
Similarly, the transformer secondary winding conduction savings of the current-tripler is 12.5%.
losses need to be considered. A current-doubler single
secondary winding transformer is analyzed first. Assume the
winding shapes are round, as shown in Figure 10. Also
assume the winding copper thickness t is smaller than the
skin depth. The DC resistance of the winding can be
calculated by integrating the incremental admittance of the
slim copper loop with the width of dx. The incremental
admittance dY of a copper loop with radius x and width dx is:
Current
Tripler
I
t
t.dx
dY=-, I U
p.2.m (8) @)
Figure 11. Secondary winding SlNCtLITe for currentdoubler (a) and current-

iaiuGUm.
where p is the resistivity of the copper. The winding tripler @).
admittance is the integration of dY from rlto r2, such that
IJ6
ia onE;,
Id6 21J9

(a) (b)
Figure 12. Current waveforms through secondary windings: (a) Current-
doubler and $3)
Current-tripler
Thickness: t
Figure I O . Copper winding DC resistance calculation.
V. EXPERIMENTAL
RESULTS
A prototype is developed to verify the theoretical analysis.
The specifications are:
a) Input voltage: 48V
So the DC resistance R is: b) Output voltage: 1.OV
c) Maximum load current: lOOA @ Vo = 1.OV
d) Switching frequency: 300kHz
A customized core is used as the current-tripler
transformer. A conventional E132 core is machined as

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 shift. Basically, it is a three-phase interleaving topology,
which means that it has all the benefits of the multiphase
interleaving technique that is widely used for non-isolated
12V-input voltage regulators.
Figure 15 shows the primary-side transformer winding
voltages. Due to the ZVS, the waveforms are very clean.
Figure 15 also matches the theoretical waveforms given in
Figure 4.
Figure 16 shows the efficiency curves of the prototype.
The efficiency at 1OOtvl.OV is 87%.
Customized CuFrent-Tripler
Transformer 92 , I T , I , , I , , ,
q,1 -.I- - -8. ~ J. ~ . ~ I .L
1 ~ .- L . .I-. i- - J - 1. ~.
~

Figure 13. holotype using a customized current-tnplertransformer.

follows. Firstly, the center leg is symmetrically grounded so

that the cross-sectional areas of the three legs are identical.
Because the effective cross-sectional area of the E132 core is
much larger than what is needed here, it is then cut into one-
third. The high-current winding length is reduced. Figure 13
shows a picture of the developed prototype. The six primary
MOSFETs are Hitachi’s HAT2173H, and the 12 secondary Load [AI
devices are HAT2160H. Four MOSFETs in parallel form one Figure 16. Measured eEciency.
switch leg. The inductance of the output inductor is
200nWchannel. VI. CONCLUSION
Figure 14 shows the drain-source voltages of the three This paper proposed a novel ZVS current-triplet D C D C
control MOSFETs at the primary side. They have a 120” converter. The proposed topology has the following
phase advantages:
.
Soft switching for primary switches,
Reduced synchronous rectifier conduction loss,
Reduced transformer winding loss,
Reduced transformer core loss,
Compact transformer shucture, as compared with
distributed magnetic,
Reduced output ripple current compared with
current-doubler rectifiers.
circuit ooeratine. orinciule. is analvzed. The
- I

transformer magnetic structure is derived theoretically. Both

the SR conduction loss and the transformer winding loss are
discussed and compared with the conventional full-bridge
t 31.15 ye phase-shifted DCDC converter that uses the current-doubler
Figure 14. Drain-source voltages afthree switch legs (50Vidiv. 0.5widiv). rectifier. Finally, a prototype is built to demonstrate the
concept of the current-tripler DCDC converter, which has a
maximum efiiciency of 87% at l.OV/lOOA output.

-
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