A B C D E

WWW.AliSaler.Com

1 1

2
Compal confidential 2

JBK00 LA-4091P Schematics Document

Mobile AMD S1G2 CPU with ATI
RS780M & SB700 core logic
3 3

2007-10-30
REV:0.2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 1 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
Compal Consumer AMD UMA 17"
confidential
72QFN
1
Thermal Sensor AMD S1G2 CPU DDR2 800MHz 1.8V DDR2-SO-DIMM X2 1

BANK 0, 1, 2, 3 P8, 9 Clock Generator

ADM1032ARMZ SLG8SP626
638-PIN uFCPGA 638
P6 P20
Dual Channel
P4, 5, 6, 7

Fan conn P4
Htper Transport Link
16X16

ATI RS780M Finger Print

P36
LVDS Panel
Interface P22 USB Camera
2
P10, 11, 12 with Digital MIC P36
2

CRT
P21 USB2.0 X12
A-Link Express II USB conn x3
P36
4X PCI-E
HDMI
P21
BT Conn
P36
PCI-E BUS*5 Azalia

ATI SB700 SATA Master-1

SATA Master-2
Touch Screen
SATA Slave
Realtek Mini-Card*2 Express Card
SATA Slave
8102E(10/100M) WLAN & TV Tunner
P30 P23, 24, 25, 26, 27
8111C(GbE) P29 Dock
P30 P43

3 LED RJ45 Conn. LPC BUS Audio CKT AMP & Audio Jack 3
P29 Codec_IDT9271 P33 TPA6020A2 P35
P41

MDC V1.5
RTC CKT. JMOB385 SPI ROM
SPI ENE P29
Subwoofer
P19
25LF080A
P37
KB926 P38
P35
P30
SATA HDD Connector
P28

Power OK CKT. Touch Pad CONN. Int.KBD

CardReader P38
P30
CIR SATA ODD Connector
P28
P38

Power On/Off CKT. SATA 2nd HDD Option Connector

P28
DC/DC Interface CKT.
4 P43 e-SATA Connector 4

P36
DC/DC Interface CKT.
P43
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 2 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
Voltage Rails O MEANS ON X MEANS OFF

Symbol Note :
+5VS
1
+3VS : means Digital Ground 1

power +2.5VS
plane +1.8VS
+1.5VS : means Analog Ground
+1.1VS
+B +1.8V +VGA_CORE @ : means just reserve , no build
+5VALW
+3VL +3VALW +0.9V DEBUG@ : means just reserve for debug.
+1.2VALW +1.2V_HT
State +CPU_CORE_NB
L Layout Notes
+CPU_CORE_0
+CPU_CORE_1 UMA@ : means for RS780M.

S0 O O O O
S1 O O O O
2 2

S3 O O O X
S5 S4/AC O O X X
S5 S4/ Battery only O X X X
S5 S4/AC & Battery
don't exist X X X X

I2C / SMBUS ADDRESSING

SMBUS Control Table
DEVICE HEX ADDRESS SERIAL
THERMAL
SENSOR
SOURCE INVERTER BATT EEPROM SODIMM CLK CHIP MINI CARD LCD HDMI G-Sensor
DDR SO-DIMM 0 A0 10100000
CPU &
3
ADM1032 I / II Slot 2 3

DDR SO-DIMM 1 A4 10100100 SMB_EC_CK1

CLOCK GENERATOR (EXT.) D2 11010010 SMB_EC_DA1
KB926 X V V X X X X X X X
ACCELEROMETER 3A 00111010 SMB_EC_CK2
SMB_EC_DA2
KB926 X X X V X X X X X X
I2C_CLK
I2C_DATA
RS780M
X X X X X X X V X X
EC SM Bus1 address EC SM Bus2 address DDC_CLK0

Device HEX Address Device HEX Address

DDC_DATA0
RS780M X X X X X X X X V X
DDC_CLK1
Smart Battery 16H 0001 011X b
ADI1032-2 CPU 9AH 1001 101X b
DDC_DATA1
RS780M X X X X X X X X X X
24C16 A0H 1010 000X b SCL0
CPU SIC interface 98H 1001 100X b SDA0
SB700 X X X X V V X X X V
SCL1
SDA1
SB700 X X X X X X V X X X
SCL2

4
SDA2
SB700 X X X X X X X X X X 4

SCL3
SDA3
SB700 X X X X X X X X X X
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 3 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com

1 1

+1.2V_HT
VLDT CAP.
250 mil

1 1 1 1 1 1
C1 C2 C3 C4 C5 C6
H_CADIP[0..15] H_CADOP[0..15] 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
10 H_CADIP[0..15] H_CADOP[0..15] 10
H_CADIN[0..15] H_CADON[0..15] 2 2 2 2 2 2
10 H_CADIN[0..15] H_CADON[0..15] 10

Near CPU Socket

+1.2V_HT
JP1A

2 AE2 +VLDT_B 1 2
VLDT=500mA D1
VLDT_A0
HT LINK VLDT_B0
2
D2 AE3 C7 4.7U_0805_10V4Z
VLDT_A1 VLDT_B1
D3 AE4
VLDT_A2 VLDT_B2
D4 AE5
VLDT_A3 VLDT_B3
H_CADIP0 E3 AD1 H_CADOP0
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0
E2 AC1
H_CADIP1 L0_CADIN_L0 L0_CADOUT_L0 H_CADOP1
E1 AC2
H_CADIN1 L0_CADIN_H1 L0_CADOUT_H1 H_CADON1
F1 AC3
H_CADIP2 L0_CADIN_L1 L0_CADOUT_L1 H_CADOP2
G3 AB1
H_CADIN2 L0_CADIN_H2 L0_CADOUT_H2 H_CADON2
G2 AA1
H_CADIP3 L0_CADIN_L2 L0_CADOUT_L2 H_CADOP3
G1 AA2
H_CADIN3 L0_CADIN_H3 L0_CADOUT_H3 H_CADON3
H1 AA3
H_CADIP4 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP4
J1 W2
H_CADIN4 L0_CADIN_H4 L0_CADOUT_H4 H_CADON4
K1 W3
H_CADIP5 L0_CADIN_L4 L0_CADOUT_L4 H_CADOP5
L3 V1
H_CADIN5 L0_CADIN_H5 L0_CADOUT_H5 H_CADON5
L2 U1
H_CADIP6 L0_CADIN_L5 L0_CADOUT_L5 H_CADOP6
L1 U2
H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6
M1 U3
H_CADIP7 L0_CADIN_L6 L0_CADOUT_L6 H_CADOP7
N3 T1
H_CADIN7 L0_CADIN_H7 L0_CADOUT_H7 H_CADON7
N2 R1
H_CADIP8 L0_CADIN_L7 L0_CADOUT_L7 H_CADOP8
E5 AD4
H_CADIN8 L0_CADIN_H8 L0_CADOUT_H8 H_CADON8
F5 AD3
H_CADIP9 L0_CADIN_L8 L0_CADOUT_L8 H_CADOP9
F3 AD5
H_CADIN9 L0_CADIN_H9 L0_CADOUT_H9 H_CADON9
F4 AC5
H_CADIP10 L0_CADIN_L9 L0_CADOUT_L9 H_CADOP10
G5 AB4
H_CADIN10 L0_CADIN_H10 L0_CADOUT_H10 H_CADON10
H5 AB3
H_CADIP11 L0_CADIN_L10 L0_CADOUT_L10 H_CADOP11
H3 AB5
H_CADIN11 L0_CADIN_H11 L0_CADOUT_H11 H_CADON11
H4 AA5
H_CADIP12 L0_CADIN_L11 L0_CADOUT_L11 H_CADOP12
K3 Y5
H_CADIN12 L0_CADIN_H12 L0_CADOUT_H12 H_CADON12
K4 W5
H_CADIP13 L0_CADIN_L12 L0_CADOUT_L12 H_CADOP13
L5 V4
3 H_CADIN13 L0_CADIN_H13 L0_CADOUT_H13 H_CADON13 3
M5 V3
H_CADIP14 L0_CADIN_L13 L0_CADOUT_L13 H_CADOP14
M3 V5
H_CADIN14 L0_CADIN_H14 L0_CADOUT_H14 H_CADON14
M4 U5
H_CADIP15
H_CADIN15
N5
P5
L0_CADIN_L14
L0_CADIN_H15
L0_CADOUT_L14
L0_CADOUT_H15
T4
T3
H_CADOP15
H_CADON15
PWM Fan Control circuit +5VS
L0_CADIN_L15 L0_CADOUT_L15

10 H_CLKIP0 J3 Y1 H_CLKOP0 10
L0_CLKIN_H0 L0_CLKOUT_H0
10 H_CLKIN0 J2 W1 H_CLKON0 10
L0_CLKIN_L0 L0_CLKOUT_L0 JP2
10 H_CLKIP1 J5 Y4 H_CLKOP1 10

1
L0_CLKIN_H1 L0_CLKOUT_H1
10 H_CLKIN1 K5 Y3 H_CLKON1 10 1 1 1
L0_CLKIN_L1 L0_CLKOUT_L1 C8 C9 1
2
D1 0.1U_0402_16V4Z 2
10 H_CTLIP0 N1 R2 H_CTLOP0 10
L0_CTLIN_H0 L0_CTLOUT_H0 CH751H-40PT_SOD323-2 4.7U_0805_10V4Z
10 H_CTLIN0 P1 R3 H_CTLON0 10 3
L0_CTLIN_L0 L0_CTLOUT_L0 2 2 GND
10 H_CTLIP1 P3 T5 H_CTLOP1 10 4

2
L0_CTLIN_H1 L0_CTLOUT_H1 GND
10 H_CTLIN1 P4 R5 H_CTLON1 10
L0_CTLIN_L1 L0_CTLOUT_L1 ACES_88231-02001
+VCC_FAN CONN@
CONN@ 6090022100G_B

1
2
5
6

1
D Q1 @ D2
G
3 RLZ5.1B_LL34
33 FAN_PWM
S SI3456BDV-T1-E3_TSOP6

2
4
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AMD CPU S1G2 HT I/F
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 4 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
Processor DDR2 Memory Interface
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
JP1C
9 DDR_B_D[63..0]
MEM:DATA
DDR_A_D[63..0] 8
DDR_A_CLK0 DDR_B_D0 C11 G12 DDR_A_D0
1 +1.8V DDR_B_D1 MB_DATA0 MA_DATA0 DDR_A_D1 1
1 A11 F12
DDR_B_D2 MB_DATA1 MA_DATA1 DDR_A_D2
A14 H14
C10 DDR_B_D3 MB_DATA2 MA_DATA2 DDR_A_D3
B14 G14
2

1.5P_0402_50V9C DDR_B_D4 MB_DATA3 MA_DATA3 DDR_A_D4

G11 H11
R1 DDR_A_CLK#0 2 DDR_B_D5 MB_DATA4 MA_DATA4 DDR_A_D5
E11 H12
1K_0402_1% DDR_B_D6 MB_DATA5 MA_DATA5 DDR_A_D6
D12 C13
DDR_A_CLK1 DDR_B_D7 MB_DATA6 MA_DATA6 DDR_A_D7
A13 E13
DDR_B_D8 MB_DATA7 MA_DATA7 DDR_A_D8
1 A15 H15
1

+MCH_REF DDR_B_D9 MB_DATA8 MA_DATA8 DDR_A_D9

A16 E15
MB_DATA9 MA_DATA9
1000P_0402_25V8J

C11 DDR_B_D10 DDR_A_D10

0.1U_0402_16V4Z

A19 E17
2

1.5P_0402_50V9C DDR_B_D11 MB_DATA10 MA_DATA10 DDR_A_D11

1 1 A20 H17
2 MB_DATA11 MA_DATA11
C12

C13

R2 DDR_A_CLK#1 DDR_B_D12 C14 E14 DDR_A_D12

1K_0402_1% DDR_B_D13 MB_DATA12 MA_DATA12 DDR_A_D13
D14 F14
DDR_B_D14 MB_DATA13 MA_DATA13 DDR_A_D14
C18 C17
2 2 DDR_B_CLK0 DDR_B_D15 MB_DATA14 MA_DATA14 DDR_A_D15
D18 G17
1

DDR_B_D16 MB_DATA15 MA_DATA15 DDR_A_D16

1 D20 G18
DDR_B_D17 MB_DATA16 MA_DATA16 DDR_A_D17
A21 C19
C14 DDR_B_D18 MB_DATA17 MA_DATA17 DDR_A_D18
D24 D22
1.5P_0402_50V9C DDR_B_D19 MB_DATA18 MA_DATA18 DDR_A_D19
C25 E20
DDR_B_CLK#0 2 DDR_B_D20 MB_DATA19 MA_DATA19 DDR_A_D20
B20 E18
DDR_B_D21 MB_DATA20 MA_DATA20 DDR_A_D21
C20 F18
DDR_B_CLK1 DDR_B_D22 MB_DATA21 MA_DATA21 DDR_A_D22
B24 B22
DDR_B_D23 MB_DATA22 MA_DATA22 DDR_A_D23
1 C24 C23
DDR_B_D24 MB_DATA23 MA_DATA23 DDR_A_D24
E23 F20
C15 DDR_B_D25 MB_DATA24 MA_DATA24 DDR_A_D25
E24 F22
1.5P_0402_50V9C DDR_B_D26 MB_DATA25 MA_DATA25 DDR_A_D26
G25 H24
DDR_B_CLK#1 2 DDR_B_D27 MB_DATA26 MA_DATA26 DDR_A_D27
G26 J19
DDR_B_D28 MB_DATA27 MA_DATA27 DDR_A_D28
C26 E21
DDR_B_D29 MB_DATA28 MA_DATA28 DDR_A_D29
D26 E22
DDR_B_D30 MB_DATA29 MA_DATA29 DDR_A_D30
G23 H20
+0.9V +0.9V DDR_B_D31 MB_DATA30 MA_DATA30 DDR_A_D31
G24 H22
JP1B DDR_B_D32 MB_DATA31 MA_DATA31 DDR_A_D32
AA24 Y24
2 DDR_B_D33 MB_DATA32 MA_DATA32 DDR_A_D33 2
AA23 AB24
DDR_B_D34 MB_DATA33 MA_DATA33 DDR_A_D34
D10 W10 AD24 AB22
VTT1 MEM:CMD/CTRL/CLK VTT5 DDR_B_D35 MB_DATA34 MA_DATA34 DDR_A_D35
Place them close to CPU within 1" C10 AC10 AE24 AA21
VTT2 VTT6 DDR_B_D36 MB_DATA35 MA_DATA35 DDR_A_D36
B10 AB10 AA26 W22
VTT3 VTT7 DDR_B_D37 MB_DATA36 MA_DATA36 DDR_A_D37
AD10 AA10 AA25 W21
R4 39.2_0402_1% VTT4 VTT8 DDR_B_D38 MB_DATA37 MA_DATA37 DDR_A_D38
A10 AD26 Y22
VTT9 DDR_B_D39 MB_DATA38 MA_DATA38 DDR_A_D39
1 2 AF10 AE25 AA22
MEMZP VTT_SENSE DDR_B_D40 MB_DATA39 MA_DATA39 DDR_A_D40
+1.8V 1 2 AE10 Y10 PAD T1 AC22 Y20
R3 39.2_0402_1% MEMZN VTT_SENSE DDR_B_D41 MB_DATA40 MA_DATA40 DDR_A_D41
AD22 AA20
+MCH_REF DDR_B_D42 MB_DATA41 MA_DATA41 DDR_A_D42
T2 PAD H16 W17 AE20 AA18
RSVD_M1 MEMVREF DDR_B_D43 MB_DATA42 MA_DATA42 DDR_A_D43
AF20 AB18
DDR_A_ODT0 DDR_B_D44 MB_DATA43 MA_DATA43 DDR_A_D44
8 DDR_A_ODT0 T19 B18 PAD T3 AF24 AB21
DDR_A_ODT1 MA0_ODT0 RSVD_M2 DDR_B_D45 MB_DATA44 MA_DATA44 DDR_A_D45
8 DDR_A_ODT1 V22 AF23 AD21
MA0_ODT1 DDR_B_ODT0 DDR_B_D46 MB_DATA45 MA_DATA45 DDR_A_D46
U21 W26 DDR_B_ODT0 9 AC20 AD19
MA1_ODT0 MB0_ODT0 DDR_B_ODT1 DDR_B_D47 MB_DATA46 MA_DATA46 DDR_A_D47
V19 W23 DDR_B_ODT1 9 AD20 Y18
MA1_ODT1 MB0_ODT1 DDR_B_D48 MB_DATA47 MA_DATA47 DDR_A_D48
Y26 AD18 AD17
DDR_CS0_DIMMA# MB1_ODT0 DDR_B_D49 MB_DATA48 MA_DATA48 DDR_A_D49
8 DDR_CS0_DIMMA# T20 AE18 W16
DDR_CS1_DIMMA# MA0_CS_L0 DDR_CS0_DIMMB# DDR_B_D50 MB_DATA49 MA_DATA49 DDR_A_D50
8 DDR_CS1_DIMMA# U19 V26 DDR_CS0_DIMMB# 9 AC14 W14
MA0_CS_L1 MB0_CS_L0 DDR_CS1_DIMMB# DDR_B_D51 MB_DATA50 MA_DATA50 DDR_A_D51
U20 W25 DDR_CS1_DIMMB# 9 AD14 Y14
MA1_CS_L0 MB0_CS_L1 DDR_B_D52 MB_DATA51 MA_DATA51 DDR_A_D52
V20 U22 AF19 Y17
MA1_CS_L1 MB1_CS_L0 DDR_B_D53 MB_DATA52 MA_DATA52 DDR_A_D53
AC18 AB17
DDR_CKE0_DIMMA DDR_CKE0_DIMMB DDR_B_D54 MB_DATA53 MA_DATA53 DDR_A_D54
8 DDR_CKE0_DIMMA J22 J25 DDR_CKE0_DIMMB 9 AF16 AB15
DDR_CKE1_DIMMA MA_CKE0 MB_CKE0 DDR_CKE1_DIMMB DDR_B_D55 MB_DATA54 MA_DATA54 DDR_A_D55
8 DDR_CKE1_DIMMA J20 H26 DDR_CKE1_DIMMB 9 AF15 AD15
MA_CKE1 MB_CKE1 DDR_B_D56 MB_DATA55 MA_DATA55 DDR_A_D56
AF13 AB13
DDR_B_D57 MB_DATA56 MA_DATA56 DDR_A_D57
N19 P22 AC12 AD13
MA_CLK_H0 MB_CLK_H0 DDR_B_D58 MB_DATA57 MA_DATA57 DDR_A_D58
N20 R22 AB11 Y12
DDR_A_CLK0 MA_CLK_L0 MB_CLK_L0 DDR_B_CLK0 DDR_B_D59 MB_DATA58 MA_DATA58 DDR_A_D59
8 DDR_A_CLK0 E16 A17 DDR_B_CLK0 9 Y11 W11
DDR_A_CLK#0 MA_CLK_H1 MB_CLK_H1 DDR_B_CLK#0 DDR_B_D60 MB_DATA59 MA_DATA59 DDR_A_D60
8 DDR_A_CLK#0 F16 A18 DDR_B_CLK#0 9 AE14 AB14
DDR_A_CLK1 MA_CLK_L1 MB_CLK_L1 DDR_B_CLK1 DDR_B_D61 MB_DATA60 MA_DATA60 DDR_A_D61
8 DDR_A_CLK1 Y16 AF18 DDR_B_CLK1 9 AF14 AA14
DDR_A_CLK#1 MA_CLK_H2 MB_CLK_H2 DDR_B_CLK#1 DDR_B_D62 MB_DATA61 MA_DATA61 DDR_A_D62
8 DDR_A_CLK#1 AA16 AF17 DDR_B_CLK#1 9 AF11 AB12
MA_CLK_L2 MB_CLK_L2 DDR_B_D63 MB_DATA62 MA_DATA62 DDR_A_D63
P19 R26 AD11 AA12
MA_CLK_H3 MB_CLK_H3 MB_DATA63 MA_DATA63
P20 R25 9 DDR_B_DM[7..0] DDR_A_DM[7..0] 8
3 MA_CLK_L3 MB_CLK_L3 DDR_B_DM0 DDR_A_DM0 3
8 DDR_A_MA[15..0] DDR_B_MA[15..0] 9 A12 E12
DDR_A_MA0 DDR_B_MA0 DDR_B_DM1 MB_DM0 MA_DM0 DDR_A_DM1
N21 P24 B16 C15
DDR_A_MA1 MA_ADD0 MB_ADD0 DDR_B_MA1 DDR_B_DM2 MB_DM1 MA_DM1 DDR_A_DM2
M20 N24 A22 E19
DDR_A_MA2 MA_ADD1 MB_ADD1 DDR_B_MA2 DDR_B_DM3 MB_DM2 MA_DM2 DDR_A_DM3
N22 P26 E25 F24
DDR_A_MA3 MA_ADD2 MB_ADD2 DDR_B_MA3 DDR_B_DM4 MB_DM3 MA_DM3 DDR_A_DM4
M19 N23 AB26 AC24
DDR_A_MA4 MA_ADD3 MB_ADD3 DDR_B_MA4 DDR_B_DM5 MB_DM4 MA_DM4 DDR_A_DM5
M22 N26 AE22 Y19
DDR_A_MA5 MA_ADD4 MB_ADD4 DDR_B_MA5 DDR_B_DM6 MB_DM5 MA_DM5 DDR_A_DM6
L20 L23 AC16 AB16
DDR_A_MA6 MA_ADD5 MB_ADD5 DDR_B_MA6 DDR_B_DM7 MB_DM6 MA_DM6 DDR_A_DM7
M24 N25 AD12 Y13
DDR_A_MA7 MA_ADD6 MB_ADD6 DDR_B_MA7 MB_DM7 MA_DM7
L21 L24
DDR_A_MA8 MA_ADD7 MB_ADD7 DDR_B_MA8 DDR_B_DQS0 DDR_A_DQS0
L19 M26 9 DDR_B_DQS0 C12 G13 DDR_A_DQS0 8
DDR_A_MA9 MA_ADD8 MB_ADD8 DDR_B_MA9 DDR_B_DQS#0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS#0
K22 K26 9 DDR_B_DQS#0 B12 H13 DDR_A_DQS#0 8
DDR_A_MA10 MA_ADD9 MB_ADD9 DDR_B_MA10 DDR_B_DQS1 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS1
R21 T26 9 DDR_B_DQS1 D16 G16 DDR_A_DQS1 8
DDR_A_MA11 MA_ADD10 MB_ADD10 DDR_B_MA11 DDR_B_DQS#1 MB_DQS_H1 MA_DQS_H1 DDR_A_DQS#1
L22 L26 9 DDR_B_DQS#1 C16 G15 DDR_A_DQS#1 8
DDR_A_MA12 MA_ADD11 MB_ADD11 DDR_B_MA12 DDR_B_DQS2 MB_DQS_L1 MA_DQS_L1 DDR_A_DQS2
K20 L25 9 DDR_B_DQS2 A24 C22 DDR_A_DQS2 8
DDR_A_MA13 MA_ADD12 MB_ADD12 DDR_B_MA13 DDR_B_DQS#2 MB_DQS_H2 MA_DQS_H2 DDR_A_DQS#2
V24 W24 9 DDR_B_DQS#2 A23 C21 DDR_A_DQS#2 8
DDR_A_MA14 MA_ADD13 MB_ADD13 DDR_B_MA14 DDR_B_DQS3 MB_DQS_L2 MA_DQS_L2 DDR_A_DQS3
K24 J23 9 DDR_B_DQS3 F26 G22 DDR_A_DQS3 8
DDR_A_MA15 MA_ADD14 MB_ADD14 DDR_B_MA15 DDR_B_DQS#3 MB_DQS_H3 MA_DQS_H3 DDR_A_DQS#3
K19 J24 9 DDR_B_DQS#3 E26 G21 DDR_A_DQS#3 8
MA_ADD15 MB_ADD15 DDR_B_DQS4 MB_DQS_L3 MA_DQS_L3 DDR_A_DQS4
9 DDR_B_DQS4 AC25 AD23 DDR_A_DQS4 8
DDR_A_BS#0 DDR_B_BS#0 DDR_B_DQS#4 MB_DQS_H4 MA_DQS_H4 DDR_A_DQS#4
8 DDR_A_BS#0 R20 R24 DDR_B_BS#0 9 9 DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4 8
DDR_A_BS#1 MA_BANK0 MB_BANK0 DDR_B_BS#1 DDR_B_DQS5 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS5
8 DDR_A_BS#1 R23 U26 DDR_B_BS#1 9 9 DDR_B_DQS5 AF21 AB19 DDR_A_DQS5 8
DDR_A_BS#2 MA_BANK1 MB_BANK1 DDR_B_BS#2 DDR_B_DQS#5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS#5
8 DDR_A_BS#2 J21 J26 DDR_B_BS#2 9 9 DDR_B_DQS#5 AF22 AB20 DDR_A_DQS#5 8
MA_BANK2 MB_BANK2 DDR_B_DQS6 MB_DQS_L5 MA_DQS_L5 DDR_A_DQS6
9 DDR_B_DQS6 AE16 Y15 DDR_A_DQS6 8
DDR_A_RAS# DDR_B_RAS# DDR_B_DQS#6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS#6
8 DDR_A_RAS# R19 U25 DDR_B_RAS# 9 9 DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6 8
DDR_A_CAS# MA_RAS_L MB_RAS_L DDR_B_CAS# DDR_B_DQS7 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS7
8 DDR_A_CAS# T22 U24 DDR_B_CAS# 9 9 DDR_B_DQS7 AF12 W12 DDR_A_DQS7 8
DDR_A_WE# MA_CAS_L MB_CAS_L DDR_B_WE# DDR_B_DQS#7 MB_DQS_H7 MA_DQS_H7 DDR_A_DQS#7
8 DDR_A_WE# T24 U23 DDR_B_WE# 9 9 DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7 8
MA_WE_L MB_WE_L MB_DQS_L7 MA_DQS_L7

CONN@ CONN@ 6090022100G_B

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AMD CPU S1G2 DDRII I/F
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 5 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com +2.5VDDA
VDDA=300mA
L1
+2.5VS 1 2 3300P_0402_50V7K
A:Need to re-Link "SGN00000200" 1 FBM_L11_201209_300L_0805
1 1 1 +1.8V 1 2
C16 + R10 10K_0402_5%
100U_D2_10VM 4.7U_0805_10V4Z C17 C18 C19 1 2
0.22U_0603_16V4Z R5 300_0402_5%
2 2 2 2

2
B
1 R6 2 ENTRIP2 37,39
Q3 @ 0_0402_5%
JP1D

E
1 CPU_THERMTRIP#_R 3 1 1 R7 2 1
H_THERMTRIP# 20,33

C
0_0402_5%
F8 M11 MMBT3904_NL_SOT23-3
VDDA1 KEY1
F9 W18
VDDA2 KEY2
1 2 3900P_0402_50V7K CPU_CLKIN_SC_P A9 A6 CPU_SVC
15 CLK_CPU_BCLK CLKIN_H SVC CPU_SVC 43
C20 CPU_CLKIN_SC_N A8 A4 CPU_SVD

1
CLKIN_L SVD CPU_SVD 43
+1.8V 2 1
LDT_RST# B7 R11 @ 10K_0402_5%
R8 H_PWRGD RESET_L
A7 1 2

2
PWROK

B
169_0402_1% LDT_STOP# F10 AF6 CPU_THERMTRIP#_R R9 300_0402_5%
CPU_LDT_REQ# LDTSTOP_L THERMTRIP_L CPU_PROCHOT#_1.8 Q2
C6 AC7

2
LDTREQ_L PROCHOT_L

E
1 2 AA8 CPU_PROCHOT#_1.8 3 1
15 CLK_CPU_BCLK# MEMHOT_L H_PROCHOT# 19

C
C21 3900P_0402_50V7K CPU_SIC AF4
Address:100_1100 CPU_SID SIC @ MMBT3904_NL_SOT23-3
AF5
+1.8VS SID THERMDC_CPU
AE6 W7
ALERT_L THERMDC THERMDA_CPU
Place close to CPU wihtin 1.5" THERMDA
W8
R13 1 2 44.2_0402_1% CPU_HTREF0 R6
2

R14 HT_REF0
1 2 44.2_0402_1% CPU_HTREF1 P6
R15
+1.2V_HT HT_REF1 +1.8V sense no support
300_0402_5% CPU_VDD0_FB_H F6 W9 +CPU_CORE_NB
43 CPU_VDD0_FB_H VDD0_FB_H VDDIO_FB_H PAD T22
43 CPU_VDD0_FB_L CPU_VDD0_FB_L E6 Y9
+CPU_CORE_0 VDD0_FB_L VDDIO_FB_L PAD T21
R484 10_0402_5%
1

LDT_RST# R487 10_0402_5% CPU_VDD1_FB_H Y6 H6 VDD_NB_FB_H VDD_NB_FB_H 1 2

19 LDT_RST# 43 CPU_VDD1_FB_H VDD1_FB_H VDDNB_FB_H VDD_NB_FB_H 43
1 2CPU_VDD0_FB_H 43 CPU_VDD1_FB_L CPU_VDD1_FB_L AB6 G6 VDD_NB_FB_L
VDD_NB_FB_L 43
VDD_NB_FB_L 1 2
VDD1_FB_L VDDNB_FB_L
1 1 2CPU_VDD0_FB_L R485 10_0402_5%
C22 R486 10_0402_5% CPU_DBRDY G10
0.01U_0402_25V4Z CPU_TMS DBRDY CPU_DBREQ#
AA9
TMS DBREQ_L
E10 Close to CPU
@ CPU_TCK AC9
2 CPU_TRST# TCK CPU_TDO
AD9 AE9
CPU_TDI TRST_L TDO
Close to CPU AF9
TDI
2 T4 PAD CPU_TEST23_TSTUPD CPU_TEST28_H_PLLCHRZ_P 2
AD7
TEST23 TEST28_H
J7 PAD T5 route as differential
+CPU_CORE_1 H8 CPU_TEST28_L_PLLCHRZ_N as short as possible
+1.8VS TEST28_L PAD T6
R489 10_0402_5% CPU_TEST19_PLLTEST0 H10 testpoint under package
TEST18
1 2CPU_VDD1_FB_H CPU_TEST18_PLLTEST1 G9 D7 CPU_TEST17_BP3
PAD T7
TEST19 TEST17
1 2CPU_VDD1_FB_L E7 CPU_TEST16_BP2
PAD T8
2

T9 PAD CPU_TEST25_H_BYPASSCLK_H TEST16 CPU_TEST15_BP1 +1.8V

E9 F7 PAD T10
R21 R488 10_0402_5% T11 PAD CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST15 CPU_TEST14_BP0
E8
TEST25_L TEST14
C7 PAD T12 0718 AMD --> 1K ohm
300_0402_5%
CPU_TEST21_SCANEN AB8 C3 CPU_SVC 1 2
CPU_TEST20_SCANCLK2 TEST21 TEST7 CPU_SVD R22 1K_0402_5%
AF7 K8 1 2
1

H_PWRGD CPU_TEST24_SCANCLK1 TEST20 TEST10 R23 1K_0402_5%

19 H_PWRGD AE7
CPU_TEST22_SCANSHIFTEN TEST24
AE8 C4
CPU_TEST12_SCANSHIFTENB TEST22 TEST8 CPU_TEST27_SINGLECHAIN
1 AC8 1 2
C23 CPU_TEST27_SINGLECHAIN TEST12 R24 300_0402_5%
AF8
0.01U_0402_25V4Z TEST27 CPU_TEST29_H_FBCLKOUT_P
C9 PAD T13
@ +1.8VS R25 TEST29_H CPU_TEST29_L_FBCLKOUT_N CPU_TEST21_SCANEN
1 2 0_0402_5% C2 C8 PAD T14 1 2
2 TEST9 TEST29_L CPU_TEST20_SCANCLK2 R26 2 300_0402_5%
AA6 1
TEST6 CPU_TEST24_SCANCLK1 R27 2 300_0402_5%
1
2

A3 H18 CPU_TEST22_SCANSHIFTEN R28 2 1 300_0402_5%

R30 RSVD1 RSVD10 CPU_TEST12_SCANSHIFTENB R29 2 300_0402_5%
A5 H19 1
300_0402_5% RSVD2 RSVD9 CPU_TEST15_BP1 R31 2 300_0402_5%
B3 AA7 1
+1.8VS RSVD3 RSVD8 CPU_TEST14_BP0 R32 2 300_0402_5%
B5 D5 1
RSVD4 RSVD7 CPU_TEST19_PLLTEST0 R33 2 300_0402_5%
C1 C5 1
1

CPU_LDT_REQ# RSVD5 RSVD6 CPU_TEST18_PLLTEST1 R34 2 300_0402_5%

CPU_LDT_REQ# 11,19 1
2

R35 300_0402_5%
R36 1 CONN@ 6090022100G_B
300_0402_5% C24
0.01U_0402_25V4Z
@
1

LDT_STOP# 2
11,19 LDT_STOP#

1
3 C25 3
0.01U_0402_25V4Z
@
2 1 2

C939 0.1U_0402_16V4Z
R175
R814
+3VS 2 1 2 1
2.09V for Gate
20K_0402_5% 34.8K_0402_1%~N
+1.8V
R18
+1.8V 2 1
2
G

@ 220_0402_5% R37

@ 220_0402_5% R38

@ 220_0402_5% R39

@ 220_0402_5% R40

@ 220_0402_5% R41
390_0402_5%
HDT Connector

1
CPU_SID 3 1 SMB_EC_DA1 32,33,34,37
S

Q127 FDV301N_NL_SOT23-3 FDV301N, the Vgs is: JP3

min = 0.65V 1 2

2
R19 EC is PU to 5VALW Typ = 0.85V 3 4
Max = 1.5V CPU_DBREQ# 5 6
+1.8V 2 1
2

+3VS 7 8
G

390_0402_5% CPU_DBRDY
CPU_TCK 9 10
CPU_SIC CPU_TMS 11 12 +3VS
3 1 SMB_EC_CK1 32,33,34,37
CPU_TDI 13 14
S

CPU_TRST# 15 16
0.1U_0402_16V4Z

5
Q129 FDV301N_NL_SOT23-3 CPU_TDO 17 18 U1
C26 19 20 LDT_RST#
2

P
21 22 HDT_RST# B
4
2 23 24 Y
1 SB_PWRGD 20,33,43 4
26 A

G
4 U2 NOTE: HDT TERMINATION IS REQUIRED
1 8 SMB_EC_CK2 @ NC7SZ08P5X_NL_SC70-5
SMB_EC_CK2 33 FOR REV. Ax SILICON ONLY.

3
VDD SCLK CONN@ SAMTEC_ASP-68200-07
THERMDA_CPU 2 7 SMB_EC_DA2
D+ SDATA SMB_EC_DA2 33
C27
1 2 THERMDC_CPU 3 6
2200P_0402_50V7K D- ALERT#
2200p change to 4 5
1000p for ADT7421
THERM# GND Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title
ADM1032ARMZ-2REEL_MSOP8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AMD CPU S1G2 CTRL
Address:100_1101 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 6 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
VDD(+CPU_CORE) decoupling. +CPU_CORE_0 JP1E +CPU_CORE_1
AA4
AA11
JP1F

VSS1
VSS2
VSS66
VSS67
J6
J8
AA13 J10
VSS3 VSS68
G4 P8 AA15 J12
VDD0_1 VDD1_1 VSS4 VSS69
H2 P10 AA17 J14
+CPU_CORE_0 +CPU_CORE_1 VDD0_2 VDD1_2 VSS5 VSS70
J9 R4 AA19 J16
VDD0_3 VDD1_3 VSS6 VSS71
J11 R7 AB2 J18
VDD0_4 VDD1_4 VSS7 VSS72
J13 R9 AB7 K2
VDD0_5 VDD1_5 VSS8 VSS73
J15 R11 AB9 K7
VDD0_6 VDD1_6 VSS9 VSS74
1 1 1 1 K6 T2 AB23 K9
VDD0_7 VDD1_7 VSS10 VSS75
K10 T6 AB25 K11
+ C30 + C28 + C31 + C29 VDD0_8 VDD1_8 VSS11 VSS76
K12 T8 AC11 K13
1 330U_X_2VM_R6M 330U_X_2VM_R6M 330U_X_2VM_R6M 330U_X_2VM_R6M VDD0_9 VDD1_9 VSS12 VSS77 1
K14 T10 AC13 K15
VDD0_10 VDD1_10 VSS13 VSS78
L4 T12 AC15 K17
2 2 2 2 VDD0_11 VDD1_11 VSS14 VSS79
L7 T14 AC17 L6
VDD0_12 VDD1_12 VSS15 VSS80
L9 U7 AC19 L8
VDD0_13 VDD1_13 VSS16 VSS81
L11 U9 AC21 L10
Near CPU Socket L13
VDD0_14
VDD0_15
VDD1_14
VDD1_15
U11 AD6
VSS17
VSS18
VSS82
VSS83
L12
L15 U13 AD8 L14
VDD0_16 VDD1_16 VSS19 VSS84
M2 U15 AD25 L16
VDD0_17 VDD1_17 VSS20 VSS85
M6 V6 AE11 L18
VDD0_18 VDD1_18 VSS21 VSS86
M8 V8 AE13 M7
+CPU_CORE_0 VDD0_19 VDD1_19 VSS22 VSS87
M10 V10 AE15 M9
+CPU_CORE_1 VDD0_20 VDD1_20 VSS23 VSS88
N7 V12 AE17 AC6
VDD0_21 VDD1_21 VSS24 VSS89
N9 V14 AE19 M17
+CPU_CORE_NB VDD0_22 VDD1_22 VSS25 VSS90
N11 W4 AE21 N4
VDD0_23 VDD1_23 VSS26 VSS91
1 1 1 1 Y2 AE23 N8
C32 C33 C34 C35 VDD1_24 VSS27 VSS92
1 1 1 1 K16 AC4 B4 N10
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M C36 C37 C38 C39 VDDNB_1 VDD1_25 +1.8V VSS28 VSS93
M16 AD2 B6 N16
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VDDNB_2 VDD1_26 VSS29 VSS94
P16 B8 N18
2 2 2 2 VDDNB_3 VSS30 VSS95
T16 Y25 B9 P2
2 2 2 2 +1.8V VDDNB_4 VDDIO27 VSS31 VSS96
V16 V25 B11 P7
VDDNB_5 VDDIO26 VSS32 VSS97
V23 B13 P9
+CPU_CORE_0 VDDIO25 VSS33 VSS98
H25 V21 B15 P11
+CPU_CORE_1 VDDIO1 VDDIO24 VSS34 VSS99
J17 V18 B17 P17
VDDIO2 VDDIO23 VSS35 VSS100
K18 U17 B19 R8
VDDIO3 VDDIO22 VSS36 VSS101
K21 T25 B21 R10
VDDIO4 VDDIO21 VSS37 VSS102
1 1 1 1 1 1 K23 T23 B23 R16
C40 C41 C42 C43 C44 C45 VDDIO5 VDDIO20 VSS38 VSS103
K25 T21 B25 R18
0.22U_0603_16V4Z 0.01U_0402_25V4Z 180P_0402_50V8J 0.22U_0603_16V4Z 0.01U_0402_25V4Z 180P_0402_50V8J VDDIO6 VDDIO19 VSS39 VSS104
L17 T18 D6 T7
VDDIO7 VDDIO18 VSS40 VSS105
M18 R17 D8 T9
2 2 2 2 2 2 VDDIO8 VDDIO17 VSS41 VSS106
M21 P25 D9 T11
VDDIO9 VDDIO16 VSS42 VSS107
M23 P23 D11 T13
Under CPU Socket M25
VDDIO10
VDDIO11
VDDIO15
VDDIO14
P21 D13
VSS43
VSS44
VSS108
VSS109
T15
2 N17 P18 D15 T17 2
VDDIO12 VDDIO13 VSS45 VSS110
D17 U4
VSS46 VSS111
D19 U6
6090022100G_B VSS47 VSS112
D21 U8
Athlon 64 S1 VSS48 VSS113
D23 U10
VDDIO decoupling. Processor Socket
CONN@
D25
E4
VSS49
VSS50
VSS51
VSS114
VSS115
VSS116
U12
U14
F2 U16

+1.8V
+CPU_CORE_NB decoupling. F11
F13
VSS52
VSS53
VSS54
VSS117
VSS118
VSS119
U18
V2
F15 V7
VSS55 VSS120
F17 V9
+CPU_CORE_NB VSS56 VSS121
F19 V11
VSS57 VSS122
F21 V13
VSS58 VSS123
1 1 1 1 1 1 F23 V15
C46 C47 C48 C49 C50 C51 VSS59 VSS124
1 1 1 F25 V17
22U_0805_6.3V6M 22U_0805_6.3V6M C52 C53 C54 VSS60 VSS125
H7 W6
0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VSS61 VSS126
H9 Y21
2 2 2 2 2 2 VSS62 VSS127
H21 Y23
2 2 2 VSS63 VSS128
H23 N6
VSS64 VSS129
J4
VSS65
6090022100G_B
Under CPU Socket Athlon 64 S1
Processor Socket
CONN@

Between CPU Socket and DIMM

+1.8V +0.9V
3 3
Near Power Supply
1
C55
1
C56
1
C57
1
C58
VTT decoupling. 1
+
C: Change to NBO CAP
C59
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 220U_Y_4VM
2 2 2 2 2

180PF Qt'y follow the distance between

+1.8V +1.8V CPU socket and DIMM0. <2.5inch> +0.9V

1 1 1 1 1 1
C60 C61 C62 C63 C64 C65 1 1 1 1 1 1 1 1
0.01U_0402_25V4Z 0.01U_0402_25V4Z 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J C66 C67 C68 C69 C70 C71 C72 C73
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
A: Add C165 and C176 2 2 2 2 2 2 2 2
to follow AMD Layout
+1.8V
review recommand for
EMI Near CPU Socket Right side.
+0.9V
1
1 1 1 1 C: Change to NBO CAP
+ C78
C74 C75 C76 C77 220U_Y_4VM 1 1 1 1 1 1 1 1
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z C79 C80 C81 C82 C83 C84 C85 C86
2 2 2 2 2 @
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2 2 2
4 4

Near CPU Socket Left side.

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AMD CPU S1G2 PWR & GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 7 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com +V_DDR_MCH_REF

+1.8V JP4 +1.8V

1 2
VREF VSS DDR_A_D4 DDR_A_D[0..63]
3 4
DDR_A_D0 VSS DQ4 DDR_A_D5 DDR_A_D[0..63] 5 +0.9V +1.8V
5 6
DDR_A_D1 DQ0 DQ5 DDR_A_DM[0..7] RP1
7 8 DDR_A_DM[0..7] 5
DQ1 VSS DDR_A_DM0 DDR_A_MA6
9 10 1 8 1 2
DDR_A_DQS#0 VSS DM0 DDR_A_DQS[0..7] DDR_A_MA7 C87 0.1U_0402_16V4Z
11 12 2 7
DDR_A_DQS0 DQS0# VSS DDR_A_D6 DDR_A_DQS[0..7] 5 DDR_A_MA11
13 14 3 6 1 2
DQS0 DQ6 DDR_A_D7 DDR_A_MA[0..15] DDR_A_MA14 C88 0.1U_0402_16V4Z
15 16 DDR_A_MA[0..15] 5 4 5
1 DDR_A_D2 VSS DQ7 1
17 18
DDR_A_D3 DQ2 VSS DDR_A_D12 DDR_A_DQS#[0..7] 47_0804_8P4R_5%
19 20
DQ3 DQ12 DDR_A_D13 DDR_A_DQS#[0..7] 5 RP2
21 22
DDR_A_D8 VSS DQ13 DDR_CKE0_DIMMA
23 24 8 1 1 2
DDR_A_D9 DQ8 VSS DDR_A_DM1 DDR_A_BS#2 C90 0.1U_0402_16V4Z
25 26 7 2
DQ9 DM1 DDR_A_MA15
27 28 6 3 1 2
DDR_A_DQS#1 VSS VSS DDR_CKE1_DIMMA C89 0.1U_0402_16V4Z
29 30 DDR_A_CLK0 5 5 4
DDR_A_DQS1 DQS1# CK0
31 32 DDR_A_CLK#0 5
DQS1 CK0# 47_0804_8P4R_5%
33 34
DDR_A_D10 VSS VSS DDR_A_D14 RP3
35 36
DDR_A_D11 DQ10 DQ14 DDR_A_D15 +1.8V DDR_A_MA0
37 38 1 8 1 2
DQ11 DQ15 DDR_A_BS#1 C91 0.1U_0402_16V4Z
39 40 2 7
VSS VSS DDR_A_MA2 3 6 1 2

2
DDR_A_MA4 4 5 C92 0.1U_0402_16V4Z
41 42 R43
DDR_A_D16 VSS VSS DDR_A_D20 1K_0402_1% 47_0804_8P4R_5%
43 44
DDR_A_D17 DQ16 DQ20 DDR_A_D21 RP4
45 46
DQ17 DQ21 DDR_A_MA5
47 48 8 1 1 2

1
DDR_A_DQS#2 VSS VSS +V_DDR_MCH_REF DDR_A_MA8 C93 0.1U_0402_16V4Z
49 50 +V_DDR_MCH_REF 9 7 2
DDR_A_DQS2 DQS2# NC DDR_A_DM2 DDR_A_MA9

0.1U_0402_16V4Z
51 52 6 3 1 2
DQS2 DM2

1000P_0402_25V8J
53 54 1 1 DDR_A_MA12 5 4 C94 0.1U_0402_16V4Z

2
VSS VSS

C96
DDR_A_D18 55 56 DDR_A_D22
DQ18 DQ22

C95
DDR_A_D19 57 58 DDR_A_D23 R44 47_0804_8P4R_5%
DQ19 DQ23 1K_0402_1% RP5
59 60
DDR_A_D24 VSS VSS DDR_A_D28 2 2 DDR_A_BS#0
61 62 8 1 1 2
DDR_A_D25 DQ24 DQ28 DDR_A_D29 DDR_A_MA1 C98 0.1U_0402_16V4Z
63 64 7 2

1
DQ25 DQ29 DDR_A_MA10
65 66 6 3 1 2
DDR_A_DM3 VSS VSS DDR_A_DQS#3 DDR_A_MA3 C97 0.1U_0402_16V4Z
67 68 5 4
DM3 DQS3# DDR_A_DQS3
69 70
NC DQS3 47_0804_8P4R_5%
71 72
DDR_A_D26 VSS VSS DDR_A_D30 RP6
73 74
DDR_A_D27 DQ26 DQ30 DDR_A_D31 DDR_CS1_DIMMA#
75 76 8 1 1 2
2 DQ27 DQ31 DDR_A_ODT1 C100 0.1U_0402_16V4Z 2
77 78 7 2
DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA DDR_A_WE#
5 DDR_CKE0_DIMMA 79 80 DDR_CKE1_DIMMA 5 6 3 1 2
CKE0 NC/CKE1 DDR_A_CAS# C99 0.1U_0402_16V4Z
81 82 5 4
VDD VDD DDR_A_MA15
83 84
DDR_A_BS#2 NC NC/A15 DDR_A_MA14 47_0804_8P4R_5%
5 DDR_A_BS#2 85 86
BA2 NC/A14 RP7
87 88
DDR_A_MA12 VDD VDD DDR_A_MA11 DDR_A_ODT0
89 90 1 8 1 2
DDR_A_MA9 A12 A11 DDR_A_MA7 DDR_A_MA13 C102 0.1U_0402_16V4Z
91 92 2 7
DDR_A_MA8 A9 A7 DDR_A_MA6 DDR_A_RAS#
93 94 3 6 1 2
A8 A6 DDR_CS0_DIMMA# C101 0.1U_0402_16V4Z
95 96 4 5
DDR_A_MA5 VDD VDD DDR_A_MA4
97 98
DDR_A_MA3 A5 A4 DDR_A_MA2 47_0804_8P4R_5%
99 100
DDR_A_MA1 A3 A2 DDR_A_MA0
101 102
A1 A0
103 104
DDR_A_MA10 VDD VDD DDR_A_BS#1
105 106 DDR_A_BS#1 5
DDR_A_BS#0 A10/AP BA1 DDR_A_RAS#
5 DDR_A_BS#0 107 108 DDR_A_RAS# 5
DDR_A_WE# BA0 RAS# DDR_CS0_DIMMA#
5 DDR_A_WE# 109 110 DDR_CS0_DIMMA# 5
WE# S0#
111 112
DDR_A_CAS# VDD VDD DDR_A_ODT0
5 DDR_A_CAS# 113 114 DDR_A_ODT0 5
DDR_CS1_DIMMA# CAS# ODT0 DDR_A_MA13
5 DDR_CS1_DIMMA# 115 116
NC/S1# NC/A13
117 118
DDR_A_ODT1 VDD VDD
5 DDR_A_ODT1 119 120
NC/ODT1 NC
121 122
DDR_A_D32 VSS VSS DDR_A_D36
123 124
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 126
DQ33 DQ37
127 128
DDR_A_DQS#4 VSS VSS DDR_A_DM4
129 130
DDR_A_DQS4 DQS4# DM4
131 132
DQS4 VSS DDR_A_D38
133 134
DDR_A_D34 VSS DQ38 DDR_A_D39
135 136
DDR_A_D35 DQ34 DQ39
137 138
DQ35 VSS DDR_A_D44
139 140
3 DDR_A_D40 VSS DQ44 DDR_A_D45 3
141 142
DDR_A_D41 DQ40 DQ45
143 144
DQ41 VSS DDR_A_DQS#5
145 146
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 148
DM5 DQS5
149 150
DDR_A_D42 VSS VSS DDR_A_D46
151 152
DDR_A_D43 DQ42 DQ46 DDR_A_D47
153 154
DQ43 DQ47
155 156
DDR_A_D48 VSS VSS DDR_A_D52
157 158
DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 160
DQ49 DQ53
161 162
VSS VSS
163 164 DDR_A_CLK1 5
NC,TEST CK1
165 166 DDR_A_CLK#1 5
DDR_A_DQS#6 VSS CK1#
167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 170
DQS6 DM6
171 172
DDR_A_D50 VSS VSS DDR_A_D54
173 174
DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 176
DQ51 DQ55
177 178
DDR_A_D56 VSS VSS DDR_A_D60
179 180
DDR_A_D57 DQ56 DQ60 DDR_A_D61
181 182
DQ57 DQ61
183 184
DDR_A_DM7 VSS VSS DDR_A_DQS#7
185 186
DM7 DQS7# DDR_A_DQS7
187 188
DDR_A_D58 VSS DQS7
189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 192
DQ59 DQ62 DDR_A_D63
193 194
VSS DQ63
9,15,20,28 SMB_CK_DAT0 195 196
SDA VSS
9,15,20,28 SMB_CK_CLK0 197 198
SCL SAO
199 200
+3VS VDDSPD SA1
1
4 C103 P-TWO_A5692B-A0G16-P 4
0.1U_0402_16V4Z CONN@
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII SO-DIMM 0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 8 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
+1.8V
JP5 +1.8V +0.9V +1.8V
1 2 DDR_B_D[0..63] RP8
8 +V_DDR_MCH_REF VREF VSS DDR_B_D4 DDR_B_D[0..63] 5 DDR_B_BS#1
3 4 1 8 2 1
DDR_B_D0 VSS DQ4 DDR_B_D5 DDR_B_DM[0..7] DDR_B_MA2 C105 0.1U_0402_16V4Z
5 6 DDR_B_DM[0..7] 5 2 7
DDR_B_D1 DQ0 DQ5 DDR_B_MA0
7 8 3 6 1 2
DQ1 VSS

1000P_0402_25V8J
1 9 10 DDR_B_DM0 DDR_B_DQS[0..7] DDR_B_MA6 4 5 C106 0.1U_0402_16V4Z
DDR_B_DQS#0 VSS DM0 DDR_B_DQS[0..7] 5
11 12
DQS0# VSS DDR_B_MA[0..15]

C104
DDR_B_DQS0 13 14 DDR_B_D6 47_0804_8P4R_5%
1 DQS0 DQ6 DDR_B_MA[0..15] 5 1
15 16 DDR_B_D7
2 DDR_B_D2 VSS DQ7 DDR_B_DQS#[0..7] RP9
17 18
DDR_B_D3 DQ2 VSS DDR_B_D12 DDR_B_DQS#[0..7] 5 DDR_B_MA4
19 20 1 8 2 1
DQ3 DQ12 DDR_B_D13 DDR_B_MA14 C108 0.1U_0402_16V4Z
21 22 2 7
DDR_B_D8 VSS DQ13 DDR_B_MA7
23 24 3 6 1 2
DDR_B_D9 DQ8 VSS DDR_B_DM1 DDR_B_MA11 C107 0.1U_0402_16V4Z
25 26 4 5
DQ9 DM1
27 28
DDR_B_DQS#1 VSS VSS 47_0804_8P4R_5%
29 30 DDR_B_CLK0 5
DDR_B_DQS1 DQS1# CK0
31 32 DDR_B_CLK#0 5
DQS1 CK0# RP10
33 34
DDR_B_D10 VSS VSS DDR_B_D14 DDR_B_BS#2
35 36 8 1 2 1
DDR_B_D11 DQ10 DQ14 DDR_B_D15 DDR_CKE0_DIMMB C109 0.1U_0402_16V4Z
37 38 7 2
DQ11 DQ15 DDR_CKE1_DIMMB
39 40 6 3 1 2
VSS VSS DDR_B_MA15 C110 0.1U_0402_16V4Z
5 4

41 42 47_0804_8P4R_5%
DDR_B_D16 VSS VSS DDR_B_D20
43 44
DDR_B_D17 DQ16 DQ20 DDR_B_D21 RP11
45 46
DQ17 DQ21 DDR_B_MA5
47 48 8 1 2 1
DDR_B_DQS#2 VSS VSS DDR_B_MA8 C111 0.1U_0402_16V4Z
49 50 7 2
DDR_B_DQS2 DQS2# NC DDR_B_DM2 DDR_B_MA9
51 52 6 3 1 2
DQS2 DM2 DDR_B_MA12 C112 0.1U_0402_16V4Z
53 54 5 4
DDR_B_D18 VSS VSS DDR_B_D22
55 56
DDR_B_D19 DQ18 DQ22 DDR_B_D23 47_0804_8P4R_5%
57 58
DQ19 DQ23
59 60
DDR_B_D24 VSS VSS DDR_B_D28 RP12
61 62
DDR_B_D25 DQ24 DQ28 DDR_B_D29 DDR_B_BS#0
63 64 8 1 2 1
DQ25 DQ29 DDR_B_MA10 C114 0.1U_0402_16V4Z
65 66 7 2
DDR_B_DM3 VSS VSS DDR_B_DQS#3 DDR_B_MA3
67 68 6 3 1 2
DM3 DQS3# DDR_B_DQS3 DDR_B_MA1 C113 0.1U_0402_16V4Z
69 70 5 4
NC DQS3
71 72
DDR_B_D26 VSS VSS DDR_B_D30 47_0804_8P4R_5%
73 74
2 DDR_B_D27 DQ26 DQ30 DDR_B_D31 2
75 76
DQ27 DQ31 RP13
77 78
DDR_CKE0_DIMMB VSS VSS DDR_CKE1_DIMMB DDR_B_ODT1
5 DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB 5 8 1 2 1
CKE0 NC/CKE1 DDR_CS1_DIMMB# C116 0.1U_0402_16V4Z
81 82 7 2
VDD VDD DDR_B_MA15 DDR_B_CAS#
83 84 6 3 1 2
DDR_B_BS#2 NC NC/A15 DDR_B_MA14 DDR_B_WE# C115 0.1U_0402_16V4Z
5 DDR_B_BS#2 85 86 5 4
BA2 NC/A14
87 88
DDR_B_MA12 VDD VDD DDR_B_MA11 47_0804_8P4R_5%
89 90
DDR_B_MA9 A12 A11 DDR_B_MA7
91 92
DDR_B_MA8 A9 A7 DDR_B_MA6 RP14
93 94
A8 A6 DDR_B_MA13
95 96 1 8 2 1
DDR_B_MA5 VDD VDD DDR_B_MA4 DDR_B_ODT0 C118 0.1U_0402_16V4Z
97 98 2 7
DDR_B_MA3 A5 A4 DDR_B_MA2 DDR_B_RAS#
99 100 3 6 1 2
DDR_B_MA1 A3 A2 DDR_B_MA0 DDR_CS0_DIMMB# C117 0.1U_0402_16V4Z
101 102 4 5
A1 A0
103 104
DDR_B_MA10 VDD VDD DDR_B_BS#1 47_0804_8P4R_5%
105 106 DDR_B_BS#1 5
DDR_B_BS#0 A10/AP BA1 DDR_B_RAS#
5 DDR_B_BS#0 107 108 DDR_B_RAS# 5
DDR_B_WE# BA0 RAS# DDR_CS0_DIMMB#
5 DDR_B_WE# 109 110 DDR_CS0_DIMMB# 5
WE# S0#
111 112
DDR_B_CAS# VDD VDD DDR_B_ODT0
5 DDR_B_CAS# 113 114 DDR_B_ODT0 5
DDR_CS1_DIMMB# CAS# ODT0 DDR_B_MA13
5 DDR_CS1_DIMMB# 115 116
NC/S1# NC/A13
117 118
DDR_B_ODT1 VDD VDD
5 DDR_B_ODT1 119 120
NC/ODT1 NC
121 122
DDR_B_D32 VSS VSS DDR_B_D36
123 124
DDR_B_D33 DQ32 DQ36 DDR_B_D37
125 126
DQ33 DQ37
127 128
DDR_B_DQS#4 VSS VSS DDR_B_DM4
129 130
DDR_B_DQS4 DQS4# DM4
131 132
DQS4 VSS DDR_B_D38
133 134
DDR_B_D34 VSS DQ38 DDR_B_D39
135 136
DDR_B_D35 DQ34 DQ39
137 138
3 DQ35 VSS DDR_B_D44 3
139 140
DDR_B_D40 VSS DQ44 DDR_B_D45
141 142
DDR_B_D41 DQ40 DQ45
143 144
DQ41 VSS DDR_B_DQS#5
145 146
DDR_B_DM5 VSS DQS5# DDR_B_DQS5
147 148
DM5 DQS5
149 150
DDR_B_D42 VSS VSS DDR_B_D46
151 152
DDR_B_D43 DQ42 DQ46 DDR_B_D47
153 154
DQ43 DQ47
155 156
DDR_B_D48 VSS VSS DDR_B_D52
157 158
DDR_B_D49 DQ48 DQ52 DDR_B_D53
159 160
DQ49 DQ53
161 162
VSS VSS
163 164 DDR_B_CLK1 5
NC,TEST CK1
165 166 DDR_B_CLK#1 5
DDR_B_DQS#6 VSS CK1#
167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 170
DQS6 DM6
171 172
DDR_B_D50 VSS VSS DDR_B_D54
173 174
DDR_B_D51 DQ50 DQ54 DDR_B_D55
175 176
DQ51 DQ55
177 178
DDR_B_D56 VSS VSS DDR_B_D60
179 180
DDR_B_D57 DQ56 DQ60 DDR_B_D61
181 182
DQ57 DQ61
183 184
DDR_B_DM7 VSS VSS DDR_B_DQS#7
185 186
DM7 DQS7# DDR_B_DQS7
187 188
DDR_B_D58 VSS DQS7
189 190
DDR_B_D59 DQ58 VSS DDR_B_D62
191 192
DQ59 DQ62 DDR_B_D63
193 194
VSS DQ63
8,15,20,28 SMB_CK_DAT0 195 196
SDA VSS
8,15,20,28 SMB_CK_CLK0 197 198 +3VS
SCL SAO
199 200
+3VS VDDSPD SA1
1
4 4
C119 PTI_A5652D-A0G16-P
0.1U_0402_16V4Z CONN@
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII SO-DIMM 1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 9 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
U3B
D4 A5 TMDS_B_DATA2 18
GFX_RX0P GFX_TX0P
C4 PART 2 OF 6 B5 TMDS_B_DATA2# 18
GFX_RX0N GFX_TX0N
A3 A4 TMDS_B_DATA1 18
GFX_RX1P GFX_TX1P
B3 B4 TMDS_B_DATA1# 18
1 GFX_RX1N GFX_TX1N 1
C2 C3 TMDS_B_DATA0 18
GFX_RX2P GFX_TX2P
C1 B2 TMDS_B_DATA0# 18
GFX_RX2N GFX_TX2N
E5 D1 TMDS_B_CLK 18
GFX_RX3P GFX_TX3P
F5 D2 TMDS_B_CLK# 18
GFX_RX3N GFX_TX3N
G5 E2
GFX_RX4P GFX_TX4P
G6 E1
GFX_RX4N GFX_TX4N
H5 F4
GFX_RX5P GFX_TX5P
H6 F3
GFX_RX5N GFX_TX5N
J6 F1
GFX_RX6P GFX_TX6P
J5 F2
GFX_RX6N GFX_TX6N
J7 H4
GFX_RX7P GFX_TX7P
J8 H3
GFX_RX7N GFX_TX7N
L5 H1
GFX_RX8P GFX_TX8P
L6 H2
GFX_RX8N GFX_TX8N
M8 J2
GFX_RX9P GFX_TX9P
L8 J1
GFX_RX9N GFX_TX9N
P7 K4

PCIE I/F GFX

GFX_RX10P GFX_TX10P
M7 K3
GFX_RX10N GFX_TX10N
P5 K1
GFX_RX11P GFX_TX11P
M5 K2
GFX_RX11N GFX_TX11N
R8 M4
GFX_RX12P GFX_TX12P
P8 M3
GFX_RX12N GFX_TX12N
R6 M1
GFX_RX13P GFX_TX13P
R5 M2
GFX_RX13N GFX_TX13N
P4 N2
GFX_RX14P GFX_TX14P
P3 N1
GFX_RX14N GFX_TX14N
T4 P1
GFX_RX15P GFX_TX15P
T3 P2
GFX_RX15N GFX_TX15N
AE3 AC1 PCIE_ITX_PRX_P0 C152 1 2 0.1U_0402_16V7K New Card
26 PCIE_PTX_C_IRX_P0 GPP_RX0P GPP_TX0P PCIE_ITX_PRX_N0 PCIE_ITX_C_PRX_P0 26
AD4 AC2 C153 1 2 0.1U_0402_16V7K
26 PCIE_PTX_C_IRX_N0 GPP_RX0N GPP_TX0N PCIE_ITX_PRX_P1 PCIE_ITX_C_PRX_N0 26
AE2 AB4 C154 1 2 0.1U_0402_16V7K Cardreader
2 27 PCIE_PTX_C_IRX_P1 GPP_RX1P GPP_TX1P PCIE_ITX_PRX_N1 PCIE_ITX_C_PRX_P1 27 2
AD3 AB3 C155 1 2 0.1U_0402_16V7K
27 PCIE_PTX_C_IRX_N1 GPP_RX1N GPP_TX1N PCIE_ITX_C_PRX_N1 27
AD1 AA2 PCIE_ITX_PRX_P2 C156 1 2 0.1U_0402_16V7K
26 PCIE_PTX_C_IRX_P2 GPP_RX2P GPP_TX2P PCIE_ITX_C_PRX_P2 26
AD2 PCIE I/F GPP AA1 PCIE_ITX_PRX_N2 C157 1 2 0.1U_0402_16V7K WLAN
26 PCIE_PTX_C_IRX_N2 GPP_RX2N GPP_TX2N PCIE_ITX_PRX_P3 PCIE_ITX_C_PRX_N2 26
V5 Y1 C158 1 2 0.1U_0402_16V7K
25 PCIE_PTX_C_IRX_P3 GPP_RX3P GPP_TX3P PCIE_ITX_C_PRX_P3 25
W6 Y2 PCIE_ITX_PRX_N3 C159 1 2 0.1U_0402_16V7K GLAN
25 PCIE_PTX_C_IRX_N3 GPP_RX3N GPP_TX3N PCIE_ITX_C_PRX_N3 25
U5 Y4
GPP_RX4P GPP_TX4P H_CADOP[0..15] H_CADIP[0..15]
U6 Y3 4 H_CADOP[0..15] H_CADIP[0..15] 4
GPP_RX4N GPP_TX4N PCIE_ITX_PRX_P5 C160 1 0.1U_0402_16V7K
26 PCIE_PTX_C_IRX_P5 U8 V1 2 PCIE_ITX_C_PRX_P5 26
GPP_RX5P GPP_TX5P PCIE_ITX_PRX_N5 C161 H_CADON[0..15] H_CADIN[0..15]
26 PCIE_PTX_C_IRX_N5 U7 V2 1 2 0.1U_0402_16V7K PCIE_ITX_C_PRX_N5 26 TV Tuner 4 H_CADON[0..15] H_CADIN[0..15] 4
GPP_RX5N GPP_TX5N
19 SB_RX0P AA8 AD7 SB_TX0P_C C162 1 2 0.1U_0402_16V7K
SB_RX0P SB_TX0P SB_TX0N_C SB_TX0P 19
19 SB_RX0N Y8 AE7 C163 1 2 0.1U_0402_16V7K
SB_RX0N SB_TX0N SB_TX0N 19
19 SB_RX1P AA7 AE6 SB_TX1P_C C164 1 2 0.1U_0402_16V7K
SB_RX1P SB_TX1P SB_TX1P 19
19 SB_RX1N Y7 AD6 SB_TX1N_C C165 1 2 0.1U_0402_16V7K U3A
SB_RX1N SB_TX1N SB_TX2P_C SB_TX1N 19 H_CADOP0 H_CADIP0
19 SB_RX2P AA5 PCIE I/F SB AB6 C166 1 2 0.1U_0402_16V7K Y25 D24
SB_RX2P SB_TX2P SB_TX2P 19 HT_RXCAD0P HT_TXCAD0P
19 SB_RX2N AA6 AC6 SB_TX2N_C C168 1 2 0.1U_0402_16V7K H_CADON0 Y24 PART 1 OF 6 D25 H_CADIN0
SB_RX2N SB_TX2N SB_TX2N 19 HT_RXCAD0N HT_TXCAD0N
19 SB_RX3P W5 AD5 SB_TX3P_C C169 1 2 0.1U_0402_16V7K H_CADOP1 V22 E24 H_CADIP1
SB_RX3P SB_TX3P SB_TX3N_C SB_TX3P 19 H_CADON1 HT_RXCAD1P HT_TXCAD1P H_CADIN1
19 SB_RX3N Y5 AE5 C167 1 2 0.1U_0402_16V7K V23 E25
SB_RX3N SB_TX3N SB_TX3N 19 HT_RXCAD1N HT_TXCAD1N
H_CADOP2 V25 F24 H_CADIP2
R55 1.27K_0402_1% H_CADON2 HT_RXCAD2P HT_TXCAD2P H_CADIN2
AC8 1 2 V24 F25
PCE_CALRP(PCE_BCALRP) R56 2K_0402_1% H_CADOP3 HT_RXCAD2N HT_TXCAD2N H_CADIP3
AB8 1 2 +1.1VS U24 F23
PCE_CALRN(PCE_BCALRN) H_CADON3 HT_RXCAD3P HT_TXCAD3P H_CADIN3
U25 F22
H_CADOP4 HT_RXCAD3N HT_TXCAD3N H_CADIP4
RS780M_FCBGA528 H_CADON4
T25
HT_RXCAD4P HT_TXCAD4P
H23
H_CADIN4
T24 H22
H_CADOP5 HT_RXCAD4N HT_TXCAD4N H_CADIP5
RS780M Display Port Support (muxed on GFX) P22
HT_RXCAD5P HT_TXCAD5P
J25

HYPER TRANSPORT CPU I/F

H_CADON5 P23 J24 H_CADIN5
H_CADOP6 HT_RXCAD5N HT_TXCAD5N H_CADIP6
P25 K24
GFX_TX0,TX1,TX2 and TX3 H_CADON6 HT_RXCAD6P HT_TXCAD6P H_CADIN6
P24 K25
DP0 H_CADOP7 HT_RXCAD6N HT_TXCAD6N H_CADIP7
N24 K23
AUX0 and HPD0 H_CADON7 HT_RXCAD7P HT_TXCAD7P H_CADIN7
N25 K22
HT_RXCAD7N HT_TXCAD7N
H_CADOP8 AC24 F21 H_CADIP8
3 GFX_TX4,TX5,TX6 and TX7 H_CADON8 HT_RXCAD8P HT_TXCAD8P H_CADIN8 3
AC25 G21
DP1 H_CADOP9 HT_RXCAD8N HT_TXCAD8N H_CADIP9
AB25 G20
AUX1 and HPD1 H_CADON9 HT_RXCAD9P HT_TXCAD9P H_CADIN9
AB24 H21
H_CADOP10 HT_RXCAD9N HT_TXCAD9N H_CADIP10
AA24 J20
H_CADON10 HT_RXCAD10P HT_TXCAD10P H_CADIN10
AA25 J21
H_CADOP11 HT_RXCAD10N HT_TXCAD10N H_CADIP11
Y22 J18
H_CADON11 HT_RXCAD11P HT_TXCAD11P H_CADIN11
Y23 K17
H_CADOP12 HT_RXCAD11N HT_TXCAD11N H_CADIP12
W21 L19
H_CADON12 HT_RXCAD12P HT_TXCAD12P H_CADIN12
W20 J19
H_CADOP13 HT_RXCAD12N HT_TXCAD12N H_CADIP13
V21 M19
H_CADON13 HT_RXCAD13P HT_TXCAD13P H_CADIN13
V20 L18
H_CADOP14 HT_RXCAD13N HT_TXCAD13N H_CADIP14
U20 M21
H_CADON14 HT_RXCAD14P HT_TXCAD14P H_CADIN14
U21 P21
H_CADOP15 HT_RXCAD14N HT_TXCAD14N H_CADIP15
U19 P18
H_CADON15 HT_RXCAD15P HT_TXCAD15P H_CADIN15
U18 M18
HT_RXCAD15N HT_TXCAD15N

4 H_CLKOP0 T22 H24 H_CLKIP0 4

HT_RXCLK0P HT_TXCLK0P
4 H_CLKON0 T23 H25 H_CLKIN0 4
HT_RXCLK0N HT_TXCLK0N
4 H_CLKOP1 AB23 L21 H_CLKIP1 4
HT_RXCLK1P HT_TXCLK1P
4 H_CLKON1 AA22 L20 H_CLKIN1 4
HT_RXCLK1N HT_TXCLK1N
H_CTLOP0 M22 M24 H_CTLIP0
4 H_CTLOP0 HT_RXCTL0P HT_TXCTL0P H_CTLIP0 4
H_CTLON0 M23 M25 H_CTLIN0
4 H_CTLON0 HT_RXCTL0N HT_TXCTL0N H_CTLIN0 4
H_CTLOP1 R21 P19 H_CTLIP1
4 H_CTLOP1 H_CTLON1 HT_RXCTL1P HT_TXCTL1P H_CTLIN1 H_CTLIP1 4
4 H_CTLON1 R20 R18 H_CTLIN1 4
HT_RXCTL1N HT_TXCTL1N
1 R57 2 301_0402_1% C23 B24 1 R58 2 301_0402_1%
HT_RXCALP HT_TXCALP
A24 B25
HT_RXCALN HT_TXCALN
0718 Place within 1" RS780M_FCBGA528 0718 Place within 1"
layout 1:2 layout 1:2
4 4

NEED CHECK R68 & R69 WITH AMD

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RS780-HT/PCIE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 10 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
+3VS
L2 AVDD=100mA
1 2 RED 1 2 +AVDD1
R62 150_0402_1% BLM18PG121SN1D_0603 1
1 2 GREEN
R63 150_0402_1% +1.8VS C170
1 1 2 BLUE L4 2.2U_0603_6.3V4Z 1
R64 150_0402_1% +AVDD2 2
0_0603_5% 1
U3C
C172 F12 A22 LVDS_A0+ 17
+1.8VS 2.2U_0603_6.3V4Z AVDD1(NC) TXOUT_L0P(NC)
E12
AVDD2(NC)
PART 3 OF 6 TXOUT_L0N(NC)
B22 LVDS_A0- 17
2 F14 A21
AVDDDI(NC) TXOUT_L1P(NC) LVDS_A1+ 17
L6 G15 B21 LVDS_A1- 17
+AVDDQ AVSSDI(NC) TXOUT_L1N(NC)
1 2 H15 B20 LVDS_A2+ 17
+1.8VS +NB_HTPVDD BLM18PG121SN1D_0603 1 AVDDQ(NC) TXOUT_L2P(NC)
H14 A20 LVDS_A2- 17
L7 AVSSQ(NC) TXOUT_L2N(DBG_GPIO0)
A19
C175 TXOUT_L3P(NC)
1 2 E17 B19
BLM18PG121SN1D_0603 2.2U_0603_6.3V4Z C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17

CRT/TVOUT
1 2 Y(DFT_GPIO2)
F15 B18 LVDS_B0+ 17
C176 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
A18 LVDS_B0- 17
2.2U_0603_6.3V4Z RED TXOUT_U0N(NC)
16 RED G18 A17 LVDS_B1+ 17
2 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3)
G17 B17 LVDS_B1- 17
GREEN REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
16 GREEN E18 D20 LVDS_B2+ 17
+1.1VS GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 D21 LVDS_B2- 17
L9 +NB_PLLVDD BLUE GREENb(NC) TXOUT_U2N(NC) L3
16 BLUE E19 D18
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) +VDDLTP18
1 2 F19 D19 1 2 +1.8VS
+1.8VS +VDDA18HTPLL BLM18PG121SN1D_0603 BLUEb(NC) TXOUT_U3N(NC) BLM18PG121SN1D_0603
1 1
L10 CRT_HSYNC A11 B16 LVDS_ACLK+ 17
14,16 CRT_HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1)
1 2 C178 CRT_VSYNC B11 A16 LVDS_ACLK- 17 C171
14,16 CRT_VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
BLM18PG121SN1D_0603 1 2.2U_0603_6.3V4Z F8 D16 2.2U_0603_6.3V4Z
2 16 UMA_CRT_CLK DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4) LVDS_BCLK+ 17 2
16 UMA_CRT_DAT E8 D17 LVDS_BCLK- 17
C179 DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
2.2U_0603_6.3V4Z R65 1 2 715_0402_1% G14
2 DAC_RSET(PWM_GPIO1) +VDDLTP18 L5
A13
+NB_PLLVDD VDDLTP18(NC) +VDDLT18
+NB_PLLVDD A12 B13 1 2 +1.8VS
+NB_HTPVDD PLLVDD(NC) VSSLTP18(NC) BLM18PG121SN1D_0603
+NB_HTPVDD D14 1 1
PLLVDD18(NC) +VDDLT18
B12 A15

LVTM
2 PLLVSS(NC) VDDLT18_1(NC) C173 C174 2
B15

PLL PWR
+1.8VS +VDDA18PCIEPLL VDDLT18_2(NC) 0.1U_0402_16V4Z 4.7U_0805_10V4Z
+VDDA18HTPLL H17 A14
L11 VDDA18HTPLL VDDLT33_1(NC) 2 2
B14
VDDLT33_2(NC)
1 2 +VDDA18PCIEPLL D7
BLM18PG121SN1D_0603 VDDA18PCIEPLL1
1 E7 C14
R67 0_0402_5% VDDA18PCIEPLL2 VSSLT1(VSS)
D15
C180 NB_RESET# VSSLT2(VSS)
14,19,25,26,27,32,33 PLT_RST# 1 2 D8 C16
2.2U_0603_6.3V4Z NB_PWRGD SYSRESETb VSSLT3(VSS)
20 NB_PWRGD A10 C18
2 POWERGOOD VSSLT4(VSS)
6,19 LDT_STOP# C10 C20
LDTSTOPb VSSLT5(VSS)
C12 E20

PM
6,19 CPU_LDT_REQ# ALLOW_LDTSTOP VSSLT6(VSS)
C22
+1.8VS VSSLT7(VSS)
15 CLK_NBHT C25
HT_REFCLKP
15 CLK_NBHT# C24
HT_REFCLKN
1 2 NB_PWRGD
R371 300_0402_5% E11
15 NB_OSC_14.318M REFCLK_P/OSCIN(OSCIN)

CLOCKs
F11 E9 1 2 UMA_ENVDD 17
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) R69 1
F7 2 0_0402_5% ENBKL 33
LVDS_BLON(PCE_RCALRP) R70 0_0402_5%
+1.1VS 1 2 1 2 15 NBGFX_CLK T2 G12
R71 R72 GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
15 NBGFX_CLK# T1
4.7K_0402_5% 4.7K_0402_5% GFX_REFCLKN
For SB700 A12 use
U1
GPP_REFCLKP
U2
GPP_REFCLKN

15 CLK_SBLINK_BCLK V4
GPPSB_REFCLKP(SB_REFCLKP)
15 CLK_SBLINK_BCLK# V3
GPPSB_REFCLKN(SB_REFCLKN)

17 LCD_DDC_CLK B9
I2C_CLK
A9 D9
17 LCD_DDC_DAT
B8
I2C_DATA MIS. TMDS_HPD(NC)
D10
HPD 18
18 HDMIDAT_UMA DDC_DATA0/AUX0N(NC) HPD(NC)
18 HDMICLK_UMA A8
DDC_CLK0/AUX0P(NC)
B7 D12 1 2 SUS_STAT# 20
DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) R77 0_0402_5%
A7 SUS_STAT_R# 14 Strap pin
3 DDC_DATA1/AUX1N(NC) 3
AE8
THERMALDIODE_P
+3VS 2 1 B10 AD8
STRP_DATA THERMALDIODE_N
R88 10K_0402_5% G11 D13 1 2
RSVD TESTMODE R80
C8 1.8K_0402_5%
14 AUX_CAL AUX_CAL(NC)
Strap pin RS780M_FCBGA528

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RS780 VEDIO/CLK GEN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 11 of 53

WWW.AliSaler.Com
A B C D E
 2 1

WWW.AliSaler.Com
U61 U3D
MEM_BA0 L2 B9 MEM_DQ15 PAR 4 OF 6
MEM_BA1 BA0 DQ15 MEM_DQ11 MEM_A0 MEM_DQ0
L3 B1 AB12 AA18
BA1 DQ14 MEM_DQ13 MEM_A1 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1
D9 AE16 AA20
MEM_A12 DQ13 MEM_DQ12 MEM_A2 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) MEM_DQ2
R2 D1 V11 AA19
MEM_A11 A12 DQ12 MEM_DQ8 MEM_A3 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) MEM_DQ3
P7 D3 AE15 Y19
MEM_A10 A11 DQ11 MEM_DQ10 MEM_A4 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4
M2 D7 AA12 V17
MEM_A9 A10/AP DQ10 MEM_DQ9 MEM_A5 MEM_A4(NC) MEM_DQ4(NC) MEM_DQ5
P3 C2 AB16 AA17
MEM_A8 A9 DQ9 MEM_DQ14 MEM_A6 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6
P8 C8 AB14 AA15
MEM_A7 A8 DQ8 MEM_DQ3 MEM_A7 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7
P2 F9 AD14 Y15
MEM_A6 A7 DQ7 MEM_DQ7 MEM_A8 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8
N7 F1 AD13 AC20
MEM_A5 A6 DQ6 MEM_DQ1 MEM_A9 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9
N3 H9 AD15 AD19
MEM_A4 A5 DQ5 MEM_DQ6 MEM_A10 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) MEM_DQ10
N8 H1 AC16 AE22
A4 DQ4 MEM_A10(NC) MEM_DQ10/DVO_D6(NC)

SBD_MEM/DVO_I/F
MEM_A3 N2 H3 MEM_DQ5 MEM_A11 AE13 AC18 MEM_DQ11
MEM_A2 A3 DQ3 MEM_DQ0 MEM_A12 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) MEM_DQ12
M7 H7 AC14 AB20
MEM_A1 A2 DQ2 MEM_DQ4 MEM_A12(NC) MEM_DQ12(NC) MEM_DQ13
M3 G2 Y14 AD22
MEM_A0 A1 DQ1 MEM_DQ2 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) MEM_DQ14
M8 G8 AC22
A0 DQ0 MEM_BA0 MEM_DQ14/DVO_D10(NC) MEM_DQ15
AD16 AD21
1

MEM_BA1 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC)

AE17
R91 MEM_CLKN MEM_BA2 MEM_BA1(NC) MEM_DQS_P0
K8 A9 +1.8V_MEM_VDDQ AD17 Y17
MEM_CLKP CK VDDQ MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS_N0
J8
CK VDDQ
C1
MEM_DQS0N/DVO_IDCKN(NC)
W18 MEM_COMP_P and MEM_COMP_N trace
100_0402_1% C3 MEM_RAS# W12 AD20 MEM_DQS_P1
B SIDE@ MEM_CKE K2
VDDQ
C7 MEM_CAS# Y12
MEM_RASb(NC) MEM_DQS1P(NC)
AE21 MEM_DQS_N1 width >=10mils and 10mils spacing from B
2

CKE VDDQ MEM_WE# MEM_CASb(NC) MEM_DQS1N(NC) other Signals in X,Y,Z directions

C9 AD18
VDDQ MEM_CS# MEM_WEb(NC) MEM_DM0
E9 AB13 W17
VDDQ MEM_CKE MEM_CSb(NC) MEM_DM0(NC) MEM_DM1 +1.8VS
G1 AB18 AE19
MEM_CS# VDDQ MEM_ODT MEM_CKE(NC) MEM_DM1/DVO_D8(NC) L12
L8 G3 V14
CS VDDQ MEM_ODT(NC) L13 +1.8V_IOPLLVDD
G7 AE23 1 2
MEM_WE# VDDQ MEM_CLKP IOPLLVDD18(NC) +NB_IOPLLVDD 0_0603_5%
K3 G9 V15 AE24 1 2 +1.1VS
WE VDDQ MEM_CLKN MEM_CKP(NC) IOPLLVDD(NC) 0_0603_5%
W14 1 1
MEM_RAS# SIDE@ MEM_CKN(NC)
K7 A1 AD23 1
RAS VDD MEM_COMP_P IOPLLVSS(NC) C181 C183
E1 2 1 AE12
MEM_CAS# VDD R92 40.2_0402_1% MEM_COMPP(NC) +MEM_VREF1 2.2U_0603_6.3V4Z C182 2.2U_0603_6.3V4Z
L7 J9 AD12 AE18
CAS VDD MEM_COMP_N MEM_COMPN(NC) MEM_VREF(NC) 2 0.1U_0402_16V4Z 2
M9 +1.8V_MEM_VDDQ 2 1
MEM_DM0 VDD +1.8V_MEM_VDDQ R93 40.2_0402_1% RS780M_FCBGA528 SIDE@ 2 SIDE@
F3 R1 SIDE@
MEM_DM1 LDM VDD SIDE@ <BOM Structure>
B3
UDM +VDDL
J1
VDDL

1U_0603_10V6K
J7
MEM_ODT VSSDL
K9 1 Layout Note: 50 mil for VSSDL
ODT
C184
MEM_DQS_P0 F7 SIDE@
MEM_DQS_N0 LDQS 2
E8 A7
LDQS VSSQ
B2
VSSQ
B8
VSSQ
D2
MEM_DQS_P1 VSSQ
B7 D8
MEM_DQS_N1 UDQS VSSQ
A8 E7
UDQS VSSQ
F2
VSSQ
F8
+MEM_VREF VSSQ
J2 H2
VREF VSSQ
H8
VSSQ
A2
NC
E2 A3
MEM_BA2 NC VSS
L1 E3
NC VSS
R3 J3
NC VSS
R7 N1
NC VSS
R8 P9
NC VSS

HY5PS561621AFP-25_FBGA84
SIDE@

+1.8V_MEM_VDDQ +1.8V_MEM_VDDQ
0.1U_0402_16V4Z

0.1U_0402_16V4Z
2

2
1K_0402_1%

1K_0402_1%

1 1
C195

C196

SIDE@ SIDE@ SIDE@ SIDE@

A +1.8V_MEM_VDDQ A
R96

R97

2 2 +1.8VS
1

L15
+MEM_VREF +MEM_VREF1 22U_0805_6.3V6M 1 2
SIDE@ 0_0805_5%
1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z

2 2 1 1 1 220 ohm @ 100MHz,2A

1 1
2

2
1K_0402_1%

1K_0402_1%

C608

C607

C201

C202

SIDE@ SIDE@ SIDE@ SIDE@ C203

C199

C200

SIDE@ SIDE@ SIDE@ SIDE@

SIDE@ 1 1 2 2 2
2 2
R98

R99
1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RS780 SIDE PORT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 12 of 53

WWW.AliSaler.Com
2 1
 A B C D E

WWW.AliSaler.Com
U3F
A25 A2
VSSAHT1 VSSAPCIE1
D23 PART 6/6 B1
VSSAHT2 VSSAPCIE2
E22 D3
VSSAHT3 VSSAPCIE3
G22 D5
VSSAHT4 VSSAPCIE4
G24 E4
VSSAHT5 VSSAPCIE5
G25 G1
1 L16 VSSAHT6 VSSAPCIE6 1
2A H19
VSSAHT7 VSSAPCIE7
G2
2 1 +VDDHT J22 G4
+1.1VS VSSAHT8 VSSAPCIE8
L17 H7
FBMA-L11-201209-221LMA30T_0805 VSSAHT9 VSSAPCIE9
1 1 1 1 1 L22 J4
L17 VSSAHT10 VSSAPCIE10
L24 R7
C209 C206 C207 C208 C210 VSSAHT11 VSSAPCIE11
1 2 +1.1VS L25 L1
FBMA-L11-201209-221LMA30T_0805 VSSAHT12 VSSAPCIE12
2 2 2 2 2 U3E VDDA_12=2.5A M20
VSSAHT13 VSSAPCIE13
L2
N22 L4
+VDDA11PCIE VSSAHT14 VSSAPCIE14
J17 A6 P20 L7
VDDHT_1 VDDPCIE_1 C211 10U_0805_10V4Z VSSAHT15 VSSAPCIE15
K16 PART 5/6 B6 R19 M6
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHT_2 VDDPCIE_2 VSSAHT16 VSSAPCIE16
L16 C6 R22 N4
L18 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHT_3 VDDPCIE_3 C212 10U_0805_10V4Z VSSAHT17 VSSAPCIE17
2A M16
VDDHT_4 VDDPCIE_4
D6 R24
VSSAHT18 VSSAPCIE18
P6
2 1 +VDDHTRX P16 E6 R25 R1
VDDHT_5 VDDPCIE_5 C220 1U_0402_6.3V4Z VSSAHT19 VSSAPCIE19
R16 F6 1 2 H20 R2
FBMA-L11-201209-221LMA30T_0805 VDDHT_6 VDDPCIE_6 C219 1U_0402_6.3V4Z VSSAHT20 VSSAPCIE20
1 1 1 1 1 T16 G7 1 2 U22 R4
VDDHT_7 VDDPCIE_7 C222 1U_0402_6.3V4Z VSSAHT21 VSSAPCIE21
H8 1 2 V19 V7
C215 C214 C216 C217 C218 VDDPCIE_8 C221 1U_0402_6.3V4Z VSSAHT22 VSSAPCIE22
H18 J9 1 2 W22 U4

GROUND
VDDHTRX_1 VDDPCIE_9 C224 0.1U_0402_16V4Z VSSAHT23 VSSAPCIE23
G19 K9 2 1 W24 V8
2 2 2 2 2 VDDHTRX_2 VDDPCIE_10 C223 0.1U_0402_16V4Z VSSAHT24 VSSAPCIE24
F20 M9 2 1 W25 V6
VDDHTRX_3 VDDPCIE_11 VSSAHT25 VSSAPCIE25
E21 L9 Y21 W1
VDDHTRX_4 VDDPCIE_12 VSSAHT26 VSSAPCIE26
D22 P9 AD25 W2
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTRX_5 VDDPCIE_13 VSSAHT27 VSSAPCIE27
B23 R9 W4
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTRX_6 VDDPCIE_14 VSSAPCIE28
A23 T9 L12 W7
L19 VDDHTRX_7 VDDPCIE_15 VSS11 VSSAPCIE29
2A VDDPCIE_16
V9 M14
VSS12 VSSAPCIE30
W8
+1.2V_HT 2 1 +VDDHTTX AE25 U9 N13 Y6
FBMA-L11-201209-221LMA30T_0805 VDDHTTX_1 VDDPCIE_17 VSS13 VSSAPCIE31
AD24 P12 AA4
L43 VDDHTTX_2 L20 1 VSS14 VSSAPCIE32
1 1 1 1 1 AC23 K12 +1.1VS 2 +NB_VDDC P15 AB5
VDDHTTX_3 VDDC_1 FBMA-L11-201209-221LMA30T_0805 VSS15 VSSAPCIE33
+1.35VS 2 1 AB22 J14 R11 AB1
C225 C226 C227 C228 C229 VDDHTTX_4 VDDC_2 L21 1 VSS16 VSSAPCIE34
AA21 U16 2 R14 AB7
@ FBMA-L11-201209-221LMA30T_0805 VDDHTTX_5 VDDC_3 FBMA-L11-201209-221LMA30T_0805 VSS17 VSSAPCIE35
Y20 J11 T12 AC3
2 2 2 2 2 VDDHTTX_6 VDDC_4 VSS18 VSSAPCIE36
W19 K15 U14 AC4
VDDHTTX_7 VDDC_5 VSS19 VSSAPCIE37

POWER
V18 M12 VDD_CORE=5A U11 AE1
2 VDDHTTX_8 VDDC_6 VSS20 VSSAPCIE38 2
U17 L14 U15 AE4
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTTX_9 VDDC_7 VSS21 VSSAPCIE39
T17 L11 V12 AB2
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTTX_10 VDDC_8 VSS22 VSSAPCIE40
R17 M13 W11
VDDHTTX_11 VDDC_9 VSS23
P17 M15 W15
VDDHTTX_12 VDDC_10 VSS24
M17 N12 AC12 AE14
VDDHTTX_13 VDDC_11 VSS25 VSS1

330U_D2E_2.5VM
C247

C240

C241

C242

C243

C230

C231

C244

C232

C233

C245
L22 2A N14 1 AA14 D11
+VDDA18PCIE VDDC_12 VSS26 VSS2
+1.8VS 2 1 J10 P11 1 1 1 1 1 1 1 1 1 1 1 Y18 G8
VDDA18PCIE_1 VDDC_13 VSS27 VSS3

C234
P10 P13 + AB11 E14
FBMA-L11-201209-221LMA30T_0805 VDDA18PCIE_2 VDDC_14 VSS28 VSS4
1 1 1 1 1 1 K10 P14 AB15 E15
VDDA18PCIE_3 VDDC_15 VSS29 VSS5

10U_0805_10V4Z

10U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
M10 R12 AB17 J15
C235 C246 C236 C237 C238 C239 VDDA18PCIE_4 VDDC_16 2 2 2 2 2 2 2 2 2 2 2 2 VSS30 VSS6
L10 R15 AB19 J12
4.7U_0805_10V4Z VDDA18PCIE_5 VDDC_17 VSS31 VSS7
W9 T11 AE20 K14
2 2 2 2 2 2 VDDA18PCIE_6 VDDC_18 VSS32 VSS8
H9 T15 AB21 M11
VDDA18PCIE_7 VDDC_19 VSS33 VSS9
T10 U12 K11 L15
VDDA18PCIE_8 VDDC_20 VSS34 VSS10
R10 T14
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDA18PCIE_9 VDDC_21 RS780M_FCBGA528
Y9 J16
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDA18PCIE_10 VDDC_22
AA9
VDDA18PCIE_11
AB9 AE10
VDDA18PCIE_12 VDD_MEM1(NC) +1.8VS
AD9 AA11
VDDA18PCIE_13 VDD_MEM2(NC)
AE9 Y11
VDDA18PCIE_14 VDD_MEM3(NC)
U10 AD10
VDDA18PCIE_15 VDD_MEM4(NC) 1U_0402_6.3V4Z C249 SIDE@
AB10 2 1
VDD_MEM5(NC) 1U_0402_6.3V4Z C248 SIDE@
+1.8VS F9 AC10 2 1
VDD18_1 VDD_MEM6(NC) 0.1U_0402_16V4Z C597 SIDE@
G9 2 1
VDD18_2 0.1U_0402_16V4Z C598 SIDE@
+1.8VS AE11 H11 2 1
VDD18_MEM1(NC) VDD33_1(NC) 0.1U_0402_16V4Z C599 SIDE@
AD11 H12 2 1
VDD18_MEM2(NC) VDD33_2(NC)
1 1 RS780M_FCBGA528
C251 +3VS
1U_0402_6.3V4Z C252
1U_0402_6.3V4Z 1 2
2 2 0.1U_0402_16V4Z C250
3
SIDE@ 3
1 2
0.1U_0402_16V4Z C253

+1.8VS

U67
1 6 +3VS
VIN VCNTL
1 2 5
GND NC
1

C903 3 7 1
@ 10U_0805_10V4Z VREF NC C463
2 R599 4 8 @ 1U_0603_10V6K
@ 1K_0402_1% VOUT NC
9 2
2

TP
@ G2992F1U_SO8
+VREF1.35V

+1.35VS
1

Q56 R600
@ 2N7002_SOT23-3 @ 3K_0402_5% 2 1
1

4 D 4
1 2 2 C702 C905
36 VLDT_EN#
2

R601 @ 0_0402_5% G
S 1 2 @ 10U_0805_10V4Z
2
3

C703
@ 0.1U_0402_16V7K
1 @ 0.1U_0402_16V7K
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RS780 PWR/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 13 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 3K
11,16 CRT_VSYNC 2 1 +3VS Enables the Test Debug Bus using GPIO.
@ R101 1K_0402_5% 1 : Enable (RX780, RS780)
2 1
1 R102 1K_0402_5% 0 : Disable (RX780, RS780) 1
PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]

These pin straps are used to configure PCI-E GPP mode.

000 : 00001
001 : 00010
RS780 use register to control PCI-E configure 010 : 01011
011 : 00100
100 : 01010
101 : 01100
111 : 01011

2 2

DFT_GPIO1: LOAD_EEPROM_STRAPS

11 AUX_CAL 1 2
@ R104 150_0402_1% Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
D4 @ CH751H-40PT_SOD323-2
0 : I2C Master can load strap values from EEPROM if connected, or use
RS780 DFT_GPIO1 11 SUS_STAT_R# 2 1 PLT_RST# 11,19,25,26,27,32,33 default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
3 3

RX780: Enables the Test Debug Bus using PCIE bus

1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS780 use HSYNC to enable SIDE PORT (internal pull high)
RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS780)
11,16 CRT_HSYNC 2 1
SIDE@ R107 1K_0402_5% 0 : Enable (RS780)

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RS780 STRAPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 14 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com +1.2V_HT +VDDCLK_IO +3VS_CLK

R167
+3VS 1 2
R168 0_0805_5% 1 1 1 1 1 1 1 1
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C445 C446 C447 C448 C449 C450 C451
0_0805_5% 1 1 1 1 1 1 C444
22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z
C452 C453 C454 C455 C456 C457 2 2 2 2 2 2 2 2
22U_0805_6.3V6M
2 2 2 2 2 2
+3VS_CLK
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 1
1 C458 C459 C460 C461 1

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2 2 2 2

CLK_XTAL_OUT

CLK_XTAL_IN

Y2
R170 1 2 33_0402_5%
CLK_48M_USB 20
2 1 OSC_14M_NB
NB_OSC_14.318M_R 1 2
14.31818MHZ_20P_6X1430004201 R379 200_0402_1% NB_OSC_14.318M 11 RX780 1.8V 75R/100R

+3VS_CLK
1 1 1 2 R380
C464 C465 100_0402_5% RS780 1.1V 158R/90.9R
22P_0402_50V8J 22P_0402_50V8J R220 1 2 33_0402_5%
2 2 CLK_14M_SIO 32
CLK_NBHT 11

+3VS_CLK
+3VS_CLK
CLK_NBHT# 11 NB

CLK_XTAL_OUT
Routing the trace at least 10mil 1 2 +3VS_CLK CLK_CPU_BCLK 6

CLK_XTAL_IN

SEL_SATA
R174 10K_0402_5%

2
27M_SEL
2 2
1 2 R186
R946 0_0402_5% @ 261_0402_1% CPU
1 2
R945 0_0402_5%

1
CLK_CPU_BCLK# 6

73

72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
U10

GND

XTAL_IN
VSS_48
48MHz_0
48MHz_1
VDD_48

REF_0/SEL_HTT66

REF_2/SEL_27

HTT_0/66M_0
HTT_0#/66M_1

PD#
CPU_K8_0
CPU_K8_0#
XTAL_OUT

VSS_REF

VDD_REF
VDD_HTT

VSS_HTT
REF_1/SEL_SATA
CLKREQ_NCARD# 1 2 +3VS_CLK
R324 8.2K_0402_5%
CLKREQ_MCARD2# 1 2
1 54 +3VS_CLK R325 8.2K_0402_5%
8,9,20,28 SMB_CK_CLK0 SCL VDD_CPU CLKREQ_MCARD1#
2 53 +VDDCLK_IO 1 2
8,9,20,28 SMB_CK_DAT0 SDA VDD_CPU_I/O R326 8.2K_0402_5%
+3VS_CLK 3 52
VDD_DOT VSS_CPU CLKREQ_NCARD# CLKREQ_LAN
4 51 1 2
SRC_7#/27M CLKREQ_1# CLKREQ_MCARD2# CLKREQ_NCARD# 26 R390 8.2K_0402_5%
5 50
SRC_7/27M_SS CLKREQ_2# CLKREQ_MCARD2# 26
6 49 +3VS_CLK
VSS_DOT VDD_A
7 48
SRC_5# VSS_A
8 47
SRC_5 VSS_SATA
PA_RS7X0A1 11 CLK_SBLINK_BCLK# 9
SRC_4# SRC_6/SATA
46 CLK_SBSRC_BCLK 19 PA_RS7X0A1
SB LINK 11 CLK_SBLINK_BCLK 10
SRC_4 SRC_6#/SATA#
45 CLK_SBSRC_BCLK# 19 SB SRC
11 44 +3VS_CLK
VSS_SRC VDD_SATA CLKREQ_MCARD1#
+VDDCLK_IO 12 43 CLKREQ_MCARD1# 26
VDD_SRC_IO CLKREQ_3#
26 CLK_PCIE_MCARD1# 13 42
SRC_3# CLKREQ_4#
Card reader 26 CLK_PCIE_MCARD1 14
SRC_3 SB_SRC_SLOW#
41 1 2 +3VS_CLK
15 40 R372 10K_0402_5%
26 CLK_PCIE_MCARD2# SRC_2# SB_SRC_0
MiniCard_2 26 CLK_PCIE_MCARD2 16
SRC_2 SB_SRC_0#
39
+3VS_CLK 17 38 +3VS_CLK
VDD_SRC VDD_SB_SRC
+VDDCLK_IO 18 37 +VDDCLK_IO
VDD_SRC_IO VDD_SB_SRC_IO

VSS_SB_SRC
VDD_ATIG_IO
3 3

ATIGCLK_2#

ATIGCLK_1#

ATIGCLK_0#
CLKREQ_0#

SB_SRC_1#
ATIGCLK_2

ATIGCLK_1

ATIGCLK_0

SB_SRC_1
VSS_ATIG

VDD_ATIG
VSS_SRC
SRC_1#

SRC_0#
SRC_1

SRC_0

+3VS_CLK
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
2

SLG8SP626VTR_QFN72_10x10
R179
@ 8.2K_0402_5%
1

SEL_SATA +3VS_CLK
+3VS_CLK
+VDDCLK_IO
2

R181 NB CLOCK INPUT TABLE

NBGFX_CLK 11
8.2K_0402_5% R180 NB GFX
NBGFX_CLK# 11
8.2K_0402_5% NB CLOCKS RX780 RS780
1

HT_REFCLKP
1

27M_SEL 100M DIFF 100M DIFF

HT_REFCLKN 100M DIFF 100M DIFF
CLK_PCIE_MCARD0 27
MiniCard_1 REFCLK_P
CLK_PCIE_MCARD0# 27
1 configure as SATA output CLKREQ_LAN 14M SE (1.8V) 14M SE (1.1V)
CLKREQ_LAN 25
SEL_SATA 1 * configure as 27M and 27M_SS output REFCLK_N NC vref
CLK_PCIE_LAN 25
0 * configure as normal SRC(SRC_6) output 27M_SEL GLAN
CLK_PCIE_LAN# 25
* default 0 configure as SRC_7 output GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*
* default New Card
CLK_PCIE_NCARD 26 NC or 100M DIFF OUTPUT
GPP_REFCLK 100M DIFF
4 CLK_PCIE_NCARD# 26 4
GPPSB_REFCLK 100M DIFF 100M DIFF

Use voltage divider resistor R379 & R380 to pull low

Security Classification Compal Secret Data Compal Electronics, Inc.
1 configure as single-ended 66MHz output Issued Date 2007/08/02 2008/08/02 Title
NB_OSC_14.318M
Deciphered Date
0* configure as differential 100MHz output
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Clock generator
* default AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 15 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com

CRT CONNECTOR
1 1
+5VS +R_CRT_VCC +CRT_VCC
D36 F2
2 1 1 2

1
D35 D37 D34 1
RB491D_SOT23 1A_6VDC_MINISMDC110
C475
0.1U_0402_16V4Z
+3VS 2
DAN217_SC59 DAN217_SC59DAN217_SC59

3
@ @ @

JP6
6
L47 11
RED 1 2 RED_L 1
11 RED
BLM15AG121SN1D_0402 7
L48 D_DDCDATA 12
GREEN 1 2 GREEN_L 2
11 GREEN
BLM15AG121SN1D_0402 8
L49 HSYNC 13
BLUE 1 2 BLUE_L 3
11 BLUE
BLM15AG121SN1D_0402 +CRT_VCC 9

6P_0402_50V8K

6P_0402_50V8K

6P_0402_50V8K

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J
VSYNC 14

150_0402_1%

150_0402_1%

150_0402_1%
1 1 1 4

1
1 1 1 10
R214 R211 R217 C471 C859 C469 C858 C476 C472 D_DDCCLK 15
5
2 2 2
2 2 2 16 GND

2
17 GND
RED_L 35
2 2
GREEN_L 35
+3VS SUYIN_070546FR015S265ZR
BLUE_L 35
+CRT_VCC
SI:change CRT Conn.
+CRT_VCC
1

R237 R238 +3VS 1 2

4.7K_0402_5% 4.7K_0402_5% R100 R218 C473

5
1
0.1U_0402_16V4Z
5

6.8K_0402_5% 6.8K_0402_5%

OE#
P
2

2 4 D_HSYNC 1 2 HSYNC
11,14 CRT_HSYNC A Y
4 3 D_DDCDATA L84 10_0402_5%
11 UMA_CRT_DAT D_DDCDATA 35

G
U14
Q10B

3
2N7002DW-7-F_SOT363-6 SN74AHCT1G125GW_SOT353-5 1 2 VSYNC
L83 10_0402_5%

10P_0402_50V8J

10P_0402_50V8J
+3VS +CRT_VCC
1 1

1 2 C474 C470
2

C477 @ @

5
1
0.1U_0402_16V4Z 2 2
1 6 D_DDCCLK

OE#
P
11 UMA_CRT_CLK D_DDCCLK 35
2 4 D_VSYNC
11,14 CRT_VSYNC A Y
Q10A 1 1

G
U13
2N7002DW-7-F_SOT363-6 C857 C856 SN74AHCT1G125GW_SOT353-5

3
@ @
RS780 DAC_SCL & SDA is 5V tolerance 470P_0402_50V8J 2 2 470P_0402_50V8J
D_HSYNC 35
3 3

D_VSYNC 35

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 16 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
+LCDVDD

+5VALW

1
R225

2
470_0805_5%
R224
1M_0402_5% +3VS

3 2
1 1
80mil

3
S
Q144B R222 G
2N7002DW-7-F_SOT363-6 5 1 2 2 Q43
100K_0402_5% SI2301BDS-T1-E3_SOT23-3

6
D
2

1
80mil
C863 +LCDVDD
2 1000P_0402_50V7K
11 UMA_ENVDD Q144A 1

2
2N7002DW-7-F_SOT363-6 1

1
R276
2.2K_0402_5% C487 C491
4.7U_0805_10V4Z 0.1U_0402_16V4Z
2

1
2 2

+LCDVDD INVPWR_B+

B+ L44 INVPWR_B+
2 1
C479 C480 FBMA-L11-201209-221LMA30T_0805

680P_0402_50V7K

680P_0402_50V7K
+3VS
1

1
LVDS CONN

2
C481 2 JP7
D22 1 2 LVDS_A2- 11
1 2
680P_0402_50V7K
3 4 LVDS_A2+ 11
USB20_P5 @ @ 3 4
+5VALW 4 2 5 6 LVDS_A1- 11
1

VIN IO1 5 6
7 8 LVDS_A1+ 11
USB20_N5 7 8 LVDS_ACLK-
3 1 9 10 LVDS_A0- 11 1 2
IO2 GND 9 10 @ C868 680P_0402_50V7K
11 12 LVDS_A0+ 11
2

@ PRTR5V0U2X_SOT143-4 USB20_P5 11 12 LVDS_ACLK- LVDS_ACLK+

20 USB20_P5 13 14 LVDS_ACLK- 11 1 2
USB20_N5 13 14 LVDS_ACLK+ @ C869 680P_0402_50V7K
20 USB20_N5 15 16 LVDS_ACLK+ 11
15 16
17 18
@ 17 18
19 20
19 20
21 22
LVDS_BCLK+ 21 22 DMIC_DAT +5VS
11 LVDS_BCLK+ 23 24 DMIC_DAT 29
LVDS_BCLK+ LVDS_BCLK- 23 24 DMIC_CLK
2 1 11 LVDS_BCLK- 25 26 DMIC_CLK 29
3 680P_0402_50V7K C870 @ 25 26 3
27
27 28
28 1 2 SI: Change R491 to 0805 size
2 1 LVDS_BCLK- 29 30 INVT_PWM 100_0805_5% R491
11 LVDS_B0+ 29 30 BKOFF# INV_PWM 33
680P_0402_50V7K C871 @ 31 32 BKOFF# 33
11 LVDS_B0- 31 32
33 34 DAC_BRIG
11 LVDS_B1+ 33 34 DAC_BRIG 33
11 LVDS_B1- 35 36 +USB_CAM
35 36 LCD_DDC_CLK
11 LVDS_B2+ 37 38 LCD_DDC_CLK 11
37 38 LCD_DDC_DAT
11 LVDS_B2- 39 40
39 40

680P_0402_50V7K

680P_0402_50V7K
SI: Add +5VS jumper 41 42 LCD_DDC_DAT 11
GND GND
1 1

680P_0402_50V7K

680P_0402_50V7K
ACES_88242-4001

C482

C483
CONN@
+5VALW +5VS

C866

C867
2 2

2
+3VS @ @
1

@ @
PJP4 +USB_CAM BKOFF# 1 2
PAD-OPEN 2x2m PJP7 @ 4.7K_0402_5% R483
PAD-OPEN 2x2m @ 215K_0402_1%
LCD_DDC_CLK 1 2
1

U54 4.7K_0402_5% R274

2

1 5
VIN VOUT R891 LCD_DDC_DAT 1
2 2
2

2 4.7K_0402_5% R275
C720 R16 GND
2
2

10U_0805_10V4Z 0_0402_5% 3 4
1 EN BP C719
1

RT9193-39GB_SOT23-5 1 10U_0805_10V4Z
1

2 1 R892 1
21 CAM_SHDN#
R17 @ 0_0402_5% C511 100K_0402_1%
0.1U_0402_16V4Z @
2
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LCD CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 17 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
+3VS +HDMI_5V_OUT

+HDMI_5V_OUT

2
HDMI_HPD +3VS
C851 2 R176 R209
1 0.1U_0402_16V4Z 2 1 4.7K_0402_5% R210 R236 1
+3VS 4.7K_0402_5%

2
R615 R628 2 C850 6.8K_0402_5% 6.8K_0402_5%
5
1

5
2.2K_0402_5% 100K_0402_5% 0.1U_0402_16V4Z

1
1
OE#
P
2 4 4 3 HDMI_SDATA
A Y HPD 11 1 11 HDMIDAT_UMA

1
G

U39
SN74AHCT1G125GW_SOT353-5 Q139B
3

2N7002DW-7-F_SOT363-6

+3VS

2
1 6 HDMI_SCLK
11 HDMICLK_UMA

Q139A
2N7002DW-7-F_SOT363-6

2 2

MP:Update D10 to meet HDMI.

SI:Add R6161~R624 for EMI requset
D10
HDMI_CLK- 1 2 HDMI_R_CK- 2 1
+5VS +HDMI_5V_OUT
R616 0_0402_5%
RB491D_SOT23
L85
1 2 1
1 2 C468
SI:Add Q136 & Q137 for AMD request
4 3 0.1U_0402_16V4Z
4 3 2
@ WCM-2012-900T_0805
HDMI_CLK+ 1 2 HDMI_R_CK+
R617 0_0402_5% Q136A
2N7002DW-7-F_SOT363-6
HDMI_R_CK+ 1 2 6 1
R307 750_0402_1%
HDMI_TX0- 1 2 HDMI_R_D0- HDMI_R_CK- 1 2
R618 0_0402_5% R315 750_0402_1%

2
C507 1 2 0.1U_0402_16V7K HDMI_CLK+
10 TMDS_B_CLK
C508 1 2 0.1U_0402_16V7K HDMI_CLK- L86
10 TMDS_B_CLK# +5VS
1 2
1 2
C655 1 2 0.1U_0402_16V7K HDMI_TX0+ Q136B
10 TMDS_B_DATA0 HDMI_TX0-
C675 1 2 0.1U_0402_16V7K 4 3 2N7002DW-7-F_SOT363-6
3 10 TMDS_B_DATA0#

HDMI_TX1+ HDMI_TX0+
@
4 3
WCM-2012-900T_0805
HDMI_R_D0+
HDMI_R_D0- 1
R304
HDMI_R_D0+ 1
2
750_0402_1%
3 4
HDMI Connector 3

C804 1 2 0.1U_0402_16V7K 1 2 2
10 TMDS_B_DATA1
C827 1 2 0.1U_0402_16V7K HDMI_TX1- R619 0_0402_5% R172 750_0402_1%
10 TMDS_B_DATA1#

5
+HDMI_5V_OUT JP8
+5VS 18
C852 1 HDMI_TX2+ HDMI_SDATA +5V
10 TMDS_B_DATA2 2 0.1U_0402_16V7K 16 13
C853 1 HDMI_TX2- HDMI_TX1- HDMI_R_D1- HDMI_SCLK SDA CEC
10 TMDS_B_DATA2# 2 0.1U_0402_16V7K 1 2 15 14
R620 0_0402_5% Q137A HDMI_HPD SCL Reserved
19
2N7002DW-7-F_SOT363-6 HP_DET
2
L87 HDMI_R_D1- HDMI_R_CK- GND
1 2 6 1 12 5
R297 750_0402_1% HDMI_R_CK+ CK- GND
1 2 10 8
1 2 HDMI_R_D1+ HDMI_R_D0- CK+ GND
1 2 9 11
R173 750_0402_1% HDMI_R_D0+ D0- GND
7 20

2
HDMI_R_D1- D0+ GND
4 3 6 21
4 3 HDMI_R_D1+ D1- GND
+5VS 4 22
@ WCM-2012-900T_0805 HDMI_R_D2- D1+ GND
3 23
HDMI_TX1+ HDMI_R_D1+ HDMI_R_D2+ D2- GND
1 2 1 17
R621 0_0402_5% Q137B D2+ DDC/CEC_GND
2N7002DW-7-F_SOT363-6
HDMI_R_D2+ 1 2 3 4 SUYIN_100042MR019S153ZL
R141 750_0402_1%
HDMI_TX2- 1 2 HDMI_R_D2- HDMI_R_D2- 1 2 SI:Update HDMI footprint
R623 0_0402_5% R139 750_0402_1%

5
L88 +5VS
1 2
1 2

4 3
4 3
@ WCM-2012-900T_0805
4 HDMI_TX2+ 1 2 HDMI_R_D2+ 4
R624 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 18 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
Check AMD need pull low or not
1 2 NB_RST#_R
R300 @ 8.2K_0402_5%
U15A

NB_RST#_R N2
SB700 P4
PCICLK2 23
A_RST# PCICLK0
Part 1 of 5 PCICLK1
P3 1 2 CLK_PCI_SIO2 32
C492 1 2 0.1U_0402_16V7K SB_RX0P_C V23 P1 R302 @ 22_0402_5%

PCI CLKS
1 10 SB_RX0P PCIE_TX0P PCICLK2 1
C493 1 2 0.1U_0402_16V7K SB_RX0N_C V22 P2 1 2 CLK_PCI_SIO
10 SB_RX0N SB_RX1P_C PCIE_TX0N PCICLK3 CLK_PCI_SIO 23,32
C494 1 2 0.1U_0402_16V7K V24 T4 R301 22_0402_5%
10 SB_RX1P PCIE_TX1P PCICLK4 PCI_CLK4 23
C495 1 2 0.1U_0402_16V7K SB_RX1N_C V25 T3
10 SB_RX1N PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 23
C496 1 2 0.1U_0402_16V7K SB_RX2P_C U25
10 SB_RX2P PCIE_TX2P
C497 1 2 0.1U_0402_16V7K SB_RX2N_C U24
10 SB_RX2N PCIE_TX2N
C498 1 2 0.1U_0402_16V7K SB_RX3P_C T23
10 SB_RX3P PCIE_TX3P
C499 1 2 0.1U_0402_16V7K SB_RX3N_C T22 N1
10 SB_RX3N PCIE_TX3N PCIRST#
10 SB_TX0P U22
PCIE_RX0P
10 SB_TX0N U21 U2

PCI EXPRESS INTERFACE

PCIE_RX0N AD0
10 SB_TX1P U19 P7
PCIE_RX1P AD1 CLK_PCI_TCG C503 1
10 SB_TX1N V19 V4 1 2 2@ 100P_0402_25V8K
PCIE_RX1N AD2 R369 @ 100_0402_5%
10 SB_TX2P R20 T1
PCIE_RX2P AD3 CLK_PCI_EC C501 1
10 SB_TX2N R21 V3 1 2 2@ 100P_0402_25V8K
PCIE_RX2N AD4 R303 @ 100_0402_5%
10 SB_TX3P R18 U1
PCIE_RX3P AD5 CLK_PCI_SIO C502 1
10 SB_TX3N R17 V1 1 2 2@ 100P_0402_25V8K
PCIE_RX3N AD6 R310 @ 100_0402_5%
V2
R305 AD7
2 1 562_0402_1% T25 T2
R306 PCIE_CALRP AD8
+PCIE_VDDR 2 1 2.05K_0402_1% T24 W1
L53 PCIE_CALRN AD9
T9
+SB_PCIEVDD AD10
+1.2V_HT 1 2 P24 R6
BLM18PG121SN1D_0603 PCIE_PVDD AD11
1 1 R7
AD12
P25 R5
C504 C505 PCIE_PVSS AD13
U8
+3VALW 10U_0805_10V4Z 1U_0402_6.3V4Z AD14
C506 U5
2 2 AD15
Y7
AD16
2 1 W8
AD17
V9
5

@ 0.1U_0402_16V4Z U16 AD18

Close to SB AD19
Y8
2 AA8
P

B PLT_RST# AD20
4 PLT_RST# 11,14,25,26,27,32,33 Y4
NB_RST#_R Y AD21
1 Y3
A AD22
G

2 @ NC7SZ08P5X_NL_SC70-5 Y2 PCI_AD23 2
AD23 PCI_AD23 23
AA2 PCI_AD24
PCI_AD24 23
3

AD24 PCI_AD25
AB4 PCI_AD25 23
AD25 PCI_AD26
15 CLK_SBSRC_BCLK N25 AA1 PCI_AD26 23
PCIE_RCLKP/NB_LNK_CLKP AD26 PCI_AD27
15 CLK_SBSRC_BCLK# N24 AB3 PCI_AD27 23
PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD28
2 1 AB2 PCI_AD28 23
R312 33_0402_5% AD28
K23 AC1
NB_DISP_CLKP AD29
K22 AC2
NB_DISP_CLKN AD30
AD1
AD31
M24 W2
NB_HT_CLKP CBE0#
M25 U7

PCI INTERFACE
NB_HT_CLKN CBE1#
AA7
CBE2#
P17 Y1
CPU_HT_CLKP CBE3#
M18 AA6
CPU_HT_CLKN FRAME#
W5
DEVSEL#
M23 AA5
SLT_GFX_CLKP IRDY#
M22 Y5
SLT_GFX_CLKN TRDY#
U6
PAR
J19 W6
GPP_CLK0P STOP#
J18 W4
GPP_CLK0N PERR#
V7 PCI_SERR# 33
SERR#
L20 AC3
GPP_CLK1P REQ0#
L19 AD4
@ R314 20M_0402_5% GPP_CLK1N REQ1#
AB7
REQ2#
1 2 M19 AE6
GPP_CLK2P REQ3#/GPIO70 PAD T15
M20 AB6
GPP_CLK2N REQ4#/GPIO71
C643 AD2
GNT0#
N22 AE4
GPP_CLK3P GNT1#

CLOCK GENERATOR
1 2 SB_32KHI P22 AD5
GPP_CLK3N GNT2#
AC6
18P_0402_50V8J Y3 GNT3#/GPIO72 PAD T16
L18 AE5
1

25M_48M_66M_OSC GNT4#/GPIO73 PAD T17

4 3 AD6
3 R389 OUT NC CLKRUN# 3
V5
20M_0603_5% LOCK#
1 2 J21
IN NC 25M_X1
AD3
32.768KHZ_12.5P_1TJS125BJ4A421P INTE#/GPIO33
C652 AC4
2

INTF#/GPIO34
AE2
SB_32KHO INTG#/GPIO35 PCI_PIRQH# R967
1 2 J20 AE3 2 1 0_0402_5% ACCEL_INT 28
25M_X2 INTH#/GPIO36
18P_0402_50V8J
08/29 new add
G22 R308 1 2 22_0402_5% CLK_PCI_EC
LPCCLK0 CLK_PCI_EC 23,33
Close to SB E22 R309 1 2 22_0402_5% CLK_PCI_TCG
SB_32KHI LPCCLK1 CLK_PCI_TCG 23,32
A3 H24 LPC_AD0 32,33
X1 LAD0
H23 LPC_AD1 32,33 EC & TPM &Debug
LAD1
J25 LPC_AD2 32,33
LAD2
J24 LPC_AD3 32,33
LAD3
RTC XTAL

LPC

SB_32KHO B3 H25
X2 LFRAME# LPC_FRAME# 32,33
H22
LDRQ0#
AB8 LPC_DRQ1# 32
LDRQ1#/GNT5#/GPIO68
AD7
H_PROCHOT# BMREQ#/REQ5#/GPIO65
+3VS 2 1 V15 SIRQ 32,33
R319 10K_0402_5% SERIRQ
CPU_LDT_REQ# F23
6,11 CPU_LDT_REQ# ALLOW_LDTSTP
H_PROCHOT# F24 C3 RTC_CLK 23 STRAP PIN
6 H_PROCHOT# PROCHOT# RTCCLK
H_PWRGD F22 C2
6 H_PWRGD LDT_PG INTRUDER_ALERT# +3VL
G25 B2
CPU

6,11 LDT_STOP# LDT_STP# VBAT +SB_VBAT +SB_VBAT

G24 +RTCVCC
6 LDT_RST# LDT_RST# +RTCBATT
RTC

R316 R317 D42

120_0402_5% 120_0402_5% 2
1 2 1 2 1 R876 JBATT1
218S7EALA11FG_BGA528_SB700 1 1 3 1 2 W=20mils 1
W=20mils 1
W=20mils 2

2
C509 C510 DAN202U_SC70 1K_0402_5% 2
3
4 J1 GND 4
4

2
2 2 @ JUMP_43X39 GND
1U_0402_6.3V4Z ACES_85205-02001

1
CONN@
0.1U_0402_16V4Z

1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB700-PCIE/PCI/ACPI/LPC/RTC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 19 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com +3VALW

2
R561
10K_0402_5%

1
PCIE_WAKE#
25,26 LAN_PCIE_WAKE# U15D
1 2 C617 1 2@ 100P_0402_25V8K
25,26 MINI_PCIE_WAKE# R311 @ 100_0402_5%
SB700 Part 4 of 5
1 E1 1
PCI_PME#/GEVENT4#
E2 C8 CLK_48M_USB 15
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC
demo circuit LID use RI# H7
SLP_S2/GPM9# USB_RCOMP 1
33 SLP_S3# F5 G8 2
SLP_S3# USB_RCOMP 11.8K_0402_1% R323
33 SLP_S5# G1
SLP_S5#
H2

USB MISC
33 PWRBTN_OUT# PWR_BTN#
H1

ACPI / WAKE UP EVENTS

6,33,43 SB_PWRGD PWR_GOOD
1 2 SUS_STAT# SUS_STAT# K3
+3VS 11 SUS_STAT# SUS_STAT#
R388 4.7K_0402_5% SB_TEST2 H5 E6
SB_TEST1 TEST2 USB_FSD13P
H4 E7
SB_TEST0 TEST1 USB_FSD13N
SB700 has internal PD H3
TEST0 USB10_P12
Y15 F7 Touch Screen

USB 1.1
SB_TEST2 33 GATEA20 GA20IN/GEVENT0# USB_FSD12P USB10_N12 USB10_P12 31
+3VALW 1 2 33 KB_RST# W15 E8 USB10_N12 31
R320 @ 2.2K_0402_5% KBRST#/GEVENT1# USB_FSD12N
33 EC_SCI# K4
SB_TEST1 LPC_PME#/GEVENT3# USB20_P11
1 2 33 EC_SMI# K24 H11 USB20_P11 26
R321 @ 2.2K_0402_5% LPC_SMI#/EXTEVNT1# USB_HSD11P USB20_N11
F1 J10 USB20_N11 26 USB-11 New Card
SB_TEST0 S3_STATE/GEVENT5# USB_HSD11N
1 2 J2
R322 @ 2.2K_0402_5% PCIE_WAKE# SYS_RESET#/GPM7# USB20_P10
H6 E11 USB20_P10 26
WAKE#/GEVENT8# USB_HSD10P USB20_N10
F2 F11 USB20_N10 26 USB-10 MiniCard(TV tuner)
H_THERMTRIP# BLINK/GPM6# USB_HSD10N
6,33 H_THERMTRIP# J6
SMBALERT#/THRMTRIP#/GEVENT2#
11 NB_PWRGD 2 1 W14 A11
0_0402_5% R381 NB_PWRGD USB_HSD9P
B11 USB-9 Card Reader(delete)
USB_HSD9N
1 2 EC_RSMRST# R386 2 1 D3
R327 2.2K_0402_5% @ 100_0402_5% RSMRST# USB20_P8
C10 USB20_P8 26
USB_HSD8P USB20_N8
For SB700 A11 divider to USB_HSD8N
D10 USB20_N8 26 USB-8 WLAN
1.8V for RS & RX780 AE18
SATA_IS0#/GPIO10 USB_HSD7P
G11 USB20_P7
USB20_P7 31
AD18 H12 USB20_N7 USB-7 Fingerprint
EC_RSMRST# CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USB20_N7 31
33 EC_RSMRST# AA19
SMARTVOLT1/SATA_IS2#/GPIO4 USB20_P6
W17 E12 USB20_P6 31
CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P USB20_N6
V17 E14 USB20_N6 31 USB-6 Bluetooth
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
W20
2 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 USB20_P5 2
29 SB_SPKR W21 C12 USB20_P5 17
SPKR/GPIO2 USB_HSD5P

USB 2.0
SMB_CK_CLK0 AA18 D12 USB20_N5
8,9,15,28 SMB_CK_CLK0
SMB_CK_DAT0 SCL0/GPOC0# USB_HSD5N USB20_N5 17 USB-5 USB Camera
8,9,15,28 SMB_CK_DAT0 W18
+3VS SMB_CK_CLK1 SDA0/GPOC1# USB20_P4
26 SMB_CK_CLK1 K1 B12 USB20_P4 31
SMB_CK_DAT1 SCL1/GPOC2# USB_HSD4P USB20_N4
26 SMB_CK_DAT1 K2 A12 USB20_N4 31 USB-4 Left side
SDA1/GPOC3# USB_HSD4N
AA20
R328 SMB_CK_CLK0 DDC1_SCL/GPIO9 USB20_P3
2 2.2K_0402_5%

GPIO
1 Y18 G12 USB20_P3 35
DDC1_SDA/GPIO8 USB_HSD3P USB20_N3
C1 G14 USB20_N3 35 USB-3 Dock
R329 SMB_CK_DAT0 LLB#/GPIO66 USB_HSD3N
1 2 2.2K_0402_5% Y19
SMARTVOLT2/SHUTDOWN#/GPIO5 USB20_P2
G5 H14 USB20_P2 31
+3VALW DDR3_RST#/GEVENT7# USB_HSD2P USB20_N2
H15 USB20_N2 31 USB-2 Left Side
USB_HSD2N
A13 USB20_P1
USB_HSD1P USB20_P1 31
B13 USB20_N1
R331 SMB_CK_CLK1 USB_HSD1N USB20_N1 31 USB-1 Right side
1 2 2.2K_0402_5%
B14 USB20_P0
USB_HSD0P USB20_P0 31
R332 1 2 2.2K_0402_5% SMB_CK_DAT1 B9 A14 USB20_N0 USB-0 Right side
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USB20_N0 31
B8
USB_OC5#/IR_TX0/GPM5#
A8 A18
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8

USB OC
33 EC_LID_OUT# A9 B18
USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
26 EXP_CPPE# E5 F21
USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10
PAD T46 F8 D21
R333 33_0402_5% USB_OC1#/GPM1# SCL2/IMC_GPIO11
29 HDA_BITCLK_CODEC 1 2 PAD T45 E4 F19
R334 33_0402_5% HDA_BITCLK USB_OC0#/GPM0# SDA2/IMC_GPIO12
34 HDA_BITCLK_MDC 1 2 E20
R335 33_0402_5% SCL3_LV/IMC_GPIO13
34 HDA_SDOUT_MDC 1 2 M1 E21
R336 33_0402_5% HDA_SDOUT AZ_BITCLK SDA3_LV/IMC_GPIO14
29 HDA_SDOUT_CODEC 1 2 M2 E19
HDA_SDIN0 AZ_SDOUT IMC_PWM1/IMC_GPIO15
29 HDA_SDIN0 J7 D19 GPIO16 23 STRAP PIN
HDA_SDIN1 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16
34 HDA_SDIN1 J8 E18 GPIO17 23 STRAP PIN
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17
L8
AZ_SDIN2/GPIO44

HD AUDIO
M3 G20
R337 33_0402_5% HDA_SYNC AZ_SDIN3/GPIO46 IMC_GPIO18
34 HDA_SYNC_MDC 1 2 L6 G21
R338 33_0402_5% AZ_SYNC IMC_GPIO19
29 HDA_SYNC_CODEC 1 2 M4 D25
3 AZ_RST# IMC_GPIO20 3
L5 D24
R339 33_0402_5% HDARST# AZ_DOCK_RST#/GPM8# IMC_GPIO21
29 HDA_RST#_CODEC 1 2 C25
IMC_GPIO22

INTEGRATED uC
R340 33_0402_5% 1 2 C24
34 HDA_RST#_MDC IMC_GPIO23
PAD T41 B25
IMC_GPIO24
C23
IMC_GPIO25
STRAP PIN 23,33 HDARST#
B24
IMC_GPIO26
B23
IMC_GPIO27
A23
IMC_GPIO28
C22
IMC_GPIO29
A22
IMC_GPIO30
B22
IMC_GPIO31
B21
IMC_GPIO32
A21
IMC_GPIO33
H19 D20
IMC_GPIO0 IMC_GPIO34
H20 C20
IMC_GPIO1 IMC_GPIO35
H21 A20
SPI_CS2#/IMC_GPIO2 IMC_GPIO36
INTEGRATED uC

F25 B20
IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37
B19
IMC_GPIO38
D22 A19
IMC_GPIO4 IMC_GPIO39
E24 D18
IMC_GPIO5 IMC_GPIO40
E25 C18
IMC_GPIO6 IMC_GPIO41
D23
IMC_GPIO7

218S7EALA11FG_BGA528_SB700

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB700 USB/AC97
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 20 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com

U15B
1 1

C512 1 2 0.01U_0402_25V7K SATA_STX_DRX_P0 AD9

SB700 AA24
24 SATA_TXP0 SATA_TX0P IDE_IORDY
C513 1 2 0.01U_0402_25V7K SATA_STX_DRX_N0 AE9 Part 2 of 5 AA25
24 SATA_TXN0 SATA_TX0N IDE_IRQ
Y22
IDE_A0
24 SATA_RXN0_C AB10 AB23
SATA_RX0N IDE_A1
24 SATA_RXP0_C AC10 Y23
SATA_RX0P IDE_A2
IDE_DACK#
AB24 Local Frame Buffer Strapping List
C514 1 2 0.01U_0402_25V7K SATA_STX_DRX_P1 AE10 AD25 Copy from Becks.
24 SATA_TXP1 SATA_TX1P IDE_DRQ
C515 1 2 0.01U_0402_25V7K SATA_STX_DRX_N1 AD10 AC25
24 SATA_TXN1 SATA_TX1N IDE_IOR#
AC24
IDE_IOW#
24 SATA_RXN1_C AD11
AE11
SATA_RX1N IDE_CS1#
Y25
Y24
LFB_ID2 LFB_ID1 LFB_ID0
24 SATA_RXP1_C SATA_RX1P IDE_CS3#
C520 1 2 0.01U_0402_25V7K SATA_STX_DRX_P5 AB12 AD24
31 SATA_TXP5 SATA_STX_DRX_N5 AC12 SATA_TX2P IDE_D0/GPIO15
C521 1 2 0.01U_0402_25V7K AD23 Hynix32M*16
31 SATA_TXN5 SATA_TX2N IDE_D1/GPIO16
AE22 1 1 0

ATA 66/100/133
IDE_D2/GPIO17
31 SATA_RXN5_C AE12 AC22
SATA_RX2N IDE_D3/GPIO18
31 SATA_RXP5_C AD12 AD21
SATA_RX2P IDE_D4/GPIO19
C518 1 2 0.01U_0402_25V7K SATA_STX_DRX_P4 AD13 IDE_D5/GPIO20
AE20
AB20
Samsung32M*16 1 0 1
24 SATA_TXP4 SATA_TX3P IDE_D6/GPIO21
C519 1 2 0.01U_0402_25V7K SATA_STX_DRX_N4 AE13 AD19
24 SATA_TXN4 SATA_TX3N IDE_D7/GPIO22
AE19
IDE_D8/GPIO23

SERIAL ATA
24 SATA_RXN4_C AB14 AC20
SATA_RX3N IDE_D9/GPIO24
24 SATA_RXP4_C AC14 AD20
SATA_RX3P IDE_D10/GPIO25
AE21
T24 PAD IDE_D11/GPIO26
AE14 AB22
T25 PAD SATA_TX4P IDE_D12/GPIO27
AD14 AD22
SATA_TX4N IDE_D13/GPIO28
AE23
T26 PAD AD15
IDE_D14/GPIO29
AC23
LFB_ID0 to LFB_ID2 got internal PU 10K to S5.
T27 PAD SATA_RX4N IDE_D15/GPIO30
AE15
SATA_RX4P LFB_ID2 R344 1 2@ 1K_0402_5%
2 T18 PAD AB16 2
T19 PAD SATA_TX5P LFB_ID1 R367 1
AC16 2@ 1K_0402_5%
SATA_TX5N
G6
T20 PAD SPI_DI/GPIO12 LFB_ID0 R345 1
AE16 D2 2@ 1K_0402_5%
T23 PAD SATA_RX5N SPI_DO/GPIO11
AD16 D1
SATA_RX5P SPI_CLK/GPIO47
F4
SPI_HOLD#/GPIO31

SPI ROM
2 1 SATA_CAL V12 F3
R342 1K_0402_1% SATA_CAL SPI_CS1#/GPIO32
SATA_X1 Y12 U15
SATA_X1 LAN_RST#/GPIO13
J1
SATA_X2 ROM_RST#/GPIO14
AA12
SATA_X2
+3VS R343 1 2 10K_0402_5%
FANOUT0/GPIO3
M8
34 SATA_LED# W11 M5
+1.2V_HT SATA_ACT#/GPIO67 FANOUT1/GPIO48
M7
L54 FANOUT2/GPIO49
2 1 +PLLVDD_SATA AA11 P5 T31 PAD
BLM18PG121SN1D_0603 PLLVDD_SATA FANIN0/GPIO50
P8 GSENSOR_LED# 34
FANIN1/GPIO51
2 2 W12 R8

SATA PWR
XTLVDD_SATA FANIN2/GPIO52 SB_INT_FLASH_SEL 32
C522 C523 C6
1U_0402_6.3V4Z TEMP_COMM
1U_0402_6.3V4Z B6 XMIT_OFF# 26
1 1 TEMPIN0/GPIO61
A6 BT_COMBO_EN# 26
TEMPIN1/GPIO62
A5
TEMPIN2/GPIO63
B5 EC_THERM# 33
TEMPIN3/TALERT#/GPIO64 CH751H-40PT_SOD323-2

HW MONITOR
+3VS A4 2 1
VIN0/GPIO53 AC_IN 33,38,39
L55 B4
VIN1/GPIO54 BT_OFF 31 D41
2 1 +XTLVDD_SATA C4
VIN2/GPIO55 CAM_SHDN# 17
BLM18PG121SN1D_0603 2 D4 1 2 +3VALW
VIN3/GPIO56 LFB_ID0
D5
C524 VIN4/GPIO57 LFB_ID1 R562 10K_0402_5%
D6
1U_0402_6.3V4Z VIN5/GPIO58 LFB_ID2
A7
3 1 VIN6/GPIO59 3
B7
VIN7/GPIO60
+3VALW
L56
F6 +SB_AVDD 2 1
AVDD BLM18PG121SN1D_0603
1 1
10P_0402_50V8J 2 1 C516 SATA_X1 G7
AVSS C526
1

2.2U_0603_6.3V4Z
Y4 R341 2 2
218S7EALA11FG_BGA528_SB700
25MHZ_20P C525
10M_0402_5% 0.1U_0402_16V4Z
2

10P_0402_50V8J 2 1 C517 SATA_X2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB700 SATA/IDE/SPI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 21 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
U15C U15E
1 2 +1.2VALW
R592 @ 0_0805_5%
SB700 L15 +1.2V_HT_R
+3VS L9
M9
VDDQ_1
Part 3 of 5
VDD_1
M12
1
R593
2
0_0805_5%
+1.2V_HT SB700 A2
VDDQ_2 VDD_2 VSS_1

+
2 1 T15 M14 1 2 A25
C528 22U_A_4VM VDDQ_3 VDD_3 22U_A_4VM C529 VSS_2
U9 N13 B1
VDDQ_4 VDD_4 VSS_3

CORE S0
1 C531 1 2 1U_0402_6.3V4Z U16 P12 1U_0402_6.3V4Z 2 1 C532 D7 1
C530 1U_0402_6.3V4Z VDDQ_5 VDD_5 1U_0402_6.3V4Z C534 VSS_4
1 2 U17 P14 2 1 T10 F20
C533 1U_0402_6.3V4Z VDDQ_6 VDD_6 1U_0402_6.3V4Z C538 AVSS_SATA_1 VSS_5
1 2 V8 R11 2 1 U10 G19

PCI/GPIO I/O
C536 1U_0402_6.3V4Z VDDQ_7 VDD_7 1U_0402_6.3V4Z C537 AVSS_SATA_2 VSS_6
1 2 W7 R15 2 1 U11 H8
C535 1U_0402_6.3V4Z VDDQ_8 VDD_8 0.1U_0402_16V4Z C527 AVSS_SATA_3 VSS_7
1 2 Y6 T16 2 1 U12 K9
C539 1U_0402_6.3V4Z VDDQ_9 VDD_9 0.1U_0402_16V4Z C540 AVSS_SATA_4 VSS_8
1 2 AA4 2 1 V11 K11
C541 0.1U_0402_16V4Z VDDQ_10 AVSS_SATA_5 VSS_9
1 2 AB5 V14 K16
C542 0.1U_0402_16V4Z VDDQ_11 AVSS_SATA_6 VSS_10
1 2 AB21 W9 L4
VDDQ_12 AVSS_SATA_7 VSS_11
Y9 L7
AVSS_SATA_8 VSS_12
Y11 L10
AVSS_SATA_9 VSS_13
No IDE device unmount CAP Y14
AVSS_SATA_10 VSS_14
L11
L60 Y17 L12
+1.2V_CKVDD AVSS_SATA_11 VSS_15
+3VS Y20 L21 2 1 +1.2V_HT AA9 L14
VDD33_18_1 CKVDD_1.2V_1 BLM18PG121SN1D_0603 AVSS_SATA_12 VSS_16
AA21 L22 AB9 L16
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_13 VSS_17

+
2 1 AA22 L24 AB11 M6
C543 @ 22U_A_4VM VDD33_18_3 CKVDD_1.2V_3 C546 1U_0402_6.3V4Z AVSS_SATA_14 VSS_18

IDE/FLSH I/O

CLKGEN I/O
AE25 L25 1 2 AB13 M10
C544 VDD33_18_4 CKVDD_1.2V_4 AVSS_SATA_15 VSS_19
1 2 @ 1U_0402_6.3V4Z C545 1 2 1U_0402_6.3V4Z AB15 M11
C547 AVSS_SATA_16 VSS_20
1 2 @ 1U_0402_6.3V4Z C548 2 1 0.1U_0402_16V4Z AB17 M13
C549 AVSS_SATA_17 VSS_21
1 2 @ 1U_0402_6.3V4Z C551 2 1 0.1U_0402_16V4Z AC8 M15
C550 10U_0805_10V4Z AVSS_SATA_18 VSS_22
1 2 AD8 N4
AVSS_SATA_19 VSS_23
AE8 N12
AVSS_SATA_20 VSS_24
N14
+PCIE_VDDR VSS_25
P6
L61 POWER VSS_26
VSS_27
P9
+1.2V_HT 2 1 P10
FBMA-L11-201209-221LMA30T_0805 VSS_28
A15 P11
AVSS_USB_1 VSS_29
P18 B15 P13
PCIE_VDDR_1 +3VALW AVSS_USB_2 VSS_30
+

2 1 P19 C14 P15

C552 22U_A_4VM PCIE_VDDR_2 AVSS_USB_3 VSS_31
P20 D8 R1
C553 PCIE_VDDR_3 +S5_3V AVSS_USB_4 VSS_32
1 2 1U_0402_6.3V4Z P21 A17 1 2 D9 R2
PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_5 VSS_33

A-LINK I/O
C555 1 2 1U_0402_6.3V4Z R22 A24 R564 0_0805_5% D11 R4
C554 PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_6 VSS_34
2 1U_0402_6.3V4Z

+
1 R24 B17 1 2 D13 R9
2 PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_7 VSS_35 2

GROUND
C558 1 2 1U_0402_6.3V4Z R25 J4 22U_A_4VM C556 D14 R10
C557 PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_8 VSS_36
1 2 0.1U_0402_16V4Z J5 1U_0402_6.3V4Z 2 1 C559 D15 R12

3.3V_S5 I/O
C560 S5_3.3V_5 AVSS_USB_9 VSS_37
1 2 0.1U_0402_16V4Z L1 1U_0402_6.3V4Z 2 1 C561 E15 R14
S5_3.3V_6 1U_0402_6.3V4Z C562 AVSS_USB_10 VSS_38
L2 2 1 F12 T11
+1.2V_SATA S5_3.3V_7 0.1U_0402_16V4Z C563 AVSS_USB_11 VSS_39
2 1 F14 T12
L63 0.1U_0402_16V4Z C564 AVSS_USB_12 VSS_40
2 1 G9 T14
0.1U_0402_16V4Z C565 AVSS_USB_13 VSS_41
+1.2V_HT 2 1 AA14 2 1 H9 U4
FBMA-L11-201209-221LMA30T_0805 AVDD_SATA_1 +1.2VALW AVSS_USB_14 VSS_42
AB18 H17 U14
AVDD_SATA_4 AVSS_USB_15 VSS_43
AA15 J9 V6
AVDD_SATA_2 AVSS_USB_16 VSS_44
+

2 1 AA17 G2 +S5_1.2V L64 0_0603_5% J11 Y21

AVDD_SATA_3 S5_1.2V_1 AVSS_USB_17 VSS_45

CORE S5
C566 22U_A_4VM

SATA I/O
AC18 G4 J12 AB1
C567 AVDD_SATA_5 S5_1.2V_2 +1.2VALW AVSS_USB_18 VSS_46
1 2 1U_0402_6.3V4Z AD17 1U_0402_6.3V4Z 2 1 C569 J14 AB19
C568 AVDD_SATA_6 AVSS_USB_19 VSS_47
1 2 1U_0402_6.3V4Z AE17 1U_0402_6.3V4Z 2 1 C570 J15 AB25
C571 AVDD_SATA_7 +1.2_USB AVSS_USB_20 VSS_48
1 2 0.1U_0402_16V4Z L65 0_0603_5% K10 AE1
C572 AVSS_USB_21 VSS_49
1 2 0.1U_0402_16V4Z A10 K12 AE24
USB_PHY_1.2V_1 AVSS_USB_22 VSS_50

+
B10 1 2 K14
USB_PHY_1.2V_2 22U_A_4VM C573 AVSS_USB_23
K15
1U_0402_6.3V4Z 2 C574 AVSS_USB_24
1 P23
1U_0402_6.3V4Z 2 C575 PCIE_CK_VSS_9
1 R16
PCIE_CK_VSS_10
R19
+AVDD_USB PCIE_CK_VSS_11
T17
L66 PCIE_CK_VSS_12
U18
+V5_VREF 1K_0402_5% 2 PCIE_CK_VSS_13
+3VALW 2 1 A16 AE7 1 R346 +5VS H18 U20
FBMA-L11-201209-221LMA30T_0805 AVDDTX_0 V5_VREF D14 PCIE_CK_VSS_1 PCIE_CK_VSS_14
B16 2 2 J17 V18
AVDDTX_1 +AVDDCK_3.3V PCIE_CK_VSS_2 PCIE_CK_VSS_15
C16 J16 1 2 +3VS J22 V20
C576 10U_0805_10V4Z AVDDTX_2 AVDDCK_3.3V C578 C579 PCIE_CK_VSS_3 PCIE_CK_VSS_16
1 2 D16 K25 V21
C577 10U_0805_10V4Z AVDDTX_3 +AVDDCK_1.2V 0.1U_0402_16V4Z 1U_0603_10V4Z CH751H-40PT_SOD323-2 PCIE_CK_VSS_4 PCIE_CK_VSS_17
1 2 D17 K17 M16 W19
PLL

C580 1U_0402_6.3V4Z AVDDTX_4 AVDDCK_1.2V 1 1 PCIE_CK_VSS_5 PCIE_CK_VSS_18

1 2 E17 M17 W22
C581 1U_0402_6.3V4Z AVDDTX_5 +AVDDC PCIE_CK_VSS_6 PCIE_CK_VSS_19
1 2 F15 E9 M21 W24
USB I/O

C583 0.1U_0402_16V4Z AVDDRX_0 AVDDC PCIE_CK_VSS_7 PCIE_CK_VSS_20

1 2 F17 P16 W25
C582 0.1U_0402_16V4Z AVDDRX_1 L67 PCIE_CK_VSS_8 PCIE_CK_VSS_21
1 2 F18
C584 0.1U_0402_16V4Z AVDDRX_2
1 2 G15 2 1 +3VALW F9 L17
3 AVDDRX_3 BLM18PG121SN1D_0603 AVSSC AVSSCK 3
G17
AVDDRX_4
Part 5 of 5
G18
AVDDRX_5 2.2U_0603_6.3V4Z C585 218S7EALA11FG_BGA528_SB700
2 1

0.1U_0402_16V4Z 2 1 C586
218S7EALA11FG_BGA528_SB700

L68
+AVDDCK_1.2V 2 1 +1.2V_HT
BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z 2 1 C587

0.1U_0402_16V4Z 2 1 C588

L69
+AVDDCK_3.3V 2 1 +3VS
BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z 2 1 C589

0.1U_0402_16V4Z 2 1 C590

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 22 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 RTC_CLK AZ_RST_CD# GP17 GP16

PULL BOOTFAIL USE RESERVED RESERVED ENABLE PCI CLKGEN INTERNAL EC Internal pull up
HIGH TIMER DEBUG MEM BOOT ENABLED RTC ENABLED
H,H = Reserved
ENABLED STRAPS
1 DEFAULT 1
H,L = SPI ROM
EXT. RTC
PULL BOOTFAIL IGNORE DISABLE PCI CLKGEN (PD on X1, EC
LOW TIMER DEBUG MEM BOOT DISABLED apply DISABLED L,H = LPC ROM (Default)
DISABLED STRAPS 32KHz to DEFAULT L,L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)

+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW

1
10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
R347

R348

R349

R350

R351

R352

R353

R354

R355

R356
2

2
@

@
@ @ @ @ @ @ @
19 PCICLK2
19,32 CLK_PCI_SIO
SI: mount 10K
19 PCI_CLK4
19 PCI_CLK5
19,33 CLK_PCI_EC
19,32 CLK_PCI_TCG
19 RTC_CLK
20,33 HDARST#
2 20 GPIO17 2
20 GPIO16

1
10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
R363

R365

R366
R357

R358

R359

R360

R361

R362

R364
2

2
@ @ @ @

DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
3 DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT 3

PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM

LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK

19 PCI_AD28
19 PCI_AD27
19 PCI_AD26
19 PCI_AD25
19 PCI_AD24
19 PCI_AD23
1

1
2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
R373

R374

R375

R376

R377

R378
2

2
@ @ @ @ @ @

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB700 STRAPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 23 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
HDD Connector
JP9
+5VS
1
GND SATA_TXP0
2 SATA_TXP0 21
A+

10U_0805_10V4Z
SATA_TXN0

0.1U_0402_16V4Z
3 SATA_TXN0 21
A- 0.01U_0402_16V7K
1 1 1 1 4
1 C593 GND 1

C595
5 SATA_RXN0 2 1 C592 SATA_RXN0_C
B- SATA_RXP0 SATA_RXN0_C 21
C594 C591 6 2 1 C596 SATA_RXP0_C SATA_RXP0_C 21
B+ 0.01U_0402_16V7K
7
2 2 2 2 GND
0.1U_0402_16V4Z 0.1U_0402_16V4Z Near CONN side.
8 +3VS
V33
9
V33
Pleace near HD CONN (JP23) V33
10
11
GND
12
GND
13
GND
14
V5 +5VS
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12
21
V12
22
V12

SUYIN_127072FR022G210ZR_RV
CONN@

DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA

SUYIN_127043FR022G204ZL_22P_NR

2
2nd HDD Connector-option 2

JP10
+5VS
1
GND SATA_TXP1
2 SATA_TXP1 21
A+
10U_0805_10V4Z

SATA_TXN1
0.1U_0402_16V4Z

3 SATA_TXN1 21
A- 0.01U_0402_16V7K
1 1 1 1 4
GND
C601

C604

5 SATA_RXN1 2 1 C605 SATA_RXN1_C

B- SATA_RXP1 SATA_RXN1_C 21
C602 C603 6 2 1 C606 SATA_RXP1_C SATA_RXP1_C 21
B+ 0.01U_0402_16V7K
7
2 2 2 2 GND
0.1U_0402_16V4Z 0.1U_0402_16V4Z Near CONN side.
8 +3VS
V33
9
V33
Pleace near HD CONN (JP23) V33
10
11
GND
12
GND
13
GND
14
V5 +5VS
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12
21
V12
22
V12

SUYIN_127072FR022G210ZR_RV
CONN@
3 3
DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA
SUYIN_127043FR022G204ZL_22P_NR

CD-ROM Connector
+5VS JP11

Placea caps. near ODD CONN. GND

1
2 SATA_TXP4
A+ SATA_TXN4 SATA_TXP4 21
3 SATA_TXN4 21
A- 0.01U_0402_16V7K
4
GND SATA_RXN4
5 2 1 C612 SATA_RXN4_C SATA_RXN4_C 21
B- SATA_RXP4
6 2 1 C611 SATA_RXP4_C SATA_RXP4_C 21
B+
0.1U_0402_16V4Z

1U_0603_10V4Z

10U_0805_10V4Z

7 0.01U_0402_16V7K
GND
1 1 1 1
Near CONN side.
C613

C614

C615

C616 8
10U_0805_10V4Z DP
9
2 2 2 2 V5
10 +5VS
V5
11
MD
12
GND
13
GND

4 SUYIN_127382FR013G509ZR 4
CONN@

SI: Update ODD footprint to fix pin reverse issue

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/CDROM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 24 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

1 2

WWW.AliSaler.Com
+3V_LAN
R382 3.6K_0402_5%

U17
LAN_DO 4 5 2
LAN_DI DO GND C618
3 6
LAN_SK_LAN_LINK# DI NC
2 7
LAN_CS SK NC
1 8 +3V_LAN
CS VCC 1
0.1U_0402_16V4Z
AT93C46-10SI-2.7_SO8

2 1
R712 10K_0402_5%
1 1

Place Close to Chip U18

C485 2 0.1U_0402_16V7K
1 PCIE_PTX_IRX_P3 20 33 LAN_DO
10 PCIE_PTX_C_IRX_P3 HSOP LED3/EEDO
34 LAN_DI
C488 2 0.1U_0402_16V7K PCIE_PTX_IRX_N3 LED2/EEDI/AUX LAN_SK_LAN_LINK# +LAN_VDD12
10 PCIE_PTX_C_IRX_N3 1 21 35 Close to Pin48 Close to Pin10,13,30,36
HSON LED1/EESK LAN_CS
32
EECS
10 PCIE_ITX_C_PRX_P3 15
HSIP LAN_ACTIVITY#
38
LED0
10 PCIE_ITX_C_PRX_N3 16 2 2 2 2
HSIN LAN_MDI0+ VCTRL12 0.1U_0402_16V4Z C637 C638 C639 C640
RTL8102EL MDIP0
2
17 3 LAN_MDI0-
15 CLK_PCIE_LAN REFCLK_P MDIN0 LAN_MDI1+
18 5 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
15 CLK_PCIE_LAN# REFCLK_M MDIP1 1 1 1 1
6 LAN_MDI1- C641
MDIN1 C642
15 CLKREQ_LAN 25 8
CLKREQB NC
9
NC 2 1
11,14,19,26,27,32,33 PLT_RST# 27 11
PERSTB NC @ 10U_0805_10V4Z
12
NC
R408 1 2 2.49K_0402_1% 46 4
RSET NC
26 48 VCTRL12
20,26 LAN_PCIE_WAKE# ISOLATEB LANWAKEB VCTRL12A
28
ISOLATEB
19 +EVDD12
+3VS LAN_X1 VDDTX
41 30 +LAN_VDD12
LAN_X2 CKXTAL1 DVDD12
42 36
CKXTAL2 DVDD12
13
1

DVDD12
10
R384 DVDD12
2 1K_0402_1% 39 2
NC
23 44
2

ISOLATEB NC NC
24 45 +LAN_VDD12 Close to Pin19
NC VCTRL12D
7 29 +EVDD12
GND VDD33 +3V_LAN
14 37
R401 GND VDD33
31
15K_0402_5% GND
47 1
GND AVDD33
40
NC
22 43 2 2
GNDTX NC C636
C644
RTL8102EL-GR_LQFP48_7X7 1U_0402_6.3V4Z 0.1U_0402_16V4Z
1 1
Close to Pin1,37,29
Close to Pin45 +3V_LAN

+LAN_VDD12
2 2 2
C620 C621 C622

2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

1 1 1
C650 C645
0.1U_0402_16V4Z @ 10U_0805_10V4Z
1 2

3 3

1
PJP6
2
LAN Conn.
+3VALW JP12
PAD-OPEN 4x4m 13
+3V_LAN Yellow LED+
40 mils LAN_ACTIVITY# R391 2 1 300_0402_5% 14
Yellow LED-
S

3 1 +3V_LAN 1 16
SHLD1
8
2

C656 PR4-
2 9
R713 @68P_0402_50V8K DETECT PIN1
G

7
2

C707 Q61 2 PR4+

100K_0402_5%
SI2301BDS-T1-E3_SOT23-3 RJ45_MIDI1- 6
1 PR2-
1

33 LANPWR 1 2 5
Y1 R715 10K_0402_5% 0.1U_0402_16V4Z PR3-
LAN_X1 2 1LAN_X2 4
PR3+
25MHZ_20P RJ45_MIDI1+ 3
PR2+
1 1
C255 C254 RJ45_MIDI0- 2
PR1-
10
27P_0402_50V8J 27P_0402_50V8J RJ45_MIDI0+ DETCET PIN2
2 1
2 2 PR1+
15
C657 SHLD1
11
@68P_0402_50V8K +3V_LAN Green LED+
LAN_SK_LAN_LINK# 1 R395 2 1 300_0402_5% 12
Green LED-
U19 CONN@ FOX_JM36113-P1122-7F
LANGND
LAN_MDI0+ 1 16 RJ45_MIDI0+ 1 1
4 TD+ TX+ RJ45_MIDI0+ 35 4
LAN_MDI0- 2 15 RJ45_MIDI0- C661 C662
TD- TX- RJ45_MIDI0- 35
2 1 3 14 R394
C659 0.01U_0402_16V7K CT CT C600
4 13 2 1 0.01U_0603_100V4Z 1 2 75_0402_1% 0.1U_0402_16V4Z 4.7U_0805_10V4Z
NC NC C610 RJ45_GND 1 2 2
5 12 2 1 0.01U_0603_100V4Z 1 2 75_0402_1% 2
NC NC R396 C658 1000P_1808_3KV7K
2 1 6 11
C660 0.01U_0402_16V7K LAN_MDI1+ CT CT RJ45_MIDI1+
7 10 RJ45_MIDI1+ 35
LAN_MDI1- RD+ RX+ RJ45_MIDI1-
8 9 RJ45_MIDI1- 35
RD- RX-
Security Classification Compal Secret Data Compal Electronics, Inc.
NS681680 Issued Date 2007/08/02 2008/08/02 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTL8111C/8102E 10/100/1000 LAN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 25 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com Mini Card---TV tuner

+1.5VS_TV
+3VS_TV +3VALW
0.01U_0402_16V7K 4.7U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 1 1 1
1 1 C667 C668 C669 C670
C665 C666
2 2 2 2
2 2
4.7U_0805_10V4Z 0.1U_0402_16V4Z
1 1

New Card
@

SI: Exchange TV & WLAN CONN@

minicard location JP14
1 2 +3VS_TV
+1.5VS 1 2
3 4
C681 U21 3 4
5 6 +1.5VS_TV
5 6
2 1 0.1U_0402_16V4Z 12 11 +1.5VS_PEC 15 CLKREQ_MCARD1# 7 8
1.5Vin 1.5Vout 7 8
14 13 9 10
+3VS 1.5Vin 1.5Vout 9 10
15 CLK_PCIE_MCARD1# 11 12
C679 11 12
15 CLK_PCIE_MCARD1 13 14
13 14
2 1 0.1U_0402_16V4Z 2 3 +3VS_PEC 15 16
3.3Vin 3.3Vout 15 16
4 5 17 18
3.3Vin 3.3Vout 17 18
2 1 0.1U_0402_16V4Z 19 20
C680 19 20 PLT_RST#
+3VALW 17 15 +3V_PEC 21 22
AUX_IN AUX_OUT 21 22
10 PCIE_PTX_C_IRX_N5 23 24 +3VALW
PLT_RST# 23 24
11,14,19,25,27,32,33 PLT_RST# 6 19 10 PCIE_PTX_C_IRX_P5 25 26
SYSRST# OC# 25 26
27 28 +1.5VS_TV
PERST# 27 28 SMB_CK_CLK1
33,34,36,40 SYSON 20 8 29 30
SHDN# PERST# 29 30 SMB_CK_DAT1
10 PCIE_ITX_C_PRX_N5 31 32
31 32
29,33,36,38,41 SUSP# 1 16 33 34
STBY# NC 10 PCIE_ITX_C_PRX_P5 33 34
35 36 USB20_N10 20
35 36
+3VALW 2 1@ 100K_0402_5% 10 7 37 38 USB20_P10 20
R412 CPPE# GND 37 38
+3VS_TV 39 40
39 40
20 EXP_CPPE# 9 41 42
CPUSB# 41 42
21 43 44
THERMAL_PAD 43 44
18 45 46
Power Switch internal pull high RCLKEN
47
45 46
48 +1.5VS_TV
47 48
R5538D001-TR-F_QFN20_4X4~D 49 50
49 50
51 52 +3VS_TV
2 51 52 2
USE TI TPS2231MRGPR 53 54
GND1 GND2
MOLEX 67910-0002 52P

+1.5VS R406 1 2 0_1206_5% +1.5VS_TV

+3VS R407 1 2 0_1206_5% +3VS_TV

Mini-Express Card---WLAN
+3VS_WLAN +1.5VS_WLAN +3VALW

0.01U_0402_16V7K 4.7U_0805_10V4Z 0.01U_0402_16V7K 4.7U_0805_10V4Z

Near to Express Card slot. C785

1
C786
1
C787
1 1
C781 C782
1
C783
1
C784
1

+3VS_PEC 0.1U_0402_16V4Z
2 2 2 2 2 2 2
JP16 4.7U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1
3 GND 3
20 USB20_N11 2 21 BT_COMBO_EN# 1 2 CH_CLK
USB_D- C677 C678 R547 0_0402_5%
20 USB20_P11 3

2
EXP_CPPE# USB_D+
4
CPUSB# 2 2 R553
5
RSV 0.1U_0402_16V4Z +1.5VS_WLAN +3VS_WLAN
6 4.7K_0402_5%
RSV CONN@ +3VS
20 SMB_CK_CLK1 7
SMB_CLK R556
0_0402_5% JP26
20 SMB_CK_DAT1 8

1
SMB_DATA +1.5VS_PEC MINI_PCIE_WAKE# 1 L78
+1.5VS_PEC 9 2 1 2 1 2 0_1206_5%
+1.5V 1 2
+1.5VS_PEC 10 31 CH_DATA 3 4
MINI_PCIE_WAKE# +1.5V 4.7U_0805_10V4Z CH_CLK 3 4
20,25 MINI_PCIE_WAKE# 11 31 CH_CLK 5 6
WAKE# 5 6 +1.5VS
12 1 1 15 CLKREQ_MCARD2# 7 8
+3V_PEC PERST# +3.3VAUX 7 8
13 9 10
PERST# C683 C682 9 10 L79
+3VS_PEC 14 15 CLK_PCIE_MCARD2# 11 12 1 2 0_1206_5%
+3.3V 11 12
15 15 CLK_PCIE_MCARD2 13 14
+3.3V 2 2 13 14
15 CLKREQ_NCARD# 16 15 16
EXP_CPPE# CLKREQ# 15 16
17 17 18
CPPE# 0.1U_0402_16V4Z 17 18
15 CLK_PCIE_NCARD# 18 19 20 XMIT_OFF# 21
REFCLK- 19 20 PLT_RST#
15 CLK_PCIE_NCARD 19 21 22
REFCLK+ 21 22 +3VAUX R634 1
20 10 PCIE_PTX_C_IRX_N2 23 24 2 @ 0_0603_5% +3VALW
GND 23 24 R635 1 0_0603_5%
10 PCIE_PTX_C_IRX_N0 21 10 PCIE_PTX_C_IRX_P2 25 26 2 +3VS
PERn0 25 26
10 PCIE_PTX_C_IRX_P0 22 27 28
PERp0 +3V_PEC 27 28 SMB_CK_CLK1
23 29 30
GND 29 30 SMB_CK_DAT1
10 PCIE_ITX_C_PRX_N0 24 10 PCIE_ITX_C_PRX_N2 31 32
PETn0 4.7U_0805_10V4Z 31 32
10 PCIE_ITX_C_PRX_P0 25 33 34
PETp0 10 PCIE_ITX_C_PRX_P2 33 34
26 35 36 USB20_N8 20
GND 35 36
1 1 37 38 USB20_P8 20
37 38
27 29 +3VS_WLAN 39 40
GND1 SHIELD C684 C685 39 40
28 30 41 42
GND2 SHIELD 41 42
43 44 WL_LED# 34
SANTA_131851-A_LT 2 2 43 44
45 46
0.1U_0402_16V4Z 45 46
47 48
47 48
49 50
4 49 50 4
51 52 SI: Exchange TV & WLAN
51 52
53
GND1 GND2
54 minicard location
MOLEX 67910-0002 52P

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini-Card/Mini-PCI/Express Card
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 26 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

Card Reader Connector

WWW.AliSaler.Com SI:Per ME request change
JP21 to new one
+VCC_4IN1 3
JP21
XD-VCC SD-VCC
21 +VCC_4IN1
28
XD_SD_MS_D0 MS-VCC
32
XD_SD_MS_D1 XD-D0 SDCLK
10
XD-D1 7 IN 1 CONN SD_CLK
20
XD_SD_MS_D2 9 14 XD_SD_MS_D0
XD_SD_MS_D3 XD-D2 SD-DAT0 XD_SD_MS_D1
8 12
XD_SD_D4 XD-D3 SD-DAT1 XD_SD_MS_D2 SDCLK
7 30 1 2 1 2
XD_SD_D5 XD-D4 SD-DAT2 XD_SD_MS_D3
6 29
XD_SD_D6 XD-D5 SD-DAT3 XD_SD_D4 R413 C902
5 27
XD_SD_D7 XD-D6 SD-DAT4 XD_SD_D5 @ 100_0402_5% @ 100P_0402_25V8K
4 23
XD-D7 SD-DAT5 XD_SD_D6
18
1 SDCMD_MSBS_XDWE#34 SD-DAT6 XD_SD_D7 1
16
XDWP#_SDWP# XD-WE SD-DAT7 SDCMD_MSBS_XDWE#
33 25
XD_ALE XD-WP SD-CMD XDCD0#_SDCD#
35 1
XD_CD# XD-ALE SD-CD-SW
40
XD_RB# XD-CD XDWP#_SDWP#
39 2
XD_RE# XD-R/B SD-WP-SW
38
XDCE# XD-RE MSCLK
37 1 2 1 2
XD_CLE XD-CE MSCLK
36 26
XD-CLE MS-SCLK XD_SD_MS_D0 R410 C900
17
XDCE# MS-DATA0 XD_SD_MS_D1 @ 100_0402_5% @ 100P_0402_25V8K
2 1 2 1 11 15
7IN1 GND MS-DATA1 XD_SD_MS_D2
31 19
C901 R411 7IN1 GND MS-DATA2 XD_SD_MS_D3
24
+VCC_4IN1 100P_0402_25V8K@ 100_0402_5% @ MS-DATA3 XDCD1#_MSCD#
22
MS-INS SDCMD_MSBS_XDWE#
13
10K_0402_5% R45 MS-BS
41
7IN1 GND
1 2 XDWP#_SDWP# 42
10K_0402_5% 7IN1 GND +1.8VS_OUT +1.8VS
1 2 XD_RB# TAITW_R015-B10-LM R387
0.1U_0402_16V4Z 1000P_0402_50V7K 1 2
R106 1 1 1 1
@ 0_0603_5%
+3VS C892 C688 C687 C893

XD_CLE 2 2 2 2 SI:Use build in Regulator

2 1 SI:Per Jmicro request change
10K_0402_5% R405 10U_0805_10V4Z 0.1U_0402_16V4Z Chip unmount R387
2 1 XD_ALE R405 & R122 from 200K to 10K +3VS
10K_0402_5% R122

2 1 XD_RE# 2 1
200K_0402_5% R86 0.1U_0402_16V4Z C695
Power Circuit
2 U23 2
+3VS
1 1
15 CLK_PCIE_MCARD0# 3 5
APCLKN APVDD C691 C692 D40
15 CLK_PCIE_MCARD0 4 10
APCLKP APV18 XDCD1#_MSCD#
30 2
TAV33 2 2 XD_CD#
10 PCIE_ITX_C_PRX_N1 9 1 1
APRXN 0.1U_0402_16V4Z 0.1U_0402_16V4Z XDCD0#_SDCD#
8 19 3
10 PCIE_ITX_C_PRX_P1 APRXP DV33 C696
20
C693 1 0.1U_0402_16V7K PCIE_PTX_IRX_N1 DV33 DAN202U_SC70 270P_0402_50V7K
10 PCIE_PTX_C_IRX_N1 2 11 44
C697 1 0.1U_0402_16V7K PCIE_PTX_IRX_P1 APTXN DV33 2
10 PCIE_PTX_C_IRX_P1 2 12 18 +1.8VS_OUT
APTXP DV18
37 1 1
DV18
SI:Per Jmicro request change 2 1 7
8.2K_0402_5% R114 APREXT XD_SD_MS_D0 C686 C690
48
MDIO0
R114 from 10K to 8.2K MDIO1
47 XD_SD_MS_D1
2 2
0.1U_0402_16V4Z
1 2 38 46 XD_SD_MS_D2
+3VS PCIES_EN MDIO2
10K_0402_5% R409 39 45 XD_SD_MS_D3
PCIES JMB385 MDIO3
43 SDCMD_MSBS_XDWE# 0.1U_0402_16V4Z
MDIO4 SDCLK_MSCLK_XDCE#
42
MDIO5 XDWP#_SDWP#
41
+5VS MDIO6 XD_CLE
SI:Use build in Regulator 40
MDIO7 XD_SD_D4 SDCLK_MSCLK_XDCE# SDCLK
29 2 1
MDIO8
Chip mount R383,C689,C694 1 28 XD_SD_D5 22_0402_5% 2 1 R457 MSCLK
1

11,14,19,25,26,32,33 PLT_RST# XRSTN MDIO9 XD_SD_D6 22_0402_5% 2 XDCE#

2 27 1 R456
R370 XTEST MDIO10 XD_SD_D7 22_0402_5% R455
26
+VCC_OUT +VCC_4IN1 470_0402_5% MDIO11 XD_RE#
25
T28 PAD MDIO12 XD_RB#
13 23
R383 SEEDAT MDIO13 XD_ALE
14 22
2 2

SEECLK MDIO14
1 2
34
0_0603_5% D5 XDCD1#_MSCD# NC
1 1 15 35
XDCD0#_SDCD# CR1_CD1N NC
HT-F196BP5_WHITE 16 36
C689 C694 CR1_CD0N NC
3 10U_0805_10V4Z 0.1U_0402_16V4Z 6 3
2 2 APGND
+VCC_OUT 17
1

CR1_PCTLN
24
GND
31
1

+3VS D Q53 CR_LED# GND

21 32
CR_LED# CR1_LEDN GND
2 33
4.7K_0402_5% R121 GND
G
2

1 2XDCD0#_SDCD# S 2N7002_SOT23-3
3

R113
4.7K_0402_5% R111 4.7K_0402_5% JMB385-LGEZ0A_LQFP48_7X7
1 2 XDCD1#_MSCD#
SI: Use 0740 date code chip
1

SI:Use new chip ,change to

High active control
SI:Use build in Regulator
Chip unmount U22 and relation parts

+VCC_4IN1
+VCC_OUT
40mil
+3VS U22

3 1
4 IN OUT 4
4 5
EN OUT
1
1

C895 2 1
GND
@ 0.1U_0402_16V4Z @ G5250C2T1U_SOT23-5 C896
2
2 150K_0402_5%
2

@ 1U_0603_10V4Z R123
@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

reserved power circuit THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
JMB380/385 card reader/1394
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 27 of 53

WWW.AliSaler.Com
A B C D E
 5 4 3 2 1

WWW.AliSaler.Com

D D

ACCELEROMETER

SMB_CK_CLK0 8,9,15,20

14
U66

SCL / SPC
+3VS

+3VS 1 13 SMB_CK_DAT0 8,9,15,20

Vdd_IO SDA / SDI / SDO
2 12
GND SDO
3 11
Pin12(internal pull high ) pull up I2C address :0011101b

10U_0805_6.3V6M
0.1U_0402_16V4Z
Reserved Reserved
pull low I2C address:0011100b

C1030

C1031
1 1 4 10
GND GND
5 9
GND INT 2
2 2 6 8
Vdd INT 1 ACCEL_INT 19

C C

CS
LIS302DLTR_LGA14_3x5

7
+3VS 2 1
R964 10K_0402_5%

I2C address:0111000Xb
+3VS
U68

9 1 2
VDDIO C830 @ 0.1U_0402_16V4Z
+3VS 5 2 +3VS
CSB VDD

8,9,15,20 SMB_CK_CLK0 6 4 ACCEL_INT 19

SCK INT

10U_0805_6.3V6M
0.1U_0402_16V4Z
C828

C829
8,9,15,20 SMB_CK_DAT0 8 7
SDI SDO
B
1 1 B
10 3
reserved GND
1 11
reserved GND 2 2
12
GND @ @

@ BMA150_LGA12

SI: Reserve Bosch solution

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/08/04 Deciphered Date 2006/10/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R5C833_1394
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom Montevina Consumer Discrete 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 28 of 53
5 4 3 2 1

WWW.AliSaler.Com
 A B C D E

WWW.AliSaler.Com +3VDD_CODEC +VDDA_CODEC 0212_Change to +5VALW.

CODEC POWER
R885
+3VS 1 2
BLM18BD601SN1D_0603 +5VALW +VDDA_CODEC

0.1U_0402_16V4Z

0.1U_0402_16V4Z
W=40Mil U32

1U_0603_10V4Z

1U_0603_10V4Z
0.1U_0402_16V4Z
1 1 1
1 1 C728 1 2 1 (4.75V)
IN

2.2U_0805_16V4Z
0.1U_0402_16V4Z 5
2
OUT
1
300mA
2 2 2 GND

C734

C733

C904
2 2

C730

C731

C729
26,33,36,38,41 SUSP# 3 4
SHDN BYP
1 G9191-475T1U_SOT23-5 2 1
1
C732

0.1U_0402_16V4Z
2

U27

+3VDD_CODEC 9 47 EAPD_CODEC 33
DVDD_CORE* EAPD/ SPDIF OUT 0 or 1 / GPIO 0
1 2 DMIC_DAT 17
DVDD_CORE VOL_UP/DMIC_0/GPIO 1
4
VOL_DN/DMIC_1/GPIO 2
+VDDA_CODEC 25
AVDD1*
30
GPIO 3
38
AVDD2**
31
VREFOUT-E / GPIO 4

+3VDD_CODEC 3 43
DVDD_IO GPIO 5
32 44
MONO_OUT GPIO 6
45
HDA_BITCLK_CODEC SPDIF OUT1 / GPIO 7
20 HDA_BITCLK_CODEC 6
BITCLK SPDIF_OUT
48 SPDIF_OUT 35
SPDIF OUT0
20 HDA_SDOUT_CODEC 5
SDO
R522 1 2 33_0402_5% 8
20 HDA_SDIN0 SDI_CODEC
28 +VREFOUT_B 30
VREFOUT-B
20 HDA_SYNC_CODEC 10
SYNC
29 should be 10K for int MIC
2 VREFOUT-C 2
20 HDA_RST#_CODEC 11
RESET# 5.1K_0402_1% 2 R548
1 +VDDA_CODEC
1 2 20K_0402_1% 2 1 R569 EXTMIC_DET# 30
17 DMIC_CLK SENSEA#
R230 22_0402_5% 13 39.2K_0402_1% 2 1 R571 JACK_DET# 30,35
R537 SENSE_A 10K_0402_1% 2 R570
33 EC_BEEP 1 2 2 1 46 1 INTMIC_DET# 30
47K_0402_5% C913 1U_0603_10V4Z DMIC_CLK 0.1U_0402_16V4Z 2 1 C951
R524 1 2 1 2 MONO_INR 33 41 HP_OUTR
20 SB_SPKR CAP2 PORTA_R HP_OUTR 30
47K_0402_5% C955 0.1U_0402_16V4Z HP Jack & Dock
12 39 HP_OUTL
PCBEEP PORTA_L HP_OUTL 30
R523 1 2 10K_0402_5%
1U_0603_10V4Z
C956 1 2 0.1U_0402_16V4Z 22 MIC_EXT_R C908 1 2
PORTB_R MIC_EXTR 30
40 Jack MIC
R584 1 NC / OTP MIC_EXT_L
+VDDA_CODEC 2 5.1K_0402_1% 21 C907 1 2 MIC_EXTL 30
R916 1 SENSEB# PORTB_L
35 SENSE_B# 2 39.2K_0402_1% 34
SENSE_B / NC 1U_0603_10V4Z
1
C979 37 24 MIC_IN_R
NC PORTC_R MIC_IN_R 30
0.1U_0402_16V4Z MIC_IN_L
Internal MIC
18 23 MIC_IN_L 30
2 NC PORTC_L
19
NC LINE_OUT_R
36 LINE_OUT_R 30
HDA_BITCLK_CODEC PORTD_R
20 Internal SPKR.
NC LINE_OUT_L
35 LINE_OUT_L 30
PORTD_L
1

10U_0805_10V4Z C972 DOCK@ 1U_0603_10V6K

R525 C744 1 2 +VC_REFA 27 15 DOCK_MICR 1 2 1 DOCK@ 2
VREFFILT PORTE_R DOCK_MIC_R 35
@ 47_0402_5% R943 10K_0402_5% DOCK MIC
26 14 DOCK_MICL 1 2 1 2
AVSS1* PORTE_L DOCK_MIC_L 35
R944 10K_0402_5%
2

1
1 42 C973 DOCK@ 1U_0603_10V6K DOCK@
AVSS2** R910 R911
17
3 C745 PORTF_R DOCK@ DOCK@ 3
7
@ 33P_0402_50V8K DVSS** 1.21K_0402_1% 1.21K_0402_1%
16
2 PORTF_L

2
92HD71B7X5NLGXA1X8_QFN48_7X7 1/10*Vin
need close to Codec

C746
1 2
@ 1000P_0402_25V8J
SENSE A SENSE B C747
1 2
@ 1000P_0402_25V8J
Port Resistor Port Resistor C748
1 2
@ 1000P_0402_25V8J
A 39.2K E 39.2K HP_DET# MIC_DET PORT-A
C749
1 2
LINEOUT <Earphone OUT> MIC EQ
@ 1000P_0402_25V8J 0(LOW) 0(LOW) OFF ON ON Disable
B 20K F 20K
4
0(LOW) NC OFF ON OFF Disable 4
R195 1 2 0_1206_5%
NC 0(LOW) ON OFF ON Enable
C 10K G 10K R198 NC NC ON OFF OFF Enable
1 2 GNDA 30,35
@ 0_0805_5%
D 5.11K H 5.11K
Security Classification Compal Secret Data Compal Electronics, Inc.
GND GNDA
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title
0312_Mount C379~383, R313.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Audio Codec-IDT9271B7
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 29 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com

JP17
MIC_EXTR 1
+5VAMP +5VS MIC_EXTL 1
2
1 U28 R594 2 1
3
EC_MUTE# HP_OUT_R 3
14 19 1 2 4
33 EC_MUTE# RS/D RVDD 0_1206_5% HP_OUT_L 4
5
5
9 7 6
LS/D LVDD EXTMIC_DET# 6
29 EXTMIC_DET# 7
HP_DET# 7
8
8

10U_0805_10V4Z

10U_0805_10V4Z
1 2 1 R701 2 16 1 SPKR+ 9
0.1U_0402_16V7K C770 12.7K_0402_1% RIN+ ROUT+ C766 C767 9
10
R702 2 SPKR- CIR_IN 10
1 2 1 17 3 33,35 CIR_IN 11
29 LINE_OUT_R 0.1U_0402_16V7K C775 12.7K_0402_1% RIN- ROUT- 11
+5VL 12
12
13
R703 2 SPKL+ 13
1 2 1 12 4 14
0.1U_0402_16V7K C776 12.7K_0402_1% LIN+ LOUT+ 14
1 2 1 R704 2 13 6 SPKL- ACES_87213-1400G
29 LINE_OUT_L 0.1U_0402_16V7K C817 12.7K_0402_1% LIN- LOUT-
CONN@
Keep 10 mil width
High Pass Freq: 125Hz 15
RBYPASS
20
NC
2 11
LBYPASS
2 18
C818 NC
10U_0805_10V4Z C765 2 10
1 GND NC
1 5 8 +3VALW
GND NC
21 JACK_DET# 29,35

2
THERMAL_PAD
10U_0805_10V4Z R46

3
TPA6020A2RGWR_QFN20_5x5 10K_0402_5%
B+

1
5

1
2 Q20B 2
R871

4
2N7002DW-7-F_SOT363-6
330K_0402_5%

2
R909 0_0402_5% +3VALW 0.01U_0402_25V7K
29 +VREFOUT_B 2 1 1 2

1
Q21 D
1
1

2
C742 1U_0603_10V4Z 2
R907 R908 R47 2N7002_SOT23-3 G
4.7K_0402_5% 4.7K_0402_5% 10K_0402_5% S C854 SI: Add cap & 62 ohm for dock

3
2

6
100U_6.3V_M
2

5
C945
R602 40.2_0603_1%
HP_DET# Q20A DOCK_R

+
2 29 HP_OUTR 3 4 1 2 1 2 DOCK_LOUT_R 35
MIC_EXTR
29 MIC_EXTR
2N7002DW-7-F_SOT363-6 Q22B

1
MIC_EXTL 2N7002DW-7-F_SOT363-6 100U_6.3V_M
29 MIC_EXTL

2
C946
SI: change 2n7002 to dual package R607 40.2_0603_1%
DOCK_L

+
29 HP_OUTL 6 1 1 2 1 2 DOCK_LOUT_L 35

Q22A
2N7002DW-7-F_SOT363-6
SI: change 2n7002 to dual package
100U_6.3V_M HP OUT For Docking
C940
3 HP_OUT_R 3

+
29 HP_OUTR 1 2
+3VS
C941
Analog MIC HP_OUT_L

+
29 HP_OUTL 1 2
2

@ R906 0_0402_5%
+VDDA_CODEC 2 1 1 2 R555 100U_6.3V_M
@ 10K_0402_5%
1

C743 1U_0603_10V4Z @
R904 R905
1

@ 4.7K_0402_5% 4.7K_0402_5%
@
2

JP20
@ 1U_0603_10V6K 1
C970 MICIN_L 1
29 MIC_IN_L 1 2 2
MICIN_R 2
1 2 3
29 MIC_IN_R
C971 @ 1U_0603_10V6K 4
3
SP02000D000 S W-CONN ACES 85204-04001 4P P1.25 SPEAKER
4 JP15
+3VS 2 1
33 ANA_MIC_DET R956@ 10K_0402_5% 5 SPKL+ 1
GND1 SPKL- 1
6 2
1

D Q27 GND2 SPKR+ 2

3
ACES_88231-04001 SPKR- 3
2 4
@ 2N7002_SOT23-3 CONN@ 4
G
29 INTMIC_DET# S 5
3

GND1

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J
6
1

D Q28 GND2
1 1 1 1
1

2 ACES_88231-04001

C760

C761

C762

C763
@ 2N7002_SOT23-3 G CONN@
S R957
3

@ 100K_0402_5% 2 2 2 2
@ @ @ @
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AMP & Audio Jack
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 30 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

Left side USB CONNECTOR 0

WWW.AliSaler.Com Left side ESATA/USB combination Connector
+5VALW +USB_VCCA
L46 +USB_VCCA JP27 +USB_VCCA
U40
WCM-2012-900T_0805 JP28
1
GND OUT
8 W=100mils 20 USB20_N4
1
1 2
2 1
VCC
2 7 USB20_N4_R 2 1 2 1 USB
IN OUT D- 20 USB20_N2 1 2 B_VCC

1000P_0402_50V7K
USB20_P4_R USB20_N2_R

150U_D_6.3VM

0.1U_0402_16V4Z
3 6 1 3 2
IN OUT D+ USB20_P2_R B_D-
1 4 5 1 1 4 3 4 3
EN# OC# + 20 USB20_P4 4 3 GND B_D+

C789

C790

C791
C788 9 4 3 4
THERMAL_PAD WCM-2012-900T_0805 20 USB20_P2 4 3 B_GND
5
1 4.7U_0805_10V4Z TPS2061IDGN_MSOP8~N GND L51 1
6 5
2 2 2 2 GND SATA_TXP5 GND
7 21 SATA_TXP5 6
GND SATA_TXN5 A+ ESATA
D8 8 21 SATA_TXN5 7
GND A-
8 12
USB20_P4_R GND SHIELD
+5VALW 4 2 SUYIN_020173MR004M598ZL
21 SATA_RXN5_C
C792 2 1 0.01U_0402_16V7K SATA_RXN5 9 13
USB_EN# VIN IO1 B- SHIELD
21 SATA_RXP5_C
C793 2 1 0.01U_0402_16V7K SATA_RXP5 10 14
USB20_N4_R B+ SHIELD
3 1 SI: change new footprint 11 15
IO2 GND GND SHIELD
@ PRTR5V0U2X_SOT143-4 TYCO_1759576-1

D11 SI: change new footprint

SATA_TXN5 4 3 SATA_TXP5
CH3 CH2

D9

+5VALW 5 2 +5VALW 4 2 USB20_P2_R

Vp Vn VIN IO1
USB20_N2_R3 1
IO2 GND
SATA_RXN5 6 1 SATA_RXP5 @ PRTR5V0U2X_SOT143-4
CH4 CH1

@ CM1293-04SO_SOT23-6
USB Board Conn Touch screen SI: new add for ESD
JP47
+5VALW 1 JP18 +5VS
1
2 1
2 1
3 2 USB10_N12 20
3 2
33 USB_EN# 4 3 USB10_P12 20
2 4 3 2
5 4
20 USB20_N0 5 4
6 5
20 USB20_P0 6 5
7 6
7 GND1
8 7
20 USB20_N1 8 GND2
9
20 USB20_P1 9 ACES_88266-05001
10
10

CONN@
11
GND1
12
GND2
ACES_87213-1000G

CONN@

BT Connector
JP32
1 +3VAUX_BT
1
2
2 USB20_P6
3 USB20_P6 20
3 USB20_N6
4 USB20_N6 20
3 4 3
5 BT_LED 34
5 @ R517 1 1K_0402_5%
6 2
6 @ R518 1 1K_0402_5% CH_DATA 26
1 2 7 2 CH_CLK 26
@ R622 0_0603_5% 7
8
+3VALW Q31 +3VS 8
9 0612 no install
GND1
10 D16
GND2
S

+3VS_FB
D

3 1 1 2
@ SI2301BDS_SOT23 1 R581 0_0603_5% ACES_88231-08001 4 2 USB20_P6
+5VALW VIN IO1
C832 CONN@
0.1U_0402_16V4Z USB20_N6
G

3 1
2

IO2 GND
33 USB_EN# 2 JP39 @ PRTR5V0U2X_SOT143-4
1
USB20_N7 1 +3VALW +3VAUX_BT
20 USB20_N7 2
USB20_P7 2 Q24 SI2301BDS_SOT23
20 USB20_P7 3
3
4
4 0.1U_0402_16V4Z

D
5 3 1
5
D21 1 2 6
@ R582 0_0603_5% 6
7

1
USB20_P7 GND

G
+5VALW 4 2 8 1 2 1 1 1

2
VIN IO1 GND R519 C799 C800 C801
USB20_N7 3 1 ACES_85201-06051 C798 C802
IO2 GND CONN@ 1U_0603_10V4Z 0.1U_0402_16V4Z 100K_0402_5%
@ PRTR5V0U2X_SOT143-4 2 1 2 2 2

2
SI: Change finger print footprint 0.01U_0402_16V7K 4.7U_0805_10V4Z

R520
21 BT_OFF 1 2

10K_0402_5%

4 4
SI: change to 10K ohm to make
sure MOS can turn on

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 31 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com +3VL

+3VL +3VL SPI Flash (8Mb*1) 1 20mils

C484 U29

1
1 8 4
C803 0.1U_0402_16V4Z VCC VSS
R521 2 3
0.1U_0402_16V4Z 100K_0402_5% W
2 U31 7

2
HOLD
8 1
1 VCC A0 SPI_CS# INT_SPI_CS# +3VALW 1
7 2 33 SPI_CS# 1 2 1
WP A1 R221 @ 0_0402_5% S
6,33,34,37 SMB_EC_CK1 6 3
SCL A2 SPI_CLK_R
6,33,34,37 SMB_EC_DA1 5 4 33 SPI_CLK 1 2 6 C624
SDA GND R227 0_0402_5% C
AT24C16AN-10SI-2.7_SO8 33 EC_SO_SPI_SI 2 1 EC_SO_SPI_SI_R 5 2 EC_SI_SPI_SO_R 2 1 EC_SI_SPI_SO 33 2 1
R229 0_0402_5% D Q R223 0_0402_5%
SST25LF080A_SO8-200mil 0.1U_0402_16V4Z
SPI_CLK_R

1
R526 2
100K_0402_5% R313

5
C794 U24 100K_0402_5%
R385 INT_FLASH_EN#
10P_0402_25V8K 2 1 2

G Vcc
2
1 INT_SPI_CS# B
@ 1 2 4
Y SPI_CS#
1
22_0402_5% A
NC7SZ32P5X_NL_SC70-5

3
JP50
SPI_CS# 1 2
1 2 +3VALW
EC_SI_SPI_SO_R 3 4 INT_FLASH_EN#
3 4 SPI_CLK_R
5 6
EEPROM need merge to BIOS ROM 21 SB_INT_FLASH_SEL
7
5
7
6
8
8 EC_SO_SPI_SI_R

@ E&T_2941-G08N-00E~D

C:Chg. PN to LTC00000200

2 2

LPC Debug Port

+3VS
+3VS +3VALW JP41

TPM1.2 on board with 1.02 Firmware 1

2
1
2
3
3
4
4
C1019

C1018

C1006

C1007
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
5
5
1 1 1 1 6 CLK_14M_SIO 15
6 LPC_AD0
7
7 LPC_AD1
8
8 LPC_AD2
9
2 2 2 2 9 LPC_AD3
10
10 LPC_FRAME#
11
11 LPC_DRQ1#
12
TPM@ 12 PLT_RST#
13
TPM@ TPM@ TPM@ 13 R137 1
14 2 @ 0_0402_5%
14
15 CLK_PCI_SIO2 19
15 SIRQ
24
19
10

16
5

U62 16
17
17
18
VDD
VDD
VDD

VSB

LPC_AD0 18
26 19
LPC_AD1 LAD0 19
23 20
LPC_AD2 LAD1 20
20
+3VS LPC_AD3 LAD2 TPM_GPIO +3VS
17
LAD3 GPIO
6 PAD @T42 @ ACES_85201-2005
LPC_FRAME# 22 2 TPM_GPIO2 PAD @T43
PLT_RST# LFRAME# GPIO2 Base I/O Address
16

1
3 R954 1 TPM@ LRESET# 3
2 10K_0402_5% 28 0 = 02Eh
SIRQ LPCPD# 1 =*04Eh
27
SERIRQ R948 TPM@
21

1 2
19,23 CLK_PCI_TCG
1 2
LCLK

 

R955 TPM@
0_0402_5%
4.7K_0402_5% LPC Debug Port
2
+3VS R454 @ 10_0402_5% 15 8 2 1 2 1
C891 @ 10P_0402_50V8J CLKRUN# TEST1 H31
9
TESTB1/BADD R950 +3VALW
1

7 @ 4.7K_0402_5%
PP
6 5 LPC_DRQ1# 19
R951 3
@ 4.7K_0402_5% TPM_XTALO NC
14 12
XTALO NC PLT_RST#
1 19,33 SIRQ 7 4 PLT_RST# 11,14,19,25,26,27,33
2

TPM_XTALI NC
13
XTALI/32K IN
1

LPC_AD3 8 3 LPC_AD2
GND
GND
GND
GND

19,33 LPC_AD3 LPC_AD2 19,33

R952
0_0402_5% SLB 9635 TT 1.2_TSSOP28 LPC_AD1 9 2 LPC_AD0
19,33 LPC_AD1 LPC_AD0 19,33
25
18
11
4

TPM@ TPM@
2

C1022 2 1 18P_0402_50V8J TPM_XTALI

LPC_FRAME# 10 1 CLK_PCI_SIO
19,33 LPC_FRAME# CLK_PCI_SIO 19,23
TPM@
1

2
Y8 TPM@
2 1 R953 @ DEBUG_PAD R232
NC IN 10M_0402_5% 22_0402_5%
3 4 TPM@ @
NC OUT
2

1
32.768KHZ_12.5P_1TJS125BJ4A421P 2
C1020 2 1 18P_0402_50V8J TPM_XTALO C486
4 22P_0402_50V8J 4
1
TPM@ @

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TCG/BIOS ROM/PS2/LED/SW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 32 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
+3VL_EC

0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K KBD CONN

CONN@
1 1 1 1 1
JP33
C805 C806 C807 C808 C809 +3VL +3VL_EC +EC_AVCC
1 KSO17
For EMI
2 2 2 2 2 R527 1 KSO16 KSO17 @ C213 100P_0402_25V8K
2 1 2
0.1U_0402_16V4Z 1000P_0402_50V7K 2 KSO15 KSO9 @ C609 100P_0402_25V8K
1 2 3 1 2
0_0805_5% 3 KSO10 KSO16 @ C754 100P_0402_25V8K
4 1 2
4 KSO11 KSI6 @ C756 100P_0402_25V8K
5 1 2
5 KSO14 KSO14 @ C757 100P_0402_25V8K
SI: Change to +5VL to support 6 1 2

111
125
+5VL 6 KSO13 KSO11 @ C758 100P_0402_25V8K

22
33
96

67
read battery in batt mode 7 1 2

9
1 U33 7 KSO12 KSO10 @ C759 100P_0402_25V8K 1
8 1 2
SMB_EC_DA1 R528 8 KSO3 KSO15
1 2 4.7K_0402_5% 9 @ C764 1 2 100P_0402_25V8K

VCC
VCC
VCC
VCC
VCC
VCC

AVCC
SMB_EC_CK1 R529 BATT_OVP 2 9 KSO6 KSO6
1 2 4.7K_0402_5% 1 10 @ C768 1 2 100P_0402_25V8K
100P_0402_50V8J C327 10 KSO8 KSO3 @ C769 100P_0402_25V8K
11 1 2
+3VS 11 KSO7 KSO12 @ C822 100P_0402_25V8K
12 1 2
GATEA20 INV_PWM 12 KSO4 KSO13 @ C823 100P_0402_25V8K
1 21 INV_PWM 17 13 1 2
SMB_EC_DA2 R531 20 GATEA20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F FAN_PWM 13 KSO2 KSO2
1 2 4.7K_0402_5% 2 23 FAN_PWM 4 14 @ C824 1 2 100P_0402_25V8K
SMB_EC_CK2 R532 20 KB_RST# SIRQ KBRST#/GPIO01 BEEP#/PWM2/GPIO10 14 KSI0 KSO4
1 2 4.7K_0402_5% 19,32 SIRQ 3 26 EC_BEEP 29 15 @ C825 1 2 100P_0402_25V8K
LPC_LFRAME# 4 SERIRQ# FANPWM1/GPIO12 ACOFF 15 KSO1 KSO7 @ C826 100P_0402_25V8K
19,32 LPC_FRAME# 27 ACOFF 38 16 1 2
C810 R530 LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 0.01U_0402_16V7K 16 KSO5 KSO8 @ C875 100P_0402_25V8K
19,32 LPC_AD3 5 17 1 2
LPC_AD2 LAD3 C812 ECAGND 17 KSI3 KSI3 @ C876 100P_0402_25V8K
1 2 1 2 19,32 LPC_AD2 7
LAD2 PWM Output 1 2
18
18 1 2
@ 33_0402_5% 19,32 LPC_AD1 LPC_AD1 8 63 BATT_TEMP 19 KSI2 KSO5 @ C877 1 2 100P_0402_25V8K
LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_OVP BATT_TEMP 37 19 KSO0 KSO1
@ 15P_0402_50V8J @ C878 100P_0402_25V8K
LAD0 LPC & MISC
19,32 LPC_AD0 10 64 BATT_OVP 37 20 1 2
BATT_OVP/AD1/GPIO39 20 KSI5 KSI0 @ C884 100P_0402_25V8K
65 ADP_I 38 21 1 2
CLK_PCI_EC ADP_I/AD2/GPIO3A 21 KSI4 KSI4 @ C885 100P_0402_25V8K
19,23 CLK_PCI_EC 12
PCICLK AD Input AD3/GPIO3B
66 ADP_ID 37 22
22 1 2
PLT_RST# 13 75 TP_BTN# 23 KSO9 KSI5 @ C886 1 2 100P_0402_25V8K
11,14,19,25,26,27,32 PLT_RST# PCIRST#/GPIO05 AD4/GPIO42 TP_BTN# 34 23
+3VL R533 1 2 ECRST# 37 76 24 KSI6 KSO0 @ C887 1 2 100P_0402_25V8K
EC_SCI# ECRST# SELIO2#/AD5/GPIO43 ANA_MIC_DET 30 24 KSI7 KSI2
47K_0402_5% 20 27 25 @ C888 1 2 100P_0402_25V8K
20 EC_SCI# SCI#/GPIO0E G1 25 KSI1 KSI1 @ C889 100P_0402_25V8K
20,23 HDARST# 38 28 26 1 2
CLKRUN#/GPIO1D G2 26 KSI7 @ C890 100P_0402_25V8K
68 DAC_BRIG 17 1 2
DAC_BRIG/DA0/GPIO3C
2 1 70 VCTRL 38
EN_DFAN1/DA1/GPIO3D IREF ACES_85201-26051
DA Output IREF/DA2/GPIO3E
71 IREF 38
C811 0.1U_0402_16V4Z KSI0 55 72
KSI0/GPIO30 DA3/GPIO3F AC_SET 38
KSI1 56
KSI2 KSI1/GPIO31
57
KSI3 KSI2/GPIO32
58 83
KSI4 59
KSI3/GPIO33 PSCLK1/GPIO4A
84
EC_MUTE# 30
USB_EN# 31
KB Back Light Conn
KSI5 KSI4/GPIO34 PSDAT1/GPIO4B
60 85 I2C_INT 34
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C +5VS_LED
+3VALW
61
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D
86 MUTE_LED 35
SUSP# SYSON KSI7 62 87 TP_CLK JP48
KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK 34
39 88 1 1 2
KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 34 1 R542 0_0805_5%
40 select SPI ROM or LPC ROM, 2
1

2 KSO2 KSO1/GPIO21 2 2
41 3
R536 R539 KSO3 KSO2/GPIO22 remove in ver C 3
42 97 4
1

100K_0402_5% 100K_0402_5% KSO4 KSO3/GPIO23 SDICS#/GPXOA00 4

43 98 DOCK_VOL_UP# 35 5
R538 KSO5 KSO4/GPIO24 SDICLK/GPXOA01 G1
KSO5/GPIO25 Int. K/B
44 99 DOCK_VOL_DWN# 35 6
10K_0402_5% KSO6 SDIDO/GPXOA02 G2
45 109
KSO6/GPIO26 Matrix VGATE 43
2

KSO7 SDIDI/GPXID0 ACES_85201-0405N

46
KSO7/GPIO27 SPI Device Interface
KSO8 47 CONN@
2

KSO9 KSO8/GPIO28
48 119 EC_SI_SPI_SO 32
KSO10 KSO9/GPIO29 SPIDI/RD#
49 120 EC_SO_SPI_SI 32
LID_SW# KSO11 KSO10/GPIO2A SPIDO/WR#
50
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
126 SPI_CLK 32
KSO12 51 128
KSO13 KSO12/GPIO2C SPICS# SPI_CS# 32
52
KSO14 KSO13/GPIO2D CIR_IN +3VS
0205_Add Pull down 53 2 1 +5VL
KSO15 KSO14/GPIO2E CIR_IN R554 10K_0402_5% R540
R402 for SUSP#. 54 73 CIR_IN 30,35
KSO16 KSO15/GPIO2F CIR_RX/GPIO40 TP_BTN#
81 74 1 2
KSO17 KSO16/GPIO48 CIR_RLC_TX/GPIO41 FSTCHG +5V_TP
82 89 FSTCHG 38
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 R534 10K_0402_5%
90 STD_ADP 38
BATT_CHGI_LED#/GPIO52 TP_CLK
91 CAPS_LED# 34 1 2
SMB_EC_CK1 CAPS_LED#/GPIO53 BAT_LED# 10K_0402_5%
6,32,34,37 SMB_EC_CK1 77
SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54
92 BAT_LED# 34
SMB_EC_DA1 78 93 ON/OFFBTN_LED# R535
6,32,34,37 SMB_EC_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 ON/OFFBTN_LED# 34
SMB_EC_CK2 79 SM Bus 95 SYSON TP_DATA 1 2
6 SMB_EC_CK2 SMB_EC_DA2 SCL2/GPIO46 SYSON/GPIO56 VR_ON SYSON 26,34,36,40
80 121 10K_0402_5%
6 SMB_EC_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 ACIN VR_ON 43
127
AC_IN/GPIO59
2 1
R541 10K_0402_5%
SLP_S3# 6 100 EC_RSMRST#
20 SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# 20
SLP_S5# 14 101 R560 100K_0402_5%
20 SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# 20
EC_SMI# 15 102 1 2
20 EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON 36,39 +3VALW
+3VL LID_SW# 16 103 WL_BLUE_LED#
34 LID_SW# LID_SW#/GPIO0A EC_SWI#/GPXO06 WL_BLUE_LED# 34
ESB_CLK 17 104 SB_PWRGD D33
ESB_CLK R563 34 ESB_CLK ESB_DAT SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF# SB_PWRGD 6,20,43 ACIN
1 2 4.7K_0402_5% 18 GPO 105 2 1 AC_IN 21,38,39
ESB_DAT R576 34 ESB_DAT PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# 17
1 2 4.7K_0402_5% 19 GPIO 106
3 EC_PME#/GPIO0D WL_OFF#/GPXO09 TP_LED# CH751H-40PT_SOD323-2 3
6,20 H_THERMTRIP# 25 107
EC_THERM#/GPIO11 GPXO10 TP_LED# 34
35 CONA# 28 108
FAN_SPEED1/FANFB1/GPIO14 GPXO11
29 2 1
36 VLDT_EN E51_TXD FANFB2/GPIO15 C326 100P_0402_50V8J
34,35 DOCK_SLP_BTN# 30
LANPWR EC_TX/GPIO16
25 LANPWR 31 110
EC_RX/GPIO17 PM_SLP_S4#/GPXID1
34,35 ON/OFF 32 112 ENBKL 11
R543 ON_OFF/GPIO18 ENBKL/GPXID2
34 DIM_LED 34 114 EAPD_CODEC 29
PWR_LED#/GPIO19 GPXID3
+3VL 2 1 36
NUMLED#/GPIO1A GPI GPXID4
115 EC_THERM# 21
116 SUSP#
GPXID5 SUSP# 26,29,36,38,41
4.7K_0402_5% C813 117 PWRBTN_OUT#
GPXID6 PWRBTN_OUT# 20
15P_0402_50V8J 118
GPXID7 PCI_SERR# 19
1 2 CRY2 122
XCLK1
123 124 2 1
XCLK0 V18R C814 4.7U_0805_10V4Z
Y7
1

AGND

SI: Mount C814 for KB926C

GND
GND
GND
GND
GND

3 4 @
NC OSC R545
2 1 20M_0402_5% KB926QFC0_LQFP128_14X14
EC DEBUG port
11
24
35
94
113

69

NC OSC
2

@ 32.768KHZ_12.5PF_9H03200413
JP34
1 1 2 CRY1
1 +5VL +3VL_EC
2 LANPWR
2 E51_TXD C815
3
ECAGND

3 15P_0402_50V8J
4
1

4
ACES_85205-0400 +EC_AVCC L80
0_0603_5%

L81
2

1 2 1 2
C816 0.1U_0402_16V4Z 0_0603_5%
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC KB926/KB conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 33 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com
MDC 1.5 Conn.
Change type 4/25
CAPS LOCK LED
SI: Modify LED footprint
WHITE +5VS_LED

D30 R552
JP25 1 2 1 2
33 CAPS_LED#
1 2 +3VS HT-F196BP5_WHITE 470_0402_5%
HDA_SDOUT_MDC GND1 RES0
20 HDA_SDOUT_MDC 3 4
IAC_SDATA_OUT RES1
5 6
20 HDA_SYNC_MDC
20 HDA_SDIN1 1 R495 2
HDA_SYNC_MDC
HDA_SDIN1_MDC
7
9
GND2
IAC_SYNC
3.3V
GND3
8
10
+3VS
POWER LED(Left 1)
33_0402_5% IAC_SDATA_IN GND4
20 HDA_RST#_MDC 11 12 HDA_BITCLK_MDC 20
1 IAC_RESET# IAC_BITCLK +5VALW_LED 1
WHITE
2 1 1 2
+3VS R496 C777 D27 R549

GND
GND
GND
GND
GND
GND
@ 10_0402_5% @ 10P_0402_25V8K ON/OFFBTN_LED# 1 2 1 2

ACES_88018-124G HT-F196BP5_WHITE 470_0402_5%

13
14
15
16
17
18
1000P_0402_50V7K
C778

C779

0.1U_0402_16V4Z
1 1 1
Connector for MDC Rev1.5
C780
@4.7U_0805_10V4Z CONN@ for debug only Battery Charge LED(Left 2)
2 2 2 +5VALW_LED
BTN TOP WHITE
D28 R550
+3VS 1 3 1 3 ON/OFF 1 2 1 2
33 BAT_LED#
2 4 2 4 HT-F196BP5_WHITE 470_0402_5%

1
10K_0402_5% SW6 SW5

6
5

6
5
R577
SMT1-05_4P SMT1-05_4P HDD LED(Left 3)

2
QSMF-C16E_AMBER-WHITE +5VS_LED
+5VS White
WL_BLUE_LED# 33
+3VS 1 2 1 2

1
R551 470_0402_5%
6 R631

3
10K_0402_5% 3 4 1 2 +5VS
3

Q141A Q138B 21 GSENSOR_LED# R559 470_0402_5%

47K
2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6

2
2 5 Amber
2 31 BT_LED LED1 2
26 WL_LED# 2 10K
1

4
1

6
R505 Q138A
100K_0402_5% 2N7002DW-7-F_SOT363-6
DTA114YKAT146_SOT23-3 2
1

Q115 21 SATA_LED#
DIM LED
2

1
3

+5VALW_LED +5VS_LED
Q141B Q32 Q58
2N7002DW-7-F_SOT363-6 SI2301BDS-T1-E3_SOT23-3 SI2301BDS-T1-E3_SOT23-3
WL_LED 5

S
D

D
+5VALW 3 1 +5VS 3 1
1

R506 1 1

1
100K_0402_5% C836 C845

G
2

2
R587 0.1U_0402_16V4Z 0.1U_0402_16V4Z
10K_0402_5%
2

2 2

2
1
D
2 Q51
33 DIM_LED
G 2N7002_SOT23-3
S

3
3 3

T/P Board (Inculde T/P_ON/OFF)

TP_DATA 1 2 SI: Change to +3VL to support Qplay
TP_CLK R235 @ 0_0603_5%
+5VALW +5V_TP bottom boot in BATT mode
3

D31 SI2301BDS-T1-E3_SOT23-3
PSOT24C_SOT23-3
SWITCH BOARD. +5VS_LED +3VL
S

+5V_TP
D

@ 3 1

CONN@
1

Q85 JP36
G
2

1 @ R645 1
1
C819 10K_0402_5% R605 1 2 @ 0_0402_5% 2
6,32,33,37 SMB_EC_CK1 2
R606 1 2 @ 0_0402_5% 3
6,32,33,37 SMB_EC_DA1 33 ON/OFFBTN_LED# 3
0.1U_0402_16V4Z R603 0_0402_5%
EMI request 33 ESB_CLK 1 2 4
2

JP37 2 R604 0_0402_5% 4

33 ESB_DAT 1 2 5
5
1 33 I2C_INT 6
1 R_PWR_LED 6
2 +5VS_LED +5VALW_LED 1 2 7

1
2 R705 150_0402_5% 7
3 33 LID_SW# 8
1

3 D 10K_0402_5% 8
4 TP_CLK 33 33,35 ON/OFF 9
4 SYSON Q34 R558 9
5 TP_DATA 33 26,33,36,40 SYSON 2 10
5 TP_BTN# 2N7002_SOT23-3 10
6 TP_BTN# 33 G 11
6 TP_LED# GND
7 TP_LED# 33 S SI: Add +5VALW_LED to support 12
3

2
7 GND
8
8 PWR LED S3 flash function ACES_85201-1005N
9 1 1
GND @ @
10
GND C820 C821
4 ACES_85201-08051 100P_0402_50V8J 100P_0402_50V8J 4
2 2
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MDC/KBD/ON_OFF/LID
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 34 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

Atlas/ Saturn Dock

WWW.AliSaler.Com +DOCKVIN JP38

43
43
44
44
+3VS
16 GREEN_L 40 39
D43 40 39
16 RED_L 38 37
D_DDCDATA 38 37
+5VS 1 2 2 16 D_DDCDATA 36 35
R586 1K_0402_5% DOCK_PWR_ON 36 35 DOCK_VOL_UP#
1 16 BLUE_L 34 33 2 1
D_HSYNC 34 33 R589 10K_0402_5%
+3VALW 1 2 3 16 D_HSYNC 32 31
R585 1K_0402_5% D_DDCCLK 32 31 CIR_IN DOCK_VOL_DWN# 2
16 D_DDCCLK 30 29 CIR_IN 30,33 1
1 DAN202U_SC70 USB20_N3 30 29 DOCK_PWR_ON R590 10K_0402_5% 1
20 USB20_N3 28 27

6
D_VSYNC 28 27 MUTELED
16 D_VSYNC 26 25 1 2 MUTE_LED 33

2
Q145A 26 25 DOCK_SLP_BTN# R591 1K_0402_5%
24 23 DOCK_SLP_BTN# 33,34
2N7002DW-7-F_SOT363-6 R588 USB20_P3 24 23 HP_DET#
20 USB20_P3 22 21 JACK_DET# 29,30
22 21 R_VOL_UP# R567 1 DOCK_VOL_UP#
36,42 SYSON# 2 10K_0402_5% 20 19 2 200_0402_5% DOCK_VOL_UP# 33
20 19 R_VOL_DWN# R568 1 DOCK_VOL_DWN#
18 17 2 200_0402_5% DOCK_VOL_DWN# 33
18 17 SPDIFO_L
16 15

1
16 15 AUDIO_OGND
14 13
RJ45_MIDI1+ 14 13 DOCK_LOUT_R
25 RJ45_MIDI1+ 12 11 DOCK_LOUT_R 30
RJ45_MIDI1- 12 11 DOCK_LOUT_L
25 RJ45_MIDI1- 10 9 DOCK_LOUT_L 30
RJ45_MIDI0+ 10 9 DOCK_MIC_R_C
25 RJ45_MIDI0+ 8 7
RJ45_MIDI0- 8 7 DOCK_MIC_L_C
DOCK_PWR_ON Spec 25 RJ45_MIDI0- +V_BATTERY
6
4
6 5
5
3 AUDIO_IGND
4 3
0V = Notebook S4/S5, Dock off PJP5 2
2 1
1 DOCK_PRESENT

2.5V = Notebook S3, Dock on B+ 1 2

41 45
4V = Notebook S0, Dock on 42
41 SHIELD
46
PAD-OPEN 2x2m 42 SHIELD

FOX_QL1122L-H212AR-7F
CONN@

need change to reverse type connector

+3VALW
+1.5VS
2

2
R565
2 R574 2
10K_0402_5%
33_0402_5%
1

CONA# 33

1 1
3

C
Q145B Q7 2 1 2 1 2 SPDIF_OUT 29

220P_0402_50V7K
2N7002DW-7-F_SOT363-6 MMBT3904_NL_SOT23-3 B 0.1U_0402_16V7K R647 150_0402_5%

1
DOCK_PRESENT 1 2 5 E C894

3
R575 1 R573

C944
R572 1K_0402_5% DOCK_LOUT_R SPDIFO_L 1 2 110_0402_5%
4
1

DOCK_LOUT_L
R566 1 1

2
0_0402_5% 2

220P_0402_50V7K

220P_0402_50V7K
47K_0402_5%

C942

C943
2

2 2

R_VOL_UP# R_VOL_DWN#

1 1
C843 C844

3 MIC_Dock Need 600 Ohm 500 mA 2

1000P_0402_50V7K
2
1000P_0402_50V7K
3

L94
FBM-11-160808-601-T_0603
29 DOCK_MIC_R 1 2 DOCK_MIC_R_C

1 2 DOCK_MIC_L_C
29 DOCK_MIC_L
L93
FBM-11-160808-601-T_0603 1 1
C922
C921
220P_0402_50V7K 2 2 220P_0402_50V7K

+3VS

10K_0402_5%
2

SENSE_B# 29
R915
2

R914 D
1

10K_0402_5% 2 Q100
G 2N7002_SOT23-3
1

C S
1

2
R912 MMBT3904_NL_SOT23-3 B
1

10K_0402_5% C E Q18
3

DOCK_MIC_L_C 1 2 2 Q16
4 B MMBT3904_NL_SOT23-3 4
2

2 E
3

R913
47K_0402_5% C978
1
1

1U_0603_10V6K
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DOCK CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 35 of 53

WWW.AliSaler.Com
A B C D E
 A B C D E

WWW.AliSaler.Com Screw Hole

H1 H2 H3
H_4P5X3P0N H_7P0X5P0N H_3P4N

@ @ @
+5VALW TO +5VS

1
+3VALW TO +3VS
+5VALW +5VS H5 H6 H7 H8 H9 H10 H11 H12 H13 H14
4.7U_0805_10V4Z +3VALW +3VS H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0

1 1 @ @ @ @ @ @ @ @ @ @
1 Q35 C833 C835 1
1 1

1
8 1 Q14 C839 C838 4.7U_0805_10V4Z
D S
7 2 8 1
D S 2 2 D S
6 3 7 2
D S D S 2 2 H15 H16 H18 H19
5 4 6 3
D G 1U_0402_6.3V4Z D S H_3P0 H_3P0 H_3P0 H_3P0
5 4
SI4800BDY_SO8 D G
1U_0402_6.3V4Z
SI4800BDY_SO8 RUNON 2 R152 @ @ @ @
4.7U_0805_10V4Z

1 1 B+

0.01U_0402_25V7K
750K_0402_1%

4.7U_0805_10V4Z
1 1

1
C864 RUNON

1
C840 D
2 C834 Q172 SUSP
2 2 2N7002_SOT23-3
G H21 H22 H23 H24 H30 H28 H29
S H_4P2 H_4P2 H_4P2 H_4P2 H_3P3 H_3P3 H_3P3

3
@ @ @ @ @ @ @

1
H27 H25 H32 H33
H_4P0 H_3P0 H_3P3 H_4P0
+1.8V TO +1.8VS @ @ @ @ CF1 CF2 CF3 CF4
1 1 1 1
+1.2VALW TO +1.2V_HT

1
+1.8V +1.8VS
+1.2VALW +1.2V_HT

Q4 1 2 Q11 1 1
IRF8113PBF_SO8 C848 IRF8113PBF_SO8 C846 C862 4.7U_0805_10V4Z
2 8 1 C841 8 1 2
7 2 7 2 +5VL +5VL
10U_0805_10V4Z
6 3 2 1 6 3 2 2
5 5

1
1U_0402_6.3V4Z 1U_0402_6.3V4Z
2 R233 R595 R596
4.7U_0805_10V4Z

1 1 B+
4

0.01U_0402_25V7K
4.7U_0805_10V4Z 1 1 330K_0402_5%
C842 100K_0402_5% 100K_0402_5%

1
C847 D

2
2 1.8VS_ENABLE 1 R138 2 C837 2 Q12 VLDT_EN# SYSON# SUSP
B+ 2 2 35,42 SYSON# SUSP 42
0.01U_0402_25V7K

1 750K_0402_1% G 2N7002_SOT23-3
S

3
1

6
C849 Q132 SUSP
2 2N7002_SOT23-3
G Q142B Q142A
S 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6
3

26,33,34,40 SYSON 5 2 SUSP# 26,29,33,38,41

1
Discharge circuit
+5VS +1.8VS +1.2V_HT +1.8V +1.2VALW
3 3
2

2
R239 R279 R280 R284 R368
470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% @ 470_0805_5%
1

1
1

D D D D D
SUSP 2 Q46 SUSP 2 Q48 VLDT_EN# 2 Q37 SYSON# 2 Q41 EC_ON# 2 Q42
G 2N7002_SOT23-3 G 2N7002_SOT23-3 G 2N7002_SOT23-3 G 2N7002_SOT23-3 G 2N7002_SOT23-3
S S S S S @
3

+5VL +5VL

1
R598
R597 100K_0402_5%
+3VS +0.9V 100K_0402_5%
+1.5VS +1.1VS

2
2

R288 R292 VLDT_EN# EC_ON#

13 VLDT_EN#
470_0805_5% 470_0805_5% R293 R294
470_0805_5% 470_0805_5%

3
1

Q143B
1

2N7002DW-7-F_SOT363-6
1

D D VLDT_EN 2 5
33 VLDT_EN EC_ON 33,39
1

4 SUSP 2 Q47 SYSON# 2 Q49 D D Q143A 4

G 2N7002_SOT23-3 G 2N7002_SOT23-3 SUSP 2 Q50 SUSP 2 Q52 2N7002DW-7-F_SOT363-6

4
S S G 2N7002_SOT23-3 G 2N7002_SOT23-3
3

S S
3

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Circuits
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 36 of 53

WWW.AliSaler.Com
A B C D E
 A B C D

WWW.AliSaler.Com
+3VALW
PQ3

3
TP0610K-T1-E3_SOT23-3

BATT
1
2 AC_LED 38 1

499K_0402_1% 340K_0402_1%
PR1 1
+5VALW
ADP_ID 33

0.01U_0402_25V7K
2 1

2
1

1
PD4

1
PC1
PR8 PC12

PR4 1
100_0402_5% PR2 1000P_0402_50V7K

2
10K_0402_5%
VIN +DOCKVIN

2
RLZ3.6B_LL34
1

2
ACES_88334-057N
ADP_SIGNAL 1 2

8
5 PR3 PR5
5 10K_0402_5% 10K_0402_5%
4 3

P
4 PL1 PL2 +
3
3
0
1 2 1 BATT_OVP 33
2 SMB3025500YA_2P SMB3025500YA_2P 2

G
2 -

105K_0402_1%
1 ADPIN 1 2 2 1

PR6 1
1

0.01U_0402_25V7K

4
1
PJP1 PU1A

100P_0402_50V8J

PC6
LM358ADT_SO8

1000P_0402_50V7K

2
2

100P_0402_50V8J
PD1

2
1

1
PC5
PC4
PC3
2

2
PC2

1000P_0402_50V7K
1

2 PJSOT24C_SOT23-3 2

VMB
PL3 BATT
PJP2 SMB3025500YA_2P
1 1 2
1
2
2
3 EC_SMD PD2
PH1 under CPU botten side :
3 EC_SMC @ SM05_SOT23
4
4
5 3
CPU thermal protection at 90 +-3 degree C
1

1
5
6 1 Recovery at 47 +-3 degree C
6
7 2
7 PC9
8 PC8
2

8 1000P_0402_50V7K 0.01U_0402_50V4Z PR7

9
GND +5VS
10 47K_0402_1%
3

GND
3 @ SUYIN_200275MR008GXOLZR CPU 1 2
3
1
1

1
PD3
1

@ SM24.TC_SOT23-3 PH1
PR14
PR13 100_0402_5% 10K_TH11-3H103FT_0603_1%
100_0402_5%
2

PU1B ENTRIP1 39
2

2
+3VL SMB_EC_DA1 PR10 LM358ADT_SO8
SMB_EC_DA1 6,32,33,34

8
15K_0402_1%

1
D
1 2 1 2 5

P
SMB_EC_CK1 + PQ1
PR9 SMB_EC_CK1 6,32,33,34 7 2
0 G SSM3K7002FU_SC70-3
10K_0402_5% 1 2 6

G
-
BAT_ID 38 +5VALW PR11 S

3
1 150K_0402_1%

4
1

1
+3VL PC10 PR12
PR16 2.55K_0402_1%
6.49K_0402_1% 0.22U_0603_10V7K PR15
2

1 2 150K_0402_1% PC11
2

2
1000P_0402_50V7K ENTRIP2 6,39

2
1

1
PR17 D
1K_0402_5% 2 PQ2
G SSM3K7002FU_SC70-3
2

3
BATT_TEMP 33
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Connector/CPU_OTP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

WWW.AliSaler.Com
Date: Thursday, November 08, 2007 Sheet 37 of 52
A B C D
 A B C D

WWW.AliSaler.Com
P4 B+

BATT
VIN P2
PQ102
AM4835EP-T1-PF_SO8
1 8
PQ101 PQ103 PR102 PL101
1
2 7 1
AM4835EP-T1-PF_SO8 AM4835EP-T1-PF_SO8 0.012_2512_1% HCB2012KF-121T50_0805 3 6
8 1 1 8 1 2 1 2 CHG_B+ 5
7 2 2 7 PR103
6 3 3 6 47K_0402_5%

4
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
5 5 1 2 1 2
PR101 VIN
47P_0402_50V8J

1
47K_0402_5% PR104 ACDET PC102

0.1U_0603_25V7K
4

1
PC103

PC104

PC105
1 2 0_0402_5% 1U_0603_6.3V6M
33 AC_SET 1 2 ACSET

2
1

PR105
PC101

1
0.22U_0603_16V7K
DTA144EUA_SC70-3 10K_0402_5%

PC108
1

1
PQ104
2

2
200K_0402_5%
1
PC107 PC109

2
PC106

PR106
2 @ 0.01U_0402_16V7K @ 0.1U_0603_25V7K ACOFF#

2
CHG_B+

2
1

CHGEN#

2
PR108 37 AC_LED PR139

1
PR107 10_1206_5% 100K_0402_5%

1
47K_0402_1% 1 2 +3VL 1 2
1

1 2 2

LPREF

ACSET

ACDET

ACP
LPMD

ACN

CHGEN

1
D
29

5
6
7
8
PR110 TP PC110 PACIN 2 2 ACOFF 33
PQ105 0_0402_5% 1U_0805_25V6K G
1

D DTC115EUA_SC70-3 26,29,33,36,41 SUSP# 1 2 8 28 1 2 S PQ114

3

3
2 PQ107 IADSLP PVCC PC111 SSM3K7002FU_SC70-3
G SSM3K7002FU_SC70-3 0.1U_0402_10V7K PQ108

3
S PR109 9 27 BST_CHG 1 2 4 AO4466_SO8 PQ106
3

150K_0402_5% AGND BTST DTC115EUA_SC70-3

PC112 BQ24740VREF PU101
2

1 2 10
VREF
BQ24740RHDR_QFN28_5X5
HIDRV
26 DH_CHG
PL102 PR112
BATT

3
2
1
1U_0603_6.3V6M +3VL 10U_LF919AS-100M-P3_4.5A_20% 0.02_1206_1%
PR111 11 25 LX_CHG 1 2 1 2
1

3K_0402_1% D VDAC PH

1
PACIN 1 2 2 PQ109 PD102

5
6
7
8
G SSM3K7002FU_SC70-3 PR113 VADJ 12 24 REGN 2 1
143K_0402_1% VADJ REGN
S
3

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
2 ACOFF# 1 2 PR114 RLS4148_LL34-2 2

@ 0_0402_5% 13 23 DL_CHG
2
EXTPWR LODRV

1
PD101 33 VCTRL 1 2 PQ110

PC113

PC114

PC115

PC116
RLS4148_LL34-2 4 AO4466_SO8
1

14 22

2
ISYNSET PGND
1

DPMDET
1
PC117 PR115

IADAPT
1 2

SRSET

CELLS

1
1U_0603_10V6K 100K_0402_1% PC119

SRN

SRP
2

3
2
1
BAT
PR116
2

39K_0402_5% 1U_0603_10V6K PC118

2
0.1U_0402_10V7K

15

16

17

18

19

20

21
PR117

IADAPT
100K_0402_5%
PR118 1 2
Charge Detector 10K_0402_5%
BQ24740VREF

1
1 2
33 ADP_I @ 47K_0402_5%

100P_0402_50V8J
0.22U_0603_10V7K
1

1
PR119

1
D
PC120

PC121

2
PQ111 2 BAT_ID 37
2

2
SSM3K7002FU_SC70-3 G

BATT
S

0.1U_0603_25V7K

@0.1U_0603_25V7K
PR120
2 1 IREF 33

1
PC122
PC124
49.9K_0402_1%

1
PC123
1

0.1U_0402_10V7K PR122

2
PR121 1M_0402_5%
200K_0402_1% 1 2
2

PR123
2

1M_0402_5%
3
1 2 3

P2 PR124
BQ24740VREF VIN 1K_0402_5%
VIN 1 2
+3VL AC_IN 21,33,39
1

1
PR125 PR126
10K_0402_5%
1

47_1206_5% 133K_0402_1% PR127

VIN PR130 10K_0402_1%
1

8
10K_0402_1%

+3VL
PR128

2.15K_0402_1% PU102B
2

2
1 2 5

P
+
1

PR129

7 PACIN
2
1

1
100K_0402_5%

O PACIN
PR131 6

G
PC125 CHGEN# -
133K_0402_1%
2

1
PR132

0.1U_0603_25V7K PC126 LM393DG_SO8

2

4
PR133

1
0.047U_0402_16V7K 10K_0603_0.1%
2

PR134
2

2
1

D PD103
3 10K_0402_5%
P

2
+ PQ112 RLZ4.3B_LL34
1 2
1

O SSM3K7002FU_SC70-3
2 G
G

2
- PU102A S
3

PR135
LM393DG_SO8 FSTCHG#
4

10K_0603_0.1% PR136
49.9K_0402_1%
2

D
1 2 P2
1.24VREF 33 FSTCHG 2 PQ113
G SSM3K7002FU_SC70-3
S
3

STD_ADP 33
PU103

4 3 1.24VREF
ACDET REF CATHODE
1 2

1
PC127 2
PR137 NC
22P_0402_50V8J
1
100K_0402_1%

4 4
20K_0402_1% 5 1

2
ANODE NC
PR138

LMV431ACM5X_SOT23-5
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Charger
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 38 of 52

WWW.AliSaler.Com
A B C D
 A B C D E

WWW.AliSaler.Com
2VREF_51125

0.22U_0603_10V7K

1
1 1

PC302

2
PR301 PR302
13.7K_0402_1% 37.4K_0402_1%
1 2 1 2

PR303 PR304
B+ B++
20K_0402_1% 24K_0402_1%
B++
PL301 1 2 1 2
HCB2012KF-121T50_0805

1 2 +3VLP

ENTRIP2

ENTRIP1
2200P_0402_50V7K

2200P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
PR305 PR306

1
180K_0402_1% 150K_0402_1%
1

10U_0805_6.3V6M
PC301

PC303

PC304

PC305

PC313
1 2 1 2

2
2

5
6
7
8
PC306
PU301

8
7
6
5

ENTRIP2

VFB2

TONSEL

VREF

VFB1

ENTRIP1
25 PQ302
2 P PAD AO4466_SO8 2

2
PQ301
AO4466_SO8 7 24 4
VO2 VO1
4

UG1_5V
UG1_3V
8 23 PR308 PC308
PR307 VREG3 PGOOD 0_0402_5% 0.1U_0402_10V7K
PR309 1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2 PR310

3
2
1
0_0402_5% 0_0402_5% VBST2 VBST1 0_0402_5%
1
2
3

PL302 1 2 PC307 UG_3V 10 21 UG_5V 1 2 PL303

4.7UH_SIQB74B-4R7PF_4A_20% 0.1U_0402_10V7K DRVH2 DRVH1 10U_LF919AS-100M-P3_4.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2
+3VALWP LL2 LL1
8
7
6
5

5
6
7
8
LG_3V 12 19 LG_5V +5VALWP
DRVL2 DRVL1
+3VL

SKIPSEL

150U_D_6.3VM
VREG5
1

VCLK
1

GND
EN0

VIN

100K_0402_5%
PC309

+
150U_D_6.3VM

PQ303

PC310
AO4466_SO8 4 4 +

13

14

15

16

17

18
2

PR316
TPS51125RGER_QFN24_4X4
2
VL
1
2
3

3
2
1
620K_0402_5%
PQ304

1
FDS6690AS_NL_SO8
1 2 1 2 3/5V_OK 41

PR311

PC311
10U_0805_10V6K
PR312 PR318 0_0402_5%

1
@ 0_0402_5%

2
3 PR317 3
0_0402_5%

2
37 ENTRIP1 6,37 ENTRIP2

1
B++

0.1U_0603_25V7K
2
PC312
2VREF_51125
1

D D
PQ305 2 2 PQ306
SSM3K7002FU_SC70-3 G G SSM3K7002FU_SC70-3
S S
+5VL
3

VL
PJP304
2 1
PJP302 PAD-OPEN 2x2m
1 2
VL +5VALWP 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
PR313 +3VLP +3VL
PAD-OPEN 4x4m
PQ308 100K_0402_5% PJP301
1

D D PJP303
SSM3K7002FU_SC70-3 PQ307 2 1
21,33,38 AC_IN 1 2 2 2
EC_ON 33,36
+3VALWP
1 2 +3VALW (3A,120mils ,Via NO.= 6)
G G PAD-OPEN 2x2m
PR315 S S SSM3K7002FU_SC70-3
3

PAD-OPEN 4x4m
1

PC314
0.022U_0603_25V7K

604K_0402_1%
1

4 4
2

100K_0402_5%
PR314
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 39 of 52
A B

WWW.AliSaler.Com C D E
 A B C D

WWW.AliSaler.Com

1 1

PL401
PR401
0_0402_5% HCB1608KF-121T30_0603
1 2 1.8V_B+ 1 2 B+
26,33,34,36 SYSON
1

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2200P_0402_50V7K
PC401

1
@ 1000P_0402_50V7K
2

1
PC406

PC403

PC404
PC405
@680P_0402_50V7K

2
+5VALW PC407

2
5
6
7
8
BST_1.8V
1+5VALW

1 2 1 2
PQ401
PR404 AO4466_SO8
0_0402_5% 0.1U_0402_10V7K

PR403 DH_1.8V 4

15

14
2 2

1
316_0402_1% PU401
PR405

EN_PSV

TP

VBST
255K_0402_1%
2

1 2 2 13 DH_1.8V_1 1 2 PL402

3
2
1
TON DRVH PR407 2.2UH_PCMC063T-2R2MN_8A_20%
PR406
+1.8VP 2 1 3 12 LX_1.8V 0_0402_5% 1 2 +1.8VP
VOUT LL
0_0402_5%
4 11 1 2

5
6
7
8

1
V5FILT TRIP

220U_6.3VM_R15
PR408
5 10 +5VALW 12.1K_0402_1% PR410
VFB V5DRV @ 4.7_1206_5% 1
1

1
PC411 6 9 DL_1.8V PC415
PGOOD DRVL

PGND

PC409
1U_0603_10V6K 4.7U_0805_10V6K +
GND

2 2
4
2

2
+1.8VP PC410
2
7

PR411
1 2 @ 680P_0603_50V7K

1
14.3K_0603_0.1% TPS51117RGYR_QFN14_3.5x3.5 PQ402

3
2
1
FDS6690AS_NL_SO8
1 2
PC413
@ 10P_0402_50V8J
1

PR409
10K_0603_0.1%
3 3
2

4 4

PJP401

+1.8VP 1 2 +1.8V (7A,280mils ,Via NO.= 14)

PAD-OPEN 4x4m

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.8VP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

WWW.AliSaler.Com
Date: Thursday, November 08, 2007 Sheet 40 of 52
A B C D
 5 4 3 2 1

WWW.AliSaler.Com

D D
PR501 PR502 PR503 PR504
11.5K_0402_1% 24.9K_0402_1% 18.7K_0402_1% 11.5K_0402_1%

+1.1VSP 1 2 1 2 2 1 2 1 +1.2VALWP
B+++

B+++

2
PR505 B+++ B+
0_0402_5% PL502

2200P_0402_50V7K
HCB2012KF-121T50_0805
4.7U_0805_25V6-K

4.7U_0805_25V6-K 2 1

1
1

1
PC501

PC516

PC502
2

1.1VS_POK

2200P_0402_50V7K
4.7U_0805_25V6-K
8
7
6
5

5
6
7
8
PC503 PU501
0.022U_0603_25V7K PQ502

VO2

VFB2

TONSEL

GND

VFB1

VO1

1
25 AO4466_SO8

2
P PAD

PC504

PC505
PQ501

2
AO4466_SO8 4 7 24 4
C PGOOD2 PGOOD1 C
PC507
PC506 PR506 8 23 PR507
EN2 EN1 0.1U_0402_10V7K
0.1U_0402_10V7K 0_0402_5% 0_0402_5%
+1.1VSP 2 1 2 1 BST_1.1V 9 22 BST_1.2V 2 1 1 2
1
2
3

3
2
1
VBST2 VBST1
+1.2VALWP
PL501 UG1_1.1V 2 1 UG_1.1V 10 21 UG_1.2V 2 1 UG1_1.2V PL503
2.2UH_PCMC063T-2R2MN_8A_20% 0_0402_5% PR508 DR VH2 DR VH1 PR509 3.3UH_SIQB74B-3R3PF_5.9A_20%
+1.1VSP 2 1 LX_1.1V 11 20 LX_1.2V 0_0402_5% 1 2 +1.2VALWP
LL2 LL1
LG_1.1V 12 19 LG_1.2V
8
7
6
5

DR VL2 DR VL1

5
6
7
8
PGND2

PGND1
1

V5FILT
TRIP2

TRIP1
PQ504 1

V5IN
1

PC508 + AO4466_SO8

2
220U_D2_4VM PC509 +
4.7U_0805_6.3V6K 4 TPS51124RGER_QFN24_4x4 PC510 PC511
2

13

14

15

16

17

18
2 4 4.7U_0805_6.3V6K 220U_6.3VM_R15

1
2
PQ503

1
FDS6690AS_NL_SO8
1
2
3

PR511 PR512

3
2
1
19.1K_0402_1% PR510 0_0402_5%
1 2 19.1K_0402_1% 1 2
3/5V_OK 39

2
PR513
21K_0402_1%
2 1
26,29,33,36,38 SUSP#

1
PC512
B @ 0.1U_0402_16V7K B
1 2 +5VALW

2
PR514
3.3_0402_5%
1

1
PC513 PC514 PC515
0.1U_0402_10V7K 1U_0603_10V6K 4.7U_0805_10V6K
2

PJP501
+1.1VSP 1 2 +1.1VS (6A,240mils ,Via NO.=12)
PAD-OPEN 4x4m

PJP502
+1.2VALWP 1 2 +1.2VALW (4A,160mils ,Via NO.=8)
PAD-OPEN 4x4m

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.1VSP/1.2VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4091P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 41 of 52
5 4

WWW.AliSaler.Com 3 2 1
 5 4 3 2 1

WWW.AliSaler.Com

D D

+1.8V
+1.8V

PU601
1 6 PU603
VIN VCNTL +5VALW 1 6

@10U_0805_10V4Z
2 5
VIN VCNTL +5VALW

10U_0805_10V4Z
1

1
GND NC

PC602
2 5

1
PC601 GND NC

PC609
3 7

1
VREF NC PC613
10U_0805_10V4Z 3 7

1
PR601 PC603 VREF NC
4 8 10U_0805_10V4Z

2
1K_0402_1% VOUT NC 1U_0603_16V6K PR606 PC612
4 8

2
1K_0402_1% VOUT NC 1U_0603_16V6K
9

2
TP @ 9

2
G2992F1U_SO8 TP
G2992F1U_SO8
1 2 VREF1.5V
35,36 SYSON#
PR602 +0.9VP

1
0_0402_5%

0.1U_0402_16V7K

0.1U_0402_16V7K
+1.5VSP

1
PQ601
SSM3K7002FU_SC70-3 PR603 PQ602

1
D SSM3K7002FU_SC70-3

PC604
1K_0402_1% PR607

1
PC605 D
1 2 2
36 SUSP 5.1K_0402_1%

2
G 10U_0805_6.3V6M 1 2 2 PC614
PR604 36 SUSP

2
@ 0_0402_5% 10U_0805_6.3V6M

PC611
S PR608 G

2
1
0_0402_5% S

3
C PC606 C

2
@ 0.1U_0402_16V7K PC610

2
@ 0.1U_0402_16V7K

(500mA,40mils ,Via NO.= 1)

PU602
APL5508-25DC-TRL_SOT89-3 +2.5VSP

B PJP601 +3VS B
2 3
IN OUT
1 2 (2A,80mils ,Via NO.= 4)

4.7U_0805_6.3V6K
+0.9VP +0.9V 1U_0603_6.3V6M
1

1
GND
PAD-OPEN 3x3m
PR605
PC607

PC608
PJP602 1 @ 150_1206_5%
2

2
+2.5VSP 1 2 +2.5VS (500mA,40mils ,Via NO.= 1)

2
PAD-OPEN 3x3m

PJP603
+1.5VSP 1 2 +1.5VS (1A,40mils ,Via NO.= 2)
PAD-OPEN 3x3m

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/11/23 Deciphered Date 2007/11/23 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.9VSP/2.5VSP/1.5VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4091P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 42 of 52
5 4 3 2 1

WWW.AliSaler.Com
 5 4 3 2 1

WWW.AliSaler.Com 4.7UH_SIQB74B-4R7PF_4A_20%

2
PL201

1
+CPU_CORE_NB

PQ201 PQ202
1

10U_0805_6.3V6M
6 VDD_NB_FB_H AO4466_SO8 AO4466_SO8

1
+ PC202 1 8 1 8 CPU_B+

PC201
220U_B2_2.5VM 2 7 2 7
3 6 3 6

1
2 5 5 PC204
4.7U_0805_25V6-K
6 VDD_NB_FB_L

2
D D

2
PC203
PR203 2200P_0402_50V7K
PR204 0_0402_5%
22K_0402_1%
1 2

UGATE NB1
PHASE NB
LGATE NB
1 2

PC205
1000P_0402_50V7K

0_0402_5%
PR205

0_0402_5%
2_0402_5%
1 2
+5VS

1
B+

44.2K_0402_1% 1200P_0402_50V7K

1
CPU_B+
PC207 PL202

33P_0402_50V8K
0.1U_0402_16V7K PC206

11.3K_0402_1%
2

1
0.1U_0603_16V7K SMB3025500YA_2P

BOOT_NB1 2
PC209

PC208
2 1

PR207
+5VS

2200P_0402_50V7K

1000P_0402_50V7K
1

1
PR208
2_0402_5% 1

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
PR206 2

PR209 2

1
@47U_25V_M
1 2
CPU_B+

PC235

PC234

PC212

PC213

PC214

PC211

PC215
PC210 +
2.2U_0603_6.3V6K
1

2
2
2

PR210
PC216 PR211

5
6
7
8
0.1U_0603_25V7K 1_0603_5%
2

PQ203

VSEN_NB

D
D
D
D
RTN_NB
SI4684DY-T1-E3_SO8
2

2
+5VS
1 2
+3VS

UGATE NB
PHASE NB
PR212

LGATE NB

G
S
S
S
0_0402_5%
1 2

BOOT_NB

4
3
2
1
PR213
C @ 0_0402_5% 2.2_0603_5% 0.22U_0603_10V7K UGATE0_1 C
1 2 PR214 PC217 0.36UH_PCMC104T-R36MN1R17_30A_20%
10K_0402_1%
1

48

47

46

45

44

43

42

41

40

39

38

37
1 2 1 2 2 1 +CPU_CORE_0
PR215 PU201

4.7_1206_5%

16.5K_0402_1%
5
6
7
8

5
6
7
8

1
PR216

@ 10K_0402_5% PL203
FB_NB

COMP_NB

FSET_NB

VSEN_NB

RTN_NB

OCSET_NB

PGND_NB

LGATE_NB

PHASE_NB

UGATE_NB
VIN

VCC

PR220

PR221
1 2

BOOT0
0_0603_5%

680P_0603_50V8J
2

1 36 PR219
OFS/VFIXEN BOOT_NB PR217

1 2

2
2 35 4 4 4.02K_0402_1%
PGOOD BOOT0

PC218
33 VGATE PQ204 @ 1 2
3 34 UGATE0 AO4456_SO8
6,20,33 SB_PWRGD PR218 PWROK UGATE0 PQ205 PC219 1 2

2
1 2 SVD 4 33 PHASE0 AO4456_SO8 0.1U_0603_25V7K

3
2
1

3
2
1
6 CPU_SVD 0_0402_5% SVD PHASE0 ISP 0
PR222 1 2 SVC 5 32 @
6 CPU_SVC 0_0402_5% SVC PGND0
CPU_B+
6 31 LGATE0

2200P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
33 VR_ON PR223 PR224 ENABLE LGATE0

5
6
7
8
1 2 1 2 7 30

1
RBIAS PVCC

PC220

PC221

PC222

PC237

PC236
PQ206

D
D
D
D
17.8K_0402_1% 100K_0402_1% 8 29 LGATE1 SI4684DY-T1-E3_SO8
OCSET LGATE1

2
PR225 PC223 9 28

G
VDIFF0 PGND1

S
S
S
1 2 1 2 ISL6265IRZ-T_QFN48_6X6
10 27 PHASE1

4
3
2
1
255_0402_1% 4700P_0402_25V7K FB0 PHASE1 PR226
PR227 11 26 UGATE1 1 2 UGATE1_1
COMP0 UGATE1 0_0603_5% 0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2
12 25 BOOT1 1 2 1 2 2 1
VW0 BOOT1 +CPU_CORE_1
COMP1

1K_0402_1% PR228 PL204

VDIFF1
VSEN0

VSEN1

5
6
7
8

5
6
7
8

1
RTN0

RTN1

2.2_0603_5% PC224
ISN0

ISN1
ISP0

VW1

ISP1

16.5K_0402_1%
1
FB1

0.22U_0603_10V7K PR229
TP

PR231
PR230 PC225 @ 4.7_1206_5%
1 2 1 2
13

14

15

16

17

18

19

20

21

22

23

24

49
+CPU_CORE_0

2
54.9K_0402_1% 1200P_0402_50V7K PR232 4 4

2
1 2 1 2 PR233

1
PC227 4.02K_0402_1%
B B
180P_0402_50V8J 6.81K_0402_1% +CPU_CORE_1 PQ207 PQ208 PC226 1 2
ISP 0

@ 680P_0603_50V8J
3
2
1

3
2
1

2
ISP 1 AO4456_SO8 AO4456_SO8 PC229
1 2 PC230 0.1U_0603_25V7K 1 2
PC228 1000P_0402_50V7K
1000P_0402_50V7K 2 1

PC231
1 2 VSEN0 180P_0402_50V8J ISP 1
6 CPU_VDD0_FB_H PR235 0_0402_5%
1

2 1 2 1
PC238 PR236 PR238
@ 1000P_0402_50V7K 6.81K_0402_1% 54.9K_0402_1%
2

1 2 RTN0 2 1 2 1
6 CPU_VDD0_FB_L PR237 0_0402_5%
PC232
1 2 RTN1 1200P_0402_50V7K
6 CPU_VDD1_FB_L PR239 0_0402_5% PR240
1

1K_0402_1%
PC239 2 1
@ 1000P_0402_50V7K
2

1 2 VSEN1 PR243
6 CPU_VDD1_FB_H PR241 0_0402_5% 255_0402_1%
2 1 2 1

4700P_0402_25V7K
PC233

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/11/23 Deciphered Date 2007/11/23 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4091P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 43 of 52

5 4

WWW.AliSaler.Com
3 2 1
 Version Change List ( P. I. R. List ) for Power Circuit
A B C D E

WWW.AliSaler.Com
Request
Item Page# Title Date Issue Description Solution Description Rev.
Owner
PU401 change the IC from "S IC RT8204PQW WQFN 16P" to
1 1 40 1.8VP 10/23 Compal for power requset "S IC TPS51117RGYR QFN 14P". 1

2 38 Charger 10/30 Compal for power requset PQ104 swap the PQ104 1,3 Pin

3 39 3V/5V 10/30 Compal for power requset Change PR301 to 13.7K modify output voltage

4 39 3V/5V 10/30 Compal for power requset Change PR305 to 180K modify OCP

5 39 3V/5V 10/30 Compal for power requset Change PR306 to 150K modify OCP

6 39 3V/5V 10/30 Compal for power requset Change PR311 to 620K

7 39 3V/5V 10/30 Compal for power requset Change PR315 to 604K modify sequence

8 41 +1.1VSP 10/30 Compal for power requset Change PR510 to 19.1K modify OCP

2 9 41 +1.2VALWP 10/30 Compal for power requset Change PR511 to 19.1K modify OCP 2

10 38 Charger 10/30 Compal for power requset Del PR119

11 43 CPU_CORE 10/30 Compal for power requset Change PC202 to B2 type for ME limit

12 43 CPU_CORE 10/30 Compal for power requset Change PR223 to 17.8K and PR224 to 100K modify OCP

13 43 CPU_CORE 10/30 Compal for power requset Change PR221,PR231 to 16.5K and PR217,PR233 to 4.02K
for CPU_CORE compensation

14 37 DC connector 10/30 Compal for power requset Add PR3,PD4,PC12 for ADP_ID function

15 39 3V/5V 10/30 Compal for power requset Add PR317,PR318

16 38 Charger 10/30 Compal for power requset Change net from +3VLP to +3VL

3 3
17 41 +1.1VSP 10/30 Compal for power requset Change PR513 to 21K for HW power scquence.

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Changed-List History-1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4111P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 44 of 52

WWW.AliSaler.Com
A B C D E
 5 4 3 2 1

WWW.AliSaler.Com
HW4 Product Improvement Record (P.I.R.)

D D

C C

B B

ZZZ2

RTC
45@ RTC

ZZZ

PCB
PCB 03X LA-4091P REV0 M/B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/5/18 Deciphered Date 2008/5/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 08, 2007 Sheet 45 of 53
5 4

WWW.AliSaler.Com 3 2 1