University of Salahaddin – College of Engineering

Software & Informatics Dep.

Computer Architecture II
2022-2023

Lecture 6

Lecturer
Nyan D. Sallman
Basic Logical Instruction
• AND A B T

A T
0 0 0
0 1 0
B 1 0 0
1 1 1

XXXX XXXX unknown number

AND 0000 1111 mask
0000 XXXX result
ANDing instruction
• AND AL,BL
• AND CX,DX
• AND ECX,EDI
• AND CL,33H
• AND DI,4FFFH
• AND AX,[DI]
• AND ARRAY[SI],AL
OR ing
• OR
A B T
A T 0 0 0
B 0 1 1
1 0 1
1 1 1

XXXX XXXX unknown number

OR 0000 1111 mask
XXXX 1111 result
ORing instruction
• OR AH,BL
• OR SI,DX
• OR EAX,EBX
• OR DH,A3H
• OR SP,9900H
• OR DX,DATA[BX]
Exclusive OR
• XOR A B T
A T 0 0 0
0 1 1
B 1 0 1
1 1 0

XXXX X X X X unknown number

XOR 0000 1 1 1 1 MASK
XXXX X X X X RESULT
XOR INSTRUCTION
• XOR CH,DL
• XOR SI,BX
• XOR EBX, EDI
• XOR DI,00DDH
• XOR DX,[SI]
EXAMPLE * : Show a short sequence of instruction to
clear bits 0 and 1 of CX, sets bit 9,and 10 of CX , and
invert bit 12

AND CX, 0FFFCH

OR CX, 0600H
XOR CX , 1000H
TEST AND BIT TEST instruction
• Perform AND operation without change the
destination only the flags will be change (Z flag =1
indicating zero result, if Z=0 indicating result not
zero’s)

• TEST DL,DH
• TEST CX,BX
• TEST EDX,ECX
• TEST AH,4
• TEST EAX,256
Example :
TEST AL,1 ; test right bit
TEST AL,128 ; test left bit

Bit test in 386 through pentium4

BT test destination operand with source operand
BTC test and complement bits of destination specified by
the source

BTR test and reset bits of destination specified by the

source
BTS test and set bits of destination specified by the source
• EXAMPLE * : Show a short sequence of instruction to clear
bits 0 and 1 of CX, sets bit 9,and 10 of CX , and invert bit 12

• BTS CX,9
• BTS CX,10
• BTR CX,0
• BTR CX,1
• BTC CX,12
NOT and NEG
• NOT implement one’s complement
• NEG implement two’s complement(arithmetic sign change)

NOT CH
NEG CH
NEG AX
NOT EBX
NOT BYTE PTR[BX]
SHIFT and ROTATE
• Shift operation
C
SHL 0

C
SAL 0

SHR 0 C

SAR
sign bit
Shift instructions
SHL AX,1
SAR BX,12
SHR ECX,10
SAL DATA1,CL
Note : left shift (multiplication by power 2 each bit shift)
While right shift (division by 2 each bit shift )
EXAMPLE : multiply AX by 10
SHL AX,1 ; AX times 2
MOV BX,AX
SHL AX,2 ; AX times 8
ADD AX,BX ; AX times 10
EXAMPLE : multiply AX by 18
SHL AX,1 ; AX times 2
MOV BX,AX
SHL AX,3 ; AX times 16
ADD AX,BX ; AX times 18

Example : multiply AX by 5
MOV BX,AX
SHL AX,2 ; AX times 4
ADD AX,BX ; AX times 5
Rotate instruction
• Rotate
C
RCL
C
ROL

RCR C

ROR
Rotate instruction
• ROL SI,14
• RCL BL,6
• ROL ECX,18
• RCR AH,CL
• ROR WORD PTR[BP],2