UNIT 3: PROCESSING UNIT

D r. E . E L A K I YA
D E PA RT M E N T O F C O M P U T E R S C I E N C E A N D E N G I N E E R I N G
N AT I O N A L I N S T I T U T E O F T E C H N O L O G Y, P U D U C H E R RY
SINGLE BUS ORGANIZATION
MULTIPLE BUS ORGANIZATION
• In a single bus structure control sequence are quite long only one data item can be transferred
over the bus
• To reduce the number of steps commercial processors provide multiple internal path that enable
several transfers to take place in parallel
• All general purpose register are combined into a single block called register file.
• Buses A and B are used to transfer the source operands to the A and B inputs of the ALU
• Results are transferred to destination over Bus C
• If needed ALU pass one of its operand unmodified to Bus C R=A (or) R=B
• Increment unit increment PC by 4
• ALU constant 4 is used to increment other addresses such as Load Multiple and Store Multiple.
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