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Review and Development of MMC Employed in VSC-HVDC Systems
Review and Development of MMC Employed in VSC-HVDC Systems
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2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)
than LLC, interest in VSC is increasing as it offers benefits so that each step in voltage waveform is a fraction of the total
depicted in Fig. 2. voltage swing [5]. Moreover, the switching frequency of each
No need for extra As the distance of the individual power electronics switch is smaller than that of a
Rapid and compensating tools; Q can transmission lines two-level converter. The voltage step at each level is smaller.
independent be controlled at both increase, a mean of Q
control of P and terminals independently of power compensation is
These two factors result in a reduced switching loss [3].
Q the DC transmission voltage required to make up the
level capacitive loss Single-phase/DC [11], [56] Three-phase/DC [33] Three-phase/three phase (back-to-back) [41]
VSC-HVDC Configurations
The Modular Multilevel Converters (MMCs) use a stack of
identical modules, each provides one step in the resulting
Monopolar Bipolar Back-to-Back Multi-terminals
multilevel AC waveform [4]. The topology is easily adaptable
to any voltage level, as the number of modules can be adjusted
Monopole system
with ground Back-to-Back Parallel Multiterminal in proportion to the selected DC voltage. The resulting
system
Rectification Inversion
systems Power flows from Power flows from
HVDC network [1]-[5].
𝑋 𝐼2 ∠𝛿 +𝑄 AC to DC DC to AC
On-element: D2 On-element: S1
C. MMC Conversion
VDC/2 Vo-VAo
S1 D1
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2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)
Phase reactor VDC The voltage produced by an MMC arm is equivalent to n in the
Phase
Unit arm, which are turned-on, multiplied by VC shown in (7) and
VSM ISM VC
(8). Incorporating suitable control of the SMs, the output phase
Sub- and voltage can be independently controlled. The voltage levels
Multi-
module
valve that an MMC can produce at its output is equivalent to the
SM1 SM1 SM1
number of SMs in a single arm plus one
SM2 SM2 SM2
𝑉𝑢𝑎 = 𝑛𝑜𝑛𝑢𝑎 𝑉𝑐 (10)
SMn SMn SMn
and the upper witching valve turned off, the SM capacitor is Detailed Equivalent
Circuit Model
Function Model
𝑉 𝑑𝐼𝑢𝑎
𝑉𝑎 = 𝑑⁄2 − 𝑉𝑢𝑎 − 𝐿𝑎𝑟𝑚 − 𝑅𝑎𝑟𝑚 𝐼𝑢𝑎 (6) Figure 7: Physical representation of a VSC-HVDC system with different
𝑑𝑡 modells
In detailed equivalent model, the series-connected SMs are
detached from each arm, divided and driven by a current source
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2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)
with a value equal to Iarm. A controllable voltage source (Varm) [3]. The former group comprises a Q-controller and AC voltage
substitutes the SMs as proposed in [5] with a value given by controller, whereas the latter includes a P-controller and DC
voltage controller. The AC frequency controller was applied to
𝑛
regulate the grid-tied VSC applications that is a weak AC
𝑉𝑎𝑟𝑚 = ∑ 𝑉𝑆𝑀𝑖 (12) system forming an offshore oil platform.
𝑖=1 It is paramount noting that not all the controllers can be used
simultaneously. Only one from each category (P/Q power
V. CONTROL SCHEME channel) can be used at a given time, depending on the network
A simplified schematic diagram for the three-phase MMC configuration and the system specifications.
control scheme is depicted in Fig. 8. In the magnitude invariant synchronous reference frame with
the q-axis aligned with Va, P and Q power flow at PCC can be
P*
Outer-loop I* Current Vc* + V*
Nearest expressed as (15) and (16), respectively. Feed-forward
Level
controller controller - controllers are implemented to set Iq and Id values to control P
Q* Controller Gate
Signal
and Q, respectively
Vdiff* 3
Capacitor 𝑃 = (𝑉𝑠𝑑 𝐼𝑑 ) (15)
Icirc.* =0 CCSC Balancing 2
Controller
3
𝑄 = − (𝑉𝑠𝑑 𝐼𝑞 ) (16)
VSM Iarm 2
Figure 8: Simplified MMC control scheme C. Circulating Current Suppressing Controller (CCSC)
A. Current Controller This current is seen as a negative-sequence (a-c-b) current at
The impedance between the AC side system voltage Vs(abc) twice the fundamental frequency [2]. It leads to increasing the
and the internal voltage control variables Vc(abc)is visualised in rms of the arm current resulting in high converter losses [5].
Fig. 9. Therefore, CCSC is implemented to suppress it by regulating
the voltage across the arm impedance. This scheme of CCSC
Iabc L R controller is firstly proposed in [5]. The DC voltage can be
PCC
defined by (17), when using phase a as an example.
Substituting (6) and (7) into (17) and then rearranging results in
Vc(abc) Vs(abc) 𝑉𝑑 = 𝑉𝑢𝑎 + 𝐼𝑢𝑎 (𝑅 + 𝐿𝑝 ) + 𝑉𝑙𝑎 + 𝐼𝑙𝑎 (𝑅 + 𝐿𝑝 ) (17)
Figure 9:MMC phase a connection to the AC side
𝑉𝑑𝑖𝑓𝑓𝑎 = 𝐼𝑑𝑖𝑓𝑓𝑎 (𝑅𝑎𝑟𝑚 + 𝐿𝑎𝑟𝑚𝑝 ) (18)
𝑉𝑑 𝑉𝑢𝑎 +𝑉𝑙𝑎 𝐼𝑑
Eq. (13) defines the correlation between Vc(abc) and Vc(abc)for Where 𝑉𝑑𝑖𝑓𝑓𝑎 = − and 𝐼𝑑𝑖𝑓𝑓𝑎 = + 𝐼𝑐𝑖𝑟𝑐.𝑎 .
2 2 3
the three phases Eq. (17) for three phases in a matrix can be expressed as (19).
𝑑𝐼𝑎𝑏𝑐
𝑉𝑐𝑠(𝑎𝑏𝑐) = 𝐿 + 𝑅𝐼𝑎𝑏𝑐 (13) Applying the transform to (19) leads to (20). The zero-sequence
𝑑𝑡
𝐿 quantities hold no effects on the q-axis and d-axis values and, as
Where 𝑉𝑐𝑠(𝑎𝑏𝑐) = 𝑉𝑐(𝑎𝑏𝑐) − 𝑉𝑠(𝑎𝑏𝑐) , 𝐿 = 𝑎𝑟𝑚 + 𝐿 𝑇 , and 𝑅 =
𝑅𝑎𝑟𝑚
2 such, the use of Icirc. in
+ 𝑅𝑇 . Eq. (12) in the dq frame gives (14), where p= d/dt. 𝑉𝑑𝑖𝑓𝑓𝑎 𝐼𝑑𝑖𝑓𝑓𝑎 𝐼𝑑𝑖𝑓𝑓𝑎
2
𝑉𝑑 𝐼𝑑 𝐼𝑑 0 −1 𝐼𝑑 𝑉 𝐼 𝐼
[ 𝑑𝑖𝑓𝑓𝑏 ] = 𝑅 [ 𝑑𝑖𝑓𝑓𝑏 ] + 𝐿𝑝 [ 𝑑𝑖𝑓𝑓𝑏 ] (19)
[ 𝑉 ] = 𝑅 [𝐼 ] + 𝐿𝑝 [𝐼 ] + 𝜔𝐿 [ ][ ] (14)
𝑞 𝑞 𝑞 1 0 𝐼𝑞 𝑉𝑑𝑖𝑓𝑓𝑐 𝐼𝑑𝑖𝑓𝑓𝑐 𝐼𝑑𝑖𝑓𝑓𝑐
This current controller is depicted in Fig. 10 and is a
𝑉𝑑𝑖𝑓𝑓𝑑 𝐼𝑐𝑖𝑟𝑐.𝑑 𝐼𝑐𝑖𝑟𝑐.𝑑
fast-feedback decoupled controller that generates a voltage [𝑉 ] = 𝑅𝑎𝑟𝑚 [𝐼 ] + 𝐿𝑎𝑟𝑚𝑝 [𝐼 ]
reference for the converter depends on the current set-point 𝑑𝑖𝑓𝑓𝑞 𝑐𝑖𝑟𝑐.𝑞 𝑐𝑖𝑟𝑐.𝑞
from the outer-loop control [5]. 0 −2𝜔𝐿𝑎𝑟𝑚 𝐼𝑐𝑖𝑟𝑐.𝑑
+[ ] [𝐼 ] (20)
Vsd 2𝜔𝐿𝑎𝑟𝑚 0 𝑐𝑖𝑟𝑐.𝑞
Îd
I*d PI
A dq decoupled CCSC controller is employed with the 𝐼𝑐𝑖𝑟𝑐.
∗
𝑑𝑞
abc dq Îd
Iq
ωL Icirc-d*=0 PI
I*q PI 2ωL
abc Vdiff(abc)*
Îq Idiff(abc) dq Icirc-d
Vsq Icirc-q
abc dq
Icirc-q*=0 PI
B. Upper-level Controller Îq
This group of controllers can be split into two main
categories: reactive power channel and active power channel Figure 11: CCSC controller scheme
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2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)
Capacitor balancing controller (CBC) warrants that the shows the inherent expandability feature of VSC-HVDC links,
energy imbalance in each MMC arm is allocated equally among which is not the case in LCC-HVDC links.
the SMs within that arm. The employed CBC is based on [6], The three-terminal scheme comprises similar control
which has initially shaped the basis for many subsequent structure as the two-terminalscheme with the exception of the
capacitor balancing controllers for MMC-HVDC. added MMC station that is connected to a weak AC grid and is
required to provide the offshore AC grid voltage and frequency.
D. Nearest Level Controller Therefore, in the converter control system, by directly setting
The Nearest Level control strategy has been proposed for the magnitude and frequency, the performance of the offshore
converters with an arbitrary number of voltage levels [5] and converter can be guaranteed through V/f control (islanded).
[6]. The main idea lies in deciding the number of cells to be
As mentioned, the power flow is determined by the voltage
inserted and bypassed based on the comparison of the
modulating signal Vref(t)with the voltage steps that represent differences between each MMC station terminals. A power
idealised cell capacitor voltages. For MMC, assuming that the imbalance will result in DC voltage excursion, which is similar
cell voltages are constant, 𝑉𝑐𝑒𝑙𝑙 (𝑡) = 𝑉𝐷𝐶 ⁄𝑁 ,the converter arms to the frequency fluctuation on AC grids. Therefore, in order to
can generate one of the N+1 discrete voltage levels (0, 𝑉𝐷𝐶 ⁄𝑁, ensure power balancing and dynamical support, DC network
2𝑉𝐷𝐶 ⁄𝑁 ,… 𝑉𝐷𝐶 ). The number of SMs to be inserted and stability and transient responses, it is advisable for rectifiers or
bypassed can be calculated as inverters operating in power control, where the power
1 𝑉𝑟𝑒𝑓 (𝑡)
𝑛𝑜𝑛,𝑢 = 𝑟𝑜𝑢𝑛𝑑 [𝑁 ( − )] , 𝑛𝑜𝑓𝑓,𝑢 = 𝑁 − 𝑛𝑜𝑛,𝑢 (21) references are automatically adjusted with DC voltage
2 𝑉𝐷𝐶
1 𝑉𝑟𝑒𝑓 (𝑡) variation, in which 𝑃* is the new real power reference, 𝑃*𝑠𝑒𝑡
𝑛𝑜𝑛,𝑙 = 𝑟𝑜𝑢𝑛𝑑 [𝑁 ( + )] , 𝑛𝑜𝑓𝑓,𝑙 = 𝑁 − 𝑛𝑜𝑛,𝑙 (22) and 𝑉𝐷𝐶,𝑠𝑒𝑡are the original set points, 𝑉𝐷𝐶,𝑚𝑒𝑎𝑠 represents
2 𝑉𝐷𝐶
measured DC voltage. For the AC bus linked two converters,
VI. SIMULATION only one of which needs to have 𝑉𝐴𝐶 droop controller. Table. 2
summarises the control data of the schemes shown in Fig.12.
Table 2: Fig. 12 control data
MMC Control Mode
Onshore System A Q*= 0MVAR VDC*= ±200 kV
(1p.u)
Offshore System B AC Slack
P*= -400 MW (VDC= Q*= 0MVAR (VAC=
1p.u) 1p.u)
Figure 12: Symmetrical monopolar two-terminal point-to-point There should be at least one converter working as a slack
MMC-HVDC scheme with VCC control bus, which maintains DC voltage that then determines the
power flow between terminals [5]. This slack-bus converter
should be connected to a strong AC system, where in such case
A is considered as the slack bus in the system as such B will be a
real power controller. The set points of VDC reference could be
from 0.99𝑝𝑢 to 0.98𝑝𝑢, when taking power flow into account.
Table 3: Fig. 13 control data
MMC Control Mode
Offshore System A P*= -500 MW VDC*= ±200 kV
(1p.u)
Q*= 0MVAR
Onshore System B AC Slack
P*= 500 MW (VDC= Q*= 0MVAR
1p.u) (VAC= 1p.u)
Offshore System C Islanded Mode
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2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE)
Line to
ground
fault
Figure 14: Dynamic response of stations (A) and (B) to a three-phase fault (ABC-G) at (B) AC bus took place at 0.8se
Normal Station
operatio trip
Injecting P n
into AC grid Station
Injecting P trip C.B closed
into DC-link DC-link voltage at the DC buses of
stations (A), (B) and (C) and the
DC power at each respective
station during permanent trip of
station (B)
Figure 15: System behaviour following permanent trip of station (B): AC voltages at PPC VAC-A= 220kV and VAC-B, C= 120kV; Primary side
AC currents at AC buses Iprim; L-L rms voltages areVrmsA= 380kV and VrmsB,C= 145Kv; Pmeas and Qmeas are the measured active and reactive
powers at the respective AC bus
Fig. 14 shows a three phase to ground metallic fault on the platform is then supported by the AC grid and the DC-link
AC side terminal of the onshore MMC station shown in Fig. 12 voltage kept within the operational range of 0.95pu to 1.05pu.
between the AC system and the converter station. It can be the system returns back to its steady state operation
observed that B is promptly blocked following the fault, given immediately following the fault clearance.
the excessive current flow on the primary side of the
transformer. Nevertheless, as the secondary side of the VII. CONCLUSION
transformer at B is in Yg/Δ connection, the converter unit is still The present state and experience of the VSC-HVDC
able to maintain the DC voltage as A is deemed separate from B. networks has been reviewed in this paper. The review shows
the VSC flexibility compared to LLC and also confirms the
It can also be noticed in Fig. 14 that the waveform of the realisation of MTDC through MMC-based schemes simulation.
measured P on both sides of MMC stations A and B are nearly The terminals expandability of VSC schemes has been
identical; the amount of Q, which is delivered by B is likewise exhibited through adopting a three-terminal radial-configured
to the amount of Q that is received at A, whilst the difference of scheme expanded from a two-terminal symmetrical monopole
the signs is indicative for the sending (+) and receiving (-) ends. scheme. The dynamical performance for the adopted schemes
On the other hand, Q is kept unchanged at zero, but following shows the inherent functionalities and limitations posed on
specific VSC-HVDC networks.
the disturbance and while the operation of B starts returning to
References
its steady state operation, an approximate of 100 MVAR is [1] L. Liu, "Control Strategies of VSC Converter for MTDC Network
absorbed by B, while MMC station Q is kept at zero. Transient Studies," Transmission and Distribution Engineering and
Technology, vol. 03, no. 03, pp. 38–46, 2014.
The three-terminal scheme fault scenario is a permanent trip [2] Y. Yang, D. Jovcic, J. Jardini, H. Saad, “The CEGRE B4 DC Grid Test
applied to the wind farm plant by force blocking the MMC System” Cigre Journal, B4.57 and B4.58, Paris, 2014.
[3] R. Iravani and A. Yazdani, Voltage-sourced converters in power
valves. The fault shown in Fig. 15 takes place at 1.3sec and is systems. United States: Wiley, John & Sons, 2010.
cleared at 1.75sec. It is clear that the faulty wind farm station B [4] Cigre Technical brochure 269, “VSC Transmission” WG B4.37, Paris,
is taken out of service immediately, upon which the AC grid April 2005
[5] Cigre Technical brochure 604, “Guide for the Development of Models
starts injecting P to the DC-link instead of absorbing. This is an for HVDC Converters in a HVDC Grid”, WG B4.57, Paris, December
attempt to maintain the operation of the system. The Oil 2014.
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