1-2RESCSem380) Diode Circuits ang Amplifier Models Af wave rectifier with its input-output CONTENTS Part + Dido Cieute sonnel BE 86 1-10 Tawer | tis shown in Fig. 11.1 In this hal portion of impute rete either fosive a or negatv ha. ie diode and a step down transformer are required for this Part + Amplifier Models: Voltage oon tAIOB to 1-4 ‘Air, Creat Amr | conductance Aroplfier and Peeceme eo ansiees |icearieaacnecel care raaaot eas + Various Configurations ABR to 1-29 (Such ee CE/CS, CHICG, COICD) and Their Features Part-§ + Soul! Signal Analysis, low. Frequency Transistor Mode Estimation of Voltage Gain, Inpat Resistance, Output Resiatance, ete Part-6 + Design Procedere For Particular. Specifications, Law Frequency Analysis of Maltstage Amplifier IA4E to 1-298 | na 1-208 to 1-418 141K to 468, ETRE] ean tn working oll wave ridge rectifier, What TIE ESC Sem$.8.4) | are the advantages of full wave rectifier ?cee anArla hoes Cia Aaa Cit Trl wave rectifier This circuit ives the output fr fll eee foe Fan NENSveand negative halfysesh There are wo type of crcl ted rit {Center tap rectifier: 1SECSCSem344) — 1 Incentertapfullwave rectifer teal, ode D, wile ON for halfeyele (ce, Oto and the diode D, wll OFF during this ele 2. The dode D, wll ON fr negative balf yle (Le, n$0 2) while the lode D wl be OFF during thie 4. The input and output waveforms ae shown in Fig. 122 ® 4 Bridge rectifier As shown in Fig. 1.2.96) only diodes D, and D, are active during postive half eyele while diodes D, and D, are active for ‘ngative half yee as shown in Fig 1.2.3) and Fig. 1.2) shows the total output wth the ative diodes fora particular eyle Full wave rectifiers are more efcint than half wave rectifier. The fnaximun efficiency of full wave rectifier is 81.2% while the maxim. ‘ciney of half wave rectifier i 40.0% |i The output waveform of fll wave retifier has fewer ripples [TRRTRET] wat do you mean by siping rete? What ae the erent ype oper cela on Draw a simple clipping crelt wth vltable waveform and sxpain typeset clippers (a 1a]Analg Bernie Ag Cres {SE ESC Sems4) “Aware shaping circuit whch controls he shape ootput waveform TEES TEiprind = portion of the applied wave is known a Eijk Porting reat at Test ne resistance and one Sade resied ‘Types of eippe pnive and negative & xe are msialy two types of clippers, pets They are ferther divided Into two 1. Serie clippers for ideal lade): i Simploseres clippers! Kaez Arla tes Cres aig Cita LOE SCSm 380) om Se os Saaee ig 15 1shows acini of general mule. this ireitcan be wed {doubler lean qusroplr 2 Giri aDouler 2.) areata Dipl Creat 3isn Quadrsple? AY). Dutiog postive half cre, the Bid Ds ON anditcharges capacitor C, ay, 4 Inthe frat negative alee the dee Dis ON and it charges C, 2 VV + Vo22V,) Inthe the charge on capactar, stats scart |5Inthesood positive hlfyee the diode D, and, ae ON, the copacar the capac, wile charged yea = 20, lige ace 6) Daigle a c,h de, edd , we ON ‘voltage across capacitr is given as ‘igh Var te Wil Vat Vq2V,-2Y, 020,44. vera Now Voltage across ,-» VV Voltage sernsC! > 12> pea ae ‘Voltage tripler: nares on ERI incun vottneeelier model 1. Fig. L6.0a)showsacireit modelfortheveltage amplifier, 12, Therodel consist ofa voltage controle voltage source hating gain factor A, an npal resiatance and anoatpat reste Rye In Fig, 16.10), the amplifier made ed with signal voltage snare, having resistance Rand connected at the outpat oa load reitance Ry ‘The non-zero output resistance R, eases only a faction of A, t0 appear aero the output. ‘Using the volagedivider rule we obtain 4 Ton tetany casy 7. Itfllows that in order not tolose gain in coupling the ample output toalond the output resistance, shou be much smaller than the od resintanceR, :2 nite inp reste inode nabs ate vier ation 8 tater te rena tat ely nfacuon othe wource signal, Crees the opt terminal ete ampli, that a RE elo atin order ole iia portion of bp signal qe iptug i apa eure tote splits lp, he ample Mut Gagne io hove an input reustanee Rach greater than the Flan ofthe sgtaleoute, a, R,>> 10, Theoveal lage gin can be fond iy combining og (1.61) 08 62) ’ RR +R A+R, HERI eer 0nd plain cireit noi ofeurvent aie, “Answer | 1 Anamplifer whose output currents proportional tits input current is called current amplifier ra fi eee = Fora af Obes oe Sloe Se ee (@) Current amplier (b) Coren! amplifier ‘apresented by OCC, Its input isa current soure, as shown in Fig. 17.1 (a, with a load ‘sistance, Acurrent ampli is represented bya current controled ‘current source (COCS), as shown in Fig. 17.1) 1-12 E (ESCSem 9.4.0) ea {6 Substituting from oq (1.7.2) into eq (1.7.1), we get effective current [inn A, which is defined a the ratio afi, to, weit wi “A= EEE" CR RNR SR)” Ov R/RME RAR) “a73) 1. tnoa.(1.73,fthe vale input resistance and lad resistance increase then reduce he effective caret gat 8 A-crrent amplifier should have an np resistor R, ch smaller ‘Rea the sure ectance Rw that cc 2 Therectlon inguin can alan be inns by dxigning on ampliferso that theraio yi, very anal i B,>> 10. Therefore anil eurvent amplifier hs R= and R, ~Oso dat hare ino redocton inthe corrent iin Thala A, =A and age teeomee aA 0.74) WeeTE | Explain the transconductance amplifier model. 1 Anamplife that receives. a voltage signalasinput and provides a current ‘Sal axoutputincalled a trunseanduetance amplierSeis «ERR ean epresniy avg conrad creat source (UOCS) ag Shweta 18. Tarangire cnc betwen ¢ vo rue A _ atch te rat! sbert cl up Cre 1 ae ag beled te st crst transconductance. 4 Prmthecarrent drier ru the ott arent R stage source 2, and a losd sa) Ou, 46 The input voltage of the amplifiers elated to source voltage v, by ws gee 1.82) oa 1. Substituting rom eq (1.82) into eg (1.81) then transconductance wind, Pepa GPR Go cae ae 9 tna in (R + BARR) ORR RIR) 5. The effective voltage gain A, is, eee Ce Mee ae, ORR +R) Sol 38 TR IRM RTE) 9 Thesoureresiatance Ran the led resistance , reduce the effective transconductance gin 10. Atransconduetonce amplifier should have high input resistance, so that >>, anda very high output resistance, so that R >> Ry 11. Therefore, anidesl transconductance amplifier has R, = and that there is no reduction in the voltage gain. That i, G, = Go, and 4. (183) becomes as) BIBT Piecugs in deta the tranrrsistance model 1. The input signal to transimpedance (trans-resistance) amplifier isa ‘current source, ad its outpt is vltage source. Such an amplifier can Sereprennted ara curettage ures CCVS) shown “Thegsin parameter’, the ratio ofthe open-lreuit output val ‘the inpat eurrent, and itis called the open eireuit transimpedance, — ‘The output voltage, ereated toi, by Ren > ‘ttc oftentimes & rene tlh namie RoR or Substituting é, from oq. (1.9.2) into eq. (1.9.1) then effective ‘wansimpedance 2, oudt , a = 20" R= RXR SR) UeRIR RIE) | ‘A tnsinpedance amplifier must have an int resistance Ry much ‘roller than the source resistance, andan output resistance R, mich ‘aller than the lod resistance ‘An ideal transimpedance amplifier has K,=0.and =O. TET pin ie opentonctvoageavrbincnaiand rte dows the apprecieaal cnr rets Analg Crit 1ISEESCSem 9.8.4) ask Bectenia Ormia/ tosis Oe contains a voltage divider (Rand Ry, tage divider bins (VDB), Neo 4 In thie method, the base circuit ‘Because of this, the eiruit is called v = Circuit analysis 41, In VDB circuit, the base current is much smaller than the current through the voliage divider. 12 Therefore, we can open the connection between the voltage divider and the base to get the equivalent cieuit of Fig, 1.10.20). 8 In this circuit the output of the voltage divider is Vee Vee =¥y RoR 4. dell, this is the base-suppy voltage as shown in Fig 1.10.10. ae +Veo Re By Vas Vee Ry Ry « © 5 FromFig. 1.10.20) Voc foRe-ISy ae ee Veg = Veo=TRe+ By) TERI ecpaincotetor feedback configuration Fig. 1.11.1 shows collector fedhack bias (also called sel-bias) 2. Stabilizing the Q point, the basic ideas to feedback a voltage tothe base {nan attempt to neutralize any change in collector current. 3. Forinstance, suppose the collector current increases. 44. "Thisdecreases the collector voltage, which decreases the voltage across the base resistor. vas Re Fig 1A. 5. In turn, this decreases the base current which opposes the original increase in collector eurrent. 6 The equations for analyzing coletar feedback bias ae: 1 fas OO Re Ry Bae v,-07 Vo= Voce 11 "The Q points unually set near the mide ofthe load line by uringabase resistance of y= Baepace C8 Gaacealonig tees HITRGSENTIES ns! ERE win emir tower comsrraion espera cabeettcol eeseggtermion! ws shown Seen Boia. Ty cy Ye Wee ae -[ ae oi lo i Re Re O Ven Ves Ve women nie) ance na ae a, 2. Applying Krchhoffs voltage rule tothe input circuit Ig Ry Venta Mr and sing 12404, 1,R_+( + D1, By= Vor~Von sothat Veg — Vow +R For the output an application of Kirehhofs voltage law will result in Vg ley * Ver= 0 and Vou= Vin- ley HET) inn bine stbtzation. “Kawwer | The salty of sytem ie a meanore of sensitivity of «network to ‘aration in tsparameters. In any ampliferemploying ara Colton current insensitive teach ofthe flowing parameters i increaes wth nereane in temperature |i Vyq decreases about 25 mV per degree Celsius (*C) inerease in telperatre Sip (revere saturation current doubled in value fo every 10°Cinere ‘in temperature, eet “a om a= ge For R,/R,>>( +1), ‘SUlzq)= (B+ For R,/R, <1, For the range where R, /R, ranges between 1 and (B +1), the factor wile dotermined bY Sq)= Be R ‘as shown in Fig. 1.13.1 ‘The result reveals that the emitter-bias configuration is ‘when the ratio R, /R, i as small as possible and beeome: ‘same ratio approaches (f + 1). ‘Sldco) Stability factor penPn ae gm Fa client 00, een aon ato. ; _1+Ry/ By _ (1135) Slq)= 8+) Gets Ry! Be ee e 1 Thestability fectorisdefined by v_)= He 13 sn rents inthe follwing equation forte emitter-ias configuration ass) SVue)= B2G+DR, 2 IfR, = 0st occurs for fixed bias configuration 5m) 1139) 4 Bq (1.198) can be written in the following form (1.18.10) 4 WB+D>k/R, then, SV) 33.11) which shows that larger the resistance R, lower is the stability factor sand more stable isthe system. 5p): 1 Poremitter-bias configuration, 1 Me, Fall+ Ry Re) 50) 5” BGP, +B, /R) where, Iz, and p, are used to define their values under one set of network conditions, whereas 8, is used to define new value of ‘established by changes in temperature 2 For fxed-bias configuration, Sf) =1,/9,. 3. For the collector feedback configuration with R, =0. Tale +Re) S0)= BOR, + ROBY) ETI tant ste ban contguration of FET ewer | 2 1 Theselfbias configuration eliminates the need of woDC supplies ie, Thy drain supply is used and no gate supply isconnected. 2. Fig 1141 shows the arrangement, «resistor R i connected in the EE co lng ofthe configuration. This s known as bis resistor. 4. The DC component of drain current J, lowing through R, makes Toltage drop across resistor R- : 44. Tho capacitor C, bypasses the AC component of drain current. 5. The ation of in cient doesnot upset the DC bas, but avid the ‘hort -ireuting ofthe AC input voltage, Otherwise, the leakage current ‘rou build up static charge atthe gute which could change the Bias. 6. Ry alse to preven any variation in FET drain current. 1. Let there be an increase inthe drain current. This will increase the ‘altage drop across resistor R, and this results in decrease of channel width. So, the drain current is reduced. & For DC analysis, the capacitors can be replaced by open circuit and the resistor Replaced by short-circuit equivalent. Since J, = 0 A. The equivalent circuits shown ing. 1.14.18).2 3 4b Forthe indieated loop, we have “Var Rees 3 Veg Tos a TC ea but Tat nd Vpn =Vop—folRe# Ra) Tnadtion w ESTEE Draw and explain the voltage divider bias configuration of FET. Tnswer 1 Fig 115.shows te poental divider method of binsinga FET. FI 4 Yoo. ten, i oe ay Fig. 115.1. ‘The name voltage divider is given dueto the fact that resistors R, and form a voltage divider across drain supply Vn, The voltage develo ‘cross, provides the necessary bias. ‘The gate voltage Vis given by vole] 4 The source voltage sven by Vq=Vo-Yor nase : Dope ‘ Vos Vou Toto +R) Vo Valo e VyaIgR ‘THETA ] What are the types of transistor configurations? Also draw the input and output characteristics of « BT in the common base configuration. "There are three types of transistor circuit configurations: 1. Common-base (CB) 2. Common-emitter (CE) s 8. Common-colleetor (CC) ‘Common-base (CB) configuration : 1. In this configuration, the input signal is applied between emitter and ‘base, The output is collected from collector and base as shown in Fig: 1161.Ve Yoo Corrent tmplifention factor (2): a Tredeatar tra eth coletr caveat tothe miter ure a Sensi capped nds caledDC alpha (0) g sac # Simply api Then 3. Thetransistor having high is better in the sense that collector eurrent approaches the emitter current. aod, = 1,0, 4. Now, when signal is applied, the rato of change in collector to emitter current at constant collector base voltage is defined as current ‘amplification factor. a= Me jit a Practically ay¢= dye "a= 0,9 100.99 Meader caret ign $f, * fon ‘The collector current ean alao be expressed as Ten apt I) +e [g(l-0)= al, +g tee (Zale Yao 17. The elation between aad is given by a= ort-a- if i Te B1,4(1-+ Ploy, 1-24 ESC-Sem3.84) Characteristics of CB circuit : Ig =a) T204c808 10 Ve) (o) pet characeritice ‘ages ese at ones 1 ystlp Ay tate tt a re ani, ae defied as allows | , s| temectine &, © a ral, (2.289) anya], 50 seorcedrin rinse, « 28] «MY ia 4. Aslong athe ET soperatd inthe pinchoff region i thegeeactscse open rot 4 This, along with eg, (1.262), leads to the current-souree equivalent cireitofFig. 126.1. Bither ofthese models may be used in analyzing en amplifier, tone may be more efficient than the other in a particular eeuit. TERRE stow int the transconductance, of JFET is related eens 1 hn a ee A} a 1. Asweknow, the saturation drain current, I, is given bY faa Men) LTD v, where V, is pine i when Tea Pinchoff voltage and Ing, is the value of Tos 2 Diflerenti ‘ating ea (1.27.1) with respect to Ving, we get a, hea) 140 SC Sem 44 a 3. We know that, Re, "sf 1). [a (8-H Ble [a Veer an Va ie Toes. Weer FERRER orev common source (C8) emplifior and fad crpresslone for voltage gain, inpat impedance end output. tmpetance. ~— ora age tease te ae Voiape atin ay! 1. aabisupliner red ost th int tsuneo wi reqnney open 2 From anal signel equivalent cut th ooput woe 2, Rav.) v= ghey where V,.= V input voltage Hence, voltage gain, dye Soe ah pao sifebebnen VV. Here, minus sign indicat Input impedance: 1. From Fig. 128. so) a noel alaeAig Becewnes Crest AmingCrcuts__1-AE ESP Sema = a 1-42 B (ESC-Sem-B 84) Diode Circuit & Amplifier Models ‘TERT sap he cascade amplitens Wie advantages of naltstge over single tage amplifier Tomer | > (Ur), ry and Ur,» we ean neglect all the the finan the left-hand side to obtain Enda = ‘node equation at ¢y, "a 4 y= tata and aguin neglect the second termon the right-hand sideto iain inn tate : singe (130.1 rel in Toss, On fas ‘Toobtsin R,, we set ,=0, which result in Q, being reduced tits output Toolstance f,, which appears in the emitter lead of @, as shown in Fig 130.20) Here we have applied a test voltage v, and willdevermine Ras ‘The voltage atthe emitter node, ~ vj, can be found as moa brated 102) [ext we write lop equation around the c,~¢,~_round loop as 8,= We BabaYat teal Vr) feb om 38a lading ren Rear al a)+ EmtoMal eg) (1903) whieh ean be written as R* eat Green + Won Pea) 1.804) = Fat Cur aMor| Va) -11, inc gyy| rg)?» weean neglect the first term onthe right-hand R= Brat ahal a) 12 Because (7,| rg) will always be lower than rq it follows that the ‘maximum posible value of Rit Plus™ Baila = Ont aa" Bia (0.305) ‘Thus the maximum output resistance realizable by cascoding is Br, 18, Having determined G,, and R, we can now find the open circuit voltage: ‘gin ofthe bipolar cascode ax Ans t=-O,R, Tou, Aug® Baits M| a) (1.308) For the e486 kgs *Bnafos =a" Mom Uear Ml I) 130.0) which will be lens than (g,7,) in magnitude, 1, Infact, the maximum possible gain magnitude i obtained when r, >>, ‘and i given by i VAselna™ Blas = 1A, PRD] Hiadornte in detait the Dartington pair, ‘transistors may be combined to form compound device 2 A commonly used compound device in : ‘configuration and ix shown in Pig. etn known as the Darlington Fig. LSE Inthis representation, two npn BT are cascaded and are behaviorally ‘equivalent toa single npn transistor. a ‘Tiissingle compound device possesses desirable characteristics such as ‘High input impedance, low output impedanee and high current gains at rig have the disadvantages ofan almost doubled Vig (overall Vg for ee OV w 14 V instead of the 0.6 V to O.¥ for sngle con, Bats. A erlington pair may alsobe created using two pnp device, particularly aadiscrete eircuit design, or through the use of an npn and a pnp. ‘The resulting compound device may be considered a single transistor ‘and, wil be used in either the CE or CC configuration. ‘Aosuminggr, and Fy, are very large so that they may be neglected, and that f, and py are both much greater than one (ie, By = + 1 and Bf, + 1,the AC small signal model ofthe npn version ofthe Darlington. pair isshown in Fig. 1.82.2, B=B, = 0,0, Figs 18 By making the assumption that emitter currents are approximately ‘equal to collector currents (ie ty = 4g = 1) 1, = bea Balan = Baler = BaBatowe We can see that the combination looks like a single high B=f,B,) transistor,Multistage Amplifier and Feedback Topologies ‘may be asked in your SESSIONALS as well ag. UNIVERSITY EXAMINATION. different types of clipper circuits ore thy an ee =i Sart peer) 7 ere. an Se = ee with suitable characteristics in detail. | | Part-3 : Various Classes of Operation. oe Shee Q6. Explain the hybrid-r model of the npn transistor. eens Feedback Topologies ¢ ermine BIE to 2-396 CONTENTS 7 | Part-1_: High Frequency ‘Transistor Models Part-2 : Frequency Response of. Single Stage and Multistage ‘Aniplifier, Cascede Amplifier 2138 to 2-218 ‘ue, Refer Q. 1.22. Fewdnc, Q.7. Draw the basic structure of single stage BJT amplifier ani Current Series, Voltage Shunt, find out its characteristic parameters. Carrent Shunt ax Refer Q. 1.23. Part-5 t Etfoct of Feedback on. @.8. Draw the small signal low frequency model of a BJT in Gain, BW ete, Calculation Geanereaitee: Derive sapcemson for the vohage pak vith Practical Create ‘emitter follower amplifier. ‘Ama Refer Q. 1.24 rt @.9. Show that the transconductance g, of JFET is related 3 drain current I,, by Part-6 : Concept of Stability, i Gain Margin, Phase Margin io fa" [yj Vlomlon ia ama Refer Q 1.27. @.10. Draw and explain the BJT cascode amplifier. ABE Refer Q. 1.30. 2-1 E (ESC-Sem3&4) 0802-2E (ESC-Sem3.& 4) Mabibtegr Amplifier &Peecback Topi GEER] Drew the equivalent circuit of BIT at hi snd derive the expression for uppercut af frequency. Draw the high frequency equivalent circuit for the typical RC coupled cat common emitter amplifier. ARTO 201445, 1. High frequeney equivalent circu’. for CE configuration is shown in Fig. 2.11(@) 2 ‘The equivalent circuit of Fig. 2.1.1(a) can be simplified by utilizing ‘Thevenin’s theorem at the input side and by combining the three parallel resistances at the output side. Thevenin's theorem simplifies the resistive network at the input side to a signal generator V,, and a resistance R,, R, r, re VatlemaeR, naneiiRy 728 roll, + Ry I Rug) (212) « RY, 13) aad rae te faite fea tm Ta aC(V,-V) CV. -Ca,R¥,) Cle DV, 6 Now, in Fig. 2.1.1(6), the left hand side of the circuit, at XX", knows of the existence of C, only through the current /- Therefore we caf replace C, by an equivalent capacitance C. between B and ground as Jong as C., draws a current equal to, i.e" 10,9, =1,=80(1+8,2)V, C4260 +4) 1 ® ba Cis used to simplify the equivalant iret tthe input side tat Se eee ety rare wecan expen Vin termact VS ee a AZAD ‘Te s/o, tne comer frequeny of SC (single time constant network conpedof, an 0, WCB ‘where, C, is the total input capacitance at B, 0, =C,+C,=0,+0(1+8R) and Ri, isthe effective aurce resistance, given by ea. (212)nl Bry “Gea where, Ay=—| y+ Ra FF + Bogle) | Frombich we deduce tat he upper 3B frequency fy must be oe fe" on” WHORig ] praw the high frequency small signal circuit of « MOSFET with ond resistance using the effect of Miller capacitance, MOST va an expression for the Miller capacitance and cut-off frequency ()- 1 High frequency small signal circuit ofa MOSFET with load resistances shown in Fig. 22.1 2. Toobtan the ex : ‘To obtain the expression for current gain, apply KCL at input node Leh+h T= j0 CV + 0C gf V,, — (2.2.1) em a ll AR s Lyn taVt hy 0A y-Vi)= avy Ye aa R, vy V+ Yi Vn REF HOC Va -Vy) =0 oe rom oq (22.1) nd o9.(223) 1 sole. cul eb |v. (22) Ts jo Cy But generally (of,C,,)<< 1, hence wean neglect this term, therefore, T= jo Cy + Cyd + Blt) Vor (2.25) From Fig. 2.2.2, Miller capacitance C,,can be defined as Cy = Cyi 1+ Bak) 228) ‘The input current I, can be expressed as jo (Cy, Cw) Ven Cutoff frequency : The cut-off frequency of MOSFET (f7) is defined carte frequency at which the current gain magnitude is unity or the input current J, is equal toy y, But, 'n let ‘| oO, +6, Pid Wl = BC. Gy a F=f VAleh pee iL BaC, +Cy) 2RCo where, C+ Cy = CoQaeER] What do you understand by frequeney m eSPonse Answer ae Tera cence eh Sl en ‘and hence affects the output voltage. aaa Reece cc Pecan teenais sn nd seal eqn 1. signal, al smupl 3. Fig. 2.3.1 chows the frequency response of a typical 4 ‘Tacumplter nae nae mes maximum at /_, called resonant frequenc cy Ifthen atl Epsiircemreafiencacs aa Pecieenes ee of an amplifier depends to a consi | Sebel nists ‘steps must be taken to ensure that gain is essentially ini some specified frequency range. a Seria cae . of an audio amplifier, which is used to ampli) srehor man ie neem hl he eden E i.e. iz iz) should be uniformly amplified ot | speaker will give a distorted sound output. van E. 4) ‘| caer 3 ea s es f, Frequency Fig. 23.1. BERET] eon togoney responce of commen et “Anower | Fig. 2.4.1 shows the: shows the frequency 2 Band response of atypical RC coupled a width ofthe amplifier is given by, BW f,-f, plier “Analog Hletronies Cireuits/ Analog Creu 27R (ESC SemB84) fy = Uprer cutoff frequency where, {f= Lower cutoff frequency voltage (A) >, Lew 26 OY tegteney y Midrequensy High reaoeney ‘Wasa ae 0.707 Agi > Frequen 70H qm) Fig. 241, ‘lao referred to as half-power frequencies Tee gr ontput voltage drops to 70.7 of maximum value nd this since gaa power level of one-half the power at the reference frequency in mid frequency region. ‘4. Tei clear that voltage gain drops off at low (< 50 Ha) and igh 1 eit frequencies whereas itis uniform over mid frequency FANEE (50 He to 20 KH). 5. This behaviour ofthe amplifier is Atlow frequencies (< 50 Hi ‘The reactance of coupling capacitor C, is quite high and henee very ‘The I part of signal wil pas from one stage to the ext ste. Moreover, C,canot shunt the emitter resistance effectively because weer range feactance at low frequencies. Theee two fectars cause a falling of voltage gain at low frequencies ii At high frequencies (> 20 KE): 1 The reactance of, isvery small and it behaves asa short circuit This soe repetithe loading effect of next stage and serves to reduce the voltage gain. quency, capacitive reactance of base emitter 2 Moreover, at high fre Hoenn a low which inereaes the base current, This reduses the ‘carrent amplification factor 8. ‘4. Due to these two reasons, the voltage gain drops off st high frequent ii, At mid frequencies (50 Hz to 20 KHz) Te ae anrrcaes gain of the amplifer is constant. The effect of coupling rae vr this frequency range is such 20 as to maintain a uniform ‘These two frequencies are Driefly explained as followsF Howerer ete ene ine, lower estance means AonbgticrnCreta/AmingCini ‘DAB GRE Ses Hane ec dg frat stg ting ina uniform gain at mid-frequency. "Seay, wets | explain the frequency respon i ROcwrting Beer rae OCS my Ta RCeouping resistor and acapacitor are used as coupling devise, it, IARC omit cota ene age theputeaet age Answer 1 to pass AC signal and to block the DC bias voltages. The amplifier Using 1.25.1 shows the frequency response of CS amplifier. RC coupling scaled the RC coupled amplifier 2. Hore the gain falls of at signal frequencies below aA tmoatage RC enupled amplifier osing npn transistors i CE and a 2 Miguraion shown ig 26 Sea aie aseaeeracecric cette. eae neem nate tven though ll eapacitors (Cy Co, and C.) are large capacitors a Totoro in ei and acm re tors (HR ‘oe nth pain Cy Cond I a and they are no longer behave as short circuit. ‘increase, Sal high frequency detreases thus can no longer be considered as out sd 98 open | pease ooh eS Fig. 264. RC coupled amplifier, ESET | Ateapectancercantemieted | fetbencyband 1 Gain tater 4. Ry, R, and R, are the biasing resistors used separately fr the twa ne ‘stages. Voltage divider biasing is being used. 5. Doe tothe use of coupling capactir, the DC voltages willnot be coupled Tran ons stage tothe ather. Therefore, the quiescent point ofthe next ef wil not be affected due to coupling. Thus due to RC coupling the [DC operating pont in any stage remain unaffected fe. & RCnetvork vse wie nd equncy response without introduion | | 20a Al (a8) of peaks at any frequencies, Therefore, RC coupling ean be wsed for « i Fie faudio frequency amplifiers. ig. 28:1, Preaueney response of the CS amplifier 5. The figure of merit for the amplifier is its gain bandwidth product which Gain reduces due to internal capacitors of ‘transistor is defined as GB= |A,| BW ‘eens. ] Write the different coupling scheme of multistas® amplifier. Explain frequency response of RC coupled amplifier im A High freq a quency two-stage CE configuration. = ial leas Ngee Thee rhe ‘. types of coupling scheme of multistage amplifier: frapeaigeel es oe wigan ‘Transfer couplingec i signals. sa 2 ‘ soot a tworstage CE-CE BT emp ‘to reduction ingain at & Denar Pig. 271, Two-tage CECE BIT amplifier. Tamer | ‘a. Thelow-srequency AC equivalent circuit is shown in Fig. 2.7.2 We have By = Ry | y= 220 ATK wd RyRy | Ry=22k9 ATS ‘The time constant, de to Cony WR, + Gy, I raIC, (200.0 + (15 k9 1:14 Ke) x 10 x10) = 148 ms The time constant r, due toC, only ig Sage Analog Electronics Circuits Analog Circuits DUE ESCSems84) Wg + Ry ral, = [BKM +15 KO 91.4 KO) «5 w= 46-4 ms 3, Thetime constant x, due to C, only i, y= UR, + RIC, [8 KO. +5 KA] 10 uP = 190 ms 4. Tho time constant «, due to C,, only is, ve [att TBs 1.4.0 + (200.0115 kay SRO sreeneT ag 5. The time constants, due to C,, only i 6 The low 3-48 frequency f; is, 1 1a Th8ma* 44ms” 190ms fl fo om The high-frequency equivalent cireuit shown in Fig. 27.3. 1. Atwe assume R, Teves equivalent renin eed C ith eae meade inecestnt canbe fund rom ey RC = Mra RRC [1.4.40 (2000 115 kA) « 15 pF =2.6 ns it and 2. IfR.,is Thovenin's equivalent resistance faced by C, with Cy Cy C., open-cireuited, the time eonstant x, can be found from nae RuCl nl Reaz ie sunitge Ampito Feedback Topology, x15 pF = 16.6 ns = nan a5 eo OY i c. uae. open-ciete, te cfferive load resistance of¢, er: resistance of 8 ae 10 2000 [115 k= 173.0 a WithCy Fa and its effesive Rao* Fa VBR 14 ee 2 ted to C8 Pe ests, eee gi <1 1K) ~1 pF «12354 4 WihC,, Cand C,epn-ireed, the tected resistance oC Regge R, | Roy= 510 1840. = 3.08 80 anditeeffetive input side resistance of Cis Rea Pala Re,= Benn * 1420 115 218 KO = 1.1 & Thetime constant presented to Cis Bienen * Bayan *Bya Rise) Ca [nOSka + 11k «(1 +5714 mU x 3.08 k0)] x 1 pF = is78ns 7. The high 3-dB frequency fy is i fa= — abs, iin 2 3f 10° 3 |267166+12271078 | “4 TERRE] etic tne cascode amplifier? 1L common gate (common base) amplifier stage incascade with a commen source (common emitter) amplifier stage, is krown as the ¢ = plifer stage, is known as the cascode ‘The basic idea behind the cascode amplifier i . resistanc splifier is to combine the high input ae ‘transconductance achieved in a Saal ne me cermet baecing property 208 connie fequency response of the common gate cascode amplifier 2 Cee seamen be designed to obtain a wider bandwidth bat amplifier. mpared to the common source (common-emittet) Tt can be designed to inerea: sgain-bandwidth produet cod 8 DO ta wha Tae QuedS. | Explain transfer characteristics of class A output stage. [Also draw signal waveforms. ‘Transfer Characteristic : 1 Anemitter follower (Class A)Q, biased wih aconstantcurrent/=uppicd by transistor Q, 2. Theemitter current, =1+i, the bias current must be greater than the largest negative foad current; otherwise, Q, cuts off and class A operation will no longer be maintained 3. The transfor characteristic ofthe emitter allower of Fig. 29:1isdeseibed by where tpg, depends on the emitter current i, and thus on the load current i, A. If we noglect the relatively small changes in Ugyy the linear transfer curve shown in Fig. 2.9.2 results. +Voe|S Asindieatd, tb postive limitofthe linear region is determing, ‘saturation of, thus “4 am * Veo Vert Fig. 2.93. Transfer characteristic of the emitter follower, 46 Inthenegatve direction, depending on the values off and R, the limit cf the linear region is determined either by Q, turning off aaa = HR, orby Q, saturating, onin* —Vec * Vera 291) 17. The absolutely lowest output voltage is that given by eq. (2.9.1) and is achioved provided the bias eurrent Ii greater than the magnitude of the corresponding load current, Tz [Mee * Versa} R Signal waveforms : 3 cout te emitter-follower circuit of Fig. 2.9.1 for 2 Neglecting Von , then the bias current is properi voliage an cing fom = properly selected, the output ‘ero, as shown in Fig. 29.35, 10 + Vewith the quiescent value being @ Fig. 29.21b) shows the corres |4. Thebias current Fis selected to allow a ative load current of V1 R,, the collector eurrent of @, sil have Che waeform shown in fig 9.0, 5. Fig. 2.9.9) shows the waveform ofthe instantaneous power dissipation in@ Pastels TEEETOT] Derive powerlconversin etiiency of clas A cusp nae inl 1. The pomer-conversinefcony ofan opt stages defined ax Let power) Supply rower 2101) ‘Assuming thet the output voltage is a sinusoid with the peak value V, ihe avoraga aad pope li 1 ave R3R, 2. Sincethe carrent ns constant the wer awn fromthe gst reese yer te eherage caren in Q seg] tof and thus the a raw fa the poli supply is Vpd-hus hs total rere iB el (2102) Py Poo Wed (2.108) 4. Equation 2.10.2) and (2.10.8) can be combined to yield 1 Wen ite ve n= [ime ale Ve 5. Since Vocand <1, maximum eficency is otaned wie(ESC Sem3 8) haere ee V, = Ves IRL The masimum ficiency attinahle 625% ESE in cat oman ce Bout ta, draw its transfer characteristics: Pr ragere 2111s clot B tpt stage Itconsist of complementay » ee 1 Seger adap connected f0Ch Way that ot cond siltanenusly st +¥oe Cs i @ Ry Vee es ‘When the input voltage vis zero, both transistors are cut off and the tpt voltage ois eo ‘As goes positive and exceeds about 0.5 V, Q, conducts and operates as sseaiterhllorer Iathincuc,s Blows cic vot) 0) 00d supplies the load curect. spar etre Meanwhile, the i eT SO, chk bate junction of, will be reverse-binsed 97 Tete mie spresinaey 07 Thus Q willbe cut of {ibe input goes negative by more than about 0.5 V, Q, turns ON and follows v,(.e.,u, = 0, + Uggps but i “ rent and Q,, will be cut off. "in push-pull feshion,Q, pushes (sources) curreat ogaientive, and Q, pull (sinks) current from? Tre crt operates ino the iva suaycne ‘Transfer 5 Thetranaier character the lass B stage is shown in Fig. 2.112 2ATEESCSema84) -o5v (Moc Vacrut Vane) Tg y Wee Veet * Ve +05y ‘ (Veo + Viacom ‘Pig. 2.11.2. Transfer characteristic oF the east B utp SAGE! 4, There exists arange of, centered around zero where both transistors Trevrnt off and 0, is 2er0. This deed band reeults in the crossover distortion 4. ‘The effect of crossover distortion wil be most pronounced when the amplitude ofthe input signal is small 44. Crossuver distortion in audio power amplifiers gives rise to unpleasant sounds. GieTia.| Derive power conversion efficiency of class B output stage. Tawwer | 1 Tocalculate the power-conversion efficiency, , ofthe class B stage, we eget the crossover distortion and consider the case of an output sinusoid of peak amplitude V, 2 Theaverage load power will be mae 2k, 3. ‘The current drawn from each supply will Pe 2a) consist ofhalf-sine waves of peak amplitude (VR). Thus the average current drawn fom ea atthe two power supplies willbe ¥,/=R, 4. Tae average power drawn from each of the two power SUPP veil be the same, 2122)sannmcamses seit tei ihe ‘and the total supe owe ~29q 2129 See Bt enter, 1086, 0 Yn Vag ea eee ass ous 8 AB output stage with ity 1. Abiasvoliage Vis applied between the bases of @,,and @,- For, Bree ya tanincaess cts eni ae each of Q, and Q,. 2 Asauning matched devices, “SSE liad (2.13.1) ‘When o, goes positive by acertain amount, the voltage at the base of Q, erage i ame acon andthe output becomes postive ata (2132) ase in Ugg, and hence iby. ed a follows, ponepecreisCrsit/AndyCruts S08 4 1 Ww yy, int = 2, In ny he ee nip = Me q,(2.13.8) and (2.18.4) can be combined and we got fc aa) yuki output lai ed re a Fo et stpet enter ocr, Meare = ab aaa ee cot acca ee eg cared ogee se et ratege te ppc ie a Feat ech tae te cepa eater lore soap 0 Oe tt gba ao] pee Ct eines (a ilar ae ‘¢. Weconclude that the class AB stage operates in much the same manner wre class B cireuit, with one important exception. For smal , bath store, and as, isincreased or decreased, oneof he two transistors takes over the operation so, Sine the transition isa sooth one, crossover distortion willbe almost tally eliminated. Fig, 2.13.1 shows the transfer characteristic ofthe class AB stage Fig. 2.1.1. Transfer charter fhe tt AB GES, WeRTAT] why is class C amplifiers efficiency higher than that of lass A amplifier ? La a iffer is biased in the active region to produce linear Ci pores anal the Pre o his biasing srrangernent, the translitor ‘remains ON even for no input signal.rnitor bined ouch F ater inthe saturated {is OFF, the current through iti Cansstr dissipates negligible pemouth iin very ary, wenthe transistor operates in saturation, invery smal, snd again the power dissipation is Taal ea ‘Therefore inthe cass Camplifer,as the transistor diss Dan shader han that ofthe class A amplifier = Ps i bencethe' Describe class C output stage with its input cere: Ai ert i oer conversion efficleney,. 1. Theschematic diagram ofa class C amplifier is shown in Fig 21 2 The input and the waveforms at the collector termi am lector terminal are show (a? 2264.The cat Coatput stage. pt signal is posit - recene| in positive and above L oe cpiaisistn ration eg, a ns this period, se output voltage is equal to the saturation voltagt ofthe transistor oe Gantt and remains cons he cu-in voltage, tant as long as the input signélit 8. When the in pool Boia Ano Cet DRE (ESC Hemaeo e ‘voltage is fed to the low-pass filter as shown in Fig. 2.15.1. Tin outt se er suppresses the high frequen hartenies Prot ele re inl roleceeaputciarts helpeetiga Eiciency: ic cncy ofthe cans C amplifier i given by Pac. Vee = Vous) Fae (4 Ye pe Pac = Voc —Verm DF -(- Poo Veetne (u a) ‘As Vee ery small 28 compared to Va the efcieney ofthe clase © 2 fir is very high it ean athiewe above 90% efficiency WaeaAe| What are the four amplifier? on vite short notes on (i eriescerie topology (i) shustsris topology. Taver | retour bai oedback opoloie ar 8 lw: Voltage amplifier (eriew-shumt: strolled voltage source: and shown in It can also be called as voltage cont 1 Fig. 2.16.1. In this, v,=A¥,1p Motistge Amplifier & Feedback nal to input voltage a th Correat amplifier (shant-sorien cred as crrent controled HED! STS and hy Fig 2162. Here, k: LAL, 2 this amplifier, the output quantity i current, thus the fog sat ti ng er =. corrent aml ut) fe il fret @ network (Riese cng eitFeat sampling (shunt-seres) topotogy fi, ‘Traneconductance ampliferseries-series) 1 Itean alsobe called as voltage controlled current source and shown in Fig. 2.16.3. Here, 1=Gy, R Basie + oD) y4| sesematance 7 a Very ‘output voliage ia input i tain ag ea output andthe posi Blcronn Cree / Analog Crests ere 22 eSCSm 38H Bae 4 BBE ss anplier ut | Whe Festa } O| row © vig 2164. Correntmiig, ages AERA RIOR, [GBBT rar the ciceit diagrams of eee aha! ati Caer and epi i wane eee ewer | 1 the ideal structure of the seri shunt feedback amplifiers shown in Fre 217 1a). The circuit has an inpot resistance, a voltage gain A, anal an output resistance R, ‘The closed loop voltage gain Ais given by Mea V, 1+48 ‘the equivalent eieuit motel ofthe series-shunt feedback amplifier is ‘homing 21710 ay dete te mp ad ioe with feedbac 4. Ryeanbe given as Ay Be ree R= Ri. +A8) ‘The negative feedback increases the input resistance by a factor equal to the amount of feedback y, (oy Weal structure.Ray Y= test vatageat the output “a iam igh Be Ty AB ape adc ne tee te ote ovina by a ean Teint FESR ssn ne sronrs corventerie fed -amplific oR Derive the input and output resistance of a transconductance and voltage amplifier. [ARTU 2014-16, Maries) oR List five characteristics of an amplifier which are modified by as. (marersore is Ma) Taser] ve or Voltage or series shunt amplifier : Refer Q, 2.17, Page 2-286 The characters feedback are Input impedance of an amplifier which are modified by negstivé a ‘Frequency Output im ee (or bandwidth), Distortion. pal etre Cris / Analg Ceuta 25E ESC Sem 3&4) ‘eriee-reries or transconductance feedback amplifier: 1. Fig 218.10) shows the ideal structure forthe series erie feedback amplifier. ‘The circuit has an input resistance Ra short-circuit transeonductance, Fa1,/V, and an output resistance ; +" Gy Bgaivaent dreait 41 ‘The closed-loop voltage gain i given by A ¥, +B 4. "Theinput resistance, R, with feedback i given as vi, ag anny v Ry= R(t AD) ‘The negative feedback increases’ the input resistance by & factor: ‘equal to the amount of feedback. 5. The output resistance, R, with feeabeck can be Svea 8 R,2¥l, where, {= test current at outputlifer & Fe a Mokistage Amplifier & Feedback 4 esc Sem = (1448, os Te at sromth tpt esitancsby tac ssigtacrninCren/mieGreie_ seTe coms negative ce z oe is V, = test volt raw andexplain he circuit for sbUnt-shun fq, where, i age at output. sae Mell eA 0sAp R R R Taewer | 1S San fora shunt shunt feedback amp 1 i218. swath el strtre Di, ‘hee =e ee GEERT] Drew and explain the circa for shunt-serl athe 4 i i splifier- i +0 po Taewer ‘o | Fi, 220.1 shows the ideal structure of the shunt series Teedback Ry 1 eeolifier. The closed-loop gain, A, is given by Ep crit ‘ig 24040 ea rach forthe shunt-shunt feedback amplifier. 2 Here is the iopt resistance, is transresstance and R, is output retstance Bs the condctane. 4. Te cose-oop grinds defined 4nVa, and is given by 4 by 3. The output resistance with feedback is givenvege rer Fentece apg RWW, 3 ‘{ = test current at output wee nal R22 ABR, 4 Hose, R= R14 AD) TERRE cuealate he wotage input and output resist, of volingeseries feedback amplifier having A, = 300, Rj = 15 yo ae — {Ale 300, 8, = 18K0, R, = 50k0 and p = 1/15 ‘ToFind Tale Ry. ee pe ion Treo Be ey =x(vdn)=1s11+cmey-2Lsin R 50 rae a (din amir (RR ar] ee | Properties of series shunt amplifier: 1. etabies the age gin 2 Highinpat impedances y= (1+ Ap) {ow outpet impedance, ic, Ry Re a ia Propertis of shunt-shunt amplinc’; ‘ew inpat impedance ie, = —R_ tap 1428 1 Vatage gin, Ay = 3. Output resistance, Ry =2.380k0 a Voltage gain | decreases Seaivisd | oer aa increas | docs aca AE resntance bya [bya bye | bya factor o | fieret [fara | Haar ot tieap) [Gray [ereap. | deeape sae creases | desroans| ners Sa ce ee cor ot | Ero ete tieas) [Crap [easy | ena aaa | dereata atresia Satarton ‘ Ic toto | ae a ip = PAR rect of Feedback on Gain, BW te, Caleulation Practical Circuits. BeBRE] what is the effect of feedback on guin and bandwidth? ower | is characterized 1 Consider an amplifier whose high frequency response BA bya single pole. Ttevain at mid and high frequenciscan be expressed AO" Talon per 348 rsene where A, denotes ie midband gainand oy thesonamanses _shene dnt tet Batecosy reation of negative feedback, y indepen 2 te in -ialeda 4,9) ven Ay! + AyB) A= Ty s/og(l+ AB ‘wilhave a midband prin of, the fedback amplifier Yi BT tipper ba frequency ©, Biven BY og= 0x1 + AB) ean be thown tha the open lop gain i characte, 6 Sey cece sane se eee tpiter i have lover 908 frequency an Se say AB 5. The amplifier bandwidth is increased by the same factor by which it rnidband gan s decreased, maintaining the gain bandwidth product at constaat value TRGB] An amplitier as amidband gain of125 and a bandwidth ‘of 250 kHz, (a) If 4“ negative feedback is introduced. Find the new bandwidth and gain. (6) If the bandwidth is to be restricted to ME, find the feedback ratio. eal | Given : Midband gain, A = 125, Bandwidth, (BW) = 250 kHz, ToFind: a. New bandwidth and gain when 4 % negative feedback '. Feedback ratio when BW = 1 MHz a p04, BW, =(1+4p) BW (1.6125 104) x 250 x 10° Fz = L5MHz eo Gain with feedback, area, — 1) a5 i 1125x004 6 BW, =(1+48) BW. 1x10 (14 1259) 250 « 1 ———I— T_T Ga ABE Ante the creat of Fig 2.283 to determine he wma 1 voltage gain V, /V, the input resistance R, sienal ce R= Ry The transistor has f= 100, "Ne outPut - +1v Tow | ratty DC analysis illustrate n Fig. 2:25:40 Som which we can write V,207+(1,+007H7=899+ 471, (2282) Ve a 4 Ate the solving e228.) and eq, (2262) then we get =0015m8, Tes wA, and Ve=87V. 4. The smal signal analysis shown in Fig. 226210, we gt UR, Rin) (2262) ‘a (B+, +007 —a,¥.(R, I Ro) = Ye 9075 = 16640 = 7,7 0016 R,=R, | Ry [rate dork I. .6omS ee(B, RIE Mh Rit) q = 358.7 2rT ue tb) Ree + Ne th R v @ " Pip ng0, The creat for for determining § is shown in Fig, 2.26.2(d), from which rn reseed srt sgven bY. feedback in Fig. 226.24) Queda | Explain the relationship between stability and pole location. i 1. Foran amplifier or any other system to be stable, its poles should iein the left half of the s-plane. [Apair of complex conjugate poles on the jo axis gives rise to sustained sinusoidal oscillations. ios 2 x | splane @Time © pole lotion and transient: Poles in the right half ofthe s plane give rise to growing, ool pee eran amplifier witha pole pair at = 0, +0, fareiiccarin he lfthalf ofthe plane, then 9, Will be negativg TthePeiations will decay exponentially toward zero, a8 show Fig 227i) indicating that the system is stable. "ig the polesare inthe right half-plane then o, wll be positive, ang aren will grow exponentially as shown in Fig. 2.27.1(b). 4 Ifthe poles are onthe jo-axi, then 9, wil be zero and the oscilla wile sustained, as shown in Fig, 2.27.1) ons eee ‘QHeTRET] What is the effect of gain margin and phase margin on A feedback amplifier is or isnot stable by examining its loo} ina st by examining its loop gain AB as tse of Bode plot for Ap is shown in Fig. 2.28.1 ‘The feedback amplifier whose loop gain is plotted in Fig. 2.28.1 will be stable sinceat the fren I quency of 187 phase shift, o,,, the magnitude eer eens mh yong Boies ele Analog Cen = mapa Se pron oe oot 7 ca a Soe eee Donia er ea ee ein ar ace at eariemiprerie tert ein at which the magnitude plot crosses the OB line, Ce es ane then the amplifier is stable, ee Oe To nn i (ce aeeng ee ase lag isin exces of 180", the amplifier willbe unstable, Q.1. Draw the equivalent circuit of BUT at high frequency and derive the expression for upper cut-off frequency. ‘pais Refer Q. 2.1. 2. Draw the Jn frequency small signal circuit of a MOSFET pr Iona resistance using the effect of Miller capacitance, sien eat ro an expression forthe Miller capacitance and cut-off frequency (fp ‘as: Refer Q. 2.2 @.3. Explain the frequency response of common emitter configuration. ‘ams Refer Q. 2-4 Qs Write the different coupling scheme of multistage ampiiie’ Explain frequency response of RC coupled ‘amplifier in two-stage CE configuration. ‘Ang, Refer Q. 2.6. Q.5. Derive power-conversion| efficiency of class A output #082 ‘ag, Refer Q. 2.10, Q6. Why class A amplifier?= as Qs. ane quo. ae qu. x Amplifier & Feedback: Multistage & Fe “Seay je feedback topologies of ampiig, a pain the erui for shunt-shunt Seer Ex foedbacy hati the effect of gain margin and PHASE margin g. stability? Refer @ 228, Calculate the voltage gui, input and output resistance crthtyeriee feedback amplifier having A, ~ 309° Tein, Ry=50 ks and p = 1/15. , ReorQ 221 Desribe the properties of series-shunt and shunt-shunt fecdback amplifier Refer @. 222 @00 Ss CONTENTS ae =) oman ea roe Concept, Barkhausen Criterion A oe see ag \ift, Wien Bridge etc.) ee eae 1 or tare Pisce | Non Sineeitd Oatinee e err Oscillators 3-1E(ESC-Sem3&4)ae ‘Geodt | What is the basic principle of sinusoidal oscillator,» Explain Barkhausen criterion. Answer {1 Siomoilocilstrs are lectrniccrcits that produce ome sinooidal nature. They work on the principle of Barkhavsen eons 2. ‘Thebsc structure of sinusoidal oxiltor consist ofan ampliferende froquency-silective network connectedin.a positive feedbackloop, tons infig 311 8 The gain with feedback i given by, Als) Als) — (au) 0” TA) ie) Here loop gain is Us) = Als) Xs) (3.12) and the characteristic equation, 1 -L(s) % ‘Amplifier A ° 3 | Frequency-selective network B Fig: 3.1.1. The basiewiracture ofa sinusoidal oscillator. 4 Hata specific frequency, the loop gain AB is equal to unity. from eq. (3.1.1) that A, will be infinite. That is, at this frequen©) 1 cireuit wil have finite output for zero input signal. Such a cireuit * sseillator. Py 5, Thus the condition for the feedback loop of Fig. 3.1.1 to provide: sinusoid oscillations of frequency o, is Lijo,)= AGjo,) Bjo,) = 1 oi Thats to, the phase ofthe loop gain shouldbe zero andthe en of the loop gain should be unity. This is known as the criterion. it follows SR ESC Sens, For this loop (Fig. 3.11) to produce and susta input applied (x, = 0), the feedback signal ig, "PH, With no 3;= Bs, sufficiently | eee aeultte sufficiently large that when multiplied by Ait fe Asy=, ke ra ie G13) which results in Abt 1814) Thus the Barkhausen criterion defines two bai sourenent fr ‘Total phase shift in the closed loop is 0° or 369° ‘The magnitude of loop gain, i, |AB| = PART-2 Que82, | Draw the circuit of an RC phase-shift oscillator using op-amp and derive frequency and condition of oscillation for RC (acre Tar 6] cillator. Draw the ou ive the Phase-shift oscillator. w - phase-shift rite the disadvantages of RC phase-shi cireuit diagram of RC phase-shift oscillator and d expression for frequency. Answer L The RC phase-shift oscillator consis ‘amplifier stage, and the cascaded RC m circuit isshown in Fig. 92.1 i ng configuration, and it prodvees 187 asthe ng of an op-amp serving work acting asthe feedback 2 = op-amp is used in invertir .ase-shift at the output. ‘network path 4. The cascaded RC networks connected nh feoioct re, the total Provide an additional phase-shift of Sl aoe (or0") Phase-shift around the loop is achieved toMe 1. Feedback Minar Pei f seatcies, a de 1 V0) 1S Vf0) Yooh St eh yofER YofER y FiG882. RC network othe pine ahi oclator in sdomain: 2% Senlving Kirchboffs current aw at node V(s) as shown in Fig. 8.2.2 and Xo VM-VO) _ Vis) , Vi(s)- Vio) ait) “Rr * arc) ‘Thus, WAGER AG) Via) = M+ VoIRCs 42.1) 2RCs +1 shes L(8) + 1,8) 2 Sinilary,atnode V9, MWY) Ws) ¥5(9)- VG) Rare) ‘a7ec) Solving for Vs), we get W7e0) aw ‘ia € «= (RCs +1) ‘Torefore, Vye)= BED yi) aun substituting ¢q (3.2.8) and eg (3.2.1) in eq, (3.2.2) result in RCAV;(s) , (RCB+DVi(5) _ (2RC8- WERCH +305 RCs+1° 2RCs+1 RO ve) simpiying or gy meet v,(@) Ree V.(s)-RIC*s* + 6R°C's" + 5RCs +1 ae ‘The voltage gain ofthe op-amp is v0) __& Eee 4.25) We know that for any oscillator, the necessary condition for the oscillation is AB = 1. Therefore, using eq (3.24) and (3.2.5), we obtain -* _ i BR, RO'e + 6R'C# + BRC Substituting # = jo, in.eq. (8.2.6), we obtain A= 1 826) (8) (CFE) Cio RC = jo, RC) - 603" C+ BREF ~AB2N Equating the real parts of eq (8.27), we get 0 =~ 60 2R'C+1 4328) outs (829) Re or uid = aJBRC uatng the imaginary parts of en-(3.2, we get { (Fe cvateer = jar? +5086sonmscsemse ___Stelitn -R, 5 sia qt are ©. Substtting for 0 romeq. (8.29, ‘Therefore the gain ofthe amplifier shouldbe atleast 29, and the tot, ‘phase-shift around the loop should be exactly 360° Disadvantages of phase-shift oscillator 4, isdificult forthe cieuitto start oscillations asa feedback is generally ‘small 2, ‘Thecitcuit gives small output. QEETET | Write a short note on ring oscillator. “Answer 1. Ring oscillator is an example of phase-shift oscillator. It is used in digital integrated circuit for clock generation 2 ‘Thering osilator consists of odd number of inverters connected ina ring as shown in Fig. 3.3.1. The load of each inverter is a capacitor Inv ‘evan F Inv2 Inva Fig. 23.1. Ring oscillator, 3. It is known that every inverter provides a 180° phase shift between input and output. 4. Ifthe inverters and the associated load capacitors generate a net phase shift atthe last inverter output in multiples of 860", then the feedback ‘signal i in phase with the input and the oscillations can be sustained. 5, Since the output ofan inverter is a pulse, the ring oscillator generates piles. 6. The frequency of this pulse generator is decided by the propagation delay per inverter stage and the number of such (odd) stages. QETAT] tn a RC phase-shitt oscillator, R = 100 ko and 600 pF. Find the frequency of oscillation of the oscillator. awwer | Given: R= 100k, C= 600 pF ‘To Find: /, ecronicsCircuits/ Analog Greuits a ayo BC pane aio, 7 ** 2aROTE 1 * Bex100-40" 60002 1082.91 Hz = LOR2kHz GERET]| Weite «short note onthe Wenig na iow | Fig, 85.1 shows Wien bridge oseillator. The circuit consists ofan * pomp connected in the non-inverting configuration, wth lod lap f, » pin (1-22) nthe eo pt RC ta 4 Thore are two feedback paths in Fig. 35.1, postive feedback through2, and Z,, whose components determine the frequeney of esiltion, and negative feedback through R, and R,, whose element affect the ample of oscillation and sot the gain of the op-amp stage. ig 8.6.1, Wier silat, 4% The loop gain can be easily obtained as un=(1+ where,Oscitator, ee jo) 1B — 3+ joOR - Pp '5 Loop gain willbe real number at one frequency given by 1 00h — 1 aa 7 GR 7 4 RRC 6 Toobin sustained oscilaton ao, wesbould set the magnitude of the iro gin tout. This canbe achieved by selecting y=? FB xe cect dtgram of Wien Brg onetntor nd jon of frequency of oscillation. Calculate the son for given values of 2, = R, = 200 ka, ‘AKTU 2016-16, Marks 10 derive an exp frequency of oscil C,=C,=200pF. Wien bridge oscillator: Refer Q. 3.5, Page 3-TE, Unit-3. Numerical : Given :R, = R= 200 kA, C, = C, = 200 pF ToFind:/,. 1 1 2eRC ~ Be 200210" «30010 = 0.08978 «10° Ha =3.978 kHz PART-3 @) ” @ 3 i. 3274.0 lnk ei fr er ‘The inductor L stores electromagnetic energy init when eurent lows through it. IF voltage is applied tothe capacitor Ct stores electrostatic energy in its electric field. Case I: Refer to Fig. 3.7.10), suppose the capacitor Cis charged from DC voltage with the polarities as shown. Now the capacitor Chas voltage across it, hence it stores electrostatic energy across Case I: 1 As the switch S is closed, the capacitor C discharges through the inductor L due to flow of electrons as shown in Fig. 3.7.1). Due this current flow, magnetic field gets set around the inductor eo This Magnetic field stores electromagnetic energy. ‘The current increases slowly to maximum value: and the capacitor is tlscharged fully : When the capacitor C gets discharged fully, the electrical ener apacitor C gets a (clectrostatic energy) across it is completely ont oe . ‘eld energy (electromagnetic energy) around the Case MI: Z Asthe capacitor C gets discharged completely, the magnetic _ tenatrcstncape earns to this counter emf, current flows in the Sit ie polarity {e22 law. Due otis, the capacitor gets charze wih in Fig. 3.5.1.eunaweess) ==. a. Asthecapctor Cgets char nto slecrostatie eng itd the inductor coil has 0 ~ capacitor. Case IV: ieee ner recharging the capacitor Cit bagi 0 dicbargethroygh i flows in opposite direction as {inductor coil L but current ph ‘ Favs le). This sequence of charging and discharging of eapacy.” results into alternating current Dai 2 The energy isalternately stored in the electric field of capacitor sae easttte energy and magnetic field ofinductor(., electromagnas ‘enerey) “a ‘This process of interchanging the energy between the capacitor Can, » eeeselector Lis repested resulting to generate electrical oscillations Frequeney of oscillations : ‘The frequency of oscillations (f,) produced by tank circuit is given by Derive the expression for the loop gain and frequency of oscillation for Coipitts oscillator. ‘ARTO 2014-15, Marks 10) sng tones Cres Anag Cea chen er ‘ ‘of operation; Fig. 38.2: Bguivalell 1. Apply KCL at node C gives, | 81) 2. Since V, + 0 (oscillations have started), it can be eliminated, and 9. (3.8.4) can be rearranged in the form (19% SCV, +8, V,+ (E400) G4 step <0 1 The schematic of Colpitts oscillator is shown in Fig. 3.8.1 Cy | 1. ilizes a parallel LC circuit connected actag and base (or between drain and gate if a FET is use! Hon ofthe tuned-creut voltage fed tothe emitter. % Tie eck in achieved bythe way of a capacitive divider 9 ™ Colpits eclator creat ieee Fe Colts omiltar, the frequency of operation i given DS oe vfi{ SG) Wares) 2 Colpitts oscillator uti calleetor and base betwee? wit PU C,+ ALC + C90) + (oF) «0 (38 Substituting» = jo gives, 1_ tt) “ (et RRA) tulecycp-eme,c,)=0 889 8 Forowillations, to start, both the real and imaginary parts must be 270 Equating the imaginary part of eq. (3.8.3) to zero gives the frequency of oscillation as o.- fe) 380) G+C2) hich is the resonance frequeney ofthe tank circuit. 4 Equating the real part of eq. (3.8.5) to ero together with using 4.13.84) gives condition of eilatian as CYC, =4,R 085) =] The sebematic of Hartley oxilata is shown in Fi: 384 © h Fig. 9, Hartley onion. Bis pi 1 eit ema rae 2 Huge an ft tuned cre vaage le othe sat iti feedback is achieved by the way of an inductive divider int, Hortley oseilatr circuit Hartley osilator, the frequency of operation is given by n= VE rT Ne Derivation for loop gain and frequency of o;ration : c : A u By, fa¥ rk Bh Fig. 9932, Bjuivalontcireuit ofthe Hartley oscillator, a 4 Por 1 Apply KCLat node < Gea. «aa Rea tele i 3? oye 2 Substituting oq (3.9.2) ineg. (3.9.1) vist, setae - 38? WR ay*#teesi* FL,ca1 a Substituting » = jo in eq, (8.9.8) gives (lege) ( wc 4 at M1026) izeiie a)" ° lectronicsCireuits/ Analog Cireuits 7 eon nee ting the imaginary arto. (8.94) 10 4 4 Baiation as 22r gives the fequeney of 2 WEE im ios inet eg 1 cnet 2 at hig L SR = zy Clapp oscillator. Pera on what is the drawback of Colpitts oscillator? How it can be removed fy Clapp oscillator ? we | The drawback of the Colpitts oscillator is that its frequency stability is very poor 2 To overcome this drawback, the inductor L is replaced by a series combination ofinductor Land capacitor C,, witha very small value of, compared to either C, or C & AsC, << Cy, Cy, the stability of the cireuit is improved because the frequency of oscillation is only dependent-on C, and not on any other capacitance or the stray eapacitance ofthe transistor. Veo: RFC aa Fig. 2.10.1, Complete circuit for the Clapp oscillator * Fig. 910.1 shows the modified Colpittsosillator, which s owt, cia ingeries with the Clapp oscillator, where a capacitor Chas been added inseri=s) the inductor, roe For the Colpitts oscillator, the frequency of sellation) are in series, the frequeney Assuming that ll the three capacitors of ‘ciation forthe Clap oscillator becomes where, 1. Weknow that C, << C,, Cy, Hence, c=0, 1 ies ReSAI] Which type of feedback is seen in Wien bridge oscillator ? Compare the performances of RC oseillators and LC oscillators. “Aaawer_ | Feedback in Wien bridge osilator : Refer Q. 3.5, Page 3-78, tara, [EXa | Booeciatos | | 1. | RC oscillators are used for | LC oscillators are used for generating frequencies upto | generating frequencies higher 1 MH. than 1 MHz, ‘RC networks are used % | Wien-bridge oscillator, | Crytal tuned, Colts exilatrs has hit ecltore ee | et are some LC ooilators fre some RC mclators 4 | has large degree of | It has less 2 has less degree of distortion. LC oscillators [LC networks are used. 5._| It creates non-linearity. It does not create non-linearity. 6. | Taned circuit ie absent | Tuned drei o tank creat ee RC oscillator | used because the oscillators afe enersin only’ low | dtc tener aver lar8® frequencies, eee 1 Ht tas low quality factor. | Te has high quality ctor PE: GERAD] Draw the circuit diagram for monostable multivibrator with operational amplifier. Explain its operation. Derive the trprestion for its time period. or What do you mean by non-sinusoidal oscillators? ‘answer Non-sinusoidal or relaxation oscillators: The osllators which produce square waves, triangular waves, pulses or sawtooth waves are known as relaxation oscillators Cireuit diagram for monostable multivibrator : 1 Fig. 3.12.1 shows the circuit diagram of monostable multvibrator.A diode D, clamps the capacitor voltage to 0.7 V when the output nat(escsems84) — = magnitude V, (tri ise signal of ve going Puls , D, Siena 2 The eztv win a err RC, a ode D reduces anager! Sppled tothe (+) input termina ping triggering use amd Operation: sion, the trigger pulse width 7, should be my, 1 Por mone tise width ofthe nonostable multivibratar. * sa cae ved alton by BLCINg the posi, 2. Thediode Dy 7 et iat rane i ent ah erat etsxsi bet output waveform. 5, Fig 3.122 shows the trigger and ¥ om juan stable state Ss el ‘This width depends on the valve of Rand C a hase ent we (Gove) input. Te! R, and R, gives feedback +BVat™' thedndein trendy eat the cepacor voltage v0.7 V Cea voltage at (ve) term: therfore op state, holds V, at sy, output state is called a5 ia tinal is r (ve) termits higher than we) termi poxcsrcvoninrcate/AmlegCieais epi i applied to (sve) 6 W\iigher than the voltage at (ve) "e) of op-amp whi is hie! E ‘terminal. The sp which mrpack voltage and negative trigger vo combination of rage at (ve) input. age willbe pulled below the the (4ve) input becomes negative with r : switches 1 ~ Vay With this change, the one-shot aes oo nu Verte sate stn untable tate ‘niet oY, a. Duct, Zee. fe input ncones more andmurnenare i ingnd, Whe he caacorvolge ‘morethan (+e)terminel ¥ Sane 0+ Va é for time period : ‘The general solution for a signal time constant low pass RC circuit wit Vand V,as initial and final value is Bae as 5 V,=V;+(V,-Vpe-mme V,q, and V, = Vp (diode forward voltage) 2 Forthe circuit, The output Veis ane) eae Therefore = BV sas = — Vaan + Vp + Veg RO 4 After simplification, the pulse widths is obtained as = rein’ ¥o/Vat) 29 P= acne qf > =R, 80 =05then IFV,..>> V, and R, = R, so that B 19138) T= 069RC TERRI] xptain astable multvibeator wth te waveform. =a smultivibrator or fee Square wave generator is also called as astable ‘unning oscillator.